sunscpal.c revision 1.3.2.4
1 1.3.2.4 nathanw /* $NetBSD: sunscpal.c,v 1.3.2.4 2001/11/14 19:14:37 nathanw Exp $ */ 2 1.3.2.2 nathanw 3 1.3.2.2 nathanw /* 4 1.3.2.2 nathanw * Copyright (c) 2001 Matthew Fredette 5 1.3.2.2 nathanw * Copyright (c) 1995 David Jones, Gordon W. Ross 6 1.3.2.2 nathanw * Copyright (c) 1994 Jarle Greipsland 7 1.3.2.2 nathanw * All rights reserved. 8 1.3.2.2 nathanw * 9 1.3.2.2 nathanw * Redistribution and use in source and binary forms, with or without 10 1.3.2.2 nathanw * modification, are permitted provided that the following conditions 11 1.3.2.2 nathanw * are met: 12 1.3.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 13 1.3.2.2 nathanw * notice, this list of conditions and the following disclaimer. 14 1.3.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 15 1.3.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 16 1.3.2.2 nathanw * documentation and/or other materials provided with the distribution. 17 1.3.2.2 nathanw * 3. The name of the authors may not be used to endorse or promote products 18 1.3.2.2 nathanw * derived from this software without specific prior written permission. 19 1.3.2.2 nathanw * 4. All advertising materials mentioning features or use of this software 20 1.3.2.2 nathanw * must display the following acknowledgement: 21 1.3.2.2 nathanw * This product includes software developed by 22 1.3.2.2 nathanw * David Jones and Gordon Ross 23 1.3.2.2 nathanw * 24 1.3.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 25 1.3.2.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 1.3.2.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 1.3.2.2 nathanw * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 28 1.3.2.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 1.3.2.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 1.3.2.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 1.3.2.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 1.3.2.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 1.3.2.2 nathanw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 1.3.2.2 nathanw */ 35 1.3.2.2 nathanw 36 1.3.2.2 nathanw /* 37 1.3.2.2 nathanw * This is a machine-independent driver for the Sun "sc" 38 1.3.2.2 nathanw * SCSI Bus Controller (SBC). 39 1.3.2.2 nathanw * 40 1.3.2.2 nathanw * This code should work with any memory-mapped card, 41 1.3.2.2 nathanw * and can be shared by multiple adapters that address 42 1.3.2.2 nathanw * the card with different register offset spacings. 43 1.3.2.2 nathanw * (This can happen on the atari, for example.) 44 1.3.2.2 nathanw * 45 1.3.2.2 nathanw * Credits, history: 46 1.3.2.2 nathanw * 47 1.3.2.2 nathanw * Matthew Fredette completely copied revision 1.38 of 48 1.3.2.2 nathanw * ncr5380sbc.c, and then heavily modified it to match 49 1.3.2.2 nathanw * the Sun sc PAL. The remaining credits are for 50 1.3.2.2 nathanw * ncr5380sbc.c: 51 1.3.2.2 nathanw * 52 1.3.2.2 nathanw * David Jones is the author of most of the code that now 53 1.3.2.2 nathanw * appears in this file, and was the architect of the 54 1.3.2.2 nathanw * current overall structure (MI/MD code separation, etc.) 55 1.3.2.2 nathanw * 56 1.3.2.2 nathanw * Gordon Ross integrated the message phase code, added lots of 57 1.3.2.2 nathanw * comments about what happens when and why (re. SCSI spec.), 58 1.3.2.2 nathanw * debugged some reentrance problems, and added several new 59 1.3.2.2 nathanw * "hooks" needed for the Sun3 "si" adapters. 60 1.3.2.2 nathanw * 61 1.3.2.2 nathanw * The message in/out code was taken nearly verbatim from 62 1.3.2.2 nathanw * the aic6360 driver by Jarle Greipsland. 63 1.3.2.2 nathanw * 64 1.3.2.2 nathanw * Several other NCR5380 drivers were used for reference 65 1.3.2.2 nathanw * while developing this driver, including work by: 66 1.3.2.2 nathanw * The Alice Group (mac68k port) namely: 67 1.3.2.2 nathanw * Allen K. Briggs, Chris P. Caputo, Michael L. Finch, 68 1.3.2.2 nathanw * Bradley A. Grantham, and Lawrence A. Kesteloot 69 1.3.2.2 nathanw * Michael L. Hitch (amiga drivers: sci.c) 70 1.3.2.2 nathanw * Leo Weppelman (atari driver: ncr5380.c) 71 1.3.2.2 nathanw * There are others too. Thanks, everyone. 72 1.3.2.2 nathanw * 73 1.3.2.2 nathanw * Transliteration to bus_space() performed 9/17/98 by 74 1.3.2.2 nathanw * John Ruschmeyer (jruschme (at) exit109.com) for i386 'nca' driver. 75 1.3.2.2 nathanw * Thank you all. 76 1.3.2.2 nathanw */ 77 1.3.2.2 nathanw 78 1.3.2.4 nathanw #include <sys/cdefs.h> 79 1.3.2.4 nathanw __KERNEL_RCSID(0, "$NetBSD: sunscpal.c,v 1.3.2.4 2001/11/14 19:14:37 nathanw Exp $"); 80 1.3.2.4 nathanw 81 1.3.2.2 nathanw #include "opt_ddb.h" 82 1.3.2.2 nathanw 83 1.3.2.2 nathanw #include <sys/types.h> 84 1.3.2.2 nathanw #include <sys/param.h> 85 1.3.2.2 nathanw #include <sys/systm.h> 86 1.3.2.2 nathanw #include <sys/kernel.h> 87 1.3.2.2 nathanw #include <sys/errno.h> 88 1.3.2.2 nathanw #include <sys/malloc.h> 89 1.3.2.2 nathanw #include <sys/device.h> 90 1.3.2.2 nathanw #include <sys/buf.h> 91 1.3.2.2 nathanw #include <sys/proc.h> 92 1.3.2.2 nathanw #include <sys/user.h> 93 1.3.2.2 nathanw 94 1.3.2.2 nathanw #include <dev/scsipi/scsi_all.h> 95 1.3.2.2 nathanw #include <dev/scsipi/scsipi_all.h> 96 1.3.2.2 nathanw #include <dev/scsipi/scsipi_debug.h> 97 1.3.2.2 nathanw #include <dev/scsipi/scsi_message.h> 98 1.3.2.2 nathanw #include <dev/scsipi/scsiconf.h> 99 1.3.2.2 nathanw 100 1.3.2.2 nathanw #ifdef DDB 101 1.3.2.2 nathanw #include <ddb/db_output.h> 102 1.3.2.2 nathanw #endif 103 1.3.2.2 nathanw 104 1.3.2.2 nathanw #include <dev/ic/sunscpalreg.h> 105 1.3.2.2 nathanw #include <dev/ic/sunscpalvar.h> 106 1.3.2.2 nathanw 107 1.3.2.2 nathanw static void sunscpal_reset_scsibus __P((struct sunscpal_softc *)); 108 1.3.2.2 nathanw static void sunscpal_sched __P((struct sunscpal_softc *)); 109 1.3.2.2 nathanw static void sunscpal_done __P((struct sunscpal_softc *)); 110 1.3.2.2 nathanw 111 1.3.2.2 nathanw static int sunscpal_select 112 1.3.2.2 nathanw __P((struct sunscpal_softc *, struct sunscpal_req *)); 113 1.3.2.2 nathanw static void sunscpal_reselect __P((struct sunscpal_softc *)); 114 1.3.2.2 nathanw 115 1.3.2.2 nathanw static int sunscpal_msg_in __P((struct sunscpal_softc *)); 116 1.3.2.2 nathanw static int sunscpal_msg_out __P((struct sunscpal_softc *)); 117 1.3.2.2 nathanw static int sunscpal_data_xfer __P((struct sunscpal_softc *, int)); 118 1.3.2.2 nathanw static int sunscpal_command __P((struct sunscpal_softc *)); 119 1.3.2.2 nathanw static int sunscpal_status __P((struct sunscpal_softc *)); 120 1.3.2.2 nathanw static void sunscpal_machine __P((struct sunscpal_softc *)); 121 1.3.2.2 nathanw 122 1.3.2.2 nathanw void sunscpal_abort __P((struct sunscpal_softc *)); 123 1.3.2.2 nathanw void sunscpal_cmd_timeout __P((void *)); 124 1.3.2.2 nathanw /* 125 1.3.2.3 nathanw * Action flags returned by the info_transfer functions: 126 1.3.2.2 nathanw * (These determine what happens next.) 127 1.3.2.2 nathanw */ 128 1.3.2.2 nathanw #define ACT_CONTINUE 0x00 /* No flags: expect another phase */ 129 1.3.2.2 nathanw #define ACT_DISCONNECT 0x01 /* Target is disconnecting */ 130 1.3.2.2 nathanw #define ACT_CMD_DONE 0x02 /* Need to call scsipi_done() */ 131 1.3.2.2 nathanw #define ACT_RESET_BUS 0x04 /* Need bus reset (cmd timeout) */ 132 1.3.2.2 nathanw #define ACT_WAIT_DMA 0x10 /* Wait for DMA to complete */ 133 1.3.2.2 nathanw 134 1.3.2.2 nathanw /***************************************************************** 135 1.3.2.2 nathanw * Debugging stuff 136 1.3.2.2 nathanw *****************************************************************/ 137 1.3.2.2 nathanw 138 1.3.2.2 nathanw #ifndef DDB 139 1.3.2.2 nathanw /* This is used only in recoverable places. */ 140 1.3.2.2 nathanw #ifndef Debugger 141 1.3.2.2 nathanw #define Debugger() printf("Debug: sunscpal.c:%d\n", __LINE__) 142 1.3.2.2 nathanw #endif 143 1.3.2.2 nathanw #endif 144 1.3.2.2 nathanw 145 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 146 1.3.2.2 nathanw 147 1.3.2.2 nathanw #define SUNSCPAL_DBG_BREAK 1 148 1.3.2.2 nathanw #define SUNSCPAL_DBG_CMDS 2 149 1.3.2.2 nathanw #define SUNSCPAL_DBG_DMA 4 150 1.3.2.2 nathanw int sunscpal_debug = 0; 151 1.3.2.2 nathanw #define SUNSCPAL_BREAK() \ 152 1.3.2.2 nathanw do { if (sunscpal_debug & SUNSCPAL_DBG_BREAK) Debugger(); } while (0) 153 1.3.2.2 nathanw static void sunscpal_show_scsi_cmd __P((struct scsipi_xfer *)); 154 1.3.2.2 nathanw #ifdef DDB 155 1.3.2.2 nathanw void sunscpal_clear_trace __P((void)); 156 1.3.2.2 nathanw void sunscpal_show_trace __P((void)); 157 1.3.2.2 nathanw void sunscpal_show_req __P((struct sunscpal_req *)); 158 1.3.2.2 nathanw void sunscpal_show_state __P((void)); 159 1.3.2.2 nathanw #endif /* DDB */ 160 1.3.2.2 nathanw #else /* SUNSCPAL_DEBUG */ 161 1.3.2.2 nathanw 162 1.3.2.2 nathanw #define SUNSCPAL_BREAK() /* nada */ 163 1.3.2.2 nathanw #define sunscpal_show_scsi_cmd(xs) /* nada */ 164 1.3.2.2 nathanw 165 1.3.2.2 nathanw #endif /* SUNSCPAL_DEBUG */ 166 1.3.2.2 nathanw 167 1.3.2.2 nathanw static char * 168 1.3.2.2 nathanw phase_names[8] = { 169 1.3.2.2 nathanw "DATA_OUT", 170 1.3.2.2 nathanw "DATA_IN", 171 1.3.2.2 nathanw "COMMAND", 172 1.3.2.2 nathanw "STATUS", 173 1.3.2.2 nathanw "UNSPEC1", 174 1.3.2.2 nathanw "UNSPEC2", 175 1.3.2.2 nathanw "MSG_OUT", 176 1.3.2.2 nathanw "MSG_IN", 177 1.3.2.2 nathanw }; 178 1.3.2.2 nathanw 179 1.3.2.2 nathanw #ifdef SUNSCPAL_USE_BUS_DMA 180 1.3.2.2 nathanw static void sunscpal_dma_alloc __P((struct sunscpal_softc *)); 181 1.3.2.2 nathanw static void sunscpal_dma_free __P((struct sunscpal_softc *)); 182 1.3.2.2 nathanw static void sunscpal_dma_setup __P((struct sunscpal_softc *)); 183 1.3.2.2 nathanw #else 184 1.3.2.2 nathanw #define sunscpal_dma_alloc(sc) (*sc->sc_dma_alloc)(sc) 185 1.3.2.2 nathanw #define sunscpal_dma_free(sc) (*sc->sc_dma_free)(sc) 186 1.3.2.2 nathanw #define sunscpal_dma_setup(sc) (*sc->sc_dma_setup)(sc) 187 1.3.2.2 nathanw #endif 188 1.3.2.2 nathanw static void sunscpal_minphys __P((struct buf *)); 189 1.3.2.2 nathanw 190 1.3.2.2 nathanw /***************************************************************** 191 1.3.2.2 nathanw * Actual chip control 192 1.3.2.2 nathanw *****************************************************************/ 193 1.3.2.2 nathanw 194 1.3.2.2 nathanw /* 195 1.3.2.2 nathanw * XXX: These timeouts might need to be tuned... 196 1.3.2.2 nathanw */ 197 1.3.2.2 nathanw 198 1.3.2.2 nathanw /* This one is used when waiting for a phase change. (X100uS.) */ 199 1.3.2.2 nathanw int sunscpal_wait_phase_timo = 1000 * 10 * 300; /* 5 min. */ 200 1.3.2.2 nathanw 201 1.3.2.2 nathanw /* These are used in the following inline functions. */ 202 1.3.2.2 nathanw int sunscpal_wait_req_timo = 1000 * 50; /* X2 = 100 mS. */ 203 1.3.2.2 nathanw int sunscpal_wait_nrq_timo = 1000 * 25; /* X2 = 50 mS. */ 204 1.3.2.2 nathanw 205 1.3.2.2 nathanw static __inline int sunscpal_wait_req __P((struct sunscpal_softc *)); 206 1.3.2.2 nathanw static __inline int sunscpal_wait_not_req __P((struct sunscpal_softc *)); 207 1.3.2.2 nathanw static __inline void sunscpal_sched_msgout __P((struct sunscpal_softc *, int)); 208 1.3.2.2 nathanw 209 1.3.2.2 nathanw /* Return zero on success. */ 210 1.3.2.2 nathanw static __inline int sunscpal_wait_req(sc) 211 1.3.2.2 nathanw struct sunscpal_softc *sc; 212 1.3.2.2 nathanw { 213 1.3.2.2 nathanw int timo = sunscpal_wait_req_timo; 214 1.3.2.2 nathanw for (;;) { 215 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_REQUEST) { 216 1.3.2.2 nathanw timo = 0; /* return 0 */ 217 1.3.2.2 nathanw break; 218 1.3.2.2 nathanw } 219 1.3.2.2 nathanw if (--timo < 0) 220 1.3.2.2 nathanw break; /* return -1 */ 221 1.3.2.2 nathanw delay(2); 222 1.3.2.2 nathanw } 223 1.3.2.2 nathanw return (timo); 224 1.3.2.2 nathanw } 225 1.3.2.2 nathanw 226 1.3.2.2 nathanw /* Return zero on success. */ 227 1.3.2.2 nathanw static __inline int sunscpal_wait_not_req(sc) 228 1.3.2.2 nathanw struct sunscpal_softc *sc; 229 1.3.2.2 nathanw { 230 1.3.2.2 nathanw int timo = sunscpal_wait_nrq_timo; 231 1.3.2.2 nathanw for (;;) { 232 1.3.2.2 nathanw if ((SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_REQUEST) == 0) { 233 1.3.2.2 nathanw timo = 0; /* return 0 */ 234 1.3.2.2 nathanw break; 235 1.3.2.2 nathanw } 236 1.3.2.2 nathanw if (--timo < 0) 237 1.3.2.2 nathanw break; /* return -1 */ 238 1.3.2.2 nathanw delay(2); 239 1.3.2.2 nathanw } 240 1.3.2.2 nathanw return (timo); 241 1.3.2.2 nathanw } 242 1.3.2.2 nathanw 243 1.3.2.2 nathanw /* 244 1.3.2.2 nathanw * These functions control DMA functions in the chipset independent of 245 1.3.2.2 nathanw * the host DMA implementation. 246 1.3.2.2 nathanw */ 247 1.3.2.2 nathanw static void sunscpal_dma_start __P((struct sunscpal_softc *)); 248 1.3.2.2 nathanw static void sunscpal_dma_poll __P((struct sunscpal_softc *)); 249 1.3.2.2 nathanw static void sunscpal_dma_stop __P((struct sunscpal_softc *)); 250 1.3.2.2 nathanw 251 1.3.2.2 nathanw static void 252 1.3.2.2 nathanw sunscpal_dma_start(sc) 253 1.3.2.2 nathanw struct sunscpal_softc *sc; 254 1.3.2.2 nathanw { 255 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 256 1.3.2.2 nathanw int xlen; 257 1.3.2.2 nathanw u_int16_t icr; 258 1.3.2.2 nathanw 259 1.3.2.2 nathanw xlen = sc->sc_reqlen; 260 1.3.2.2 nathanw 261 1.3.2.2 nathanw /* Let'er rip! */ 262 1.3.2.2 nathanw icr = SUNSCPAL_READ_2(sc, sunscpal_icr); 263 1.3.2.2 nathanw icr |= SUNSCPAL_ICR_DMA_ENABLE | 264 1.3.2.2 nathanw ((xlen & 1) ? 0 : SUNSCPAL_ICR_WORD_MODE) | 265 1.3.2.2 nathanw ((sr->sr_flags & SR_IMMED) ? 0 : SUNSCPAL_ICR_INTERRUPT_ENABLE); 266 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, icr); 267 1.3.2.2 nathanw 268 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_DOINGDMA; 269 1.3.2.2 nathanw 270 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 271 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_DMA) { 272 1.3.2.2 nathanw printf("sunscpal_dma_start: started, flags=0x%x\n", 273 1.3.2.2 nathanw sc->sc_state); 274 1.3.2.2 nathanw } 275 1.3.2.2 nathanw #endif 276 1.3.2.2 nathanw } 277 1.3.2.2 nathanw 278 1.3.2.2 nathanw #define ICR_MASK (SUNSCPAL_ICR_PARITY_ERROR | SUNSCPAL_ICR_BUS_ERROR | SUNSCPAL_ICR_INTERRUPT_REQUEST) 279 1.3.2.2 nathanw #define POLL_TIMO 50000 /* X100 = 5 sec. */ 280 1.3.2.2 nathanw 281 1.3.2.2 nathanw /* 282 1.3.2.2 nathanw * Poll (spin-wait) for DMA completion. 283 1.3.2.2 nathanw * Called right after xx_dma_start(), and 284 1.3.2.2 nathanw * xx_dma_stop() will be called next. 285 1.3.2.2 nathanw */ 286 1.3.2.2 nathanw static void 287 1.3.2.2 nathanw sunscpal_dma_poll(sc) 288 1.3.2.2 nathanw struct sunscpal_softc *sc; 289 1.3.2.2 nathanw { 290 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 291 1.3.2.2 nathanw int tmo; 292 1.3.2.2 nathanw 293 1.3.2.2 nathanw /* Make sure DMA started successfully. */ 294 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) 295 1.3.2.2 nathanw return; 296 1.3.2.2 nathanw 297 1.3.2.2 nathanw /* Wait for any "dma complete" or error bits. */ 298 1.3.2.2 nathanw tmo = POLL_TIMO; 299 1.3.2.2 nathanw for (;;) { 300 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & ICR_MASK) 301 1.3.2.2 nathanw break; 302 1.3.2.2 nathanw if (--tmo <= 0) { 303 1.3.2.2 nathanw printf("sc: DMA timeout (while polling)\n"); 304 1.3.2.2 nathanw /* Indicate timeout as MI code would. */ 305 1.3.2.2 nathanw sr->sr_flags |= SR_OVERDUE; 306 1.3.2.2 nathanw break; 307 1.3.2.2 nathanw } 308 1.3.2.2 nathanw delay(100); 309 1.3.2.2 nathanw } 310 1.3.2.2 nathanw SUNSCPAL_TRACE("sunscpal_dma_poll: waited %d\n", 311 1.3.2.2 nathanw POLL_TIMO - tmo); 312 1.3.2.2 nathanw 313 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 314 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_DMA) { 315 1.3.2.3 nathanw char buffer[64]; 316 1.3.2.3 nathanw bitmask_snprintf(SUNSCPAL_READ_2(sc, sunscpal_icr), SUNSCPAL_ICR_BITS, buffer, sizeof(buffer)); 317 1.3.2.3 nathanw printf("sunscpal_dma_poll: done, icr=%s\n", buffer); 318 1.3.2.2 nathanw } 319 1.3.2.2 nathanw #endif 320 1.3.2.2 nathanw } 321 1.3.2.2 nathanw 322 1.3.2.2 nathanw static void 323 1.3.2.2 nathanw sunscpal_dma_stop(sc) 324 1.3.2.2 nathanw struct sunscpal_softc *sc; 325 1.3.2.2 nathanw { 326 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 327 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 328 1.3.2.2 nathanw int resid, ntrans; 329 1.3.2.2 nathanw u_int16_t icr; 330 1.3.2.2 nathanw 331 1.3.2.2 nathanw if ((sc->sc_state & SUNSCPAL_DOINGDMA) == 0) { 332 1.3.2.2 nathanw #ifdef DEBUG 333 1.3.2.2 nathanw printf("sunscpal_dma_stop: dma not running\n"); 334 1.3.2.2 nathanw #endif 335 1.3.2.2 nathanw return; 336 1.3.2.2 nathanw } 337 1.3.2.2 nathanw sc->sc_state &= ~SUNSCPAL_DOINGDMA; 338 1.3.2.2 nathanw 339 1.3.2.2 nathanw /* First, halt the DMA engine. */ 340 1.3.2.2 nathanw icr = SUNSCPAL_READ_2(sc, sunscpal_icr); 341 1.3.2.2 nathanw icr &= ~(SUNSCPAL_ICR_DMA_ENABLE | SUNSCPAL_ICR_WORD_MODE | SUNSCPAL_ICR_INTERRUPT_ENABLE); 342 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, icr); 343 1.3.2.2 nathanw 344 1.3.2.2 nathanw #ifdef SUNSCPAL_USE_BUS_DMA 345 1.3.2.2 nathanw /* 346 1.3.2.2 nathanw * XXX - this function is supposed to be independent of 347 1.3.2.2 nathanw * the host's DMA implementation. 348 1.3.2.2 nathanw */ 349 1.3.2.2 nathanw { 350 1.3.2.2 nathanw sunscpal_dma_handle_t dh = sr->sr_dma_hand; 351 1.3.2.2 nathanw 352 1.3.2.2 nathanw /* sync the DMA map: */ 353 1.3.2.2 nathanw bus_dmamap_sync(sc->sunscpal_dmat, dh->dh_dmamap, 0, dh->dh_maplen, 354 1.3.2.2 nathanw ((xs->xs_control & XS_CTL_DATA_OUT) == 0 ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE)); 355 1.3.2.2 nathanw } 356 1.3.2.2 nathanw #endif /* SUNSCPAL_USE_BUS_DMA */ 357 1.3.2.2 nathanw 358 1.3.2.2 nathanw 359 1.3.2.2 nathanw if (icr & (SUNSCPAL_ICR_BUS_ERROR)) { 360 1.3.2.3 nathanw char buffer[64]; 361 1.3.2.3 nathanw bitmask_snprintf(icr, SUNSCPAL_ICR_BITS, buffer, sizeof(buffer)); 362 1.3.2.3 nathanw printf("sc: DMA error, icr=%s, reset\n", buffer); 363 1.3.2.2 nathanw sr->sr_xs->error = XS_DRIVER_STUFFUP; 364 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 365 1.3.2.2 nathanw goto out; 366 1.3.2.2 nathanw } 367 1.3.2.2 nathanw 368 1.3.2.2 nathanw /* Note that timeout may have set the error flag. */ 369 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) 370 1.3.2.2 nathanw goto out; 371 1.3.2.2 nathanw 372 1.3.2.2 nathanw /* XXX: Wait for DMA to actually finish? */ 373 1.3.2.2 nathanw 374 1.3.2.2 nathanw /* 375 1.3.2.2 nathanw * Now try to figure out how much actually transferred 376 1.3.2.2 nathanw */ 377 1.3.2.2 nathanw 378 1.3.2.2 nathanw resid = SUNSCPAL_DMA_COUNT_FLIP(SUNSCPAL_READ_2(sc, sunscpal_dma_count)); 379 1.3.2.2 nathanw ntrans = sc->sc_reqlen - resid; 380 1.3.2.2 nathanw 381 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 382 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_DMA) { 383 1.3.2.2 nathanw printf("sunscpal_dma_stop: resid=0x%x ntrans=0x%x\n", 384 1.3.2.2 nathanw resid, ntrans); 385 1.3.2.2 nathanw } 386 1.3.2.2 nathanw #endif 387 1.3.2.2 nathanw 388 1.3.2.2 nathanw if (ntrans < sc->sc_min_dma_len) { 389 1.3.2.2 nathanw printf("sc: DMA count: 0x%x\n", resid); 390 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 391 1.3.2.2 nathanw goto out; 392 1.3.2.2 nathanw } 393 1.3.2.2 nathanw if (ntrans > sc->sc_datalen) 394 1.3.2.2 nathanw panic("sunscpal_dma_stop: excess transfer"); 395 1.3.2.2 nathanw 396 1.3.2.2 nathanw /* Adjust data pointer */ 397 1.3.2.2 nathanw sc->sc_dataptr += ntrans; 398 1.3.2.2 nathanw sc->sc_datalen -= ntrans; 399 1.3.2.2 nathanw 400 1.3.2.2 nathanw /* 401 1.3.2.2 nathanw * After a read, we may need to clean-up 402 1.3.2.2 nathanw * "Left-over bytes" (yuck!) 403 1.3.2.2 nathanw */ 404 1.3.2.2 nathanw if (((xs->xs_control & XS_CTL_DATA_OUT) == 0) && 405 1.3.2.2 nathanw ((icr & SUNSCPAL_ICR_ODD_LENGTH) != 0)) 406 1.3.2.2 nathanw { 407 1.3.2.2 nathanw #ifdef DEBUG 408 1.3.2.2 nathanw printf("sc: Got Left-over bytes!\n"); 409 1.3.2.2 nathanw #endif 410 1.3.2.2 nathanw *(sc->sc_dataptr++) = SUNSCPAL_READ_1(sc, sunscpal_data); 411 1.3.2.2 nathanw sc->sc_datalen--; 412 1.3.2.2 nathanw } 413 1.3.2.2 nathanw 414 1.3.2.2 nathanw out: 415 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_count, SUNSCPAL_DMA_COUNT_FLIP(0)); 416 1.3.2.2 nathanw 417 1.3.2.2 nathanw } 418 1.3.2.2 nathanw 419 1.3.2.2 nathanw /* Ask the target for a MSG_OUT phase. */ 420 1.3.2.2 nathanw static __inline void 421 1.3.2.2 nathanw sunscpal_sched_msgout(sc, msg_code) 422 1.3.2.2 nathanw struct sunscpal_softc *sc; 423 1.3.2.2 nathanw int msg_code; 424 1.3.2.2 nathanw { 425 1.3.2.2 nathanw /* 426 1.3.2.2 nathanw * This controller does not allow you to assert ATN, which 427 1.3.2.2 nathanw * will eventually leave us with no option other than to reset 428 1.3.2.2 nathanw * the bus. We keep this function as a placeholder, though, 429 1.3.2.2 nathanw * and this printf will eventually go away or get #ifdef'ed: 430 1.3.2.2 nathanw */ 431 1.3.2.2 nathanw printf("sunscpal_sched_msgout: trying to schedule 0x%0x\n", msg_code); 432 1.3.2.2 nathanw sc->sc_msgpriq |= msg_code; 433 1.3.2.2 nathanw } 434 1.3.2.2 nathanw 435 1.3.2.2 nathanw int 436 1.3.2.2 nathanw sunscpal_pio_out(sc, phase, count, data) 437 1.3.2.2 nathanw struct sunscpal_softc *sc; 438 1.3.2.2 nathanw int phase, count; 439 1.3.2.2 nathanw unsigned char *data; 440 1.3.2.2 nathanw { 441 1.3.2.2 nathanw int resid; 442 1.3.2.2 nathanw 443 1.3.2.2 nathanw resid = count; 444 1.3.2.2 nathanw while (resid > 0) { 445 1.3.2.2 nathanw if (!SUNSCPAL_BUSY(sc)) { 446 1.3.2.2 nathanw SUNSCPAL_TRACE("pio_out: lost BSY, resid=%d\n", resid); 447 1.3.2.2 nathanw break; 448 1.3.2.2 nathanw } 449 1.3.2.2 nathanw if (sunscpal_wait_req(sc)) { 450 1.3.2.2 nathanw SUNSCPAL_TRACE("pio_out: no REQ, resid=%d\n", resid); 451 1.3.2.2 nathanw break; 452 1.3.2.2 nathanw } 453 1.3.2.2 nathanw if (SUNSCPAL_BUS_PHASE(SUNSCPAL_READ_2(sc, sunscpal_icr)) != phase) 454 1.3.2.2 nathanw break; 455 1.3.2.2 nathanw 456 1.3.2.2 nathanw /* Put the data on the bus. */ 457 1.3.2.2 nathanw if (data) { 458 1.3.2.2 nathanw SUNSCPAL_BYTE_WRITE(sc, phase, *data++); 459 1.3.2.2 nathanw } else { 460 1.3.2.2 nathanw SUNSCPAL_BYTE_WRITE(sc, phase, 0); 461 1.3.2.2 nathanw } 462 1.3.2.2 nathanw 463 1.3.2.2 nathanw --resid; 464 1.3.2.2 nathanw } 465 1.3.2.2 nathanw 466 1.3.2.2 nathanw return (count - resid); 467 1.3.2.2 nathanw } 468 1.3.2.2 nathanw 469 1.3.2.2 nathanw 470 1.3.2.2 nathanw int 471 1.3.2.2 nathanw sunscpal_pio_in(sc, phase, count, data) 472 1.3.2.2 nathanw struct sunscpal_softc *sc; 473 1.3.2.2 nathanw int phase, count; 474 1.3.2.2 nathanw unsigned char *data; 475 1.3.2.2 nathanw { 476 1.3.2.2 nathanw int resid; 477 1.3.2.2 nathanw 478 1.3.2.2 nathanw resid = count; 479 1.3.2.2 nathanw while (resid > 0) { 480 1.3.2.2 nathanw if (!SUNSCPAL_BUSY(sc)) { 481 1.3.2.2 nathanw SUNSCPAL_TRACE("pio_in: lost BSY, resid=%d\n", resid); 482 1.3.2.2 nathanw break; 483 1.3.2.2 nathanw } 484 1.3.2.2 nathanw if (sunscpal_wait_req(sc)) { 485 1.3.2.2 nathanw SUNSCPAL_TRACE("pio_in: no REQ, resid=%d\n", resid); 486 1.3.2.2 nathanw break; 487 1.3.2.2 nathanw } 488 1.3.2.2 nathanw /* A phase change is not valid until AFTER REQ rises! */ 489 1.3.2.2 nathanw if (SUNSCPAL_BUS_PHASE(SUNSCPAL_READ_2(sc, sunscpal_icr)) != phase) 490 1.3.2.2 nathanw break; 491 1.3.2.2 nathanw 492 1.3.2.2 nathanw /* Read the data bus. */ 493 1.3.2.2 nathanw if (data) 494 1.3.2.2 nathanw *data++ = SUNSCPAL_BYTE_READ(sc, phase); 495 1.3.2.2 nathanw else 496 1.3.2.2 nathanw (void) SUNSCPAL_BYTE_READ(sc, phase); 497 1.3.2.2 nathanw 498 1.3.2.2 nathanw --resid; 499 1.3.2.2 nathanw } 500 1.3.2.2 nathanw 501 1.3.2.2 nathanw return (count - resid); 502 1.3.2.2 nathanw } 503 1.3.2.2 nathanw 504 1.3.2.2 nathanw 505 1.3.2.2 nathanw void 506 1.3.2.2 nathanw sunscpal_init(sc) 507 1.3.2.2 nathanw struct sunscpal_softc *sc; 508 1.3.2.2 nathanw { 509 1.3.2.2 nathanw int i, j; 510 1.3.2.2 nathanw 511 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 512 1.3.2.2 nathanw sunscpal_debug_sc = sc; 513 1.3.2.2 nathanw #endif 514 1.3.2.2 nathanw 515 1.3.2.2 nathanw for (i = 0; i < SUNSCPAL_OPENINGS; i++) 516 1.3.2.2 nathanw sc->sc_ring[i].sr_xs = NULL; 517 1.3.2.2 nathanw for (i = 0; i < 8; i++) 518 1.3.2.2 nathanw for (j = 0; j < 8; j++) 519 1.3.2.2 nathanw sc->sc_matrix[i][j] = NULL; 520 1.3.2.2 nathanw 521 1.3.2.2 nathanw sc->sc_prevphase = SUNSCPAL_PHASE_INVALID; 522 1.3.2.2 nathanw sc->sc_state = SUNSCPAL_IDLE; 523 1.3.2.2 nathanw 524 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, 0); 525 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_addr_h, 0); 526 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_addr_l, 0); 527 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_count, SUNSCPAL_DMA_COUNT_FLIP(0)); 528 1.3.2.2 nathanw 529 1.3.2.2 nathanw SUNSCPAL_CLR_INTR(sc); 530 1.3.2.2 nathanw 531 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 532 1.3.2.2 nathanw if (sc->sc_intr_on) { 533 1.3.2.2 nathanw SUNSCPAL_TRACE("init: intr ON\n", 0); 534 1.3.2.2 nathanw sc->sc_intr_on(sc); 535 1.3.2.2 nathanw } 536 1.3.2.2 nathanw } 537 1.3.2.2 nathanw 538 1.3.2.2 nathanw 539 1.3.2.2 nathanw static void 540 1.3.2.2 nathanw sunscpal_reset_scsibus(sc) 541 1.3.2.2 nathanw struct sunscpal_softc *sc; 542 1.3.2.2 nathanw { 543 1.3.2.2 nathanw 544 1.3.2.2 nathanw SUNSCPAL_TRACE("reset_scsibus, cur=0x%x\n", 545 1.3.2.2 nathanw (long) sc->sc_current); 546 1.3.2.2 nathanw 547 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, SUNSCPAL_ICR_RESET); 548 1.3.2.2 nathanw delay(500); 549 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, 0); 550 1.3.2.2 nathanw 551 1.3.2.2 nathanw SUNSCPAL_CLR_INTR(sc); 552 1.3.2.2 nathanw /* XXX - Need long delay here! */ 553 1.3.2.2 nathanw delay(100000); 554 1.3.2.2 nathanw 555 1.3.2.2 nathanw /* XXX - Need to cancel disconnected requests. */ 556 1.3.2.2 nathanw } 557 1.3.2.2 nathanw 558 1.3.2.2 nathanw 559 1.3.2.2 nathanw /* 560 1.3.2.2 nathanw * Interrupt handler for the SCSI Bus Controller (SBC) 561 1.3.2.2 nathanw * This may also called for a DMA timeout (at splbio). 562 1.3.2.2 nathanw */ 563 1.3.2.2 nathanw int 564 1.3.2.2 nathanw sunscpal_intr(arg) 565 1.3.2.2 nathanw void *arg; 566 1.3.2.2 nathanw { 567 1.3.2.2 nathanw struct sunscpal_softc *sc = arg; 568 1.3.2.2 nathanw int claimed = 0; 569 1.3.2.2 nathanw 570 1.3.2.2 nathanw /* 571 1.3.2.2 nathanw * Do not touch SBC regs here unless sc_current == NULL 572 1.3.2.2 nathanw * or it will complain about "register conflict" errors. 573 1.3.2.2 nathanw * Instead, just let sunscpal_machine() deal with it. 574 1.3.2.2 nathanw */ 575 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: top, state=%d\n", sc->sc_state); 576 1.3.2.2 nathanw 577 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) { 578 1.3.2.2 nathanw /* 579 1.3.2.2 nathanw * Might be reselect. sunscpal_reselect() will check, 580 1.3.2.2 nathanw * and set up the connection if so. This will verify 581 1.3.2.2 nathanw * that sc_current == NULL at the beginning... 582 1.3.2.2 nathanw */ 583 1.3.2.2 nathanw 584 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 585 1.3.2.2 nathanw if (sc->sc_intr_off) { 586 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: for reselect, intr off\n", 0); 587 1.3.2.2 nathanw sc->sc_intr_off(sc); 588 1.3.2.2 nathanw } 589 1.3.2.2 nathanw 590 1.3.2.2 nathanw sunscpal_reselect(sc); 591 1.3.2.2 nathanw } 592 1.3.2.2 nathanw 593 1.3.2.2 nathanw /* 594 1.3.2.2 nathanw * The remaining documented interrupt causes are a DMA complete 595 1.3.2.2 nathanw * condition. 596 1.3.2.2 nathanw * 597 1.3.2.2 nathanw * The procedure is to let sunscpal_machine() figure out what 598 1.3.2.2 nathanw * to do next. 599 1.3.2.2 nathanw */ 600 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_WORKING) { 601 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: call machine, cur=0x%x\n", 602 1.3.2.2 nathanw (long) sc->sc_current); 603 1.3.2.2 nathanw /* This will usually free-up the nexus. */ 604 1.3.2.2 nathanw sunscpal_machine(sc); 605 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: machine done, cur=0x%x\n", 606 1.3.2.2 nathanw (long) sc->sc_current); 607 1.3.2.2 nathanw claimed = 1; 608 1.3.2.2 nathanw } 609 1.3.2.2 nathanw 610 1.3.2.2 nathanw /* Maybe we can run some commands now... */ 611 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) { 612 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: call sched, cur=0x%x\n", 613 1.3.2.2 nathanw (long) sc->sc_current); 614 1.3.2.2 nathanw sunscpal_sched(sc); 615 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: sched done, cur=0x%x\n", 616 1.3.2.2 nathanw (long) sc->sc_current); 617 1.3.2.2 nathanw } 618 1.3.2.2 nathanw 619 1.3.2.2 nathanw return claimed; 620 1.3.2.2 nathanw } 621 1.3.2.2 nathanw 622 1.3.2.2 nathanw 623 1.3.2.2 nathanw /* 624 1.3.2.2 nathanw * Abort the current command (i.e. due to timeout) 625 1.3.2.2 nathanw */ 626 1.3.2.2 nathanw void 627 1.3.2.2 nathanw sunscpal_abort(sc) 628 1.3.2.2 nathanw struct sunscpal_softc *sc; 629 1.3.2.2 nathanw { 630 1.3.2.2 nathanw 631 1.3.2.2 nathanw /* 632 1.3.2.2 nathanw * Finish it now. If DMA is in progress, we 633 1.3.2.2 nathanw * can not call sunscpal_sched_msgout() because 634 1.3.2.2 nathanw * that hits the SBC (avoid DMA conflict). 635 1.3.2.2 nathanw */ 636 1.3.2.2 nathanw 637 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 638 1.3.2.2 nathanw if (sc->sc_intr_off) { 639 1.3.2.2 nathanw SUNSCPAL_TRACE("abort: intr off\n", 0); 640 1.3.2.2 nathanw sc->sc_intr_off(sc); 641 1.3.2.2 nathanw } 642 1.3.2.2 nathanw 643 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 644 1.3.2.2 nathanw if ((sc->sc_state & SUNSCPAL_DOINGDMA) == 0) { 645 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 646 1.3.2.2 nathanw } 647 1.3.2.2 nathanw SUNSCPAL_TRACE("abort: call machine, cur=0x%x\n", 648 1.3.2.2 nathanw (long) sc->sc_current); 649 1.3.2.2 nathanw sunscpal_machine(sc); 650 1.3.2.2 nathanw SUNSCPAL_TRACE("abort: machine done, cur=0x%x\n", 651 1.3.2.2 nathanw (long) sc->sc_current); 652 1.3.2.2 nathanw 653 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 654 1.3.2.2 nathanw if (sc->sc_intr_on) { 655 1.3.2.2 nathanw SUNSCPAL_TRACE("abort: intr ON\n", 0); 656 1.3.2.2 nathanw sc->sc_intr_on(sc); 657 1.3.2.2 nathanw } 658 1.3.2.2 nathanw } 659 1.3.2.2 nathanw 660 1.3.2.2 nathanw /* 661 1.3.2.2 nathanw * Timeout handler, scheduled for each SCSI command. 662 1.3.2.2 nathanw */ 663 1.3.2.2 nathanw void 664 1.3.2.2 nathanw sunscpal_cmd_timeout(arg) 665 1.3.2.2 nathanw void *arg; 666 1.3.2.2 nathanw { 667 1.3.2.2 nathanw struct sunscpal_req *sr = arg; 668 1.3.2.2 nathanw struct scsipi_xfer *xs; 669 1.3.2.2 nathanw struct scsipi_periph *periph; 670 1.3.2.2 nathanw struct sunscpal_softc *sc; 671 1.3.2.2 nathanw int s; 672 1.3.2.2 nathanw 673 1.3.2.2 nathanw s = splbio(); 674 1.3.2.2 nathanw 675 1.3.2.2 nathanw /* Get all our variables... */ 676 1.3.2.2 nathanw xs = sr->sr_xs; 677 1.3.2.2 nathanw if (xs == NULL) { 678 1.3.2.2 nathanw printf("sunscpal_cmd_timeout: no scsipi_xfer\n"); 679 1.3.2.2 nathanw goto out; 680 1.3.2.2 nathanw } 681 1.3.2.2 nathanw periph = xs->xs_periph; 682 1.3.2.2 nathanw sc = (void *)periph->periph_channel->chan_adapter->adapt_dev; 683 1.3.2.2 nathanw 684 1.3.2.2 nathanw printf("%s: cmd timeout, targ=%d, lun=%d\n", 685 1.3.2.2 nathanw sc->sc_dev.dv_xname, 686 1.3.2.2 nathanw sr->sr_target, sr->sr_lun); 687 1.3.2.2 nathanw 688 1.3.2.2 nathanw /* 689 1.3.2.2 nathanw * Mark the overdue job as failed, and arrange for 690 1.3.2.2 nathanw * sunscpal_machine to terminate it. If the victim 691 1.3.2.2 nathanw * is the current job, call sunscpal_machine() now. 692 1.3.2.2 nathanw * Otherwise arrange for sunscpal_sched() to do it. 693 1.3.2.2 nathanw */ 694 1.3.2.2 nathanw sr->sr_flags |= SR_OVERDUE; 695 1.3.2.2 nathanw if (sc->sc_current == sr) { 696 1.3.2.2 nathanw SUNSCPAL_TRACE("cmd_tmo: call abort, sr=0x%x\n", (long) sr); 697 1.3.2.2 nathanw sunscpal_abort(sc); 698 1.3.2.2 nathanw } else { 699 1.3.2.2 nathanw /* 700 1.3.2.2 nathanw * The driver may be idle, or busy with another job. 701 1.3.2.2 nathanw * Arrange for sunscpal_sched() to do the deed. 702 1.3.2.2 nathanw */ 703 1.3.2.2 nathanw SUNSCPAL_TRACE("cmd_tmo: clear matrix, t/l=0x%02x\n", 704 1.3.2.2 nathanw (sr->sr_target << 4) | sr->sr_lun); 705 1.3.2.2 nathanw sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL; 706 1.3.2.2 nathanw } 707 1.3.2.2 nathanw 708 1.3.2.2 nathanw /* 709 1.3.2.2 nathanw * We may have aborted the current job, or may have 710 1.3.2.2 nathanw * already been idle. In either case, we should now 711 1.3.2.2 nathanw * be idle, so try to start another job. 712 1.3.2.2 nathanw */ 713 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) { 714 1.3.2.2 nathanw SUNSCPAL_TRACE("cmd_tmo: call sched, cur=0x%x\n", 715 1.3.2.2 nathanw (long) sc->sc_current); 716 1.3.2.2 nathanw sunscpal_sched(sc); 717 1.3.2.2 nathanw SUNSCPAL_TRACE("cmd_tmo: sched done, cur=0x%x\n", 718 1.3.2.2 nathanw (long) sc->sc_current); 719 1.3.2.2 nathanw } 720 1.3.2.2 nathanw 721 1.3.2.2 nathanw out: 722 1.3.2.2 nathanw splx(s); 723 1.3.2.2 nathanw } 724 1.3.2.2 nathanw 725 1.3.2.2 nathanw 726 1.3.2.2 nathanw /***************************************************************** 727 1.3.2.2 nathanw * Interface to higher level 728 1.3.2.2 nathanw *****************************************************************/ 729 1.3.2.2 nathanw 730 1.3.2.2 nathanw 731 1.3.2.2 nathanw /* 732 1.3.2.2 nathanw * Enter a new SCSI command into the "issue" queue, and 733 1.3.2.2 nathanw * if there is work to do, start it going. 734 1.3.2.2 nathanw * 735 1.3.2.2 nathanw * WARNING: This can be called recursively! 736 1.3.2.2 nathanw * (see comment in sunscpal_done) 737 1.3.2.2 nathanw */ 738 1.3.2.2 nathanw void 739 1.3.2.2 nathanw sunscpal_scsipi_request(chan, req, arg) 740 1.3.2.2 nathanw struct scsipi_channel *chan; 741 1.3.2.2 nathanw scsipi_adapter_req_t req; 742 1.3.2.2 nathanw void *arg; 743 1.3.2.2 nathanw { 744 1.3.2.2 nathanw struct scsipi_xfer *xs; 745 1.3.2.2 nathanw struct scsipi_periph *periph; 746 1.3.2.2 nathanw struct sunscpal_softc *sc = (void *)chan->chan_adapter->adapt_dev; 747 1.3.2.2 nathanw struct sunscpal_req *sr; 748 1.3.2.2 nathanw int s, i, flags; 749 1.3.2.2 nathanw 750 1.3.2.2 nathanw switch (req) { 751 1.3.2.2 nathanw case ADAPTER_REQ_RUN_XFER: 752 1.3.2.2 nathanw xs = arg; 753 1.3.2.2 nathanw periph = xs->xs_periph; 754 1.3.2.2 nathanw flags = xs->xs_control; 755 1.3.2.2 nathanw 756 1.3.2.2 nathanw if (sc->sc_flags & SUNSCPAL_FORCE_POLLING) 757 1.3.2.2 nathanw flags |= XS_CTL_POLL; 758 1.3.2.2 nathanw 759 1.3.2.2 nathanw if (flags & XS_CTL_DATA_UIO) 760 1.3.2.2 nathanw panic("sunscpal: scsi data uio requested"); 761 1.3.2.2 nathanw 762 1.3.2.2 nathanw s = splbio(); 763 1.3.2.2 nathanw 764 1.3.2.2 nathanw if (flags & XS_CTL_POLL) { 765 1.3.2.2 nathanw /* Terminate any current command. */ 766 1.3.2.2 nathanw sr = sc->sc_current; 767 1.3.2.2 nathanw if (sr) { 768 1.3.2.2 nathanw printf("%s: polled request aborting %d/%d\n", 769 1.3.2.2 nathanw sc->sc_dev.dv_xname, 770 1.3.2.2 nathanw sr->sr_target, sr->sr_lun); 771 1.3.2.2 nathanw sunscpal_abort(sc); 772 1.3.2.2 nathanw } 773 1.3.2.2 nathanw if (sc->sc_state != SUNSCPAL_IDLE) { 774 1.3.2.2 nathanw panic("sunscpal_scsi_cmd: polled request, abort failed"); 775 1.3.2.2 nathanw } 776 1.3.2.2 nathanw } 777 1.3.2.2 nathanw 778 1.3.2.2 nathanw /* 779 1.3.2.2 nathanw * Find lowest empty slot in ring buffer. 780 1.3.2.2 nathanw * XXX: What about "fairness" and cmd order? 781 1.3.2.2 nathanw */ 782 1.3.2.2 nathanw for (i = 0; i < SUNSCPAL_OPENINGS; i++) 783 1.3.2.2 nathanw if (sc->sc_ring[i].sr_xs == NULL) 784 1.3.2.2 nathanw goto new; 785 1.3.2.2 nathanw 786 1.3.2.2 nathanw xs->error = XS_RESOURCE_SHORTAGE; 787 1.3.2.2 nathanw SUNSCPAL_TRACE("scsipi_cmd: no openings, rv=%d\n", rv); 788 1.3.2.2 nathanw goto out; 789 1.3.2.2 nathanw 790 1.3.2.2 nathanw new: 791 1.3.2.2 nathanw /* Create queue entry */ 792 1.3.2.2 nathanw sr = &sc->sc_ring[i]; 793 1.3.2.2 nathanw sr->sr_xs = xs; 794 1.3.2.2 nathanw sr->sr_target = xs->xs_periph->periph_target; 795 1.3.2.2 nathanw sr->sr_lun = xs->xs_periph->periph_lun; 796 1.3.2.2 nathanw sr->sr_dma_hand = NULL; 797 1.3.2.2 nathanw sr->sr_dataptr = xs->data; 798 1.3.2.2 nathanw sr->sr_datalen = xs->datalen; 799 1.3.2.2 nathanw sr->sr_flags = (flags & XS_CTL_POLL) ? SR_IMMED : 0; 800 1.3.2.2 nathanw sr->sr_status = -1; /* no value */ 801 1.3.2.2 nathanw sc->sc_ncmds++; 802 1.3.2.2 nathanw 803 1.3.2.2 nathanw SUNSCPAL_TRACE("scsipi_cmd: new sr=0x%x\n", (long)sr); 804 1.3.2.2 nathanw 805 1.3.2.2 nathanw if (flags & XS_CTL_POLL) { 806 1.3.2.2 nathanw /* Force this new command to be next. */ 807 1.3.2.2 nathanw sc->sc_rr = i; 808 1.3.2.2 nathanw } 809 1.3.2.2 nathanw 810 1.3.2.2 nathanw /* 811 1.3.2.2 nathanw * If we were idle, run some commands... 812 1.3.2.2 nathanw */ 813 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) { 814 1.3.2.2 nathanw SUNSCPAL_TRACE("scsipi_cmd: call sched, cur=0x%x\n", 815 1.3.2.2 nathanw (long) sc->sc_current); 816 1.3.2.2 nathanw sunscpal_sched(sc); 817 1.3.2.2 nathanw SUNSCPAL_TRACE("scsipi_cmd: sched done, cur=0x%x\n", 818 1.3.2.2 nathanw (long) sc->sc_current); 819 1.3.2.2 nathanw } 820 1.3.2.2 nathanw 821 1.3.2.2 nathanw if (flags & XS_CTL_POLL) { 822 1.3.2.2 nathanw /* Make sure sunscpal_sched() finished it. */ 823 1.3.2.2 nathanw if ((xs->xs_status & XS_STS_DONE) == 0) 824 1.3.2.2 nathanw panic("sunscpal_scsi_cmd: poll didn't finish"); 825 1.3.2.2 nathanw } 826 1.3.2.2 nathanw 827 1.3.2.2 nathanw out: 828 1.3.2.2 nathanw splx(s); 829 1.3.2.2 nathanw return; 830 1.3.2.3 nathanw 831 1.3.2.2 nathanw case ADAPTER_REQ_GROW_RESOURCES: 832 1.3.2.3 nathanw /* XXX Not supported. */ 833 1.3.2.3 nathanw return; 834 1.3.2.3 nathanw 835 1.3.2.2 nathanw case ADAPTER_REQ_SET_XFER_MODE: 836 1.3.2.3 nathanw { 837 1.3.2.3 nathanw /* 838 1.3.2.3 nathanw * We don't support Sync, Wide, or Tagged Queueing. 839 1.3.2.3 nathanw * Just callback now, to report this. 840 1.3.2.3 nathanw */ 841 1.3.2.3 nathanw struct scsipi_xfer_mode *xm = arg; 842 1.3.2.3 nathanw 843 1.3.2.3 nathanw xm->xm_mode = 0; 844 1.3.2.3 nathanw xm->xm_period = 0; 845 1.3.2.3 nathanw xm->xm_offset = 0; 846 1.3.2.3 nathanw scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm); 847 1.3.2.2 nathanw return; 848 1.3.2.3 nathanw } 849 1.3.2.2 nathanw } 850 1.3.2.2 nathanw } 851 1.3.2.2 nathanw 852 1.3.2.2 nathanw 853 1.3.2.2 nathanw /* 854 1.3.2.2 nathanw * POST PROCESSING OF SCSI_CMD (usually current) 855 1.3.2.2 nathanw * Called by sunscpal_sched(), sunscpal_machine() 856 1.3.2.2 nathanw */ 857 1.3.2.2 nathanw static void 858 1.3.2.2 nathanw sunscpal_done(sc) 859 1.3.2.2 nathanw struct sunscpal_softc *sc; 860 1.3.2.2 nathanw { 861 1.3.2.2 nathanw struct sunscpal_req *sr; 862 1.3.2.2 nathanw struct scsipi_xfer *xs; 863 1.3.2.2 nathanw 864 1.3.2.2 nathanw #ifdef DIAGNOSTIC 865 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) 866 1.3.2.2 nathanw panic("sunscpal_done: state=idle"); 867 1.3.2.2 nathanw if (sc->sc_current == NULL) 868 1.3.2.2 nathanw panic("sunscpal_done: current=0"); 869 1.3.2.2 nathanw #endif 870 1.3.2.2 nathanw 871 1.3.2.2 nathanw sr = sc->sc_current; 872 1.3.2.2 nathanw xs = sr->sr_xs; 873 1.3.2.2 nathanw 874 1.3.2.2 nathanw SUNSCPAL_TRACE("done: top, cur=0x%x\n", (long) sc->sc_current); 875 1.3.2.2 nathanw 876 1.3.2.2 nathanw /* 877 1.3.2.2 nathanw * Clean up DMA resources for this command. 878 1.3.2.2 nathanw */ 879 1.3.2.2 nathanw if (sr->sr_dma_hand) { 880 1.3.2.2 nathanw SUNSCPAL_TRACE("done: dma_free, dh=0x%x\n", 881 1.3.2.2 nathanw (long) sr->sr_dma_hand); 882 1.3.2.2 nathanw sunscpal_dma_free(sc); 883 1.3.2.2 nathanw } 884 1.3.2.2 nathanw #ifdef DIAGNOSTIC 885 1.3.2.2 nathanw if (sr->sr_dma_hand) 886 1.3.2.2 nathanw panic("sunscpal_done: dma free did not"); 887 1.3.2.2 nathanw #endif 888 1.3.2.2 nathanw 889 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) { 890 1.3.2.2 nathanw SUNSCPAL_TRACE("done: aborting, error=%d\n", xs->error); 891 1.3.2.2 nathanw if (xs->error == XS_NOERROR) 892 1.3.2.2 nathanw xs->error = XS_TIMEOUT; 893 1.3.2.2 nathanw } 894 1.3.2.2 nathanw 895 1.3.2.2 nathanw SUNSCPAL_TRACE("done: check error=%d\n", (long) xs->error); 896 1.3.2.2 nathanw 897 1.3.2.2 nathanw /* If error is already set, ignore sr_status value. */ 898 1.3.2.2 nathanw if (xs->error != XS_NOERROR) 899 1.3.2.2 nathanw goto finish; 900 1.3.2.2 nathanw 901 1.3.2.2 nathanw SUNSCPAL_TRACE("done: check status=%d\n", sr->sr_status); 902 1.3.2.2 nathanw 903 1.3.2.2 nathanw xs->status = sr->sr_status; 904 1.3.2.2 nathanw switch (sr->sr_status) { 905 1.3.2.2 nathanw case SCSI_OK: /* 0 */ 906 1.3.2.2 nathanw break; 907 1.3.2.2 nathanw 908 1.3.2.2 nathanw case SCSI_CHECK: 909 1.3.2.2 nathanw case SCSI_BUSY: 910 1.3.2.2 nathanw xs->error = XS_BUSY; 911 1.3.2.2 nathanw break; 912 1.3.2.2 nathanw 913 1.3.2.2 nathanw case -1: 914 1.3.2.2 nathanw /* This is our "impossible" initial value. */ 915 1.3.2.2 nathanw /* fallthrough */ 916 1.3.2.2 nathanw default: 917 1.3.2.2 nathanw printf("%s: target %d, bad status=%d\n", 918 1.3.2.2 nathanw sc->sc_dev.dv_xname, sr->sr_target, sr->sr_status); 919 1.3.2.2 nathanw xs->error = XS_DRIVER_STUFFUP; 920 1.3.2.2 nathanw break; 921 1.3.2.2 nathanw } 922 1.3.2.2 nathanw 923 1.3.2.2 nathanw finish: 924 1.3.2.2 nathanw 925 1.3.2.2 nathanw SUNSCPAL_TRACE("done: finish, error=%d\n", xs->error); 926 1.3.2.2 nathanw 927 1.3.2.2 nathanw /* 928 1.3.2.2 nathanw * Dequeue the finished command, but don't clear sc_state until 929 1.3.2.2 nathanw * after the call to scsipi_done(), because that may call back to 930 1.3.2.2 nathanw * sunscpal_scsi_cmd() - unwanted recursion! 931 1.3.2.2 nathanw * 932 1.3.2.2 nathanw * Keeping sc->sc_state != idle terminates the recursion. 933 1.3.2.2 nathanw */ 934 1.3.2.2 nathanw #ifdef DIAGNOSTIC 935 1.3.2.2 nathanw if ((sc->sc_state & SUNSCPAL_WORKING) == 0) 936 1.3.2.2 nathanw panic("sunscpal_done: bad state"); 937 1.3.2.2 nathanw #endif 938 1.3.2.2 nathanw 939 1.3.2.2 nathanw /* Clear our pointers to the request. */ 940 1.3.2.2 nathanw sc->sc_current = NULL; 941 1.3.2.2 nathanw sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL; 942 1.3.2.2 nathanw callout_stop(&sr->sr_xs->xs_callout); 943 1.3.2.2 nathanw 944 1.3.2.2 nathanw /* Make the request free. */ 945 1.3.2.2 nathanw sr->sr_xs = NULL; 946 1.3.2.2 nathanw sc->sc_ncmds--; 947 1.3.2.2 nathanw 948 1.3.2.2 nathanw /* Tell common SCSI code it is done. */ 949 1.3.2.2 nathanw scsipi_done(xs); 950 1.3.2.2 nathanw 951 1.3.2.2 nathanw sc->sc_state = SUNSCPAL_IDLE; 952 1.3.2.2 nathanw /* Now sunscpal_sched() may be called again. */ 953 1.3.2.2 nathanw } 954 1.3.2.2 nathanw 955 1.3.2.2 nathanw 956 1.3.2.2 nathanw /* 957 1.3.2.2 nathanw * Schedule a SCSI operation. This routine should return 958 1.3.2.2 nathanw * only after it achieves one of the following conditions: 959 1.3.2.2 nathanw * Busy (sc->sc_state != SUNSCPAL_IDLE) 960 1.3.2.2 nathanw * No more work can be started. 961 1.3.2.2 nathanw */ 962 1.3.2.2 nathanw static void 963 1.3.2.2 nathanw sunscpal_sched(sc) 964 1.3.2.2 nathanw struct sunscpal_softc *sc; 965 1.3.2.2 nathanw { 966 1.3.2.2 nathanw struct sunscpal_req *sr; 967 1.3.2.2 nathanw struct scsipi_xfer *xs; 968 1.3.2.2 nathanw int target = 0, lun = 0; 969 1.3.2.2 nathanw int error, i; 970 1.3.2.2 nathanw 971 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 972 1.3.2.2 nathanw if (sc->sc_intr_off) { 973 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: top, intr off\n", 0); 974 1.3.2.2 nathanw sc->sc_intr_off(sc); 975 1.3.2.2 nathanw } 976 1.3.2.2 nathanw 977 1.3.2.2 nathanw next_job: 978 1.3.2.2 nathanw /* 979 1.3.2.2 nathanw * Grab the next job from queue. Must be idle. 980 1.3.2.2 nathanw */ 981 1.3.2.2 nathanw #ifdef DIAGNOSTIC 982 1.3.2.2 nathanw if (sc->sc_state != SUNSCPAL_IDLE) 983 1.3.2.2 nathanw panic("sunscpal_sched: not idle"); 984 1.3.2.2 nathanw if (sc->sc_current) 985 1.3.2.2 nathanw panic("sunscpal_sched: current set"); 986 1.3.2.2 nathanw #endif 987 1.3.2.2 nathanw 988 1.3.2.2 nathanw /* 989 1.3.2.2 nathanw * Always start the search where we last looked. 990 1.3.2.2 nathanw */ 991 1.3.2.2 nathanw i = sc->sc_rr; 992 1.3.2.2 nathanw sr = NULL; 993 1.3.2.2 nathanw do { 994 1.3.2.2 nathanw if (sc->sc_ring[i].sr_xs) { 995 1.3.2.2 nathanw target = sc->sc_ring[i].sr_target; 996 1.3.2.2 nathanw lun = sc->sc_ring[i].sr_lun; 997 1.3.2.2 nathanw if (sc->sc_matrix[target][lun] == NULL) { 998 1.3.2.2 nathanw /* 999 1.3.2.2 nathanw * Do not mark the target/LUN busy yet, 1000 1.3.2.2 nathanw * because reselect may cause some other 1001 1.3.2.2 nathanw * job to become the current one, so we 1002 1.3.2.2 nathanw * might not actually start this job. 1003 1.3.2.2 nathanw * Instead, set sc_matrix later on. 1004 1.3.2.2 nathanw */ 1005 1.3.2.2 nathanw sc->sc_rr = i; 1006 1.3.2.2 nathanw sr = &sc->sc_ring[i]; 1007 1.3.2.2 nathanw break; 1008 1.3.2.2 nathanw } 1009 1.3.2.2 nathanw } 1010 1.3.2.2 nathanw i++; 1011 1.3.2.2 nathanw if (i == SUNSCPAL_OPENINGS) 1012 1.3.2.2 nathanw i = 0; 1013 1.3.2.2 nathanw } while (i != sc->sc_rr); 1014 1.3.2.2 nathanw 1015 1.3.2.2 nathanw if (sr == NULL) { 1016 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: no work, cur=0x%x\n", 1017 1.3.2.2 nathanw (long) sc->sc_current); 1018 1.3.2.2 nathanw 1019 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 1020 1.3.2.2 nathanw if (sc->sc_intr_on) { 1021 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: ret, intr ON\n", 0); 1022 1.3.2.2 nathanw sc->sc_intr_on(sc); 1023 1.3.2.2 nathanw } 1024 1.3.2.2 nathanw 1025 1.3.2.2 nathanw return; /* No more work to do. */ 1026 1.3.2.2 nathanw } 1027 1.3.2.2 nathanw 1028 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: select for t/l=0x%02x\n", 1029 1.3.2.2 nathanw (sr->sr_target << 4) | sr->sr_lun); 1030 1.3.2.2 nathanw 1031 1.3.2.2 nathanw sc->sc_state = SUNSCPAL_WORKING; 1032 1.3.2.2 nathanw error = sunscpal_select(sc, sr); 1033 1.3.2.2 nathanw if (sc->sc_current) { 1034 1.3.2.2 nathanw /* Lost the race! reselected out from under us! */ 1035 1.3.2.2 nathanw /* Work with the reselected job. */ 1036 1.3.2.2 nathanw if (sr->sr_flags & SR_IMMED) { 1037 1.3.2.2 nathanw printf("%s: reselected while polling (abort)\n", 1038 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1039 1.3.2.2 nathanw /* Abort the reselected job. */ 1040 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1041 1.3.2.2 nathanw sc->sc_msgpriq |= SEND_ABORT; 1042 1.3.2.2 nathanw } 1043 1.3.2.2 nathanw sr = sc->sc_current; 1044 1.3.2.2 nathanw xs = sr->sr_xs; 1045 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: reselect, new sr=0x%x\n", (long)sr); 1046 1.3.2.2 nathanw goto have_nexus; 1047 1.3.2.2 nathanw } 1048 1.3.2.2 nathanw 1049 1.3.2.2 nathanw /* Normal selection result. Target/LUN is now busy. */ 1050 1.3.2.2 nathanw sc->sc_matrix[target][lun] = sr; 1051 1.3.2.2 nathanw sc->sc_current = sr; /* connected */ 1052 1.3.2.2 nathanw xs = sr->sr_xs; 1053 1.3.2.2 nathanw 1054 1.3.2.2 nathanw /* 1055 1.3.2.2 nathanw * Initialize pointers, etc. for this job 1056 1.3.2.2 nathanw */ 1057 1.3.2.2 nathanw sc->sc_dataptr = sr->sr_dataptr; 1058 1.3.2.2 nathanw sc->sc_datalen = sr->sr_datalen; 1059 1.3.2.2 nathanw sc->sc_prevphase = SUNSCPAL_PHASE_INVALID; 1060 1.3.2.2 nathanw sc->sc_msgpriq = SEND_IDENTIFY; 1061 1.3.2.2 nathanw sc->sc_msgoutq = 0; 1062 1.3.2.2 nathanw sc->sc_msgout = 0; 1063 1.3.2.2 nathanw 1064 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: select rv=%d\n", error); 1065 1.3.2.2 nathanw 1066 1.3.2.2 nathanw switch (error) { 1067 1.3.2.2 nathanw case XS_NOERROR: 1068 1.3.2.2 nathanw break; 1069 1.3.2.2 nathanw 1070 1.3.2.2 nathanw case XS_BUSY: 1071 1.3.2.2 nathanw /* XXX - Reset and try again. */ 1072 1.3.2.2 nathanw printf("%s: select found SCSI bus busy, resetting...\n", 1073 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1074 1.3.2.2 nathanw sunscpal_reset_scsibus(sc); 1075 1.3.2.2 nathanw /* fallthrough */ 1076 1.3.2.2 nathanw case XS_SELTIMEOUT: 1077 1.3.2.2 nathanw default: 1078 1.3.2.2 nathanw xs->error = error; /* from select */ 1079 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: call done, sr=0x%x\n", (long)sr); 1080 1.3.2.2 nathanw sunscpal_done(sc); 1081 1.3.2.2 nathanw 1082 1.3.2.2 nathanw /* Paranoia: clear everything. */ 1083 1.3.2.2 nathanw sc->sc_dataptr = NULL; 1084 1.3.2.2 nathanw sc->sc_datalen = 0; 1085 1.3.2.2 nathanw sc->sc_prevphase = SUNSCPAL_PHASE_INVALID; 1086 1.3.2.2 nathanw sc->sc_msgpriq = 0; 1087 1.3.2.2 nathanw sc->sc_msgoutq = 0; 1088 1.3.2.2 nathanw sc->sc_msgout = 0; 1089 1.3.2.2 nathanw 1090 1.3.2.2 nathanw goto next_job; 1091 1.3.2.2 nathanw } 1092 1.3.2.2 nathanw 1093 1.3.2.2 nathanw /* 1094 1.3.2.2 nathanw * Selection was successful. Normally, this means 1095 1.3.2.2 nathanw * we are starting a new command. However, this 1096 1.3.2.2 nathanw * might be the termination of an overdue job. 1097 1.3.2.2 nathanw */ 1098 1.3.2.2 nathanw if (sr->sr_flags & SR_OVERDUE) { 1099 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: overdue, sr=0x%x\n", (long)sr); 1100 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1101 1.3.2.2 nathanw sc->sc_msgpriq |= SEND_ABORT; 1102 1.3.2.2 nathanw goto have_nexus; 1103 1.3.2.2 nathanw } 1104 1.3.2.2 nathanw 1105 1.3.2.2 nathanw /* 1106 1.3.2.2 nathanw * OK, we are starting a new command. 1107 1.3.2.2 nathanw * Initialize and allocate resources for the new command. 1108 1.3.2.2 nathanw * Device reset is special (only uses MSG_OUT phase). 1109 1.3.2.2 nathanw * Normal commands start in MSG_OUT phase where we will 1110 1.3.2.2 nathanw * send and IDENDIFY message, and then expect CMD phase. 1111 1.3.2.2 nathanw */ 1112 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 1113 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_CMDS) { 1114 1.3.2.2 nathanw printf("sunscpal_sched: begin, target=%d, LUN=%d\n", 1115 1.3.2.2 nathanw xs->xs_periph->periph_target, xs->xs_periph->periph_lun); 1116 1.3.2.2 nathanw sunscpal_show_scsi_cmd(xs); 1117 1.3.2.2 nathanw } 1118 1.3.2.2 nathanw #endif 1119 1.3.2.2 nathanw if (xs->xs_control & XS_CTL_RESET) { 1120 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: cmd=reset, sr=0x%x\n", (long)sr); 1121 1.3.2.2 nathanw /* Not an error, so do not set SUNSCPAL_ABORTING */ 1122 1.3.2.2 nathanw sc->sc_msgpriq |= SEND_DEV_RESET; 1123 1.3.2.2 nathanw goto have_nexus; 1124 1.3.2.2 nathanw } 1125 1.3.2.2 nathanw 1126 1.3.2.2 nathanw #ifdef DIAGNOSTIC 1127 1.3.2.2 nathanw if ((xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) == 0) { 1128 1.3.2.2 nathanw if (sc->sc_dataptr) { 1129 1.3.2.2 nathanw printf("%s: ptr but no data in/out flags?\n", 1130 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1131 1.3.2.2 nathanw SUNSCPAL_BREAK(); 1132 1.3.2.2 nathanw sc->sc_dataptr = NULL; 1133 1.3.2.2 nathanw } 1134 1.3.2.2 nathanw } 1135 1.3.2.2 nathanw #endif 1136 1.3.2.2 nathanw 1137 1.3.2.2 nathanw /* Allocate DMA space (maybe) */ 1138 1.3.2.2 nathanw if (sc->sc_dataptr && (sc->sc_flags & SUNSCPAL_DISABLE_DMA) == 0 && 1139 1.3.2.2 nathanw (sc->sc_datalen >= sc->sc_min_dma_len)) 1140 1.3.2.2 nathanw { 1141 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: dma_alloc, len=%d\n", sc->sc_datalen); 1142 1.3.2.2 nathanw sunscpal_dma_alloc(sc); 1143 1.3.2.2 nathanw } 1144 1.3.2.2 nathanw 1145 1.3.2.2 nathanw /* 1146 1.3.2.2 nathanw * Initialization hook called just after select, 1147 1.3.2.2 nathanw * at the beginning of COMMAND phase. 1148 1.3.2.2 nathanw * (but AFTER the DMA allocation is done) 1149 1.3.2.2 nathanw * 1150 1.3.2.2 nathanw * We need to set up the DMA engine BEFORE the target puts 1151 1.3.2.2 nathanw * the SCSI bus into any DATA phase. 1152 1.3.2.2 nathanw */ 1153 1.3.2.2 nathanw if (sr->sr_dma_hand) { 1154 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: dma_setup, dh=0x%x\n", 1155 1.3.2.2 nathanw (long) sr->sr_dma_hand); 1156 1.3.2.2 nathanw sunscpal_dma_setup(sc); 1157 1.3.2.2 nathanw } 1158 1.3.2.2 nathanw 1159 1.3.2.2 nathanw /* 1160 1.3.2.2 nathanw * Schedule a timeout for the job we are starting. 1161 1.3.2.2 nathanw */ 1162 1.3.2.2 nathanw if ((sr->sr_flags & SR_IMMED) == 0) { 1163 1.3.2.2 nathanw i = (xs->timeout * hz) / 1000; 1164 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: set timeout=%d\n", i); 1165 1.3.2.2 nathanw callout_reset(&sr->sr_xs->xs_callout, i, 1166 1.3.2.2 nathanw sunscpal_cmd_timeout, sr); 1167 1.3.2.2 nathanw } 1168 1.3.2.2 nathanw 1169 1.3.2.2 nathanw have_nexus: 1170 1.3.2.2 nathanw 1171 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: call machine, cur=0x%x\n", 1172 1.3.2.2 nathanw (long) sc->sc_current); 1173 1.3.2.2 nathanw sunscpal_machine(sc); 1174 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: machine done, cur=0x%x\n", 1175 1.3.2.2 nathanw (long) sc->sc_current); 1176 1.3.2.2 nathanw 1177 1.3.2.2 nathanw /* 1178 1.3.2.2 nathanw * What state did sunscpal_machine() leave us in? 1179 1.3.2.2 nathanw * Hopefully it sometimes completes a job... 1180 1.3.2.2 nathanw */ 1181 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) 1182 1.3.2.2 nathanw goto next_job; 1183 1.3.2.2 nathanw 1184 1.3.2.2 nathanw return; /* Have work in progress. */ 1185 1.3.2.2 nathanw } 1186 1.3.2.2 nathanw 1187 1.3.2.2 nathanw 1188 1.3.2.2 nathanw /* 1189 1.3.2.2 nathanw * Reselect handler: checks for reselection, and if we are being 1190 1.3.2.2 nathanw * reselected, it sets up sc->sc_current. 1191 1.3.2.2 nathanw * 1192 1.3.2.2 nathanw * We are reselected when: 1193 1.3.2.2 nathanw * SEL is TRUE 1194 1.3.2.2 nathanw * IO is TRUE 1195 1.3.2.2 nathanw * BSY is FALSE 1196 1.3.2.2 nathanw */ 1197 1.3.2.2 nathanw void 1198 1.3.2.2 nathanw sunscpal_reselect(sc) 1199 1.3.2.2 nathanw struct sunscpal_softc *sc; 1200 1.3.2.2 nathanw { 1201 1.3.2.2 nathanw /* 1202 1.3.2.2 nathanw * This controller does not implement disconnect/reselect, so 1203 1.3.2.2 nathanw * we really don't have anything to do here. We keep this 1204 1.3.2.2 nathanw * function as a placeholder, though. 1205 1.3.2.2 nathanw */ 1206 1.3.2.2 nathanw } 1207 1.3.2.2 nathanw 1208 1.3.2.2 nathanw /* 1209 1.3.2.2 nathanw * Select target: xs is the transfer that we are selecting for. 1210 1.3.2.2 nathanw * sc->sc_current should be NULL. 1211 1.3.2.2 nathanw * 1212 1.3.2.2 nathanw * Returns: 1213 1.3.2.2 nathanw * sc->sc_current != NULL ==> we were reselected (race!) 1214 1.3.2.2 nathanw * XS_NOERROR ==> selection worked 1215 1.3.2.2 nathanw * XS_BUSY ==> lost arbitration 1216 1.3.2.2 nathanw * XS_SELTIMEOUT ==> no response to selection 1217 1.3.2.2 nathanw */ 1218 1.3.2.2 nathanw static int 1219 1.3.2.2 nathanw sunscpal_select(sc, sr) 1220 1.3.2.2 nathanw struct sunscpal_softc *sc; 1221 1.3.2.2 nathanw struct sunscpal_req *sr; 1222 1.3.2.2 nathanw { 1223 1.3.2.2 nathanw int timo, target_mask; 1224 1.3.2.2 nathanw u_short mode; 1225 1.3.2.2 nathanw 1226 1.3.2.2 nathanw /* Check for reselect */ 1227 1.3.2.2 nathanw sunscpal_reselect(sc); 1228 1.3.2.2 nathanw if (sc->sc_current) { 1229 1.3.2.2 nathanw SUNSCPAL_TRACE("select: reselect, cur=0x%x\n", 1230 1.3.2.2 nathanw (long) sc->sc_current); 1231 1.3.2.2 nathanw return XS_BUSY; /* reselected */ 1232 1.3.2.2 nathanw } 1233 1.3.2.2 nathanw 1234 1.3.2.2 nathanw /* 1235 1.3.2.2 nathanw * Select the target. 1236 1.3.2.2 nathanw */ 1237 1.3.2.2 nathanw target_mask = (1 << sr->sr_target); 1238 1.3.2.2 nathanw SUNSCPAL_WRITE_1(sc, sunscpal_data, target_mask); 1239 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, SUNSCPAL_ICR_SELECT); 1240 1.3.2.2 nathanw 1241 1.3.2.2 nathanw /* 1242 1.3.2.2 nathanw * Wait for the target to assert BSY. 1243 1.3.2.2 nathanw * SCSI spec. says wait for 250 mS. 1244 1.3.2.2 nathanw */ 1245 1.3.2.2 nathanw for (timo = 25000;;) { 1246 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_BUSY) 1247 1.3.2.2 nathanw goto success; 1248 1.3.2.2 nathanw if (--timo <= 0) 1249 1.3.2.2 nathanw break; 1250 1.3.2.2 nathanw delay(10); 1251 1.3.2.2 nathanw } 1252 1.3.2.2 nathanw 1253 1.3.2.2 nathanw SUNSCPAL_WRITE_1(sc, sunscpal_data, 0); 1254 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, 0); 1255 1.3.2.2 nathanw 1256 1.3.2.2 nathanw SUNSCPAL_TRACE("select: device down, rc=%d\n", XS_SELTIMEOUT); 1257 1.3.2.2 nathanw return XS_SELTIMEOUT; 1258 1.3.2.2 nathanw 1259 1.3.2.2 nathanw success: 1260 1.3.2.2 nathanw 1261 1.3.2.2 nathanw /* 1262 1.3.2.2 nathanw * The target is now driving BSY, so we can stop 1263 1.3.2.2 nathanw * driving SEL and the data bus. We do set up 1264 1.3.2.2 nathanw * whether or not this target needs parity. 1265 1.3.2.2 nathanw */ 1266 1.3.2.2 nathanw mode = 0; 1267 1.3.2.2 nathanw if ((sc->sc_parity_disable & target_mask) == 0) 1268 1.3.2.2 nathanw mode |= SUNSCPAL_ICR_PARITY_ENABLE; 1269 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, mode); 1270 1.3.2.2 nathanw 1271 1.3.2.2 nathanw return XS_NOERROR; 1272 1.3.2.2 nathanw } 1273 1.3.2.2 nathanw 1274 1.3.2.2 nathanw /***************************************************************** 1275 1.3.2.2 nathanw * Functions to handle each info. transfer phase: 1276 1.3.2.2 nathanw *****************************************************************/ 1277 1.3.2.2 nathanw 1278 1.3.2.2 nathanw /* 1279 1.3.2.2 nathanw * The message system: 1280 1.3.2.2 nathanw * 1281 1.3.2.2 nathanw * This is a revamped message system that now should easier accomodate 1282 1.3.2.2 nathanw * new messages, if necessary. 1283 1.3.2.2 nathanw * 1284 1.3.2.2 nathanw * Currently we accept these messages: 1285 1.3.2.2 nathanw * IDENTIFY (when reselecting) 1286 1.3.2.2 nathanw * COMMAND COMPLETE # (expect bus free after messages marked #) 1287 1.3.2.2 nathanw * NOOP 1288 1.3.2.2 nathanw * MESSAGE REJECT 1289 1.3.2.2 nathanw * SYNCHRONOUS DATA TRANSFER REQUEST 1290 1.3.2.2 nathanw * SAVE DATA POINTER 1291 1.3.2.2 nathanw * RESTORE POINTERS 1292 1.3.2.2 nathanw * DISCONNECT # 1293 1.3.2.2 nathanw * 1294 1.3.2.2 nathanw * We may send these messages in prioritized order: 1295 1.3.2.2 nathanw * BUS DEVICE RESET # if XS_CTL_RESET & xs->xs_control (or in 1296 1.3.2.2 nathanw * weird sits.) 1297 1.3.2.2 nathanw * MESSAGE PARITY ERROR par. err. during MSGI 1298 1.3.2.2 nathanw * MESSAGE REJECT If we get a message we don't know how to handle 1299 1.3.2.2 nathanw * ABORT # send on errors 1300 1.3.2.2 nathanw * INITIATOR DETECTED ERROR also on errors (SCSI2) (during info xfer) 1301 1.3.2.2 nathanw * IDENTIFY At the start of each transfer 1302 1.3.2.2 nathanw * SYNCHRONOUS DATA TRANSFER REQUEST if appropriate 1303 1.3.2.2 nathanw * NOOP if nothing else fits the bill ... 1304 1.3.2.2 nathanw */ 1305 1.3.2.2 nathanw 1306 1.3.2.2 nathanw /* 1307 1.3.2.2 nathanw * Precondition: 1308 1.3.2.2 nathanw * The SCSI bus is already in the MSGI phase and there is a message byte 1309 1.3.2.2 nathanw * on the bus, along with an asserted REQ signal. 1310 1.3.2.2 nathanw * 1311 1.3.2.2 nathanw * Our return value determines whether our caller, sunscpal_machine() 1312 1.3.2.2 nathanw * will expect to see another REQ (and possibly phase change). 1313 1.3.2.2 nathanw */ 1314 1.3.2.2 nathanw static int 1315 1.3.2.2 nathanw sunscpal_msg_in(sc) 1316 1.3.2.2 nathanw struct sunscpal_softc *sc; 1317 1.3.2.2 nathanw { 1318 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 1319 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 1320 1.3.2.2 nathanw int n, phase; 1321 1.3.2.2 nathanw int act_flags; 1322 1.3.2.2 nathanw 1323 1.3.2.2 nathanw act_flags = ACT_CONTINUE; 1324 1.3.2.2 nathanw 1325 1.3.2.2 nathanw if (sc->sc_prevphase == SUNSCPAL_PHASE_MSG_IN) { 1326 1.3.2.2 nathanw /* This is a continuation of the previous message. */ 1327 1.3.2.2 nathanw n = sc->sc_imp - sc->sc_imess; 1328 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: continuation, n=%d\n", n); 1329 1.3.2.2 nathanw goto nextbyte; 1330 1.3.2.2 nathanw } 1331 1.3.2.2 nathanw 1332 1.3.2.2 nathanw /* This is a new MESSAGE IN phase. Clean up our state. */ 1333 1.3.2.2 nathanw sc->sc_state &= ~SUNSCPAL_DROP_MSGIN; 1334 1.3.2.2 nathanw 1335 1.3.2.2 nathanw nextmsg: 1336 1.3.2.2 nathanw n = 0; 1337 1.3.2.2 nathanw sc->sc_imp = &sc->sc_imess[n]; 1338 1.3.2.2 nathanw 1339 1.3.2.2 nathanw nextbyte: 1340 1.3.2.2 nathanw /* 1341 1.3.2.2 nathanw * Read a whole message, but don't ack the last byte. If we reject the 1342 1.3.2.2 nathanw * message, we have to assert ATN during the message transfer phase 1343 1.3.2.2 nathanw * itself. 1344 1.3.2.2 nathanw */ 1345 1.3.2.2 nathanw for (;;) { 1346 1.3.2.2 nathanw /* 1347 1.3.2.2 nathanw * Read a message byte. 1348 1.3.2.2 nathanw * First, check BSY, REQ, phase... 1349 1.3.2.2 nathanw */ 1350 1.3.2.2 nathanw if (!SUNSCPAL_BUSY(sc)) { 1351 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: lost BSY, n=%d\n", n); 1352 1.3.2.2 nathanw /* XXX - Assume the command completed? */ 1353 1.3.2.2 nathanw act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 1354 1.3.2.2 nathanw return (act_flags); 1355 1.3.2.2 nathanw } 1356 1.3.2.2 nathanw if (sunscpal_wait_req(sc)) { 1357 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: BSY but no REQ, n=%d\n", n); 1358 1.3.2.2 nathanw /* Just let sunscpal_machine() handle it... */ 1359 1.3.2.2 nathanw return (act_flags); 1360 1.3.2.2 nathanw } 1361 1.3.2.2 nathanw phase = SUNSCPAL_BUS_PHASE(SUNSCPAL_READ_2(sc, sunscpal_icr)); 1362 1.3.2.2 nathanw if (phase != SUNSCPAL_PHASE_MSG_IN) { 1363 1.3.2.2 nathanw /* 1364 1.3.2.2 nathanw * Target left MESSAGE IN, probably because it 1365 1.3.2.2 nathanw * a) noticed our ATN signal, or 1366 1.3.2.2 nathanw * b) ran out of messages. 1367 1.3.2.2 nathanw */ 1368 1.3.2.2 nathanw return (act_flags); 1369 1.3.2.2 nathanw } 1370 1.3.2.2 nathanw /* Still in MESSAGE IN phase, and REQ is asserted. */ 1371 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_PARITY_ERROR) { 1372 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_PARITY_ERROR); 1373 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_DROP_MSGIN; 1374 1.3.2.2 nathanw } 1375 1.3.2.2 nathanw 1376 1.3.2.2 nathanw /* Gather incoming message bytes if needed. */ 1377 1.3.2.2 nathanw if ((sc->sc_state & SUNSCPAL_DROP_MSGIN) == 0) { 1378 1.3.2.2 nathanw if (n >= SUNSCPAL_MAX_MSG_LEN) { 1379 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_REJECT); 1380 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_DROP_MSGIN; 1381 1.3.2.2 nathanw } else { 1382 1.3.2.2 nathanw *sc->sc_imp++ = SUNSCPAL_READ_1(sc, sunscpal_cmd_stat); 1383 1.3.2.2 nathanw n++; 1384 1.3.2.2 nathanw /* 1385 1.3.2.2 nathanw * This testing is suboptimal, but most 1386 1.3.2.2 nathanw * messages will be of the one byte variety, so 1387 1.3.2.2 nathanw * it should not affect performance 1388 1.3.2.2 nathanw * significantly. 1389 1.3.2.2 nathanw */ 1390 1.3.2.4 nathanw if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) 1391 1.3.2.2 nathanw goto have_msg; 1392 1.3.2.4 nathanw if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) 1393 1.3.2.2 nathanw goto have_msg; 1394 1.3.2.4 nathanw if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && 1395 1.3.2.2 nathanw n == sc->sc_imess[1] + 2) 1396 1.3.2.2 nathanw goto have_msg; 1397 1.3.2.2 nathanw } 1398 1.3.2.2 nathanw } 1399 1.3.2.2 nathanw 1400 1.3.2.2 nathanw /* 1401 1.3.2.2 nathanw * If we reach this spot we're either: 1402 1.3.2.2 nathanw * a) in the middle of a multi-byte message, or 1403 1.3.2.2 nathanw * b) dropping bytes. 1404 1.3.2.2 nathanw */ 1405 1.3.2.2 nathanw 1406 1.3.2.2 nathanw if (act_flags != ACT_CONTINUE) 1407 1.3.2.2 nathanw return (act_flags); 1408 1.3.2.2 nathanw 1409 1.3.2.2 nathanw /* back to nextbyte */ 1410 1.3.2.2 nathanw } 1411 1.3.2.2 nathanw 1412 1.3.2.2 nathanw have_msg: 1413 1.3.2.2 nathanw /* We now have a complete message. Parse it. */ 1414 1.3.2.2 nathanw 1415 1.3.2.2 nathanw switch (sc->sc_imess[0]) { 1416 1.3.2.2 nathanw case MSG_CMDCOMPLETE: 1417 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: CMDCOMPLETE\n", 0); 1418 1.3.2.2 nathanw /* Target is about to disconnect. */ 1419 1.3.2.2 nathanw act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 1420 1.3.2.2 nathanw break; 1421 1.3.2.2 nathanw 1422 1.3.2.2 nathanw case MSG_PARITY_ERROR: 1423 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: PARITY_ERROR\n", 0); 1424 1.3.2.2 nathanw /* Resend the last message. */ 1425 1.3.2.2 nathanw sunscpal_sched_msgout(sc, sc->sc_msgout); 1426 1.3.2.2 nathanw break; 1427 1.3.2.2 nathanw 1428 1.3.2.2 nathanw case MSG_MESSAGE_REJECT: 1429 1.3.2.2 nathanw /* The target rejects the last message we sent. */ 1430 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: got reject for 0x%x\n", sc->sc_msgout); 1431 1.3.2.2 nathanw switch (sc->sc_msgout) { 1432 1.3.2.2 nathanw case SEND_IDENTIFY: 1433 1.3.2.2 nathanw /* Really old target controller? */ 1434 1.3.2.2 nathanw /* XXX ... */ 1435 1.3.2.2 nathanw break; 1436 1.3.2.2 nathanw case SEND_INIT_DET_ERR: 1437 1.3.2.2 nathanw goto abort; 1438 1.3.2.2 nathanw } 1439 1.3.2.2 nathanw break; 1440 1.3.2.2 nathanw 1441 1.3.2.2 nathanw case MSG_NOOP: 1442 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: NOOP\n", 0); 1443 1.3.2.2 nathanw break; 1444 1.3.2.2 nathanw 1445 1.3.2.2 nathanw case MSG_DISCONNECT: 1446 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: DISCONNECT\n", 0); 1447 1.3.2.2 nathanw /* Target is about to disconnect. */ 1448 1.3.2.2 nathanw act_flags |= ACT_DISCONNECT; 1449 1.3.2.2 nathanw if ((xs->xs_periph->periph_quirks & PQUIRK_AUTOSAVE) == 0) 1450 1.3.2.2 nathanw break; 1451 1.3.2.2 nathanw /*FALLTHROUGH*/ 1452 1.3.2.2 nathanw 1453 1.3.2.2 nathanw case MSG_SAVEDATAPOINTER: 1454 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: SAVE_PTRS\n", 0); 1455 1.3.2.2 nathanw sr->sr_dataptr = sc->sc_dataptr; 1456 1.3.2.2 nathanw sr->sr_datalen = sc->sc_datalen; 1457 1.3.2.2 nathanw break; 1458 1.3.2.2 nathanw 1459 1.3.2.2 nathanw case MSG_RESTOREPOINTERS: 1460 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: RESTORE_PTRS\n", 0); 1461 1.3.2.2 nathanw sc->sc_dataptr = sr->sr_dataptr; 1462 1.3.2.2 nathanw sc->sc_datalen = sr->sr_datalen; 1463 1.3.2.2 nathanw break; 1464 1.3.2.2 nathanw 1465 1.3.2.2 nathanw case MSG_EXTENDED: 1466 1.3.2.2 nathanw switch (sc->sc_imess[2]) { 1467 1.3.2.2 nathanw case MSG_EXT_SDTR: 1468 1.3.2.2 nathanw case MSG_EXT_WDTR: 1469 1.3.2.2 nathanw /* The ncr5380 can not do synchronous mode. */ 1470 1.3.2.2 nathanw goto reject; 1471 1.3.2.2 nathanw default: 1472 1.3.2.2 nathanw printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n", 1473 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1474 1.3.2.2 nathanw SUNSCPAL_BREAK(); 1475 1.3.2.2 nathanw goto reject; 1476 1.3.2.2 nathanw } 1477 1.3.2.2 nathanw break; 1478 1.3.2.2 nathanw 1479 1.3.2.2 nathanw default: 1480 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: eh? imsg=0x%x\n", sc->sc_imess[0]); 1481 1.3.2.2 nathanw printf("%s: unrecognized MESSAGE; sending REJECT\n", 1482 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1483 1.3.2.2 nathanw SUNSCPAL_BREAK(); 1484 1.3.2.2 nathanw /* fallthrough */ 1485 1.3.2.2 nathanw reject: 1486 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_REJECT); 1487 1.3.2.2 nathanw break; 1488 1.3.2.2 nathanw 1489 1.3.2.2 nathanw abort: 1490 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1491 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1492 1.3.2.2 nathanw break; 1493 1.3.2.2 nathanw } 1494 1.3.2.2 nathanw 1495 1.3.2.2 nathanw /* Go get the next message, if any. */ 1496 1.3.2.2 nathanw if (act_flags == ACT_CONTINUE) 1497 1.3.2.2 nathanw goto nextmsg; 1498 1.3.2.2 nathanw 1499 1.3.2.2 nathanw return (act_flags); 1500 1.3.2.2 nathanw } 1501 1.3.2.2 nathanw 1502 1.3.2.2 nathanw 1503 1.3.2.2 nathanw /* 1504 1.3.2.2 nathanw * The message out (and in) stuff is a bit complicated: 1505 1.3.2.2 nathanw * If the target requests another message (sequence) without 1506 1.3.2.2 nathanw * having changed phase in between it really asks for a 1507 1.3.2.2 nathanw * retransmit, probably due to parity error(s). 1508 1.3.2.2 nathanw * The following messages can be sent: 1509 1.3.2.2 nathanw * IDENTIFY @ These 4 stem from SCSI command activity 1510 1.3.2.2 nathanw * SDTR @ 1511 1.3.2.2 nathanw * WDTR @ 1512 1.3.2.2 nathanw * DEV_RESET @ 1513 1.3.2.2 nathanw * REJECT if MSGI doesn't make sense 1514 1.3.2.2 nathanw * PARITY_ERROR if parity error while in MSGI 1515 1.3.2.2 nathanw * INIT_DET_ERR if parity error while not in MSGI 1516 1.3.2.2 nathanw * ABORT if INIT_DET_ERR rejected 1517 1.3.2.2 nathanw * NOOP if asked for a message and there's nothing to send 1518 1.3.2.2 nathanw * 1519 1.3.2.2 nathanw * Note that we call this one with (sc_current == NULL) 1520 1.3.2.2 nathanw * when sending ABORT for unwanted reselections. 1521 1.3.2.2 nathanw */ 1522 1.3.2.2 nathanw static int 1523 1.3.2.2 nathanw sunscpal_msg_out(sc) 1524 1.3.2.2 nathanw struct sunscpal_softc *sc; 1525 1.3.2.2 nathanw { 1526 1.3.2.2 nathanw /* 1527 1.3.2.2 nathanw * This controller does not allow you to assert ATN, which 1528 1.3.2.2 nathanw * means we will never get the opportunity to send messages to 1529 1.3.2.2 nathanw * the target (the bus will never enter this MSG_OUT phase). 1530 1.3.2.2 nathanw * This will eventually leave us with no option other than to 1531 1.3.2.2 nathanw * reset the bus. We keep this function as a placeholder, 1532 1.3.2.2 nathanw * though, and this printf will eventually go away or get 1533 1.3.2.2 nathanw * #ifdef'ed: 1534 1.3.2.2 nathanw */ 1535 1.3.2.2 nathanw printf("sunscpal_msg_out: bus is in MSG_OUT phase?\n"); 1536 1.3.2.2 nathanw return (ACT_CONTINUE | ACT_RESET_BUS); 1537 1.3.2.2 nathanw } 1538 1.3.2.2 nathanw 1539 1.3.2.2 nathanw /* 1540 1.3.2.2 nathanw * Handle command phase. 1541 1.3.2.2 nathanw */ 1542 1.3.2.2 nathanw static int 1543 1.3.2.2 nathanw sunscpal_command(sc) 1544 1.3.2.2 nathanw struct sunscpal_softc *sc; 1545 1.3.2.2 nathanw { 1546 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 1547 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 1548 1.3.2.2 nathanw int len; 1549 1.3.2.2 nathanw 1550 1.3.2.2 nathanw /* Assume command can be sent in one go. */ 1551 1.3.2.2 nathanw /* XXX: Do this using DMA, and get a phase change intr? */ 1552 1.3.2.2 nathanw len = sunscpal_pio_out(sc, SUNSCPAL_PHASE_COMMAND, xs->cmdlen, 1553 1.3.2.2 nathanw (u_char *)xs->cmd); 1554 1.3.2.2 nathanw 1555 1.3.2.2 nathanw if (len != xs->cmdlen) { 1556 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 1557 1.3.2.2 nathanw printf("sunscpal_command: short transfer: wanted %d got %d.\n", 1558 1.3.2.2 nathanw xs->cmdlen, len); 1559 1.3.2.2 nathanw sunscpal_show_scsi_cmd(xs); 1560 1.3.2.2 nathanw SUNSCPAL_BREAK(); 1561 1.3.2.2 nathanw #endif 1562 1.3.2.2 nathanw if (len < 6) { 1563 1.3.2.2 nathanw xs->error = XS_DRIVER_STUFFUP; 1564 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1565 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1566 1.3.2.2 nathanw } 1567 1.3.2.2 nathanw 1568 1.3.2.2 nathanw } 1569 1.3.2.2 nathanw 1570 1.3.2.2 nathanw return ACT_CONTINUE; 1571 1.3.2.2 nathanw } 1572 1.3.2.2 nathanw 1573 1.3.2.2 nathanw 1574 1.3.2.2 nathanw /* 1575 1.3.2.2 nathanw * Handle either data_in or data_out 1576 1.3.2.2 nathanw */ 1577 1.3.2.2 nathanw static int 1578 1.3.2.2 nathanw sunscpal_data_xfer(sc, phase) 1579 1.3.2.2 nathanw struct sunscpal_softc *sc; 1580 1.3.2.2 nathanw int phase; 1581 1.3.2.2 nathanw { 1582 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 1583 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 1584 1.3.2.2 nathanw int expected_phase; 1585 1.3.2.2 nathanw int len; 1586 1.3.2.2 nathanw 1587 1.3.2.2 nathanw /* 1588 1.3.2.2 nathanw * When aborting a command, disallow any data phase. 1589 1.3.2.2 nathanw */ 1590 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) { 1591 1.3.2.2 nathanw printf("%s: aborting, bus phase=%s (reset)\n", 1592 1.3.2.2 nathanw sc->sc_dev.dv_xname, phase_names[(phase >> 8) & 7]); 1593 1.3.2.2 nathanw return ACT_RESET_BUS; /* XXX */ 1594 1.3.2.2 nathanw } 1595 1.3.2.2 nathanw 1596 1.3.2.2 nathanw /* Validate expected phase (data_in or data_out) */ 1597 1.3.2.2 nathanw expected_phase = (xs->xs_control & XS_CTL_DATA_OUT) ? 1598 1.3.2.2 nathanw SUNSCPAL_PHASE_DATA_OUT : SUNSCPAL_PHASE_DATA_IN; 1599 1.3.2.2 nathanw if (phase != expected_phase) { 1600 1.3.2.2 nathanw printf("%s: data phase error\n", sc->sc_dev.dv_xname); 1601 1.3.2.2 nathanw goto abort; 1602 1.3.2.2 nathanw } 1603 1.3.2.2 nathanw 1604 1.3.2.2 nathanw /* Make sure we have some data to move. */ 1605 1.3.2.2 nathanw if (sc->sc_datalen <= 0) { 1606 1.3.2.2 nathanw /* Device needs padding. */ 1607 1.3.2.2 nathanw if (phase == SUNSCPAL_PHASE_DATA_IN) 1608 1.3.2.2 nathanw sunscpal_pio_in(sc, phase, 4096, NULL); 1609 1.3.2.2 nathanw else 1610 1.3.2.2 nathanw sunscpal_pio_out(sc, phase, 4096, NULL); 1611 1.3.2.2 nathanw /* Make sure that caused a phase change. */ 1612 1.3.2.2 nathanw if (SUNSCPAL_BUS_PHASE(SUNSCPAL_READ_2(sc, sunscpal_icr)) == phase) { 1613 1.3.2.2 nathanw /* More than 4k is just too much! */ 1614 1.3.2.2 nathanw printf("%s: too much data padding\n", 1615 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1616 1.3.2.2 nathanw goto abort; 1617 1.3.2.2 nathanw } 1618 1.3.2.2 nathanw return ACT_CONTINUE; 1619 1.3.2.2 nathanw } 1620 1.3.2.2 nathanw 1621 1.3.2.2 nathanw /* 1622 1.3.2.2 nathanw * Attempt DMA only if dma_alloc gave us a DMA handle AND 1623 1.3.2.2 nathanw * there is enough left to transfer so DMA is worth while. 1624 1.3.2.2 nathanw */ 1625 1.3.2.2 nathanw if (sr->sr_dma_hand && 1626 1.3.2.2 nathanw (sc->sc_datalen >= sc->sc_min_dma_len)) 1627 1.3.2.2 nathanw { 1628 1.3.2.2 nathanw /* 1629 1.3.2.2 nathanw * OK, really start DMA. Note, the MD start function 1630 1.3.2.2 nathanw * is responsible for setting the TCMD register, etc. 1631 1.3.2.2 nathanw * (Acknowledge the phase change there, not here.) 1632 1.3.2.2 nathanw */ 1633 1.3.2.2 nathanw SUNSCPAL_TRACE("data_xfer: dma_start, dh=0x%x\n", 1634 1.3.2.2 nathanw (long) sr->sr_dma_hand); 1635 1.3.2.2 nathanw sunscpal_dma_start(sc); 1636 1.3.2.2 nathanw return ACT_WAIT_DMA; 1637 1.3.2.2 nathanw } 1638 1.3.2.2 nathanw 1639 1.3.2.2 nathanw /* 1640 1.3.2.2 nathanw * Doing PIO for data transfer. (Possibly "Pseudo DMA") 1641 1.3.2.2 nathanw * XXX: Do PDMA functions need to set tcmd later? 1642 1.3.2.2 nathanw */ 1643 1.3.2.2 nathanw SUNSCPAL_TRACE("data_xfer: doing PIO, len=%d\n", sc->sc_datalen); 1644 1.3.2.2 nathanw if (phase == SUNSCPAL_PHASE_DATA_OUT) { 1645 1.3.2.2 nathanw len = sunscpal_pio_out(sc, phase, sc->sc_datalen, sc->sc_dataptr); 1646 1.3.2.2 nathanw } else { 1647 1.3.2.2 nathanw len = sunscpal_pio_in(sc, phase, sc->sc_datalen, sc->sc_dataptr); 1648 1.3.2.2 nathanw } 1649 1.3.2.2 nathanw sc->sc_dataptr += len; 1650 1.3.2.2 nathanw sc->sc_datalen -= len; 1651 1.3.2.2 nathanw 1652 1.3.2.2 nathanw SUNSCPAL_TRACE("data_xfer: did PIO, resid=%d\n", sc->sc_datalen); 1653 1.3.2.2 nathanw return (ACT_CONTINUE); 1654 1.3.2.2 nathanw 1655 1.3.2.2 nathanw abort: 1656 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1657 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1658 1.3.2.2 nathanw return (ACT_CONTINUE); 1659 1.3.2.2 nathanw } 1660 1.3.2.2 nathanw 1661 1.3.2.2 nathanw 1662 1.3.2.2 nathanw static int 1663 1.3.2.2 nathanw sunscpal_status(sc) 1664 1.3.2.2 nathanw struct sunscpal_softc *sc; 1665 1.3.2.2 nathanw { 1666 1.3.2.2 nathanw int len; 1667 1.3.2.2 nathanw u_char status; 1668 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 1669 1.3.2.2 nathanw 1670 1.3.2.2 nathanw len = sunscpal_pio_in(sc, SUNSCPAL_PHASE_STATUS, 1, &status); 1671 1.3.2.2 nathanw if (len) { 1672 1.3.2.2 nathanw sr->sr_status = status; 1673 1.3.2.2 nathanw } else { 1674 1.3.2.2 nathanw printf("sunscpal_status: none?\n"); 1675 1.3.2.2 nathanw } 1676 1.3.2.2 nathanw 1677 1.3.2.2 nathanw return ACT_CONTINUE; 1678 1.3.2.2 nathanw } 1679 1.3.2.2 nathanw 1680 1.3.2.2 nathanw 1681 1.3.2.2 nathanw /* 1682 1.3.2.2 nathanw * This is the big state machine that follows SCSI phase changes. 1683 1.3.2.2 nathanw * This is somewhat like a co-routine. It will do a SCSI command, 1684 1.3.2.2 nathanw * and exit if the command is complete, or if it must wait, i.e. 1685 1.3.2.2 nathanw * for DMA to complete or for reselect to resume the job. 1686 1.3.2.2 nathanw * 1687 1.3.2.2 nathanw * The bus must be selected, and we need to know which command is 1688 1.3.2.2 nathanw * being undertaken. 1689 1.3.2.2 nathanw */ 1690 1.3.2.2 nathanw static void 1691 1.3.2.2 nathanw sunscpal_machine(sc) 1692 1.3.2.2 nathanw struct sunscpal_softc *sc; 1693 1.3.2.2 nathanw { 1694 1.3.2.2 nathanw struct sunscpal_req *sr; 1695 1.3.2.2 nathanw struct scsipi_xfer *xs; 1696 1.3.2.2 nathanw int act_flags, phase, timo; 1697 1.3.2.2 nathanw 1698 1.3.2.2 nathanw #ifdef DIAGNOSTIC 1699 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) 1700 1.3.2.2 nathanw panic("sunscpal_machine: state=idle"); 1701 1.3.2.2 nathanw if (sc->sc_current == NULL) 1702 1.3.2.2 nathanw panic("sunscpal_machine: no current cmd"); 1703 1.3.2.2 nathanw #endif 1704 1.3.2.2 nathanw 1705 1.3.2.2 nathanw sr = sc->sc_current; 1706 1.3.2.2 nathanw xs = sr->sr_xs; 1707 1.3.2.2 nathanw act_flags = ACT_CONTINUE; 1708 1.3.2.2 nathanw 1709 1.3.2.2 nathanw /* 1710 1.3.2.2 nathanw * This will be called by sunscpal_intr() when DMA is 1711 1.3.2.2 nathanw * complete. Must stop DMA before touching the PAL or 1712 1.3.2.2 nathanw * there will be "register conflict" errors. 1713 1.3.2.2 nathanw */ 1714 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_DOINGDMA) { 1715 1.3.2.2 nathanw /* Pick-up where where we left off... */ 1716 1.3.2.2 nathanw goto dma_done; 1717 1.3.2.2 nathanw } 1718 1.3.2.2 nathanw 1719 1.3.2.2 nathanw next_phase: 1720 1.3.2.2 nathanw 1721 1.3.2.2 nathanw if (!SUNSCPAL_BUSY(sc)) { 1722 1.3.2.2 nathanw /* Unexpected disconnect */ 1723 1.3.2.2 nathanw printf("sunscpal_machine: unexpected disconnect.\n"); 1724 1.3.2.2 nathanw xs->error = XS_DRIVER_STUFFUP; 1725 1.3.2.2 nathanw act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 1726 1.3.2.2 nathanw goto do_actions; 1727 1.3.2.2 nathanw } 1728 1.3.2.2 nathanw 1729 1.3.2.2 nathanw /* 1730 1.3.2.2 nathanw * Wait for REQ before reading the phase. 1731 1.3.2.2 nathanw * Need to wait longer than usual here, because 1732 1.3.2.2 nathanw * some devices are just plain slow... 1733 1.3.2.2 nathanw */ 1734 1.3.2.2 nathanw timo = sunscpal_wait_phase_timo; 1735 1.3.2.2 nathanw for (;;) { 1736 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_REQUEST) 1737 1.3.2.2 nathanw break; 1738 1.3.2.2 nathanw if (--timo <= 0) { 1739 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) { 1740 1.3.2.2 nathanw printf("%s: no REQ while aborting, reset\n", 1741 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1742 1.3.2.2 nathanw act_flags |= ACT_RESET_BUS; 1743 1.3.2.2 nathanw goto do_actions; 1744 1.3.2.2 nathanw } 1745 1.3.2.2 nathanw printf("%s: no REQ for next phase, abort\n", 1746 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1747 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1748 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1749 1.3.2.2 nathanw goto next_phase; 1750 1.3.2.2 nathanw } 1751 1.3.2.2 nathanw delay(100); 1752 1.3.2.2 nathanw } 1753 1.3.2.2 nathanw 1754 1.3.2.2 nathanw phase = SUNSCPAL_BUS_PHASE(SUNSCPAL_READ_2(sc, sunscpal_icr)); 1755 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: phase=%s\n", 1756 1.3.2.2 nathanw (long) phase_names[(phase >> 8) & 7]); 1757 1.3.2.2 nathanw 1758 1.3.2.2 nathanw /* 1759 1.3.2.2 nathanw * We assume that the device knows what it's doing, 1760 1.3.2.2 nathanw * so any phase is good. 1761 1.3.2.2 nathanw */ 1762 1.3.2.2 nathanw 1763 1.3.2.2 nathanw switch (phase) { 1764 1.3.2.2 nathanw 1765 1.3.2.2 nathanw case SUNSCPAL_PHASE_DATA_OUT: 1766 1.3.2.2 nathanw case SUNSCPAL_PHASE_DATA_IN: 1767 1.3.2.2 nathanw act_flags = sunscpal_data_xfer(sc, phase); 1768 1.3.2.2 nathanw break; 1769 1.3.2.2 nathanw 1770 1.3.2.2 nathanw case SUNSCPAL_PHASE_COMMAND: 1771 1.3.2.2 nathanw act_flags = sunscpal_command(sc); 1772 1.3.2.2 nathanw break; 1773 1.3.2.2 nathanw 1774 1.3.2.2 nathanw case SUNSCPAL_PHASE_STATUS: 1775 1.3.2.2 nathanw act_flags = sunscpal_status(sc); 1776 1.3.2.2 nathanw break; 1777 1.3.2.2 nathanw 1778 1.3.2.2 nathanw case SUNSCPAL_PHASE_MSG_OUT: 1779 1.3.2.2 nathanw act_flags = sunscpal_msg_out(sc); 1780 1.3.2.2 nathanw break; 1781 1.3.2.2 nathanw 1782 1.3.2.2 nathanw case SUNSCPAL_PHASE_MSG_IN: 1783 1.3.2.2 nathanw act_flags = sunscpal_msg_in(sc); 1784 1.3.2.2 nathanw break; 1785 1.3.2.2 nathanw 1786 1.3.2.2 nathanw default: 1787 1.3.2.2 nathanw printf("sunscpal_machine: Unexpected phase 0x%x\n", phase); 1788 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1789 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1790 1.3.2.2 nathanw goto next_phase; 1791 1.3.2.2 nathanw 1792 1.3.2.2 nathanw } /* switch */ 1793 1.3.2.2 nathanw sc->sc_prevphase = phase; 1794 1.3.2.2 nathanw 1795 1.3.2.2 nathanw do_actions: 1796 1.3.2.2 nathanw 1797 1.3.2.2 nathanw if (act_flags & ACT_WAIT_DMA) { 1798 1.3.2.2 nathanw act_flags &= ~ACT_WAIT_DMA; 1799 1.3.2.2 nathanw /* Wait for DMA to complete (polling, or interrupt). */ 1800 1.3.2.2 nathanw if ((sr->sr_flags & SR_IMMED) == 0) { 1801 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: wait for DMA intr.\n", 0); 1802 1.3.2.2 nathanw return; /* will resume at dma_done */ 1803 1.3.2.2 nathanw } 1804 1.3.2.2 nathanw /* Busy-wait for it to finish. */ 1805 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: dma_poll, dh=0x%x\n", 1806 1.3.2.2 nathanw (long) sr->sr_dma_hand); 1807 1.3.2.2 nathanw sunscpal_dma_poll(sc); 1808 1.3.2.2 nathanw dma_done: 1809 1.3.2.2 nathanw /* Return here after interrupt. */ 1810 1.3.2.2 nathanw if (sr->sr_flags & SR_OVERDUE) 1811 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1812 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: dma_stop, dh=0x%x\n", 1813 1.3.2.2 nathanw (long) sr->sr_dma_hand); 1814 1.3.2.2 nathanw sunscpal_dma_stop(sc); 1815 1.3.2.2 nathanw SUNSCPAL_CLR_INTR(sc); /* XXX */ 1816 1.3.2.2 nathanw /* 1817 1.3.2.2 nathanw * While DMA is running we can not touch the SBC, 1818 1.3.2.2 nathanw * so various places just set SUNSCPAL_ABORTING and 1819 1.3.2.2 nathanw * expect us the "kick it" when DMA is done. 1820 1.3.2.2 nathanw */ 1821 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) { 1822 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1823 1.3.2.2 nathanw } 1824 1.3.2.2 nathanw } 1825 1.3.2.2 nathanw 1826 1.3.2.2 nathanw /* 1827 1.3.2.2 nathanw * Check for parity error. 1828 1.3.2.2 nathanw * XXX - better place to check? 1829 1.3.2.2 nathanw */ 1830 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_PARITY_ERROR) { 1831 1.3.2.2 nathanw printf("%s: parity error!\n", sc->sc_dev.dv_xname); 1832 1.3.2.2 nathanw /* XXX: sc->sc_state |= SUNSCPAL_ABORTING; */ 1833 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_PARITY_ERROR); 1834 1.3.2.2 nathanw } 1835 1.3.2.2 nathanw 1836 1.3.2.2 nathanw if (act_flags == ACT_CONTINUE) 1837 1.3.2.2 nathanw goto next_phase; 1838 1.3.2.2 nathanw /* All other actions "break" from the loop. */ 1839 1.3.2.2 nathanw 1840 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: act_flags=0x%x\n", act_flags); 1841 1.3.2.2 nathanw 1842 1.3.2.2 nathanw if (act_flags & ACT_RESET_BUS) { 1843 1.3.2.2 nathanw act_flags |= ACT_CMD_DONE; 1844 1.3.2.2 nathanw /* 1845 1.3.2.2 nathanw * Reset the SCSI bus, usually due to a timeout. 1846 1.3.2.2 nathanw * The error code XS_TIMEOUT allows retries. 1847 1.3.2.2 nathanw */ 1848 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1849 1.3.2.2 nathanw printf("%s: reset SCSI bus for TID=%d LUN=%d\n", 1850 1.3.2.2 nathanw sc->sc_dev.dv_xname, sr->sr_target, sr->sr_lun); 1851 1.3.2.2 nathanw sunscpal_reset_scsibus(sc); 1852 1.3.2.2 nathanw } 1853 1.3.2.2 nathanw 1854 1.3.2.2 nathanw if (act_flags & ACT_CMD_DONE) { 1855 1.3.2.2 nathanw act_flags |= ACT_DISCONNECT; 1856 1.3.2.2 nathanw /* Need to call scsipi_done() */ 1857 1.3.2.2 nathanw /* XXX: from the aic6360 driver, but why? */ 1858 1.3.2.2 nathanw if (sc->sc_datalen < 0) { 1859 1.3.2.2 nathanw printf("%s: %d extra bytes from %d:%d\n", 1860 1.3.2.2 nathanw sc->sc_dev.dv_xname, -sc->sc_datalen, 1861 1.3.2.2 nathanw sr->sr_target, sr->sr_lun); 1862 1.3.2.2 nathanw sc->sc_datalen = 0; 1863 1.3.2.2 nathanw } 1864 1.3.2.2 nathanw xs->resid = sc->sc_datalen; 1865 1.3.2.2 nathanw /* Note: this will clear sc_current */ 1866 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: call done, cur=0x%x\n", (long)sr); 1867 1.3.2.2 nathanw sunscpal_done(sc); 1868 1.3.2.2 nathanw } 1869 1.3.2.2 nathanw 1870 1.3.2.2 nathanw if (act_flags & ACT_DISCONNECT) { 1871 1.3.2.2 nathanw /* 1872 1.3.2.2 nathanw * The device has dropped BSY (or will soon). 1873 1.3.2.2 nathanw * We have to wait here for BSY to drop, otherwise 1874 1.3.2.2 nathanw * the next command may decide we need a bus reset. 1875 1.3.2.2 nathanw */ 1876 1.3.2.2 nathanw timo = sunscpal_wait_req_timo; /* XXX */ 1877 1.3.2.2 nathanw for (;;) { 1878 1.3.2.2 nathanw if (!SUNSCPAL_BUSY(sc)) 1879 1.3.2.2 nathanw goto busfree; 1880 1.3.2.2 nathanw if (--timo <= 0) 1881 1.3.2.2 nathanw break; 1882 1.3.2.2 nathanw delay(2); 1883 1.3.2.2 nathanw } 1884 1.3.2.2 nathanw /* Device is sitting on the bus! */ 1885 1.3.2.2 nathanw printf("%s: Target %d LUN %d stuck busy, resetting...\n", 1886 1.3.2.2 nathanw sc->sc_dev.dv_xname, sr->sr_target, sr->sr_lun); 1887 1.3.2.2 nathanw sunscpal_reset_scsibus(sc); 1888 1.3.2.2 nathanw busfree: 1889 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: discon, waited %d\n", 1890 1.3.2.2 nathanw sunscpal_wait_req_timo - timo); 1891 1.3.2.2 nathanw 1892 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, 0); 1893 1.3.2.2 nathanw 1894 1.3.2.2 nathanw if ((act_flags & ACT_CMD_DONE) == 0) { 1895 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: discon, cur=0x%x\n", (long)sr); 1896 1.3.2.2 nathanw } 1897 1.3.2.2 nathanw 1898 1.3.2.2 nathanw /* 1899 1.3.2.2 nathanw * We may be here due to a disconnect message, 1900 1.3.2.2 nathanw * in which case we did NOT call sunscpal_done, 1901 1.3.2.2 nathanw * and we need to clear sc_current. 1902 1.3.2.2 nathanw */ 1903 1.3.2.2 nathanw sc->sc_state = SUNSCPAL_IDLE; 1904 1.3.2.2 nathanw sc->sc_current = NULL; 1905 1.3.2.2 nathanw 1906 1.3.2.2 nathanw /* Paranoia: clear everything. */ 1907 1.3.2.2 nathanw sc->sc_dataptr = NULL; 1908 1.3.2.2 nathanw sc->sc_datalen = 0; 1909 1.3.2.2 nathanw sc->sc_prevphase = SUNSCPAL_PHASE_INVALID; 1910 1.3.2.2 nathanw sc->sc_msgpriq = 0; 1911 1.3.2.2 nathanw sc->sc_msgoutq = 0; 1912 1.3.2.2 nathanw sc->sc_msgout = 0; 1913 1.3.2.2 nathanw 1914 1.3.2.2 nathanw /* Our caller will re-enable interrupts. */ 1915 1.3.2.2 nathanw } 1916 1.3.2.2 nathanw } 1917 1.3.2.2 nathanw 1918 1.3.2.2 nathanw 1919 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 1920 1.3.2.2 nathanw 1921 1.3.2.2 nathanw static void 1922 1.3.2.2 nathanw sunscpal_show_scsi_cmd(xs) 1923 1.3.2.2 nathanw struct scsipi_xfer *xs; 1924 1.3.2.2 nathanw { 1925 1.3.2.2 nathanw u_char *b = (u_char *) xs->cmd; 1926 1.3.2.2 nathanw int i = 0; 1927 1.3.2.2 nathanw 1928 1.3.2.2 nathanw scsipi_printaddr(xs->xs_periph); 1929 1.3.2.2 nathanw if ( ! ( xs->xs_control & XS_CTL_RESET ) ) { 1930 1.3.2.2 nathanw printf("-"); 1931 1.3.2.2 nathanw while (i < xs->cmdlen) { 1932 1.3.2.2 nathanw if (i) printf(","); 1933 1.3.2.2 nathanw printf("%x",b[i++]); 1934 1.3.2.2 nathanw } 1935 1.3.2.2 nathanw printf("-\n"); 1936 1.3.2.2 nathanw } else { 1937 1.3.2.2 nathanw 1938 1.3.2.2 nathanw printf("-RESET-\n"); 1939 1.3.2.2 nathanw } 1940 1.3.2.2 nathanw } 1941 1.3.2.2 nathanw 1942 1.3.2.2 nathanw 1943 1.3.2.2 nathanw int sunscpal_traceidx = 0; 1944 1.3.2.2 nathanw 1945 1.3.2.2 nathanw #define TRACE_MAX 1024 1946 1.3.2.2 nathanw struct trace_ent { 1947 1.3.2.2 nathanw char *msg; 1948 1.3.2.2 nathanw long val; 1949 1.3.2.2 nathanw } sunscpal_tracebuf[TRACE_MAX]; 1950 1.3.2.2 nathanw 1951 1.3.2.2 nathanw void 1952 1.3.2.2 nathanw sunscpal_trace(msg, val) 1953 1.3.2.2 nathanw char *msg; 1954 1.3.2.2 nathanw long val; 1955 1.3.2.2 nathanw { 1956 1.3.2.2 nathanw struct trace_ent *tr; 1957 1.3.2.2 nathanw int s; 1958 1.3.2.2 nathanw 1959 1.3.2.2 nathanw s = splbio(); 1960 1.3.2.2 nathanw 1961 1.3.2.2 nathanw tr = &sunscpal_tracebuf[sunscpal_traceidx]; 1962 1.3.2.2 nathanw 1963 1.3.2.2 nathanw sunscpal_traceidx++; 1964 1.3.2.2 nathanw if (sunscpal_traceidx >= TRACE_MAX) 1965 1.3.2.2 nathanw sunscpal_traceidx = 0; 1966 1.3.2.2 nathanw 1967 1.3.2.2 nathanw tr->msg = msg; 1968 1.3.2.2 nathanw tr->val = val; 1969 1.3.2.2 nathanw 1970 1.3.2.2 nathanw splx(s); 1971 1.3.2.2 nathanw } 1972 1.3.2.2 nathanw 1973 1.3.2.2 nathanw #ifdef DDB 1974 1.3.2.2 nathanw void 1975 1.3.2.2 nathanw sunscpal_clear_trace() 1976 1.3.2.2 nathanw { 1977 1.3.2.2 nathanw sunscpal_traceidx = 0; 1978 1.3.2.3 nathanw memset((char*) sunscpal_tracebuf, 0, sizeof(sunscpal_tracebuf)); 1979 1.3.2.2 nathanw } 1980 1.3.2.2 nathanw 1981 1.3.2.2 nathanw void 1982 1.3.2.2 nathanw sunscpal_show_trace() 1983 1.3.2.2 nathanw { 1984 1.3.2.2 nathanw struct trace_ent *tr; 1985 1.3.2.2 nathanw int idx; 1986 1.3.2.2 nathanw 1987 1.3.2.2 nathanw idx = sunscpal_traceidx; 1988 1.3.2.2 nathanw do { 1989 1.3.2.2 nathanw tr = &sunscpal_tracebuf[idx]; 1990 1.3.2.2 nathanw idx++; 1991 1.3.2.2 nathanw if (idx >= TRACE_MAX) 1992 1.3.2.2 nathanw idx = 0; 1993 1.3.2.2 nathanw if (tr->msg) 1994 1.3.2.2 nathanw db_printf(tr->msg, tr->val); 1995 1.3.2.2 nathanw } while (idx != sunscpal_traceidx); 1996 1.3.2.2 nathanw } 1997 1.3.2.2 nathanw 1998 1.3.2.2 nathanw void 1999 1.3.2.2 nathanw sunscpal_show_req(sr) 2000 1.3.2.2 nathanw struct sunscpal_req *sr; 2001 1.3.2.2 nathanw { 2002 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 2003 1.3.2.2 nathanw 2004 1.3.2.2 nathanw db_printf("TID=%d ", sr->sr_target); 2005 1.3.2.2 nathanw db_printf("LUN=%d ", sr->sr_lun); 2006 1.3.2.2 nathanw db_printf("dh=%p ", sr->sr_dma_hand); 2007 1.3.2.2 nathanw db_printf("dptr=%p ", sr->sr_dataptr); 2008 1.3.2.2 nathanw db_printf("dlen=0x%x ", sr->sr_datalen); 2009 1.3.2.2 nathanw db_printf("flags=%d ", sr->sr_flags); 2010 1.3.2.2 nathanw db_printf("stat=%d ", sr->sr_status); 2011 1.3.2.2 nathanw 2012 1.3.2.2 nathanw if (xs == NULL) { 2013 1.3.2.2 nathanw db_printf("(xs=NULL)\n"); 2014 1.3.2.2 nathanw return; 2015 1.3.2.2 nathanw } 2016 1.3.2.2 nathanw db_printf("\n"); 2017 1.3.2.2 nathanw #ifdef SCSIDEBUG 2018 1.3.2.2 nathanw show_scsipi_xs(xs); 2019 1.3.2.2 nathanw #else 2020 1.3.2.2 nathanw db_printf("xs=%p\n", xs); 2021 1.3.2.2 nathanw #endif 2022 1.3.2.2 nathanw } 2023 1.3.2.2 nathanw 2024 1.3.2.2 nathanw void 2025 1.3.2.2 nathanw sunscpal_show_state() 2026 1.3.2.2 nathanw { 2027 1.3.2.2 nathanw struct sunscpal_softc *sc; 2028 1.3.2.2 nathanw struct sunscpal_req *sr; 2029 1.3.2.2 nathanw int i, j, k; 2030 1.3.2.2 nathanw 2031 1.3.2.2 nathanw sc = sunscpal_debug_sc; 2032 1.3.2.2 nathanw 2033 1.3.2.2 nathanw if (sc == NULL) { 2034 1.3.2.2 nathanw db_printf("sunscpal_debug_sc == NULL\n"); 2035 1.3.2.2 nathanw return; 2036 1.3.2.2 nathanw } 2037 1.3.2.2 nathanw 2038 1.3.2.2 nathanw db_printf("sc_ncmds=%d\n", sc->sc_ncmds); 2039 1.3.2.2 nathanw k = -1; /* which is current? */ 2040 1.3.2.2 nathanw for (i = 0; i < SUNSCPAL_OPENINGS; i++) { 2041 1.3.2.2 nathanw sr = &sc->sc_ring[i]; 2042 1.3.2.2 nathanw if (sr->sr_xs) { 2043 1.3.2.2 nathanw if (sr == sc->sc_current) 2044 1.3.2.2 nathanw k = i; 2045 1.3.2.2 nathanw db_printf("req %d: (sr=%p)", i, sr); 2046 1.3.2.2 nathanw sunscpal_show_req(sr); 2047 1.3.2.2 nathanw } 2048 1.3.2.2 nathanw } 2049 1.3.2.2 nathanw db_printf("sc_rr=%d, current=%d\n", sc->sc_rr, k); 2050 1.3.2.2 nathanw 2051 1.3.2.2 nathanw db_printf("Active request matrix:\n"); 2052 1.3.2.2 nathanw for(i = 0; i < 8; i++) { /* targets */ 2053 1.3.2.2 nathanw for (j = 0; j < 8; j++) { /* LUN */ 2054 1.3.2.2 nathanw sr = sc->sc_matrix[i][j]; 2055 1.3.2.2 nathanw if (sr) { 2056 1.3.2.2 nathanw db_printf("TID=%d LUN=%d sr=%p\n", i, j, sr); 2057 1.3.2.2 nathanw } 2058 1.3.2.2 nathanw } 2059 1.3.2.2 nathanw } 2060 1.3.2.2 nathanw 2061 1.3.2.2 nathanw db_printf("sc_state=0x%x\n", sc->sc_state); 2062 1.3.2.2 nathanw db_printf("sc_current=%p\n", sc->sc_current); 2063 1.3.2.2 nathanw db_printf("sc_dataptr=%p\n", sc->sc_dataptr); 2064 1.3.2.2 nathanw db_printf("sc_datalen=0x%x\n", sc->sc_datalen); 2065 1.3.2.2 nathanw 2066 1.3.2.2 nathanw db_printf("sc_prevphase=%d\n", sc->sc_prevphase); 2067 1.3.2.2 nathanw db_printf("sc_msgpriq=0x%x\n", sc->sc_msgpriq); 2068 1.3.2.2 nathanw } 2069 1.3.2.2 nathanw #endif /* DDB */ 2070 1.3.2.2 nathanw #endif /* SUNSCPAL_DEBUG */ 2071 1.3.2.2 nathanw 2072 1.3.2.2 nathanw void 2073 1.3.2.2 nathanw sunscpal_attach(sc, options) 2074 1.3.2.2 nathanw struct sunscpal_softc *sc; 2075 1.3.2.2 nathanw int options; 2076 1.3.2.2 nathanw { 2077 1.3.2.2 nathanw 2078 1.3.2.2 nathanw /* 2079 1.3.2.2 nathanw * Handle our options. 2080 1.3.2.2 nathanw */ 2081 1.3.2.2 nathanw printf(": options=0x%x\n", options); 2082 1.3.2.2 nathanw sc->sc_parity_disable = (options & SUNSCPAL_OPT_NO_PARITY_CHK); 2083 1.3.2.2 nathanw if (options & SUNSCPAL_OPT_FORCE_POLLING) 2084 1.3.2.2 nathanw sc->sc_flags |= SUNSCPAL_FORCE_POLLING; 2085 1.3.2.2 nathanw if (options & SUNSCPAL_OPT_DISABLE_DMA) 2086 1.3.2.2 nathanw sc->sc_flags |= SUNSCPAL_DISABLE_DMA; 2087 1.3.2.2 nathanw 2088 1.3.2.2 nathanw /* 2089 1.3.2.2 nathanw * Fill in the adapter. 2090 1.3.2.2 nathanw */ 2091 1.3.2.2 nathanw memset(&sc->sc_adapter, 0, sizeof(sc->sc_adapter)); 2092 1.3.2.2 nathanw sc->sc_adapter.adapt_dev = &sc->sc_dev; 2093 1.3.2.2 nathanw sc->sc_adapter.adapt_nchannels = 1; 2094 1.3.2.2 nathanw sc->sc_adapter.adapt_openings = SUNSCPAL_OPENINGS; 2095 1.3.2.2 nathanw sc->sc_adapter.adapt_max_periph = 1; 2096 1.3.2.2 nathanw sc->sc_adapter.adapt_request = sunscpal_scsipi_request; 2097 1.3.2.2 nathanw sc->sc_adapter.adapt_minphys = sunscpal_minphys; 2098 1.3.2.2 nathanw 2099 1.3.2.2 nathanw sc->sc_channel.chan_adapter = &sc->sc_adapter; 2100 1.3.2.2 nathanw sc->sc_channel.chan_bustype = &scsi_bustype; 2101 1.3.2.2 nathanw sc->sc_channel.chan_channel = 0; 2102 1.3.2.2 nathanw sc->sc_channel.chan_ntargets = 8; 2103 1.3.2.2 nathanw sc->sc_channel.chan_nluns = 8; 2104 1.3.2.2 nathanw sc->sc_channel.chan_id = 7; 2105 1.3.2.2 nathanw 2106 1.3.2.2 nathanw /* 2107 1.3.2.2 nathanw * Add reference to adapter so that we drop the reference after 2108 1.3.2.2 nathanw * config_found() to make sure the adatper is disabled. 2109 1.3.2.2 nathanw */ 2110 1.3.2.2 nathanw if (scsipi_adapter_addref(&sc->sc_adapter) != 0) { 2111 1.3.2.2 nathanw printf("%s: unable to enable controller\n", 2112 1.3.2.2 nathanw sc->sc_dev.dv_xname); 2113 1.3.2.2 nathanw return; 2114 1.3.2.2 nathanw } 2115 1.3.2.2 nathanw 2116 1.3.2.2 nathanw sunscpal_init(sc); /* Init chip and driver */ 2117 1.3.2.2 nathanw sunscpal_reset_scsibus(sc); 2118 1.3.2.2 nathanw 2119 1.3.2.2 nathanw /* 2120 1.3.2.2 nathanw * Ask the adapter what subunits are present 2121 1.3.2.2 nathanw */ 2122 1.3.2.2 nathanw (void) config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 2123 1.3.2.2 nathanw scsipi_adapter_delref(&sc->sc_adapter); 2124 1.3.2.2 nathanw } 2125 1.3.2.2 nathanw 2126 1.3.2.2 nathanw int 2127 1.3.2.2 nathanw sunscpal_detach(sc, flags) 2128 1.3.2.2 nathanw struct sunscpal_softc *sc; 2129 1.3.2.2 nathanw int flags; 2130 1.3.2.2 nathanw { 2131 1.3.2.2 nathanw 2132 1.3.2.2 nathanw return (EOPNOTSUPP); 2133 1.3.2.2 nathanw } 2134 1.3.2.2 nathanw 2135 1.3.2.2 nathanw static void 2136 1.3.2.2 nathanw sunscpal_minphys(struct buf *bp) 2137 1.3.2.2 nathanw { 2138 1.3.2.2 nathanw if (bp->b_bcount > SUNSCPAL_MAX_DMA_LEN) { 2139 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 2140 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_DMA) { 2141 1.3.2.2 nathanw printf("sunscpal_minphys len = 0x%lx.\n", bp->b_bcount); 2142 1.3.2.2 nathanw Debugger(); 2143 1.3.2.2 nathanw } 2144 1.3.2.2 nathanw #endif 2145 1.3.2.2 nathanw bp->b_bcount = SUNSCPAL_MAX_DMA_LEN; 2146 1.3.2.2 nathanw } 2147 1.3.2.2 nathanw return (minphys(bp)); 2148 1.3.2.2 nathanw } 2149 1.3.2.2 nathanw 2150 1.3.2.2 nathanw #ifdef SUNSCPAL_USE_BUS_DMA 2151 1.3.2.2 nathanw 2152 1.3.2.2 nathanw /* 2153 1.3.2.2 nathanw * Allocate a DMA handle and put it in sr->sr_dma_hand. Prepare 2154 1.3.2.2 nathanw * for DMA transfer. 2155 1.3.2.2 nathanw */ 2156 1.3.2.2 nathanw static void 2157 1.3.2.2 nathanw sunscpal_dma_alloc(sc) 2158 1.3.2.2 nathanw struct sunscpal_softc *sc; 2159 1.3.2.2 nathanw { 2160 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 2161 1.3.2.2 nathanw sunscpal_dma_handle_t dh; 2162 1.3.2.2 nathanw int i, xlen; 2163 1.3.2.2 nathanw u_long addr; 2164 1.3.2.2 nathanw 2165 1.3.2.2 nathanw #ifdef DIAGNOSTIC 2166 1.3.2.2 nathanw if (sr->sr_dma_hand != NULL) 2167 1.3.2.2 nathanw panic("sunscpal_dma_alloc: already have DMA handle"); 2168 1.3.2.2 nathanw #endif 2169 1.3.2.2 nathanw 2170 1.3.2.2 nathanw addr = (u_long) sc->sc_dataptr; 2171 1.3.2.2 nathanw xlen = sc->sc_datalen; 2172 1.3.2.2 nathanw 2173 1.3.2.2 nathanw /* If the DMA start addr is misaligned then do PIO */ 2174 1.3.2.2 nathanw if ((addr & 1) || (xlen & 1)) { 2175 1.3.2.2 nathanw printf("sunscpal_dma_alloc: misaligned.\n"); 2176 1.3.2.2 nathanw return; 2177 1.3.2.2 nathanw } 2178 1.3.2.2 nathanw 2179 1.3.2.2 nathanw /* Make sure our caller checked sc_min_dma_len. */ 2180 1.3.2.2 nathanw if (xlen < sc->sc_min_dma_len) 2181 1.3.2.2 nathanw panic("sunscpal_dma_alloc: xlen=0x%x\n", xlen); 2182 1.3.2.2 nathanw 2183 1.3.2.2 nathanw /* 2184 1.3.2.2 nathanw * Never attempt single transfers of more than 63k, because 2185 1.3.2.2 nathanw * our count register is only 16 bits. 2186 1.3.2.2 nathanw * This should never happen since already bounded by minphys(). 2187 1.3.2.2 nathanw * XXX - Should just segment these... 2188 1.3.2.2 nathanw */ 2189 1.3.2.2 nathanw if (xlen > SUNSCPAL_MAX_DMA_LEN) { 2190 1.3.2.2 nathanw printf("sunscpal_dma_alloc: excessive xlen=0x%x\n", xlen); 2191 1.3.2.2 nathanw Debugger(); 2192 1.3.2.2 nathanw sc->sc_datalen = xlen = SUNSCPAL_MAX_DMA_LEN; 2193 1.3.2.2 nathanw } 2194 1.3.2.2 nathanw 2195 1.3.2.2 nathanw /* Find free DMA handle. Guaranteed to find one since we have 2196 1.3.2.2 nathanw as many DMA handles as the driver has processes. */ 2197 1.3.2.2 nathanw for (i = 0; i < SUNSCPAL_OPENINGS; i++) { 2198 1.3.2.2 nathanw if ((sc->sc_dma_handles[i].dh_flags & SUNSCDH_BUSY) == 0) 2199 1.3.2.2 nathanw goto found; 2200 1.3.2.2 nathanw } 2201 1.3.2.2 nathanw panic("sc: no free DMA handles."); 2202 1.3.2.2 nathanw found: 2203 1.3.2.2 nathanw 2204 1.3.2.2 nathanw dh = &sc->sc_dma_handles[i]; 2205 1.3.2.2 nathanw dh->dh_flags = SUNSCDH_BUSY; 2206 1.3.2.2 nathanw dh->dh_mapaddr = (u_char*) addr; 2207 1.3.2.2 nathanw dh->dh_maplen = xlen; 2208 1.3.2.2 nathanw dh->dh_dvma = 0; 2209 1.3.2.2 nathanw 2210 1.3.2.2 nathanw /* Load the DMA map. */ 2211 1.3.2.2 nathanw if (bus_dmamap_load(sc->sunscpal_dmat, dh->dh_dmamap, dh->dh_mapaddr, dh->dh_maplen, NULL, BUS_DMA_NOWAIT) != 0) { 2212 1.3.2.2 nathanw /* Can't load map */ 2213 1.3.2.2 nathanw printf("sunscpal_dma_alloc: can't DMA %p/0x%x\n", 2214 1.3.2.2 nathanw dh->dh_mapaddr, dh->dh_maplen); 2215 1.3.2.2 nathanw dh->dh_flags = 0; 2216 1.3.2.2 nathanw return; 2217 1.3.2.2 nathanw } 2218 1.3.2.2 nathanw 2219 1.3.2.2 nathanw /* success */ 2220 1.3.2.2 nathanw sr->sr_dma_hand = dh; 2221 1.3.2.2 nathanw 2222 1.3.2.2 nathanw return; 2223 1.3.2.2 nathanw } 2224 1.3.2.2 nathanw 2225 1.3.2.2 nathanw static void 2226 1.3.2.2 nathanw sunscpal_dma_free(sc) 2227 1.3.2.2 nathanw struct sunscpal_softc *sc; 2228 1.3.2.2 nathanw { 2229 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 2230 1.3.2.2 nathanw sunscpal_dma_handle_t dh = sr->sr_dma_hand; 2231 1.3.2.2 nathanw 2232 1.3.2.2 nathanw #ifdef DIAGNOSTIC 2233 1.3.2.2 nathanw if (dh == NULL) 2234 1.3.2.2 nathanw panic("sunscpal_dma_free: no DMA handle"); 2235 1.3.2.2 nathanw #endif 2236 1.3.2.2 nathanw 2237 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_DOINGDMA) 2238 1.3.2.2 nathanw panic("sunscpal_dma_free: free while in progress"); 2239 1.3.2.2 nathanw 2240 1.3.2.2 nathanw if (dh->dh_flags & SUNSCDH_BUSY) { 2241 1.3.2.2 nathanw /* XXX - Should separate allocation and mapping. */ 2242 1.3.2.2 nathanw /* Give back the DVMA space. */ 2243 1.3.2.2 nathanw bus_dmamap_unload(sc->sunscpal_dmat, dh->dh_dmamap); 2244 1.3.2.2 nathanw dh->dh_flags = 0; 2245 1.3.2.2 nathanw } 2246 1.3.2.2 nathanw sr->sr_dma_hand = NULL; 2247 1.3.2.2 nathanw } 2248 1.3.2.2 nathanw 2249 1.3.2.2 nathanw /* 2250 1.3.2.2 nathanw * This function is called during the SELECT phase that 2251 1.3.2.2 nathanw * precedes a COMMAND phase, in case we need to setup the 2252 1.3.2.2 nathanw * DMA engine before the bus enters a DATA phase. 2253 1.3.2.2 nathanw * 2254 1.3.2.2 nathanw * On the sc version, setup the start address and the count. 2255 1.3.2.2 nathanw */ 2256 1.3.2.2 nathanw static void 2257 1.3.2.2 nathanw sunscpal_dma_setup(sc) 2258 1.3.2.2 nathanw struct sunscpal_softc *sc; 2259 1.3.2.2 nathanw { 2260 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 2261 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 2262 1.3.2.2 nathanw sunscpal_dma_handle_t dh = sr->sr_dma_hand; 2263 1.3.2.2 nathanw long data_pa; 2264 1.3.2.2 nathanw int xlen; 2265 1.3.2.2 nathanw 2266 1.3.2.2 nathanw /* 2267 1.3.2.2 nathanw * Get the DVMA mapping for this segment. 2268 1.3.2.2 nathanw * XXX - Should separate allocation and mapin. 2269 1.3.2.2 nathanw */ 2270 1.3.2.2 nathanw data_pa = dh->dh_dvma; 2271 1.3.2.2 nathanw data_pa += (sc->sc_dataptr - dh->dh_mapaddr); 2272 1.3.2.2 nathanw if (data_pa & 1) 2273 1.3.2.2 nathanw panic("sunscpal_dma_setup: bad pa=0x%lx", data_pa); 2274 1.3.2.2 nathanw xlen = sc->sc_datalen; 2275 1.3.2.2 nathanw if (xlen & 1) 2276 1.3.2.2 nathanw panic("sunscpal_dma_setup: bad xlen=0x%x", xlen); 2277 1.3.2.2 nathanw sc->sc_reqlen = xlen; /* XXX: or less? */ 2278 1.3.2.2 nathanw 2279 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 2280 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_DMA) { 2281 1.3.2.2 nathanw printf("sunscpal_dma_setup: dh=%p, pa=0x%lx, xlen=0x%x\n", 2282 1.3.2.2 nathanw dh, data_pa, xlen); 2283 1.3.2.2 nathanw } 2284 1.3.2.2 nathanw #endif 2285 1.3.2.2 nathanw 2286 1.3.2.2 nathanw /* sync the DMA map: */ 2287 1.3.2.2 nathanw bus_dmamap_sync(sc->sunscpal_dmat, dh->dh_dmamap, 0, dh->dh_maplen, 2288 1.3.2.2 nathanw ((xs->xs_control & XS_CTL_DATA_OUT) == 0 ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 2289 1.3.2.2 nathanw 2290 1.3.2.2 nathanw /* Load the start address and the count. */ 2291 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_addr_h, (data_pa >> 16) & 0xFFFF); 2292 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_addr_l, (data_pa >> 0) & 0xFFFF); 2293 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_count, SUNSCPAL_DMA_COUNT_FLIP(xlen)); 2294 1.3.2.2 nathanw } 2295 1.3.2.2 nathanw 2296 1.3.2.2 nathanw #endif /* SUNSCPAL_USE_BUS_DMA */ 2297
Indexes created Mon Oct 20 20:10:13 GMT 2025