sunscpal.c revision 1.3.2.8
1 1.3.2.8 nathanw /* $NetBSD: sunscpal.c,v 1.3.2.8 2002/10/18 02:41:59 nathanw Exp $ */ 2 1.3.2.2 nathanw 3 1.3.2.2 nathanw /* 4 1.3.2.2 nathanw * Copyright (c) 2001 Matthew Fredette 5 1.3.2.2 nathanw * Copyright (c) 1995 David Jones, Gordon W. Ross 6 1.3.2.2 nathanw * Copyright (c) 1994 Jarle Greipsland 7 1.3.2.2 nathanw * All rights reserved. 8 1.3.2.2 nathanw * 9 1.3.2.2 nathanw * Redistribution and use in source and binary forms, with or without 10 1.3.2.2 nathanw * modification, are permitted provided that the following conditions 11 1.3.2.2 nathanw * are met: 12 1.3.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 13 1.3.2.2 nathanw * notice, this list of conditions and the following disclaimer. 14 1.3.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 15 1.3.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 16 1.3.2.2 nathanw * documentation and/or other materials provided with the distribution. 17 1.3.2.2 nathanw * 3. The name of the authors may not be used to endorse or promote products 18 1.3.2.2 nathanw * derived from this software without specific prior written permission. 19 1.3.2.2 nathanw * 4. All advertising materials mentioning features or use of this software 20 1.3.2.2 nathanw * must display the following acknowledgement: 21 1.3.2.2 nathanw * This product includes software developed by 22 1.3.2.2 nathanw * David Jones and Gordon Ross 23 1.3.2.2 nathanw * 24 1.3.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 25 1.3.2.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 1.3.2.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 1.3.2.2 nathanw * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 28 1.3.2.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 1.3.2.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 1.3.2.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 1.3.2.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 1.3.2.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 1.3.2.2 nathanw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 1.3.2.2 nathanw */ 35 1.3.2.2 nathanw 36 1.3.2.2 nathanw /* 37 1.3.2.2 nathanw * This is a machine-independent driver for the Sun "sc" 38 1.3.2.2 nathanw * SCSI Bus Controller (SBC). 39 1.3.2.2 nathanw * 40 1.3.2.2 nathanw * This code should work with any memory-mapped card, 41 1.3.2.2 nathanw * and can be shared by multiple adapters that address 42 1.3.2.2 nathanw * the card with different register offset spacings. 43 1.3.2.2 nathanw * (This can happen on the atari, for example.) 44 1.3.2.2 nathanw * 45 1.3.2.2 nathanw * Credits, history: 46 1.3.2.2 nathanw * 47 1.3.2.2 nathanw * Matthew Fredette completely copied revision 1.38 of 48 1.3.2.2 nathanw * ncr5380sbc.c, and then heavily modified it to match 49 1.3.2.2 nathanw * the Sun sc PAL. The remaining credits are for 50 1.3.2.2 nathanw * ncr5380sbc.c: 51 1.3.2.2 nathanw * 52 1.3.2.2 nathanw * David Jones is the author of most of the code that now 53 1.3.2.2 nathanw * appears in this file, and was the architect of the 54 1.3.2.2 nathanw * current overall structure (MI/MD code separation, etc.) 55 1.3.2.2 nathanw * 56 1.3.2.2 nathanw * Gordon Ross integrated the message phase code, added lots of 57 1.3.2.2 nathanw * comments about what happens when and why (re. SCSI spec.), 58 1.3.2.2 nathanw * debugged some reentrance problems, and added several new 59 1.3.2.2 nathanw * "hooks" needed for the Sun3 "si" adapters. 60 1.3.2.2 nathanw * 61 1.3.2.2 nathanw * The message in/out code was taken nearly verbatim from 62 1.3.2.2 nathanw * the aic6360 driver by Jarle Greipsland. 63 1.3.2.2 nathanw * 64 1.3.2.2 nathanw * Several other NCR5380 drivers were used for reference 65 1.3.2.2 nathanw * while developing this driver, including work by: 66 1.3.2.2 nathanw * The Alice Group (mac68k port) namely: 67 1.3.2.2 nathanw * Allen K. Briggs, Chris P. Caputo, Michael L. Finch, 68 1.3.2.2 nathanw * Bradley A. Grantham, and Lawrence A. Kesteloot 69 1.3.2.2 nathanw * Michael L. Hitch (amiga drivers: sci.c) 70 1.3.2.2 nathanw * Leo Weppelman (atari driver: ncr5380.c) 71 1.3.2.2 nathanw * There are others too. Thanks, everyone. 72 1.3.2.2 nathanw * 73 1.3.2.2 nathanw * Transliteration to bus_space() performed 9/17/98 by 74 1.3.2.2 nathanw * John Ruschmeyer (jruschme (at) exit109.com) for i386 'nca' driver. 75 1.3.2.2 nathanw * Thank you all. 76 1.3.2.2 nathanw */ 77 1.3.2.2 nathanw 78 1.3.2.4 nathanw #include <sys/cdefs.h> 79 1.3.2.8 nathanw __KERNEL_RCSID(0, "$NetBSD: sunscpal.c,v 1.3.2.8 2002/10/18 02:41:59 nathanw Exp $"); 80 1.3.2.4 nathanw 81 1.3.2.2 nathanw #include "opt_ddb.h" 82 1.3.2.2 nathanw 83 1.3.2.2 nathanw #include <sys/param.h> 84 1.3.2.2 nathanw #include <sys/systm.h> 85 1.3.2.2 nathanw #include <sys/kernel.h> 86 1.3.2.2 nathanw #include <sys/errno.h> 87 1.3.2.2 nathanw #include <sys/malloc.h> 88 1.3.2.2 nathanw #include <sys/device.h> 89 1.3.2.2 nathanw #include <sys/buf.h> 90 1.3.2.2 nathanw #include <sys/proc.h> 91 1.3.2.2 nathanw #include <sys/user.h> 92 1.3.2.2 nathanw 93 1.3.2.2 nathanw #include <dev/scsipi/scsi_all.h> 94 1.3.2.2 nathanw #include <dev/scsipi/scsipi_all.h> 95 1.3.2.2 nathanw #include <dev/scsipi/scsipi_debug.h> 96 1.3.2.2 nathanw #include <dev/scsipi/scsi_message.h> 97 1.3.2.2 nathanw #include <dev/scsipi/scsiconf.h> 98 1.3.2.2 nathanw 99 1.3.2.2 nathanw #ifdef DDB 100 1.3.2.2 nathanw #include <ddb/db_output.h> 101 1.3.2.2 nathanw #endif 102 1.3.2.2 nathanw 103 1.3.2.2 nathanw #include <dev/ic/sunscpalreg.h> 104 1.3.2.2 nathanw #include <dev/ic/sunscpalvar.h> 105 1.3.2.2 nathanw 106 1.3.2.2 nathanw static void sunscpal_reset_scsibus __P((struct sunscpal_softc *)); 107 1.3.2.2 nathanw static void sunscpal_sched __P((struct sunscpal_softc *)); 108 1.3.2.2 nathanw static void sunscpal_done __P((struct sunscpal_softc *)); 109 1.3.2.2 nathanw 110 1.3.2.2 nathanw static int sunscpal_select 111 1.3.2.2 nathanw __P((struct sunscpal_softc *, struct sunscpal_req *)); 112 1.3.2.2 nathanw static void sunscpal_reselect __P((struct sunscpal_softc *)); 113 1.3.2.2 nathanw 114 1.3.2.2 nathanw static int sunscpal_msg_in __P((struct sunscpal_softc *)); 115 1.3.2.2 nathanw static int sunscpal_msg_out __P((struct sunscpal_softc *)); 116 1.3.2.2 nathanw static int sunscpal_data_xfer __P((struct sunscpal_softc *, int)); 117 1.3.2.2 nathanw static int sunscpal_command __P((struct sunscpal_softc *)); 118 1.3.2.2 nathanw static int sunscpal_status __P((struct sunscpal_softc *)); 119 1.3.2.2 nathanw static void sunscpal_machine __P((struct sunscpal_softc *)); 120 1.3.2.2 nathanw 121 1.3.2.2 nathanw void sunscpal_abort __P((struct sunscpal_softc *)); 122 1.3.2.2 nathanw void sunscpal_cmd_timeout __P((void *)); 123 1.3.2.2 nathanw /* 124 1.3.2.3 nathanw * Action flags returned by the info_transfer functions: 125 1.3.2.2 nathanw * (These determine what happens next.) 126 1.3.2.2 nathanw */ 127 1.3.2.2 nathanw #define ACT_CONTINUE 0x00 /* No flags: expect another phase */ 128 1.3.2.2 nathanw #define ACT_DISCONNECT 0x01 /* Target is disconnecting */ 129 1.3.2.2 nathanw #define ACT_CMD_DONE 0x02 /* Need to call scsipi_done() */ 130 1.3.2.2 nathanw #define ACT_RESET_BUS 0x04 /* Need bus reset (cmd timeout) */ 131 1.3.2.2 nathanw #define ACT_WAIT_DMA 0x10 /* Wait for DMA to complete */ 132 1.3.2.2 nathanw 133 1.3.2.2 nathanw /***************************************************************** 134 1.3.2.2 nathanw * Debugging stuff 135 1.3.2.2 nathanw *****************************************************************/ 136 1.3.2.2 nathanw 137 1.3.2.2 nathanw #ifndef DDB 138 1.3.2.2 nathanw /* This is used only in recoverable places. */ 139 1.3.2.2 nathanw #ifndef Debugger 140 1.3.2.2 nathanw #define Debugger() printf("Debug: sunscpal.c:%d\n", __LINE__) 141 1.3.2.2 nathanw #endif 142 1.3.2.2 nathanw #endif 143 1.3.2.2 nathanw 144 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 145 1.3.2.2 nathanw 146 1.3.2.2 nathanw #define SUNSCPAL_DBG_BREAK 1 147 1.3.2.2 nathanw #define SUNSCPAL_DBG_CMDS 2 148 1.3.2.2 nathanw #define SUNSCPAL_DBG_DMA 4 149 1.3.2.2 nathanw int sunscpal_debug = 0; 150 1.3.2.2 nathanw #define SUNSCPAL_BREAK() \ 151 1.3.2.2 nathanw do { if (sunscpal_debug & SUNSCPAL_DBG_BREAK) Debugger(); } while (0) 152 1.3.2.2 nathanw static void sunscpal_show_scsi_cmd __P((struct scsipi_xfer *)); 153 1.3.2.2 nathanw #ifdef DDB 154 1.3.2.2 nathanw void sunscpal_clear_trace __P((void)); 155 1.3.2.2 nathanw void sunscpal_show_trace __P((void)); 156 1.3.2.2 nathanw void sunscpal_show_req __P((struct sunscpal_req *)); 157 1.3.2.2 nathanw void sunscpal_show_state __P((void)); 158 1.3.2.2 nathanw #endif /* DDB */ 159 1.3.2.2 nathanw #else /* SUNSCPAL_DEBUG */ 160 1.3.2.2 nathanw 161 1.3.2.2 nathanw #define SUNSCPAL_BREAK() /* nada */ 162 1.3.2.2 nathanw #define sunscpal_show_scsi_cmd(xs) /* nada */ 163 1.3.2.2 nathanw 164 1.3.2.2 nathanw #endif /* SUNSCPAL_DEBUG */ 165 1.3.2.2 nathanw 166 1.3.2.2 nathanw static char * 167 1.3.2.2 nathanw phase_names[8] = { 168 1.3.2.2 nathanw "DATA_OUT", 169 1.3.2.2 nathanw "DATA_IN", 170 1.3.2.2 nathanw "COMMAND", 171 1.3.2.2 nathanw "STATUS", 172 1.3.2.2 nathanw "UNSPEC1", 173 1.3.2.2 nathanw "UNSPEC2", 174 1.3.2.2 nathanw "MSG_OUT", 175 1.3.2.2 nathanw "MSG_IN", 176 1.3.2.2 nathanw }; 177 1.3.2.2 nathanw 178 1.3.2.2 nathanw #ifdef SUNSCPAL_USE_BUS_DMA 179 1.3.2.2 nathanw static void sunscpal_dma_alloc __P((struct sunscpal_softc *)); 180 1.3.2.2 nathanw static void sunscpal_dma_free __P((struct sunscpal_softc *)); 181 1.3.2.2 nathanw static void sunscpal_dma_setup __P((struct sunscpal_softc *)); 182 1.3.2.2 nathanw #else 183 1.3.2.2 nathanw #define sunscpal_dma_alloc(sc) (*sc->sc_dma_alloc)(sc) 184 1.3.2.2 nathanw #define sunscpal_dma_free(sc) (*sc->sc_dma_free)(sc) 185 1.3.2.2 nathanw #define sunscpal_dma_setup(sc) (*sc->sc_dma_setup)(sc) 186 1.3.2.2 nathanw #endif 187 1.3.2.2 nathanw static void sunscpal_minphys __P((struct buf *)); 188 1.3.2.2 nathanw 189 1.3.2.2 nathanw /***************************************************************** 190 1.3.2.2 nathanw * Actual chip control 191 1.3.2.2 nathanw *****************************************************************/ 192 1.3.2.2 nathanw 193 1.3.2.2 nathanw /* 194 1.3.2.2 nathanw * XXX: These timeouts might need to be tuned... 195 1.3.2.2 nathanw */ 196 1.3.2.2 nathanw 197 1.3.2.2 nathanw /* This one is used when waiting for a phase change. (X100uS.) */ 198 1.3.2.2 nathanw int sunscpal_wait_phase_timo = 1000 * 10 * 300; /* 5 min. */ 199 1.3.2.2 nathanw 200 1.3.2.2 nathanw /* These are used in the following inline functions. */ 201 1.3.2.2 nathanw int sunscpal_wait_req_timo = 1000 * 50; /* X2 = 100 mS. */ 202 1.3.2.2 nathanw int sunscpal_wait_nrq_timo = 1000 * 25; /* X2 = 50 mS. */ 203 1.3.2.2 nathanw 204 1.3.2.2 nathanw static __inline int sunscpal_wait_req __P((struct sunscpal_softc *)); 205 1.3.2.2 nathanw static __inline int sunscpal_wait_not_req __P((struct sunscpal_softc *)); 206 1.3.2.2 nathanw static __inline void sunscpal_sched_msgout __P((struct sunscpal_softc *, int)); 207 1.3.2.2 nathanw 208 1.3.2.2 nathanw /* Return zero on success. */ 209 1.3.2.2 nathanw static __inline int sunscpal_wait_req(sc) 210 1.3.2.2 nathanw struct sunscpal_softc *sc; 211 1.3.2.2 nathanw { 212 1.3.2.2 nathanw int timo = sunscpal_wait_req_timo; 213 1.3.2.2 nathanw for (;;) { 214 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_REQUEST) { 215 1.3.2.2 nathanw timo = 0; /* return 0 */ 216 1.3.2.2 nathanw break; 217 1.3.2.2 nathanw } 218 1.3.2.2 nathanw if (--timo < 0) 219 1.3.2.2 nathanw break; /* return -1 */ 220 1.3.2.2 nathanw delay(2); 221 1.3.2.2 nathanw } 222 1.3.2.2 nathanw return (timo); 223 1.3.2.2 nathanw } 224 1.3.2.2 nathanw 225 1.3.2.2 nathanw /* Return zero on success. */ 226 1.3.2.2 nathanw static __inline int sunscpal_wait_not_req(sc) 227 1.3.2.2 nathanw struct sunscpal_softc *sc; 228 1.3.2.2 nathanw { 229 1.3.2.2 nathanw int timo = sunscpal_wait_nrq_timo; 230 1.3.2.2 nathanw for (;;) { 231 1.3.2.2 nathanw if ((SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_REQUEST) == 0) { 232 1.3.2.2 nathanw timo = 0; /* return 0 */ 233 1.3.2.2 nathanw break; 234 1.3.2.2 nathanw } 235 1.3.2.2 nathanw if (--timo < 0) 236 1.3.2.2 nathanw break; /* return -1 */ 237 1.3.2.2 nathanw delay(2); 238 1.3.2.2 nathanw } 239 1.3.2.2 nathanw return (timo); 240 1.3.2.2 nathanw } 241 1.3.2.2 nathanw 242 1.3.2.2 nathanw /* 243 1.3.2.2 nathanw * These functions control DMA functions in the chipset independent of 244 1.3.2.2 nathanw * the host DMA implementation. 245 1.3.2.2 nathanw */ 246 1.3.2.2 nathanw static void sunscpal_dma_start __P((struct sunscpal_softc *)); 247 1.3.2.2 nathanw static void sunscpal_dma_poll __P((struct sunscpal_softc *)); 248 1.3.2.2 nathanw static void sunscpal_dma_stop __P((struct sunscpal_softc *)); 249 1.3.2.2 nathanw 250 1.3.2.2 nathanw static void 251 1.3.2.2 nathanw sunscpal_dma_start(sc) 252 1.3.2.2 nathanw struct sunscpal_softc *sc; 253 1.3.2.2 nathanw { 254 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 255 1.3.2.2 nathanw int xlen; 256 1.3.2.2 nathanw u_int16_t icr; 257 1.3.2.2 nathanw 258 1.3.2.2 nathanw xlen = sc->sc_reqlen; 259 1.3.2.2 nathanw 260 1.3.2.2 nathanw /* Let'er rip! */ 261 1.3.2.2 nathanw icr = SUNSCPAL_READ_2(sc, sunscpal_icr); 262 1.3.2.2 nathanw icr |= SUNSCPAL_ICR_DMA_ENABLE | 263 1.3.2.2 nathanw ((xlen & 1) ? 0 : SUNSCPAL_ICR_WORD_MODE) | 264 1.3.2.2 nathanw ((sr->sr_flags & SR_IMMED) ? 0 : SUNSCPAL_ICR_INTERRUPT_ENABLE); 265 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, icr); 266 1.3.2.2 nathanw 267 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_DOINGDMA; 268 1.3.2.2 nathanw 269 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 270 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_DMA) { 271 1.3.2.2 nathanw printf("sunscpal_dma_start: started, flags=0x%x\n", 272 1.3.2.2 nathanw sc->sc_state); 273 1.3.2.2 nathanw } 274 1.3.2.2 nathanw #endif 275 1.3.2.2 nathanw } 276 1.3.2.2 nathanw 277 1.3.2.2 nathanw #define ICR_MASK (SUNSCPAL_ICR_PARITY_ERROR | SUNSCPAL_ICR_BUS_ERROR | SUNSCPAL_ICR_INTERRUPT_REQUEST) 278 1.3.2.2 nathanw #define POLL_TIMO 50000 /* X100 = 5 sec. */ 279 1.3.2.2 nathanw 280 1.3.2.2 nathanw /* 281 1.3.2.2 nathanw * Poll (spin-wait) for DMA completion. 282 1.3.2.2 nathanw * Called right after xx_dma_start(), and 283 1.3.2.2 nathanw * xx_dma_stop() will be called next. 284 1.3.2.2 nathanw */ 285 1.3.2.2 nathanw static void 286 1.3.2.2 nathanw sunscpal_dma_poll(sc) 287 1.3.2.2 nathanw struct sunscpal_softc *sc; 288 1.3.2.2 nathanw { 289 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 290 1.3.2.2 nathanw int tmo; 291 1.3.2.2 nathanw 292 1.3.2.2 nathanw /* Make sure DMA started successfully. */ 293 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) 294 1.3.2.2 nathanw return; 295 1.3.2.2 nathanw 296 1.3.2.2 nathanw /* Wait for any "dma complete" or error bits. */ 297 1.3.2.2 nathanw tmo = POLL_TIMO; 298 1.3.2.2 nathanw for (;;) { 299 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & ICR_MASK) 300 1.3.2.2 nathanw break; 301 1.3.2.2 nathanw if (--tmo <= 0) { 302 1.3.2.2 nathanw printf("sc: DMA timeout (while polling)\n"); 303 1.3.2.2 nathanw /* Indicate timeout as MI code would. */ 304 1.3.2.2 nathanw sr->sr_flags |= SR_OVERDUE; 305 1.3.2.2 nathanw break; 306 1.3.2.2 nathanw } 307 1.3.2.2 nathanw delay(100); 308 1.3.2.2 nathanw } 309 1.3.2.2 nathanw SUNSCPAL_TRACE("sunscpal_dma_poll: waited %d\n", 310 1.3.2.2 nathanw POLL_TIMO - tmo); 311 1.3.2.2 nathanw 312 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 313 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_DMA) { 314 1.3.2.3 nathanw char buffer[64]; 315 1.3.2.3 nathanw bitmask_snprintf(SUNSCPAL_READ_2(sc, sunscpal_icr), SUNSCPAL_ICR_BITS, buffer, sizeof(buffer)); 316 1.3.2.3 nathanw printf("sunscpal_dma_poll: done, icr=%s\n", buffer); 317 1.3.2.2 nathanw } 318 1.3.2.2 nathanw #endif 319 1.3.2.2 nathanw } 320 1.3.2.2 nathanw 321 1.3.2.2 nathanw static void 322 1.3.2.2 nathanw sunscpal_dma_stop(sc) 323 1.3.2.2 nathanw struct sunscpal_softc *sc; 324 1.3.2.2 nathanw { 325 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 326 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 327 1.3.2.2 nathanw int resid, ntrans; 328 1.3.2.2 nathanw u_int16_t icr; 329 1.3.2.2 nathanw 330 1.3.2.2 nathanw if ((sc->sc_state & SUNSCPAL_DOINGDMA) == 0) { 331 1.3.2.2 nathanw #ifdef DEBUG 332 1.3.2.2 nathanw printf("sunscpal_dma_stop: dma not running\n"); 333 1.3.2.2 nathanw #endif 334 1.3.2.2 nathanw return; 335 1.3.2.2 nathanw } 336 1.3.2.2 nathanw sc->sc_state &= ~SUNSCPAL_DOINGDMA; 337 1.3.2.2 nathanw 338 1.3.2.2 nathanw /* First, halt the DMA engine. */ 339 1.3.2.2 nathanw icr = SUNSCPAL_READ_2(sc, sunscpal_icr); 340 1.3.2.2 nathanw icr &= ~(SUNSCPAL_ICR_DMA_ENABLE | SUNSCPAL_ICR_WORD_MODE | SUNSCPAL_ICR_INTERRUPT_ENABLE); 341 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, icr); 342 1.3.2.2 nathanw 343 1.3.2.2 nathanw #ifdef SUNSCPAL_USE_BUS_DMA 344 1.3.2.2 nathanw /* 345 1.3.2.2 nathanw * XXX - this function is supposed to be independent of 346 1.3.2.2 nathanw * the host's DMA implementation. 347 1.3.2.2 nathanw */ 348 1.3.2.2 nathanw { 349 1.3.2.2 nathanw sunscpal_dma_handle_t dh = sr->sr_dma_hand; 350 1.3.2.2 nathanw 351 1.3.2.2 nathanw /* sync the DMA map: */ 352 1.3.2.2 nathanw bus_dmamap_sync(sc->sunscpal_dmat, dh->dh_dmamap, 0, dh->dh_maplen, 353 1.3.2.2 nathanw ((xs->xs_control & XS_CTL_DATA_OUT) == 0 ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE)); 354 1.3.2.2 nathanw } 355 1.3.2.2 nathanw #endif /* SUNSCPAL_USE_BUS_DMA */ 356 1.3.2.2 nathanw 357 1.3.2.2 nathanw 358 1.3.2.2 nathanw if (icr & (SUNSCPAL_ICR_BUS_ERROR)) { 359 1.3.2.3 nathanw char buffer[64]; 360 1.3.2.3 nathanw bitmask_snprintf(icr, SUNSCPAL_ICR_BITS, buffer, sizeof(buffer)); 361 1.3.2.3 nathanw printf("sc: DMA error, icr=%s, reset\n", buffer); 362 1.3.2.2 nathanw sr->sr_xs->error = XS_DRIVER_STUFFUP; 363 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 364 1.3.2.2 nathanw goto out; 365 1.3.2.2 nathanw } 366 1.3.2.2 nathanw 367 1.3.2.2 nathanw /* Note that timeout may have set the error flag. */ 368 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) 369 1.3.2.2 nathanw goto out; 370 1.3.2.2 nathanw 371 1.3.2.2 nathanw /* XXX: Wait for DMA to actually finish? */ 372 1.3.2.2 nathanw 373 1.3.2.2 nathanw /* 374 1.3.2.2 nathanw * Now try to figure out how much actually transferred 375 1.3.2.2 nathanw */ 376 1.3.2.2 nathanw 377 1.3.2.2 nathanw resid = SUNSCPAL_DMA_COUNT_FLIP(SUNSCPAL_READ_2(sc, sunscpal_dma_count)); 378 1.3.2.2 nathanw ntrans = sc->sc_reqlen - resid; 379 1.3.2.2 nathanw 380 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 381 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_DMA) { 382 1.3.2.2 nathanw printf("sunscpal_dma_stop: resid=0x%x ntrans=0x%x\n", 383 1.3.2.2 nathanw resid, ntrans); 384 1.3.2.2 nathanw } 385 1.3.2.2 nathanw #endif 386 1.3.2.2 nathanw 387 1.3.2.2 nathanw if (ntrans < sc->sc_min_dma_len) { 388 1.3.2.2 nathanw printf("sc: DMA count: 0x%x\n", resid); 389 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 390 1.3.2.2 nathanw goto out; 391 1.3.2.2 nathanw } 392 1.3.2.2 nathanw if (ntrans > sc->sc_datalen) 393 1.3.2.2 nathanw panic("sunscpal_dma_stop: excess transfer"); 394 1.3.2.2 nathanw 395 1.3.2.2 nathanw /* Adjust data pointer */ 396 1.3.2.2 nathanw sc->sc_dataptr += ntrans; 397 1.3.2.2 nathanw sc->sc_datalen -= ntrans; 398 1.3.2.2 nathanw 399 1.3.2.2 nathanw /* 400 1.3.2.2 nathanw * After a read, we may need to clean-up 401 1.3.2.2 nathanw * "Left-over bytes" (yuck!) 402 1.3.2.2 nathanw */ 403 1.3.2.2 nathanw if (((xs->xs_control & XS_CTL_DATA_OUT) == 0) && 404 1.3.2.2 nathanw ((icr & SUNSCPAL_ICR_ODD_LENGTH) != 0)) 405 1.3.2.2 nathanw { 406 1.3.2.2 nathanw #ifdef DEBUG 407 1.3.2.2 nathanw printf("sc: Got Left-over bytes!\n"); 408 1.3.2.2 nathanw #endif 409 1.3.2.2 nathanw *(sc->sc_dataptr++) = SUNSCPAL_READ_1(sc, sunscpal_data); 410 1.3.2.2 nathanw sc->sc_datalen--; 411 1.3.2.2 nathanw } 412 1.3.2.2 nathanw 413 1.3.2.2 nathanw out: 414 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_count, SUNSCPAL_DMA_COUNT_FLIP(0)); 415 1.3.2.2 nathanw 416 1.3.2.2 nathanw } 417 1.3.2.2 nathanw 418 1.3.2.2 nathanw /* Ask the target for a MSG_OUT phase. */ 419 1.3.2.2 nathanw static __inline void 420 1.3.2.2 nathanw sunscpal_sched_msgout(sc, msg_code) 421 1.3.2.2 nathanw struct sunscpal_softc *sc; 422 1.3.2.2 nathanw int msg_code; 423 1.3.2.2 nathanw { 424 1.3.2.2 nathanw /* 425 1.3.2.2 nathanw * This controller does not allow you to assert ATN, which 426 1.3.2.2 nathanw * will eventually leave us with no option other than to reset 427 1.3.2.2 nathanw * the bus. We keep this function as a placeholder, though, 428 1.3.2.2 nathanw * and this printf will eventually go away or get #ifdef'ed: 429 1.3.2.2 nathanw */ 430 1.3.2.2 nathanw printf("sunscpal_sched_msgout: trying to schedule 0x%0x\n", msg_code); 431 1.3.2.2 nathanw sc->sc_msgpriq |= msg_code; 432 1.3.2.2 nathanw } 433 1.3.2.2 nathanw 434 1.3.2.2 nathanw int 435 1.3.2.2 nathanw sunscpal_pio_out(sc, phase, count, data) 436 1.3.2.2 nathanw struct sunscpal_softc *sc; 437 1.3.2.2 nathanw int phase, count; 438 1.3.2.2 nathanw unsigned char *data; 439 1.3.2.2 nathanw { 440 1.3.2.2 nathanw int resid; 441 1.3.2.2 nathanw 442 1.3.2.2 nathanw resid = count; 443 1.3.2.2 nathanw while (resid > 0) { 444 1.3.2.2 nathanw if (!SUNSCPAL_BUSY(sc)) { 445 1.3.2.2 nathanw SUNSCPAL_TRACE("pio_out: lost BSY, resid=%d\n", resid); 446 1.3.2.2 nathanw break; 447 1.3.2.2 nathanw } 448 1.3.2.2 nathanw if (sunscpal_wait_req(sc)) { 449 1.3.2.2 nathanw SUNSCPAL_TRACE("pio_out: no REQ, resid=%d\n", resid); 450 1.3.2.2 nathanw break; 451 1.3.2.2 nathanw } 452 1.3.2.2 nathanw if (SUNSCPAL_BUS_PHASE(SUNSCPAL_READ_2(sc, sunscpal_icr)) != phase) 453 1.3.2.2 nathanw break; 454 1.3.2.2 nathanw 455 1.3.2.2 nathanw /* Put the data on the bus. */ 456 1.3.2.2 nathanw if (data) { 457 1.3.2.2 nathanw SUNSCPAL_BYTE_WRITE(sc, phase, *data++); 458 1.3.2.2 nathanw } else { 459 1.3.2.2 nathanw SUNSCPAL_BYTE_WRITE(sc, phase, 0); 460 1.3.2.2 nathanw } 461 1.3.2.2 nathanw 462 1.3.2.2 nathanw --resid; 463 1.3.2.2 nathanw } 464 1.3.2.2 nathanw 465 1.3.2.2 nathanw return (count - resid); 466 1.3.2.2 nathanw } 467 1.3.2.2 nathanw 468 1.3.2.2 nathanw 469 1.3.2.2 nathanw int 470 1.3.2.2 nathanw sunscpal_pio_in(sc, phase, count, data) 471 1.3.2.2 nathanw struct sunscpal_softc *sc; 472 1.3.2.2 nathanw int phase, count; 473 1.3.2.2 nathanw unsigned char *data; 474 1.3.2.2 nathanw { 475 1.3.2.2 nathanw int resid; 476 1.3.2.2 nathanw 477 1.3.2.2 nathanw resid = count; 478 1.3.2.2 nathanw while (resid > 0) { 479 1.3.2.2 nathanw if (!SUNSCPAL_BUSY(sc)) { 480 1.3.2.2 nathanw SUNSCPAL_TRACE("pio_in: lost BSY, resid=%d\n", resid); 481 1.3.2.2 nathanw break; 482 1.3.2.2 nathanw } 483 1.3.2.2 nathanw if (sunscpal_wait_req(sc)) { 484 1.3.2.2 nathanw SUNSCPAL_TRACE("pio_in: no REQ, resid=%d\n", resid); 485 1.3.2.2 nathanw break; 486 1.3.2.2 nathanw } 487 1.3.2.2 nathanw /* A phase change is not valid until AFTER REQ rises! */ 488 1.3.2.2 nathanw if (SUNSCPAL_BUS_PHASE(SUNSCPAL_READ_2(sc, sunscpal_icr)) != phase) 489 1.3.2.2 nathanw break; 490 1.3.2.2 nathanw 491 1.3.2.2 nathanw /* Read the data bus. */ 492 1.3.2.2 nathanw if (data) 493 1.3.2.2 nathanw *data++ = SUNSCPAL_BYTE_READ(sc, phase); 494 1.3.2.2 nathanw else 495 1.3.2.2 nathanw (void) SUNSCPAL_BYTE_READ(sc, phase); 496 1.3.2.2 nathanw 497 1.3.2.2 nathanw --resid; 498 1.3.2.2 nathanw } 499 1.3.2.2 nathanw 500 1.3.2.2 nathanw return (count - resid); 501 1.3.2.2 nathanw } 502 1.3.2.2 nathanw 503 1.3.2.2 nathanw 504 1.3.2.2 nathanw void 505 1.3.2.2 nathanw sunscpal_init(sc) 506 1.3.2.2 nathanw struct sunscpal_softc *sc; 507 1.3.2.2 nathanw { 508 1.3.2.2 nathanw int i, j; 509 1.3.2.2 nathanw 510 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 511 1.3.2.2 nathanw sunscpal_debug_sc = sc; 512 1.3.2.2 nathanw #endif 513 1.3.2.2 nathanw 514 1.3.2.2 nathanw for (i = 0; i < SUNSCPAL_OPENINGS; i++) 515 1.3.2.2 nathanw sc->sc_ring[i].sr_xs = NULL; 516 1.3.2.2 nathanw for (i = 0; i < 8; i++) 517 1.3.2.2 nathanw for (j = 0; j < 8; j++) 518 1.3.2.2 nathanw sc->sc_matrix[i][j] = NULL; 519 1.3.2.2 nathanw 520 1.3.2.2 nathanw sc->sc_prevphase = SUNSCPAL_PHASE_INVALID; 521 1.3.2.2 nathanw sc->sc_state = SUNSCPAL_IDLE; 522 1.3.2.2 nathanw 523 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, 0); 524 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_addr_h, 0); 525 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_addr_l, 0); 526 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_count, SUNSCPAL_DMA_COUNT_FLIP(0)); 527 1.3.2.2 nathanw 528 1.3.2.2 nathanw SUNSCPAL_CLR_INTR(sc); 529 1.3.2.2 nathanw 530 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 531 1.3.2.2 nathanw if (sc->sc_intr_on) { 532 1.3.2.2 nathanw SUNSCPAL_TRACE("init: intr ON\n", 0); 533 1.3.2.2 nathanw sc->sc_intr_on(sc); 534 1.3.2.2 nathanw } 535 1.3.2.2 nathanw } 536 1.3.2.2 nathanw 537 1.3.2.2 nathanw 538 1.3.2.2 nathanw static void 539 1.3.2.2 nathanw sunscpal_reset_scsibus(sc) 540 1.3.2.2 nathanw struct sunscpal_softc *sc; 541 1.3.2.2 nathanw { 542 1.3.2.2 nathanw 543 1.3.2.2 nathanw SUNSCPAL_TRACE("reset_scsibus, cur=0x%x\n", 544 1.3.2.2 nathanw (long) sc->sc_current); 545 1.3.2.2 nathanw 546 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, SUNSCPAL_ICR_RESET); 547 1.3.2.2 nathanw delay(500); 548 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, 0); 549 1.3.2.2 nathanw 550 1.3.2.2 nathanw SUNSCPAL_CLR_INTR(sc); 551 1.3.2.2 nathanw /* XXX - Need long delay here! */ 552 1.3.2.2 nathanw delay(100000); 553 1.3.2.2 nathanw 554 1.3.2.2 nathanw /* XXX - Need to cancel disconnected requests. */ 555 1.3.2.2 nathanw } 556 1.3.2.2 nathanw 557 1.3.2.2 nathanw 558 1.3.2.2 nathanw /* 559 1.3.2.2 nathanw * Interrupt handler for the SCSI Bus Controller (SBC) 560 1.3.2.2 nathanw * This may also called for a DMA timeout (at splbio). 561 1.3.2.2 nathanw */ 562 1.3.2.2 nathanw int 563 1.3.2.2 nathanw sunscpal_intr(arg) 564 1.3.2.2 nathanw void *arg; 565 1.3.2.2 nathanw { 566 1.3.2.2 nathanw struct sunscpal_softc *sc = arg; 567 1.3.2.2 nathanw int claimed = 0; 568 1.3.2.2 nathanw 569 1.3.2.2 nathanw /* 570 1.3.2.2 nathanw * Do not touch SBC regs here unless sc_current == NULL 571 1.3.2.2 nathanw * or it will complain about "register conflict" errors. 572 1.3.2.2 nathanw * Instead, just let sunscpal_machine() deal with it. 573 1.3.2.2 nathanw */ 574 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: top, state=%d\n", sc->sc_state); 575 1.3.2.2 nathanw 576 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) { 577 1.3.2.2 nathanw /* 578 1.3.2.2 nathanw * Might be reselect. sunscpal_reselect() will check, 579 1.3.2.2 nathanw * and set up the connection if so. This will verify 580 1.3.2.2 nathanw * that sc_current == NULL at the beginning... 581 1.3.2.2 nathanw */ 582 1.3.2.2 nathanw 583 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 584 1.3.2.2 nathanw if (sc->sc_intr_off) { 585 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: for reselect, intr off\n", 0); 586 1.3.2.2 nathanw sc->sc_intr_off(sc); 587 1.3.2.2 nathanw } 588 1.3.2.2 nathanw 589 1.3.2.2 nathanw sunscpal_reselect(sc); 590 1.3.2.2 nathanw } 591 1.3.2.2 nathanw 592 1.3.2.2 nathanw /* 593 1.3.2.2 nathanw * The remaining documented interrupt causes are a DMA complete 594 1.3.2.2 nathanw * condition. 595 1.3.2.2 nathanw * 596 1.3.2.2 nathanw * The procedure is to let sunscpal_machine() figure out what 597 1.3.2.2 nathanw * to do next. 598 1.3.2.2 nathanw */ 599 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_WORKING) { 600 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: call machine, cur=0x%x\n", 601 1.3.2.2 nathanw (long) sc->sc_current); 602 1.3.2.2 nathanw /* This will usually free-up the nexus. */ 603 1.3.2.2 nathanw sunscpal_machine(sc); 604 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: machine done, cur=0x%x\n", 605 1.3.2.2 nathanw (long) sc->sc_current); 606 1.3.2.2 nathanw claimed = 1; 607 1.3.2.2 nathanw } 608 1.3.2.2 nathanw 609 1.3.2.2 nathanw /* Maybe we can run some commands now... */ 610 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) { 611 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: call sched, cur=0x%x\n", 612 1.3.2.2 nathanw (long) sc->sc_current); 613 1.3.2.2 nathanw sunscpal_sched(sc); 614 1.3.2.2 nathanw SUNSCPAL_TRACE("intr: sched done, cur=0x%x\n", 615 1.3.2.2 nathanw (long) sc->sc_current); 616 1.3.2.2 nathanw } 617 1.3.2.2 nathanw 618 1.3.2.2 nathanw return claimed; 619 1.3.2.2 nathanw } 620 1.3.2.2 nathanw 621 1.3.2.2 nathanw 622 1.3.2.2 nathanw /* 623 1.3.2.2 nathanw * Abort the current command (i.e. due to timeout) 624 1.3.2.2 nathanw */ 625 1.3.2.2 nathanw void 626 1.3.2.2 nathanw sunscpal_abort(sc) 627 1.3.2.2 nathanw struct sunscpal_softc *sc; 628 1.3.2.2 nathanw { 629 1.3.2.2 nathanw 630 1.3.2.2 nathanw /* 631 1.3.2.2 nathanw * Finish it now. If DMA is in progress, we 632 1.3.2.2 nathanw * can not call sunscpal_sched_msgout() because 633 1.3.2.2 nathanw * that hits the SBC (avoid DMA conflict). 634 1.3.2.2 nathanw */ 635 1.3.2.2 nathanw 636 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 637 1.3.2.2 nathanw if (sc->sc_intr_off) { 638 1.3.2.2 nathanw SUNSCPAL_TRACE("abort: intr off\n", 0); 639 1.3.2.2 nathanw sc->sc_intr_off(sc); 640 1.3.2.2 nathanw } 641 1.3.2.2 nathanw 642 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 643 1.3.2.2 nathanw if ((sc->sc_state & SUNSCPAL_DOINGDMA) == 0) { 644 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 645 1.3.2.2 nathanw } 646 1.3.2.2 nathanw SUNSCPAL_TRACE("abort: call machine, cur=0x%x\n", 647 1.3.2.2 nathanw (long) sc->sc_current); 648 1.3.2.2 nathanw sunscpal_machine(sc); 649 1.3.2.2 nathanw SUNSCPAL_TRACE("abort: machine done, cur=0x%x\n", 650 1.3.2.2 nathanw (long) sc->sc_current); 651 1.3.2.2 nathanw 652 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 653 1.3.2.2 nathanw if (sc->sc_intr_on) { 654 1.3.2.2 nathanw SUNSCPAL_TRACE("abort: intr ON\n", 0); 655 1.3.2.2 nathanw sc->sc_intr_on(sc); 656 1.3.2.2 nathanw } 657 1.3.2.2 nathanw } 658 1.3.2.2 nathanw 659 1.3.2.2 nathanw /* 660 1.3.2.2 nathanw * Timeout handler, scheduled for each SCSI command. 661 1.3.2.2 nathanw */ 662 1.3.2.2 nathanw void 663 1.3.2.2 nathanw sunscpal_cmd_timeout(arg) 664 1.3.2.2 nathanw void *arg; 665 1.3.2.2 nathanw { 666 1.3.2.2 nathanw struct sunscpal_req *sr = arg; 667 1.3.2.2 nathanw struct scsipi_xfer *xs; 668 1.3.2.2 nathanw struct scsipi_periph *periph; 669 1.3.2.2 nathanw struct sunscpal_softc *sc; 670 1.3.2.2 nathanw int s; 671 1.3.2.2 nathanw 672 1.3.2.2 nathanw s = splbio(); 673 1.3.2.2 nathanw 674 1.3.2.2 nathanw /* Get all our variables... */ 675 1.3.2.2 nathanw xs = sr->sr_xs; 676 1.3.2.2 nathanw if (xs == NULL) { 677 1.3.2.2 nathanw printf("sunscpal_cmd_timeout: no scsipi_xfer\n"); 678 1.3.2.2 nathanw goto out; 679 1.3.2.2 nathanw } 680 1.3.2.2 nathanw periph = xs->xs_periph; 681 1.3.2.2 nathanw sc = (void *)periph->periph_channel->chan_adapter->adapt_dev; 682 1.3.2.2 nathanw 683 1.3.2.2 nathanw printf("%s: cmd timeout, targ=%d, lun=%d\n", 684 1.3.2.2 nathanw sc->sc_dev.dv_xname, 685 1.3.2.2 nathanw sr->sr_target, sr->sr_lun); 686 1.3.2.2 nathanw 687 1.3.2.2 nathanw /* 688 1.3.2.2 nathanw * Mark the overdue job as failed, and arrange for 689 1.3.2.2 nathanw * sunscpal_machine to terminate it. If the victim 690 1.3.2.2 nathanw * is the current job, call sunscpal_machine() now. 691 1.3.2.2 nathanw * Otherwise arrange for sunscpal_sched() to do it. 692 1.3.2.2 nathanw */ 693 1.3.2.2 nathanw sr->sr_flags |= SR_OVERDUE; 694 1.3.2.2 nathanw if (sc->sc_current == sr) { 695 1.3.2.2 nathanw SUNSCPAL_TRACE("cmd_tmo: call abort, sr=0x%x\n", (long) sr); 696 1.3.2.2 nathanw sunscpal_abort(sc); 697 1.3.2.2 nathanw } else { 698 1.3.2.2 nathanw /* 699 1.3.2.2 nathanw * The driver may be idle, or busy with another job. 700 1.3.2.2 nathanw * Arrange for sunscpal_sched() to do the deed. 701 1.3.2.2 nathanw */ 702 1.3.2.2 nathanw SUNSCPAL_TRACE("cmd_tmo: clear matrix, t/l=0x%02x\n", 703 1.3.2.2 nathanw (sr->sr_target << 4) | sr->sr_lun); 704 1.3.2.2 nathanw sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL; 705 1.3.2.2 nathanw } 706 1.3.2.2 nathanw 707 1.3.2.2 nathanw /* 708 1.3.2.2 nathanw * We may have aborted the current job, or may have 709 1.3.2.2 nathanw * already been idle. In either case, we should now 710 1.3.2.2 nathanw * be idle, so try to start another job. 711 1.3.2.2 nathanw */ 712 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) { 713 1.3.2.2 nathanw SUNSCPAL_TRACE("cmd_tmo: call sched, cur=0x%x\n", 714 1.3.2.2 nathanw (long) sc->sc_current); 715 1.3.2.2 nathanw sunscpal_sched(sc); 716 1.3.2.2 nathanw SUNSCPAL_TRACE("cmd_tmo: sched done, cur=0x%x\n", 717 1.3.2.2 nathanw (long) sc->sc_current); 718 1.3.2.2 nathanw } 719 1.3.2.2 nathanw 720 1.3.2.2 nathanw out: 721 1.3.2.2 nathanw splx(s); 722 1.3.2.2 nathanw } 723 1.3.2.2 nathanw 724 1.3.2.2 nathanw 725 1.3.2.2 nathanw /***************************************************************** 726 1.3.2.2 nathanw * Interface to higher level 727 1.3.2.2 nathanw *****************************************************************/ 728 1.3.2.2 nathanw 729 1.3.2.2 nathanw 730 1.3.2.2 nathanw /* 731 1.3.2.2 nathanw * Enter a new SCSI command into the "issue" queue, and 732 1.3.2.2 nathanw * if there is work to do, start it going. 733 1.3.2.2 nathanw * 734 1.3.2.2 nathanw * WARNING: This can be called recursively! 735 1.3.2.2 nathanw * (see comment in sunscpal_done) 736 1.3.2.2 nathanw */ 737 1.3.2.2 nathanw void 738 1.3.2.2 nathanw sunscpal_scsipi_request(chan, req, arg) 739 1.3.2.2 nathanw struct scsipi_channel *chan; 740 1.3.2.2 nathanw scsipi_adapter_req_t req; 741 1.3.2.2 nathanw void *arg; 742 1.3.2.2 nathanw { 743 1.3.2.2 nathanw struct scsipi_xfer *xs; 744 1.3.2.2 nathanw struct scsipi_periph *periph; 745 1.3.2.2 nathanw struct sunscpal_softc *sc = (void *)chan->chan_adapter->adapt_dev; 746 1.3.2.2 nathanw struct sunscpal_req *sr; 747 1.3.2.2 nathanw int s, i, flags; 748 1.3.2.2 nathanw 749 1.3.2.2 nathanw switch (req) { 750 1.3.2.2 nathanw case ADAPTER_REQ_RUN_XFER: 751 1.3.2.2 nathanw xs = arg; 752 1.3.2.2 nathanw periph = xs->xs_periph; 753 1.3.2.2 nathanw flags = xs->xs_control; 754 1.3.2.2 nathanw 755 1.3.2.2 nathanw if (sc->sc_flags & SUNSCPAL_FORCE_POLLING) 756 1.3.2.2 nathanw flags |= XS_CTL_POLL; 757 1.3.2.2 nathanw 758 1.3.2.2 nathanw if (flags & XS_CTL_DATA_UIO) 759 1.3.2.2 nathanw panic("sunscpal: scsi data uio requested"); 760 1.3.2.2 nathanw 761 1.3.2.2 nathanw s = splbio(); 762 1.3.2.2 nathanw 763 1.3.2.2 nathanw if (flags & XS_CTL_POLL) { 764 1.3.2.2 nathanw /* Terminate any current command. */ 765 1.3.2.2 nathanw sr = sc->sc_current; 766 1.3.2.2 nathanw if (sr) { 767 1.3.2.2 nathanw printf("%s: polled request aborting %d/%d\n", 768 1.3.2.2 nathanw sc->sc_dev.dv_xname, 769 1.3.2.2 nathanw sr->sr_target, sr->sr_lun); 770 1.3.2.2 nathanw sunscpal_abort(sc); 771 1.3.2.2 nathanw } 772 1.3.2.2 nathanw if (sc->sc_state != SUNSCPAL_IDLE) { 773 1.3.2.2 nathanw panic("sunscpal_scsi_cmd: polled request, abort failed"); 774 1.3.2.2 nathanw } 775 1.3.2.2 nathanw } 776 1.3.2.2 nathanw 777 1.3.2.2 nathanw /* 778 1.3.2.2 nathanw * Find lowest empty slot in ring buffer. 779 1.3.2.2 nathanw * XXX: What about "fairness" and cmd order? 780 1.3.2.2 nathanw */ 781 1.3.2.2 nathanw for (i = 0; i < SUNSCPAL_OPENINGS; i++) 782 1.3.2.2 nathanw if (sc->sc_ring[i].sr_xs == NULL) 783 1.3.2.2 nathanw goto new; 784 1.3.2.2 nathanw 785 1.3.2.2 nathanw xs->error = XS_RESOURCE_SHORTAGE; 786 1.3.2.2 nathanw SUNSCPAL_TRACE("scsipi_cmd: no openings, rv=%d\n", rv); 787 1.3.2.2 nathanw goto out; 788 1.3.2.2 nathanw 789 1.3.2.2 nathanw new: 790 1.3.2.2 nathanw /* Create queue entry */ 791 1.3.2.2 nathanw sr = &sc->sc_ring[i]; 792 1.3.2.2 nathanw sr->sr_xs = xs; 793 1.3.2.2 nathanw sr->sr_target = xs->xs_periph->periph_target; 794 1.3.2.2 nathanw sr->sr_lun = xs->xs_periph->periph_lun; 795 1.3.2.2 nathanw sr->sr_dma_hand = NULL; 796 1.3.2.2 nathanw sr->sr_dataptr = xs->data; 797 1.3.2.2 nathanw sr->sr_datalen = xs->datalen; 798 1.3.2.2 nathanw sr->sr_flags = (flags & XS_CTL_POLL) ? SR_IMMED : 0; 799 1.3.2.2 nathanw sr->sr_status = -1; /* no value */ 800 1.3.2.2 nathanw sc->sc_ncmds++; 801 1.3.2.2 nathanw 802 1.3.2.2 nathanw SUNSCPAL_TRACE("scsipi_cmd: new sr=0x%x\n", (long)sr); 803 1.3.2.2 nathanw 804 1.3.2.2 nathanw if (flags & XS_CTL_POLL) { 805 1.3.2.2 nathanw /* Force this new command to be next. */ 806 1.3.2.2 nathanw sc->sc_rr = i; 807 1.3.2.2 nathanw } 808 1.3.2.2 nathanw 809 1.3.2.2 nathanw /* 810 1.3.2.2 nathanw * If we were idle, run some commands... 811 1.3.2.2 nathanw */ 812 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) { 813 1.3.2.2 nathanw SUNSCPAL_TRACE("scsipi_cmd: call sched, cur=0x%x\n", 814 1.3.2.2 nathanw (long) sc->sc_current); 815 1.3.2.2 nathanw sunscpal_sched(sc); 816 1.3.2.2 nathanw SUNSCPAL_TRACE("scsipi_cmd: sched done, cur=0x%x\n", 817 1.3.2.2 nathanw (long) sc->sc_current); 818 1.3.2.2 nathanw } 819 1.3.2.2 nathanw 820 1.3.2.2 nathanw if (flags & XS_CTL_POLL) { 821 1.3.2.2 nathanw /* Make sure sunscpal_sched() finished it. */ 822 1.3.2.2 nathanw if ((xs->xs_status & XS_STS_DONE) == 0) 823 1.3.2.2 nathanw panic("sunscpal_scsi_cmd: poll didn't finish"); 824 1.3.2.2 nathanw } 825 1.3.2.2 nathanw 826 1.3.2.2 nathanw out: 827 1.3.2.2 nathanw splx(s); 828 1.3.2.2 nathanw return; 829 1.3.2.3 nathanw 830 1.3.2.2 nathanw case ADAPTER_REQ_GROW_RESOURCES: 831 1.3.2.3 nathanw /* XXX Not supported. */ 832 1.3.2.3 nathanw return; 833 1.3.2.3 nathanw 834 1.3.2.2 nathanw case ADAPTER_REQ_SET_XFER_MODE: 835 1.3.2.3 nathanw { 836 1.3.2.3 nathanw /* 837 1.3.2.3 nathanw * We don't support Sync, Wide, or Tagged Queueing. 838 1.3.2.3 nathanw * Just callback now, to report this. 839 1.3.2.3 nathanw */ 840 1.3.2.3 nathanw struct scsipi_xfer_mode *xm = arg; 841 1.3.2.3 nathanw 842 1.3.2.3 nathanw xm->xm_mode = 0; 843 1.3.2.3 nathanw xm->xm_period = 0; 844 1.3.2.3 nathanw xm->xm_offset = 0; 845 1.3.2.3 nathanw scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm); 846 1.3.2.2 nathanw return; 847 1.3.2.3 nathanw } 848 1.3.2.2 nathanw } 849 1.3.2.2 nathanw } 850 1.3.2.2 nathanw 851 1.3.2.2 nathanw 852 1.3.2.2 nathanw /* 853 1.3.2.2 nathanw * POST PROCESSING OF SCSI_CMD (usually current) 854 1.3.2.2 nathanw * Called by sunscpal_sched(), sunscpal_machine() 855 1.3.2.2 nathanw */ 856 1.3.2.2 nathanw static void 857 1.3.2.2 nathanw sunscpal_done(sc) 858 1.3.2.2 nathanw struct sunscpal_softc *sc; 859 1.3.2.2 nathanw { 860 1.3.2.2 nathanw struct sunscpal_req *sr; 861 1.3.2.2 nathanw struct scsipi_xfer *xs; 862 1.3.2.2 nathanw 863 1.3.2.2 nathanw #ifdef DIAGNOSTIC 864 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) 865 1.3.2.2 nathanw panic("sunscpal_done: state=idle"); 866 1.3.2.2 nathanw if (sc->sc_current == NULL) 867 1.3.2.2 nathanw panic("sunscpal_done: current=0"); 868 1.3.2.2 nathanw #endif 869 1.3.2.2 nathanw 870 1.3.2.2 nathanw sr = sc->sc_current; 871 1.3.2.2 nathanw xs = sr->sr_xs; 872 1.3.2.2 nathanw 873 1.3.2.2 nathanw SUNSCPAL_TRACE("done: top, cur=0x%x\n", (long) sc->sc_current); 874 1.3.2.2 nathanw 875 1.3.2.2 nathanw /* 876 1.3.2.2 nathanw * Clean up DMA resources for this command. 877 1.3.2.2 nathanw */ 878 1.3.2.2 nathanw if (sr->sr_dma_hand) { 879 1.3.2.2 nathanw SUNSCPAL_TRACE("done: dma_free, dh=0x%x\n", 880 1.3.2.2 nathanw (long) sr->sr_dma_hand); 881 1.3.2.2 nathanw sunscpal_dma_free(sc); 882 1.3.2.2 nathanw } 883 1.3.2.2 nathanw #ifdef DIAGNOSTIC 884 1.3.2.2 nathanw if (sr->sr_dma_hand) 885 1.3.2.2 nathanw panic("sunscpal_done: dma free did not"); 886 1.3.2.2 nathanw #endif 887 1.3.2.2 nathanw 888 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) { 889 1.3.2.2 nathanw SUNSCPAL_TRACE("done: aborting, error=%d\n", xs->error); 890 1.3.2.2 nathanw if (xs->error == XS_NOERROR) 891 1.3.2.2 nathanw xs->error = XS_TIMEOUT; 892 1.3.2.2 nathanw } 893 1.3.2.2 nathanw 894 1.3.2.2 nathanw SUNSCPAL_TRACE("done: check error=%d\n", (long) xs->error); 895 1.3.2.2 nathanw 896 1.3.2.2 nathanw /* If error is already set, ignore sr_status value. */ 897 1.3.2.2 nathanw if (xs->error != XS_NOERROR) 898 1.3.2.2 nathanw goto finish; 899 1.3.2.2 nathanw 900 1.3.2.2 nathanw SUNSCPAL_TRACE("done: check status=%d\n", sr->sr_status); 901 1.3.2.2 nathanw 902 1.3.2.2 nathanw xs->status = sr->sr_status; 903 1.3.2.2 nathanw switch (sr->sr_status) { 904 1.3.2.2 nathanw case SCSI_OK: /* 0 */ 905 1.3.2.2 nathanw break; 906 1.3.2.2 nathanw 907 1.3.2.2 nathanw case SCSI_CHECK: 908 1.3.2.2 nathanw case SCSI_BUSY: 909 1.3.2.2 nathanw xs->error = XS_BUSY; 910 1.3.2.2 nathanw break; 911 1.3.2.2 nathanw 912 1.3.2.2 nathanw case -1: 913 1.3.2.2 nathanw /* This is our "impossible" initial value. */ 914 1.3.2.2 nathanw /* fallthrough */ 915 1.3.2.2 nathanw default: 916 1.3.2.2 nathanw printf("%s: target %d, bad status=%d\n", 917 1.3.2.2 nathanw sc->sc_dev.dv_xname, sr->sr_target, sr->sr_status); 918 1.3.2.2 nathanw xs->error = XS_DRIVER_STUFFUP; 919 1.3.2.2 nathanw break; 920 1.3.2.2 nathanw } 921 1.3.2.2 nathanw 922 1.3.2.2 nathanw finish: 923 1.3.2.2 nathanw 924 1.3.2.2 nathanw SUNSCPAL_TRACE("done: finish, error=%d\n", xs->error); 925 1.3.2.2 nathanw 926 1.3.2.2 nathanw /* 927 1.3.2.2 nathanw * Dequeue the finished command, but don't clear sc_state until 928 1.3.2.2 nathanw * after the call to scsipi_done(), because that may call back to 929 1.3.2.2 nathanw * sunscpal_scsi_cmd() - unwanted recursion! 930 1.3.2.2 nathanw * 931 1.3.2.2 nathanw * Keeping sc->sc_state != idle terminates the recursion. 932 1.3.2.2 nathanw */ 933 1.3.2.2 nathanw #ifdef DIAGNOSTIC 934 1.3.2.2 nathanw if ((sc->sc_state & SUNSCPAL_WORKING) == 0) 935 1.3.2.2 nathanw panic("sunscpal_done: bad state"); 936 1.3.2.2 nathanw #endif 937 1.3.2.2 nathanw 938 1.3.2.2 nathanw /* Clear our pointers to the request. */ 939 1.3.2.2 nathanw sc->sc_current = NULL; 940 1.3.2.2 nathanw sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL; 941 1.3.2.2 nathanw callout_stop(&sr->sr_xs->xs_callout); 942 1.3.2.2 nathanw 943 1.3.2.2 nathanw /* Make the request free. */ 944 1.3.2.2 nathanw sr->sr_xs = NULL; 945 1.3.2.2 nathanw sc->sc_ncmds--; 946 1.3.2.2 nathanw 947 1.3.2.2 nathanw /* Tell common SCSI code it is done. */ 948 1.3.2.2 nathanw scsipi_done(xs); 949 1.3.2.2 nathanw 950 1.3.2.2 nathanw sc->sc_state = SUNSCPAL_IDLE; 951 1.3.2.2 nathanw /* Now sunscpal_sched() may be called again. */ 952 1.3.2.2 nathanw } 953 1.3.2.2 nathanw 954 1.3.2.2 nathanw 955 1.3.2.2 nathanw /* 956 1.3.2.2 nathanw * Schedule a SCSI operation. This routine should return 957 1.3.2.2 nathanw * only after it achieves one of the following conditions: 958 1.3.2.2 nathanw * Busy (sc->sc_state != SUNSCPAL_IDLE) 959 1.3.2.2 nathanw * No more work can be started. 960 1.3.2.2 nathanw */ 961 1.3.2.2 nathanw static void 962 1.3.2.2 nathanw sunscpal_sched(sc) 963 1.3.2.2 nathanw struct sunscpal_softc *sc; 964 1.3.2.2 nathanw { 965 1.3.2.2 nathanw struct sunscpal_req *sr; 966 1.3.2.2 nathanw struct scsipi_xfer *xs; 967 1.3.2.2 nathanw int target = 0, lun = 0; 968 1.3.2.2 nathanw int error, i; 969 1.3.2.2 nathanw 970 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 971 1.3.2.2 nathanw if (sc->sc_intr_off) { 972 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: top, intr off\n", 0); 973 1.3.2.2 nathanw sc->sc_intr_off(sc); 974 1.3.2.2 nathanw } 975 1.3.2.2 nathanw 976 1.3.2.2 nathanw next_job: 977 1.3.2.2 nathanw /* 978 1.3.2.2 nathanw * Grab the next job from queue. Must be idle. 979 1.3.2.2 nathanw */ 980 1.3.2.2 nathanw #ifdef DIAGNOSTIC 981 1.3.2.2 nathanw if (sc->sc_state != SUNSCPAL_IDLE) 982 1.3.2.2 nathanw panic("sunscpal_sched: not idle"); 983 1.3.2.2 nathanw if (sc->sc_current) 984 1.3.2.2 nathanw panic("sunscpal_sched: current set"); 985 1.3.2.2 nathanw #endif 986 1.3.2.2 nathanw 987 1.3.2.2 nathanw /* 988 1.3.2.2 nathanw * Always start the search where we last looked. 989 1.3.2.2 nathanw */ 990 1.3.2.2 nathanw i = sc->sc_rr; 991 1.3.2.2 nathanw sr = NULL; 992 1.3.2.2 nathanw do { 993 1.3.2.2 nathanw if (sc->sc_ring[i].sr_xs) { 994 1.3.2.2 nathanw target = sc->sc_ring[i].sr_target; 995 1.3.2.2 nathanw lun = sc->sc_ring[i].sr_lun; 996 1.3.2.2 nathanw if (sc->sc_matrix[target][lun] == NULL) { 997 1.3.2.2 nathanw /* 998 1.3.2.2 nathanw * Do not mark the target/LUN busy yet, 999 1.3.2.2 nathanw * because reselect may cause some other 1000 1.3.2.2 nathanw * job to become the current one, so we 1001 1.3.2.2 nathanw * might not actually start this job. 1002 1.3.2.2 nathanw * Instead, set sc_matrix later on. 1003 1.3.2.2 nathanw */ 1004 1.3.2.2 nathanw sc->sc_rr = i; 1005 1.3.2.2 nathanw sr = &sc->sc_ring[i]; 1006 1.3.2.2 nathanw break; 1007 1.3.2.2 nathanw } 1008 1.3.2.2 nathanw } 1009 1.3.2.2 nathanw i++; 1010 1.3.2.2 nathanw if (i == SUNSCPAL_OPENINGS) 1011 1.3.2.2 nathanw i = 0; 1012 1.3.2.2 nathanw } while (i != sc->sc_rr); 1013 1.3.2.2 nathanw 1014 1.3.2.2 nathanw if (sr == NULL) { 1015 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: no work, cur=0x%x\n", 1016 1.3.2.2 nathanw (long) sc->sc_current); 1017 1.3.2.2 nathanw 1018 1.3.2.2 nathanw /* Another hack (Er.. hook!) for anything that needs it: */ 1019 1.3.2.2 nathanw if (sc->sc_intr_on) { 1020 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: ret, intr ON\n", 0); 1021 1.3.2.2 nathanw sc->sc_intr_on(sc); 1022 1.3.2.2 nathanw } 1023 1.3.2.2 nathanw 1024 1.3.2.2 nathanw return; /* No more work to do. */ 1025 1.3.2.2 nathanw } 1026 1.3.2.2 nathanw 1027 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: select for t/l=0x%02x\n", 1028 1.3.2.2 nathanw (sr->sr_target << 4) | sr->sr_lun); 1029 1.3.2.2 nathanw 1030 1.3.2.2 nathanw sc->sc_state = SUNSCPAL_WORKING; 1031 1.3.2.2 nathanw error = sunscpal_select(sc, sr); 1032 1.3.2.2 nathanw if (sc->sc_current) { 1033 1.3.2.2 nathanw /* Lost the race! reselected out from under us! */ 1034 1.3.2.2 nathanw /* Work with the reselected job. */ 1035 1.3.2.2 nathanw if (sr->sr_flags & SR_IMMED) { 1036 1.3.2.2 nathanw printf("%s: reselected while polling (abort)\n", 1037 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1038 1.3.2.2 nathanw /* Abort the reselected job. */ 1039 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1040 1.3.2.2 nathanw sc->sc_msgpriq |= SEND_ABORT; 1041 1.3.2.2 nathanw } 1042 1.3.2.2 nathanw sr = sc->sc_current; 1043 1.3.2.2 nathanw xs = sr->sr_xs; 1044 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: reselect, new sr=0x%x\n", (long)sr); 1045 1.3.2.2 nathanw goto have_nexus; 1046 1.3.2.2 nathanw } 1047 1.3.2.2 nathanw 1048 1.3.2.2 nathanw /* Normal selection result. Target/LUN is now busy. */ 1049 1.3.2.2 nathanw sc->sc_matrix[target][lun] = sr; 1050 1.3.2.2 nathanw sc->sc_current = sr; /* connected */ 1051 1.3.2.2 nathanw xs = sr->sr_xs; 1052 1.3.2.2 nathanw 1053 1.3.2.2 nathanw /* 1054 1.3.2.2 nathanw * Initialize pointers, etc. for this job 1055 1.3.2.2 nathanw */ 1056 1.3.2.2 nathanw sc->sc_dataptr = sr->sr_dataptr; 1057 1.3.2.2 nathanw sc->sc_datalen = sr->sr_datalen; 1058 1.3.2.2 nathanw sc->sc_prevphase = SUNSCPAL_PHASE_INVALID; 1059 1.3.2.2 nathanw sc->sc_msgpriq = SEND_IDENTIFY; 1060 1.3.2.2 nathanw sc->sc_msgoutq = 0; 1061 1.3.2.2 nathanw sc->sc_msgout = 0; 1062 1.3.2.2 nathanw 1063 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: select rv=%d\n", error); 1064 1.3.2.2 nathanw 1065 1.3.2.2 nathanw switch (error) { 1066 1.3.2.2 nathanw case XS_NOERROR: 1067 1.3.2.2 nathanw break; 1068 1.3.2.2 nathanw 1069 1.3.2.2 nathanw case XS_BUSY: 1070 1.3.2.2 nathanw /* XXX - Reset and try again. */ 1071 1.3.2.2 nathanw printf("%s: select found SCSI bus busy, resetting...\n", 1072 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1073 1.3.2.2 nathanw sunscpal_reset_scsibus(sc); 1074 1.3.2.2 nathanw /* fallthrough */ 1075 1.3.2.2 nathanw case XS_SELTIMEOUT: 1076 1.3.2.2 nathanw default: 1077 1.3.2.2 nathanw xs->error = error; /* from select */ 1078 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: call done, sr=0x%x\n", (long)sr); 1079 1.3.2.2 nathanw sunscpal_done(sc); 1080 1.3.2.2 nathanw 1081 1.3.2.2 nathanw /* Paranoia: clear everything. */ 1082 1.3.2.2 nathanw sc->sc_dataptr = NULL; 1083 1.3.2.2 nathanw sc->sc_datalen = 0; 1084 1.3.2.2 nathanw sc->sc_prevphase = SUNSCPAL_PHASE_INVALID; 1085 1.3.2.2 nathanw sc->sc_msgpriq = 0; 1086 1.3.2.2 nathanw sc->sc_msgoutq = 0; 1087 1.3.2.2 nathanw sc->sc_msgout = 0; 1088 1.3.2.2 nathanw 1089 1.3.2.2 nathanw goto next_job; 1090 1.3.2.2 nathanw } 1091 1.3.2.2 nathanw 1092 1.3.2.2 nathanw /* 1093 1.3.2.2 nathanw * Selection was successful. Normally, this means 1094 1.3.2.2 nathanw * we are starting a new command. However, this 1095 1.3.2.2 nathanw * might be the termination of an overdue job. 1096 1.3.2.2 nathanw */ 1097 1.3.2.2 nathanw if (sr->sr_flags & SR_OVERDUE) { 1098 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: overdue, sr=0x%x\n", (long)sr); 1099 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1100 1.3.2.2 nathanw sc->sc_msgpriq |= SEND_ABORT; 1101 1.3.2.2 nathanw goto have_nexus; 1102 1.3.2.2 nathanw } 1103 1.3.2.2 nathanw 1104 1.3.2.2 nathanw /* 1105 1.3.2.2 nathanw * OK, we are starting a new command. 1106 1.3.2.2 nathanw * Initialize and allocate resources for the new command. 1107 1.3.2.2 nathanw * Device reset is special (only uses MSG_OUT phase). 1108 1.3.2.2 nathanw * Normal commands start in MSG_OUT phase where we will 1109 1.3.2.2 nathanw * send and IDENDIFY message, and then expect CMD phase. 1110 1.3.2.2 nathanw */ 1111 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 1112 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_CMDS) { 1113 1.3.2.2 nathanw printf("sunscpal_sched: begin, target=%d, LUN=%d\n", 1114 1.3.2.2 nathanw xs->xs_periph->periph_target, xs->xs_periph->periph_lun); 1115 1.3.2.2 nathanw sunscpal_show_scsi_cmd(xs); 1116 1.3.2.2 nathanw } 1117 1.3.2.2 nathanw #endif 1118 1.3.2.2 nathanw if (xs->xs_control & XS_CTL_RESET) { 1119 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: cmd=reset, sr=0x%x\n", (long)sr); 1120 1.3.2.2 nathanw /* Not an error, so do not set SUNSCPAL_ABORTING */ 1121 1.3.2.2 nathanw sc->sc_msgpriq |= SEND_DEV_RESET; 1122 1.3.2.2 nathanw goto have_nexus; 1123 1.3.2.2 nathanw } 1124 1.3.2.2 nathanw 1125 1.3.2.2 nathanw #ifdef DIAGNOSTIC 1126 1.3.2.2 nathanw if ((xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) == 0) { 1127 1.3.2.2 nathanw if (sc->sc_dataptr) { 1128 1.3.2.2 nathanw printf("%s: ptr but no data in/out flags?\n", 1129 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1130 1.3.2.2 nathanw SUNSCPAL_BREAK(); 1131 1.3.2.2 nathanw sc->sc_dataptr = NULL; 1132 1.3.2.2 nathanw } 1133 1.3.2.2 nathanw } 1134 1.3.2.2 nathanw #endif 1135 1.3.2.2 nathanw 1136 1.3.2.2 nathanw /* Allocate DMA space (maybe) */ 1137 1.3.2.2 nathanw if (sc->sc_dataptr && (sc->sc_flags & SUNSCPAL_DISABLE_DMA) == 0 && 1138 1.3.2.2 nathanw (sc->sc_datalen >= sc->sc_min_dma_len)) 1139 1.3.2.2 nathanw { 1140 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: dma_alloc, len=%d\n", sc->sc_datalen); 1141 1.3.2.2 nathanw sunscpal_dma_alloc(sc); 1142 1.3.2.2 nathanw } 1143 1.3.2.2 nathanw 1144 1.3.2.2 nathanw /* 1145 1.3.2.2 nathanw * Initialization hook called just after select, 1146 1.3.2.2 nathanw * at the beginning of COMMAND phase. 1147 1.3.2.2 nathanw * (but AFTER the DMA allocation is done) 1148 1.3.2.2 nathanw * 1149 1.3.2.2 nathanw * We need to set up the DMA engine BEFORE the target puts 1150 1.3.2.2 nathanw * the SCSI bus into any DATA phase. 1151 1.3.2.2 nathanw */ 1152 1.3.2.2 nathanw if (sr->sr_dma_hand) { 1153 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: dma_setup, dh=0x%x\n", 1154 1.3.2.2 nathanw (long) sr->sr_dma_hand); 1155 1.3.2.2 nathanw sunscpal_dma_setup(sc); 1156 1.3.2.2 nathanw } 1157 1.3.2.2 nathanw 1158 1.3.2.2 nathanw /* 1159 1.3.2.2 nathanw * Schedule a timeout for the job we are starting. 1160 1.3.2.2 nathanw */ 1161 1.3.2.2 nathanw if ((sr->sr_flags & SR_IMMED) == 0) { 1162 1.3.2.7 nathanw i = mstohz(xs->timeout); 1163 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: set timeout=%d\n", i); 1164 1.3.2.2 nathanw callout_reset(&sr->sr_xs->xs_callout, i, 1165 1.3.2.2 nathanw sunscpal_cmd_timeout, sr); 1166 1.3.2.2 nathanw } 1167 1.3.2.2 nathanw 1168 1.3.2.2 nathanw have_nexus: 1169 1.3.2.2 nathanw 1170 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: call machine, cur=0x%x\n", 1171 1.3.2.2 nathanw (long) sc->sc_current); 1172 1.3.2.2 nathanw sunscpal_machine(sc); 1173 1.3.2.2 nathanw SUNSCPAL_TRACE("sched: machine done, cur=0x%x\n", 1174 1.3.2.2 nathanw (long) sc->sc_current); 1175 1.3.2.2 nathanw 1176 1.3.2.2 nathanw /* 1177 1.3.2.2 nathanw * What state did sunscpal_machine() leave us in? 1178 1.3.2.2 nathanw * Hopefully it sometimes completes a job... 1179 1.3.2.2 nathanw */ 1180 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) 1181 1.3.2.2 nathanw goto next_job; 1182 1.3.2.2 nathanw 1183 1.3.2.2 nathanw return; /* Have work in progress. */ 1184 1.3.2.2 nathanw } 1185 1.3.2.2 nathanw 1186 1.3.2.2 nathanw 1187 1.3.2.2 nathanw /* 1188 1.3.2.2 nathanw * Reselect handler: checks for reselection, and if we are being 1189 1.3.2.2 nathanw * reselected, it sets up sc->sc_current. 1190 1.3.2.2 nathanw * 1191 1.3.2.2 nathanw * We are reselected when: 1192 1.3.2.2 nathanw * SEL is TRUE 1193 1.3.2.2 nathanw * IO is TRUE 1194 1.3.2.2 nathanw * BSY is FALSE 1195 1.3.2.2 nathanw */ 1196 1.3.2.2 nathanw void 1197 1.3.2.2 nathanw sunscpal_reselect(sc) 1198 1.3.2.2 nathanw struct sunscpal_softc *sc; 1199 1.3.2.2 nathanw { 1200 1.3.2.2 nathanw /* 1201 1.3.2.2 nathanw * This controller does not implement disconnect/reselect, so 1202 1.3.2.2 nathanw * we really don't have anything to do here. We keep this 1203 1.3.2.2 nathanw * function as a placeholder, though. 1204 1.3.2.2 nathanw */ 1205 1.3.2.2 nathanw } 1206 1.3.2.2 nathanw 1207 1.3.2.2 nathanw /* 1208 1.3.2.2 nathanw * Select target: xs is the transfer that we are selecting for. 1209 1.3.2.2 nathanw * sc->sc_current should be NULL. 1210 1.3.2.2 nathanw * 1211 1.3.2.2 nathanw * Returns: 1212 1.3.2.2 nathanw * sc->sc_current != NULL ==> we were reselected (race!) 1213 1.3.2.2 nathanw * XS_NOERROR ==> selection worked 1214 1.3.2.2 nathanw * XS_BUSY ==> lost arbitration 1215 1.3.2.2 nathanw * XS_SELTIMEOUT ==> no response to selection 1216 1.3.2.2 nathanw */ 1217 1.3.2.2 nathanw static int 1218 1.3.2.2 nathanw sunscpal_select(sc, sr) 1219 1.3.2.2 nathanw struct sunscpal_softc *sc; 1220 1.3.2.2 nathanw struct sunscpal_req *sr; 1221 1.3.2.2 nathanw { 1222 1.3.2.2 nathanw int timo, target_mask; 1223 1.3.2.2 nathanw u_short mode; 1224 1.3.2.2 nathanw 1225 1.3.2.2 nathanw /* Check for reselect */ 1226 1.3.2.2 nathanw sunscpal_reselect(sc); 1227 1.3.2.2 nathanw if (sc->sc_current) { 1228 1.3.2.2 nathanw SUNSCPAL_TRACE("select: reselect, cur=0x%x\n", 1229 1.3.2.2 nathanw (long) sc->sc_current); 1230 1.3.2.2 nathanw return XS_BUSY; /* reselected */ 1231 1.3.2.2 nathanw } 1232 1.3.2.2 nathanw 1233 1.3.2.2 nathanw /* 1234 1.3.2.2 nathanw * Select the target. 1235 1.3.2.2 nathanw */ 1236 1.3.2.2 nathanw target_mask = (1 << sr->sr_target); 1237 1.3.2.2 nathanw SUNSCPAL_WRITE_1(sc, sunscpal_data, target_mask); 1238 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, SUNSCPAL_ICR_SELECT); 1239 1.3.2.2 nathanw 1240 1.3.2.2 nathanw /* 1241 1.3.2.2 nathanw * Wait for the target to assert BSY. 1242 1.3.2.2 nathanw * SCSI spec. says wait for 250 mS. 1243 1.3.2.2 nathanw */ 1244 1.3.2.2 nathanw for (timo = 25000;;) { 1245 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_BUSY) 1246 1.3.2.2 nathanw goto success; 1247 1.3.2.2 nathanw if (--timo <= 0) 1248 1.3.2.2 nathanw break; 1249 1.3.2.2 nathanw delay(10); 1250 1.3.2.2 nathanw } 1251 1.3.2.2 nathanw 1252 1.3.2.2 nathanw SUNSCPAL_WRITE_1(sc, sunscpal_data, 0); 1253 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, 0); 1254 1.3.2.2 nathanw 1255 1.3.2.2 nathanw SUNSCPAL_TRACE("select: device down, rc=%d\n", XS_SELTIMEOUT); 1256 1.3.2.2 nathanw return XS_SELTIMEOUT; 1257 1.3.2.2 nathanw 1258 1.3.2.2 nathanw success: 1259 1.3.2.2 nathanw 1260 1.3.2.2 nathanw /* 1261 1.3.2.2 nathanw * The target is now driving BSY, so we can stop 1262 1.3.2.2 nathanw * driving SEL and the data bus. We do set up 1263 1.3.2.2 nathanw * whether or not this target needs parity. 1264 1.3.2.2 nathanw */ 1265 1.3.2.2 nathanw mode = 0; 1266 1.3.2.2 nathanw if ((sc->sc_parity_disable & target_mask) == 0) 1267 1.3.2.2 nathanw mode |= SUNSCPAL_ICR_PARITY_ENABLE; 1268 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, mode); 1269 1.3.2.2 nathanw 1270 1.3.2.2 nathanw return XS_NOERROR; 1271 1.3.2.2 nathanw } 1272 1.3.2.2 nathanw 1273 1.3.2.2 nathanw /***************************************************************** 1274 1.3.2.2 nathanw * Functions to handle each info. transfer phase: 1275 1.3.2.2 nathanw *****************************************************************/ 1276 1.3.2.2 nathanw 1277 1.3.2.2 nathanw /* 1278 1.3.2.2 nathanw * The message system: 1279 1.3.2.2 nathanw * 1280 1.3.2.2 nathanw * This is a revamped message system that now should easier accomodate 1281 1.3.2.2 nathanw * new messages, if necessary. 1282 1.3.2.2 nathanw * 1283 1.3.2.2 nathanw * Currently we accept these messages: 1284 1.3.2.2 nathanw * IDENTIFY (when reselecting) 1285 1.3.2.2 nathanw * COMMAND COMPLETE # (expect bus free after messages marked #) 1286 1.3.2.2 nathanw * NOOP 1287 1.3.2.2 nathanw * MESSAGE REJECT 1288 1.3.2.2 nathanw * SYNCHRONOUS DATA TRANSFER REQUEST 1289 1.3.2.2 nathanw * SAVE DATA POINTER 1290 1.3.2.2 nathanw * RESTORE POINTERS 1291 1.3.2.2 nathanw * DISCONNECT # 1292 1.3.2.2 nathanw * 1293 1.3.2.2 nathanw * We may send these messages in prioritized order: 1294 1.3.2.2 nathanw * BUS DEVICE RESET # if XS_CTL_RESET & xs->xs_control (or in 1295 1.3.2.2 nathanw * weird sits.) 1296 1.3.2.2 nathanw * MESSAGE PARITY ERROR par. err. during MSGI 1297 1.3.2.2 nathanw * MESSAGE REJECT If we get a message we don't know how to handle 1298 1.3.2.2 nathanw * ABORT # send on errors 1299 1.3.2.2 nathanw * INITIATOR DETECTED ERROR also on errors (SCSI2) (during info xfer) 1300 1.3.2.2 nathanw * IDENTIFY At the start of each transfer 1301 1.3.2.2 nathanw * SYNCHRONOUS DATA TRANSFER REQUEST if appropriate 1302 1.3.2.2 nathanw * NOOP if nothing else fits the bill ... 1303 1.3.2.2 nathanw */ 1304 1.3.2.2 nathanw 1305 1.3.2.2 nathanw /* 1306 1.3.2.2 nathanw * Precondition: 1307 1.3.2.2 nathanw * The SCSI bus is already in the MSGI phase and there is a message byte 1308 1.3.2.2 nathanw * on the bus, along with an asserted REQ signal. 1309 1.3.2.2 nathanw * 1310 1.3.2.2 nathanw * Our return value determines whether our caller, sunscpal_machine() 1311 1.3.2.2 nathanw * will expect to see another REQ (and possibly phase change). 1312 1.3.2.2 nathanw */ 1313 1.3.2.2 nathanw static int 1314 1.3.2.2 nathanw sunscpal_msg_in(sc) 1315 1.3.2.2 nathanw struct sunscpal_softc *sc; 1316 1.3.2.2 nathanw { 1317 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 1318 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 1319 1.3.2.2 nathanw int n, phase; 1320 1.3.2.2 nathanw int act_flags; 1321 1.3.2.2 nathanw 1322 1.3.2.2 nathanw act_flags = ACT_CONTINUE; 1323 1.3.2.2 nathanw 1324 1.3.2.2 nathanw if (sc->sc_prevphase == SUNSCPAL_PHASE_MSG_IN) { 1325 1.3.2.2 nathanw /* This is a continuation of the previous message. */ 1326 1.3.2.2 nathanw n = sc->sc_imp - sc->sc_imess; 1327 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: continuation, n=%d\n", n); 1328 1.3.2.2 nathanw goto nextbyte; 1329 1.3.2.2 nathanw } 1330 1.3.2.2 nathanw 1331 1.3.2.2 nathanw /* This is a new MESSAGE IN phase. Clean up our state. */ 1332 1.3.2.2 nathanw sc->sc_state &= ~SUNSCPAL_DROP_MSGIN; 1333 1.3.2.2 nathanw 1334 1.3.2.2 nathanw nextmsg: 1335 1.3.2.2 nathanw n = 0; 1336 1.3.2.2 nathanw sc->sc_imp = &sc->sc_imess[n]; 1337 1.3.2.2 nathanw 1338 1.3.2.2 nathanw nextbyte: 1339 1.3.2.2 nathanw /* 1340 1.3.2.2 nathanw * Read a whole message, but don't ack the last byte. If we reject the 1341 1.3.2.2 nathanw * message, we have to assert ATN during the message transfer phase 1342 1.3.2.2 nathanw * itself. 1343 1.3.2.2 nathanw */ 1344 1.3.2.2 nathanw for (;;) { 1345 1.3.2.2 nathanw /* 1346 1.3.2.2 nathanw * Read a message byte. 1347 1.3.2.2 nathanw * First, check BSY, REQ, phase... 1348 1.3.2.2 nathanw */ 1349 1.3.2.2 nathanw if (!SUNSCPAL_BUSY(sc)) { 1350 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: lost BSY, n=%d\n", n); 1351 1.3.2.2 nathanw /* XXX - Assume the command completed? */ 1352 1.3.2.2 nathanw act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 1353 1.3.2.2 nathanw return (act_flags); 1354 1.3.2.2 nathanw } 1355 1.3.2.2 nathanw if (sunscpal_wait_req(sc)) { 1356 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: BSY but no REQ, n=%d\n", n); 1357 1.3.2.2 nathanw /* Just let sunscpal_machine() handle it... */ 1358 1.3.2.2 nathanw return (act_flags); 1359 1.3.2.2 nathanw } 1360 1.3.2.2 nathanw phase = SUNSCPAL_BUS_PHASE(SUNSCPAL_READ_2(sc, sunscpal_icr)); 1361 1.3.2.2 nathanw if (phase != SUNSCPAL_PHASE_MSG_IN) { 1362 1.3.2.2 nathanw /* 1363 1.3.2.2 nathanw * Target left MESSAGE IN, probably because it 1364 1.3.2.2 nathanw * a) noticed our ATN signal, or 1365 1.3.2.2 nathanw * b) ran out of messages. 1366 1.3.2.2 nathanw */ 1367 1.3.2.2 nathanw return (act_flags); 1368 1.3.2.2 nathanw } 1369 1.3.2.2 nathanw /* Still in MESSAGE IN phase, and REQ is asserted. */ 1370 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_PARITY_ERROR) { 1371 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_PARITY_ERROR); 1372 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_DROP_MSGIN; 1373 1.3.2.2 nathanw } 1374 1.3.2.2 nathanw 1375 1.3.2.2 nathanw /* Gather incoming message bytes if needed. */ 1376 1.3.2.2 nathanw if ((sc->sc_state & SUNSCPAL_DROP_MSGIN) == 0) { 1377 1.3.2.2 nathanw if (n >= SUNSCPAL_MAX_MSG_LEN) { 1378 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_REJECT); 1379 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_DROP_MSGIN; 1380 1.3.2.2 nathanw } else { 1381 1.3.2.2 nathanw *sc->sc_imp++ = SUNSCPAL_READ_1(sc, sunscpal_cmd_stat); 1382 1.3.2.2 nathanw n++; 1383 1.3.2.2 nathanw /* 1384 1.3.2.2 nathanw * This testing is suboptimal, but most 1385 1.3.2.2 nathanw * messages will be of the one byte variety, so 1386 1.3.2.2 nathanw * it should not affect performance 1387 1.3.2.2 nathanw * significantly. 1388 1.3.2.2 nathanw */ 1389 1.3.2.4 nathanw if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) 1390 1.3.2.2 nathanw goto have_msg; 1391 1.3.2.4 nathanw if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) 1392 1.3.2.2 nathanw goto have_msg; 1393 1.3.2.4 nathanw if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && 1394 1.3.2.2 nathanw n == sc->sc_imess[1] + 2) 1395 1.3.2.2 nathanw goto have_msg; 1396 1.3.2.2 nathanw } 1397 1.3.2.2 nathanw } 1398 1.3.2.2 nathanw 1399 1.3.2.2 nathanw /* 1400 1.3.2.2 nathanw * If we reach this spot we're either: 1401 1.3.2.2 nathanw * a) in the middle of a multi-byte message, or 1402 1.3.2.2 nathanw * b) dropping bytes. 1403 1.3.2.2 nathanw */ 1404 1.3.2.2 nathanw 1405 1.3.2.2 nathanw if (act_flags != ACT_CONTINUE) 1406 1.3.2.2 nathanw return (act_flags); 1407 1.3.2.2 nathanw 1408 1.3.2.2 nathanw /* back to nextbyte */ 1409 1.3.2.2 nathanw } 1410 1.3.2.2 nathanw 1411 1.3.2.2 nathanw have_msg: 1412 1.3.2.2 nathanw /* We now have a complete message. Parse it. */ 1413 1.3.2.2 nathanw 1414 1.3.2.2 nathanw switch (sc->sc_imess[0]) { 1415 1.3.2.2 nathanw case MSG_CMDCOMPLETE: 1416 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: CMDCOMPLETE\n", 0); 1417 1.3.2.2 nathanw /* Target is about to disconnect. */ 1418 1.3.2.2 nathanw act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 1419 1.3.2.2 nathanw break; 1420 1.3.2.2 nathanw 1421 1.3.2.2 nathanw case MSG_PARITY_ERROR: 1422 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: PARITY_ERROR\n", 0); 1423 1.3.2.2 nathanw /* Resend the last message. */ 1424 1.3.2.2 nathanw sunscpal_sched_msgout(sc, sc->sc_msgout); 1425 1.3.2.2 nathanw break; 1426 1.3.2.2 nathanw 1427 1.3.2.2 nathanw case MSG_MESSAGE_REJECT: 1428 1.3.2.2 nathanw /* The target rejects the last message we sent. */ 1429 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: got reject for 0x%x\n", sc->sc_msgout); 1430 1.3.2.2 nathanw switch (sc->sc_msgout) { 1431 1.3.2.2 nathanw case SEND_IDENTIFY: 1432 1.3.2.2 nathanw /* Really old target controller? */ 1433 1.3.2.2 nathanw /* XXX ... */ 1434 1.3.2.2 nathanw break; 1435 1.3.2.2 nathanw case SEND_INIT_DET_ERR: 1436 1.3.2.2 nathanw goto abort; 1437 1.3.2.2 nathanw } 1438 1.3.2.2 nathanw break; 1439 1.3.2.2 nathanw 1440 1.3.2.2 nathanw case MSG_NOOP: 1441 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: NOOP\n", 0); 1442 1.3.2.2 nathanw break; 1443 1.3.2.2 nathanw 1444 1.3.2.2 nathanw case MSG_DISCONNECT: 1445 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: DISCONNECT\n", 0); 1446 1.3.2.2 nathanw /* Target is about to disconnect. */ 1447 1.3.2.2 nathanw act_flags |= ACT_DISCONNECT; 1448 1.3.2.2 nathanw if ((xs->xs_periph->periph_quirks & PQUIRK_AUTOSAVE) == 0) 1449 1.3.2.2 nathanw break; 1450 1.3.2.2 nathanw /*FALLTHROUGH*/ 1451 1.3.2.2 nathanw 1452 1.3.2.2 nathanw case MSG_SAVEDATAPOINTER: 1453 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: SAVE_PTRS\n", 0); 1454 1.3.2.2 nathanw sr->sr_dataptr = sc->sc_dataptr; 1455 1.3.2.2 nathanw sr->sr_datalen = sc->sc_datalen; 1456 1.3.2.2 nathanw break; 1457 1.3.2.2 nathanw 1458 1.3.2.2 nathanw case MSG_RESTOREPOINTERS: 1459 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: RESTORE_PTRS\n", 0); 1460 1.3.2.2 nathanw sc->sc_dataptr = sr->sr_dataptr; 1461 1.3.2.2 nathanw sc->sc_datalen = sr->sr_datalen; 1462 1.3.2.2 nathanw break; 1463 1.3.2.2 nathanw 1464 1.3.2.2 nathanw case MSG_EXTENDED: 1465 1.3.2.2 nathanw switch (sc->sc_imess[2]) { 1466 1.3.2.2 nathanw case MSG_EXT_SDTR: 1467 1.3.2.2 nathanw case MSG_EXT_WDTR: 1468 1.3.2.2 nathanw /* The ncr5380 can not do synchronous mode. */ 1469 1.3.2.2 nathanw goto reject; 1470 1.3.2.2 nathanw default: 1471 1.3.2.2 nathanw printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n", 1472 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1473 1.3.2.2 nathanw SUNSCPAL_BREAK(); 1474 1.3.2.2 nathanw goto reject; 1475 1.3.2.2 nathanw } 1476 1.3.2.2 nathanw break; 1477 1.3.2.2 nathanw 1478 1.3.2.2 nathanw default: 1479 1.3.2.2 nathanw SUNSCPAL_TRACE("msg_in: eh? imsg=0x%x\n", sc->sc_imess[0]); 1480 1.3.2.2 nathanw printf("%s: unrecognized MESSAGE; sending REJECT\n", 1481 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1482 1.3.2.2 nathanw SUNSCPAL_BREAK(); 1483 1.3.2.2 nathanw /* fallthrough */ 1484 1.3.2.2 nathanw reject: 1485 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_REJECT); 1486 1.3.2.2 nathanw break; 1487 1.3.2.2 nathanw 1488 1.3.2.2 nathanw abort: 1489 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1490 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1491 1.3.2.2 nathanw break; 1492 1.3.2.2 nathanw } 1493 1.3.2.2 nathanw 1494 1.3.2.2 nathanw /* Go get the next message, if any. */ 1495 1.3.2.2 nathanw if (act_flags == ACT_CONTINUE) 1496 1.3.2.2 nathanw goto nextmsg; 1497 1.3.2.2 nathanw 1498 1.3.2.2 nathanw return (act_flags); 1499 1.3.2.2 nathanw } 1500 1.3.2.2 nathanw 1501 1.3.2.2 nathanw 1502 1.3.2.2 nathanw /* 1503 1.3.2.2 nathanw * The message out (and in) stuff is a bit complicated: 1504 1.3.2.2 nathanw * If the target requests another message (sequence) without 1505 1.3.2.2 nathanw * having changed phase in between it really asks for a 1506 1.3.2.2 nathanw * retransmit, probably due to parity error(s). 1507 1.3.2.2 nathanw * The following messages can be sent: 1508 1.3.2.2 nathanw * IDENTIFY @ These 4 stem from SCSI command activity 1509 1.3.2.2 nathanw * SDTR @ 1510 1.3.2.2 nathanw * WDTR @ 1511 1.3.2.2 nathanw * DEV_RESET @ 1512 1.3.2.2 nathanw * REJECT if MSGI doesn't make sense 1513 1.3.2.2 nathanw * PARITY_ERROR if parity error while in MSGI 1514 1.3.2.2 nathanw * INIT_DET_ERR if parity error while not in MSGI 1515 1.3.2.2 nathanw * ABORT if INIT_DET_ERR rejected 1516 1.3.2.2 nathanw * NOOP if asked for a message and there's nothing to send 1517 1.3.2.2 nathanw * 1518 1.3.2.2 nathanw * Note that we call this one with (sc_current == NULL) 1519 1.3.2.2 nathanw * when sending ABORT for unwanted reselections. 1520 1.3.2.2 nathanw */ 1521 1.3.2.2 nathanw static int 1522 1.3.2.2 nathanw sunscpal_msg_out(sc) 1523 1.3.2.2 nathanw struct sunscpal_softc *sc; 1524 1.3.2.2 nathanw { 1525 1.3.2.2 nathanw /* 1526 1.3.2.2 nathanw * This controller does not allow you to assert ATN, which 1527 1.3.2.2 nathanw * means we will never get the opportunity to send messages to 1528 1.3.2.2 nathanw * the target (the bus will never enter this MSG_OUT phase). 1529 1.3.2.2 nathanw * This will eventually leave us with no option other than to 1530 1.3.2.2 nathanw * reset the bus. We keep this function as a placeholder, 1531 1.3.2.2 nathanw * though, and this printf will eventually go away or get 1532 1.3.2.2 nathanw * #ifdef'ed: 1533 1.3.2.2 nathanw */ 1534 1.3.2.2 nathanw printf("sunscpal_msg_out: bus is in MSG_OUT phase?\n"); 1535 1.3.2.2 nathanw return (ACT_CONTINUE | ACT_RESET_BUS); 1536 1.3.2.2 nathanw } 1537 1.3.2.2 nathanw 1538 1.3.2.2 nathanw /* 1539 1.3.2.2 nathanw * Handle command phase. 1540 1.3.2.2 nathanw */ 1541 1.3.2.2 nathanw static int 1542 1.3.2.2 nathanw sunscpal_command(sc) 1543 1.3.2.2 nathanw struct sunscpal_softc *sc; 1544 1.3.2.2 nathanw { 1545 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 1546 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 1547 1.3.2.2 nathanw int len; 1548 1.3.2.2 nathanw 1549 1.3.2.2 nathanw /* Assume command can be sent in one go. */ 1550 1.3.2.2 nathanw /* XXX: Do this using DMA, and get a phase change intr? */ 1551 1.3.2.2 nathanw len = sunscpal_pio_out(sc, SUNSCPAL_PHASE_COMMAND, xs->cmdlen, 1552 1.3.2.2 nathanw (u_char *)xs->cmd); 1553 1.3.2.2 nathanw 1554 1.3.2.2 nathanw if (len != xs->cmdlen) { 1555 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 1556 1.3.2.2 nathanw printf("sunscpal_command: short transfer: wanted %d got %d.\n", 1557 1.3.2.2 nathanw xs->cmdlen, len); 1558 1.3.2.2 nathanw sunscpal_show_scsi_cmd(xs); 1559 1.3.2.2 nathanw SUNSCPAL_BREAK(); 1560 1.3.2.2 nathanw #endif 1561 1.3.2.2 nathanw if (len < 6) { 1562 1.3.2.2 nathanw xs->error = XS_DRIVER_STUFFUP; 1563 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1564 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1565 1.3.2.2 nathanw } 1566 1.3.2.2 nathanw 1567 1.3.2.2 nathanw } 1568 1.3.2.2 nathanw 1569 1.3.2.2 nathanw return ACT_CONTINUE; 1570 1.3.2.2 nathanw } 1571 1.3.2.2 nathanw 1572 1.3.2.2 nathanw 1573 1.3.2.2 nathanw /* 1574 1.3.2.2 nathanw * Handle either data_in or data_out 1575 1.3.2.2 nathanw */ 1576 1.3.2.2 nathanw static int 1577 1.3.2.2 nathanw sunscpal_data_xfer(sc, phase) 1578 1.3.2.2 nathanw struct sunscpal_softc *sc; 1579 1.3.2.2 nathanw int phase; 1580 1.3.2.2 nathanw { 1581 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 1582 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 1583 1.3.2.2 nathanw int expected_phase; 1584 1.3.2.2 nathanw int len; 1585 1.3.2.2 nathanw 1586 1.3.2.2 nathanw /* 1587 1.3.2.2 nathanw * When aborting a command, disallow any data phase. 1588 1.3.2.2 nathanw */ 1589 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) { 1590 1.3.2.2 nathanw printf("%s: aborting, bus phase=%s (reset)\n", 1591 1.3.2.2 nathanw sc->sc_dev.dv_xname, phase_names[(phase >> 8) & 7]); 1592 1.3.2.2 nathanw return ACT_RESET_BUS; /* XXX */ 1593 1.3.2.2 nathanw } 1594 1.3.2.2 nathanw 1595 1.3.2.2 nathanw /* Validate expected phase (data_in or data_out) */ 1596 1.3.2.2 nathanw expected_phase = (xs->xs_control & XS_CTL_DATA_OUT) ? 1597 1.3.2.2 nathanw SUNSCPAL_PHASE_DATA_OUT : SUNSCPAL_PHASE_DATA_IN; 1598 1.3.2.2 nathanw if (phase != expected_phase) { 1599 1.3.2.2 nathanw printf("%s: data phase error\n", sc->sc_dev.dv_xname); 1600 1.3.2.2 nathanw goto abort; 1601 1.3.2.2 nathanw } 1602 1.3.2.2 nathanw 1603 1.3.2.2 nathanw /* Make sure we have some data to move. */ 1604 1.3.2.2 nathanw if (sc->sc_datalen <= 0) { 1605 1.3.2.2 nathanw /* Device needs padding. */ 1606 1.3.2.2 nathanw if (phase == SUNSCPAL_PHASE_DATA_IN) 1607 1.3.2.2 nathanw sunscpal_pio_in(sc, phase, 4096, NULL); 1608 1.3.2.2 nathanw else 1609 1.3.2.2 nathanw sunscpal_pio_out(sc, phase, 4096, NULL); 1610 1.3.2.2 nathanw /* Make sure that caused a phase change. */ 1611 1.3.2.2 nathanw if (SUNSCPAL_BUS_PHASE(SUNSCPAL_READ_2(sc, sunscpal_icr)) == phase) { 1612 1.3.2.2 nathanw /* More than 4k is just too much! */ 1613 1.3.2.2 nathanw printf("%s: too much data padding\n", 1614 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1615 1.3.2.2 nathanw goto abort; 1616 1.3.2.2 nathanw } 1617 1.3.2.2 nathanw return ACT_CONTINUE; 1618 1.3.2.2 nathanw } 1619 1.3.2.2 nathanw 1620 1.3.2.2 nathanw /* 1621 1.3.2.2 nathanw * Attempt DMA only if dma_alloc gave us a DMA handle AND 1622 1.3.2.2 nathanw * there is enough left to transfer so DMA is worth while. 1623 1.3.2.2 nathanw */ 1624 1.3.2.2 nathanw if (sr->sr_dma_hand && 1625 1.3.2.2 nathanw (sc->sc_datalen >= sc->sc_min_dma_len)) 1626 1.3.2.2 nathanw { 1627 1.3.2.2 nathanw /* 1628 1.3.2.2 nathanw * OK, really start DMA. Note, the MD start function 1629 1.3.2.2 nathanw * is responsible for setting the TCMD register, etc. 1630 1.3.2.2 nathanw * (Acknowledge the phase change there, not here.) 1631 1.3.2.2 nathanw */ 1632 1.3.2.2 nathanw SUNSCPAL_TRACE("data_xfer: dma_start, dh=0x%x\n", 1633 1.3.2.2 nathanw (long) sr->sr_dma_hand); 1634 1.3.2.2 nathanw sunscpal_dma_start(sc); 1635 1.3.2.2 nathanw return ACT_WAIT_DMA; 1636 1.3.2.2 nathanw } 1637 1.3.2.2 nathanw 1638 1.3.2.2 nathanw /* 1639 1.3.2.2 nathanw * Doing PIO for data transfer. (Possibly "Pseudo DMA") 1640 1.3.2.2 nathanw * XXX: Do PDMA functions need to set tcmd later? 1641 1.3.2.2 nathanw */ 1642 1.3.2.2 nathanw SUNSCPAL_TRACE("data_xfer: doing PIO, len=%d\n", sc->sc_datalen); 1643 1.3.2.2 nathanw if (phase == SUNSCPAL_PHASE_DATA_OUT) { 1644 1.3.2.2 nathanw len = sunscpal_pio_out(sc, phase, sc->sc_datalen, sc->sc_dataptr); 1645 1.3.2.2 nathanw } else { 1646 1.3.2.2 nathanw len = sunscpal_pio_in(sc, phase, sc->sc_datalen, sc->sc_dataptr); 1647 1.3.2.2 nathanw } 1648 1.3.2.2 nathanw sc->sc_dataptr += len; 1649 1.3.2.2 nathanw sc->sc_datalen -= len; 1650 1.3.2.2 nathanw 1651 1.3.2.2 nathanw SUNSCPAL_TRACE("data_xfer: did PIO, resid=%d\n", sc->sc_datalen); 1652 1.3.2.2 nathanw return (ACT_CONTINUE); 1653 1.3.2.2 nathanw 1654 1.3.2.2 nathanw abort: 1655 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1656 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1657 1.3.2.2 nathanw return (ACT_CONTINUE); 1658 1.3.2.2 nathanw } 1659 1.3.2.2 nathanw 1660 1.3.2.2 nathanw 1661 1.3.2.2 nathanw static int 1662 1.3.2.2 nathanw sunscpal_status(sc) 1663 1.3.2.2 nathanw struct sunscpal_softc *sc; 1664 1.3.2.2 nathanw { 1665 1.3.2.2 nathanw int len; 1666 1.3.2.2 nathanw u_char status; 1667 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 1668 1.3.2.2 nathanw 1669 1.3.2.2 nathanw len = sunscpal_pio_in(sc, SUNSCPAL_PHASE_STATUS, 1, &status); 1670 1.3.2.2 nathanw if (len) { 1671 1.3.2.2 nathanw sr->sr_status = status; 1672 1.3.2.2 nathanw } else { 1673 1.3.2.2 nathanw printf("sunscpal_status: none?\n"); 1674 1.3.2.2 nathanw } 1675 1.3.2.2 nathanw 1676 1.3.2.2 nathanw return ACT_CONTINUE; 1677 1.3.2.2 nathanw } 1678 1.3.2.2 nathanw 1679 1.3.2.2 nathanw 1680 1.3.2.2 nathanw /* 1681 1.3.2.2 nathanw * This is the big state machine that follows SCSI phase changes. 1682 1.3.2.2 nathanw * This is somewhat like a co-routine. It will do a SCSI command, 1683 1.3.2.2 nathanw * and exit if the command is complete, or if it must wait, i.e. 1684 1.3.2.2 nathanw * for DMA to complete or for reselect to resume the job. 1685 1.3.2.2 nathanw * 1686 1.3.2.2 nathanw * The bus must be selected, and we need to know which command is 1687 1.3.2.2 nathanw * being undertaken. 1688 1.3.2.2 nathanw */ 1689 1.3.2.2 nathanw static void 1690 1.3.2.2 nathanw sunscpal_machine(sc) 1691 1.3.2.2 nathanw struct sunscpal_softc *sc; 1692 1.3.2.2 nathanw { 1693 1.3.2.2 nathanw struct sunscpal_req *sr; 1694 1.3.2.2 nathanw struct scsipi_xfer *xs; 1695 1.3.2.2 nathanw int act_flags, phase, timo; 1696 1.3.2.2 nathanw 1697 1.3.2.2 nathanw #ifdef DIAGNOSTIC 1698 1.3.2.2 nathanw if (sc->sc_state == SUNSCPAL_IDLE) 1699 1.3.2.2 nathanw panic("sunscpal_machine: state=idle"); 1700 1.3.2.2 nathanw if (sc->sc_current == NULL) 1701 1.3.2.2 nathanw panic("sunscpal_machine: no current cmd"); 1702 1.3.2.2 nathanw #endif 1703 1.3.2.2 nathanw 1704 1.3.2.2 nathanw sr = sc->sc_current; 1705 1.3.2.2 nathanw xs = sr->sr_xs; 1706 1.3.2.2 nathanw act_flags = ACT_CONTINUE; 1707 1.3.2.2 nathanw 1708 1.3.2.2 nathanw /* 1709 1.3.2.2 nathanw * This will be called by sunscpal_intr() when DMA is 1710 1.3.2.2 nathanw * complete. Must stop DMA before touching the PAL or 1711 1.3.2.2 nathanw * there will be "register conflict" errors. 1712 1.3.2.2 nathanw */ 1713 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_DOINGDMA) { 1714 1.3.2.2 nathanw /* Pick-up where where we left off... */ 1715 1.3.2.2 nathanw goto dma_done; 1716 1.3.2.2 nathanw } 1717 1.3.2.2 nathanw 1718 1.3.2.2 nathanw next_phase: 1719 1.3.2.2 nathanw 1720 1.3.2.2 nathanw if (!SUNSCPAL_BUSY(sc)) { 1721 1.3.2.2 nathanw /* Unexpected disconnect */ 1722 1.3.2.2 nathanw printf("sunscpal_machine: unexpected disconnect.\n"); 1723 1.3.2.2 nathanw xs->error = XS_DRIVER_STUFFUP; 1724 1.3.2.2 nathanw act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE); 1725 1.3.2.2 nathanw goto do_actions; 1726 1.3.2.2 nathanw } 1727 1.3.2.2 nathanw 1728 1.3.2.2 nathanw /* 1729 1.3.2.2 nathanw * Wait for REQ before reading the phase. 1730 1.3.2.2 nathanw * Need to wait longer than usual here, because 1731 1.3.2.2 nathanw * some devices are just plain slow... 1732 1.3.2.2 nathanw */ 1733 1.3.2.2 nathanw timo = sunscpal_wait_phase_timo; 1734 1.3.2.2 nathanw for (;;) { 1735 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_REQUEST) 1736 1.3.2.2 nathanw break; 1737 1.3.2.2 nathanw if (--timo <= 0) { 1738 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) { 1739 1.3.2.2 nathanw printf("%s: no REQ while aborting, reset\n", 1740 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1741 1.3.2.2 nathanw act_flags |= ACT_RESET_BUS; 1742 1.3.2.2 nathanw goto do_actions; 1743 1.3.2.2 nathanw } 1744 1.3.2.2 nathanw printf("%s: no REQ for next phase, abort\n", 1745 1.3.2.2 nathanw sc->sc_dev.dv_xname); 1746 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1747 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1748 1.3.2.2 nathanw goto next_phase; 1749 1.3.2.2 nathanw } 1750 1.3.2.2 nathanw delay(100); 1751 1.3.2.2 nathanw } 1752 1.3.2.2 nathanw 1753 1.3.2.2 nathanw phase = SUNSCPAL_BUS_PHASE(SUNSCPAL_READ_2(sc, sunscpal_icr)); 1754 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: phase=%s\n", 1755 1.3.2.2 nathanw (long) phase_names[(phase >> 8) & 7]); 1756 1.3.2.2 nathanw 1757 1.3.2.2 nathanw /* 1758 1.3.2.2 nathanw * We assume that the device knows what it's doing, 1759 1.3.2.2 nathanw * so any phase is good. 1760 1.3.2.2 nathanw */ 1761 1.3.2.2 nathanw 1762 1.3.2.2 nathanw switch (phase) { 1763 1.3.2.2 nathanw 1764 1.3.2.2 nathanw case SUNSCPAL_PHASE_DATA_OUT: 1765 1.3.2.2 nathanw case SUNSCPAL_PHASE_DATA_IN: 1766 1.3.2.2 nathanw act_flags = sunscpal_data_xfer(sc, phase); 1767 1.3.2.2 nathanw break; 1768 1.3.2.2 nathanw 1769 1.3.2.2 nathanw case SUNSCPAL_PHASE_COMMAND: 1770 1.3.2.2 nathanw act_flags = sunscpal_command(sc); 1771 1.3.2.2 nathanw break; 1772 1.3.2.2 nathanw 1773 1.3.2.2 nathanw case SUNSCPAL_PHASE_STATUS: 1774 1.3.2.2 nathanw act_flags = sunscpal_status(sc); 1775 1.3.2.2 nathanw break; 1776 1.3.2.2 nathanw 1777 1.3.2.2 nathanw case SUNSCPAL_PHASE_MSG_OUT: 1778 1.3.2.2 nathanw act_flags = sunscpal_msg_out(sc); 1779 1.3.2.2 nathanw break; 1780 1.3.2.2 nathanw 1781 1.3.2.2 nathanw case SUNSCPAL_PHASE_MSG_IN: 1782 1.3.2.2 nathanw act_flags = sunscpal_msg_in(sc); 1783 1.3.2.2 nathanw break; 1784 1.3.2.2 nathanw 1785 1.3.2.2 nathanw default: 1786 1.3.2.2 nathanw printf("sunscpal_machine: Unexpected phase 0x%x\n", phase); 1787 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1788 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1789 1.3.2.2 nathanw goto next_phase; 1790 1.3.2.2 nathanw 1791 1.3.2.2 nathanw } /* switch */ 1792 1.3.2.2 nathanw sc->sc_prevphase = phase; 1793 1.3.2.2 nathanw 1794 1.3.2.2 nathanw do_actions: 1795 1.3.2.2 nathanw 1796 1.3.2.2 nathanw if (act_flags & ACT_WAIT_DMA) { 1797 1.3.2.2 nathanw act_flags &= ~ACT_WAIT_DMA; 1798 1.3.2.2 nathanw /* Wait for DMA to complete (polling, or interrupt). */ 1799 1.3.2.2 nathanw if ((sr->sr_flags & SR_IMMED) == 0) { 1800 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: wait for DMA intr.\n", 0); 1801 1.3.2.2 nathanw return; /* will resume at dma_done */ 1802 1.3.2.2 nathanw } 1803 1.3.2.2 nathanw /* Busy-wait for it to finish. */ 1804 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: dma_poll, dh=0x%x\n", 1805 1.3.2.2 nathanw (long) sr->sr_dma_hand); 1806 1.3.2.2 nathanw sunscpal_dma_poll(sc); 1807 1.3.2.2 nathanw dma_done: 1808 1.3.2.2 nathanw /* Return here after interrupt. */ 1809 1.3.2.2 nathanw if (sr->sr_flags & SR_OVERDUE) 1810 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1811 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: dma_stop, dh=0x%x\n", 1812 1.3.2.2 nathanw (long) sr->sr_dma_hand); 1813 1.3.2.2 nathanw sunscpal_dma_stop(sc); 1814 1.3.2.2 nathanw SUNSCPAL_CLR_INTR(sc); /* XXX */ 1815 1.3.2.2 nathanw /* 1816 1.3.2.2 nathanw * While DMA is running we can not touch the SBC, 1817 1.3.2.2 nathanw * so various places just set SUNSCPAL_ABORTING and 1818 1.3.2.2 nathanw * expect us the "kick it" when DMA is done. 1819 1.3.2.2 nathanw */ 1820 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_ABORTING) { 1821 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_ABORT); 1822 1.3.2.2 nathanw } 1823 1.3.2.2 nathanw } 1824 1.3.2.2 nathanw 1825 1.3.2.2 nathanw /* 1826 1.3.2.2 nathanw * Check for parity error. 1827 1.3.2.2 nathanw * XXX - better place to check? 1828 1.3.2.2 nathanw */ 1829 1.3.2.2 nathanw if (SUNSCPAL_READ_2(sc, sunscpal_icr) & SUNSCPAL_ICR_PARITY_ERROR) { 1830 1.3.2.2 nathanw printf("%s: parity error!\n", sc->sc_dev.dv_xname); 1831 1.3.2.2 nathanw /* XXX: sc->sc_state |= SUNSCPAL_ABORTING; */ 1832 1.3.2.2 nathanw sunscpal_sched_msgout(sc, SEND_PARITY_ERROR); 1833 1.3.2.2 nathanw } 1834 1.3.2.2 nathanw 1835 1.3.2.2 nathanw if (act_flags == ACT_CONTINUE) 1836 1.3.2.2 nathanw goto next_phase; 1837 1.3.2.2 nathanw /* All other actions "break" from the loop. */ 1838 1.3.2.2 nathanw 1839 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: act_flags=0x%x\n", act_flags); 1840 1.3.2.2 nathanw 1841 1.3.2.2 nathanw if (act_flags & ACT_RESET_BUS) { 1842 1.3.2.2 nathanw act_flags |= ACT_CMD_DONE; 1843 1.3.2.2 nathanw /* 1844 1.3.2.2 nathanw * Reset the SCSI bus, usually due to a timeout. 1845 1.3.2.2 nathanw * The error code XS_TIMEOUT allows retries. 1846 1.3.2.2 nathanw */ 1847 1.3.2.2 nathanw sc->sc_state |= SUNSCPAL_ABORTING; 1848 1.3.2.2 nathanw printf("%s: reset SCSI bus for TID=%d LUN=%d\n", 1849 1.3.2.2 nathanw sc->sc_dev.dv_xname, sr->sr_target, sr->sr_lun); 1850 1.3.2.2 nathanw sunscpal_reset_scsibus(sc); 1851 1.3.2.2 nathanw } 1852 1.3.2.2 nathanw 1853 1.3.2.2 nathanw if (act_flags & ACT_CMD_DONE) { 1854 1.3.2.2 nathanw act_flags |= ACT_DISCONNECT; 1855 1.3.2.2 nathanw /* Need to call scsipi_done() */ 1856 1.3.2.2 nathanw /* XXX: from the aic6360 driver, but why? */ 1857 1.3.2.2 nathanw if (sc->sc_datalen < 0) { 1858 1.3.2.2 nathanw printf("%s: %d extra bytes from %d:%d\n", 1859 1.3.2.2 nathanw sc->sc_dev.dv_xname, -sc->sc_datalen, 1860 1.3.2.2 nathanw sr->sr_target, sr->sr_lun); 1861 1.3.2.2 nathanw sc->sc_datalen = 0; 1862 1.3.2.2 nathanw } 1863 1.3.2.2 nathanw xs->resid = sc->sc_datalen; 1864 1.3.2.2 nathanw /* Note: this will clear sc_current */ 1865 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: call done, cur=0x%x\n", (long)sr); 1866 1.3.2.2 nathanw sunscpal_done(sc); 1867 1.3.2.2 nathanw } 1868 1.3.2.2 nathanw 1869 1.3.2.2 nathanw if (act_flags & ACT_DISCONNECT) { 1870 1.3.2.2 nathanw /* 1871 1.3.2.2 nathanw * The device has dropped BSY (or will soon). 1872 1.3.2.2 nathanw * We have to wait here for BSY to drop, otherwise 1873 1.3.2.2 nathanw * the next command may decide we need a bus reset. 1874 1.3.2.2 nathanw */ 1875 1.3.2.2 nathanw timo = sunscpal_wait_req_timo; /* XXX */ 1876 1.3.2.2 nathanw for (;;) { 1877 1.3.2.2 nathanw if (!SUNSCPAL_BUSY(sc)) 1878 1.3.2.2 nathanw goto busfree; 1879 1.3.2.2 nathanw if (--timo <= 0) 1880 1.3.2.2 nathanw break; 1881 1.3.2.2 nathanw delay(2); 1882 1.3.2.2 nathanw } 1883 1.3.2.2 nathanw /* Device is sitting on the bus! */ 1884 1.3.2.2 nathanw printf("%s: Target %d LUN %d stuck busy, resetting...\n", 1885 1.3.2.2 nathanw sc->sc_dev.dv_xname, sr->sr_target, sr->sr_lun); 1886 1.3.2.2 nathanw sunscpal_reset_scsibus(sc); 1887 1.3.2.2 nathanw busfree: 1888 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: discon, waited %d\n", 1889 1.3.2.2 nathanw sunscpal_wait_req_timo - timo); 1890 1.3.2.2 nathanw 1891 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_icr, 0); 1892 1.3.2.2 nathanw 1893 1.3.2.2 nathanw if ((act_flags & ACT_CMD_DONE) == 0) { 1894 1.3.2.2 nathanw SUNSCPAL_TRACE("machine: discon, cur=0x%x\n", (long)sr); 1895 1.3.2.2 nathanw } 1896 1.3.2.2 nathanw 1897 1.3.2.2 nathanw /* 1898 1.3.2.2 nathanw * We may be here due to a disconnect message, 1899 1.3.2.2 nathanw * in which case we did NOT call sunscpal_done, 1900 1.3.2.2 nathanw * and we need to clear sc_current. 1901 1.3.2.2 nathanw */ 1902 1.3.2.2 nathanw sc->sc_state = SUNSCPAL_IDLE; 1903 1.3.2.2 nathanw sc->sc_current = NULL; 1904 1.3.2.2 nathanw 1905 1.3.2.2 nathanw /* Paranoia: clear everything. */ 1906 1.3.2.2 nathanw sc->sc_dataptr = NULL; 1907 1.3.2.2 nathanw sc->sc_datalen = 0; 1908 1.3.2.2 nathanw sc->sc_prevphase = SUNSCPAL_PHASE_INVALID; 1909 1.3.2.2 nathanw sc->sc_msgpriq = 0; 1910 1.3.2.2 nathanw sc->sc_msgoutq = 0; 1911 1.3.2.2 nathanw sc->sc_msgout = 0; 1912 1.3.2.2 nathanw 1913 1.3.2.2 nathanw /* Our caller will re-enable interrupts. */ 1914 1.3.2.2 nathanw } 1915 1.3.2.2 nathanw } 1916 1.3.2.2 nathanw 1917 1.3.2.2 nathanw 1918 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 1919 1.3.2.2 nathanw 1920 1.3.2.2 nathanw static void 1921 1.3.2.2 nathanw sunscpal_show_scsi_cmd(xs) 1922 1.3.2.2 nathanw struct scsipi_xfer *xs; 1923 1.3.2.2 nathanw { 1924 1.3.2.2 nathanw u_char *b = (u_char *) xs->cmd; 1925 1.3.2.2 nathanw int i = 0; 1926 1.3.2.2 nathanw 1927 1.3.2.2 nathanw scsipi_printaddr(xs->xs_periph); 1928 1.3.2.2 nathanw if ( ! ( xs->xs_control & XS_CTL_RESET ) ) { 1929 1.3.2.2 nathanw printf("-"); 1930 1.3.2.2 nathanw while (i < xs->cmdlen) { 1931 1.3.2.2 nathanw if (i) printf(","); 1932 1.3.2.2 nathanw printf("%x",b[i++]); 1933 1.3.2.2 nathanw } 1934 1.3.2.2 nathanw printf("-\n"); 1935 1.3.2.2 nathanw } else { 1936 1.3.2.2 nathanw 1937 1.3.2.2 nathanw printf("-RESET-\n"); 1938 1.3.2.2 nathanw } 1939 1.3.2.2 nathanw } 1940 1.3.2.2 nathanw 1941 1.3.2.2 nathanw 1942 1.3.2.2 nathanw int sunscpal_traceidx = 0; 1943 1.3.2.2 nathanw 1944 1.3.2.2 nathanw #define TRACE_MAX 1024 1945 1.3.2.2 nathanw struct trace_ent { 1946 1.3.2.2 nathanw char *msg; 1947 1.3.2.2 nathanw long val; 1948 1.3.2.2 nathanw } sunscpal_tracebuf[TRACE_MAX]; 1949 1.3.2.2 nathanw 1950 1.3.2.2 nathanw void 1951 1.3.2.2 nathanw sunscpal_trace(msg, val) 1952 1.3.2.2 nathanw char *msg; 1953 1.3.2.2 nathanw long val; 1954 1.3.2.2 nathanw { 1955 1.3.2.2 nathanw struct trace_ent *tr; 1956 1.3.2.2 nathanw int s; 1957 1.3.2.2 nathanw 1958 1.3.2.2 nathanw s = splbio(); 1959 1.3.2.2 nathanw 1960 1.3.2.2 nathanw tr = &sunscpal_tracebuf[sunscpal_traceidx]; 1961 1.3.2.2 nathanw 1962 1.3.2.2 nathanw sunscpal_traceidx++; 1963 1.3.2.2 nathanw if (sunscpal_traceidx >= TRACE_MAX) 1964 1.3.2.2 nathanw sunscpal_traceidx = 0; 1965 1.3.2.2 nathanw 1966 1.3.2.2 nathanw tr->msg = msg; 1967 1.3.2.2 nathanw tr->val = val; 1968 1.3.2.2 nathanw 1969 1.3.2.2 nathanw splx(s); 1970 1.3.2.2 nathanw } 1971 1.3.2.2 nathanw 1972 1.3.2.2 nathanw #ifdef DDB 1973 1.3.2.2 nathanw void 1974 1.3.2.2 nathanw sunscpal_clear_trace() 1975 1.3.2.2 nathanw { 1976 1.3.2.2 nathanw sunscpal_traceidx = 0; 1977 1.3.2.3 nathanw memset((char*) sunscpal_tracebuf, 0, sizeof(sunscpal_tracebuf)); 1978 1.3.2.2 nathanw } 1979 1.3.2.2 nathanw 1980 1.3.2.2 nathanw void 1981 1.3.2.2 nathanw sunscpal_show_trace() 1982 1.3.2.2 nathanw { 1983 1.3.2.2 nathanw struct trace_ent *tr; 1984 1.3.2.2 nathanw int idx; 1985 1.3.2.2 nathanw 1986 1.3.2.2 nathanw idx = sunscpal_traceidx; 1987 1.3.2.2 nathanw do { 1988 1.3.2.2 nathanw tr = &sunscpal_tracebuf[idx]; 1989 1.3.2.2 nathanw idx++; 1990 1.3.2.2 nathanw if (idx >= TRACE_MAX) 1991 1.3.2.2 nathanw idx = 0; 1992 1.3.2.2 nathanw if (tr->msg) 1993 1.3.2.2 nathanw db_printf(tr->msg, tr->val); 1994 1.3.2.2 nathanw } while (idx != sunscpal_traceidx); 1995 1.3.2.2 nathanw } 1996 1.3.2.2 nathanw 1997 1.3.2.2 nathanw void 1998 1.3.2.2 nathanw sunscpal_show_req(sr) 1999 1.3.2.2 nathanw struct sunscpal_req *sr; 2000 1.3.2.2 nathanw { 2001 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 2002 1.3.2.2 nathanw 2003 1.3.2.2 nathanw db_printf("TID=%d ", sr->sr_target); 2004 1.3.2.2 nathanw db_printf("LUN=%d ", sr->sr_lun); 2005 1.3.2.2 nathanw db_printf("dh=%p ", sr->sr_dma_hand); 2006 1.3.2.2 nathanw db_printf("dptr=%p ", sr->sr_dataptr); 2007 1.3.2.2 nathanw db_printf("dlen=0x%x ", sr->sr_datalen); 2008 1.3.2.2 nathanw db_printf("flags=%d ", sr->sr_flags); 2009 1.3.2.2 nathanw db_printf("stat=%d ", sr->sr_status); 2010 1.3.2.2 nathanw 2011 1.3.2.2 nathanw if (xs == NULL) { 2012 1.3.2.2 nathanw db_printf("(xs=NULL)\n"); 2013 1.3.2.2 nathanw return; 2014 1.3.2.2 nathanw } 2015 1.3.2.2 nathanw db_printf("\n"); 2016 1.3.2.2 nathanw #ifdef SCSIDEBUG 2017 1.3.2.2 nathanw show_scsipi_xs(xs); 2018 1.3.2.2 nathanw #else 2019 1.3.2.2 nathanw db_printf("xs=%p\n", xs); 2020 1.3.2.2 nathanw #endif 2021 1.3.2.2 nathanw } 2022 1.3.2.2 nathanw 2023 1.3.2.2 nathanw void 2024 1.3.2.2 nathanw sunscpal_show_state() 2025 1.3.2.2 nathanw { 2026 1.3.2.2 nathanw struct sunscpal_softc *sc; 2027 1.3.2.2 nathanw struct sunscpal_req *sr; 2028 1.3.2.2 nathanw int i, j, k; 2029 1.3.2.2 nathanw 2030 1.3.2.2 nathanw sc = sunscpal_debug_sc; 2031 1.3.2.2 nathanw 2032 1.3.2.2 nathanw if (sc == NULL) { 2033 1.3.2.2 nathanw db_printf("sunscpal_debug_sc == NULL\n"); 2034 1.3.2.2 nathanw return; 2035 1.3.2.2 nathanw } 2036 1.3.2.2 nathanw 2037 1.3.2.2 nathanw db_printf("sc_ncmds=%d\n", sc->sc_ncmds); 2038 1.3.2.2 nathanw k = -1; /* which is current? */ 2039 1.3.2.2 nathanw for (i = 0; i < SUNSCPAL_OPENINGS; i++) { 2040 1.3.2.2 nathanw sr = &sc->sc_ring[i]; 2041 1.3.2.2 nathanw if (sr->sr_xs) { 2042 1.3.2.2 nathanw if (sr == sc->sc_current) 2043 1.3.2.2 nathanw k = i; 2044 1.3.2.2 nathanw db_printf("req %d: (sr=%p)", i, sr); 2045 1.3.2.2 nathanw sunscpal_show_req(sr); 2046 1.3.2.2 nathanw } 2047 1.3.2.2 nathanw } 2048 1.3.2.2 nathanw db_printf("sc_rr=%d, current=%d\n", sc->sc_rr, k); 2049 1.3.2.2 nathanw 2050 1.3.2.2 nathanw db_printf("Active request matrix:\n"); 2051 1.3.2.2 nathanw for(i = 0; i < 8; i++) { /* targets */ 2052 1.3.2.2 nathanw for (j = 0; j < 8; j++) { /* LUN */ 2053 1.3.2.2 nathanw sr = sc->sc_matrix[i][j]; 2054 1.3.2.2 nathanw if (sr) { 2055 1.3.2.2 nathanw db_printf("TID=%d LUN=%d sr=%p\n", i, j, sr); 2056 1.3.2.2 nathanw } 2057 1.3.2.2 nathanw } 2058 1.3.2.2 nathanw } 2059 1.3.2.2 nathanw 2060 1.3.2.2 nathanw db_printf("sc_state=0x%x\n", sc->sc_state); 2061 1.3.2.2 nathanw db_printf("sc_current=%p\n", sc->sc_current); 2062 1.3.2.2 nathanw db_printf("sc_dataptr=%p\n", sc->sc_dataptr); 2063 1.3.2.2 nathanw db_printf("sc_datalen=0x%x\n", sc->sc_datalen); 2064 1.3.2.2 nathanw 2065 1.3.2.2 nathanw db_printf("sc_prevphase=%d\n", sc->sc_prevphase); 2066 1.3.2.2 nathanw db_printf("sc_msgpriq=0x%x\n", sc->sc_msgpriq); 2067 1.3.2.2 nathanw } 2068 1.3.2.2 nathanw #endif /* DDB */ 2069 1.3.2.2 nathanw #endif /* SUNSCPAL_DEBUG */ 2070 1.3.2.2 nathanw 2071 1.3.2.2 nathanw void 2072 1.3.2.2 nathanw sunscpal_attach(sc, options) 2073 1.3.2.2 nathanw struct sunscpal_softc *sc; 2074 1.3.2.2 nathanw int options; 2075 1.3.2.2 nathanw { 2076 1.3.2.2 nathanw 2077 1.3.2.2 nathanw /* 2078 1.3.2.2 nathanw * Handle our options. 2079 1.3.2.2 nathanw */ 2080 1.3.2.2 nathanw printf(": options=0x%x\n", options); 2081 1.3.2.2 nathanw sc->sc_parity_disable = (options & SUNSCPAL_OPT_NO_PARITY_CHK); 2082 1.3.2.2 nathanw if (options & SUNSCPAL_OPT_FORCE_POLLING) 2083 1.3.2.2 nathanw sc->sc_flags |= SUNSCPAL_FORCE_POLLING; 2084 1.3.2.2 nathanw if (options & SUNSCPAL_OPT_DISABLE_DMA) 2085 1.3.2.2 nathanw sc->sc_flags |= SUNSCPAL_DISABLE_DMA; 2086 1.3.2.2 nathanw 2087 1.3.2.2 nathanw /* 2088 1.3.2.2 nathanw * Fill in the adapter. 2089 1.3.2.2 nathanw */ 2090 1.3.2.2 nathanw memset(&sc->sc_adapter, 0, sizeof(sc->sc_adapter)); 2091 1.3.2.2 nathanw sc->sc_adapter.adapt_dev = &sc->sc_dev; 2092 1.3.2.2 nathanw sc->sc_adapter.adapt_nchannels = 1; 2093 1.3.2.2 nathanw sc->sc_adapter.adapt_openings = SUNSCPAL_OPENINGS; 2094 1.3.2.2 nathanw sc->sc_adapter.adapt_max_periph = 1; 2095 1.3.2.2 nathanw sc->sc_adapter.adapt_request = sunscpal_scsipi_request; 2096 1.3.2.2 nathanw sc->sc_adapter.adapt_minphys = sunscpal_minphys; 2097 1.3.2.2 nathanw 2098 1.3.2.2 nathanw sc->sc_channel.chan_adapter = &sc->sc_adapter; 2099 1.3.2.2 nathanw sc->sc_channel.chan_bustype = &scsi_bustype; 2100 1.3.2.2 nathanw sc->sc_channel.chan_channel = 0; 2101 1.3.2.2 nathanw sc->sc_channel.chan_ntargets = 8; 2102 1.3.2.2 nathanw sc->sc_channel.chan_nluns = 8; 2103 1.3.2.2 nathanw sc->sc_channel.chan_id = 7; 2104 1.3.2.2 nathanw 2105 1.3.2.2 nathanw /* 2106 1.3.2.2 nathanw * Add reference to adapter so that we drop the reference after 2107 1.3.2.2 nathanw * config_found() to make sure the adatper is disabled. 2108 1.3.2.2 nathanw */ 2109 1.3.2.2 nathanw if (scsipi_adapter_addref(&sc->sc_adapter) != 0) { 2110 1.3.2.2 nathanw printf("%s: unable to enable controller\n", 2111 1.3.2.2 nathanw sc->sc_dev.dv_xname); 2112 1.3.2.2 nathanw return; 2113 1.3.2.2 nathanw } 2114 1.3.2.2 nathanw 2115 1.3.2.2 nathanw sunscpal_init(sc); /* Init chip and driver */ 2116 1.3.2.2 nathanw sunscpal_reset_scsibus(sc); 2117 1.3.2.2 nathanw 2118 1.3.2.2 nathanw /* 2119 1.3.2.2 nathanw * Ask the adapter what subunits are present 2120 1.3.2.2 nathanw */ 2121 1.3.2.2 nathanw (void) config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 2122 1.3.2.2 nathanw scsipi_adapter_delref(&sc->sc_adapter); 2123 1.3.2.2 nathanw } 2124 1.3.2.2 nathanw 2125 1.3.2.2 nathanw int 2126 1.3.2.2 nathanw sunscpal_detach(sc, flags) 2127 1.3.2.2 nathanw struct sunscpal_softc *sc; 2128 1.3.2.2 nathanw int flags; 2129 1.3.2.2 nathanw { 2130 1.3.2.2 nathanw 2131 1.3.2.2 nathanw return (EOPNOTSUPP); 2132 1.3.2.2 nathanw } 2133 1.3.2.2 nathanw 2134 1.3.2.2 nathanw static void 2135 1.3.2.2 nathanw sunscpal_minphys(struct buf *bp) 2136 1.3.2.2 nathanw { 2137 1.3.2.2 nathanw if (bp->b_bcount > SUNSCPAL_MAX_DMA_LEN) { 2138 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 2139 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_DMA) { 2140 1.3.2.2 nathanw printf("sunscpal_minphys len = 0x%lx.\n", bp->b_bcount); 2141 1.3.2.2 nathanw Debugger(); 2142 1.3.2.2 nathanw } 2143 1.3.2.2 nathanw #endif 2144 1.3.2.2 nathanw bp->b_bcount = SUNSCPAL_MAX_DMA_LEN; 2145 1.3.2.2 nathanw } 2146 1.3.2.2 nathanw return (minphys(bp)); 2147 1.3.2.2 nathanw } 2148 1.3.2.2 nathanw 2149 1.3.2.2 nathanw #ifdef SUNSCPAL_USE_BUS_DMA 2150 1.3.2.2 nathanw 2151 1.3.2.2 nathanw /* 2152 1.3.2.2 nathanw * Allocate a DMA handle and put it in sr->sr_dma_hand. Prepare 2153 1.3.2.2 nathanw * for DMA transfer. 2154 1.3.2.2 nathanw */ 2155 1.3.2.2 nathanw static void 2156 1.3.2.2 nathanw sunscpal_dma_alloc(sc) 2157 1.3.2.2 nathanw struct sunscpal_softc *sc; 2158 1.3.2.2 nathanw { 2159 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 2160 1.3.2.2 nathanw sunscpal_dma_handle_t dh; 2161 1.3.2.2 nathanw int i, xlen; 2162 1.3.2.2 nathanw u_long addr; 2163 1.3.2.2 nathanw 2164 1.3.2.2 nathanw #ifdef DIAGNOSTIC 2165 1.3.2.2 nathanw if (sr->sr_dma_hand != NULL) 2166 1.3.2.2 nathanw panic("sunscpal_dma_alloc: already have DMA handle"); 2167 1.3.2.2 nathanw #endif 2168 1.3.2.2 nathanw 2169 1.3.2.2 nathanw addr = (u_long) sc->sc_dataptr; 2170 1.3.2.2 nathanw xlen = sc->sc_datalen; 2171 1.3.2.2 nathanw 2172 1.3.2.2 nathanw /* If the DMA start addr is misaligned then do PIO */ 2173 1.3.2.2 nathanw if ((addr & 1) || (xlen & 1)) { 2174 1.3.2.2 nathanw printf("sunscpal_dma_alloc: misaligned.\n"); 2175 1.3.2.2 nathanw return; 2176 1.3.2.2 nathanw } 2177 1.3.2.2 nathanw 2178 1.3.2.2 nathanw /* Make sure our caller checked sc_min_dma_len. */ 2179 1.3.2.2 nathanw if (xlen < sc->sc_min_dma_len) 2180 1.3.2.8 nathanw panic("sunscpal_dma_alloc: xlen=0x%x", xlen); 2181 1.3.2.2 nathanw 2182 1.3.2.2 nathanw /* 2183 1.3.2.2 nathanw * Never attempt single transfers of more than 63k, because 2184 1.3.2.2 nathanw * our count register is only 16 bits. 2185 1.3.2.2 nathanw * This should never happen since already bounded by minphys(). 2186 1.3.2.2 nathanw * XXX - Should just segment these... 2187 1.3.2.2 nathanw */ 2188 1.3.2.2 nathanw if (xlen > SUNSCPAL_MAX_DMA_LEN) { 2189 1.3.2.2 nathanw printf("sunscpal_dma_alloc: excessive xlen=0x%x\n", xlen); 2190 1.3.2.2 nathanw Debugger(); 2191 1.3.2.2 nathanw sc->sc_datalen = xlen = SUNSCPAL_MAX_DMA_LEN; 2192 1.3.2.2 nathanw } 2193 1.3.2.2 nathanw 2194 1.3.2.2 nathanw /* Find free DMA handle. Guaranteed to find one since we have 2195 1.3.2.2 nathanw as many DMA handles as the driver has processes. */ 2196 1.3.2.2 nathanw for (i = 0; i < SUNSCPAL_OPENINGS; i++) { 2197 1.3.2.2 nathanw if ((sc->sc_dma_handles[i].dh_flags & SUNSCDH_BUSY) == 0) 2198 1.3.2.2 nathanw goto found; 2199 1.3.2.2 nathanw } 2200 1.3.2.2 nathanw panic("sc: no free DMA handles."); 2201 1.3.2.2 nathanw found: 2202 1.3.2.2 nathanw 2203 1.3.2.2 nathanw dh = &sc->sc_dma_handles[i]; 2204 1.3.2.2 nathanw dh->dh_flags = SUNSCDH_BUSY; 2205 1.3.2.2 nathanw dh->dh_mapaddr = (u_char*) addr; 2206 1.3.2.2 nathanw dh->dh_maplen = xlen; 2207 1.3.2.2 nathanw dh->dh_dvma = 0; 2208 1.3.2.2 nathanw 2209 1.3.2.2 nathanw /* Load the DMA map. */ 2210 1.3.2.2 nathanw if (bus_dmamap_load(sc->sunscpal_dmat, dh->dh_dmamap, dh->dh_mapaddr, dh->dh_maplen, NULL, BUS_DMA_NOWAIT) != 0) { 2211 1.3.2.2 nathanw /* Can't load map */ 2212 1.3.2.2 nathanw printf("sunscpal_dma_alloc: can't DMA %p/0x%x\n", 2213 1.3.2.2 nathanw dh->dh_mapaddr, dh->dh_maplen); 2214 1.3.2.2 nathanw dh->dh_flags = 0; 2215 1.3.2.2 nathanw return; 2216 1.3.2.2 nathanw } 2217 1.3.2.2 nathanw 2218 1.3.2.2 nathanw /* success */ 2219 1.3.2.2 nathanw sr->sr_dma_hand = dh; 2220 1.3.2.2 nathanw 2221 1.3.2.2 nathanw return; 2222 1.3.2.2 nathanw } 2223 1.3.2.2 nathanw 2224 1.3.2.2 nathanw static void 2225 1.3.2.2 nathanw sunscpal_dma_free(sc) 2226 1.3.2.2 nathanw struct sunscpal_softc *sc; 2227 1.3.2.2 nathanw { 2228 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 2229 1.3.2.2 nathanw sunscpal_dma_handle_t dh = sr->sr_dma_hand; 2230 1.3.2.2 nathanw 2231 1.3.2.2 nathanw #ifdef DIAGNOSTIC 2232 1.3.2.2 nathanw if (dh == NULL) 2233 1.3.2.2 nathanw panic("sunscpal_dma_free: no DMA handle"); 2234 1.3.2.2 nathanw #endif 2235 1.3.2.2 nathanw 2236 1.3.2.2 nathanw if (sc->sc_state & SUNSCPAL_DOINGDMA) 2237 1.3.2.2 nathanw panic("sunscpal_dma_free: free while in progress"); 2238 1.3.2.2 nathanw 2239 1.3.2.2 nathanw if (dh->dh_flags & SUNSCDH_BUSY) { 2240 1.3.2.2 nathanw /* XXX - Should separate allocation and mapping. */ 2241 1.3.2.2 nathanw /* Give back the DVMA space. */ 2242 1.3.2.2 nathanw bus_dmamap_unload(sc->sunscpal_dmat, dh->dh_dmamap); 2243 1.3.2.2 nathanw dh->dh_flags = 0; 2244 1.3.2.2 nathanw } 2245 1.3.2.2 nathanw sr->sr_dma_hand = NULL; 2246 1.3.2.2 nathanw } 2247 1.3.2.2 nathanw 2248 1.3.2.2 nathanw /* 2249 1.3.2.2 nathanw * This function is called during the SELECT phase that 2250 1.3.2.2 nathanw * precedes a COMMAND phase, in case we need to setup the 2251 1.3.2.2 nathanw * DMA engine before the bus enters a DATA phase. 2252 1.3.2.2 nathanw * 2253 1.3.2.2 nathanw * On the sc version, setup the start address and the count. 2254 1.3.2.2 nathanw */ 2255 1.3.2.2 nathanw static void 2256 1.3.2.2 nathanw sunscpal_dma_setup(sc) 2257 1.3.2.2 nathanw struct sunscpal_softc *sc; 2258 1.3.2.2 nathanw { 2259 1.3.2.2 nathanw struct sunscpal_req *sr = sc->sc_current; 2260 1.3.2.2 nathanw struct scsipi_xfer *xs = sr->sr_xs; 2261 1.3.2.2 nathanw sunscpal_dma_handle_t dh = sr->sr_dma_hand; 2262 1.3.2.2 nathanw long data_pa; 2263 1.3.2.2 nathanw int xlen; 2264 1.3.2.2 nathanw 2265 1.3.2.2 nathanw /* 2266 1.3.2.2 nathanw * Get the DVMA mapping for this segment. 2267 1.3.2.2 nathanw * XXX - Should separate allocation and mapin. 2268 1.3.2.2 nathanw */ 2269 1.3.2.2 nathanw data_pa = dh->dh_dvma; 2270 1.3.2.2 nathanw data_pa += (sc->sc_dataptr - dh->dh_mapaddr); 2271 1.3.2.2 nathanw if (data_pa & 1) 2272 1.3.2.2 nathanw panic("sunscpal_dma_setup: bad pa=0x%lx", data_pa); 2273 1.3.2.2 nathanw xlen = sc->sc_datalen; 2274 1.3.2.2 nathanw if (xlen & 1) 2275 1.3.2.2 nathanw panic("sunscpal_dma_setup: bad xlen=0x%x", xlen); 2276 1.3.2.2 nathanw sc->sc_reqlen = xlen; /* XXX: or less? */ 2277 1.3.2.2 nathanw 2278 1.3.2.2 nathanw #ifdef SUNSCPAL_DEBUG 2279 1.3.2.2 nathanw if (sunscpal_debug & SUNSCPAL_DBG_DMA) { 2280 1.3.2.2 nathanw printf("sunscpal_dma_setup: dh=%p, pa=0x%lx, xlen=0x%x\n", 2281 1.3.2.2 nathanw dh, data_pa, xlen); 2282 1.3.2.2 nathanw } 2283 1.3.2.2 nathanw #endif 2284 1.3.2.2 nathanw 2285 1.3.2.2 nathanw /* sync the DMA map: */ 2286 1.3.2.2 nathanw bus_dmamap_sync(sc->sunscpal_dmat, dh->dh_dmamap, 0, dh->dh_maplen, 2287 1.3.2.2 nathanw ((xs->xs_control & XS_CTL_DATA_OUT) == 0 ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 2288 1.3.2.2 nathanw 2289 1.3.2.2 nathanw /* Load the start address and the count. */ 2290 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_addr_h, (data_pa >> 16) & 0xFFFF); 2291 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_addr_l, (data_pa >> 0) & 0xFFFF); 2292 1.3.2.2 nathanw SUNSCPAL_WRITE_2(sc, sunscpal_dma_count, SUNSCPAL_DMA_COUNT_FLIP(xlen)); 2293 1.3.2.2 nathanw } 2294 1.3.2.2 nathanw 2295 1.3.2.2 nathanw #endif /* SUNSCPAL_USE_BUS_DMA */ 2296
Indexes created Mon Oct 20 20:10:13 GMT 2025