tpm.c revision 1.3
1 /* $NetBSD: tpm.c,v 1.3 2012/01/22 20:41:25 christos Exp $ */ 2 /* 3 * Copyright (c) 2008, 2009 Michael Shalayeff 4 * Copyright (c) 2009, 2010 Hans-Jrg Hxer 5 * All rights reserved. 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN 16 * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT 17 * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __KERNEL_RCSID(0, "$NetBSD: tpm.c,v 1.3 2012/01/22 20:41:25 christos Exp $"); 22 23 #if 0 24 #define TPM_DEBUG 25 #define aprint_debug_dev aprint_error_dev 26 #endif 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/kernel.h> 31 #include <sys/malloc.h> 32 #include <sys/proc.h> 33 #include <sys/device.h> 34 #include <sys/conf.h> 35 #include <sys/bus.h> 36 #include <sys/pmf.h> 37 38 #include <dev/ic/tpmreg.h> 39 #include <dev/ic/tpmvar.h> 40 41 /* Set when enabling legacy interface in host bridge. */ 42 int tpm_enabled; 43 44 const struct { 45 uint32_t devid; 46 char name[32]; 47 int flags; 48 #define TPM_DEV_NOINTS 0x0001 49 } tpm_devs[] = { 50 { 0x000615d1, "IFX SLD 9630 TT 1.1", 0 }, 51 { 0x000b15d1, "IFX SLB 9635 TT 1.2", 0 }, 52 { 0x100214e4, "Broadcom BCM0102", TPM_DEV_NOINTS }, 53 { 0x00fe1050, "WEC WPCT200", 0 }, 54 { 0x687119fa, "SNS SSX35", 0 }, 55 { 0x2e4d5453, "STM ST19WP18", 0 }, 56 { 0x32021114, "ATML 97SC3203", TPM_DEV_NOINTS }, 57 { 0x10408086, "INTEL INTC0102", 0 }, 58 { 0, "", TPM_DEV_NOINTS }, 59 }; 60 61 int tpm_tis12_irqinit(struct tpm_softc *, int, int); 62 63 int tpm_waitfor_poll(struct tpm_softc *, uint8_t, int, void *); 64 int tpm_waitfor_int(struct tpm_softc *, uint8_t, int, void *, int); 65 int tpm_waitfor(struct tpm_softc *, uint8_t, int, void *); 66 int tpm_request_locality(struct tpm_softc *, int); 67 int tpm_getburst(struct tpm_softc *); 68 uint8_t tpm_status(struct tpm_softc *); 69 int tpm_tmotohz(int); 70 71 static dev_type_open(tpmopen); 72 static dev_type_close(tpmclose); 73 static dev_type_read(tpmread); 74 static dev_type_read(tpmwrite); 75 static dev_type_ioctl(tpmioctl); 76 77 extern struct cfdriver tpm_cd; 78 #define TPMUNIT(a) minor(a) 79 80 const struct cdevsw tpm_cdevsw = { 81 tpmopen, tpmclose, tpmread, tpmwrite, tpmioctl, 82 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 83 }; 84 85 /* Probe TPM using TIS 1.2 interface. */ 86 int 87 tpm_tis12_probe(bus_space_tag_t bt, bus_space_handle_t bh) 88 { 89 uint32_t r; 90 uint8_t save, reg; 91 92 r = bus_space_read_4(bt, bh, TPM_INTF_CAPABILITIES); 93 if (r == 0xffffffff) 94 return 0; 95 96 #ifdef TPM_DEBUG 97 char buf[128]; 98 snprintb(buf, sizeof(buf), TPM_CAPBITS, r); 99 printf("%s: caps=%s\n", __func__, buf); 100 #endif 101 if ((r & TPM_CAPSREQ) != TPM_CAPSREQ || 102 !(r & (TPM_INTF_INT_EDGE_RISING | TPM_INTF_INT_LEVEL_LOW))) { 103 #ifdef TPM_DEBUG 104 printf("%s: caps too low (caps=%s)\n", __func__, buf); 105 #endif 106 return 0; 107 } 108 109 save = bus_space_read_1(bt, bh, TPM_ACCESS); 110 bus_space_write_1(bt, bh, TPM_ACCESS, TPM_ACCESS_REQUEST_USE); 111 reg = bus_space_read_1(bt, bh, TPM_ACCESS); 112 if ((reg & TPM_ACCESS_VALID) && (reg & TPM_ACCESS_ACTIVE_LOCALITY) && 113 bus_space_read_4(bt, bh, TPM_ID) != 0xffffffff) 114 return 1; 115 116 bus_space_write_1(bt, bh, TPM_ACCESS, save); 117 return 0; 118 } 119 120 /* 121 * Setup interrupt vector if one is provided and interrupts are know to 122 * work on that particular chip. 123 */ 124 int 125 tpm_tis12_irqinit(struct tpm_softc *sc, int irq, int idx) 126 { 127 uint32_t r; 128 129 if ((irq == -1) || (tpm_devs[idx].flags & TPM_DEV_NOINTS)) { 130 sc->sc_vector = -1; 131 return 0; 132 } 133 134 /* Ack and disable all interrupts. */ 135 bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE, 136 bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) & 137 ~TPM_GLOBAL_INT_ENABLE); 138 bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS, 139 bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS)); 140 141 /* Program interrupt vector. */ 142 bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_INT_VECTOR, irq); 143 sc->sc_vector = irq; 144 145 /* Program interrupt type. */ 146 if (sc->sc_capabilities & TPM_INTF_INT_EDGE_RISING) 147 r = TPM_INT_EDGE_RISING; 148 else if (sc->sc_capabilities & TPM_INTF_INT_LEVEL_HIGH) 149 r = TPM_INT_LEVEL_HIGH; 150 else 151 r = TPM_INT_LEVEL_LOW; 152 bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE, r); 153 154 return 0; 155 } 156 157 /* Setup TPM using TIS 1.2 interface. */ 158 int 159 tpm_tis12_init(struct tpm_softc *sc, int irq, const char *name) 160 { 161 uint32_t r; 162 int i; 163 164 r = bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTF_CAPABILITIES); 165 #ifdef TPM_DEBUG 166 char cbuf[128]; 167 snprintb(cbuf, sizeof(cbuf), TPM_CAPBITS, r); 168 aprint_debug_dev(sc->sc_dev, "%s: caps=%s ", __func__, cbuf); 169 #endif 170 if ((r & TPM_CAPSREQ) != TPM_CAPSREQ || 171 !(r & (TPM_INTF_INT_EDGE_RISING | TPM_INTF_INT_LEVEL_LOW))) { 172 char buf[128]; 173 snprintb(buf, sizeof(buf), TPM_CAPBITS, r); 174 aprint_error_dev(sc->sc_dev, "capabilities too low (caps=%s)\n", 175 buf); 176 return 1; 177 } 178 sc->sc_capabilities = r; 179 180 sc->sc_devid = bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_ID); 181 sc->sc_rev = bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_REV); 182 183 for (i = 0; tpm_devs[i].devid; i++) 184 if (tpm_devs[i].devid == sc->sc_devid) 185 break; 186 187 if (tpm_devs[i].devid) 188 aprint_normal(": %s rev 0x%x\n", 189 tpm_devs[i].name, sc->sc_rev); 190 else 191 aprint_normal(": device 0x%08x rev 0x%x\n", 192 sc->sc_devid, sc->sc_rev); 193 194 if (tpm_tis12_irqinit(sc, irq, i)) 195 return 1; 196 197 if (tpm_request_locality(sc, 0)) 198 return 1; 199 200 /* Abort whatever it thought it was doing. */ 201 bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_STS, TPM_STS_CMD_READY); 202 203 return 0; 204 } 205 206 int 207 tpm_request_locality(struct tpm_softc *sc, int l) 208 { 209 uint32_t r; 210 int to, rv; 211 212 if (l != 0) 213 return EINVAL; 214 215 if ((bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_ACCESS) & 216 (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) == 217 (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) 218 return 0; 219 220 bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_ACCESS, 221 TPM_ACCESS_REQUEST_USE); 222 223 to = tpm_tmotohz(TPM_ACCESS_TMO); 224 225 while ((r = bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_ACCESS) & 226 (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) != 227 (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY) && to--) { 228 rv = tsleep(sc->sc_init, PRIBIO | PCATCH, "tpm_locality", 1); 229 if (rv && rv != EWOULDBLOCK) { 230 #ifdef TPM_DEBUG 231 aprint_debug_dev(sc->sc_dev, "%s: interrupted %d\n", 232 __func__, rv); 233 #endif 234 return rv; 235 } 236 } 237 238 if ((r & (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) != 239 (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) { 240 #ifdef TPM_DEBUG 241 char buf[128]; 242 snprintb(buf, sizeof(buf), TPM_ACCESS_BITS, r); 243 aprint_debug_dev(sc->sc_dev, "%s: access %s\n", __func__, buf); 244 #endif 245 return EBUSY; 246 } 247 248 return 0; 249 } 250 251 int 252 tpm_getburst(struct tpm_softc *sc) 253 { 254 int burst, to, rv; 255 256 to = tpm_tmotohz(TPM_BURST_TMO); 257 258 burst = 0; 259 while (burst == 0 && to--) { 260 /* 261 * Burst count has to be read from bits 8 to 23 without 262 * touching any other bits, eg. the actual status bits 0 263 * to 7. 264 */ 265 burst = bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_STS + 1); 266 burst |= bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_STS + 2) 267 << 8; 268 #ifdef TPM_DEBUG 269 aprint_debug_dev(sc->sc_dev, "%s: read %d\n", __func__, burst); 270 #endif 271 if (burst) 272 return burst; 273 274 rv = tsleep(sc, PRIBIO | PCATCH, "tpm_getburst", 1); 275 if (rv && rv != EWOULDBLOCK) { 276 return 0; 277 } 278 } 279 280 return 0; 281 } 282 283 uint8_t 284 tpm_status(struct tpm_softc *sc) 285 { 286 return bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_STS) & TPM_STS_MASK; 287 } 288 289 int 290 tpm_tmotohz(int tmo) 291 { 292 struct timeval tv; 293 294 tv.tv_sec = tmo / 1000; 295 tv.tv_usec = 1000 * (tmo % 1000); 296 297 return tvtohz(&tv); 298 } 299 300 /* Save TPM state on suspend. */ 301 bool 302 tpm_suspend(device_t dev, const pmf_qual_t *qual) 303 { 304 struct tpm_softc *sc = device_private(dev); 305 static const uint8_t command[] = { 306 0, 193, /* TPM_TAG_RQU_COMMAND */ 307 0, 0, 0, 10, /* Length in bytes */ 308 0, 0, 0, 156 /* TPM_ORD_SaveStates */ 309 }; 310 311 /* 312 * Power down: We have to issue the SaveStates command. 313 */ 314 (*sc->sc_write)(sc, &command, sizeof(command)); 315 (*sc->sc_read)(sc, &command, sizeof(command), NULL, TPM_HDRSIZE); 316 #ifdef TPM_DEBUG 317 aprint_debug_dev(sc->sc_dev, "%s: power down\n", __func__); 318 #endif 319 return 0; 320 } 321 322 /* 323 * Handle resume event. Actually nothing to do as the BIOS is supposed 324 * to restore the previously saved state. 325 */ 326 bool 327 tpm_resume(device_t dev, const pmf_qual_t *qual) 328 { 329 #ifdef TPM_DEBUG 330 struct tpm_softc *sc = device_private(dev); 331 aprint_debug_dev(sc->sc_dev, "%s: resume\n", __func__); 332 #endif 333 return 0; 334 } 335 336 /* Wait for given status bits using polling. */ 337 int 338 tpm_waitfor_poll(struct tpm_softc *sc, uint8_t mask, int tmo, void *c) 339 { 340 int rv; 341 342 /* 343 * Poll until either the requested condition or a time out is 344 * met. 345 */ 346 while (((sc->sc_stat = tpm_status(sc)) & mask) != mask && tmo--) { 347 rv = tsleep(c, PRIBIO | PCATCH, "tpm_poll", 1); 348 if (rv && rv != EWOULDBLOCK) { 349 #ifdef TPM_DEBUG 350 aprint_debug_dev(sc->sc_dev, 351 "%s: interrupted %d\n", __func__, rv); 352 #endif 353 return rv; 354 } 355 } 356 357 return 0; 358 } 359 360 /* Wait for given status bits using interrupts. */ 361 int 362 tpm_waitfor_int(struct tpm_softc *sc, uint8_t mask, int tmo, void *c, 363 int inttype) 364 { 365 int rv, to; 366 367 /* Poll and return when condition is already met. */ 368 sc->sc_stat = tpm_status(sc); 369 if ((sc->sc_stat & mask) == mask) 370 return 0; 371 372 /* 373 * Enable interrupt on tpm chip. Note that interrupts on our 374 * level (SPL_TTY) are disabled (see tpm{read,write} et al) and 375 * will not be delivered to the cpu until we call tsleep(9) below. 376 */ 377 bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE, 378 bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) | 379 inttype); 380 bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE, 381 bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) | 382 TPM_GLOBAL_INT_ENABLE); 383 384 /* 385 * Poll once more to remedy the race between previous polling 386 * and enabling interrupts on the tpm chip. 387 */ 388 sc->sc_stat = tpm_status(sc); 389 if ((sc->sc_stat & mask) == mask) { 390 rv = 0; 391 goto out; 392 } 393 394 to = tpm_tmotohz(tmo); 395 #ifdef TPM_DEBUG 396 aprint_debug_dev(sc->sc_dev, 397 "%s: sleeping for %d ticks on %p\n", __func__, to, c); 398 #endif 399 /* 400 * tsleep(9) enables interrupts on the cpu and returns after 401 * wake up with interrupts disabled again. Note that interrupts 402 * generated by the tpm chip while being at SPL_TTY are not lost 403 * but held and delivered as soon as the cpu goes below SPL_TTY. 404 */ 405 rv = tsleep(c, PRIBIO | PCATCH, "tpm_wait", to); 406 407 sc->sc_stat = tpm_status(sc); 408 #ifdef TPM_DEBUG 409 char buf[128]; 410 snprintb(buf, sizeof(buf), TPM_STS_BITS, sc->sc_stat); 411 aprint_debug_dev(sc->sc_dev, 412 "%s: woke up with rv %d stat %s\n", __func__, rv, buf); 413 #endif 414 if ((sc->sc_stat & mask) == mask) 415 rv = 0; 416 417 /* Disable interrupts on tpm chip again. */ 418 out: bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE, 419 bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) & 420 ~TPM_GLOBAL_INT_ENABLE); 421 bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE, 422 bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) & 423 ~inttype); 424 425 return rv; 426 } 427 428 /* 429 * Wait on given status bits, uses interrupts where possible, otherwise polls. 430 */ 431 int 432 tpm_waitfor(struct tpm_softc *sc, uint8_t b0, int tmo, void *c) 433 { 434 uint8_t b; 435 int re, to, rv; 436 437 #ifdef TPM_DEBUG 438 char buf[128]; 439 snprintb(buf, sizeof(buf), TPM_STS_BITS, sc->sc_stat); 440 aprint_debug_dev(sc->sc_dev, "%s: b0 %s\n", __func__, buf); 441 #endif 442 443 /* 444 * If possible, use interrupts, otherwise poll. 445 * 446 * We use interrupts for TPM_STS_VALID and TPM_STS_DATA_AVAIL (if 447 * the tpm chips supports them) as waiting for those can take 448 * really long. The other TPM_STS* are not needed very often 449 * so we do not support them. 450 */ 451 if (sc->sc_vector != -1) { 452 b = b0; 453 454 /* 455 * Wait for data ready. This interrupt only occures 456 * when both TPM_STS_VALID and TPM_STS_DATA_AVAIL are asserted. 457 * Thus we don't have to bother with TPM_STS_VALID 458 * separately and can just return. 459 * 460 * This only holds for interrupts! When using polling 461 * both flags have to be waited for, see below. 462 */ 463 if ((b & TPM_STS_DATA_AVAIL) && (sc->sc_capabilities & 464 TPM_INTF_DATA_AVAIL_INT)) 465 return tpm_waitfor_int(sc, b, tmo, c, 466 TPM_DATA_AVAIL_INT); 467 468 /* Wait for status valid bit. */ 469 if ((b & TPM_STS_VALID) && (sc->sc_capabilities & 470 TPM_INTF_STS_VALID_INT)) { 471 rv = tpm_waitfor_int(sc, b, tmo, c, TPM_STS_VALID_INT); 472 if (rv != 0) 473 return rv; 474 else 475 b = b0 & ~TPM_STS_VALID; 476 } 477 478 /* 479 * When all flags are taken care of, return. Otherwise 480 * use polling for eg. TPM_STS_CMD_READY. 481 */ 482 if (b == 0) 483 return 0; 484 } 485 486 re = 3; 487 restart: 488 /* 489 * If requested wait for TPM_STS_VALID before dealing with 490 * any other flag. Eg. when both TPM_STS_DATA_AVAIL and TPM_STS_VALID 491 * are requested, wait for the latter first. 492 */ 493 b = b0; 494 if (b0 & TPM_STS_VALID) 495 b = TPM_STS_VALID; 496 497 to = tpm_tmotohz(tmo); 498 again: 499 if ((rv = tpm_waitfor_poll(sc, b, to, c)) != 0) 500 return rv; 501 502 if ((b & sc->sc_stat) == TPM_STS_VALID) { 503 /* Now wait for other flags. */ 504 b = b0 & ~TPM_STS_VALID; 505 to++; 506 goto again; 507 } 508 509 if ((sc->sc_stat & b) != b) { 510 #ifdef TPM_DEBUG 511 char bbuf[128], cbuf[128]; 512 snprintb(bbuf, sizeof(bbuf), TPM_STS_BITS, b); 513 snprintb(cbuf, sizeof(cbuf), TPM_STS_BITS, sc->sc_stat); 514 aprint_debug_dev(sc->sc_dev, 515 "%s: timeout: stat=%s b=%s\n", __func__, cbuf, bbuf); 516 #endif 517 if (re-- && (b0 & TPM_STS_VALID)) { 518 bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_STS, 519 TPM_STS_RESP_RETRY); 520 goto restart; 521 } 522 return EIO; 523 } 524 525 return 0; 526 } 527 528 /* Start transaction. */ 529 int 530 tpm_tis12_start(struct tpm_softc *sc, int flag) 531 { 532 int rv; 533 534 if (flag == UIO_READ) { 535 rv = tpm_waitfor(sc, TPM_STS_DATA_AVAIL | TPM_STS_VALID, 536 TPM_READ_TMO, sc->sc_read); 537 return rv; 538 } 539 540 /* Own our (0th) locality. */ 541 if ((rv = tpm_request_locality(sc, 0)) != 0) 542 return rv; 543 544 sc->sc_stat = tpm_status(sc); 545 if (sc->sc_stat & TPM_STS_CMD_READY) { 546 #ifdef TPM_DEBUG 547 char buf[128]; 548 snprintb(buf, sizeof(buf), TPM_STS_BITS, sc->sc_stat); 549 aprint_debug_dev(sc->sc_dev, "%s: UIO_WRITE status %s\n", 550 __func__, buf); 551 #endif 552 return 0; 553 } 554 555 #ifdef TPM_DEBUG 556 aprint_debug_dev(sc->sc_dev, 557 "%s: UIO_WRITE readying chip\n", __func__); 558 #endif 559 560 /* Abort previous and restart. */ 561 bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_STS, TPM_STS_CMD_READY); 562 if ((rv = tpm_waitfor(sc, TPM_STS_CMD_READY, TPM_READY_TMO, 563 sc->sc_write))) { 564 #ifdef TPM_DEBUG 565 aprint_debug_dev(sc->sc_dev, 566 "%s: UIO_WRITE readying failed %d\n", __func__, rv); 567 #endif 568 return rv; 569 } 570 571 #ifdef TPM_DEBUG 572 aprint_debug_dev(sc->sc_dev, 573 "%s: UIO_WRITE readying done\n", __func__); 574 #endif 575 576 return 0; 577 } 578 579 int 580 tpm_tis12_read(struct tpm_softc *sc, void *buf, size_t len, size_t *count, 581 int flags) 582 { 583 uint8_t *p = buf; 584 size_t cnt; 585 int rv, n, bcnt; 586 587 #ifdef TPM_DEBUG 588 aprint_debug_dev(sc->sc_dev, "%s: len %zu\n", __func__, len); 589 #endif 590 cnt = 0; 591 while (len > 0) { 592 if ((rv = tpm_waitfor(sc, TPM_STS_DATA_AVAIL | TPM_STS_VALID, 593 TPM_READ_TMO, sc->sc_read))) 594 return rv; 595 596 bcnt = tpm_getburst(sc); 597 n = MIN(len, bcnt); 598 #ifdef TPM_DEBUG 599 aprint_debug_dev(sc->sc_dev, 600 "%s: fetching %d, burst is %d\n", __func__, n, bcnt); 601 #endif 602 for (; n--; len--) { 603 *p++ = bus_space_read_1(sc->sc_bt, sc->sc_bh, TPM_DATA); 604 cnt++; 605 } 606 607 if ((flags & TPM_PARAM_SIZE) == 0 && cnt >= 6) 608 break; 609 } 610 #ifdef TPM_DEBUG 611 aprint_debug_dev(sc->sc_dev, 612 "%s: read %zu bytes, len %zu\n", __func__, cnt, len); 613 #endif 614 615 if (count) 616 *count = cnt; 617 618 return 0; 619 } 620 621 int 622 tpm_tis12_write(struct tpm_softc *sc, const void *buf, size_t len) 623 { 624 const uint8_t *p = buf; 625 size_t cnt; 626 int rv, r; 627 628 #ifdef TPM_DEBUG 629 aprint_debug_dev(sc->sc_dev, 630 "%s: sc %p buf %p len %zu\n", __func__, sc, buf, len); 631 #endif 632 if (len == 0) 633 return 0; 634 635 if ((rv = tpm_request_locality(sc, 0)) != 0) 636 return rv; 637 638 cnt = 0; 639 while (cnt < len - 1) { 640 for (r = tpm_getburst(sc); r > 0 && cnt < len - 1; r--) { 641 bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_DATA, *p++); 642 cnt++; 643 } 644 if ((rv = tpm_waitfor(sc, TPM_STS_VALID, TPM_READ_TMO, sc))) { 645 #ifdef TPM_DEBUG 646 aprint_debug_dev(sc->sc_dev, 647 "%s: failed burst rv %d\n", __func__, rv); 648 #endif 649 return rv; 650 } 651 sc->sc_stat = tpm_status(sc); 652 if (!(sc->sc_stat & TPM_STS_DATA_EXPECT)) { 653 #ifdef TPM_DEBUG 654 char sbuf[128]; 655 snprintb(sbuf, sizeof(sbuf), TPM_STS_BITS, sc->sc_stat); 656 aprint_debug_dev(sc->sc_dev, 657 "%s: failed rv %d stat=%s\n", __func__, rv, sbuf); 658 #endif 659 return EIO; 660 } 661 } 662 663 bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_DATA, *p++); 664 cnt++; 665 666 if ((rv = tpm_waitfor(sc, TPM_STS_VALID, TPM_READ_TMO, sc))) { 667 #ifdef TPM_DEBUG 668 aprint_debug_dev(sc->sc_dev, "%s: failed last byte rv %d\n", 669 __func__, rv); 670 #endif 671 return rv; 672 } 673 if ((sc->sc_stat & TPM_STS_DATA_EXPECT) != 0) { 674 #ifdef TPM_DEBUG 675 char sbuf[128]; 676 snprintb(sbuf, sizeof(sbuf), TPM_STS_BITS, sc->sc_stat); 677 aprint_debug_dev(sc->sc_dev, 678 "%s: failed rv %d stat=%s\n", __func__, rv, sbuf); 679 #endif 680 return EIO; 681 } 682 683 #ifdef TPM_DEBUG 684 aprint_debug_dev(sc->sc_dev, "%s: wrote %zu byte\n", __func__, cnt); 685 #endif 686 687 return 0; 688 } 689 690 /* Finish transaction. */ 691 int 692 tpm_tis12_end(struct tpm_softc *sc, int flag, int err) 693 { 694 int rv = 0; 695 696 if (flag == UIO_READ) { 697 if ((rv = tpm_waitfor(sc, TPM_STS_VALID, TPM_READ_TMO, 698 sc->sc_read))) 699 return rv; 700 701 /* Still more data? */ 702 sc->sc_stat = tpm_status(sc); 703 if (!err && ((sc->sc_stat & TPM_STS_DATA_AVAIL) 704 == TPM_STS_DATA_AVAIL)) { 705 #ifdef TPM_DEBUG 706 char buf[128]; 707 snprintb(buf, sizeof(buf), TPM_STS_BITS, sc->sc_stat); 708 aprint_debug_dev(sc->sc_dev, 709 "%s: read failed stat=%s\n", __func__, buf); 710 #endif 711 rv = EIO; 712 } 713 714 bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_STS, 715 TPM_STS_CMD_READY); 716 717 /* Release our (0th) locality. */ 718 bus_space_write_1(sc->sc_bt, sc->sc_bh,TPM_ACCESS, 719 TPM_ACCESS_ACTIVE_LOCALITY); 720 } else { 721 /* Hungry for more? */ 722 sc->sc_stat = tpm_status(sc); 723 if (!err && (sc->sc_stat & TPM_STS_DATA_EXPECT)) { 724 #ifdef TPM_DEBUG 725 char buf[128]; 726 snprintb(buf, sizeof(buf), TPM_STS_BITS, sc->sc_stat); 727 aprint_debug_dev(sc->sc_dev, 728 "%s: write failed stat=%s\n", __func__, buf); 729 #endif 730 rv = EIO; 731 } 732 733 bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_STS, 734 err ? TPM_STS_CMD_READY : TPM_STS_GO); 735 } 736 737 return rv; 738 } 739 740 int 741 tpm_intr(void *v) 742 { 743 struct tpm_softc *sc = v; 744 uint32_t r; 745 #ifdef TPM_DEBUG 746 static int cnt = 0; 747 #endif 748 749 r = bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS); 750 #ifdef TPM_DEBUG 751 if (r != 0) { 752 char buf[128]; 753 snprintb(buf, sizeof(buf), TPM_INTERRUPT_ENABLE_BITS, r); 754 aprint_debug_dev(sc->sc_dev, "%s: int=%s (%d)\n", __func__, 755 buf, cnt); 756 } else 757 cnt++; 758 #endif 759 if (!(r & (TPM_CMD_READY_INT | TPM_LOCALITY_CHANGE_INT | 760 TPM_STS_VALID_INT | TPM_DATA_AVAIL_INT))) 761 #ifdef __FreeBSD__ 762 return; 763 #else 764 return 0; 765 #endif 766 if (r & TPM_STS_VALID_INT) 767 wakeup(sc); 768 769 if (r & TPM_CMD_READY_INT) 770 wakeup(sc->sc_write); 771 772 if (r & TPM_DATA_AVAIL_INT) 773 wakeup(sc->sc_read); 774 775 if (r & TPM_LOCALITY_CHANGE_INT) 776 wakeup(sc->sc_init); 777 778 bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS, r); 779 780 return 1; 781 } 782 783 /* Read single byte using legacy interface. */ 784 static inline uint8_t 785 tpm_legacy_in(bus_space_tag_t iot, bus_space_handle_t ioh, int reg) 786 { 787 bus_space_write_1(iot, ioh, 0, reg); 788 return bus_space_read_1(iot, ioh, 1); 789 } 790 791 /* Write single byte using legacy interface. */ 792 static inline void 793 tpm_legacy_out(bus_space_tag_t iot, bus_space_handle_t ioh, int reg, uint8_t v) 794 { 795 bus_space_write_1(iot, ioh, 0, reg); 796 bus_space_write_1(iot, ioh, 1, v); 797 } 798 799 /* Probe for TPM using legacy interface. */ 800 int 801 tpm_legacy_probe(bus_space_tag_t iot, bus_addr_t iobase) 802 { 803 bus_space_handle_t ioh; 804 uint8_t r, v; 805 int i, rv = 0; 806 char id[8]; 807 808 if (!tpm_enabled || iobase == -1) 809 return 0; 810 811 if (bus_space_map(iot, iobase, 2, 0, &ioh)) 812 return 0; 813 814 v = bus_space_read_1(iot, ioh, 0); 815 if (v == 0xff) { 816 bus_space_unmap(iot, ioh, 2); 817 return 0; 818 } 819 r = bus_space_read_1(iot, ioh, 1); 820 821 for (i = sizeof(id); i--; ) 822 id[i] = tpm_legacy_in(iot, ioh, TPM_ID + i); 823 824 #ifdef TPM_DEBUG 825 printf("tpm_legacy_probe %.4s %d.%d.%d.%d\n", 826 &id[4], id[0], id[1], id[2], id[3]); 827 #endif 828 /* 829 * The only chips using the legacy interface we are aware of are 830 * by Atmel. For other chips more signature would have to be added. 831 */ 832 if (!bcmp(&id[4], "ATML", 4)) 833 rv = 1; 834 835 if (!rv) { 836 bus_space_write_1(iot, ioh, r, 1); 837 bus_space_write_1(iot, ioh, v, 0); 838 } 839 bus_space_unmap(iot, ioh, 2); 840 841 return rv; 842 } 843 844 /* Setup TPM using legacy interface. */ 845 int 846 tpm_legacy_init(struct tpm_softc *sc, int irq, const char *name) 847 { 848 char id[8]; 849 uint8_t ioh, iol; 850 int i; 851 852 if ((i = bus_space_map(sc->sc_batm, tpm_enabled, 2, 0, &sc->sc_bahm))) { 853 aprint_debug_dev(sc->sc_dev, "cannot map tpm registers (%d)\n", 854 i); 855 tpm_enabled = 0; 856 return 1; 857 } 858 859 for (i = sizeof(id); i--; ) 860 id[i] = tpm_legacy_in(sc->sc_bt, sc->sc_bh, TPM_ID + i); 861 862 aprint_debug_dev(sc->sc_dev, "%.4s %d.%d @0x%x\n", &id[4], id[0], 863 id[1], tpm_enabled); 864 iol = tpm_enabled & 0xff; 865 ioh = tpm_enabled >> 16; 866 tpm_enabled = 0; 867 868 return 0; 869 } 870 871 /* Start transaction. */ 872 int 873 tpm_legacy_start(struct tpm_softc *sc, int flag) 874 { 875 struct timeval tv; 876 uint8_t bits, r; 877 int to, rv; 878 879 bits = flag == UIO_READ ? TPM_LEGACY_DA : 0; 880 tv.tv_sec = TPM_LEGACY_TMO; 881 tv.tv_usec = 0; 882 to = tvtohz(&tv) / TPM_LEGACY_SLEEP; 883 while (((r = bus_space_read_1(sc->sc_batm, sc->sc_bahm, 1)) & 884 (TPM_LEGACY_BUSY|bits)) != bits && to--) { 885 rv = tsleep(sc, PRIBIO | PCATCH, "legacy_tpm_start", 886 TPM_LEGACY_SLEEP); 887 if (rv && rv != EWOULDBLOCK) 888 return rv; 889 } 890 891 #if defined(TPM_DEBUG) && !defined(__FreeBSD__) 892 char buf[128]; 893 snprintb(buf, sizeof(buf), TPM_LEGACY_BITS, r); 894 aprint_debug_dev(sc->sc_dev, "%s: bits %s\n", device_xname(sc->sc_dev), 895 buf); 896 #endif 897 if ((r & (TPM_LEGACY_BUSY|bits)) != bits) 898 return EIO; 899 900 return 0; 901 } 902 903 int 904 tpm_legacy_read(struct tpm_softc *sc, void *buf, size_t len, size_t *count, 905 int flags) 906 { 907 uint8_t *p; 908 size_t cnt; 909 int to, rv; 910 911 cnt = rv = 0; 912 for (p = buf; !rv && len > 0; len--) { 913 for (to = 1000; 914 !(bus_space_read_1(sc->sc_batm, sc->sc_bahm, 1) & 915 TPM_LEGACY_DA); DELAY(1)) 916 if (!to--) 917 return EIO; 918 919 DELAY(TPM_LEGACY_DELAY); 920 *p++ = bus_space_read_1(sc->sc_batm, sc->sc_bahm, 0); 921 cnt++; 922 } 923 924 *count = cnt; 925 return 0; 926 } 927 928 int 929 tpm_legacy_write(struct tpm_softc *sc, const void *buf, size_t len) 930 { 931 const uint8_t *p; 932 size_t n; 933 934 for (p = buf, n = len; n--; DELAY(TPM_LEGACY_DELAY)) { 935 if (!n && len != TPM_BUFSIZ) { 936 bus_space_write_1(sc->sc_batm, sc->sc_bahm, 1, 937 TPM_LEGACY_LAST); 938 DELAY(TPM_LEGACY_DELAY); 939 } 940 bus_space_write_1(sc->sc_batm, sc->sc_bahm, 0, *p++); 941 } 942 943 return 0; 944 } 945 946 /* Finish transaction. */ 947 int 948 tpm_legacy_end(struct tpm_softc *sc, int flag, int rv) 949 { 950 struct timeval tv; 951 uint8_t r; 952 int to; 953 954 if (rv || flag == UIO_READ) 955 bus_space_write_1(sc->sc_batm, sc->sc_bahm, 1, TPM_LEGACY_ABRT); 956 else { 957 tv.tv_sec = TPM_LEGACY_TMO; 958 tv.tv_usec = 0; 959 to = tvtohz(&tv) / TPM_LEGACY_SLEEP; 960 while(((r = bus_space_read_1(sc->sc_batm, sc->sc_bahm, 1)) & 961 TPM_LEGACY_BUSY) && to--) { 962 rv = tsleep(sc, PRIBIO | PCATCH, "legacy_tpm_end", 963 TPM_LEGACY_SLEEP); 964 if (rv && rv != EWOULDBLOCK) 965 return rv; 966 } 967 968 #if defined(TPM_DEBUG) && !defined(__FreeBSD__) 969 char buf[128]; 970 snprintb(buf, sizeof(buf), TPM_LEGACY_BITS, r); 971 aprint_debug_dev(sc->sc_dev, "%s: bits %s\n", 972 device_xname(sc->sc_dev), buf); 973 #endif 974 if (r & TPM_LEGACY_BUSY) 975 return EIO; 976 977 if (r & TPM_LEGACY_RE) 978 return EIO; /* XXX Retry the loop? */ 979 } 980 981 return rv; 982 } 983 984 int 985 tpmopen(dev_t dev, int flag, int mode, struct lwp *l) 986 { 987 struct tpm_softc *sc = device_lookup_private(&tpm_cd, TPMUNIT(dev)); 988 989 if (!sc) 990 return ENXIO; 991 992 if (sc->sc_flags & TPM_OPEN) 993 return EBUSY; 994 995 sc->sc_flags |= TPM_OPEN; 996 997 return 0; 998 } 999 1000 int 1001 tpmclose(dev_t dev, int flag, int mode, struct lwp *l) 1002 { 1003 struct tpm_softc *sc = device_lookup_private(&tpm_cd, TPMUNIT(dev)); 1004 1005 if (!sc) 1006 return ENXIO; 1007 1008 if (!(sc->sc_flags & TPM_OPEN)) 1009 return EINVAL; 1010 1011 sc->sc_flags &= ~TPM_OPEN; 1012 1013 return 0; 1014 } 1015 1016 int 1017 tpmread(dev_t dev, struct uio *uio, int flags) 1018 { 1019 struct tpm_softc *sc = device_lookup_private(&tpm_cd, TPMUNIT(dev)); 1020 uint8_t buf[TPM_BUFSIZ], *p; 1021 size_t cnt, len, n; 1022 int rv, s; 1023 1024 if (!sc) 1025 return ENXIO; 1026 1027 s = spltty(); 1028 if ((rv = (*sc->sc_start)(sc, UIO_READ))) 1029 goto out; 1030 1031 #ifdef TPM_DEBUG 1032 aprint_debug_dev(sc->sc_dev, "%s: getting header\n", __func__); 1033 #endif 1034 if ((rv = (*sc->sc_read)(sc, buf, TPM_HDRSIZE, &cnt, 0))) { 1035 (*sc->sc_end)(sc, UIO_READ, rv); 1036 goto out; 1037 } 1038 1039 len = (buf[2] << 24) | (buf[3] << 16) | (buf[4] << 8) | buf[5]; 1040 #ifdef TPM_DEBUG 1041 aprint_debug_dev(sc->sc_dev, "%s: len %zu, io count %zu\n", __func__, 1042 len, uio->uio_resid); 1043 #endif 1044 if (len > uio->uio_resid) { 1045 rv = EIO; 1046 (*sc->sc_end)(sc, UIO_READ, rv); 1047 #ifdef TPM_DEBUG 1048 aprint_debug_dev(sc->sc_dev, 1049 "%s: bad residual io count 0x%zx\n", __func__, 1050 uio->uio_resid); 1051 #endif 1052 goto out; 1053 } 1054 1055 /* Copy out header. */ 1056 if ((rv = uiomove(buf, cnt, uio))) { 1057 #ifdef TPM_DEBUG 1058 aprint_debug_dev(sc->sc_dev, 1059 "%s: uiomove failed %d\n", __func__, rv); 1060 #endif 1061 (*sc->sc_end)(sc, UIO_READ, rv); 1062 goto out; 1063 } 1064 1065 /* Get remaining part of the answer (if anything is left). */ 1066 for (len -= cnt, p = buf, n = sizeof(buf); len > 0; p = buf, len -= n, 1067 n = sizeof(buf)) { 1068 n = MIN(n, len); 1069 #ifdef TPM_DEBUG 1070 aprint_debug_dev(sc->sc_dev, "%s: n %zu len %zu\n", __func__, 1071 n, len); 1072 #endif 1073 if ((rv = (*sc->sc_read)(sc, p, n, NULL, TPM_PARAM_SIZE))) { 1074 (*sc->sc_end)(sc, UIO_READ, rv); 1075 goto out; 1076 } 1077 p += n; 1078 if ((rv = uiomove(buf, p - buf, uio))) { 1079 #ifdef TPM_DEBUG 1080 aprint_debug_dev(sc->sc_dev, 1081 "%s: uiomove failed %d\n", __func__, rv); 1082 #endif 1083 (*sc->sc_end)(sc, UIO_READ, rv); 1084 goto out; 1085 } 1086 } 1087 1088 rv = (*sc->sc_end)(sc, UIO_READ, rv); 1089 out: 1090 splx(s); 1091 return rv; 1092 } 1093 1094 int 1095 tpmwrite(dev_t dev, struct uio *uio, int flags) 1096 { 1097 struct tpm_softc *sc = device_lookup_private(&tpm_cd, TPMUNIT(dev)); 1098 uint8_t buf[TPM_BUFSIZ]; 1099 int n, rv, s; 1100 1101 if (!sc) 1102 return ENXIO; 1103 1104 s = spltty(); 1105 1106 #ifdef TPM_DEBUG 1107 aprint_debug_dev(sc->sc_dev, "%s: io count %zu\n", __func__, 1108 uio->uio_resid); 1109 #endif 1110 1111 n = MIN(sizeof(buf), uio->uio_resid); 1112 if ((rv = uiomove(buf, n, uio))) { 1113 #ifdef TPM_DEBUG 1114 aprint_debug_dev(sc->sc_dev, 1115 "%s: uiomove failed %d\n", __func__, rv); 1116 #endif 1117 splx(s); 1118 return rv; 1119 } 1120 1121 if ((rv = (*sc->sc_start)(sc, UIO_WRITE))) { 1122 splx(s); 1123 return rv; 1124 } 1125 1126 if ((rv = (*sc->sc_write)(sc, buf, n))) { 1127 splx(s); 1128 return rv; 1129 } 1130 1131 rv = (*sc->sc_end)(sc, UIO_WRITE, rv); 1132 splx(s); 1133 return rv; 1134 } 1135 1136 int 1137 tpmioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 1138 { 1139 return ENOTTY; 1140 } 1141
Indexes created Thu Oct 02 01:09:59 GMT 2025