tpmreg.h revision 1.3.52.1 1 1.3.52.1 martin /* $NetBSD: tpmreg.h,v 1.3.52.1 2020/04/13 08:04:22 martin Exp $ */
2 1.1 christos
3 1.1 christos /*
4 1.3.52.1 martin * Copyright (c) 2019 The NetBSD Foundation, Inc.
5 1.1 christos * All rights reserved.
6 1.1 christos *
7 1.3.52.1 martin * This code is derived from software contributed to The NetBSD Foundation
8 1.3.52.1 martin * by Maxime Villard.
9 1.1 christos *
10 1.3.52.1 martin * Redistribution and use in source and binary forms, with or without
11 1.3.52.1 martin * modification, are permitted provided that the following conditions
12 1.3.52.1 martin * are met:
13 1.3.52.1 martin * 1. Redistributions of source code must retain the above copyright
14 1.3.52.1 martin * notice, this list of conditions and the following disclaimer.
15 1.3.52.1 martin * 2. Redistributions in binary form must reproduce the above copyright
16 1.3.52.1 martin * notice, this list of conditions and the following disclaimer in the
17 1.3.52.1 martin * documentation and/or other materials provided with the distribution.
18 1.3.52.1 martin *
19 1.3.52.1 martin * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.3.52.1 martin * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.3.52.1 martin * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.3.52.1 martin * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.3.52.1 martin * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.3.52.1 martin * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.3.52.1 martin * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.3.52.1 martin * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.3.52.1 martin * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.3.52.1 martin * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.3.52.1 martin * POSSIBILITY OF SUCH DAMAGE.
30 1.1 christos */
31 1.1 christos
32 1.3.52.1 martin #if (BYTE_ORDER == LITTLE_ENDIAN)
33 1.3.52.1 martin #define TPM_BE16(a) bswap16(a)
34 1.3.52.1 martin #define TPM_BE32(a) bswap32(a)
35 1.3.52.1 martin #else
36 1.3.52.1 martin #define TPM_BE16(a) (a)
37 1.3.52.1 martin #define TPM_BE32(a) (a)
38 1.3.52.1 martin #endif
39 1.3.52.1 martin
40 1.3.52.1 martin struct tpm_header {
41 1.3.52.1 martin uint16_t tag;
42 1.3.52.1 martin uint32_t length;
43 1.3.52.1 martin uint32_t code;
44 1.3.52.1 martin } __packed;
45 1.3.52.1 martin
46 1.3.52.1 martin /* -------------------------------------------------------------------------- */
47 1.1 christos
48 1.3.52.1 martin /*
49 1.3.52.1 martin * TPM Interface Specification 1.2 (TIS12).
50 1.3.52.1 martin */
51 1.1 christos
52 1.3.52.1 martin #define TPM_ACCESS 0x0000 /* 8bit register */
53 1.3.52.1 martin #define TPM_ACCESS_VALID __BIT(7)
54 1.3.52.1 martin #define TPM_ACCESS_ACTIVE_LOCALITY __BIT(5)
55 1.3.52.1 martin #define TPM_ACCESS_BEEN_SEIZED __BIT(4)
56 1.3.52.1 martin #define TPM_ACCESS_SEIZE __BIT(3)
57 1.3.52.1 martin #define TPM_ACCESS_PENDING_REQUEST __BIT(2)
58 1.3.52.1 martin #define TPM_ACCESS_REQUEST_USE __BIT(1)
59 1.3.52.1 martin #define TPM_ACCESS_ESTABLISHMENT __BIT(0)
60 1.3.52.1 martin
61 1.3.52.1 martin #define TPM_INT_ENABLE 0x0008 /* 32bit register */
62 1.3.52.1 martin #define TPM_GLOBAL_INT_ENABLE __BIT(31)
63 1.3.52.1 martin #define TPM_CMD_READY_INT __BIT(7)
64 1.3.52.1 martin #define TPM_TYPE_POLARITY __BITS(4,3)
65 1.3.52.1 martin #define TPM_INT_LEVEL_HIGH __SHIFTIN(0, TPM_TYPE_POLARITY)
66 1.3.52.1 martin #define TPM_INT_LEVEL_LOW __SHIFTIN(1, TPM_TYPE_POLARITY)
67 1.3.52.1 martin #define TPM_INT_EDGE_RISING __SHIFTIN(2, TPM_TYPE_POLARITY)
68 1.3.52.1 martin #define TPM_INT_EDGE_FALLING __SHIFTIN(3, TPM_TYPE_POLARITY)
69 1.3.52.1 martin #define TPM_LOCALITY_CHANGE_INT __BIT(2)
70 1.3.52.1 martin #define TPM_STS_VALID_INT __BIT(1)
71 1.3.52.1 martin #define TPM_DATA_AVAIL_INT __BIT(0)
72 1.3.52.1 martin
73 1.3.52.1 martin #define TPM_INT_VECTOR 0x000c /* 8bit register */
74 1.3.52.1 martin #define TPM_INT_STATUS 0x0010 /* 32bit register */
75 1.3.52.1 martin
76 1.3.52.1 martin #define TPM_INTF_CAPABILITY 0x0014 /* 32bit register */
77 1.3.52.1 martin #define TPM_INTF_BURST_COUNT_STATIC __BIT(8)
78 1.3.52.1 martin #define TPM_INTF_CMD_READY_INT __BIT(7)
79 1.3.52.1 martin #define TPM_INTF_INT_EDGE_FALLING __BIT(6)
80 1.3.52.1 martin #define TPM_INTF_INT_EDGE_RISING __BIT(5)
81 1.3.52.1 martin #define TPM_INTF_INT_LEVEL_LOW __BIT(4)
82 1.3.52.1 martin #define TPM_INTF_INT_LEVEL_HIGH __BIT(3)
83 1.3.52.1 martin #define TPM_INTF_LOCALITY_CHANGE_INT __BIT(2)
84 1.3.52.1 martin #define TPM_INTF_STS_VALID_INT __BIT(1)
85 1.3.52.1 martin #define TPM_INTF_DATA_AVAIL_INT __BIT(0)
86 1.3.52.1 martin #define TPM_INTF_CAPABILITY_BITS \
87 1.3.52.1 martin "\020\01IDRDY\02ISTSV\03ILOCH\04IHIGH\05ILOW\06IRISE\07IFALL\010IRDY\011BCST"
88 1.3.52.1 martin
89 1.3.52.1 martin #define TPM_STS 0x0018 /* 24bit register */
90 1.3.52.1 martin #define TPM_STS_BURST_COUNT __BITS(23,8)
91 1.3.52.1 martin #define TPM_STS_STATUS_BITS __BITS(7,0)
92 1.3.52.1 martin #define TPM_STS_VALID __BIT(7)
93 1.3.52.1 martin #define TPM_STS_CMD_READY __BIT(6)
94 1.3.52.1 martin #define TPM_STS_GO __BIT(5)
95 1.3.52.1 martin #define TPM_STS_DATA_AVAIL __BIT(4)
96 1.3.52.1 martin #define TPM_STS_DATA_EXPECT __BIT(3)
97 1.3.52.1 martin #define TPM_STS_SELFTEST_DONE __BIT(2)
98 1.3.52.1 martin #define TPM_STS_RESP_RETRY __BIT(1)
99 1.3.52.1 martin
100 1.3.52.1 martin #define TPM_DATA 0x0024 /* 32bit register */
101 1.3.52.1 martin #define TPM_ID 0x0f00 /* 32bit register */
102 1.3.52.1 martin #define TPM_REV 0x0f04 /* 8bit register */
103 1.1 christos
104 1.3.52.1 martin /*
105 1.3.52.1 martin * Five localities, 4K per locality.
106 1.3.52.1 martin */
107 1.3.52.1 martin #define TPM_SPACE_SIZE 0x5000
108