Home | History | Annotate | Line # | Download | only in ic
tpmreg.h revision 1.4.2.1
      1 /*	$NetBSD: tpmreg.h,v 1.4.2.1 2019/10/16 09:52:38 martin Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2019 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Maxime Villard.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #if (BYTE_ORDER == LITTLE_ENDIAN)
     33 #define TPM_BE16(a)	bswap16(a)
     34 #define TPM_BE32(a)	bswap32(a)
     35 #else
     36 #define TPM_BE16(a)	(a)
     37 #define TPM_BE32(a)	(a)
     38 #endif
     39 
     40 struct tpm_header {
     41 	uint16_t tag;
     42 	uint32_t length;
     43 	uint32_t code;
     44 } __packed;
     45 
     46 /* -------------------------------------------------------------------------- */
     47 
     48 /*
     49  * TPM Interface Specification 1.2 (TIS12).
     50  */
     51 
     52 #define	TPM_ACCESS			0x0000	/* 8bit register */
     53 #define		TPM_ACCESS_VALID		__BIT(7)
     54 #define		TPM_ACCESS_ACTIVE_LOCALITY	__BIT(5)
     55 #define		TPM_ACCESS_BEEN_SEIZED		__BIT(4)
     56 #define		TPM_ACCESS_SEIZE		__BIT(3)
     57 #define		TPM_ACCESS_PENDING_REQUEST	__BIT(2)
     58 #define		TPM_ACCESS_REQUEST_USE		__BIT(1)
     59 #define		TPM_ACCESS_ESTABLISHMENT	__BIT(0)
     60 
     61 #define	TPM_INT_ENABLE			0x0008	/* 32bit register */
     62 #define		TPM_GLOBAL_INT_ENABLE		__BIT(31)
     63 #define		TPM_CMD_READY_INT		__BIT(7)
     64 #define		TPM_TYPE_POLARITY		__BITS(4,3)
     65 #define		TPM_INT_LEVEL_HIGH		__SHIFTIN(0, TPM_TYPE_POLARITY)
     66 #define		TPM_INT_LEVEL_LOW		__SHIFTIN(1, TPM_TYPE_POLARITY)
     67 #define		TPM_INT_EDGE_RISING		__SHIFTIN(2, TPM_TYPE_POLARITY)
     68 #define		TPM_INT_EDGE_FALLING		__SHIFTIN(3, TPM_TYPE_POLARITY)
     69 #define		TPM_LOCALITY_CHANGE_INT		__BIT(2)
     70 #define		TPM_STS_VALID_INT		__BIT(1)
     71 #define		TPM_DATA_AVAIL_INT		__BIT(0)
     72 
     73 #define	TPM_INT_VECTOR			0x000c	/* 8bit register */
     74 #define	TPM_INT_STATUS			0x0010	/* 32bit register */
     75 
     76 #define	TPM_INTF_CAPABILITY		0x0014	/* 32bit register */
     77 #define		TPM_INTF_BURST_COUNT_STATIC	__BIT(8)
     78 #define		TPM_INTF_CMD_READY_INT		__BIT(7)
     79 #define		TPM_INTF_INT_EDGE_FALLING	__BIT(6)
     80 #define		TPM_INTF_INT_EDGE_RISING	__BIT(5)
     81 #define		TPM_INTF_INT_LEVEL_LOW		__BIT(4)
     82 #define		TPM_INTF_INT_LEVEL_HIGH		__BIT(3)
     83 #define		TPM_INTF_LOCALITY_CHANGE_INT	__BIT(2)
     84 #define		TPM_INTF_STS_VALID_INT		__BIT(1)
     85 #define		TPM_INTF_DATA_AVAIL_INT		__BIT(0)
     86 #define	TPM_INTF_CAPABILITY_BITS \
     87     "\020\01IDRDY\02ISTSV\03ILOCH\04IHIGH\05ILOW\06IRISE\07IFALL\010IRDY\011BCST"
     88 
     89 #define	TPM_STS				0x0018	/* 24bit register */
     90 #define		TPM_STS_BURST_COUNT		__BITS(23,8)
     91 #define		TPM_STS_STATUS_BITS		__BITS(7,0)
     92 #define		TPM_STS_VALID			__BIT(7)
     93 #define		TPM_STS_CMD_READY		__BIT(6)
     94 #define		TPM_STS_GO			__BIT(5)
     95 #define		TPM_STS_DATA_AVAIL		__BIT(4)
     96 #define		TPM_STS_DATA_EXPECT		__BIT(3)
     97 #define		TPM_STS_SELFTEST_DONE		__BIT(2)
     98 #define		TPM_STS_RESP_RETRY		__BIT(1)
     99 
    100 #define	TPM_DATA			0x0024	/* 32bit register */
    101 #define	TPM_ID				0x0f00	/* 32bit register */
    102 #define	TPM_REV				0x0f04	/* 8bit register */
    103 
    104 /*
    105  * Five localities, 4K per locality.
    106  */
    107 #define	TPM_SPACE_SIZE	0x5000
    108