tulip.c revision 1.10
1 /* $NetBSD: tulip.c,v 1.10 1999/09/14 23:23:32 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <vm/vm.h> /* for PAGE_SIZE */ 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #endif 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/if_inarp.h> 73 #endif 74 75 #ifdef NS 76 #include <netns/ns.h> 77 #include <netns/ns_if.h> 78 #endif 79 80 #include <machine/bus.h> 81 #include <machine/intr.h> 82 83 #include <dev/mii/mii.h> 84 #include <dev/mii/miivar.h> 85 86 #include <dev/ic/tulipreg.h> 87 #include <dev/ic/tulipvar.h> 88 89 /* 90 * The following tables compute the transmit threshold mode. We start 91 * at index 0. When ever we get a transmit underrun, we increment our 92 * index, falling back if we encounter the NULL terminator. 93 * 94 * Note: Store and forward mode is only available on the 100mbps chips 95 * (21140 and higher). 96 */ 97 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = { 98 { OPMODE_TR_72, "72 bytes" }, 99 { OPMODE_TR_96, "96 bytes" }, 100 { OPMODE_TR_128, "128 bytes" }, 101 { OPMODE_TR_160, "160 bytes" }, 102 { 0, NULL }, 103 }; 104 105 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = { 106 { OPMODE_TR_72, "72/128 bytes" }, 107 { OPMODE_TR_96, "96/256 bytes" }, 108 { OPMODE_TR_128, "128/512 bytes" }, 109 { OPMODE_TR_160, "160/1024 bytes" }, 110 { OPMODE_SF, "store and forward mode" }, 111 { 0, NULL }, 112 }; 113 114 #define TXTH_72 0 115 #define TXTH_96 1 116 #define TXTH_128 2 117 #define TXTH_160 3 118 #define TXTH_SF 4 119 120 /* 121 * The Winbond 89C840F does transmit threshold control totally 122 * differently. It simply has a 7-bit field which indicates 123 * the threshold: 124 * 125 * txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16; 126 * 127 * However, we just do Store-and-Forward mode on these chips, since 128 * the DMA engines seem to be flaky. 129 */ 130 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = { 131 { 0, "store and forward mode" }, 132 { 0, NULL }, 133 }; 134 135 #define TXTH_WINB_SF 0 136 137 void tlp_start __P((struct ifnet *)); 138 void tlp_watchdog __P((struct ifnet *)); 139 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 140 141 void tlp_shutdown __P((void *)); 142 143 void tlp_reset __P((struct tulip_softc *)); 144 int tlp_init __P((struct tulip_softc *)); 145 void tlp_rxdrain __P((struct tulip_softc *)); 146 void tlp_stop __P((struct tulip_softc *, int)); 147 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 148 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 149 void tlp_srom_idle __P((struct tulip_softc *)); 150 151 void tlp_filter_setup __P((struct tulip_softc *)); 152 void tlp_winb_filter_setup __P((struct tulip_softc *)); 153 154 void tlp_rxintr __P((struct tulip_softc *)); 155 void tlp_txintr __P((struct tulip_softc *)); 156 157 void tlp_mii_tick __P((void *)); 158 void tlp_mii_statchg __P((struct device *)); 159 void tlp_winb_mii_statchg __P((struct device *)); 160 161 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 162 int tlp_mii_setmedia __P((struct tulip_softc *)); 163 164 void tlp_sio_mii_sync __P((struct tulip_softc *)); 165 void tlp_sio_mii_sendbits __P((struct tulip_softc *, u_int32_t, int)); 166 int tlp_sio_mii_readreg __P((struct device *, int, int)); 167 void tlp_sio_mii_writereg __P((struct device *, int, int, int)); 168 169 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 170 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 171 172 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t)); 173 #define tlp_mchash(addr) (tlp_crc32((addr), ETHER_ADDR_LEN) & \ 174 (TULIP_MCHASHSIZE - 1)) 175 176 #ifdef TLP_DEBUG 177 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 178 printf x 179 #else 180 #define DPRINTF(sc, x) /* nothing */ 181 #endif 182 183 /* 184 * tlp_attach: 185 * 186 * Attach a Tulip interface to the system. 187 */ 188 void 189 tlp_attach(sc, enaddr) 190 struct tulip_softc *sc; 191 const u_int8_t *enaddr; 192 { 193 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 194 int i, rseg, error; 195 bus_dma_segment_t seg; 196 197 /* 198 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 199 */ 200 201 /* 202 * Setup the transmit threshold table. 203 */ 204 switch (sc->sc_chip) { 205 case TULIP_CHIP_DE425: 206 case TULIP_CHIP_21040: 207 case TULIP_CHIP_21041: 208 sc->sc_txth = tlp_10_txthresh_tab; 209 break; 210 211 default: 212 sc->sc_txth = tlp_10_100_txthresh_tab; 213 break; 214 } 215 216 /* 217 * Setup the filter setup function. 218 */ 219 switch (sc->sc_chip) { 220 case TULIP_CHIP_WB89C840F: 221 sc->sc_filter_setup = tlp_winb_filter_setup; 222 break; 223 224 default: 225 sc->sc_filter_setup = tlp_filter_setup; 226 break; 227 } 228 229 /* 230 * Set up the media status change function. 231 */ 232 switch (sc->sc_chip) { 233 case TULIP_CHIP_WB89C840F: 234 sc->sc_statchg = tlp_winb_mii_statchg; 235 break; 236 237 default: 238 /* 239 * We may override this if we have special media 240 * handling requirements (e.g. flipping GPIO pins). 241 * 242 * The pure-MII statchg function covers the basics. 243 */ 244 sc->sc_statchg = tlp_mii_statchg; 245 break; 246 } 247 248 /* 249 * Set up various chip-specific quirks. 250 */ 251 switch (sc->sc_chip) { 252 case TULIP_CHIP_82C168: 253 case TULIP_CHIP_82C169: 254 /* 255 * These chips seem to have busted DMA engines; just put them 256 * in Store-and-Forward mode from the get-go. 257 */ 258 sc->sc_txthresh = TXTH_SF; 259 break; 260 261 case TULIP_CHIP_WB89C840F: 262 sc->sc_flags |= TULIPF_IC_FS; 263 break; 264 265 default: 266 /* Nothing. */ 267 } 268 269 SIMPLEQ_INIT(&sc->sc_txfreeq); 270 SIMPLEQ_INIT(&sc->sc_txdirtyq); 271 272 /* 273 * Allocate the control data structures, and create and load the 274 * DMA map for it. 275 */ 276 if ((error = bus_dmamem_alloc(sc->sc_dmat, 277 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg, 278 0)) != 0) { 279 printf("%s: unable to allocate control data, error = %d\n", 280 sc->sc_dev.dv_xname, error); 281 goto fail_0; 282 } 283 284 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 285 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 286 BUS_DMA_COHERENT)) != 0) { 287 printf("%s: unable to map control data, error = %d\n", 288 sc->sc_dev.dv_xname, error); 289 goto fail_1; 290 } 291 292 if ((error = bus_dmamap_create(sc->sc_dmat, 293 sizeof(struct tulip_control_data), 1, 294 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 295 printf("%s: unable to create control data DMA map, " 296 "error = %d\n", sc->sc_dev.dv_xname, error); 297 goto fail_2; 298 } 299 300 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 301 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 302 0)) != 0) { 303 printf("%s: unable to load control data DMA map, error = %d\n", 304 sc->sc_dev.dv_xname, error); 305 goto fail_3; 306 } 307 308 /* 309 * Create the transmit buffer DMA maps. 310 */ 311 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 312 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 313 TULIP_NTXSEGS, MCLBYTES, 0, 0, 314 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 315 printf("%s: unable to create tx DMA map %d, " 316 "error = %d\n", sc->sc_dev.dv_xname, i, error); 317 goto fail_4; 318 } 319 } 320 321 /* 322 * Create the recieve buffer DMA maps. 323 */ 324 for (i = 0; i < TULIP_NRXDESC; i++) { 325 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 326 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 327 printf("%s: unable to create rx DMA map %d, " 328 "error = %d\n", sc->sc_dev.dv_xname, i, error); 329 goto fail_5; 330 } 331 sc->sc_rxsoft[i].rxs_mbuf = NULL; 332 } 333 334 /* 335 * Reset the chip to a known state. 336 */ 337 tlp_reset(sc); 338 339 /* Announce ourselves. */ 340 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 341 sc->sc_name[0] != '\0' ? sc->sc_name : "", 342 sc->sc_name[0] != '\0' ? ", " : "", 343 ether_sprintf(enaddr)); 344 345 /* 346 * Initialize our media structures. This may probe the MII, if 347 * present. 348 */ 349 (*sc->sc_mediasw->tmsw_init)(sc); 350 351 ifp = &sc->sc_ethercom.ec_if; 352 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 353 ifp->if_softc = sc; 354 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 355 ifp->if_ioctl = tlp_ioctl; 356 ifp->if_start = tlp_start; 357 ifp->if_watchdog = tlp_watchdog; 358 359 /* 360 * Attach the interface. 361 */ 362 if_attach(ifp); 363 ether_ifattach(ifp, enaddr); 364 #if NBPFILTER > 0 365 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 366 sizeof(struct ether_header)); 367 #endif 368 369 /* 370 * Make sure the interface is shutdown during reboot. 371 */ 372 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 373 if (sc->sc_sdhook == NULL) 374 printf("%s: WARNING: unable to establish shutdown hook\n", 375 sc->sc_dev.dv_xname); 376 return; 377 378 /* 379 * Free any resources we've allocated during the failed attach 380 * attempt. Do this in reverse order and fall through. 381 */ 382 fail_5: 383 for (i = 0; i < TULIP_NRXDESC; i++) { 384 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 385 bus_dmamap_destroy(sc->sc_dmat, 386 sc->sc_rxsoft[i].rxs_dmamap); 387 } 388 fail_4: 389 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 390 if (sc->sc_txsoft[i].txs_dmamap != NULL) 391 bus_dmamap_destroy(sc->sc_dmat, 392 sc->sc_txsoft[i].txs_dmamap); 393 } 394 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 395 fail_3: 396 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 397 fail_2: 398 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 399 sizeof(struct tulip_control_data)); 400 fail_1: 401 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 402 fail_0: 403 return; 404 } 405 406 /* 407 * tlp_shutdown: 408 * 409 * Make sure the interface is stopped at reboot time. 410 */ 411 void 412 tlp_shutdown(arg) 413 void *arg; 414 { 415 struct tulip_softc *sc = arg; 416 417 tlp_stop(sc, 1); 418 } 419 420 /* 421 * tlp_start: [ifnet interface function] 422 * 423 * Start packet transmission on the interface. 424 */ 425 void 426 tlp_start(ifp) 427 struct ifnet *ifp; 428 { 429 struct tulip_softc *sc = ifp->if_softc; 430 struct mbuf *m0, *m; 431 struct tulip_txsoft *txs, *last_txs; 432 bus_dmamap_t dmamap; 433 int error, firsttx, nexttx, lasttx, ofree, seg; 434 435 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 436 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 437 438 /* 439 * If we want a filter setup, it means no more descriptors were 440 * available for the setup routine. Let it get a chance to wedge 441 * itself into the ring. 442 */ 443 if (sc->sc_flags & TULIPF_WANT_SETUP) 444 ifp->if_flags |= IFF_OACTIVE; 445 446 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 447 return; 448 449 /* 450 * Remember the previous number of free descriptors and 451 * the first descriptor we'll use. 452 */ 453 ofree = sc->sc_txfree; 454 firsttx = sc->sc_txnext; 455 456 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 457 sc->sc_dev.dv_xname, ofree, firsttx)); 458 459 /* 460 * Loop through the send queue, setting up transmit descriptors 461 * until we drain the queue, or use up all available transmit 462 * descriptors. 463 */ 464 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 465 sc->sc_txfree != 0) { 466 /* 467 * Grab a packet off the queue. 468 */ 469 IF_DEQUEUE(&ifp->if_snd, m0); 470 if (m0 == NULL) 471 break; 472 473 dmamap = txs->txs_dmamap; 474 475 /* 476 * Load the DMA map. If this fails, the packet either 477 * didn't fit in the alloted number of segments, or we were 478 * short on resources. In this case, we'll copy and try 479 * again. 480 */ 481 if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 482 BUS_DMA_NOWAIT) != 0) { 483 MGETHDR(m, M_DONTWAIT, MT_DATA); 484 if (m == NULL) { 485 printf("%s: unable to allocate Tx mbuf\n", 486 sc->sc_dev.dv_xname); 487 IF_PREPEND(&ifp->if_snd, m0); 488 break; 489 } 490 if (m0->m_pkthdr.len > MHLEN) { 491 MCLGET(m, M_DONTWAIT); 492 if ((m->m_flags & M_EXT) == 0) { 493 printf("%s: unable to allocate Tx " 494 "cluster\n", sc->sc_dev.dv_xname); 495 m_freem(m); 496 IF_PREPEND(&ifp->if_snd, m0); 497 break; 498 } 499 } 500 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 501 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 502 m_freem(m0); 503 m0 = m; 504 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 505 m0, BUS_DMA_NOWAIT); 506 if (error) { 507 printf("%s: unable to load Tx buffer, " 508 "error = %d\n", sc->sc_dev.dv_xname, error); 509 IF_PREPEND(&ifp->if_snd, m0); 510 break; 511 } 512 } 513 514 /* 515 * Ensure we have enough descriptors free to describe 516 * the packet. 517 */ 518 if (dmamap->dm_nsegs > sc->sc_txfree) { 519 /* 520 * Not enough free descriptors to transmit this 521 * packet. We haven't committed to anything yet, 522 * so just unload the DMA map, put the packet 523 * back on the queue, and punt. Notify the upper 524 * layer that there are no more slots left. 525 * 526 * XXX We could allocate an mbuf and copy, but 527 * XXX it is worth it? 528 */ 529 ifp->if_flags |= IFF_OACTIVE; 530 bus_dmamap_unload(sc->sc_dmat, dmamap); 531 IF_PREPEND(&ifp->if_snd, m0); 532 break; 533 } 534 535 /* 536 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 537 */ 538 539 /* Sync the DMA map. */ 540 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 541 BUS_DMASYNC_PREWRITE); 542 543 /* 544 * Initialize the transmit descriptors. 545 */ 546 for (nexttx = sc->sc_txnext, seg = 0; 547 seg < dmamap->dm_nsegs; 548 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 549 /* 550 * If this is the first descriptor we're 551 * enqueueing, don't set the OWN bit just 552 * yet. That could cause a race condition. 553 * We'll do it below. 554 */ 555 sc->sc_txdescs[nexttx].td_status = 556 (nexttx == firsttx) ? 0 : TDSTAT_OWN; 557 sc->sc_txdescs[nexttx].td_bufaddr1 = 558 dmamap->dm_segs[seg].ds_addr; 559 sc->sc_txdescs[nexttx].td_ctl = 560 (dmamap->dm_segs[seg].ds_len << TDCTL_SIZE1_SHIFT) | 561 TDCTL_CH; 562 lasttx = nexttx; 563 } 564 565 /* Set `first segment' and `last segment' appropriately. */ 566 sc->sc_txdescs[sc->sc_txnext].td_ctl |= TDCTL_Tx_FS; 567 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_LS; 568 569 #ifdef TLP_DEBUG 570 if (ifp->if_flags & IFF_DEBUG) { 571 printf(" txsoft %p trainsmit chain:\n", txs); 572 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 573 printf(" descriptor %d:\n", seg); 574 printf(" td_status: 0x%08x\n", 575 sc->sc_txdescs[seg].td_status); 576 printf(" td_ctl: 0x%08x\n", 577 sc->sc_txdescs[seg].td_ctl); 578 printf(" td_bufaddr1: 0x%08x\n", 579 sc->sc_txdescs[seg].td_bufaddr1); 580 printf(" td_bufaddr2: 0x%08x\n", 581 sc->sc_txdescs[seg].td_bufaddr2); 582 if (seg == lasttx) 583 break; 584 } 585 } 586 #endif 587 588 /* Sync the descriptors we're using. */ 589 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 590 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 591 592 /* 593 * Store a pointer to the packet so we can free it later, 594 * and remember what txdirty will be once the packet is 595 * done. 596 */ 597 txs->txs_mbuf = m0; 598 txs->txs_firstdesc = sc->sc_txnext; 599 txs->txs_lastdesc = lasttx; 600 601 /* Advance the tx pointer. */ 602 sc->sc_txfree -= dmamap->dm_nsegs; 603 sc->sc_txnext = nexttx; 604 605 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 606 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 607 608 last_txs = txs; 609 610 #if NBPFILTER > 0 611 /* 612 * Pass the packet to any BPF listeners. 613 */ 614 if (ifp->if_bpf) 615 bpf_mtap(ifp->if_bpf, m0); 616 #endif /* NBPFILTER > 0 */ 617 } 618 619 if (txs == NULL || sc->sc_txfree == 0) { 620 /* No more slots left; notify upper layer. */ 621 ifp->if_flags |= IFF_OACTIVE; 622 } 623 624 if (sc->sc_txfree != ofree) { 625 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 626 sc->sc_dev.dv_xname, lasttx, firsttx)); 627 /* 628 * Cause a transmit interrupt to happen on the 629 * last packet we enqueued. 630 */ 631 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_IC; 632 TULIP_CDTXSYNC(sc, lasttx, 1, 633 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 634 635 /* 636 * Some clone chips want IC on the *first* segment in 637 * the packet. Appease them. 638 */ 639 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 640 last_txs->txs_firstdesc != lasttx) { 641 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 642 TDCTL_Tx_IC; 643 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 644 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 645 } 646 647 /* 648 * The entire packet chain is set up. Give the 649 * first descriptor to the chip now. 650 */ 651 sc->sc_txdescs[firsttx].td_status |= TDSTAT_OWN; 652 TULIP_CDTXSYNC(sc, firsttx, 1, 653 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 654 655 /* Wake up the transmitter. */ 656 /* XXX USE AUTOPOLLING? */ 657 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 658 659 /* Set a watchdog timer in case the chip flakes out. */ 660 ifp->if_timer = 5; 661 } 662 } 663 664 /* 665 * tlp_watchdog: [ifnet interface function] 666 * 667 * Watchdog timer handler. 668 */ 669 void 670 tlp_watchdog(ifp) 671 struct ifnet *ifp; 672 { 673 struct tulip_softc *sc = ifp->if_softc; 674 int doing_setup, doing_transmit; 675 676 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 677 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 678 679 if (doing_setup && doing_transmit) { 680 printf("%s: filter setup and transmit timeout\n", 681 sc->sc_dev.dv_xname); 682 ifp->if_oerrors++; 683 } else if (doing_transmit) { 684 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 685 ifp->if_oerrors++; 686 } else if (doing_setup) 687 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 688 else 689 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 690 691 (void) tlp_init(sc); 692 693 /* Try to get more packets going. */ 694 tlp_start(ifp); 695 } 696 697 /* 698 * tlp_ioctl: [ifnet interface function] 699 * 700 * Handle control requests from the operator. 701 */ 702 int 703 tlp_ioctl(ifp, cmd, data) 704 struct ifnet *ifp; 705 u_long cmd; 706 caddr_t data; 707 { 708 struct tulip_softc *sc = ifp->if_softc; 709 struct ifreq *ifr = (struct ifreq *)data; 710 struct ifaddr *ifa = (struct ifaddr *)data; 711 int s, error = 0; 712 713 s = splnet(); 714 715 switch (cmd) { 716 case SIOCSIFADDR: 717 ifp->if_flags |= IFF_UP; 718 719 switch (ifa->ifa_addr->sa_family) { 720 #ifdef INET 721 case AF_INET: 722 if ((error = tlp_init(sc)) != 0) 723 break; 724 arp_ifinit(ifp, ifa); 725 break; 726 #endif /* INET */ 727 #ifdef NS 728 case AF_NS: 729 { 730 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 731 732 if (ns_nullhost(*ina)) 733 ina->x_host = *(union ns_host *) 734 LLADDR(ifp->if_sadl); 735 else 736 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 737 ifp->if_addrlen); 738 /* Set new address. */ 739 error = tlp_init(sc); 740 break; 741 } 742 #endif /* NS */ 743 default: 744 error = tlp_init(sc); 745 break; 746 } 747 break; 748 749 case SIOCSIFMTU: 750 if (ifr->ifr_mtu > ETHERMTU) 751 error = EINVAL; 752 else 753 ifp->if_mtu = ifr->ifr_mtu; 754 break; 755 756 case SIOCSIFFLAGS: 757 if ((ifp->if_flags & IFF_UP) == 0 && 758 (ifp->if_flags & IFF_RUNNING) != 0) { 759 /* 760 * If interface is marked down and it is running, then 761 * stop it. 762 */ 763 tlp_stop(sc, 1); 764 } else if ((ifp->if_flags & IFF_UP) != 0 && 765 (ifp->if_flags & IFF_RUNNING) == 0) { 766 /* 767 * If interfase it marked up and it is stopped, then 768 * start it. 769 */ 770 error = tlp_init(sc); 771 } else if ((ifp->if_flags & IFF_UP) != 0) { 772 /* 773 * Reset the interface to pick up changes in any other 774 * flags that affect the hardware state. 775 */ 776 error = tlp_init(sc); 777 } 778 break; 779 780 case SIOCADDMULTI: 781 case SIOCDELMULTI: 782 error = (cmd == SIOCADDMULTI) ? 783 ether_addmulti(ifr, &sc->sc_ethercom) : 784 ether_delmulti(ifr, &sc->sc_ethercom); 785 786 if (error == ENETRESET) { 787 /* 788 * Multicast list has changed. Set the filter 789 * accordingly. 790 */ 791 (*sc->sc_filter_setup)(sc); 792 error = 0; 793 } 794 break; 795 796 case SIOCSIFMEDIA: 797 case SIOCGIFMEDIA: 798 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 799 break; 800 801 default: 802 error = EINVAL; 803 break; 804 } 805 806 /* Try to get more packets going. */ 807 tlp_start(ifp); 808 809 splx(s); 810 return (error); 811 } 812 813 /* 814 * tlp_intr: 815 * 816 * Interrupt service routine. 817 */ 818 int 819 tlp_intr(arg) 820 void *arg; 821 { 822 struct tulip_softc *sc = arg; 823 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 824 u_int32_t status, rxstatus, txstatus; 825 int handled = 0, txthresh; 826 827 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 828 829 for (;;) { 830 status = TULIP_READ(sc, CSR_STATUS); 831 if (status) 832 TULIP_WRITE(sc, CSR_STATUS, status); 833 834 if ((status & sc->sc_inten) == 0) 835 break; 836 837 handled = 1; 838 839 rxstatus = status & sc->sc_rxint_mask; 840 txstatus = status & sc->sc_txint_mask; 841 842 if (rxstatus) { 843 /* Grab new any new packets. */ 844 tlp_rxintr(sc); 845 846 if (rxstatus & STATUS_RWT) 847 printf("%s: receive watchdog timeout\n", 848 sc->sc_dev.dv_xname); 849 850 if (rxstatus & STATUS_RU) { 851 printf("%s: receive ring overrun\n", 852 sc->sc_dev.dv_xname); 853 /* Get the receive process going again. */ 854 tlp_idle(sc, OPMODE_SR); 855 TULIP_WRITE(sc, CSR_RXLIST, 856 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 857 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 858 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 859 break; 860 } 861 } 862 863 if (txstatus) { 864 /* Sweep up transmit descriptors. */ 865 tlp_txintr(sc); 866 867 if (txstatus & STATUS_TJT) 868 printf("%s: transmit jabber timeout\n", 869 sc->sc_dev.dv_xname); 870 871 if (txstatus & STATUS_UNF) { 872 /* 873 * Increase our transmit threshold if 874 * another is available. 875 */ 876 txthresh = sc->sc_txthresh + 1; 877 if (sc->sc_txth[txthresh].txth_name != NULL) { 878 /* Idle the transmit process. */ 879 tlp_idle(sc, OPMODE_ST); 880 881 sc->sc_txthresh = txthresh; 882 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 883 sc->sc_opmode |= 884 sc->sc_txth[txthresh].txth_opmode; 885 printf("%s: transmit underrun; new " 886 "threshold: %s\n", 887 sc->sc_dev.dv_xname, 888 sc->sc_txth[txthresh].txth_name); 889 890 /* 891 * Set the new threshold and restart 892 * the transmit process. 893 */ 894 TULIP_WRITE(sc, CSR_OPMODE, 895 sc->sc_opmode); 896 } 897 /* 898 * XXX Log every Nth underrun from 899 * XXX now on? 900 */ 901 } 902 } 903 904 if (status & (STATUS_TPS|STATUS_RPS)) { 905 if (status & STATUS_TPS) 906 printf("%s: transmit process stopped\n", 907 sc->sc_dev.dv_xname); 908 if (status & STATUS_RPS) 909 printf("%s: receive process stopped\n", 910 sc->sc_dev.dv_xname); 911 (void) tlp_init(sc); 912 break; 913 } 914 915 if (status & STATUS_SE) { 916 const char *str; 917 switch (status & STATUS_EB) { 918 case STATUS_EB_PARITY: 919 str = "parity error"; 920 break; 921 922 case STATUS_EB_MABT: 923 str = "master abort"; 924 break; 925 926 case STATUS_EB_TABT: 927 str = "target abort"; 928 break; 929 930 default: 931 str = "unknown error"; 932 break; 933 } 934 printf("%s: fatal system error: %s\n", 935 sc->sc_dev.dv_xname, str); 936 (void) tlp_init(sc); 937 break; 938 } 939 940 /* 941 * Not handled: 942 * 943 * Transmit buffer unavailable -- normal 944 * condition, nothing to do, really. 945 * 946 * General purpose timer experied -- we don't 947 * use the general purpose timer. 948 * 949 * Early receive interrupt -- not available on 950 * all chips, we just use RI. We also only 951 * use single-segment receive DMA, so this 952 * is mostly useless. 953 */ 954 } 955 956 /* Try to get more packets going. */ 957 tlp_start(ifp); 958 959 return (handled); 960 } 961 962 /* 963 * tlp_rxintr: 964 * 965 * Helper; handle receive interrupts. 966 */ 967 void 968 tlp_rxintr(sc) 969 struct tulip_softc *sc; 970 { 971 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 972 struct ether_header *eh; 973 struct tulip_rxsoft *rxs; 974 struct mbuf *m; 975 u_int32_t rxstat; 976 int i, len; 977 978 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 979 rxs = &sc->sc_rxsoft[i]; 980 981 TULIP_CDRXSYNC(sc, i, 982 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 983 984 rxstat = sc->sc_rxdescs[i].td_status; 985 986 if (rxstat & TDSTAT_OWN) { 987 /* 988 * We have processed all of the receive buffers. 989 */ 990 break; 991 } 992 993 /* 994 * Make sure the packet fit in one buffer. This should 995 * always be the case. But the Lite-On PNIC, rev 33 996 * has an awful receive engine bug, which may require 997 * a very icky work-around. 998 */ 999 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1000 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1001 printf("%s: incoming packet spilled, resetting\n", 1002 sc->sc_dev.dv_xname); 1003 (void) tlp_init(sc); 1004 return; 1005 } 1006 1007 /* 1008 * If any collisions were seen on the wire, count one. 1009 */ 1010 if (rxstat & TDSTAT_Rx_CS) 1011 ifp->if_collisions++; 1012 1013 /* 1014 * If an error occured, update stats, clear the status 1015 * word, and leave the packet buffer in place. It will 1016 * simply be reused the next time the ring comes around. 1017 */ 1018 if (rxstat & TDSTAT_ES) { 1019 #define PRINTERR(bit, str) \ 1020 if (rxstat & (bit)) \ 1021 printf("%s: receive error: %s\n", \ 1022 sc->sc_dev.dv_xname, str) 1023 ifp->if_ierrors++; 1024 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1025 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1026 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1027 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1028 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1029 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1030 #undef PRINTERR 1031 TULIP_INIT_RXDESC(sc, i); 1032 continue; 1033 } 1034 1035 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1036 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1037 1038 /* 1039 * No errors; receive the packet. Note the Tulip 1040 * includes the CRC with every packet; trim it. 1041 */ 1042 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; 1043 1044 #ifdef __NO_STRICT_ALIGNMENT 1045 /* 1046 * Allocate a new mbuf cluster. If that fails, we are 1047 * out of memory, and must drop the packet and recycle 1048 * the buffer that's already attached to this descriptor. 1049 */ 1050 m = rxs->rxs_mbuf; 1051 if (tlp_add_rxbuf(sc, i) != 0) { 1052 ifp->if_ierrors++; 1053 TULIP_INIT_RXDESC(sc, i); 1054 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1055 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1056 continue; 1057 } 1058 #else 1059 /* 1060 * The Tulip's receive buffers must be 4-byte aligned. 1061 * But this means that the data after the Ethernet header 1062 * is misaligned. We must allocate a new buffer and 1063 * copy the data, shifted forward 2 bytes. 1064 */ 1065 MGETHDR(m, M_DONTWAIT, MT_DATA); 1066 if (m == NULL) { 1067 dropit: 1068 ifp->if_ierrors++; 1069 TULIP_INIT_RXDESC(sc, i); 1070 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1071 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1072 continue; 1073 } 1074 if (len > (MHLEN - 2)) { 1075 MCLGET(m, M_DONTWAIT); 1076 if ((m->m_flags & M_EXT) == 0) { 1077 m_freem(m); 1078 goto dropit; 1079 } 1080 } 1081 m->m_data += 2; 1082 1083 /* 1084 * Note that we use clusters for incoming frames, so the 1085 * buffer is virtually contiguous. 1086 */ 1087 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1088 1089 /* Allow the receive descriptor to continue using its mbuf. */ 1090 TULIP_INIT_RXDESC(sc, i); 1091 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1092 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1093 #endif /* __NO_STRICT_ALIGNMENT */ 1094 1095 ifp->if_ipackets++; 1096 eh = mtod(m, struct ether_header *); 1097 m->m_pkthdr.rcvif = ifp; 1098 m->m_pkthdr.len = m->m_len = len; 1099 1100 #if NBPFILTER > 0 1101 /* 1102 * Pass this up to any BPF listeners, but only 1103 * pass it up the stack if its for us. 1104 */ 1105 if (ifp->if_bpf) 1106 bpf_mtap(ifp->if_bpf, m); 1107 #endif /* NPBFILTER > 0 */ 1108 1109 /* 1110 * This test is outside the NBPFILTER block because 1111 * on the 21140 we have to use Hash-Only mode due to 1112 * a bug in the filter logic. 1113 */ 1114 if ((ifp->if_flags & IFF_PROMISC) != 0 || 1115 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 1116 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1117 ETHER_ADDR_LEN) != 0 && 1118 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) { 1119 m_freem(m); 1120 continue; 1121 } 1122 } 1123 1124 /* Pass it on. */ 1125 (*ifp->if_input)(ifp, m); 1126 } 1127 1128 /* Update the recieve pointer. */ 1129 sc->sc_rxptr = i; 1130 } 1131 1132 /* 1133 * tlp_txintr: 1134 * 1135 * Helper; handle transmit interrupts. 1136 */ 1137 void 1138 tlp_txintr(sc) 1139 struct tulip_softc *sc; 1140 { 1141 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1142 struct tulip_txsoft *txs; 1143 u_int32_t txstat; 1144 1145 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1146 sc->sc_dev.dv_xname, sc->sc_flags)); 1147 1148 ifp->if_flags &= ~IFF_OACTIVE; 1149 1150 /* 1151 * If we were doing a filter setup, check to see if it completed. 1152 */ 1153 if (sc->sc_flags & TULIPF_DOING_SETUP) { 1154 TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1155 if ((sc->sc_setup_desc.td_status & TDSTAT_OWN) == 0) 1156 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1157 } 1158 1159 /* 1160 * Go through our Tx list and free mbufs for those 1161 * frames that have been transmitted. 1162 */ 1163 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1164 TULIP_CDTXSYNC(sc, txs->txs_firstdesc, 1165 txs->txs_dmamap->dm_nsegs, 1166 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1167 1168 #ifdef TLP_DEBUG 1169 if (ifp->if_flags & IFF_DEBUG) { 1170 int i; 1171 printf(" txsoft %p trainsmit chain:\n", txs); 1172 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1173 printf(" descriptor %d:\n", i); 1174 printf(" td_status: 0x%08x\n", 1175 sc->sc_txdescs[i].td_status); 1176 printf(" td_ctl: 0x%08x\n", 1177 sc->sc_txdescs[i].td_ctl); 1178 printf(" td_bufaddr1: 0x%08x\n", 1179 sc->sc_txdescs[i].td_bufaddr1); 1180 printf(" td_bufaddr2: 0x%08x\n", 1181 sc->sc_txdescs[i].td_bufaddr2); 1182 if (i == txs->txs_lastdesc) 1183 break; 1184 } 1185 } 1186 #endif 1187 1188 txstat = sc->sc_txdescs[txs->txs_firstdesc].td_status; 1189 if (txstat & TDSTAT_OWN) 1190 break; 1191 1192 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1193 1194 sc->sc_txfree += txs->txs_dmamap->dm_nsegs; 1195 1196 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1197 0, txs->txs_dmamap->dm_mapsize, 1198 BUS_DMASYNC_POSTWRITE); 1199 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1200 m_freem(txs->txs_mbuf); 1201 txs->txs_mbuf = NULL; 1202 1203 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1204 1205 /* 1206 * Check for errors and collisions. 1207 */ 1208 if (txstat & 1209 (TDSTAT_Tx_UF|TDSTAT_Tx_NC|TDSTAT_Tx_LO|TDSTAT_Tx_TO)) { 1210 ifp->if_oerrors++; 1211 #if 0 1212 /* 1213 * XXX Can't check for late or excessive collisions; 1214 * XXX Some 21040s seem to register those even on 1215 * XXX successful transmissions! 1216 */ 1217 if (txstat & TDSTAT_Tx_EC) 1218 ifp->if_collisions += 16; 1219 if (txstat & TDSTAT_Tx_LC) 1220 ifp->if_collisions++; 1221 #endif 1222 } else { 1223 /* Packet was transmitted successfully. */ 1224 ifp->if_opackets++; 1225 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1226 } 1227 } 1228 1229 /* 1230 * If there are no more pending transmissions, cancel the watchdog 1231 * timer. 1232 */ 1233 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1234 ifp->if_timer = 0; 1235 1236 /* 1237 * If we have a receive filter setup pending, do it now. 1238 */ 1239 if (sc->sc_flags & TULIPF_WANT_SETUP) 1240 (*sc->sc_filter_setup)(sc); 1241 } 1242 1243 /* 1244 * tlp_reset: 1245 * 1246 * Perform a soft reset on the Tulip. 1247 */ 1248 void 1249 tlp_reset(sc) 1250 struct tulip_softc *sc; 1251 { 1252 int i; 1253 1254 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1255 1256 for (i = 0; i < 1000; i++) { 1257 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1258 break; 1259 delay(10); 1260 } 1261 1262 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1263 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1264 1265 delay(1000); 1266 } 1267 1268 /* 1269 * tlp_init: 1270 * 1271 * Initialize the interface. Must be called at splnet(). 1272 */ 1273 int 1274 tlp_init(sc) 1275 struct tulip_softc *sc; 1276 { 1277 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1278 struct tulip_txsoft *txs; 1279 struct tulip_rxsoft *rxs; 1280 int i, error = 0; 1281 1282 /* 1283 * Cancel any pending I/O. 1284 */ 1285 tlp_stop(sc, 0); 1286 1287 /* 1288 * Reset the Tulip to a known state. 1289 */ 1290 tlp_reset(sc); 1291 1292 /* 1293 * Initialize the BUSMODE register. 1294 * 1295 * XXX What about read-multiple/read-line/write-line on 1296 * XXX the 21140 and up? 1297 */ 1298 sc->sc_busmode = BUSMODE_BAR | BUSMODE_PBL_DEFAULT; 1299 switch (sc->sc_cacheline) { 1300 default: 1301 /* 1302 * Note: We must *always* set these bits; a cache 1303 * alignment of 0 is RESERVED. 1304 */ 1305 case 8: 1306 sc->sc_busmode |= BUSMODE_CAL_8LW; 1307 break; 1308 case 16: 1309 sc->sc_busmode |= BUSMODE_CAL_16LW; 1310 break; 1311 case 32: 1312 sc->sc_busmode |= BUSMODE_CAL_32LW; 1313 break; 1314 } 1315 switch (sc->sc_chip) { 1316 case TULIP_CHIP_82C168: 1317 case TULIP_CHIP_82C169: 1318 sc->sc_busmode |= BUSMODE_PNIC_MBO; 1319 break; 1320 default: 1321 /* Nothing. */ 1322 break; 1323 } 1324 #if BYTE_ORDER == BIG_ENDIAN 1325 /* 1326 * XXX There are reports that this doesn't work properly 1327 * in the old Tulip driver, but BUSMODE_DBO does. However, 1328 * BUSMODE_DBO is not available on the 21040, and requires 1329 * us to byte-swap the setup packet. What to do? 1330 */ 1331 sc->sc_busmode |= BUSMODE_BLE; 1332 #endif 1333 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1334 1335 /* 1336 * Initialize the OPMODE register. We don't write it until 1337 * we're ready to begin the transmit and receive processes. 1338 * 1339 * Media-related OPMODE bits are set in the media callbacks 1340 * for each specific chip/board. 1341 */ 1342 sc->sc_opmode = OPMODE_SR | OPMODE_ST | 1343 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1344 switch (sc->sc_chip) { 1345 case TULIP_CHIP_21140: 1346 case TULIP_CHIP_21140A: 1347 case TULIP_CHIP_21142: 1348 case TULIP_CHIP_21143: 1349 sc->sc_opmode |= OPMODE_MBO; 1350 break; 1351 1352 default: 1353 /* Nothing. */ 1354 } 1355 1356 if (sc->sc_flags & TULIPF_HAS_MII) { 1357 switch (sc->sc_chip) { 1358 case TULIP_CHIP_82C168: 1359 case TULIP_CHIP_82C169: 1360 /* Enable the MII port. */ 1361 sc->sc_opmode |= OPMODE_PS; 1362 1363 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 1364 break; 1365 1366 case TULIP_CHIP_WB89C840F: 1367 /* Nothing. */ 1368 break; 1369 1370 default: 1371 /* Enable the MII port. */ 1372 sc->sc_opmode |= OPMODE_PS; 1373 break; 1374 } 1375 } else { 1376 switch (sc->sc_chip) { 1377 case TULIP_CHIP_82C168: 1378 case TULIP_CHIP_82C169: 1379 sc->sc_opmode |= OPMODE_PNIC_TBEN; 1380 break; 1381 1382 default: 1383 /* Nothing. */ 1384 } 1385 } 1386 1387 /* 1388 * Magical mystery initialization on the Macronix chips. 1389 * The MX98713 uses its own magic value, the rest share 1390 * a common one. 1391 */ 1392 switch (sc->sc_chip) { 1393 case TULIP_CHIP_MX98713: 1394 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1395 break; 1396 1397 case TULIP_CHIP_MX98713A: 1398 case TULIP_CHIP_MX98715: 1399 case TULIP_CHIP_MX98725: 1400 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1401 break; 1402 1403 default: 1404 /* Nothing. */ 1405 } 1406 1407 /* 1408 * Initialize the transmit descriptor ring. 1409 */ 1410 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1411 for (i = 0; i < TULIP_NTXDESC; i++) { 1412 sc->sc_txdescs[i].td_ctl = TDCTL_CH; 1413 sc->sc_txdescs[i].td_bufaddr2 = 1414 TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)); 1415 } 1416 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1417 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1418 sc->sc_txfree = TULIP_NTXDESC; 1419 sc->sc_txnext = 0; 1420 1421 /* 1422 * Initialize the transmit job descriptors. 1423 */ 1424 SIMPLEQ_INIT(&sc->sc_txfreeq); 1425 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1426 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1427 txs = &sc->sc_txsoft[i]; 1428 txs->txs_mbuf = NULL; 1429 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1430 } 1431 1432 /* 1433 * Initialize the receive descriptor and receive job 1434 * descriptor rings. 1435 */ 1436 for (i = 0; i < TULIP_NRXDESC; i++) { 1437 rxs = &sc->sc_rxsoft[i]; 1438 if (rxs->rxs_mbuf == NULL) { 1439 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1440 printf("%s: unable to allocate or map rx " 1441 "buffer %d, error = %d\n", 1442 sc->sc_dev.dv_xname, i, error); 1443 /* 1444 * XXX Should attempt to run with fewer receive 1445 * XXX buffers instead of just failing. 1446 */ 1447 tlp_rxdrain(sc); 1448 goto out; 1449 } 1450 } 1451 } 1452 sc->sc_rxptr = 0; 1453 1454 /* 1455 * Initialize the interrupt mask and enable interrupts. 1456 */ 1457 /* normal interrupts */ 1458 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1459 1460 /* abnormal interrupts */ 1461 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1462 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1463 1464 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1465 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1466 1467 switch (sc->sc_chip) { 1468 case TULIP_CHIP_WB89C840F: 1469 /* 1470 * Clear bits that we don't want that happen to 1471 * overlap or don't exist. 1472 */ 1473 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1474 break; 1475 1476 default: 1477 /* Nothing. */ 1478 } 1479 1480 sc->sc_rxint_mask &= sc->sc_inten; 1481 sc->sc_txint_mask &= sc->sc_inten; 1482 1483 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1484 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1485 1486 /* 1487 * Give the transmit and receive rings to the Tulip. 1488 */ 1489 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1490 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1491 1492 /* 1493 * On chips that do this differently, set the station address. 1494 */ 1495 switch (sc->sc_chip) { 1496 case TULIP_CHIP_WB89C840F: 1497 { 1498 /* XXX Do this with stream writes? */ 1499 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1500 1501 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1502 bus_space_write_1(sc->sc_st, sc->sc_sh, 1503 cpa + i, LLADDR(ifp->if_sadl)[i]); 1504 } 1505 break; 1506 } 1507 1508 default: 1509 /* Nothing. */ 1510 } 1511 1512 /* 1513 * Set the receive filter. This will start the transmit and 1514 * receive processes. 1515 */ 1516 (*sc->sc_filter_setup)(sc); 1517 1518 /* 1519 * Start the receive process. 1520 */ 1521 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1522 1523 if (sc->sc_tick != NULL) { 1524 /* Start the one second clock. */ 1525 timeout(sc->sc_tick, sc, hz); 1526 } 1527 1528 /* 1529 * Note that the interface is now running. 1530 */ 1531 ifp->if_flags |= IFF_RUNNING; 1532 ifp->if_flags &= ~IFF_OACTIVE; 1533 1534 /* 1535 * Set the media. We must do this after the transmit process is 1536 * running, since we may actually have to transmit packets on 1537 * our board to test link integrity. 1538 */ 1539 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1540 1541 out: 1542 if (error) 1543 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1544 return (error); 1545 } 1546 1547 /* 1548 * tlp_rxdrain: 1549 * 1550 * Drain the receive queue. 1551 */ 1552 void 1553 tlp_rxdrain(sc) 1554 struct tulip_softc *sc; 1555 { 1556 struct tulip_rxsoft *rxs; 1557 int i; 1558 1559 for (i = 0; i < TULIP_NRXDESC; i++) { 1560 rxs = &sc->sc_rxsoft[i]; 1561 if (rxs->rxs_mbuf != NULL) { 1562 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1563 m_freem(rxs->rxs_mbuf); 1564 rxs->rxs_mbuf = NULL; 1565 } 1566 } 1567 } 1568 1569 /* 1570 * tlp_stop: 1571 * 1572 * Stop transmission on the interface. 1573 */ 1574 void 1575 tlp_stop(sc, drain) 1576 struct tulip_softc *sc; 1577 int drain; 1578 { 1579 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1580 struct tulip_txsoft *txs; 1581 1582 if (sc->sc_tick != NULL) { 1583 /* Stop the one second clock. */ 1584 untimeout(sc->sc_tick, sc); 1585 } 1586 1587 /* Disable interrupts. */ 1588 TULIP_WRITE(sc, CSR_INTEN, 0); 1589 1590 /* Stop the transmit and receive processes. */ 1591 TULIP_WRITE(sc, CSR_OPMODE, 0); 1592 TULIP_WRITE(sc, CSR_RXLIST, 0); 1593 TULIP_WRITE(sc, CSR_TXLIST, 0); 1594 1595 /* 1596 * Release any queued transmit buffers. 1597 */ 1598 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1599 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1600 if (txs->txs_mbuf != NULL) { 1601 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1602 m_freem(txs->txs_mbuf); 1603 txs->txs_mbuf = NULL; 1604 } 1605 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1606 } 1607 1608 if (drain) { 1609 /* 1610 * Release the receive buffers. 1611 */ 1612 tlp_rxdrain(sc); 1613 } 1614 1615 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 1616 1617 /* 1618 * Mark the interface down and cancel the watchdog timer. 1619 */ 1620 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1621 ifp->if_timer = 0; 1622 } 1623 1624 #define SROM_EMIT(sc, x) \ 1625 do { \ 1626 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 1627 delay(1); \ 1628 } while (0) 1629 1630 /* 1631 * tlp_srom_idle: 1632 * 1633 * Put the SROM in idle state. 1634 */ 1635 void 1636 tlp_srom_idle(sc) 1637 struct tulip_softc *sc; 1638 { 1639 u_int32_t miirom; 1640 int i; 1641 1642 miirom = MIIROM_SR; 1643 SROM_EMIT(sc, miirom); 1644 1645 miirom |= MIIROM_RD; 1646 SROM_EMIT(sc, miirom); 1647 1648 miirom |= MIIROM_SROMCS; 1649 SROM_EMIT(sc, miirom); 1650 1651 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1652 1653 /* Strobe the clock 25 times. */ 1654 for (i = 0; i < 25; i++) { 1655 SROM_EMIT(sc, miirom); 1656 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1657 } 1658 1659 SROM_EMIT(sc, miirom); 1660 1661 miirom &= ~MIIROM_SROMCS; 1662 SROM_EMIT(sc, miirom); 1663 1664 SROM_EMIT(sc, 0); 1665 } 1666 1667 /* 1668 * tlp_read_srom: 1669 * 1670 * Read the Tulip SROM. 1671 */ 1672 void 1673 tlp_read_srom(sc, word, wordcnt, data) 1674 struct tulip_softc *sc; 1675 int word, wordcnt; 1676 u_int16_t *data; 1677 { 1678 u_int32_t miirom; 1679 int i, x; 1680 1681 tlp_srom_idle(sc); 1682 1683 /* Select the SROM. */ 1684 miirom = MIIROM_SR; 1685 SROM_EMIT(sc, miirom); 1686 1687 miirom |= MIIROM_RD; 1688 SROM_EMIT(sc, miirom); 1689 1690 for (i = 0; i < wordcnt; i++) { 1691 /* Send CHIP SELECT for one clock tick. */ 1692 miirom |= MIIROM_SROMCS; 1693 SROM_EMIT(sc, miirom); 1694 1695 /* Shift in the READ opcode. */ 1696 for (x = 3; x > 0; x--) { 1697 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 1698 miirom |= MIIROM_SROMDI; 1699 else 1700 miirom &= ~MIIROM_SROMDI; 1701 SROM_EMIT(sc, miirom); 1702 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1703 SROM_EMIT(sc, miirom); 1704 } 1705 1706 /* Shift in address. */ 1707 for (x = 6; x > 0; x--) { 1708 if ((word + i) & (1 << (x - 1))) 1709 miirom |= MIIROM_SROMDI; 1710 else 1711 miirom &= ~MIIROM_SROMDI; 1712 SROM_EMIT(sc, miirom); 1713 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1714 SROM_EMIT(sc, miirom); 1715 } 1716 1717 /* Shift out data. */ 1718 miirom &= ~MIIROM_SROMDI; 1719 data[i] = 0; 1720 for (x = 16; x > 0; x--) { 1721 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1722 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 1723 data[i] |= (1 << (x - 1)); 1724 SROM_EMIT(sc, miirom); 1725 } 1726 1727 /* Clear CHIP SELECT. */ 1728 miirom &= ~MIIROM_SROMCS; 1729 SROM_EMIT(sc, miirom); 1730 } 1731 1732 /* Deselect the SROM. */ 1733 SROM_EMIT(sc, 0); 1734 1735 /* ...and idle it. */ 1736 tlp_srom_idle(sc); 1737 } 1738 1739 #undef SROM_EMIT 1740 1741 /* 1742 * tlp_add_rxbuf: 1743 * 1744 * Add a receive buffer to the indicated descriptor. 1745 */ 1746 int 1747 tlp_add_rxbuf(sc, idx) 1748 struct tulip_softc *sc; 1749 int idx; 1750 { 1751 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 1752 struct mbuf *m; 1753 int error; 1754 1755 MGETHDR(m, M_DONTWAIT, MT_DATA); 1756 if (m == NULL) 1757 return (ENOBUFS); 1758 1759 MCLGET(m, M_DONTWAIT); 1760 if ((m->m_flags & M_EXT) == 0) { 1761 m_freem(m); 1762 return (ENOBUFS); 1763 } 1764 1765 if (rxs->rxs_mbuf != NULL) 1766 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1767 1768 rxs->rxs_mbuf = m; 1769 1770 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 1771 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 1772 if (error) { 1773 printf("%s: can't load rx DMA map %d, error = %d\n", 1774 sc->sc_dev.dv_xname, idx, error); 1775 panic("tlp_add_rxbuf"); /* XXX */ 1776 } 1777 1778 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1779 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1780 1781 TULIP_INIT_RXDESC(sc, idx); 1782 1783 return (0); 1784 } 1785 1786 /* 1787 * tlp_crc32: 1788 * 1789 * Compute the 32-bit CRC of the provided buffer. 1790 */ 1791 u_int32_t 1792 tlp_crc32(buf, len) 1793 const u_int8_t *buf; 1794 size_t len; 1795 { 1796 static const u_int32_t crctab[] = { 1797 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 1798 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, 1799 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 1800 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c 1801 }; 1802 u_int32_t crc; 1803 int i; 1804 1805 crc = 0xffffffff; 1806 for (i = 0; i < len; i++) { 1807 crc ^= buf[i]; 1808 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1809 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1810 } 1811 return (crc); 1812 } 1813 1814 /* 1815 * tlp_srom_crcok: 1816 * 1817 * Check the CRC of the Tulip SROM. 1818 */ 1819 int 1820 tlp_srom_crcok(romdata) 1821 u_int8_t *romdata; 1822 { 1823 u_int32_t crc; 1824 1825 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM); 1826 crc = (crc & 0xffff) ^ 0xffff; 1827 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 1828 return (1); 1829 return (0); 1830 } 1831 1832 /* 1833 * tlp_parse_old_srom: 1834 * 1835 * Parse old-format SROMs. 1836 * 1837 * This routine is largely lifted from Matt Thomas's `de' driver. 1838 */ 1839 int 1840 tlp_parse_old_srom(sc, enaddr) 1841 struct tulip_softc *sc; 1842 u_int8_t *enaddr; 1843 { 1844 static const u_int8_t testpat[] = 1845 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 1846 int i; 1847 u_int32_t cksum; 1848 1849 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 1850 /* 1851 * Some vendors (e.g. ZNYX) don't use the standard 1852 * DEC Address ROM format, but rather just have an 1853 * Ethernet address in the first 6 bytes, maybe a 1854 * 2 byte checksum, and then all 0xff's. 1855 */ 1856 for (i = 8; i < 32; i++) { 1857 if (sc->sc_srom[i] != 0xff) 1858 return (0); 1859 } 1860 1861 /* 1862 * Sanity check the Ethernet address: 1863 * 1864 * - Make sure it's not multicast or locally 1865 * assigned 1866 * - Make sure it has a non-0 OUI 1867 */ 1868 if (sc->sc_srom[0] & 3) 1869 return (0); 1870 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 1871 sc->sc_srom[2] == 0) 1872 return (0); 1873 1874 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1875 return (1); 1876 } 1877 1878 /* 1879 * Standard DEC Address ROM test. 1880 */ 1881 1882 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 1883 return (0); 1884 1885 for (i = 0; i < 8; i++) { 1886 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 1887 return (0); 1888 } 1889 1890 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1891 1892 cksum = *(u_int16_t *) &enaddr[0]; 1893 1894 cksum <<= 1; 1895 if (cksum > 0xffff) 1896 cksum -= 0xffff; 1897 1898 cksum += *(u_int16_t *) &enaddr[2]; 1899 if (cksum > 0xffff) 1900 cksum -= 0xffff; 1901 1902 cksum <<= 1; 1903 if (cksum > 0xffff) 1904 cksum -= 0xffff; 1905 1906 cksum += *(u_int16_t *) &enaddr[4]; 1907 if (cksum >= 0xffff) 1908 cksum -= 0xffff; 1909 1910 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 1911 return (0); 1912 1913 return (1); 1914 } 1915 1916 /* 1917 * tlp_filter_setup: 1918 * 1919 * Set the Tulip's receive filter. 1920 */ 1921 void 1922 tlp_filter_setup(sc) 1923 struct tulip_softc *sc; 1924 { 1925 struct ethercom *ec = &sc->sc_ethercom; 1926 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1927 struct ether_multi *enm; 1928 struct ether_multistep step; 1929 __volatile u_int32_t *sp; 1930 u_int8_t enaddr[ETHER_ADDR_LEN]; 1931 u_int32_t hash; 1932 int cnt; 1933 1934 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 1935 sc->sc_dev.dv_xname, sc->sc_flags)); 1936 1937 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 1938 1939 /* 1940 * If there are transmissions pending, wait until they have 1941 * completed. 1942 */ 1943 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 1944 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 1945 sc->sc_flags |= TULIPF_WANT_SETUP; 1946 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 1947 sc->sc_dev.dv_xname)); 1948 return; 1949 } 1950 sc->sc_flags &= ~TULIPF_WANT_SETUP; 1951 1952 /* 1953 * If we're running, idle the transmit and receive engines. If 1954 * we're NOT running, we're being called from tlp_init(), and our 1955 * writing OPMODE will start the transmit and receive processes 1956 * in motion. 1957 */ 1958 if (ifp->if_flags & IFF_RUNNING) 1959 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 1960 1961 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 1962 1963 if (ifp->if_flags & IFF_PROMISC) { 1964 sc->sc_opmode |= OPMODE_PR; 1965 goto allmulti; 1966 } 1967 1968 /* 1969 * Try Perfect filtering first. 1970 */ 1971 1972 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 1973 sp = TULIP_CDSP(sc); 1974 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 1975 cnt = 0; 1976 ETHER_FIRST_MULTI(step, ec, enm); 1977 while (enm != NULL) { 1978 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 1979 /* 1980 * We must listen to a range of multicast addresses. 1981 * For now, just accept all multicasts, rather than 1982 * trying to set only those filter bits needed to match 1983 * the range. (At this time, the only use of address 1984 * ranges is for IP multicast routing, for which the 1985 * range is big enough to require all bits set.) 1986 */ 1987 goto allmulti; 1988 } 1989 if (cnt == (TULIP_MAXADDRS - 2)) { 1990 /* 1991 * We already have our multicast limit (still need 1992 * our station address and broadcast). Go to 1993 * Hash-Perfect mode. 1994 */ 1995 goto hashperfect; 1996 } 1997 *sp++ = ((u_int16_t *) enm->enm_addrlo)[0]; 1998 *sp++ = ((u_int16_t *) enm->enm_addrlo)[1]; 1999 *sp++ = ((u_int16_t *) enm->enm_addrlo)[2]; 2000 ETHER_NEXT_MULTI(step, enm); 2001 } 2002 2003 if (ifp->if_flags & IFF_BROADCAST) { 2004 /* ...and the broadcast address. */ 2005 cnt++; 2006 *sp++ = 0xffff; 2007 *sp++ = 0xffff; 2008 *sp++ = 0xffff; 2009 } 2010 2011 /* Pad the rest with our station address. */ 2012 for (; cnt < TULIP_MAXADDRS; cnt++) { 2013 *sp++ = ((u_int16_t *) enaddr)[0]; 2014 *sp++ = ((u_int16_t *) enaddr)[1]; 2015 *sp++ = ((u_int16_t *) enaddr)[2]; 2016 } 2017 ifp->if_flags &= ~IFF_ALLMULTI; 2018 goto setit; 2019 2020 hashperfect: 2021 /* 2022 * Try Hash-Perfect mode. 2023 */ 2024 2025 /* 2026 * Some 21140 chips have broken Hash-Perfect modes. On these 2027 * chips, we simply use Hash-Only mode, and put our station 2028 * address into the filter. 2029 */ 2030 if (sc->sc_chip == TULIP_CHIP_21140) 2031 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2032 else 2033 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2034 sp = TULIP_CDSP(sc); 2035 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2036 ETHER_FIRST_MULTI(step, ec, enm); 2037 while (enm != NULL) { 2038 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2039 /* 2040 * We must listen to a range of multicast addresses. 2041 * For now, just accept all multicasts, rather than 2042 * trying to set only those filter bits needed to match 2043 * the range. (At this time, the only use of address 2044 * ranges is for IP multicast routing, for which the 2045 * range is big enough to require all bits set.) 2046 */ 2047 goto allmulti; 2048 } 2049 hash = tlp_mchash(enm->enm_addrlo); 2050 sp[hash >> 4] |= 1 << (hash & 0xf); 2051 ETHER_NEXT_MULTI(step, enm); 2052 } 2053 2054 if (ifp->if_flags & IFF_BROADCAST) { 2055 /* ...and the broadcast address. */ 2056 hash = tlp_mchash(etherbroadcastaddr); 2057 sp[hash >> 4] |= 1 << (hash & 0xf); 2058 } 2059 2060 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2061 /* ...and our station address. */ 2062 hash = tlp_mchash(enaddr); 2063 sp[hash >> 4] |= 1 << (hash & 0xf); 2064 } else { 2065 /* 2066 * Hash-Perfect mode; put our station address after 2067 * the hash table. 2068 */ 2069 sp[39] = ((u_int16_t *) enaddr)[0]; 2070 sp[40] = ((u_int16_t *) enaddr)[1]; 2071 sp[41] = ((u_int16_t *) enaddr)[2]; 2072 } 2073 ifp->if_flags &= ~IFF_ALLMULTI; 2074 goto setit; 2075 2076 allmulti: 2077 /* 2078 * Use Perfect filter mode. First address is the broadcast address, 2079 * and pad the rest with our station address. We'll set Pass-all- 2080 * multicast in OPMODE below. 2081 */ 2082 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2083 sp = TULIP_CDSP(sc); 2084 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2085 cnt = 0; 2086 if (ifp->if_flags & IFF_BROADCAST) { 2087 cnt++; 2088 *sp++ = 0xffff; 2089 *sp++ = 0xffff; 2090 *sp++ = 0xffff; 2091 } 2092 for (; cnt < TULIP_MAXADDRS; cnt++) { 2093 *sp++ = ((u_int16_t *) enaddr)[0]; 2094 *sp++ = ((u_int16_t *) enaddr)[1]; 2095 *sp++ = ((u_int16_t *) enaddr)[2]; 2096 } 2097 ifp->if_flags |= IFF_ALLMULTI; 2098 2099 setit: 2100 if (ifp->if_flags & IFF_ALLMULTI) 2101 sc->sc_opmode |= OPMODE_PM; 2102 2103 /* Sync the setup packet buffer. */ 2104 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2105 2106 /* 2107 * Fill in the setup packet descriptor. 2108 */ 2109 sc->sc_setup_desc.td_bufaddr1 = TULIP_CDSPADDR(sc); 2110 sc->sc_setup_desc.td_bufaddr2 = TULIP_CDTXADDR(sc, sc->sc_txnext); 2111 sc->sc_setup_desc.td_ctl = 2112 (TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2113 sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS | 2114 TDCTL_Tx_IC | TDCTL_CH; 2115 sc->sc_setup_desc.td_status = TDSTAT_OWN; 2116 TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2117 2118 /* 2119 * Write the address of the setup descriptor. This also has 2120 * the side effect of giving the transmit ring to the chip, 2121 * since the setup descriptor points to the next available 2122 * descriptor in the ring. 2123 */ 2124 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc)); 2125 2126 /* 2127 * Set the OPMODE register. This will also resume the 2128 * transmit transmit process we idled above. 2129 */ 2130 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2131 2132 sc->sc_flags |= TULIPF_DOING_SETUP; 2133 2134 /* 2135 * Kick the transmitter; this will cause the Tulip to 2136 * read the setup descriptor. 2137 */ 2138 /* XXX USE AUTOPOLLING? */ 2139 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2140 2141 /* Set up a watchdog timer in case the chip flakes out. */ 2142 ifp->if_timer = 5; 2143 2144 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2145 } 2146 2147 /* 2148 * tlp_winb_filter_setup: 2149 * 2150 * Set the Winbond 89C840F's receive filter. 2151 */ 2152 void 2153 tlp_winb_filter_setup(sc) 2154 struct tulip_softc *sc; 2155 { 2156 struct ethercom *ec = &sc->sc_ethercom; 2157 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2158 struct ether_multi *enm; 2159 struct ether_multistep step; 2160 u_int32_t hash, mchash[2]; 2161 2162 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2163 sc->sc_dev.dv_xname, sc->sc_flags)); 2164 2165 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2166 2167 if (ifp->if_flags & IFF_MULTICAST) 2168 sc->sc_opmode |= OPMODE_WINB_AMP; 2169 2170 if (ifp->if_flags & IFF_BROADCAST) 2171 sc->sc_opmode |= OPMODE_WINB_ABP; 2172 2173 if (ifp->if_flags & IFF_PROMISC) { 2174 sc->sc_opmode |= OPMODE_WINB_APP; 2175 goto allmulti; 2176 } 2177 2178 mchash[0] = mchash[1] = 0; 2179 2180 ETHER_FIRST_MULTI(step, ec, enm); 2181 while (enm != NULL) { 2182 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2183 /* 2184 * We must listen to a range of multicast addresses. 2185 * For now, just accept all multicasts, rather than 2186 * trying to set only those filter bits needed to match 2187 * the range. (At this time, the only use of address 2188 * ranges is for IP multicast routing, for which the 2189 * range is big enough to require all bits set.) 2190 */ 2191 goto allmulti; 2192 } 2193 2194 /* 2195 * According to the FreeBSD `wb' driver, yes, you 2196 * really do invert the hash. 2197 */ 2198 hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2199 & 0x3f; 2200 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2201 ETHER_NEXT_MULTI(step, enm); 2202 } 2203 ifp->if_flags &= ~IFF_ALLMULTI; 2204 goto setit; 2205 2206 allmulti: 2207 ifp->if_flags |= IFF_ALLMULTI; 2208 mchash[0] = mchash[1] = 0xffffffff; 2209 2210 setit: 2211 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2212 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2213 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2214 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2215 sc->sc_dev.dv_xname)); 2216 } 2217 2218 /* 2219 * tlp_idle: 2220 * 2221 * Cause the transmit and/or receive processes to go idle. 2222 */ 2223 void 2224 tlp_idle(sc, bits) 2225 struct tulip_softc *sc; 2226 u_int32_t bits; 2227 { 2228 static const char *tx_state_names[] = { 2229 "STOPPED", 2230 "RUNNING - FETCH", 2231 "RUNNING - WAIT", 2232 "RUNNING - READING", 2233 "-- RESERVED --", 2234 "RUNNING - SETUP", 2235 "SUSPENDED", 2236 "RUNNING - CLOSE", 2237 }; 2238 static const char *rx_state_names[] = { 2239 "STOPPED", 2240 "RUNNING - FETCH", 2241 "RUNNING - CHECK", 2242 "RUNNING - WAIT", 2243 "SUSPENDED", 2244 "RUNNING - CLOSE", 2245 "RUNNING - FLUSH", 2246 "RUNNING - QUEUE", 2247 }; 2248 u_int32_t csr, ackmask = 0; 2249 int i; 2250 2251 if (bits & OPMODE_ST) 2252 ackmask |= STATUS_TPS; 2253 2254 if (bits & OPMODE_SR) 2255 ackmask |= STATUS_RPS; 2256 2257 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2258 2259 for (i = 0; i < 1000; i++) { 2260 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2261 break; 2262 delay(10); 2263 } 2264 2265 csr = TULIP_READ(sc, CSR_STATUS); 2266 if ((csr & ackmask) != ackmask) { 2267 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2268 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2269 printf("%s: transmit process failed to idle: " 2270 "state %s\n", sc->sc_dev.dv_xname, 2271 tx_state_names[(csr & STATUS_TS) >> 20]); 2272 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2273 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2274 printf("%s: receive process failed to idle: " 2275 "state %s\n", sc->sc_dev.dv_xname, 2276 rx_state_names[(csr & STATUS_RS) >> 17]); 2277 } 2278 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2279 } 2280 2281 /***************************************************************************** 2282 * Generic media support functions. 2283 *****************************************************************************/ 2284 2285 /* 2286 * tlp_mediastatus: [ifmedia interface function] 2287 * 2288 * Query the current media. 2289 */ 2290 void 2291 tlp_mediastatus(ifp, ifmr) 2292 struct ifnet *ifp; 2293 struct ifmediareq *ifmr; 2294 { 2295 struct tulip_softc *sc = ifp->if_softc; 2296 2297 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2298 } 2299 2300 /* 2301 * tlp_mediachange: [ifmedia interface function] 2302 * 2303 * Update the current media. 2304 */ 2305 int 2306 tlp_mediachange(ifp) 2307 struct ifnet *ifp; 2308 { 2309 struct tulip_softc *sc = ifp->if_softc; 2310 2311 return ((*sc->sc_mediasw->tmsw_set)(sc)); 2312 } 2313 2314 /***************************************************************************** 2315 * Support functions for MII-attached media. 2316 *****************************************************************************/ 2317 2318 /* 2319 * tlp_mii_tick: 2320 * 2321 * One second timer, used to tick the MII. 2322 */ 2323 void 2324 tlp_mii_tick(arg) 2325 void *arg; 2326 { 2327 struct tulip_softc *sc = arg; 2328 int s; 2329 2330 s = splnet(); 2331 mii_tick(&sc->sc_mii); 2332 splx(s); 2333 2334 timeout(sc->sc_tick, sc, hz); 2335 } 2336 2337 /* 2338 * tlp_mii_statchg: [mii interface function] 2339 * 2340 * Callback from PHY when media changes. 2341 */ 2342 void 2343 tlp_mii_statchg(self) 2344 struct device *self; 2345 { 2346 struct tulip_softc *sc = (struct tulip_softc *)self; 2347 2348 /* Idle the transmit and receive processes. */ 2349 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2350 2351 /* 2352 * XXX What about Heartbeat Disable? Is it magically frobbed 2353 * XXX by the PHY? I hope so... 2354 */ 2355 2356 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 2357 2358 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 2359 sc->sc_opmode |= OPMODE_TTM; 2360 2361 if (sc->sc_mii.mii_media_active & IFM_FDX) 2362 sc->sc_opmode |= OPMODE_FD; 2363 2364 /* 2365 * Write new OPMODE bits. This also restarts the transmit 2366 * and receive processes. 2367 */ 2368 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2369 2370 /* XXX Update ifp->if_baudrate */ 2371 } 2372 2373 /* 2374 * tlp_winb_mii_statchg: [mii interface function] 2375 * 2376 * Callback from PHY when media changes. This version is 2377 * for the Winbond 89C840F, which has different OPMODE bits. 2378 */ 2379 void 2380 tlp_winb_mii_statchg(self) 2381 struct device *self; 2382 { 2383 struct tulip_softc *sc = (struct tulip_softc *)self; 2384 2385 /* Idle the transmit and receive processes. */ 2386 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2387 2388 /* 2389 * XXX What about Heartbeat Disable? Is it magically frobbed 2390 * XXX by the PHY? I hope so... 2391 */ 2392 2393 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 2394 2395 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 2396 sc->sc_opmode |= OPMODE_WINB_FES; 2397 2398 if (sc->sc_mii.mii_media_active & IFM_FDX) 2399 sc->sc_opmode |= OPMODE_FD; 2400 2401 /* 2402 * Write new OPMODE bits. This also restarts the transmit 2403 * and receive processes. 2404 */ 2405 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2406 2407 /* XXX Update ifp->if_baudrate */ 2408 } 2409 2410 /* 2411 * tlp_mii_getmedia: 2412 * 2413 * Callback from ifmedia to request current media status. 2414 */ 2415 void 2416 tlp_mii_getmedia(sc, ifmr) 2417 struct tulip_softc *sc; 2418 struct ifmediareq *ifmr; 2419 { 2420 2421 mii_pollstat(&sc->sc_mii); 2422 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2423 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2424 } 2425 2426 /* 2427 * tlp_mii_setmedia: 2428 * 2429 * Callback from ifmedia to request new media setting. 2430 */ 2431 int 2432 tlp_mii_setmedia(sc) 2433 struct tulip_softc *sc; 2434 { 2435 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2436 2437 if (ifp->if_flags & IFF_UP) 2438 mii_mediachg(&sc->sc_mii); 2439 return (0); 2440 } 2441 2442 #define MII_EMIT(sc, x) \ 2443 do { \ 2444 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2445 delay(1); \ 2446 } while (0) 2447 2448 /* 2449 * tlp_sio_mii_sync: 2450 * 2451 * Synchronize the SIO-attached MII. 2452 */ 2453 void 2454 tlp_sio_mii_sync(sc) 2455 struct tulip_softc *sc; 2456 { 2457 u_int32_t miirom; 2458 int i; 2459 2460 miirom = MIIROM_MIIDIR|MIIROM_MDO; 2461 2462 MII_EMIT(sc, miirom); 2463 for (i = 0; i < 32; i++) { 2464 MII_EMIT(sc, miirom | MIIROM_MDC); 2465 MII_EMIT(sc, miirom); 2466 } 2467 } 2468 2469 /* 2470 * tlp_sio_mii_sendbits: 2471 * 2472 * Send a series of bits out the SIO to the MII. 2473 */ 2474 void 2475 tlp_sio_mii_sendbits(sc, data, nbits) 2476 struct tulip_softc *sc; 2477 u_int32_t data; 2478 int nbits; 2479 { 2480 u_int32_t miirom, i; 2481 2482 miirom = MIIROM_MIIDIR; 2483 MII_EMIT(sc, miirom); 2484 2485 for (i = 1 << (nbits - 1); i != 0; i >>= 1) { 2486 if (data & i) 2487 miirom |= MIIROM_MDO; 2488 else 2489 miirom &= ~MIIROM_MDO; 2490 MII_EMIT(sc, miirom); 2491 MII_EMIT(sc, miirom|MIIROM_MDC); 2492 MII_EMIT(sc, miirom); 2493 } 2494 } 2495 2496 /* 2497 * tlp_sio_mii_readreg: 2498 * 2499 * Read a PHY register via SIO-attached MII. 2500 */ 2501 int 2502 tlp_sio_mii_readreg(self, phy, reg) 2503 struct device *self; 2504 int phy, reg; 2505 { 2506 struct tulip_softc *sc = (void *) self; 2507 int val = 0, err = 0, i; 2508 2509 tlp_sio_mii_sync(sc); 2510 2511 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2512 tlp_sio_mii_sendbits(sc, MII_COMMAND_READ, 2); 2513 tlp_sio_mii_sendbits(sc, phy, 5); 2514 tlp_sio_mii_sendbits(sc, reg, 5); 2515 2516 MII_EMIT(sc, MIIROM_MIIDIR); 2517 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2518 2519 MII_EMIT(sc, 0); 2520 MII_EMIT(sc, MIIROM_MDC); 2521 2522 err = TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI); 2523 2524 MII_EMIT(sc, 0); 2525 MII_EMIT(sc, MIIROM_MDC); 2526 2527 for (i = 0; i < 16; i++) { 2528 val <<= 1; 2529 MII_EMIT(sc, 0); 2530 if (err == 0 && TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI)) 2531 val |= 1; 2532 MII_EMIT(sc, MIIROM_MDC); 2533 } 2534 2535 MII_EMIT(sc, 0); 2536 2537 return (err ? 0 : val); 2538 } 2539 2540 /* 2541 * tlp_sio_mii_writereg: 2542 * 2543 * Write a PHY register via SIO-attached MII. 2544 */ 2545 void 2546 tlp_sio_mii_writereg(self, phy, reg, val) 2547 struct device *self; 2548 int phy, reg, val; 2549 { 2550 struct tulip_softc *sc = (void *) self; 2551 2552 tlp_sio_mii_sync(sc); 2553 2554 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2555 tlp_sio_mii_sendbits(sc, MII_COMMAND_WRITE, 2); 2556 tlp_sio_mii_sendbits(sc, phy, 5); 2557 tlp_sio_mii_sendbits(sc, reg, 5); 2558 tlp_sio_mii_sendbits(sc, MII_COMMAND_ACK, 2); 2559 tlp_sio_mii_sendbits(sc, val, 16); 2560 2561 MII_EMIT(sc, 0); 2562 } 2563 2564 #undef MII_EMIT 2565 2566 /* 2567 * tlp_pnic_mii_readreg: 2568 * 2569 * Read a PHY register on the Lite-On PNIC. 2570 */ 2571 int 2572 tlp_pnic_mii_readreg(self, phy, reg) 2573 struct device *self; 2574 int phy, reg; 2575 { 2576 struct tulip_softc *sc = (void *) self; 2577 u_int32_t val; 2578 int i; 2579 2580 TULIP_WRITE(sc, CSR_PNIC_MII, 2581 PNIC_MII_MBO | PNIC_MII_RESERVED | 2582 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 2583 (reg << PNIC_MII_REGSHIFT)); 2584 2585 for (i = 0; i < 1000; i++) { 2586 delay(10); 2587 val = TULIP_READ(sc, CSR_PNIC_MII); 2588 if ((val & PNIC_MII_BUSY) == 0) { 2589 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 2590 return (0); 2591 else 2592 return (val & PNIC_MII_DATA); 2593 } 2594 } 2595 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 2596 return (0); 2597 } 2598 2599 /* 2600 * tlp_pnic_mii_writereg: 2601 * 2602 * Write a PHY register on the Lite-On PNIC. 2603 */ 2604 void 2605 tlp_pnic_mii_writereg(self, phy, reg, val) 2606 struct device *self; 2607 int phy, reg, val; 2608 { 2609 struct tulip_softc *sc = (void *) self; 2610 int i; 2611 2612 TULIP_WRITE(sc, CSR_PNIC_MII, 2613 PNIC_MII_MBO | PNIC_MII_RESERVED | 2614 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 2615 (reg << PNIC_MII_REGSHIFT) | val); 2616 2617 for (i = 0; i < 1000; i++) { 2618 delay(10); 2619 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 2620 return; 2621 } 2622 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 2623 } 2624 2625 /***************************************************************************** 2626 * Chip/board-specific media switches. The ones here are ones that 2627 * are potentially common to multiple front-ends. 2628 *****************************************************************************/ 2629 2630 /* 2631 * 21040 and 21041 media switches. 2632 */ 2633 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 2634 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 2635 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 2636 void tlp_21040_21041_tmsw_get __P((struct tulip_softc *, 2637 struct ifmediareq *)); 2638 int tlp_21040_21041_tmsw_set __P((struct tulip_softc *)); 2639 2640 const struct tulip_mediasw tlp_21040_mediasw = { 2641 tlp_21040_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2642 }; 2643 2644 const struct tulip_mediasw tlp_21040_tp_mediasw = { 2645 tlp_21040_tp_tmsw_init, tlp_21040_21041_tmsw_get, 2646 tlp_21040_21041_tmsw_set 2647 }; 2648 2649 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 2650 tlp_21040_auibnc_tmsw_init, tlp_21040_21041_tmsw_get, 2651 tlp_21040_21041_tmsw_set 2652 }; 2653 2654 #define ADD(m, t) ifmedia_add(&sc->sc_mii.mii_media, (m), 0, (t)) 2655 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 2656 2657 void 2658 tlp_21040_tmsw_init(sc) 2659 struct tulip_softc *sc; 2660 { 2661 struct tulip_21040_21041_sia_media *tsm; 2662 const char *sep = ""; 2663 2664 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2665 tlp_mediastatus); 2666 2667 printf("%s: ", sc->sc_dev.dv_xname); 2668 2669 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2670 M_WAITOK); 2671 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2672 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2673 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2674 ADD(IFM_ETHER|IFM_10_T, tsm); 2675 PRINT("10baseT"); 2676 2677 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2678 M_WAITOK); 2679 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2680 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2681 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2682 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2683 PRINT("10baseT-FDX"); 2684 2685 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2686 M_WAITOK); 2687 tsm->tsm_siaconn = SIACONN_21040_AUI; 2688 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2689 tsm->tsm_siagen = SIAGEN_21040_AUI; 2690 ADD(IFM_ETHER|IFM_10_5, tsm); 2691 PRINT("10base5"); 2692 2693 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2694 M_WAITOK); 2695 tsm->tsm_siaconn = SIACONN_21040_EXTSIA; 2696 tsm->tsm_siatxrx = SIATXRX_21040_EXTSIA; 2697 tsm->tsm_siagen = SIAGEN_21040_EXTSIA; 2698 ADD(IFM_ETHER|IFM_MANUAL, tsm); 2699 PRINT("manual"); 2700 2701 /* 2702 * XXX Autosense not yet supported. 2703 */ 2704 2705 /* XXX This should be auto-sense. */ 2706 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2707 printf(", default 10baseT"); 2708 2709 printf("\n"); 2710 } 2711 2712 void 2713 tlp_21040_tp_tmsw_init(sc) 2714 struct tulip_softc *sc; 2715 { 2716 struct tulip_21040_21041_sia_media *tsm; 2717 const char *sep = ""; 2718 2719 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2720 tlp_mediastatus); 2721 2722 printf("%s: ", sc->sc_dev.dv_xname); 2723 2724 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2725 M_WAITOK); 2726 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2727 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2728 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2729 ADD(IFM_ETHER|IFM_10_T, tsm); 2730 PRINT("10baseT"); 2731 2732 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2733 M_WAITOK); 2734 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2735 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2736 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2737 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2738 PRINT("10baseT-FDX"); 2739 2740 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2741 printf(", default 10baseT"); 2742 2743 printf("\n"); 2744 } 2745 2746 void 2747 tlp_21040_auibnc_tmsw_init(sc) 2748 struct tulip_softc *sc; 2749 { 2750 struct tulip_21040_21041_sia_media *tsm; 2751 const char *sep = ""; 2752 2753 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2754 tlp_mediastatus); 2755 2756 printf("%s: ", sc->sc_dev.dv_xname); 2757 2758 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2759 M_WAITOK); 2760 tsm->tsm_siaconn = SIACONN_21040_AUI; 2761 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2762 tsm->tsm_siagen = SIAGEN_21040_AUI; 2763 ADD(IFM_ETHER|IFM_10_5, tsm); 2764 PRINT("10base5"); 2765 2766 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 2767 2768 printf("\n"); 2769 } 2770 2771 #undef ADD 2772 #undef PRINT 2773 2774 void 2775 tlp_21040_21041_tmsw_get(sc, ifmr) 2776 struct tulip_softc *sc; 2777 struct ifmediareq *ifmr; 2778 { 2779 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2780 2781 ifmr->ifm_status = 0; 2782 2783 switch (IFM_SUBTYPE(ife->ifm_media)) { 2784 case IFM_AUTO: 2785 /* 2786 * XXX Implement autosensing case. 2787 */ 2788 break; 2789 2790 case IFM_10_T: 2791 /* 2792 * We're able to detect link directly on twisted pair. 2793 */ 2794 ifmr->ifm_status = IFM_AVALID; 2795 if (TULIP_ISSET(sc, CSR_SIASTAT, SIASTAT_LKF) == 0) 2796 ifmr->ifm_status |= IFM_ACTIVE; 2797 /* FALLTHROUGH */ 2798 default: 2799 /* 2800 * If not autosensing, active media is the currently 2801 * selected media. 2802 */ 2803 ifmr->ifm_active = ife->ifm_media; 2804 } 2805 } 2806 2807 int 2808 tlp_21040_21041_tmsw_set(sc) 2809 struct tulip_softc *sc; 2810 { 2811 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2812 struct tulip_21040_21041_sia_media *tsm; 2813 2814 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 2815 /* 2816 * If not autosensing, just pull the SIA settings out 2817 * of the media entry. 2818 */ 2819 tsm = ife->ifm_aux; 2820 TULIP_WRITE(sc, CSR_SIACONN, SIACONN_SRL); 2821 TULIP_WRITE(sc, CSR_SIATXRX, tsm->tsm_siatxrx); 2822 TULIP_WRITE(sc, CSR_SIAGEN, tsm->tsm_siagen); 2823 TULIP_WRITE(sc, CSR_SIACONN, tsm->tsm_siaconn); 2824 2825 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2826 sc->sc_opmode &= ~OPMODE_FD; 2827 if (ife->ifm_media & IFM_FDX) 2828 sc->sc_opmode |= OPMODE_FD; 2829 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2830 } else { 2831 /* 2832 * XXX Implement autosensing case. 2833 */ 2834 } 2835 2836 return (0); 2837 } 2838 2839 /* 2840 * MII-on-SIO media switch. Handles only MII attached to the SIO. 2841 */ 2842 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 2843 2844 const struct tulip_mediasw tlp_sio_mii_mediasw = { 2845 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 2846 }; 2847 2848 void 2849 tlp_sio_mii_tmsw_init(sc) 2850 struct tulip_softc *sc; 2851 { 2852 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2853 2854 sc->sc_mii.mii_ifp = ifp; 2855 sc->sc_mii.mii_readreg = tlp_sio_mii_readreg; 2856 sc->sc_mii.mii_writereg = tlp_sio_mii_writereg; 2857 sc->sc_mii.mii_statchg = sc->sc_statchg; 2858 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2859 tlp_mediastatus); 2860 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 2861 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 2862 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 2863 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 2864 } else { 2865 sc->sc_flags |= TULIPF_HAS_MII; 2866 sc->sc_tick = tlp_mii_tick; 2867 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2868 } 2869 } 2870 2871 /* 2872 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 2873 */ 2874 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 2875 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 2876 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 2877 2878 const struct tulip_mediasw tlp_pnic_mediasw = { 2879 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 2880 }; 2881 2882 void tlp_pnic_nway_statchg __P((struct device *)); 2883 void tlp_pnic_nway_tick __P((void *)); 2884 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 2885 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 2886 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 2887 void tlp_pnic_nway_auto_timeout __P((void *)); 2888 void tlp_pnic_nway_status __P((struct tulip_softc *)); 2889 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 2890 2891 void 2892 tlp_pnic_tmsw_init(sc) 2893 struct tulip_softc *sc; 2894 { 2895 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2896 const char *sep = ""; 2897 2898 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 2899 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 2900 2901 sc->sc_mii.mii_ifp = ifp; 2902 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 2903 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 2904 sc->sc_mii.mii_statchg = sc->sc_statchg; 2905 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2906 tlp_mediastatus); 2907 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 2908 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 2909 /* XXX What about AUI/BNC support? */ 2910 printf("%s: ", sc->sc_dev.dv_xname); 2911 2912 tlp_pnic_nway_reset(sc); 2913 2914 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 2915 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 2916 PRINT("10baseT"); 2917 2918 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 2919 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 2920 PRINT("10baseT-FDX"); 2921 2922 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 2923 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 2924 PRINT("100baseTX"); 2925 2926 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 2927 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 2928 PNIC_NWAY_CAP100TXFDX); 2929 PRINT("100baseTX-FDX"); 2930 2931 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 2932 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 2933 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 2934 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 2935 PRINT("auto"); 2936 2937 printf("\n"); 2938 2939 sc->sc_statchg = tlp_pnic_nway_statchg; 2940 sc->sc_tick = tlp_pnic_nway_tick; 2941 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2942 } else { 2943 sc->sc_flags |= TULIPF_HAS_MII; 2944 sc->sc_tick = tlp_mii_tick; 2945 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2946 } 2947 2948 #undef ADD 2949 #undef PRINT 2950 } 2951 2952 void 2953 tlp_pnic_tmsw_get(sc, ifmr) 2954 struct tulip_softc *sc; 2955 struct ifmediareq *ifmr; 2956 { 2957 struct mii_data *mii = &sc->sc_mii; 2958 2959 if (sc->sc_flags & TULIPF_HAS_MII) 2960 tlp_mii_getmedia(sc, ifmr); 2961 else { 2962 mii->mii_media_status = 0; 2963 mii->mii_media_active = IFM_NONE; 2964 tlp_pnic_nway_service(sc, MII_POLLSTAT); 2965 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2966 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2967 } 2968 } 2969 2970 int 2971 tlp_pnic_tmsw_set(sc) 2972 struct tulip_softc *sc; 2973 { 2974 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2975 struct mii_data *mii = &sc->sc_mii; 2976 2977 if (sc->sc_flags & TULIPF_HAS_MII) 2978 return (tlp_mii_setmedia(sc)); 2979 2980 if (ifp->if_flags & IFF_UP) { 2981 mii->mii_media_status = 0; 2982 mii->mii_media_active = IFM_NONE; 2983 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 2984 } 2985 2986 return (0); 2987 } 2988 2989 void 2990 tlp_pnic_nway_statchg(self) 2991 struct device *self; 2992 { 2993 struct tulip_softc *sc = (struct tulip_softc *)self; 2994 2995 /* Idle the transmit and receive processes. */ 2996 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2997 2998 /* 2999 * XXX What about Heartbeat Disable? Is it magically frobbed 3000 * XXX by the PHY? I hope so... 3001 */ 3002 3003 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 3004 OPMODE_SCR); 3005 3006 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 3007 sc->sc_opmode |= OPMODE_TTM; 3008 TULIP_WRITE(sc, CSR_GPP, 3009 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 3010 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3011 } else { 3012 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR; 3013 TULIP_WRITE(sc, CSR_GPP, 3014 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 3015 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3016 } 3017 3018 if (sc->sc_mii.mii_media_active & IFM_FDX) 3019 sc->sc_opmode |= OPMODE_FD; 3020 3021 /* 3022 * Write new OPMODE bits. This also restarts the transmit 3023 * and receive processes. 3024 */ 3025 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3026 3027 /* XXX Update ifp->if_baudrate */ 3028 } 3029 3030 void 3031 tlp_pnic_nway_tick(arg) 3032 void *arg; 3033 { 3034 struct tulip_softc *sc = arg; 3035 int s; 3036 3037 s = splnet(); 3038 tlp_pnic_nway_service(sc, MII_TICK); 3039 splx(s); 3040 3041 timeout(tlp_pnic_nway_tick, sc, hz); 3042 } 3043 3044 /* 3045 * Support for the Lite-On PNIC internal NWay block. This is constructed 3046 * somewhat like a PHY driver for simplicity. 3047 */ 3048 3049 int 3050 tlp_pnic_nway_service(sc, cmd) 3051 struct tulip_softc *sc; 3052 int cmd; 3053 { 3054 struct mii_data *mii = &sc->sc_mii; 3055 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3056 3057 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 3058 return (0); 3059 3060 switch (cmd) { 3061 case MII_POLLSTAT: 3062 /* Nothing special to do here. */ 3063 break; 3064 3065 case MII_MEDIACHG: 3066 switch (IFM_SUBTYPE(ife->ifm_media)) { 3067 case IFM_AUTO: 3068 (void) tlp_pnic_nway_auto(sc, 1); 3069 break; 3070 case IFM_100_T4: 3071 /* 3072 * XXX Not supported as a manual setting right now. 3073 */ 3074 return (EINVAL); 3075 default: 3076 /* 3077 * NWAY register data is stored in the ifmedia entry. 3078 */ 3079 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3080 } 3081 break; 3082 3083 case MII_TICK: 3084 /* 3085 * Only used for autonegotiation. 3086 */ 3087 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3088 return (0); 3089 3090 /* 3091 * Check to see if we have link. If we do, we don't 3092 * need to restart the autonegotiation process. 3093 */ 3094 if (sc->sc_flags & TULIPF_LINK_UP) 3095 return (0); 3096 3097 /* 3098 * Only retry autonegotiation every 5 seconds. 3099 */ 3100 if (++sc->sc_nway_ticks != 5) 3101 return (0); 3102 3103 sc->sc_nway_ticks = 0; 3104 tlp_pnic_nway_reset(sc); 3105 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 3106 return (0); 3107 break; 3108 } 3109 3110 /* Update the media status. */ 3111 tlp_pnic_nway_status(sc); 3112 3113 /* Callback if something changed. */ 3114 if (sc->sc_nway_active != mii->mii_media_active || 3115 cmd == MII_MEDIACHG) { 3116 (*sc->sc_statchg)(&sc->sc_dev); 3117 sc->sc_nway_active = mii->mii_media_active; 3118 } 3119 return (0); 3120 } 3121 3122 void 3123 tlp_pnic_nway_reset(sc) 3124 struct tulip_softc *sc; 3125 { 3126 3127 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 3128 delay(100); 3129 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 3130 } 3131 3132 int 3133 tlp_pnic_nway_auto(sc, waitfor) 3134 struct tulip_softc *sc; 3135 int waitfor; 3136 { 3137 struct mii_data *mii = &sc->sc_mii; 3138 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3139 u_int32_t reg; 3140 int i; 3141 3142 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 3143 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3144 3145 if (waitfor) { 3146 /* Wait 500ms for it to complete. */ 3147 for (i = 0; i < 500; i++) { 3148 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3149 if (reg & PNIC_NWAY_LPAR_MASK) { 3150 tlp_pnic_nway_acomp(sc); 3151 return (0); 3152 } 3153 delay(1000); 3154 } 3155 #if 0 3156 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3157 printf("%s: autonegotiation failed to complete\n", 3158 sc->sc_dev.dv_xname); 3159 #endif 3160 3161 /* 3162 * Don't need to worry about clearing DOINGAUTO. 3163 * If that's set, a timeout is pending, and it will 3164 * clear the flag. 3165 */ 3166 return (EIO); 3167 } 3168 3169 /* 3170 * Just let it finish asynchronously. This is for the benefit of 3171 * the tick handler driving autonegotiation. Don't want 500ms 3172 * delays all the time while the system is running! 3173 */ 3174 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 3175 sc->sc_flags |= TULIPF_DOINGAUTO; 3176 timeout(tlp_pnic_nway_auto_timeout, sc, hz >> 1); 3177 } 3178 return (EJUSTRETURN); 3179 } 3180 3181 void 3182 tlp_pnic_nway_auto_timeout(arg) 3183 void *arg; 3184 { 3185 struct tulip_softc *sc = arg; 3186 u_int32_t reg; 3187 int s; 3188 3189 s = splnet(); 3190 sc->sc_flags &= ~TULIPF_DOINGAUTO; 3191 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3192 #if 0 3193 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3194 printf("%s: autonegotiation failed to complete\n", 3195 sc->sc_dev.dv_xname); 3196 #endif 3197 3198 tlp_pnic_nway_acomp(sc); 3199 3200 /* Update the media status. */ 3201 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 3202 splx(s); 3203 } 3204 3205 void 3206 tlp_pnic_nway_status(sc) 3207 struct tulip_softc *sc; 3208 { 3209 struct mii_data *mii = &sc->sc_mii; 3210 u_int32_t reg; 3211 3212 mii->mii_media_status = IFM_AVALID; 3213 mii->mii_media_active = IFM_ETHER; 3214 3215 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3216 3217 if (sc->sc_flags & TULIPF_LINK_UP) 3218 mii->mii_media_status |= IFM_ACTIVE; 3219 3220 if (reg & PNIC_NWAY_NW) { 3221 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 3222 /* Erg, still trying, I guess... */ 3223 mii->mii_media_active |= IFM_NONE; 3224 return; 3225 } 3226 3227 #if 0 3228 if (reg & PNIC_NWAY_LPAR100T4) 3229 mii->mii_media_active |= IFM_100_T4; 3230 else 3231 #endif 3232 if (reg & PNIC_NWAY_LPAR100TXFDX) 3233 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 3234 else if (reg & PNIC_NWAY_LPAR100TX) 3235 mii->mii_media_active |= IFM_100_TX; 3236 else if (reg & PNIC_NWAY_LPAR10TFDX) 3237 mii->mii_media_active |= IFM_10_T|IFM_FDX; 3238 else if (reg & PNIC_NWAY_LPAR10T) 3239 mii->mii_media_active |= IFM_10_T; 3240 else 3241 mii->mii_media_active |= IFM_NONE; 3242 } else { 3243 if (reg & PNIC_NWAY_100) 3244 mii->mii_media_active |= IFM_100_TX; 3245 else 3246 mii->mii_media_active |= IFM_10_T; 3247 if (reg & PNIC_NWAY_FD) 3248 mii->mii_media_active |= IFM_FDX; 3249 } 3250 } 3251 3252 void 3253 tlp_pnic_nway_acomp(sc) 3254 struct tulip_softc *sc; 3255 { 3256 u_int32_t reg; 3257 3258 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3259 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 3260 3261 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 3262 reg |= PNIC_NWAY_100; 3263 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 3264 reg |= PNIC_NWAY_FD; 3265 3266 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 3267 } 3268
Indexes created Tue Sep 23 23:09:58 GMT 2025