tulip.c revision 1.102 1 /* $NetBSD: tulip.c,v 1.102 2001/11/22 05:03:04 yamt Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family, and a variety of clone chips.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: tulip.c,v 1.102 2001/11/22 05:03:04 yamt Exp $");
47
48 #include "bpfilter.h"
49
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/callout.h>
53 #include <sys/mbuf.h>
54 #include <sys/malloc.h>
55 #include <sys/kernel.h>
56 #include <sys/socket.h>
57 #include <sys/ioctl.h>
58 #include <sys/errno.h>
59 #include <sys/device.h>
60
61 #include <machine/endian.h>
62
63 #include <uvm/uvm_extern.h>
64
65 #include <net/if.h>
66 #include <net/if_dl.h>
67 #include <net/if_media.h>
68 #include <net/if_ether.h>
69
70 #if NBPFILTER > 0
71 #include <net/bpf.h>
72 #endif
73
74 #include <machine/bus.h>
75 #include <machine/intr.h>
76
77 #include <dev/mii/mii.h>
78 #include <dev/mii/miivar.h>
79 #include <dev/mii/mii_bitbang.h>
80
81 #include <dev/ic/tulipreg.h>
82 #include <dev/ic/tulipvar.h>
83
84 const char * const tlp_chip_names[] = TULIP_CHIP_NAMES;
85
86 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] =
87 TLP_TXTHRESH_TAB_10;
88
89 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] =
90 TLP_TXTHRESH_TAB_10_100;
91
92 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] =
93 TLP_TXTHRESH_TAB_WINB;
94
95 const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] =
96 TLP_TXTHRESH_TAB_DM9102;
97
98 void tlp_start __P((struct ifnet *));
99 void tlp_watchdog __P((struct ifnet *));
100 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t));
101 int tlp_init __P((struct ifnet *));
102 void tlp_stop __P((struct ifnet *, int));
103
104 void tlp_shutdown __P((void *));
105
106 void tlp_reset __P((struct tulip_softc *));
107 void tlp_rxdrain __P((struct tulip_softc *));
108 int tlp_add_rxbuf __P((struct tulip_softc *, int));
109 void tlp_idle __P((struct tulip_softc *, u_int32_t));
110 void tlp_srom_idle __P((struct tulip_softc *));
111 int tlp_srom_size __P((struct tulip_softc *));
112
113 int tlp_enable __P((struct tulip_softc *));
114 void tlp_disable __P((struct tulip_softc *));
115 void tlp_power __P((int, void *));
116
117 void tlp_filter_setup __P((struct tulip_softc *));
118 void tlp_winb_filter_setup __P((struct tulip_softc *));
119 void tlp_al981_filter_setup __P((struct tulip_softc *));
120
121 void tlp_rxintr __P((struct tulip_softc *));
122 void tlp_txintr __P((struct tulip_softc *));
123
124 void tlp_mii_tick __P((void *));
125 void tlp_mii_statchg __P((struct device *));
126 void tlp_winb_mii_statchg __P((struct device *));
127 void tlp_dm9102_mii_statchg __P((struct device *));
128
129 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *));
130 int tlp_mii_setmedia __P((struct tulip_softc *));
131
132 int tlp_bitbang_mii_readreg __P((struct device *, int, int));
133 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int));
134
135 int tlp_pnic_mii_readreg __P((struct device *, int, int));
136 void tlp_pnic_mii_writereg __P((struct device *, int, int, int));
137
138 int tlp_al981_mii_readreg __P((struct device *, int, int));
139 void tlp_al981_mii_writereg __P((struct device *, int, int, int));
140
141 void tlp_2114x_preinit __P((struct tulip_softc *));
142 void tlp_2114x_mii_preinit __P((struct tulip_softc *));
143 void tlp_pnic_preinit __P((struct tulip_softc *));
144 void tlp_dm9102_preinit __P((struct tulip_softc *));
145
146 void tlp_21140_reset __P((struct tulip_softc *));
147 void tlp_21142_reset __P((struct tulip_softc *));
148 void tlp_pmac_reset __P((struct tulip_softc *));
149 void tlp_dm9102_reset __P((struct tulip_softc *));
150
151 #define tlp_mchash(addr, sz) \
152 (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1))
153
154 /*
155 * MII bit-bang glue.
156 */
157 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *));
158 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t));
159
160 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = {
161 tlp_sio_mii_bitbang_read,
162 tlp_sio_mii_bitbang_write,
163 {
164 MIIROM_MDO, /* MII_BIT_MDO */
165 MIIROM_MDI, /* MII_BIT_MDI */
166 MIIROM_MDC, /* MII_BIT_MDC */
167 0, /* MII_BIT_DIR_HOST_PHY */
168 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */
169 }
170 };
171
172 #ifdef TLP_DEBUG
173 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \
174 printf x
175 #else
176 #define DPRINTF(sc, x) /* nothing */
177 #endif
178
179 #ifdef TLP_STATS
180 void tlp_print_stats __P((struct tulip_softc *));
181 #endif
182
183 /*
184 * Can be used to debug the SROM-related things, including contents.
185 * Initialized so that it's patchable.
186 */
187 int tlp_srom_debug = 0;
188
189 /*
190 * tlp_attach:
191 *
192 * Attach a Tulip interface to the system.
193 */
194 void
195 tlp_attach(sc, enaddr)
196 struct tulip_softc *sc;
197 const u_int8_t *enaddr;
198 {
199 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
200 int i, error;
201
202 callout_init(&sc->sc_nway_callout);
203 callout_init(&sc->sc_tick_callout);
204
205 /*
206 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift!
207 */
208
209 /*
210 * Setup the transmit threshold table.
211 */
212 switch (sc->sc_chip) {
213 case TULIP_CHIP_DE425:
214 case TULIP_CHIP_21040:
215 case TULIP_CHIP_21041:
216 sc->sc_txth = tlp_10_txthresh_tab;
217 break;
218
219 case TULIP_CHIP_DM9102:
220 case TULIP_CHIP_DM9102A:
221 sc->sc_txth = tlp_dm9102_txthresh_tab;
222 break;
223
224 default:
225 sc->sc_txth = tlp_10_100_txthresh_tab;
226 break;
227 }
228
229 /*
230 * Setup the filter setup function.
231 */
232 switch (sc->sc_chip) {
233 case TULIP_CHIP_WB89C840F:
234 sc->sc_filter_setup = tlp_winb_filter_setup;
235 break;
236
237 case TULIP_CHIP_AL981:
238 case TULIP_CHIP_AN983:
239 case TULIP_CHIP_AN985:
240 sc->sc_filter_setup = tlp_al981_filter_setup;
241 break;
242
243 default:
244 sc->sc_filter_setup = tlp_filter_setup;
245 break;
246 }
247
248 /*
249 * Set up the media status change function.
250 */
251 switch (sc->sc_chip) {
252 case TULIP_CHIP_WB89C840F:
253 sc->sc_statchg = tlp_winb_mii_statchg;
254 break;
255
256 case TULIP_CHIP_DM9102:
257 case TULIP_CHIP_DM9102A:
258 sc->sc_statchg = tlp_dm9102_mii_statchg;
259 break;
260
261 default:
262 /*
263 * We may override this if we have special media
264 * handling requirements (e.g. flipping GPIO pins).
265 *
266 * The pure-MII statchg function covers the basics.
267 */
268 sc->sc_statchg = tlp_mii_statchg;
269 break;
270 }
271
272 /*
273 * Default to no FS|LS in setup packet descriptors. They're
274 * supposed to be zero according to the 21040 and 21143
275 * manuals, and some chips fall over badly if they're
276 * included. Yet, other chips seem to require them. Sigh.
277 */
278 switch (sc->sc_chip) {
279 case TULIP_CHIP_X3201_3:
280 sc->sc_setup_fsls = TDCTL_Tx_FS|TDCTL_Tx_LS;
281 break;
282
283 default:
284 sc->sc_setup_fsls = 0;
285 }
286
287 /*
288 * Set up various chip-specific quirks.
289 *
290 * Note that wherever we can, we use the "ring" option for
291 * transmit and receive descriptors. This is because some
292 * clone chips apparently have problems when using chaining,
293 * although some *only* support chaining.
294 *
295 * What we do is always program the "next" pointer, and then
296 * conditionally set the TDCTL_CH and TDCTL_ER bits in the
297 * appropriate places.
298 */
299 switch (sc->sc_chip) {
300 case TULIP_CHIP_21140:
301 case TULIP_CHIP_21140A:
302 case TULIP_CHIP_21142:
303 case TULIP_CHIP_21143:
304 case TULIP_CHIP_82C115: /* 21143-like */
305 case TULIP_CHIP_MX98713: /* 21140-like */
306 case TULIP_CHIP_MX98713A: /* 21143-like */
307 case TULIP_CHIP_MX98715: /* 21143-like */
308 case TULIP_CHIP_MX98715A: /* 21143-like */
309 case TULIP_CHIP_MX98715AEC_X: /* 21143-like */
310 case TULIP_CHIP_MX98725: /* 21143-like */
311 /*
312 * Run these chips in ring mode.
313 */
314 sc->sc_tdctl_ch = 0;
315 sc->sc_tdctl_er = TDCTL_ER;
316 sc->sc_preinit = tlp_2114x_preinit;
317 break;
318
319 case TULIP_CHIP_82C168:
320 case TULIP_CHIP_82C169:
321 /*
322 * Run these chips in ring mode.
323 */
324 sc->sc_tdctl_ch = 0;
325 sc->sc_tdctl_er = TDCTL_ER;
326 sc->sc_preinit = tlp_pnic_preinit;
327
328 /*
329 * These chips seem to have busted DMA engines; just put them
330 * in Store-and-Forward mode from the get-go.
331 */
332 sc->sc_txthresh = TXTH_SF;
333 break;
334
335 case TULIP_CHIP_WB89C840F:
336 /*
337 * Run this chip in chained mode.
338 */
339 sc->sc_tdctl_ch = TDCTL_CH;
340 sc->sc_tdctl_er = 0;
341 sc->sc_flags |= TULIPF_IC_FS;
342 break;
343
344 case TULIP_CHIP_DM9102:
345 case TULIP_CHIP_DM9102A:
346 /*
347 * Run these chips in chained mode.
348 */
349 sc->sc_tdctl_ch = TDCTL_CH;
350 sc->sc_tdctl_er = 0;
351 sc->sc_preinit = tlp_dm9102_preinit;
352
353 /*
354 * These chips have a broken bus interface, so we
355 * can't use any optimized bus commands. For this
356 * reason, we tend to underrun pretty quickly, so
357 * just to Store-and-Forward mode from the get-go.
358 */
359 sc->sc_txthresh = TXTH_DM9102_SF;
360 break;
361
362 default:
363 /*
364 * Default to running in ring mode.
365 */
366 sc->sc_tdctl_ch = 0;
367 sc->sc_tdctl_er = TDCTL_ER;
368 }
369
370 /*
371 * Set up the MII bit-bang operations.
372 */
373 switch (sc->sc_chip) {
374 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */
375 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
376 break;
377
378 default:
379 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
380 }
381
382 SIMPLEQ_INIT(&sc->sc_txfreeq);
383 SIMPLEQ_INIT(&sc->sc_txdirtyq);
384
385 /*
386 * Allocate the control data structures, and create and load the
387 * DMA map for it.
388 */
389 if ((error = bus_dmamem_alloc(sc->sc_dmat,
390 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg,
391 1, &sc->sc_cdnseg, 0)) != 0) {
392 printf("%s: unable to allocate control data, error = %d\n",
393 sc->sc_dev.dv_xname, error);
394 goto fail_0;
395 }
396
397 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg,
398 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data,
399 BUS_DMA_COHERENT)) != 0) {
400 printf("%s: unable to map control data, error = %d\n",
401 sc->sc_dev.dv_xname, error);
402 goto fail_1;
403 }
404
405 if ((error = bus_dmamap_create(sc->sc_dmat,
406 sizeof(struct tulip_control_data), 1,
407 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
408 printf("%s: unable to create control data DMA map, "
409 "error = %d\n", sc->sc_dev.dv_xname, error);
410 goto fail_2;
411 }
412
413 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
414 sc->sc_control_data, sizeof(struct tulip_control_data), NULL,
415 0)) != 0) {
416 printf("%s: unable to load control data DMA map, error = %d\n",
417 sc->sc_dev.dv_xname, error);
418 goto fail_3;
419 }
420
421 /*
422 * Create the transmit buffer DMA maps.
423 *
424 * Note that on the Xircom clone, transmit buffers must be
425 * 4-byte aligned. We're almost guaranteed to have to copy
426 * the packet in that case, so we just limit ourselves to
427 * one segment.
428 *
429 * On the DM9102, the transmit logic can only handle one
430 * DMA segment.
431 */
432 switch (sc->sc_chip) {
433 case TULIP_CHIP_X3201_3:
434 case TULIP_CHIP_DM9102:
435 case TULIP_CHIP_DM9102A:
436 sc->sc_ntxsegs = 1;
437 break;
438
439 default:
440 sc->sc_ntxsegs = TULIP_NTXSEGS;
441 }
442 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
443 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
444 sc->sc_ntxsegs, MCLBYTES, 0, 0,
445 &sc->sc_txsoft[i].txs_dmamap)) != 0) {
446 printf("%s: unable to create tx DMA map %d, "
447 "error = %d\n", sc->sc_dev.dv_xname, i, error);
448 goto fail_4;
449 }
450 }
451
452 /*
453 * Create the receive buffer DMA maps.
454 */
455 for (i = 0; i < TULIP_NRXDESC; i++) {
456 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
457 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
458 printf("%s: unable to create rx DMA map %d, "
459 "error = %d\n", sc->sc_dev.dv_xname, i, error);
460 goto fail_5;
461 }
462 sc->sc_rxsoft[i].rxs_mbuf = NULL;
463 }
464
465 /*
466 * From this point forward, the attachment cannot fail. A failure
467 * before this point releases all resources that may have been
468 * allocated.
469 */
470 sc->sc_flags |= TULIPF_ATTACHED;
471
472 /*
473 * Reset the chip to a known state.
474 */
475 tlp_reset(sc);
476
477 /* Announce ourselves. */
478 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname,
479 sc->sc_name[0] != '\0' ? sc->sc_name : "",
480 sc->sc_name[0] != '\0' ? ", " : "",
481 ether_sprintf(enaddr));
482
483 /*
484 * Initialize our media structures. This may probe the MII, if
485 * present.
486 */
487 (*sc->sc_mediasw->tmsw_init)(sc);
488
489 strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
490 ifp->if_softc = sc;
491 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
492 ifp->if_ioctl = tlp_ioctl;
493 ifp->if_start = tlp_start;
494 ifp->if_watchdog = tlp_watchdog;
495 ifp->if_init = tlp_init;
496 ifp->if_stop = tlp_stop;
497 IFQ_SET_READY(&ifp->if_snd);
498
499 /*
500 * We can support 802.1Q VLAN-sized frames.
501 */
502 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
503
504 /*
505 * Attach the interface.
506 */
507 if_attach(ifp);
508 ether_ifattach(ifp, enaddr);
509 #if NRND > 0
510 rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname,
511 RND_TYPE_NET, 0);
512 #endif
513
514 /*
515 * Make sure the interface is shutdown during reboot.
516 */
517 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc);
518 if (sc->sc_sdhook == NULL)
519 printf("%s: WARNING: unable to establish shutdown hook\n",
520 sc->sc_dev.dv_xname);
521
522 /*
523 * Add a suspend hook to make sure we come back up after a
524 * resume.
525 */
526 sc->sc_powerhook = powerhook_establish(tlp_power, sc);
527 if (sc->sc_powerhook == NULL)
528 printf("%s: WARNING: unable to establish power hook\n",
529 sc->sc_dev.dv_xname);
530 return;
531
532 /*
533 * Free any resources we've allocated during the failed attach
534 * attempt. Do this in reverse order and fall through.
535 */
536 fail_5:
537 for (i = 0; i < TULIP_NRXDESC; i++) {
538 if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
539 bus_dmamap_destroy(sc->sc_dmat,
540 sc->sc_rxsoft[i].rxs_dmamap);
541 }
542 fail_4:
543 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
544 if (sc->sc_txsoft[i].txs_dmamap != NULL)
545 bus_dmamap_destroy(sc->sc_dmat,
546 sc->sc_txsoft[i].txs_dmamap);
547 }
548 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
549 fail_3:
550 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
551 fail_2:
552 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
553 sizeof(struct tulip_control_data));
554 fail_1:
555 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg);
556 fail_0:
557 return;
558 }
559
560 /*
561 * tlp_activate:
562 *
563 * Handle device activation/deactivation requests.
564 */
565 int
566 tlp_activate(self, act)
567 struct device *self;
568 enum devact act;
569 {
570 struct tulip_softc *sc = (void *) self;
571 int s, error = 0;
572
573 s = splnet();
574 switch (act) {
575 case DVACT_ACTIVATE:
576 error = EOPNOTSUPP;
577 break;
578
579 case DVACT_DEACTIVATE:
580 if (sc->sc_flags & TULIPF_HAS_MII)
581 mii_activate(&sc->sc_mii, act, MII_PHY_ANY,
582 MII_OFFSET_ANY);
583 if_deactivate(&sc->sc_ethercom.ec_if);
584 break;
585 }
586 splx(s);
587
588 return (error);
589 }
590
591 /*
592 * tlp_detach:
593 *
594 * Detach a Tulip interface.
595 */
596 int
597 tlp_detach(sc)
598 struct tulip_softc *sc;
599 {
600 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
601 struct tulip_rxsoft *rxs;
602 struct tulip_txsoft *txs;
603 int i;
604
605 /*
606 * Succeed now if there isn't any work to do.
607 */
608 if ((sc->sc_flags & TULIPF_ATTACHED) == 0)
609 return (0);
610
611 /* Unhook our tick handler. */
612 if (sc->sc_tick)
613 callout_stop(&sc->sc_tick_callout);
614
615 if (sc->sc_flags & TULIPF_HAS_MII) {
616 /* Detach all PHYs */
617 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
618 }
619
620 /* Delete all remaining media. */
621 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
622
623 #if NRND > 0
624 rnd_detach_source(&sc->sc_rnd_source);
625 #endif
626 ether_ifdetach(ifp);
627 if_detach(ifp);
628
629 for (i = 0; i < TULIP_NRXDESC; i++) {
630 rxs = &sc->sc_rxsoft[i];
631 if (rxs->rxs_mbuf != NULL) {
632 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
633 m_freem(rxs->rxs_mbuf);
634 rxs->rxs_mbuf = NULL;
635 }
636 bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap);
637 }
638 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
639 txs = &sc->sc_txsoft[i];
640 if (txs->txs_mbuf != NULL) {
641 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
642 m_freem(txs->txs_mbuf);
643 txs->txs_mbuf = NULL;
644 }
645 bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap);
646 }
647 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
648 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
649 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
650 sizeof(struct tulip_control_data));
651 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg);
652
653 shutdownhook_disestablish(sc->sc_sdhook);
654 powerhook_disestablish(sc->sc_powerhook);
655
656 if (sc->sc_srom)
657 free(sc->sc_srom, M_DEVBUF);
658
659 return (0);
660 }
661
662 /*
663 * tlp_shutdown:
664 *
665 * Make sure the interface is stopped at reboot time.
666 */
667 void
668 tlp_shutdown(arg)
669 void *arg;
670 {
671 struct tulip_softc *sc = arg;
672
673 tlp_stop(&sc->sc_ethercom.ec_if, 1);
674 }
675
676 /*
677 * tlp_start: [ifnet interface function]
678 *
679 * Start packet transmission on the interface.
680 */
681 void
682 tlp_start(ifp)
683 struct ifnet *ifp;
684 {
685 struct tulip_softc *sc = ifp->if_softc;
686 struct mbuf *m0, *m;
687 struct tulip_txsoft *txs, *last_txs;
688 bus_dmamap_t dmamap;
689 int error, firsttx, nexttx, lasttx, ofree, seg;
690
691 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n",
692 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags));
693
694 /*
695 * If we want a filter setup, it means no more descriptors were
696 * available for the setup routine. Let it get a chance to wedge
697 * itself into the ring.
698 */
699 if (sc->sc_flags & TULIPF_WANT_SETUP)
700 ifp->if_flags |= IFF_OACTIVE;
701
702 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
703 return;
704
705 /*
706 * Remember the previous number of free descriptors and
707 * the first descriptor we'll use.
708 */
709 ofree = sc->sc_txfree;
710 firsttx = sc->sc_txnext;
711
712 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n",
713 sc->sc_dev.dv_xname, ofree, firsttx));
714
715 /*
716 * Loop through the send queue, setting up transmit descriptors
717 * until we drain the queue, or use up all available transmit
718 * descriptors.
719 */
720 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL &&
721 sc->sc_txfree != 0) {
722 /*
723 * Grab a packet off the queue.
724 */
725 IFQ_POLL(&ifp->if_snd, m0);
726 if (m0 == NULL)
727 break;
728 m = NULL;
729
730 dmamap = txs->txs_dmamap;
731
732 /*
733 * Load the DMA map. If this fails, the packet either
734 * didn't fit in the alloted number of segments, or we were
735 * short on resources. In this case, we'll copy and try
736 * again.
737 *
738 * Note that if we're only allowed 1 Tx segment, we
739 * have an alignment restriction. Do this test before
740 * attempting to load the DMA map, because it's more
741 * likely we'll trip the alignment test than the
742 * more-than-one-segment test.
743 */
744 if ((sc->sc_ntxsegs == 1 && (mtod(m0, uintptr_t) & 3) != 0) ||
745 bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
746 BUS_DMA_WRITE|BUS_DMA_NOWAIT) != 0) {
747 MGETHDR(m, M_DONTWAIT, MT_DATA);
748 if (m == NULL) {
749 printf("%s: unable to allocate Tx mbuf\n",
750 sc->sc_dev.dv_xname);
751 break;
752 }
753 if (m0->m_pkthdr.len > MHLEN) {
754 MCLGET(m, M_DONTWAIT);
755 if ((m->m_flags & M_EXT) == 0) {
756 printf("%s: unable to allocate Tx "
757 "cluster\n", sc->sc_dev.dv_xname);
758 m_freem(m);
759 break;
760 }
761 }
762 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
763 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
764 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
765 m, BUS_DMA_WRITE|BUS_DMA_NOWAIT);
766 if (error) {
767 printf("%s: unable to load Tx buffer, "
768 "error = %d\n", sc->sc_dev.dv_xname, error);
769 break;
770 }
771 }
772
773 /*
774 * Ensure we have enough descriptors free to describe
775 * the packet.
776 */
777 if (dmamap->dm_nsegs > sc->sc_txfree) {
778 /*
779 * Not enough free descriptors to transmit this
780 * packet. We haven't committed to anything yet,
781 * so just unload the DMA map, put the packet
782 * back on the queue, and punt. Notify the upper
783 * layer that there are no more slots left.
784 *
785 * XXX We could allocate an mbuf and copy, but
786 * XXX it is worth it?
787 */
788 ifp->if_flags |= IFF_OACTIVE;
789 bus_dmamap_unload(sc->sc_dmat, dmamap);
790 if (m != NULL)
791 m_freem(m);
792 break;
793 }
794
795 IFQ_DEQUEUE(&ifp->if_snd, m0);
796 if (m != NULL) {
797 m_freem(m0);
798 m0 = m;
799 }
800
801 /*
802 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET.
803 */
804
805 /* Sync the DMA map. */
806 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
807 BUS_DMASYNC_PREWRITE);
808
809 /*
810 * Initialize the transmit descriptors.
811 */
812 for (nexttx = sc->sc_txnext, seg = 0;
813 seg < dmamap->dm_nsegs;
814 seg++, nexttx = TULIP_NEXTTX(nexttx)) {
815 /*
816 * If this is the first descriptor we're
817 * enqueueing, don't set the OWN bit just
818 * yet. That could cause a race condition.
819 * We'll do it below.
820 */
821 sc->sc_txdescs[nexttx].td_status =
822 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN);
823 sc->sc_txdescs[nexttx].td_bufaddr1 =
824 htole32(dmamap->dm_segs[seg].ds_addr);
825 sc->sc_txdescs[nexttx].td_ctl =
826 htole32((dmamap->dm_segs[seg].ds_len <<
827 TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch |
828 (nexttx == (TULIP_NTXDESC - 1) ?
829 sc->sc_tdctl_er : 0));
830 lasttx = nexttx;
831 }
832
833 /* Set `first segment' and `last segment' appropriately. */
834 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS);
835 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS);
836
837 #ifdef TLP_DEBUG
838 if (ifp->if_flags & IFF_DEBUG) {
839 printf(" txsoft %p transmit chain:\n", txs);
840 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) {
841 printf(" descriptor %d:\n", seg);
842 printf(" td_status: 0x%08x\n",
843 le32toh(sc->sc_txdescs[seg].td_status));
844 printf(" td_ctl: 0x%08x\n",
845 le32toh(sc->sc_txdescs[seg].td_ctl));
846 printf(" td_bufaddr1: 0x%08x\n",
847 le32toh(sc->sc_txdescs[seg].td_bufaddr1));
848 printf(" td_bufaddr2: 0x%08x\n",
849 le32toh(sc->sc_txdescs[seg].td_bufaddr2));
850 if (seg == lasttx)
851 break;
852 }
853 }
854 #endif
855
856 /* Sync the descriptors we're using. */
857 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
858 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
859
860 /*
861 * Store a pointer to the packet so we can free it later,
862 * and remember what txdirty will be once the packet is
863 * done.
864 */
865 txs->txs_mbuf = m0;
866 txs->txs_firstdesc = sc->sc_txnext;
867 txs->txs_lastdesc = lasttx;
868 txs->txs_ndescs = dmamap->dm_nsegs;
869
870 /* Advance the tx pointer. */
871 sc->sc_txfree -= dmamap->dm_nsegs;
872 sc->sc_txnext = nexttx;
873
874 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q);
875 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
876
877 last_txs = txs;
878
879 #if NBPFILTER > 0
880 /*
881 * Pass the packet to any BPF listeners.
882 */
883 if (ifp->if_bpf)
884 bpf_mtap(ifp->if_bpf, m0);
885 #endif /* NBPFILTER > 0 */
886 }
887
888 if (txs == NULL || sc->sc_txfree == 0) {
889 /* No more slots left; notify upper layer. */
890 ifp->if_flags |= IFF_OACTIVE;
891 }
892
893 if (sc->sc_txfree != ofree) {
894 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n",
895 sc->sc_dev.dv_xname, lasttx, firsttx));
896 /*
897 * Cause a transmit interrupt to happen on the
898 * last packet we enqueued.
899 */
900 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC);
901 TULIP_CDTXSYNC(sc, lasttx, 1,
902 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
903
904 /*
905 * Some clone chips want IC on the *first* segment in
906 * the packet. Appease them.
907 */
908 if ((sc->sc_flags & TULIPF_IC_FS) != 0 &&
909 last_txs->txs_firstdesc != lasttx) {
910 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |=
911 htole32(TDCTL_Tx_IC);
912 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1,
913 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
914 }
915
916 /*
917 * The entire packet chain is set up. Give the
918 * first descriptor to the chip now.
919 */
920 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN);
921 TULIP_CDTXSYNC(sc, firsttx, 1,
922 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
923
924 /* Wake up the transmitter. */
925 /* XXX USE AUTOPOLLING? */
926 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
927
928 /* Set a watchdog timer in case the chip flakes out. */
929 ifp->if_timer = 5;
930 }
931 }
932
933 /*
934 * tlp_watchdog: [ifnet interface function]
935 *
936 * Watchdog timer handler.
937 */
938 void
939 tlp_watchdog(ifp)
940 struct ifnet *ifp;
941 {
942 struct tulip_softc *sc = ifp->if_softc;
943 int doing_setup, doing_transmit;
944
945 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP);
946 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL);
947
948 if (doing_setup && doing_transmit) {
949 printf("%s: filter setup and transmit timeout\n",
950 sc->sc_dev.dv_xname);
951 ifp->if_oerrors++;
952 } else if (doing_transmit) {
953 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname);
954 ifp->if_oerrors++;
955 } else if (doing_setup)
956 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname);
957 else
958 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname);
959
960 (void) tlp_init(ifp);
961
962 /* Try to get more packets going. */
963 tlp_start(ifp);
964 }
965
966 /*
967 * tlp_ioctl: [ifnet interface function]
968 *
969 * Handle control requests from the operator.
970 */
971 int
972 tlp_ioctl(ifp, cmd, data)
973 struct ifnet *ifp;
974 u_long cmd;
975 caddr_t data;
976 {
977 struct tulip_softc *sc = ifp->if_softc;
978 struct ifreq *ifr = (struct ifreq *)data;
979 int s, error;
980
981 s = splnet();
982
983 switch (cmd) {
984 case SIOCSIFMEDIA:
985 case SIOCGIFMEDIA:
986 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
987 break;
988
989 default:
990 error = ether_ioctl(ifp, cmd, data);
991 if (error == ENETRESET) {
992 if (TULIP_IS_ENABLED(sc)) {
993 /*
994 * Multicast list has changed. Set the
995 * hardware filter accordingly.
996 */
997 (*sc->sc_filter_setup)(sc);
998 }
999 error = 0;
1000 }
1001 break;
1002 }
1003
1004 /* Try to get more packets going. */
1005 if (TULIP_IS_ENABLED(sc))
1006 tlp_start(ifp);
1007
1008 splx(s);
1009 return (error);
1010 }
1011
1012 /*
1013 * tlp_intr:
1014 *
1015 * Interrupt service routine.
1016 */
1017 int
1018 tlp_intr(arg)
1019 void *arg;
1020 {
1021 struct tulip_softc *sc = arg;
1022 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1023 u_int32_t status, rxstatus, txstatus;
1024 int handled = 0, txthresh;
1025
1026 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname));
1027
1028 #ifdef DEBUG
1029 if (TULIP_IS_ENABLED(sc) == 0)
1030 panic("%s: tlp_intr: not enabled\n", sc->sc_dev.dv_xname);
1031 #endif
1032
1033 /*
1034 * If the interface isn't running, the interrupt couldn't
1035 * possibly have come from us.
1036 */
1037 if ((ifp->if_flags & IFF_RUNNING) == 0 ||
1038 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1039 return (0);
1040
1041 /* Disable interrupts on the DM9102 (interrupt edge bug). */
1042 switch (sc->sc_chip) {
1043 case TULIP_CHIP_DM9102:
1044 case TULIP_CHIP_DM9102A:
1045 TULIP_WRITE(sc, CSR_INTEN, 0);
1046 break;
1047
1048 default:
1049 /* Nothing. */
1050 break;
1051 }
1052
1053 for (;;) {
1054 status = TULIP_READ(sc, CSR_STATUS);
1055 if (status)
1056 TULIP_WRITE(sc, CSR_STATUS, status);
1057
1058 if ((status & sc->sc_inten) == 0)
1059 break;
1060
1061 handled = 1;
1062
1063 rxstatus = status & sc->sc_rxint_mask;
1064 txstatus = status & sc->sc_txint_mask;
1065
1066 if (rxstatus) {
1067 /* Grab new any new packets. */
1068 tlp_rxintr(sc);
1069
1070 if (rxstatus & STATUS_RWT)
1071 printf("%s: receive watchdog timeout\n",
1072 sc->sc_dev.dv_xname);
1073
1074 if (rxstatus & STATUS_RU) {
1075 printf("%s: receive ring overrun\n",
1076 sc->sc_dev.dv_xname);
1077 /* Get the receive process going again. */
1078 if (sc->sc_tdctl_er != TDCTL_ER) {
1079 tlp_idle(sc, OPMODE_SR);
1080 TULIP_WRITE(sc, CSR_RXLIST,
1081 TULIP_CDRXADDR(sc, sc->sc_rxptr));
1082 TULIP_WRITE(sc, CSR_OPMODE,
1083 sc->sc_opmode);
1084 }
1085 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
1086 break;
1087 }
1088 }
1089
1090 if (txstatus) {
1091 /* Sweep up transmit descriptors. */
1092 tlp_txintr(sc);
1093
1094 if (txstatus & STATUS_TJT)
1095 printf("%s: transmit jabber timeout\n",
1096 sc->sc_dev.dv_xname);
1097
1098 if (txstatus & STATUS_UNF) {
1099 /*
1100 * Increase our transmit threshold if
1101 * another is available.
1102 */
1103 txthresh = sc->sc_txthresh + 1;
1104 if (sc->sc_txth[txthresh].txth_name != NULL) {
1105 /* Idle the transmit process. */
1106 tlp_idle(sc, OPMODE_ST);
1107
1108 sc->sc_txthresh = txthresh;
1109 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF);
1110 sc->sc_opmode |=
1111 sc->sc_txth[txthresh].txth_opmode;
1112 printf("%s: transmit underrun; new "
1113 "threshold: %s\n",
1114 sc->sc_dev.dv_xname,
1115 sc->sc_txth[txthresh].txth_name);
1116
1117 /*
1118 * Set the new threshold and restart
1119 * the transmit process.
1120 */
1121 TULIP_WRITE(sc, CSR_OPMODE,
1122 sc->sc_opmode);
1123 }
1124 /*
1125 * XXX Log every Nth underrun from
1126 * XXX now on?
1127 */
1128 }
1129 }
1130
1131 if (status & (STATUS_TPS|STATUS_RPS)) {
1132 if (status & STATUS_TPS)
1133 printf("%s: transmit process stopped\n",
1134 sc->sc_dev.dv_xname);
1135 if (status & STATUS_RPS)
1136 printf("%s: receive process stopped\n",
1137 sc->sc_dev.dv_xname);
1138 (void) tlp_init(ifp);
1139 break;
1140 }
1141
1142 if (status & STATUS_SE) {
1143 const char *str;
1144 switch (status & STATUS_EB) {
1145 case STATUS_EB_PARITY:
1146 str = "parity error";
1147 break;
1148
1149 case STATUS_EB_MABT:
1150 str = "master abort";
1151 break;
1152
1153 case STATUS_EB_TABT:
1154 str = "target abort";
1155 break;
1156
1157 default:
1158 str = "unknown error";
1159 break;
1160 }
1161 printf("%s: fatal system error: %s\n",
1162 sc->sc_dev.dv_xname, str);
1163 (void) tlp_init(ifp);
1164 break;
1165 }
1166
1167 /*
1168 * Not handled:
1169 *
1170 * Transmit buffer unavailable -- normal
1171 * condition, nothing to do, really.
1172 *
1173 * General purpose timer experied -- we don't
1174 * use the general purpose timer.
1175 *
1176 * Early receive interrupt -- not available on
1177 * all chips, we just use RI. We also only
1178 * use single-segment receive DMA, so this
1179 * is mostly useless.
1180 */
1181 }
1182
1183 /* Bring interrupts back up on the DM9102. */
1184 switch (sc->sc_chip) {
1185 case TULIP_CHIP_DM9102:
1186 case TULIP_CHIP_DM9102A:
1187 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten);
1188 break;
1189
1190 default:
1191 /* Nothing. */
1192 break;
1193 }
1194
1195 /* Try to get more packets going. */
1196 tlp_start(ifp);
1197
1198 #if NRND > 0
1199 if (handled)
1200 rnd_add_uint32(&sc->sc_rnd_source, status);
1201 #endif
1202 return (handled);
1203 }
1204
1205 /*
1206 * tlp_rxintr:
1207 *
1208 * Helper; handle receive interrupts.
1209 */
1210 void
1211 tlp_rxintr(sc)
1212 struct tulip_softc *sc;
1213 {
1214 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1215 struct ether_header *eh;
1216 struct tulip_rxsoft *rxs;
1217 struct mbuf *m;
1218 u_int32_t rxstat;
1219 int i, len;
1220
1221 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) {
1222 rxs = &sc->sc_rxsoft[i];
1223
1224 TULIP_CDRXSYNC(sc, i,
1225 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1226
1227 rxstat = le32toh(sc->sc_rxdescs[i].td_status);
1228
1229 if (rxstat & TDSTAT_OWN) {
1230 /*
1231 * We have processed all of the receive buffers.
1232 */
1233 break;
1234 }
1235
1236 /*
1237 * Make sure the packet fit in one buffer. This should
1238 * always be the case. But the Lite-On PNIC, rev 33
1239 * has an awful receive engine bug, which may require
1240 * a very icky work-around.
1241 */
1242 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) !=
1243 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) {
1244 printf("%s: incoming packet spilled, resetting\n",
1245 sc->sc_dev.dv_xname);
1246 (void) tlp_init(ifp);
1247 return;
1248 }
1249
1250 /*
1251 * If any collisions were seen on the wire, count one.
1252 */
1253 if (rxstat & TDSTAT_Rx_CS)
1254 ifp->if_collisions++;
1255
1256 /*
1257 * If an error occurred, update stats, clear the status
1258 * word, and leave the packet buffer in place. It will
1259 * simply be reused the next time the ring comes around.
1260 * If 802.1Q VLAN MTU is enabled, ignore the Frame Too Long
1261 * error.
1262 */
1263 if (rxstat & TDSTAT_ES &&
1264 ((sc->sc_ethercom.ec_capenable & ETHERCAP_VLAN_MTU) == 0 ||
1265 (rxstat & (TDSTAT_Rx_DE | TDSTAT_Rx_RF |
1266 TDSTAT_Rx_DB | TDSTAT_Rx_CE)) != 0)) {
1267 #define PRINTERR(bit, str) \
1268 if (rxstat & (bit)) \
1269 printf("%s: receive error: %s\n", \
1270 sc->sc_dev.dv_xname, str)
1271 ifp->if_ierrors++;
1272 PRINTERR(TDSTAT_Rx_DE, "descriptor error");
1273 PRINTERR(TDSTAT_Rx_RF, "runt frame");
1274 PRINTERR(TDSTAT_Rx_TL, "frame too long");
1275 PRINTERR(TDSTAT_Rx_RE, "MII error");
1276 PRINTERR(TDSTAT_Rx_DB, "dribbling bit");
1277 PRINTERR(TDSTAT_Rx_CE, "CRC error");
1278 #undef PRINTERR
1279 TULIP_INIT_RXDESC(sc, i);
1280 continue;
1281 }
1282
1283 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1284 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1285
1286 /*
1287 * No errors; receive the packet. Note the Tulip
1288 * includes the CRC with every packet.
1289 */
1290 len = TDSTAT_Rx_LENGTH(rxstat);
1291
1292 #ifdef __NO_STRICT_ALIGNMENT
1293 /*
1294 * Allocate a new mbuf cluster. If that fails, we are
1295 * out of memory, and must drop the packet and recycle
1296 * the buffer that's already attached to this descriptor.
1297 */
1298 m = rxs->rxs_mbuf;
1299 if (tlp_add_rxbuf(sc, i) != 0) {
1300 ifp->if_ierrors++;
1301 TULIP_INIT_RXDESC(sc, i);
1302 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1303 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1304 continue;
1305 }
1306 #else
1307 /*
1308 * The Tulip's receive buffers must be 4-byte aligned.
1309 * But this means that the data after the Ethernet header
1310 * is misaligned. We must allocate a new buffer and
1311 * copy the data, shifted forward 2 bytes.
1312 */
1313 MGETHDR(m, M_DONTWAIT, MT_DATA);
1314 if (m == NULL) {
1315 dropit:
1316 ifp->if_ierrors++;
1317 TULIP_INIT_RXDESC(sc, i);
1318 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1319 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1320 continue;
1321 }
1322 if (len > (MHLEN - 2)) {
1323 MCLGET(m, M_DONTWAIT);
1324 if ((m->m_flags & M_EXT) == 0) {
1325 m_freem(m);
1326 goto dropit;
1327 }
1328 }
1329 m->m_data += 2;
1330
1331 /*
1332 * Note that we use clusters for incoming frames, so the
1333 * buffer is virtually contiguous.
1334 */
1335 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len);
1336
1337 /* Allow the receive descriptor to continue using its mbuf. */
1338 TULIP_INIT_RXDESC(sc, i);
1339 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1340 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1341 #endif /* __NO_STRICT_ALIGNMENT */
1342
1343 ifp->if_ipackets++;
1344 eh = mtod(m, struct ether_header *);
1345 m->m_flags |= M_HASFCS;
1346 m->m_pkthdr.rcvif = ifp;
1347 m->m_pkthdr.len = m->m_len = len;
1348
1349 #if NBPFILTER > 0
1350 /*
1351 * Pass this up to any BPF listeners, but only
1352 * pass it up the stack if its for us.
1353 */
1354 if (ifp->if_bpf)
1355 bpf_mtap(ifp->if_bpf, m);
1356 #endif /* NPBFILTER > 0 */
1357
1358 /*
1359 * We sometimes have to run the 21140 in Hash-Only
1360 * mode. If we're in that mode, and not in promiscuous
1361 * mode, and we have a unicast packet that isn't for
1362 * us, then drop it.
1363 */
1364 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY &&
1365 (ifp->if_flags & IFF_PROMISC) == 0 &&
1366 ETHER_IS_MULTICAST(eh->ether_dhost) == 0 &&
1367 memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost,
1368 ETHER_ADDR_LEN) != 0) {
1369 m_freem(m);
1370 continue;
1371 }
1372
1373 /* Pass it on. */
1374 (*ifp->if_input)(ifp, m);
1375 }
1376
1377 /* Update the receive pointer. */
1378 sc->sc_rxptr = i;
1379 }
1380
1381 /*
1382 * tlp_txintr:
1383 *
1384 * Helper; handle transmit interrupts.
1385 */
1386 void
1387 tlp_txintr(sc)
1388 struct tulip_softc *sc;
1389 {
1390 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1391 struct tulip_txsoft *txs;
1392 u_int32_t txstat;
1393
1394 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n",
1395 sc->sc_dev.dv_xname, sc->sc_flags));
1396
1397 ifp->if_flags &= ~IFF_OACTIVE;
1398
1399 /*
1400 * Go through our Tx list and free mbufs for those
1401 * frames that have been transmitted.
1402 */
1403 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
1404 TULIP_CDTXSYNC(sc, txs->txs_lastdesc,
1405 txs->txs_ndescs,
1406 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1407
1408 #ifdef TLP_DEBUG
1409 if (ifp->if_flags & IFF_DEBUG) {
1410 int i;
1411 printf(" txsoft %p transmit chain:\n", txs);
1412 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) {
1413 printf(" descriptor %d:\n", i);
1414 printf(" td_status: 0x%08x\n",
1415 le32toh(sc->sc_txdescs[i].td_status));
1416 printf(" td_ctl: 0x%08x\n",
1417 le32toh(sc->sc_txdescs[i].td_ctl));
1418 printf(" td_bufaddr1: 0x%08x\n",
1419 le32toh(sc->sc_txdescs[i].td_bufaddr1));
1420 printf(" td_bufaddr2: 0x%08x\n",
1421 le32toh(sc->sc_txdescs[i].td_bufaddr2));
1422 if (i == txs->txs_lastdesc)
1423 break;
1424 }
1425 }
1426 #endif
1427
1428 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status);
1429 if (txstat & TDSTAT_OWN)
1430 break;
1431
1432 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
1433
1434 sc->sc_txfree += txs->txs_ndescs;
1435
1436 if (txs->txs_mbuf == NULL) {
1437 /*
1438 * If we didn't have an mbuf, it was the setup
1439 * packet.
1440 */
1441 #ifdef DIAGNOSTIC
1442 if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0)
1443 panic("tlp_txintr: null mbuf, not doing setup");
1444 #endif
1445 TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE);
1446 sc->sc_flags &= ~TULIPF_DOING_SETUP;
1447 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1448 continue;
1449 }
1450
1451 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap,
1452 0, txs->txs_dmamap->dm_mapsize,
1453 BUS_DMASYNC_POSTWRITE);
1454 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
1455 m_freem(txs->txs_mbuf);
1456 txs->txs_mbuf = NULL;
1457
1458 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1459
1460 /*
1461 * Check for errors and collisions.
1462 */
1463 #ifdef TLP_STATS
1464 if (txstat & TDSTAT_Tx_UF)
1465 sc->sc_stats.ts_tx_uf++;
1466 if (txstat & TDSTAT_Tx_TO)
1467 sc->sc_stats.ts_tx_to++;
1468 if (txstat & TDSTAT_Tx_EC)
1469 sc->sc_stats.ts_tx_ec++;
1470 if (txstat & TDSTAT_Tx_LC)
1471 sc->sc_stats.ts_tx_lc++;
1472 #endif
1473
1474 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO))
1475 ifp->if_oerrors++;
1476
1477 if (txstat & TDSTAT_Tx_EC)
1478 ifp->if_collisions += 16;
1479 else
1480 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat);
1481 if (txstat & TDSTAT_Tx_LC)
1482 ifp->if_collisions++;
1483
1484 ifp->if_opackets++;
1485 }
1486
1487 /*
1488 * If there are no more pending transmissions, cancel the watchdog
1489 * timer.
1490 */
1491 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0)
1492 ifp->if_timer = 0;
1493
1494 /*
1495 * If we have a receive filter setup pending, do it now.
1496 */
1497 if (sc->sc_flags & TULIPF_WANT_SETUP)
1498 (*sc->sc_filter_setup)(sc);
1499 }
1500
1501 #ifdef TLP_STATS
1502 void
1503 tlp_print_stats(sc)
1504 struct tulip_softc *sc;
1505 {
1506
1507 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n",
1508 sc->sc_dev.dv_xname,
1509 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to,
1510 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc);
1511 }
1512 #endif
1513
1514 /*
1515 * tlp_reset:
1516 *
1517 * Perform a soft reset on the Tulip.
1518 */
1519 void
1520 tlp_reset(sc)
1521 struct tulip_softc *sc;
1522 {
1523 int i;
1524
1525 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR);
1526
1527 /*
1528 * Xircom clone doesn't bring itself out of reset automatically.
1529 * Instead, we have to wait at least 50 PCI cycles, and then
1530 * clear SWR.
1531 */
1532 if (sc->sc_chip == TULIP_CHIP_X3201_3) {
1533 delay(10);
1534 TULIP_WRITE(sc, CSR_BUSMODE, 0);
1535 }
1536
1537 for (i = 0; i < 1000; i++) {
1538 /*
1539 * Wait at least 50 PCI cycles for the reset to
1540 * complete before peeking at the Tulip again.
1541 * 10 uSec is a bit longer than 50 PCI cycles
1542 * (at 33MHz), but it doesn't hurt have the extra
1543 * wait.
1544 */
1545 delay(10);
1546 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0)
1547 break;
1548 }
1549
1550 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR))
1551 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname);
1552
1553 delay(1000);
1554
1555 /*
1556 * If the board has any GPIO reset sequences to issue, do them now.
1557 */
1558 if (sc->sc_reset != NULL)
1559 (*sc->sc_reset)(sc);
1560 }
1561
1562 /*
1563 * tlp_init: [ ifnet interface function ]
1564 *
1565 * Initialize the interface. Must be called at splnet().
1566 */
1567 int
1568 tlp_init(ifp)
1569 struct ifnet *ifp;
1570 {
1571 struct tulip_softc *sc = ifp->if_softc;
1572 struct tulip_txsoft *txs;
1573 struct tulip_rxsoft *rxs;
1574 int i, error = 0;
1575
1576 if ((error = tlp_enable(sc)) != 0)
1577 goto out;
1578
1579 /*
1580 * Cancel any pending I/O.
1581 */
1582 tlp_stop(ifp, 0);
1583
1584 /*
1585 * Initialize `opmode' to 0, and call the pre-init routine, if
1586 * any. This is required because the 2114x and some of the
1587 * clones require that the media-related bits in `opmode' be
1588 * set before performing a soft-reset in order to get internal
1589 * chip pathways are correct. Yay!
1590 */
1591 sc->sc_opmode = 0;
1592 if (sc->sc_preinit != NULL)
1593 (*sc->sc_preinit)(sc);
1594
1595 /*
1596 * Reset the Tulip to a known state.
1597 */
1598 tlp_reset(sc);
1599
1600 /*
1601 * Initialize the BUSMODE register.
1602 */
1603 sc->sc_busmode = BUSMODE_BAR;
1604 switch (sc->sc_chip) {
1605 case TULIP_CHIP_21140:
1606 case TULIP_CHIP_21140A:
1607 case TULIP_CHIP_21142:
1608 case TULIP_CHIP_21143:
1609 case TULIP_CHIP_82C115:
1610 case TULIP_CHIP_MX98725:
1611 /*
1612 * If we're allowed to do so, use Memory Read Line
1613 * and Memory Read Multiple.
1614 *
1615 * XXX Should we use Memory Write and Invalidate?
1616 */
1617 if (sc->sc_flags & TULIPF_MRL)
1618 sc->sc_busmode |= BUSMODE_RLE;
1619 if (sc->sc_flags & TULIPF_MRM)
1620 sc->sc_busmode |= BUSMODE_RME;
1621 #if 0
1622 if (sc->sc_flags & TULIPF_MWI)
1623 sc->sc_busmode |= BUSMODE_WLE;
1624 #endif
1625 break;
1626
1627 case TULIP_CHIP_82C168:
1628 case TULIP_CHIP_82C169:
1629 sc->sc_busmode |= BUSMODE_PNIC_MBO;
1630 if (sc->sc_maxburst == 0)
1631 sc->sc_maxburst = 16;
1632 break;
1633
1634 default:
1635 /* Nothing. */
1636 break;
1637 }
1638 switch (sc->sc_cacheline) {
1639 default:
1640 /*
1641 * Note: We must *always* set these bits; a cache
1642 * alignment of 0 is RESERVED.
1643 */
1644 case 8:
1645 sc->sc_busmode |= BUSMODE_CAL_8LW;
1646 break;
1647 case 16:
1648 sc->sc_busmode |= BUSMODE_CAL_16LW;
1649 break;
1650 case 32:
1651 sc->sc_busmode |= BUSMODE_CAL_32LW;
1652 break;
1653 }
1654 switch (sc->sc_maxburst) {
1655 case 1:
1656 sc->sc_busmode |= BUSMODE_PBL_1LW;
1657 break;
1658 case 2:
1659 sc->sc_busmode |= BUSMODE_PBL_2LW;
1660 break;
1661 case 4:
1662 sc->sc_busmode |= BUSMODE_PBL_4LW;
1663 break;
1664 case 8:
1665 sc->sc_busmode |= BUSMODE_PBL_8LW;
1666 break;
1667 case 16:
1668 sc->sc_busmode |= BUSMODE_PBL_16LW;
1669 break;
1670 case 32:
1671 sc->sc_busmode |= BUSMODE_PBL_32LW;
1672 break;
1673 default:
1674 sc->sc_busmode |= BUSMODE_PBL_DEFAULT;
1675 break;
1676 }
1677 #if BYTE_ORDER == BIG_ENDIAN
1678 /*
1679 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips
1680 * support them, and even on ones that do, it doesn't
1681 * always work. So we always access descriptors with
1682 * little endian via htole32/le32toh.
1683 */
1684 #endif
1685 /*
1686 * Big-endian bus requires BUSMODE_BLE anyway.
1687 * Also, BUSMODE_DBO is needed because we assume
1688 * descriptors are little endian.
1689 */
1690 if (sc->sc_flags & TULIPF_BLE)
1691 sc->sc_busmode |= BUSMODE_BLE;
1692 if (sc->sc_flags & TULIPF_DBO)
1693 sc->sc_busmode |= BUSMODE_DBO;
1694
1695 /*
1696 * Some chips have a broken bus interface.
1697 */
1698 switch (sc->sc_chip) {
1699 case TULIP_CHIP_DM9102:
1700 case TULIP_CHIP_DM9102A:
1701 sc->sc_busmode = 0;
1702 break;
1703
1704 default:
1705 /* Nothing. */
1706 break;
1707 }
1708
1709 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode);
1710
1711 /*
1712 * Initialize the OPMODE register. We don't write it until
1713 * we're ready to begin the transmit and receive processes.
1714 *
1715 * Media-related OPMODE bits are set in the media callbacks
1716 * for each specific chip/board.
1717 */
1718 sc->sc_opmode |= OPMODE_SR | OPMODE_ST |
1719 sc->sc_txth[sc->sc_txthresh].txth_opmode;
1720
1721 /*
1722 * Magical mystery initialization on the Macronix chips.
1723 * The MX98713 uses its own magic value, the rest share
1724 * a common one.
1725 */
1726 switch (sc->sc_chip) {
1727 case TULIP_CHIP_MX98713:
1728 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713);
1729 break;
1730
1731 case TULIP_CHIP_MX98713A:
1732 case TULIP_CHIP_MX98715:
1733 case TULIP_CHIP_MX98715A:
1734 case TULIP_CHIP_MX98715AEC_X:
1735 case TULIP_CHIP_MX98725:
1736 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715);
1737 break;
1738
1739 default:
1740 /* Nothing. */
1741 break;
1742 }
1743
1744 /*
1745 * Initialize the transmit descriptor ring.
1746 */
1747 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
1748 for (i = 0; i < TULIP_NTXDESC; i++) {
1749 sc->sc_txdescs[i].td_ctl = htole32(sc->sc_tdctl_ch);
1750 sc->sc_txdescs[i].td_bufaddr2 =
1751 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)));
1752 }
1753 sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er);
1754 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC,
1755 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1756 sc->sc_txfree = TULIP_NTXDESC;
1757 sc->sc_txnext = 0;
1758
1759 /*
1760 * Initialize the transmit job descriptors.
1761 */
1762 SIMPLEQ_INIT(&sc->sc_txfreeq);
1763 SIMPLEQ_INIT(&sc->sc_txdirtyq);
1764 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
1765 txs = &sc->sc_txsoft[i];
1766 txs->txs_mbuf = NULL;
1767 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1768 }
1769
1770 /*
1771 * Initialize the receive descriptor and receive job
1772 * descriptor rings.
1773 */
1774 for (i = 0; i < TULIP_NRXDESC; i++) {
1775 rxs = &sc->sc_rxsoft[i];
1776 if (rxs->rxs_mbuf == NULL) {
1777 if ((error = tlp_add_rxbuf(sc, i)) != 0) {
1778 printf("%s: unable to allocate or map rx "
1779 "buffer %d, error = %d\n",
1780 sc->sc_dev.dv_xname, i, error);
1781 /*
1782 * XXX Should attempt to run with fewer receive
1783 * XXX buffers instead of just failing.
1784 */
1785 tlp_rxdrain(sc);
1786 goto out;
1787 }
1788 } else
1789 TULIP_INIT_RXDESC(sc, i);
1790 }
1791 sc->sc_rxptr = 0;
1792
1793 /*
1794 * Initialize the interrupt mask and enable interrupts.
1795 */
1796 /* normal interrupts */
1797 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS;
1798
1799 /* abnormal interrupts */
1800 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF |
1801 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS;
1802
1803 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT;
1804 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT;
1805
1806 switch (sc->sc_chip) {
1807 case TULIP_CHIP_WB89C840F:
1808 /*
1809 * Clear bits that we don't want that happen to
1810 * overlap or don't exist.
1811 */
1812 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT);
1813 break;
1814
1815 default:
1816 /* Nothing. */
1817 break;
1818 }
1819
1820 sc->sc_rxint_mask &= sc->sc_inten;
1821 sc->sc_txint_mask &= sc->sc_inten;
1822
1823 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten);
1824 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff);
1825
1826 /*
1827 * Give the transmit and receive rings to the Tulip.
1828 */
1829 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext));
1830 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr));
1831
1832 /*
1833 * On chips that do this differently, set the station address.
1834 */
1835 switch (sc->sc_chip) {
1836 case TULIP_CHIP_WB89C840F:
1837 {
1838 /* XXX Do this with stream writes? */
1839 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0);
1840
1841 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1842 bus_space_write_1(sc->sc_st, sc->sc_sh,
1843 cpa + i, LLADDR(ifp->if_sadl)[i]);
1844 }
1845 break;
1846 }
1847
1848 case TULIP_CHIP_AL981:
1849 case TULIP_CHIP_AN983:
1850 case TULIP_CHIP_AN985:
1851 {
1852 u_int32_t reg;
1853 u_int8_t *enaddr = LLADDR(ifp->if_sadl);
1854
1855 reg = enaddr[0] |
1856 (enaddr[1] << 8) |
1857 (enaddr[2] << 16) |
1858 (enaddr[3] << 24);
1859 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg);
1860
1861 reg = enaddr[4] |
1862 (enaddr[5] << 8);
1863 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg);
1864 }
1865
1866 default:
1867 /* Nothing. */
1868 break;
1869 }
1870
1871 /*
1872 * Set the receive filter. This will start the transmit and
1873 * receive processes.
1874 */
1875 (*sc->sc_filter_setup)(sc);
1876
1877 /*
1878 * Set the current media.
1879 */
1880 (void) (*sc->sc_mediasw->tmsw_set)(sc);
1881
1882 /*
1883 * Start the receive process.
1884 */
1885 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
1886
1887 if (sc->sc_tick != NULL) {
1888 /* Start the one second clock. */
1889 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc);
1890 }
1891
1892 /*
1893 * Note that the interface is now running.
1894 */
1895 ifp->if_flags |= IFF_RUNNING;
1896 ifp->if_flags &= ~IFF_OACTIVE;
1897
1898 out:
1899 if (error) {
1900 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1901 ifp->if_timer = 0;
1902 printf("%s: interface not running\n", sc->sc_dev.dv_xname);
1903 }
1904 return (error);
1905 }
1906
1907 /*
1908 * tlp_enable:
1909 *
1910 * Enable the Tulip chip.
1911 */
1912 int
1913 tlp_enable(sc)
1914 struct tulip_softc *sc;
1915 {
1916
1917 if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) {
1918 if ((*sc->sc_enable)(sc) != 0) {
1919 printf("%s: device enable failed\n",
1920 sc->sc_dev.dv_xname);
1921 return (EIO);
1922 }
1923 sc->sc_flags |= TULIPF_ENABLED;
1924 }
1925 return (0);
1926 }
1927
1928 /*
1929 * tlp_disable:
1930 *
1931 * Disable the Tulip chip.
1932 */
1933 void
1934 tlp_disable(sc)
1935 struct tulip_softc *sc;
1936 {
1937
1938 if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) {
1939 (*sc->sc_disable)(sc);
1940 sc->sc_flags &= ~TULIPF_ENABLED;
1941 }
1942 }
1943
1944 /*
1945 * tlp_power:
1946 *
1947 * Power management (suspend/resume) hook.
1948 */
1949 void
1950 tlp_power(why, arg)
1951 int why;
1952 void *arg;
1953 {
1954 struct tulip_softc *sc = arg;
1955 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1956 int s;
1957
1958 s = splnet();
1959 switch (why) {
1960 case PWR_SUSPEND:
1961 case PWR_STANDBY:
1962 tlp_stop(ifp, 0);
1963 if (sc->sc_power != NULL)
1964 (*sc->sc_power)(sc, why);
1965 break;
1966 case PWR_RESUME:
1967 if (ifp->if_flags & IFF_UP) {
1968 if (sc->sc_power != NULL)
1969 (*sc->sc_power)(sc, why);
1970 tlp_init(ifp);
1971 }
1972 break;
1973 case PWR_SOFTSUSPEND:
1974 case PWR_SOFTSTANDBY:
1975 case PWR_SOFTRESUME:
1976 break;
1977 }
1978 splx(s);
1979 }
1980
1981 /*
1982 * tlp_rxdrain:
1983 *
1984 * Drain the receive queue.
1985 */
1986 void
1987 tlp_rxdrain(sc)
1988 struct tulip_softc *sc;
1989 {
1990 struct tulip_rxsoft *rxs;
1991 int i;
1992
1993 for (i = 0; i < TULIP_NRXDESC; i++) {
1994 rxs = &sc->sc_rxsoft[i];
1995 if (rxs->rxs_mbuf != NULL) {
1996 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
1997 m_freem(rxs->rxs_mbuf);
1998 rxs->rxs_mbuf = NULL;
1999 }
2000 }
2001 }
2002
2003 /*
2004 * tlp_stop: [ ifnet interface function ]
2005 *
2006 * Stop transmission on the interface.
2007 */
2008 void
2009 tlp_stop(ifp, disable)
2010 struct ifnet *ifp;
2011 int disable;
2012 {
2013 struct tulip_softc *sc = ifp->if_softc;
2014 struct tulip_txsoft *txs;
2015
2016 if (sc->sc_tick != NULL) {
2017 /* Stop the one second clock. */
2018 callout_stop(&sc->sc_tick_callout);
2019 }
2020
2021 if (sc->sc_flags & TULIPF_HAS_MII) {
2022 /* Down the MII. */
2023 mii_down(&sc->sc_mii);
2024 }
2025
2026 /* Disable interrupts. */
2027 TULIP_WRITE(sc, CSR_INTEN, 0);
2028
2029 /* Stop the transmit and receive processes. */
2030 sc->sc_opmode = 0;
2031 TULIP_WRITE(sc, CSR_OPMODE, 0);
2032 TULIP_WRITE(sc, CSR_RXLIST, 0);
2033 TULIP_WRITE(sc, CSR_TXLIST, 0);
2034
2035 /*
2036 * Release any queued transmit buffers.
2037 */
2038 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
2039 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
2040 if (txs->txs_mbuf != NULL) {
2041 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
2042 m_freem(txs->txs_mbuf);
2043 txs->txs_mbuf = NULL;
2044 }
2045 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
2046 }
2047
2048 if (disable) {
2049 tlp_rxdrain(sc);
2050 tlp_disable(sc);
2051 }
2052
2053 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP);
2054
2055 /*
2056 * Mark the interface down and cancel the watchdog timer.
2057 */
2058 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2059 ifp->if_timer = 0;
2060 }
2061
2062 #define SROM_EMIT(sc, x) \
2063 do { \
2064 TULIP_WRITE((sc), CSR_MIIROM, (x)); \
2065 delay(2); \
2066 } while (0)
2067
2068 /*
2069 * tlp_srom_idle:
2070 *
2071 * Put the SROM in idle state.
2072 */
2073 void
2074 tlp_srom_idle(sc)
2075 struct tulip_softc *sc;
2076 {
2077 u_int32_t miirom;
2078 int i;
2079
2080 miirom = MIIROM_SR;
2081 SROM_EMIT(sc, miirom);
2082
2083 miirom |= MIIROM_RD;
2084 SROM_EMIT(sc, miirom);
2085
2086 miirom |= MIIROM_SROMCS;
2087 SROM_EMIT(sc, miirom);
2088
2089 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2090
2091 /* Strobe the clock 32 times. */
2092 for (i = 0; i < 32; i++) {
2093 SROM_EMIT(sc, miirom);
2094 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2095 }
2096
2097 SROM_EMIT(sc, miirom);
2098
2099 miirom &= ~MIIROM_SROMCS;
2100 SROM_EMIT(sc, miirom);
2101
2102 SROM_EMIT(sc, 0);
2103 }
2104
2105 /*
2106 * tlp_srom_size:
2107 *
2108 * Determine the number of address bits in the SROM.
2109 */
2110 int
2111 tlp_srom_size(sc)
2112 struct tulip_softc *sc;
2113 {
2114 u_int32_t miirom;
2115 int x;
2116
2117 /* Select the SROM. */
2118 miirom = MIIROM_SR;
2119 SROM_EMIT(sc, miirom);
2120
2121 miirom |= MIIROM_RD;
2122 SROM_EMIT(sc, miirom);
2123
2124 /* Send CHIP SELECT for one clock tick. */
2125 miirom |= MIIROM_SROMCS;
2126 SROM_EMIT(sc, miirom);
2127
2128 /* Shift in the READ opcode. */
2129 for (x = 3; x > 0; x--) {
2130 if (TULIP_SROM_OPC_READ & (1 << (x - 1)))
2131 miirom |= MIIROM_SROMDI;
2132 else
2133 miirom &= ~MIIROM_SROMDI;
2134 SROM_EMIT(sc, miirom);
2135 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2136 SROM_EMIT(sc, miirom);
2137 }
2138
2139 /* Shift in address and look for dummy 0 bit. */
2140 for (x = 1; x <= 12; x++) {
2141 miirom &= ~MIIROM_SROMDI;
2142 SROM_EMIT(sc, miirom);
2143 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2144 if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO))
2145 break;
2146 SROM_EMIT(sc, miirom);
2147 }
2148
2149 /* Clear CHIP SELECT. */
2150 miirom &= ~MIIROM_SROMCS;
2151 SROM_EMIT(sc, miirom);
2152
2153 /* Deselect the SROM. */
2154 SROM_EMIT(sc, 0);
2155
2156 if (x < 4 || x > 12) {
2157 printf("%s: broken MicroWire interface detected; "
2158 "setting SROM size to 1Kb\n", sc->sc_dev.dv_xname);
2159 return (6);
2160 } else {
2161 if (tlp_srom_debug)
2162 printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n",
2163 sc->sc_dev.dv_xname, x, (1 << (x + 4)) >> 3);
2164 return (x);
2165 }
2166 }
2167
2168 /*
2169 * tlp_read_srom:
2170 *
2171 * Read the Tulip SROM.
2172 */
2173 int
2174 tlp_read_srom(sc)
2175 struct tulip_softc *sc;
2176 {
2177 int size;
2178 u_int32_t miirom;
2179 u_int16_t datain;
2180 int i, x;
2181
2182 tlp_srom_idle(sc);
2183
2184 sc->sc_srom_addrbits = tlp_srom_size(sc);
2185 if (sc->sc_srom_addrbits == 0)
2186 return (0);
2187 size = TULIP_ROM_SIZE(sc->sc_srom_addrbits);
2188 sc->sc_srom = malloc(size, M_DEVBUF, M_NOWAIT);
2189
2190 /* Select the SROM. */
2191 miirom = MIIROM_SR;
2192 SROM_EMIT(sc, miirom);
2193
2194 miirom |= MIIROM_RD;
2195 SROM_EMIT(sc, miirom);
2196
2197 for (i = 0; i < size; i += 2) {
2198 /* Send CHIP SELECT for one clock tick. */
2199 miirom |= MIIROM_SROMCS;
2200 SROM_EMIT(sc, miirom);
2201
2202 /* Shift in the READ opcode. */
2203 for (x = 3; x > 0; x--) {
2204 if (TULIP_SROM_OPC_READ & (1 << (x - 1)))
2205 miirom |= MIIROM_SROMDI;
2206 else
2207 miirom &= ~MIIROM_SROMDI;
2208 SROM_EMIT(sc, miirom);
2209 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2210 SROM_EMIT(sc, miirom);
2211 }
2212
2213 /* Shift in address. */
2214 for (x = sc->sc_srom_addrbits; x > 0; x--) {
2215 if (i & (1 << x))
2216 miirom |= MIIROM_SROMDI;
2217 else
2218 miirom &= ~MIIROM_SROMDI;
2219 SROM_EMIT(sc, miirom);
2220 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2221 SROM_EMIT(sc, miirom);
2222 }
2223
2224 /* Shift out data. */
2225 miirom &= ~MIIROM_SROMDI;
2226 datain = 0;
2227 for (x = 16; x > 0; x--) {
2228 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2229 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO))
2230 datain |= (1 << (x - 1));
2231 SROM_EMIT(sc, miirom);
2232 }
2233 sc->sc_srom[i] = datain & 0xff;
2234 sc->sc_srom[i + 1] = datain >> 8;
2235
2236 /* Clear CHIP SELECT. */
2237 miirom &= ~MIIROM_SROMCS;
2238 SROM_EMIT(sc, miirom);
2239 }
2240
2241 /* Deselect the SROM. */
2242 SROM_EMIT(sc, 0);
2243
2244 /* ...and idle it. */
2245 tlp_srom_idle(sc);
2246
2247 if (tlp_srom_debug) {
2248 printf("SROM CONTENTS:");
2249 for (i = 0; i < size; i++) {
2250 if ((i % 8) == 0)
2251 printf("\n\t");
2252 printf("0x%02x ", sc->sc_srom[i]);
2253 }
2254 printf("\n");
2255 }
2256
2257 return (1);
2258 }
2259
2260 #undef SROM_EMIT
2261
2262 /*
2263 * tlp_add_rxbuf:
2264 *
2265 * Add a receive buffer to the indicated descriptor.
2266 */
2267 int
2268 tlp_add_rxbuf(sc, idx)
2269 struct tulip_softc *sc;
2270 int idx;
2271 {
2272 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx];
2273 struct mbuf *m;
2274 int error;
2275
2276 MGETHDR(m, M_DONTWAIT, MT_DATA);
2277 if (m == NULL)
2278 return (ENOBUFS);
2279
2280 MCLGET(m, M_DONTWAIT);
2281 if ((m->m_flags & M_EXT) == 0) {
2282 m_freem(m);
2283 return (ENOBUFS);
2284 }
2285
2286 if (rxs->rxs_mbuf != NULL)
2287 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
2288
2289 rxs->rxs_mbuf = m;
2290
2291 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap,
2292 m->m_ext.ext_buf, m->m_ext.ext_size, NULL,
2293 BUS_DMA_READ|BUS_DMA_NOWAIT);
2294 if (error) {
2295 printf("%s: can't load rx DMA map %d, error = %d\n",
2296 sc->sc_dev.dv_xname, idx, error);
2297 panic("tlp_add_rxbuf"); /* XXX */
2298 }
2299
2300 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
2301 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
2302
2303 TULIP_INIT_RXDESC(sc, idx);
2304
2305 return (0);
2306 }
2307
2308 /*
2309 * tlp_srom_crcok:
2310 *
2311 * Check the CRC of the Tulip SROM.
2312 */
2313 int
2314 tlp_srom_crcok(romdata)
2315 const u_int8_t *romdata;
2316 {
2317 u_int32_t crc;
2318
2319 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM);
2320 crc = (crc & 0xffff) ^ 0xffff;
2321 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM))
2322 return (1);
2323
2324 /*
2325 * Try an alternate checksum.
2326 */
2327 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1);
2328 crc = (crc & 0xffff) ^ 0xffff;
2329 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1))
2330 return (1);
2331
2332 return (0);
2333 }
2334
2335 /*
2336 * tlp_isv_srom:
2337 *
2338 * Check to see if the SROM is in the new standardized format.
2339 */
2340 int
2341 tlp_isv_srom(romdata)
2342 const u_int8_t *romdata;
2343 {
2344 int i;
2345 u_int16_t cksum;
2346
2347 if (tlp_srom_crcok(romdata)) {
2348 /*
2349 * SROM CRC checks out; must be in the new format.
2350 */
2351 return (1);
2352 }
2353
2354 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM);
2355 if (cksum == 0xffff || cksum == 0) {
2356 /*
2357 * No checksum present. Check the SROM ID; 18 bytes of 0
2358 * followed by 1 (version) followed by the number of
2359 * adapters which use this SROM (should be non-zero).
2360 */
2361 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) {
2362 if (romdata[i] != 0)
2363 return (0);
2364 }
2365 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1)
2366 return (0);
2367 if (romdata[TULIP_ROM_CHIP_COUNT] == 0)
2368 return (0);
2369 return (1);
2370 }
2371
2372 return (0);
2373 }
2374
2375 /*
2376 * tlp_isv_srom_enaddr:
2377 *
2378 * Get the Ethernet address from an ISV SROM.
2379 */
2380 int
2381 tlp_isv_srom_enaddr(sc, enaddr)
2382 struct tulip_softc *sc;
2383 u_int8_t *enaddr;
2384 {
2385 int i, devcnt;
2386
2387 if (tlp_isv_srom(sc->sc_srom) == 0)
2388 return (0);
2389
2390 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
2391 for (i = 0; i < devcnt; i++) {
2392 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
2393 break;
2394 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
2395 sc->sc_devno)
2396 break;
2397 }
2398
2399 if (i == devcnt)
2400 return (0);
2401
2402 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS],
2403 ETHER_ADDR_LEN);
2404 enaddr[5] += i;
2405
2406 return (1);
2407 }
2408
2409 /*
2410 * tlp_parse_old_srom:
2411 *
2412 * Parse old-format SROMs.
2413 *
2414 * This routine is largely lifted from Matt Thomas's `de' driver.
2415 */
2416 int
2417 tlp_parse_old_srom(sc, enaddr)
2418 struct tulip_softc *sc;
2419 u_int8_t *enaddr;
2420 {
2421 static const u_int8_t testpat[] =
2422 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa };
2423 int i;
2424 u_int32_t cksum;
2425
2426 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) {
2427 /*
2428 * Some vendors (e.g. ZNYX) don't use the standard
2429 * DEC Address ROM format, but rather just have an
2430 * Ethernet address in the first 6 bytes, maybe a
2431 * 2 byte checksum, and then all 0xff's.
2432 *
2433 * On the other hand, Cobalt Networks interfaces
2434 * simply have the address in the first six bytes
2435 * with the rest zeroed out.
2436 */
2437 for (i = 8; i < 32; i++) {
2438 if (sc->sc_srom[i] != 0xff &&
2439 sc->sc_srom[i] != 0)
2440 return (0);
2441 }
2442
2443 /*
2444 * Sanity check the Ethernet address:
2445 *
2446 * - Make sure it's not multicast or locally
2447 * assigned
2448 * - Make sure it has a non-0 OUI
2449 */
2450 if (sc->sc_srom[0] & 3)
2451 return (0);
2452 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 &&
2453 sc->sc_srom[2] == 0)
2454 return (0);
2455
2456 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
2457 return (1);
2458 }
2459
2460 /*
2461 * Standard DEC Address ROM test.
2462 */
2463
2464 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0)
2465 return (0);
2466
2467 for (i = 0; i < 8; i++) {
2468 if (sc->sc_srom[i] != sc->sc_srom[15 - i])
2469 return (0);
2470 }
2471
2472 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
2473
2474 cksum = *(u_int16_t *) &enaddr[0];
2475
2476 cksum <<= 1;
2477 if (cksum > 0xffff)
2478 cksum -= 0xffff;
2479
2480 cksum += *(u_int16_t *) &enaddr[2];
2481 if (cksum > 0xffff)
2482 cksum -= 0xffff;
2483
2484 cksum <<= 1;
2485 if (cksum > 0xffff)
2486 cksum -= 0xffff;
2487
2488 cksum += *(u_int16_t *) &enaddr[4];
2489 if (cksum >= 0xffff)
2490 cksum -= 0xffff;
2491
2492 if (cksum != *(u_int16_t *) &sc->sc_srom[6])
2493 return (0);
2494
2495 return (1);
2496 }
2497
2498 /*
2499 * tlp_filter_setup:
2500 *
2501 * Set the Tulip's receive filter.
2502 */
2503 void
2504 tlp_filter_setup(sc)
2505 struct tulip_softc *sc;
2506 {
2507 struct ethercom *ec = &sc->sc_ethercom;
2508 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2509 struct ether_multi *enm;
2510 struct ether_multistep step;
2511 __volatile u_int32_t *sp;
2512 struct tulip_txsoft *txs;
2513 u_int8_t enaddr[ETHER_ADDR_LEN];
2514 u_int32_t hash, hashsize;
2515 int cnt;
2516
2517 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n",
2518 sc->sc_dev.dv_xname, sc->sc_flags));
2519
2520 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN);
2521
2522 /*
2523 * If there are transmissions pending, wait until they have
2524 * completed.
2525 */
2526 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL ||
2527 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) {
2528 sc->sc_flags |= TULIPF_WANT_SETUP;
2529 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n",
2530 sc->sc_dev.dv_xname));
2531 return;
2532 }
2533 sc->sc_flags &= ~TULIPF_WANT_SETUP;
2534
2535 switch (sc->sc_chip) {
2536 case TULIP_CHIP_82C115:
2537 hashsize = TULIP_PNICII_HASHSIZE;
2538 break;
2539
2540 default:
2541 hashsize = TULIP_MCHASHSIZE;
2542 }
2543
2544 /*
2545 * If we're running, idle the transmit and receive engines. If
2546 * we're NOT running, we're being called from tlp_init(), and our
2547 * writing OPMODE will start the transmit and receive processes
2548 * in motion.
2549 */
2550 if (ifp->if_flags & IFF_RUNNING)
2551 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2552
2553 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
2554
2555 if (ifp->if_flags & IFF_PROMISC) {
2556 sc->sc_opmode |= OPMODE_PR;
2557 goto allmulti;
2558 }
2559
2560 /*
2561 * Try Perfect filtering first.
2562 */
2563
2564 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
2565 sp = TULIP_CDSP(sc);
2566 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2567 cnt = 0;
2568 ETHER_FIRST_MULTI(step, ec, enm);
2569 while (enm != NULL) {
2570 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2571 /*
2572 * We must listen to a range of multicast addresses.
2573 * For now, just accept all multicasts, rather than
2574 * trying to set only those filter bits needed to match
2575 * the range. (At this time, the only use of address
2576 * ranges is for IP multicast routing, for which the
2577 * range is big enough to require all bits set.)
2578 */
2579 goto allmulti;
2580 }
2581 if (cnt == (TULIP_MAXADDRS - 2)) {
2582 /*
2583 * We already have our multicast limit (still need
2584 * our station address and broadcast). Go to
2585 * Hash-Perfect mode.
2586 */
2587 goto hashperfect;
2588 }
2589 cnt++;
2590 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0);
2591 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1);
2592 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2);
2593 ETHER_NEXT_MULTI(step, enm);
2594 }
2595
2596 if (ifp->if_flags & IFF_BROADCAST) {
2597 /* ...and the broadcast address. */
2598 cnt++;
2599 *sp++ = TULIP_SP_FIELD_C(0xffff);
2600 *sp++ = TULIP_SP_FIELD_C(0xffff);
2601 *sp++ = TULIP_SP_FIELD_C(0xffff);
2602 }
2603
2604 /* Pad the rest with our station address. */
2605 for (; cnt < TULIP_MAXADDRS; cnt++) {
2606 *sp++ = TULIP_SP_FIELD(enaddr, 0);
2607 *sp++ = TULIP_SP_FIELD(enaddr, 1);
2608 *sp++ = TULIP_SP_FIELD(enaddr, 2);
2609 }
2610 ifp->if_flags &= ~IFF_ALLMULTI;
2611 goto setit;
2612
2613 hashperfect:
2614 /*
2615 * Try Hash-Perfect mode.
2616 */
2617
2618 /*
2619 * Some 21140 chips have broken Hash-Perfect modes. On these
2620 * chips, we simply use Hash-Only mode, and put our station
2621 * address into the filter.
2622 */
2623 if (sc->sc_chip == TULIP_CHIP_21140)
2624 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY;
2625 else
2626 sc->sc_filtmode = TDCTL_Tx_FT_HASH;
2627 sp = TULIP_CDSP(sc);
2628 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2629 ETHER_FIRST_MULTI(step, ec, enm);
2630 while (enm != NULL) {
2631 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2632 /*
2633 * We must listen to a range of multicast addresses.
2634 * For now, just accept all multicasts, rather than
2635 * trying to set only those filter bits needed to match
2636 * the range. (At this time, the only use of address
2637 * ranges is for IP multicast routing, for which the
2638 * range is big enough to require all bits set.)
2639 */
2640 goto allmulti;
2641 }
2642 hash = tlp_mchash(enm->enm_addrlo, hashsize);
2643 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2644 ETHER_NEXT_MULTI(step, enm);
2645 }
2646
2647 if (ifp->if_flags & IFF_BROADCAST) {
2648 /* ...and the broadcast address. */
2649 hash = tlp_mchash(etherbroadcastaddr, hashsize);
2650 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2651 }
2652
2653 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) {
2654 /* ...and our station address. */
2655 hash = tlp_mchash(enaddr, hashsize);
2656 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2657 } else {
2658 /*
2659 * Hash-Perfect mode; put our station address after
2660 * the hash table.
2661 */
2662 sp[39] = TULIP_SP_FIELD(enaddr, 0);
2663 sp[40] = TULIP_SP_FIELD(enaddr, 1);
2664 sp[41] = TULIP_SP_FIELD(enaddr, 2);
2665 }
2666 ifp->if_flags &= ~IFF_ALLMULTI;
2667 goto setit;
2668
2669 allmulti:
2670 /*
2671 * Use Perfect filter mode. First address is the broadcast address,
2672 * and pad the rest with our station address. We'll set Pass-all-
2673 * multicast in OPMODE below.
2674 */
2675 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
2676 sp = TULIP_CDSP(sc);
2677 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2678 cnt = 0;
2679 if (ifp->if_flags & IFF_BROADCAST) {
2680 cnt++;
2681 *sp++ = TULIP_SP_FIELD_C(0xffff);
2682 *sp++ = TULIP_SP_FIELD_C(0xffff);
2683 *sp++ = TULIP_SP_FIELD_C(0xffff);
2684 }
2685 for (; cnt < TULIP_MAXADDRS; cnt++) {
2686 *sp++ = TULIP_SP_FIELD(enaddr, 0);
2687 *sp++ = TULIP_SP_FIELD(enaddr, 1);
2688 *sp++ = TULIP_SP_FIELD(enaddr, 2);
2689 }
2690 ifp->if_flags |= IFF_ALLMULTI;
2691
2692 setit:
2693 if (ifp->if_flags & IFF_ALLMULTI)
2694 sc->sc_opmode |= OPMODE_PM;
2695
2696 /* Sync the setup packet buffer. */
2697 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE);
2698
2699 /*
2700 * Fill in the setup packet descriptor.
2701 */
2702 txs = SIMPLEQ_FIRST(&sc->sc_txfreeq);
2703
2704 txs->txs_firstdesc = sc->sc_txnext;
2705 txs->txs_lastdesc = sc->sc_txnext;
2706 txs->txs_ndescs = 1;
2707 txs->txs_mbuf = NULL;
2708
2709 sc->sc_txdescs[sc->sc_txnext].td_bufaddr1 =
2710 htole32(TULIP_CDSPADDR(sc));
2711 sc->sc_txdescs[sc->sc_txnext].td_ctl =
2712 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) |
2713 sc->sc_filtmode | TDCTL_Tx_SET | sc->sc_setup_fsls |
2714 TDCTL_Tx_IC | sc->sc_tdctl_ch |
2715 (sc->sc_txnext == (TULIP_NTXDESC - 1) ? sc->sc_tdctl_er : 0));
2716 sc->sc_txdescs[sc->sc_txnext].td_status = htole32(TDSTAT_OWN);
2717 TULIP_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndescs,
2718 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2719
2720 /* Advance the tx pointer. */
2721 sc->sc_txfree -= 1;
2722 sc->sc_txnext = TULIP_NEXTTX(sc->sc_txnext);
2723
2724 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q);
2725 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
2726
2727 /*
2728 * Set the OPMODE register. This will also resume the
2729 * transmit transmit process we idled above.
2730 */
2731 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2732
2733 sc->sc_flags |= TULIPF_DOING_SETUP;
2734
2735 /*
2736 * Kick the transmitter; this will cause the Tulip to
2737 * read the setup descriptor.
2738 */
2739 /* XXX USE AUTOPOLLING? */
2740 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
2741
2742 /* Set up a watchdog timer in case the chip flakes out. */
2743 ifp->if_timer = 5;
2744
2745 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname));
2746 }
2747
2748 /*
2749 * tlp_winb_filter_setup:
2750 *
2751 * Set the Winbond 89C840F's receive filter.
2752 */
2753 void
2754 tlp_winb_filter_setup(sc)
2755 struct tulip_softc *sc;
2756 {
2757 struct ethercom *ec = &sc->sc_ethercom;
2758 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2759 struct ether_multi *enm;
2760 struct ether_multistep step;
2761 u_int32_t hash, mchash[2];
2762
2763 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n",
2764 sc->sc_dev.dv_xname, sc->sc_flags));
2765
2766 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP);
2767
2768 if (ifp->if_flags & IFF_MULTICAST)
2769 sc->sc_opmode |= OPMODE_WINB_AMP;
2770
2771 if (ifp->if_flags & IFF_BROADCAST)
2772 sc->sc_opmode |= OPMODE_WINB_ABP;
2773
2774 if (ifp->if_flags & IFF_PROMISC) {
2775 sc->sc_opmode |= OPMODE_WINB_APP;
2776 goto allmulti;
2777 }
2778
2779 mchash[0] = mchash[1] = 0;
2780
2781 ETHER_FIRST_MULTI(step, ec, enm);
2782 while (enm != NULL) {
2783 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2784 /*
2785 * We must listen to a range of multicast addresses.
2786 * For now, just accept all multicasts, rather than
2787 * trying to set only those filter bits needed to match
2788 * the range. (At this time, the only use of address
2789 * ranges is for IP multicast routing, for which the
2790 * range is big enough to require all bits set.)
2791 */
2792 goto allmulti;
2793 }
2794
2795 /*
2796 * According to the FreeBSD `wb' driver, yes, you
2797 * really do invert the hash.
2798 */
2799 hash =
2800 (~(ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26))
2801 & 0x3f;
2802 mchash[hash >> 5] |= 1 << (hash & 0x1f);
2803 ETHER_NEXT_MULTI(step, enm);
2804 }
2805 ifp->if_flags &= ~IFF_ALLMULTI;
2806 goto setit;
2807
2808 allmulti:
2809 ifp->if_flags |= IFF_ALLMULTI;
2810 mchash[0] = mchash[1] = 0xffffffff;
2811
2812 setit:
2813 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]);
2814 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]);
2815 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2816 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n",
2817 sc->sc_dev.dv_xname));
2818 }
2819
2820 /*
2821 * tlp_al981_filter_setup:
2822 *
2823 * Set the ADMtek AL981's receive filter.
2824 */
2825 void
2826 tlp_al981_filter_setup(sc)
2827 struct tulip_softc *sc;
2828 {
2829 struct ethercom *ec = &sc->sc_ethercom;
2830 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2831 struct ether_multi *enm;
2832 struct ether_multistep step;
2833 u_int32_t hash, mchash[2];
2834
2835 /*
2836 * If the chip is running, we need to reset the interface,
2837 * and will revisit here (with IFF_RUNNING) clear. The
2838 * chip seems to really not like to have its multicast
2839 * filter programmed without a reset.
2840 */
2841 if (ifp->if_flags & IFF_RUNNING) {
2842 (void) tlp_init(ifp);
2843 return;
2844 }
2845
2846 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n",
2847 sc->sc_dev.dv_xname, sc->sc_flags));
2848
2849 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
2850
2851 if (ifp->if_flags & IFF_PROMISC) {
2852 sc->sc_opmode |= OPMODE_PR;
2853 goto allmulti;
2854 }
2855
2856 mchash[0] = mchash[1] = 0;
2857
2858 ETHER_FIRST_MULTI(step, ec, enm);
2859 while (enm != NULL) {
2860 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2861 /*
2862 * We must listen to a range of multicast addresses.
2863 * For now, just accept all multicasts, rather than
2864 * trying to set only those filter bits needed to match
2865 * the range. (At this time, the only use of address
2866 * ranges is for IP multicast routing, for which the
2867 * range is big enough to require all bits set.)
2868 */
2869 goto allmulti;
2870 }
2871
2872 hash = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) & 0x3f;
2873 mchash[hash >> 5] |= 1 << (hash & 0x1f);
2874 ETHER_NEXT_MULTI(step, enm);
2875 }
2876 ifp->if_flags &= ~IFF_ALLMULTI;
2877 goto setit;
2878
2879 allmulti:
2880 ifp->if_flags |= IFF_ALLMULTI;
2881 mchash[0] = mchash[1] = 0xffffffff;
2882
2883 setit:
2884 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_MAR0, mchash[0]);
2885 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_MAR1, mchash[1]);
2886 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2887 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n",
2888 sc->sc_dev.dv_xname));
2889 }
2890
2891 /*
2892 * tlp_idle:
2893 *
2894 * Cause the transmit and/or receive processes to go idle.
2895 */
2896 void
2897 tlp_idle(sc, bits)
2898 struct tulip_softc *sc;
2899 u_int32_t bits;
2900 {
2901 static const char * const tlp_tx_state_names[] = {
2902 "STOPPED",
2903 "RUNNING - FETCH",
2904 "RUNNING - WAIT",
2905 "RUNNING - READING",
2906 "-- RESERVED --",
2907 "RUNNING - SETUP",
2908 "SUSPENDED",
2909 "RUNNING - CLOSE",
2910 };
2911 static const char * const tlp_rx_state_names[] = {
2912 "STOPPED",
2913 "RUNNING - FETCH",
2914 "RUNNING - CHECK",
2915 "RUNNING - WAIT",
2916 "SUSPENDED",
2917 "RUNNING - CLOSE",
2918 "RUNNING - FLUSH",
2919 "RUNNING - QUEUE",
2920 };
2921 static const char * const dm9102_tx_state_names[] = {
2922 "STOPPED",
2923 "RUNNING - FETCH",
2924 "RUNNING - SETUP",
2925 "RUNNING - READING",
2926 "RUNNING - CLOSE - CLEAR OWNER",
2927 "RUNNING - WAIT",
2928 "RUNNING - CLOSE - WRITE STATUS",
2929 "SUSPENDED",
2930 };
2931 static const char * const dm9102_rx_state_names[] = {
2932 "STOPPED",
2933 "RUNNING - FETCH",
2934 "RUNNING - WAIT",
2935 "RUNNING - QUEUE",
2936 "RUNNING - CLOSE - CLEAR OWNER",
2937 "RUNNING - CLOSE - WRITE STATUS",
2938 "SUSPENDED",
2939 "RUNNING - FLUSH",
2940 };
2941
2942 const char * const *tx_state_names, * const *rx_state_names;
2943 u_int32_t csr, ackmask = 0;
2944 int i;
2945
2946 switch (sc->sc_chip) {
2947 case TULIP_CHIP_DM9102:
2948 case TULIP_CHIP_DM9102A:
2949 tx_state_names = dm9102_tx_state_names;
2950 rx_state_names = dm9102_rx_state_names;
2951 break;
2952
2953 default:
2954 tx_state_names = tlp_tx_state_names;
2955 rx_state_names = tlp_rx_state_names;
2956 break;
2957 }
2958
2959 if (bits & OPMODE_ST)
2960 ackmask |= STATUS_TPS;
2961
2962 if (bits & OPMODE_SR)
2963 ackmask |= STATUS_RPS;
2964
2965 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits);
2966
2967 for (i = 0; i < 1000; i++) {
2968 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask)
2969 break;
2970 delay(10);
2971 }
2972
2973 csr = TULIP_READ(sc, CSR_STATUS);
2974 if ((csr & ackmask) != ackmask) {
2975 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 &&
2976 (csr & STATUS_TS) != STATUS_TS_STOPPED) {
2977 printf("%s: transmit process failed to idle: "
2978 "state %s\n", sc->sc_dev.dv_xname,
2979 tx_state_names[(csr & STATUS_TS) >> 20]);
2980 }
2981 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 &&
2982 (csr & STATUS_RS) != STATUS_RS_STOPPED) {
2983 switch (sc->sc_chip) {
2984 case TULIP_CHIP_AN983:
2985 case TULIP_CHIP_AN985:
2986 /*
2987 * Filter the message out on noisy chips.
2988 */
2989 break;
2990 default:
2991 printf("%s: receive process failed to idle: "
2992 "state %s\n", sc->sc_dev.dv_xname,
2993 rx_state_names[(csr & STATUS_RS) >> 17]);
2994 }
2995 }
2996 }
2997 TULIP_WRITE(sc, CSR_STATUS, ackmask);
2998 }
2999
3000 /*****************************************************************************
3001 * Generic media support functions.
3002 *****************************************************************************/
3003
3004 /*
3005 * tlp_mediastatus: [ifmedia interface function]
3006 *
3007 * Query the current media.
3008 */
3009 void
3010 tlp_mediastatus(ifp, ifmr)
3011 struct ifnet *ifp;
3012 struct ifmediareq *ifmr;
3013 {
3014 struct tulip_softc *sc = ifp->if_softc;
3015
3016 if (TULIP_IS_ENABLED(sc) == 0) {
3017 ifmr->ifm_active = IFM_ETHER | IFM_NONE;
3018 ifmr->ifm_status = 0;
3019 return;
3020 }
3021
3022 (*sc->sc_mediasw->tmsw_get)(sc, ifmr);
3023 }
3024
3025 /*
3026 * tlp_mediachange: [ifmedia interface function]
3027 *
3028 * Update the current media.
3029 */
3030 int
3031 tlp_mediachange(ifp)
3032 struct ifnet *ifp;
3033 {
3034 struct tulip_softc *sc = ifp->if_softc;
3035
3036 if ((ifp->if_flags & IFF_UP) == 0)
3037 return (0);
3038 return ((*sc->sc_mediasw->tmsw_set)(sc));
3039 }
3040
3041 /*****************************************************************************
3042 * Support functions for MII-attached media.
3043 *****************************************************************************/
3044
3045 /*
3046 * tlp_mii_tick:
3047 *
3048 * One second timer, used to tick the MII.
3049 */
3050 void
3051 tlp_mii_tick(arg)
3052 void *arg;
3053 {
3054 struct tulip_softc *sc = arg;
3055 int s;
3056
3057 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
3058 return;
3059
3060 s = splnet();
3061 mii_tick(&sc->sc_mii);
3062 splx(s);
3063
3064 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc);
3065 }
3066
3067 /*
3068 * tlp_mii_statchg: [mii interface function]
3069 *
3070 * Callback from PHY when media changes.
3071 */
3072 void
3073 tlp_mii_statchg(self)
3074 struct device *self;
3075 {
3076 struct tulip_softc *sc = (struct tulip_softc *)self;
3077
3078 /* Idle the transmit and receive processes. */
3079 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
3080
3081 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD);
3082
3083 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T)
3084 sc->sc_opmode |= OPMODE_TTM;
3085 else
3086 sc->sc_opmode |= OPMODE_HBD;
3087
3088 if (sc->sc_mii.mii_media_active & IFM_FDX)
3089 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD;
3090
3091 /*
3092 * Write new OPMODE bits. This also restarts the transmit
3093 * and receive processes.
3094 */
3095 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3096 }
3097
3098 /*
3099 * tlp_winb_mii_statchg: [mii interface function]
3100 *
3101 * Callback from PHY when media changes. This version is
3102 * for the Winbond 89C840F, which has different OPMODE bits.
3103 */
3104 void
3105 tlp_winb_mii_statchg(self)
3106 struct device *self;
3107 {
3108 struct tulip_softc *sc = (struct tulip_softc *)self;
3109
3110 /* Idle the transmit and receive processes. */
3111 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
3112
3113 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD);
3114
3115 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX)
3116 sc->sc_opmode |= OPMODE_WINB_FES;
3117
3118 if (sc->sc_mii.mii_media_active & IFM_FDX)
3119 sc->sc_opmode |= OPMODE_FD;
3120
3121 /*
3122 * Write new OPMODE bits. This also restarts the transmit
3123 * and receive processes.
3124 */
3125 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3126 }
3127
3128 /*
3129 * tlp_dm9102_mii_statchg: [mii interface function]
3130 *
3131 * Callback from PHY when media changes. This version is
3132 * for the DM9102.
3133 */
3134 void
3135 tlp_dm9102_mii_statchg(self)
3136 struct device *self;
3137 {
3138 struct tulip_softc *sc = (struct tulip_softc *)self;
3139
3140 /*
3141 * Don't idle the transmit and receive processes, here. It
3142 * seems to fail, and just causes excess noise.
3143 */
3144 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD);
3145
3146 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) != IFM_100_TX)
3147 sc->sc_opmode |= OPMODE_TTM;
3148
3149 if (sc->sc_mii.mii_media_active & IFM_FDX)
3150 sc->sc_opmode |= OPMODE_FD;
3151
3152 /*
3153 * Write new OPMODE bits.
3154 */
3155 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3156 }
3157
3158 /*
3159 * tlp_mii_getmedia:
3160 *
3161 * Callback from ifmedia to request current media status.
3162 */
3163 void
3164 tlp_mii_getmedia(sc, ifmr)
3165 struct tulip_softc *sc;
3166 struct ifmediareq *ifmr;
3167 {
3168
3169 mii_pollstat(&sc->sc_mii);
3170 ifmr->ifm_status = sc->sc_mii.mii_media_status;
3171 ifmr->ifm_active = sc->sc_mii.mii_media_active;
3172 }
3173
3174 /*
3175 * tlp_mii_setmedia:
3176 *
3177 * Callback from ifmedia to request new media setting.
3178 */
3179 int
3180 tlp_mii_setmedia(sc)
3181 struct tulip_softc *sc;
3182 {
3183 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
3184
3185 if (ifp->if_flags & IFF_UP) {
3186 switch (sc->sc_chip) {
3187 case TULIP_CHIP_21142:
3188 case TULIP_CHIP_21143:
3189 /* Disable the internal Nway engine. */
3190 TULIP_WRITE(sc, CSR_SIATXRX, 0);
3191 break;
3192
3193 default:
3194 /* Nothing. */
3195 break;
3196 }
3197 mii_mediachg(&sc->sc_mii);
3198 }
3199 return (0);
3200 }
3201
3202 /*
3203 * tlp_bitbang_mii_readreg:
3204 *
3205 * Read a PHY register via bit-bang'ing the MII.
3206 */
3207 int
3208 tlp_bitbang_mii_readreg(self, phy, reg)
3209 struct device *self;
3210 int phy, reg;
3211 {
3212 struct tulip_softc *sc = (void *) self;
3213
3214 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg));
3215 }
3216
3217 /*
3218 * tlp_bitbang_mii_writereg:
3219 *
3220 * Write a PHY register via bit-bang'ing the MII.
3221 */
3222 void
3223 tlp_bitbang_mii_writereg(self, phy, reg, val)
3224 struct device *self;
3225 int phy, reg, val;
3226 {
3227 struct tulip_softc *sc = (void *) self;
3228
3229 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val);
3230 }
3231
3232 /*
3233 * tlp_sio_mii_bitbang_read:
3234 *
3235 * Read the MII serial port for the MII bit-bang module.
3236 */
3237 u_int32_t
3238 tlp_sio_mii_bitbang_read(self)
3239 struct device *self;
3240 {
3241 struct tulip_softc *sc = (void *) self;
3242
3243 return (TULIP_READ(sc, CSR_MIIROM));
3244 }
3245
3246 /*
3247 * tlp_sio_mii_bitbang_write:
3248 *
3249 * Write the MII serial port for the MII bit-bang module.
3250 */
3251 void
3252 tlp_sio_mii_bitbang_write(self, val)
3253 struct device *self;
3254 u_int32_t val;
3255 {
3256 struct tulip_softc *sc = (void *) self;
3257
3258 TULIP_WRITE(sc, CSR_MIIROM, val);
3259 }
3260
3261 /*
3262 * tlp_pnic_mii_readreg:
3263 *
3264 * Read a PHY register on the Lite-On PNIC.
3265 */
3266 int
3267 tlp_pnic_mii_readreg(self, phy, reg)
3268 struct device *self;
3269 int phy, reg;
3270 {
3271 struct tulip_softc *sc = (void *) self;
3272 u_int32_t val;
3273 int i;
3274
3275 TULIP_WRITE(sc, CSR_PNIC_MII,
3276 PNIC_MII_MBO | PNIC_MII_RESERVED |
3277 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) |
3278 (reg << PNIC_MII_REGSHIFT));
3279
3280 for (i = 0; i < 1000; i++) {
3281 delay(10);
3282 val = TULIP_READ(sc, CSR_PNIC_MII);
3283 if ((val & PNIC_MII_BUSY) == 0) {
3284 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA)
3285 return (0);
3286 else
3287 return (val & PNIC_MII_DATA);
3288 }
3289 }
3290 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname);
3291 return (0);
3292 }
3293
3294 /*
3295 * tlp_pnic_mii_writereg:
3296 *
3297 * Write a PHY register on the Lite-On PNIC.
3298 */
3299 void
3300 tlp_pnic_mii_writereg(self, phy, reg, val)
3301 struct device *self;
3302 int phy, reg, val;
3303 {
3304 struct tulip_softc *sc = (void *) self;
3305 int i;
3306
3307 TULIP_WRITE(sc, CSR_PNIC_MII,
3308 PNIC_MII_MBO | PNIC_MII_RESERVED |
3309 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) |
3310 (reg << PNIC_MII_REGSHIFT) | val);
3311
3312 for (i = 0; i < 1000; i++) {
3313 delay(10);
3314 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0)
3315 return;
3316 }
3317 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname);
3318 }
3319
3320 const bus_addr_t tlp_al981_phy_regmap[] = {
3321 CSR_ADM_BMCR,
3322 CSR_ADM_BMSR,
3323 CSR_ADM_PHYIDR1,
3324 CSR_ADM_PHYIDR2,
3325 CSR_ADM_ANAR,
3326 CSR_ADM_ANLPAR,
3327 CSR_ADM_ANER,
3328
3329 CSR_ADM_XMC,
3330 CSR_ADM_XCIIS,
3331 CSR_ADM_XIE,
3332 CSR_ADM_100CTR,
3333 };
3334 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) /
3335 sizeof(tlp_al981_phy_regmap[0]);
3336
3337 /*
3338 * tlp_al981_mii_readreg:
3339 *
3340 * Read a PHY register on the ADMtek AL981.
3341 */
3342 int
3343 tlp_al981_mii_readreg(self, phy, reg)
3344 struct device *self;
3345 int phy, reg;
3346 {
3347 struct tulip_softc *sc = (struct tulip_softc *)self;
3348
3349 /* AL981 only has an internal PHY. */
3350 if (phy != 0)
3351 return (0);
3352
3353 if (reg >= tlp_al981_phy_regmap_size)
3354 return (0);
3355
3356 return (bus_space_read_4(sc->sc_st, sc->sc_sh,
3357 tlp_al981_phy_regmap[reg]) & 0xffff);
3358 }
3359
3360 /*
3361 * tlp_al981_mii_writereg:
3362 *
3363 * Write a PHY register on the ADMtek AL981.
3364 */
3365 void
3366 tlp_al981_mii_writereg(self, phy, reg, val)
3367 struct device *self;
3368 int phy, reg, val;
3369 {
3370 struct tulip_softc *sc = (struct tulip_softc *)self;
3371
3372 /* AL981 only has an internal PHY. */
3373 if (phy != 0)
3374 return;
3375
3376 if (reg >= tlp_al981_phy_regmap_size)
3377 return;
3378
3379 bus_space_write_4(sc->sc_st, sc->sc_sh,
3380 tlp_al981_phy_regmap[reg], val);
3381 }
3382
3383 /*****************************************************************************
3384 * Chip-specific pre-init and reset functions.
3385 *****************************************************************************/
3386
3387 /*
3388 * tlp_2114x_preinit:
3389 *
3390 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
3391 */
3392 void
3393 tlp_2114x_preinit(sc)
3394 struct tulip_softc *sc;
3395 {
3396 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3397 struct tulip_21x4x_media *tm = ife->ifm_aux;
3398
3399 /*
3400 * Whether or not we're in MII or SIA/SYM mode, the media info
3401 * contains the appropriate OPMODE bits.
3402 *
3403 * Note that if we have no media info, we are are doing
3404 * non-MII `auto'.
3405 *
3406 * Also, we always set the Must-Be-One bit.
3407 */
3408 if (tm == NULL) {
3409 #ifdef DIAGNOSTIC
3410 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
3411 panic("tlp_2114x_preinit: not IFM_AUTO");
3412 if (sc->sc_nway_active == NULL)
3413 panic("tlp_2114x_preinit: nway_active NULL");
3414 #endif
3415 tm = sc->sc_nway_active->ifm_aux;
3416 }
3417 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode;
3418
3419 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3420 }
3421
3422 /*
3423 * tlp_2114x_mii_preinit:
3424 *
3425 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
3426 * This version is used by boards which only have MII and don't have
3427 * an ISV SROM.
3428 */
3429 void
3430 tlp_2114x_mii_preinit(sc)
3431 struct tulip_softc *sc;
3432 {
3433
3434 /*
3435 * Always set the Must-Be-One bit, and Port Select (to select MII).
3436 * We'll never be called during a media change.
3437 */
3438 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS;
3439 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3440 }
3441
3442 /*
3443 * tlp_pnic_preinit:
3444 *
3445 * Pre-init function for the Lite-On 82c168 and 82c169.
3446 */
3447 void
3448 tlp_pnic_preinit(sc)
3449 struct tulip_softc *sc;
3450 {
3451
3452 if (sc->sc_flags & TULIPF_HAS_MII) {
3453 /*
3454 * MII case: just set the port-select bit; we will never
3455 * be called during a media change.
3456 */
3457 sc->sc_opmode |= OPMODE_PS;
3458 } else {
3459 /*
3460 * ENDEC/PCS/Nway mode; enable the Tx backoff counter.
3461 */
3462 sc->sc_opmode |= OPMODE_PNIC_TBEN;
3463 }
3464 }
3465
3466 /*
3467 * tlp_dm9102_preinit:
3468 *
3469 * Pre-init function for the Davicom DM9102.
3470 */
3471 void
3472 tlp_dm9102_preinit(sc)
3473 struct tulip_softc *sc;
3474 {
3475
3476 switch (sc->sc_chip) {
3477 case TULIP_CHIP_DM9102:
3478 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD|OPMODE_PS;
3479 break;
3480
3481 case TULIP_CHIP_DM9102A:
3482 /*
3483 * XXX Figure out how to actually deal with the HomePNA
3484 * XXX portion of the DM9102A.
3485 */
3486 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD;
3487 break;
3488
3489 default:
3490 /* Nothing. */
3491 break;
3492 }
3493
3494 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3495 }
3496
3497 /*
3498 * tlp_21140_reset:
3499 *
3500 * Issue a reset sequence on the 21140 via the GPIO facility.
3501 */
3502 void
3503 tlp_21140_reset(sc)
3504 struct tulip_softc *sc;
3505 {
3506 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3507 struct tulip_21x4x_media *tm = ife->ifm_aux;
3508 int i;
3509
3510 /* First, set the direction on the GPIO pins. */
3511 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
3512
3513 /* Now, issue the reset sequence. */
3514 for (i = 0; i < tm->tm_reset_length; i++) {
3515 delay(10);
3516 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]);
3517 }
3518
3519 /* Now, issue the selection sequence. */
3520 for (i = 0; i < tm->tm_gp_length; i++) {
3521 delay(10);
3522 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]);
3523 }
3524
3525 /* If there were no sequences, just lower the pins. */
3526 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0)
3527 TULIP_WRITE(sc, CSR_GPP, 0);
3528 }
3529
3530 /*
3531 * tlp_21142_reset:
3532 *
3533 * Issue a reset sequence on the 21142 via the GPIO facility.
3534 */
3535 void
3536 tlp_21142_reset(sc)
3537 struct tulip_softc *sc;
3538 {
3539 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3540 struct tulip_21x4x_media *tm = ife->ifm_aux;
3541 const u_int8_t *ncp;
3542 int i;
3543
3544 ncp = &sc->sc_srom[tm->tm_reset_offset];
3545 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) {
3546 delay(10);
3547 TULIP_WRITE(sc, CSR_SIAGEN,
3548 TULIP_ROM_GETW(ncp, 0) << 16);
3549 }
3550
3551 ncp = &sc->sc_srom[tm->tm_gp_offset];
3552 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) {
3553 delay(10);
3554 TULIP_WRITE(sc, CSR_SIAGEN,
3555 TULIP_ROM_GETW(ncp, 0) << 16);
3556 }
3557
3558 /* If there were no sequences, just lower the pins. */
3559 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
3560 delay(10);
3561 TULIP_WRITE(sc, CSR_SIAGEN, 0);
3562 }
3563 }
3564
3565 /*
3566 * tlp_pmac_reset:
3567 *
3568 * Reset routine for Macronix chips.
3569 */
3570 void
3571 tlp_pmac_reset(sc)
3572 struct tulip_softc *sc;
3573 {
3574
3575 switch (sc->sc_chip) {
3576 case TULIP_CHIP_82C115:
3577 case TULIP_CHIP_MX98715:
3578 case TULIP_CHIP_MX98715A:
3579 case TULIP_CHIP_MX98725:
3580 /*
3581 * Set the LED operating mode. This information is located
3582 * in the EEPROM at byte offset 0x77, per the MX98715A and
3583 * MX98725 application notes.
3584 */
3585 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24);
3586 break;
3587 case TULIP_CHIP_MX98715AEC_X:
3588 /*
3589 * Set the LED operating mode. This information is located
3590 * in the EEPROM at byte offset 0x76, per the MX98715AEC
3591 * application note.
3592 */
3593 TULIP_WRITE(sc, CSR_MIIROM, ((0xf & sc->sc_srom[0x76]) << 28)
3594 | ((0xf0 & sc->sc_srom[0x76]) << 20));
3595 break;
3596
3597 default:
3598 /* Nothing. */
3599 break;
3600 }
3601 }
3602
3603 /*
3604 * tlp_dm9102_reset:
3605 *
3606 * Reset routine for the Davicom DM9102.
3607 */
3608 void
3609 tlp_dm9102_reset(sc)
3610 struct tulip_softc *sc;
3611 {
3612
3613 TULIP_WRITE(sc, CSR_DM_PHYSTAT, DM_PHYSTAT_GEPC|DM_PHYSTAT_GPED);
3614 delay(100);
3615 TULIP_WRITE(sc, CSR_DM_PHYSTAT, 0);
3616 }
3617
3618 /*****************************************************************************
3619 * Chip/board-specific media switches. The ones here are ones that
3620 * are potentially common to multiple front-ends.
3621 *****************************************************************************/
3622
3623 /*
3624 * This table is a common place for all sorts of media information,
3625 * keyed off of the SROM media code for that media.
3626 *
3627 * Note that we explicitly configure the 21142/21143 to always advertise
3628 * NWay capabilities when using the UTP port.
3629 * XXX Actually, we don't yet.
3630 */
3631 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = {
3632 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0,
3633 "10baseT",
3634 0,
3635 { SIACONN_21040_10BASET,
3636 SIATXRX_21040_10BASET,
3637 SIAGEN_21040_10BASET },
3638
3639 { SIACONN_21041_10BASET,
3640 SIATXRX_21041_10BASET,
3641 SIAGEN_21041_10BASET },
3642
3643 { SIACONN_21142_10BASET,
3644 SIATXRX_21142_10BASET,
3645 SIAGEN_21142_10BASET } },
3646
3647 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0,
3648 "10base2",
3649 0,
3650 { 0,
3651 0,
3652 0 },
3653
3654 { SIACONN_21041_BNC,
3655 SIATXRX_21041_BNC,
3656 SIAGEN_21041_BNC },
3657
3658 { SIACONN_21142_BNC,
3659 SIATXRX_21142_BNC,
3660 SIAGEN_21142_BNC } },
3661
3662 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0,
3663 "10base5",
3664 0,
3665 { SIACONN_21040_AUI,
3666 SIATXRX_21040_AUI,
3667 SIAGEN_21040_AUI },
3668
3669 { SIACONN_21041_AUI,
3670 SIATXRX_21041_AUI,
3671 SIAGEN_21041_AUI },
3672
3673 { SIACONN_21142_AUI,
3674 SIATXRX_21142_AUI,
3675 SIAGEN_21142_AUI } },
3676
3677 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0,
3678 "100baseTX",
3679 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD,
3680 { 0,
3681 0,
3682 0 },
3683
3684 { 0,
3685 0,
3686 0 },
3687
3688 { 0,
3689 0,
3690 SIAGEN_ABM } },
3691
3692 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX,
3693 "10baseT-FDX",
3694 OPMODE_FD|OPMODE_HBD,
3695 { SIACONN_21040_10BASET_FDX,
3696 SIATXRX_21040_10BASET_FDX,
3697 SIAGEN_21040_10BASET_FDX },
3698
3699 { SIACONN_21041_10BASET_FDX,
3700 SIATXRX_21041_10BASET_FDX,
3701 SIAGEN_21041_10BASET_FDX },
3702
3703 { SIACONN_21142_10BASET_FDX,
3704 SIATXRX_21142_10BASET_FDX,
3705 SIAGEN_21142_10BASET_FDX } },
3706
3707 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX,
3708 "100baseTX-FDX",
3709 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD,
3710 { 0,
3711 0,
3712 0 },
3713
3714 { 0,
3715 0,
3716 0 },
3717
3718 { 0,
3719 0,
3720 SIAGEN_ABM } },
3721
3722 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0,
3723 "100baseT4",
3724 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD,
3725 { 0,
3726 0,
3727 0 },
3728
3729 { 0,
3730 0,
3731 0 },
3732
3733 { 0,
3734 0,
3735 SIAGEN_ABM } },
3736
3737 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0,
3738 "100baseFX",
3739 OPMODE_PS|OPMODE_PCS|OPMODE_HBD,
3740 { 0,
3741 0,
3742 0 },
3743
3744 { 0,
3745 0,
3746 0 },
3747
3748 { 0,
3749 0,
3750 SIAGEN_ABM } },
3751
3752 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX,
3753 "100baseFX-FDX",
3754 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD,
3755 { 0,
3756 0,
3757 0 },
3758
3759 { 0,
3760 0,
3761 0 },
3762
3763 { 0,
3764 0,
3765 SIAGEN_ABM } },
3766
3767 { 0, 0, 0,
3768 NULL,
3769 0,
3770 { 0,
3771 0,
3772 0 },
3773
3774 { 0,
3775 0,
3776 0 },
3777
3778 { 0,
3779 0,
3780 0 } },
3781 };
3782
3783 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t));
3784 void tlp_srom_media_info __P((struct tulip_softc *,
3785 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *));
3786 void tlp_add_srom_media __P((struct tulip_softc *, int,
3787 void (*)(struct tulip_softc *, struct ifmediareq *),
3788 int (*)(struct tulip_softc *), const u_int8_t *, int));
3789 void tlp_print_media __P((struct tulip_softc *));
3790 void tlp_nway_activate __P((struct tulip_softc *, int));
3791 void tlp_get_minst __P((struct tulip_softc *));
3792
3793 const struct tulip_srom_to_ifmedia *
3794 tlp_srom_to_ifmedia(sm)
3795 u_int8_t sm;
3796 {
3797 const struct tulip_srom_to_ifmedia *tsti;
3798
3799 for (tsti = tulip_srom_to_ifmedia_table;
3800 tsti->tsti_name != NULL; tsti++) {
3801 if (tsti->tsti_srom == sm)
3802 return (tsti);
3803 }
3804
3805 return (NULL);
3806 }
3807
3808 void
3809 tlp_srom_media_info(sc, tsti, tm)
3810 struct tulip_softc *sc;
3811 const struct tulip_srom_to_ifmedia *tsti;
3812 struct tulip_21x4x_media *tm;
3813 {
3814
3815 tm->tm_name = tsti->tsti_name;
3816 tm->tm_opmode = tsti->tsti_opmode;
3817
3818 switch (sc->sc_chip) {
3819 case TULIP_CHIP_DE425:
3820 case TULIP_CHIP_21040:
3821 tm->tm_sia = tsti->tsti_21040; /* struct assignment */
3822 break;
3823
3824 case TULIP_CHIP_21041:
3825 tm->tm_sia = tsti->tsti_21041; /* struct assignment */
3826 break;
3827
3828 case TULIP_CHIP_21142:
3829 case TULIP_CHIP_21143:
3830 case TULIP_CHIP_82C115:
3831 case TULIP_CHIP_MX98715:
3832 case TULIP_CHIP_MX98715A:
3833 case TULIP_CHIP_MX98715AEC_X:
3834 case TULIP_CHIP_MX98725:
3835 tm->tm_sia = tsti->tsti_21142; /* struct assignment */
3836 break;
3837
3838 default:
3839 /* Nothing. */
3840 break;
3841 }
3842 }
3843
3844 void
3845 tlp_add_srom_media(sc, type, get, set, list, cnt)
3846 struct tulip_softc *sc;
3847 int type;
3848 void (*get) __P((struct tulip_softc *, struct ifmediareq *));
3849 int (*set) __P((struct tulip_softc *));
3850 const u_int8_t *list;
3851 int cnt;
3852 {
3853 struct tulip_21x4x_media *tm;
3854 const struct tulip_srom_to_ifmedia *tsti;
3855 int i;
3856
3857 for (i = 0; i < cnt; i++) {
3858 tsti = tlp_srom_to_ifmedia(list[i]);
3859 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
3860 memset(tm, 0, sizeof(*tm));
3861 tlp_srom_media_info(sc, tsti, tm);
3862 tm->tm_type = type;
3863 tm->tm_get = get;
3864 tm->tm_set = set;
3865
3866 ifmedia_add(&sc->sc_mii.mii_media,
3867 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
3868 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
3869 }
3870 }
3871
3872 void
3873 tlp_print_media(sc)
3874 struct tulip_softc *sc;
3875 {
3876 struct ifmedia_entry *ife;
3877 struct tulip_21x4x_media *tm;
3878 const char *sep = "";
3879
3880 #define PRINT(str) printf("%s%s", sep, str); sep = ", "
3881
3882 printf("%s: ", sc->sc_dev.dv_xname);
3883 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
3884 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) {
3885 tm = ife->ifm_aux;
3886 if (tm == NULL) {
3887 #ifdef DIAGNOSTIC
3888 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
3889 panic("tlp_print_media");
3890 #endif
3891 PRINT("auto");
3892 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII &&
3893 tm->tm_type != TULIP_ROM_MB_21142_MII) {
3894 PRINT(tm->tm_name);
3895 }
3896 }
3897 printf("\n");
3898
3899 #undef PRINT
3900 }
3901
3902 void
3903 tlp_nway_activate(sc, media)
3904 struct tulip_softc *sc;
3905 int media;
3906 {
3907 struct ifmedia_entry *ife;
3908
3909 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0);
3910 #ifdef DIAGNOSTIC
3911 if (ife == NULL)
3912 panic("tlp_nway_activate");
3913 #endif
3914 sc->sc_nway_active = ife;
3915 }
3916
3917 void
3918 tlp_get_minst(sc)
3919 struct tulip_softc *sc;
3920 {
3921
3922 if ((sc->sc_media_seen &
3923 ~((1 << TULIP_ROM_MB_21140_MII) |
3924 (1 << TULIP_ROM_MB_21142_MII))) == 0) {
3925 /*
3926 * We have not yet seen any SIA/SYM media (but are
3927 * about to; that's why we're called!), so assign
3928 * the current media instance to be the `internal media'
3929 * instance, and advance it so any MII media gets a
3930 * fresh one (used to selecting/isolating a PHY).
3931 */
3932 sc->sc_tlp_minst = sc->sc_mii.mii_instance++;
3933 }
3934 }
3935
3936 /*
3937 * SIA Utility functions.
3938 */
3939 void tlp_sia_update_link __P((struct tulip_softc *));
3940 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *));
3941 int tlp_sia_set __P((struct tulip_softc *));
3942 void tlp_sia_fixup __P((struct tulip_softc *));
3943
3944 void
3945 tlp_sia_update_link(sc)
3946 struct tulip_softc *sc;
3947 {
3948 struct ifmedia_entry *ife;
3949 struct tulip_21x4x_media *tm;
3950 u_int32_t siastat;
3951
3952 ife = TULIP_CURRENT_MEDIA(sc);
3953 tm = ife->ifm_aux;
3954
3955 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID);
3956
3957 siastat = TULIP_READ(sc, CSR_SIASTAT);
3958
3959 /*
3960 * Note that when we do SIA link tests, we are assuming that
3961 * the chip is really in the mode that the current media setting
3962 * reflects. If we're not, then the link tests will not be
3963 * accurate!
3964 */
3965 switch (IFM_SUBTYPE(ife->ifm_media)) {
3966 case IFM_10_T:
3967 sc->sc_flags |= TULIPF_LINK_VALID;
3968 if ((siastat & SIASTAT_LS10) == 0)
3969 sc->sc_flags |= TULIPF_LINK_UP;
3970 break;
3971
3972 case IFM_100_TX:
3973 case IFM_100_T4:
3974 sc->sc_flags |= TULIPF_LINK_VALID;
3975 if ((siastat & SIASTAT_LS100) == 0)
3976 sc->sc_flags |= TULIPF_LINK_UP;
3977 break;
3978 }
3979
3980 switch (sc->sc_chip) {
3981 case TULIP_CHIP_21142:
3982 case TULIP_CHIP_21143:
3983 /*
3984 * On these chips, we can tell more information about
3985 * AUI/BNC. Note that the AUI/BNC selection is made
3986 * in a different register; for our purpose, it's all
3987 * AUI.
3988 */
3989 switch (IFM_SUBTYPE(ife->ifm_media)) {
3990 case IFM_10_2:
3991 case IFM_10_5:
3992 sc->sc_flags |= TULIPF_LINK_VALID;
3993 if (siastat & SIASTAT_ARA) {
3994 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA);
3995 sc->sc_flags |= TULIPF_LINK_UP;
3996 }
3997 break;
3998
3999 default:
4000 /*
4001 * If we're SYM media and can detect the link
4002 * via the GPIO facility, prefer that status
4003 * over LS100.
4004 */
4005 if (tm->tm_type == TULIP_ROM_MB_21143_SYM &&
4006 tm->tm_actmask != 0) {
4007 sc->sc_flags = (sc->sc_flags &
4008 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID;
4009 if (TULIP_ISSET(sc, CSR_SIAGEN,
4010 tm->tm_actmask) == tm->tm_actdata)
4011 sc->sc_flags |= TULIPF_LINK_UP;
4012 }
4013 }
4014 break;
4015
4016 default:
4017 /* Nothing. */
4018 break;
4019 }
4020 }
4021
4022 void
4023 tlp_sia_get(sc, ifmr)
4024 struct tulip_softc *sc;
4025 struct ifmediareq *ifmr;
4026 {
4027 struct ifmedia_entry *ife;
4028
4029 ifmr->ifm_status = 0;
4030
4031 tlp_sia_update_link(sc);
4032
4033 ife = TULIP_CURRENT_MEDIA(sc);
4034
4035 if (sc->sc_flags & TULIPF_LINK_VALID)
4036 ifmr->ifm_status |= IFM_AVALID;
4037 if (sc->sc_flags & TULIPF_LINK_UP)
4038 ifmr->ifm_status |= IFM_ACTIVE;
4039 ifmr->ifm_active = ife->ifm_media;
4040 }
4041
4042 void
4043 tlp_sia_fixup(sc)
4044 struct tulip_softc *sc;
4045 {
4046 struct ifmedia_entry *ife;
4047 struct tulip_21x4x_media *tm;
4048 u_int32_t siaconn, siatxrx, siagen;
4049
4050 switch (sc->sc_chip) {
4051 case TULIP_CHIP_82C115:
4052 case TULIP_CHIP_MX98713A:
4053 case TULIP_CHIP_MX98715:
4054 case TULIP_CHIP_MX98715A:
4055 case TULIP_CHIP_MX98715AEC_X:
4056 case TULIP_CHIP_MX98725:
4057 siaconn = PMAC_SIACONN_MASK;
4058 siatxrx = PMAC_SIATXRX_MASK;
4059 siagen = PMAC_SIAGEN_MASK;
4060 break;
4061
4062 default:
4063 /* No fixups required on any other chips. */
4064 return;
4065 }
4066
4067 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4068 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) {
4069 tm = ife->ifm_aux;
4070 if (tm == NULL)
4071 continue;
4072
4073 tm->tm_siaconn &= siaconn;
4074 tm->tm_siatxrx &= siatxrx;
4075 tm->tm_siagen &= siagen;
4076 }
4077 }
4078
4079 int
4080 tlp_sia_set(sc)
4081 struct tulip_softc *sc;
4082 {
4083 struct ifmedia_entry *ife;
4084 struct tulip_21x4x_media *tm;
4085
4086 ife = TULIP_CURRENT_MEDIA(sc);
4087 tm = ife->ifm_aux;
4088
4089 /*
4090 * XXX This appears to be necessary on a bunch of the clone chips.
4091 */
4092 delay(20000);
4093
4094 /*
4095 * Idle the chip.
4096 */
4097 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
4098
4099 /*
4100 * Program the SIA. It's important to write in this order,
4101 * resetting the SIA first.
4102 */
4103 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */
4104 delay(1000);
4105
4106 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx);
4107
4108 switch (sc->sc_chip) {
4109 case TULIP_CHIP_21142:
4110 case TULIP_CHIP_21143:
4111 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl);
4112 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata);
4113 break;
4114 default:
4115 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen);
4116 }
4117
4118 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn);
4119
4120 /*
4121 * Set the OPMODE bits for this media and write OPMODE.
4122 * This will resume the transmit and receive processes.
4123 */
4124 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
4125 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
4126
4127 return (0);
4128 }
4129
4130 /*
4131 * 21140 GPIO utility functions.
4132 */
4133 void tlp_21140_gpio_update_link __P((struct tulip_softc *));
4134 void tlp_21140_gpio_get __P((struct tulip_softc *sc,
4135 struct ifmediareq *ifmr));
4136 int tlp_21140_gpio_set __P((struct tulip_softc *sc));
4137
4138 void
4139 tlp_21140_gpio_update_link(sc)
4140 struct tulip_softc *sc;
4141 {
4142 struct ifmedia_entry *ife;
4143 struct tulip_21x4x_media *tm;
4144
4145 ife = TULIP_CURRENT_MEDIA(sc);
4146 tm = ife->ifm_aux;
4147
4148 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID);
4149
4150 if (tm->tm_actmask != 0) {
4151 sc->sc_flags |= TULIPF_LINK_VALID;
4152 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) ==
4153 tm->tm_actdata)
4154 sc->sc_flags |= TULIPF_LINK_UP;
4155 }
4156 }
4157
4158 void
4159 tlp_21140_gpio_get(sc, ifmr)
4160 struct tulip_softc *sc;
4161 struct ifmediareq *ifmr;
4162 {
4163 struct ifmedia_entry *ife;
4164
4165 ifmr->ifm_status = 0;
4166
4167 tlp_21140_gpio_update_link(sc);
4168
4169 ife = TULIP_CURRENT_MEDIA(sc);
4170
4171 if (sc->sc_flags & TULIPF_LINK_VALID)
4172 ifmr->ifm_status |= IFM_AVALID;
4173 if (sc->sc_flags & TULIPF_LINK_UP)
4174 ifmr->ifm_status |= IFM_ACTIVE;
4175 ifmr->ifm_active = ife->ifm_media;
4176 }
4177
4178 int
4179 tlp_21140_gpio_set(sc)
4180 struct tulip_softc *sc;
4181 {
4182 struct ifmedia_entry *ife;
4183 struct tulip_21x4x_media *tm;
4184
4185 ife = TULIP_CURRENT_MEDIA(sc);
4186 tm = ife->ifm_aux;
4187
4188 /*
4189 * Idle the chip.
4190 */
4191 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
4192
4193 /*
4194 * Set the GPIO pins for this media, to flip any
4195 * relays, etc.
4196 */
4197 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
4198 delay(10);
4199 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata);
4200
4201 /*
4202 * Set the OPMODE bits for this media and write OPMODE.
4203 * This will resume the transmit and receive processes.
4204 */
4205 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
4206 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
4207
4208 return (0);
4209 }
4210
4211 /*
4212 * 21040 and 21041 media switches.
4213 */
4214 void tlp_21040_tmsw_init __P((struct tulip_softc *));
4215 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *));
4216 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *));
4217 void tlp_21041_tmsw_init __P((struct tulip_softc *));
4218
4219 const struct tulip_mediasw tlp_21040_mediasw = {
4220 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set
4221 };
4222
4223 const struct tulip_mediasw tlp_21040_tp_mediasw = {
4224 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set
4225 };
4226
4227 const struct tulip_mediasw tlp_21040_auibnc_mediasw = {
4228 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set
4229 };
4230
4231 const struct tulip_mediasw tlp_21041_mediasw = {
4232 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set
4233 };
4234
4235
4236 void
4237 tlp_21040_tmsw_init(sc)
4238 struct tulip_softc *sc;
4239 {
4240 static const u_int8_t media[] = {
4241 TULIP_ROM_MB_MEDIA_TP,
4242 TULIP_ROM_MB_MEDIA_TP_FDX,
4243 TULIP_ROM_MB_MEDIA_AUI,
4244 };
4245 struct tulip_21x4x_media *tm;
4246
4247 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4248 tlp_mediastatus);
4249
4250 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3);
4251
4252 /*
4253 * No SROM type for External SIA.
4254 */
4255 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4256 memset(tm, 0, sizeof(*tm));
4257 tm->tm_name = "manual";
4258 tm->tm_opmode = 0;
4259 tm->tm_siaconn = SIACONN_21040_EXTSIA;
4260 tm->tm_siatxrx = SIATXRX_21040_EXTSIA;
4261 tm->tm_siagen = SIAGEN_21040_EXTSIA;
4262 ifmedia_add(&sc->sc_mii.mii_media,
4263 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm);
4264
4265 /*
4266 * XXX Autosense not yet supported.
4267 */
4268
4269 /* XXX This should be auto-sense. */
4270 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4271
4272 tlp_print_media(sc);
4273 }
4274
4275 void
4276 tlp_21040_tp_tmsw_init(sc)
4277 struct tulip_softc *sc;
4278 {
4279 static const u_int8_t media[] = {
4280 TULIP_ROM_MB_MEDIA_TP,
4281 TULIP_ROM_MB_MEDIA_TP_FDX,
4282 };
4283
4284 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4285 tlp_mediastatus);
4286
4287 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2);
4288
4289 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4290
4291 tlp_print_media(sc);
4292 }
4293
4294 void
4295 tlp_21040_auibnc_tmsw_init(sc)
4296 struct tulip_softc *sc;
4297 {
4298 static const u_int8_t media[] = {
4299 TULIP_ROM_MB_MEDIA_AUI,
4300 };
4301
4302 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4303 tlp_mediastatus);
4304
4305 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1);
4306
4307 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5);
4308
4309 tlp_print_media(sc);
4310 }
4311
4312 void
4313 tlp_21041_tmsw_init(sc)
4314 struct tulip_softc *sc;
4315 {
4316 static const u_int8_t media[] = {
4317 TULIP_ROM_MB_MEDIA_TP,
4318 TULIP_ROM_MB_MEDIA_TP_FDX,
4319 TULIP_ROM_MB_MEDIA_BNC,
4320 TULIP_ROM_MB_MEDIA_AUI,
4321 };
4322 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt;
4323 const struct tulip_srom_to_ifmedia *tsti;
4324 struct tulip_21x4x_media *tm;
4325 u_int16_t romdef;
4326 u_int8_t mb;
4327
4328 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4329 tlp_mediastatus);
4330
4331 if (tlp_isv_srom(sc->sc_srom) == 0) {
4332 not_isv_srom:
4333 /*
4334 * If we have a board without the standard 21041 SROM format,
4335 * we just assume all media are present and try and pick a
4336 * reasonable default.
4337 */
4338 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4);
4339
4340 /*
4341 * XXX Autosense not yet supported.
4342 */
4343
4344 /* XXX This should be auto-sense. */
4345 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4346
4347 tlp_print_media(sc);
4348 return;
4349 }
4350
4351 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
4352 for (i = 0; i < devcnt; i++) {
4353 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
4354 break;
4355 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
4356 sc->sc_devno)
4357 break;
4358 }
4359
4360 if (i == devcnt)
4361 goto not_isv_srom;
4362
4363 leaf_offset = TULIP_ROM_GETW(sc->sc_srom,
4364 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i));
4365 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE;
4366 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT];
4367
4368 for (; m_cnt != 0;
4369 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) {
4370 mb = sc->sc_srom[mb_offset];
4371 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4372 memset(tm, 0, sizeof(*tm));
4373 switch (mb & TULIP_ROM_MB_MEDIA_CODE) {
4374 case TULIP_ROM_MB_MEDIA_TP_FDX:
4375 case TULIP_ROM_MB_MEDIA_TP:
4376 case TULIP_ROM_MB_MEDIA_BNC:
4377 case TULIP_ROM_MB_MEDIA_AUI:
4378 tsti = tlp_srom_to_ifmedia(mb &
4379 TULIP_ROM_MB_MEDIA_CODE);
4380
4381 tlp_srom_media_info(sc, tsti, tm);
4382
4383 /*
4384 * Override our default SIA settings if the
4385 * SROM contains its own.
4386 */
4387 if (mb & TULIP_ROM_MB_EXT) {
4388 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom,
4389 mb_offset + TULIP_ROM_MB_CSR13);
4390 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom,
4391 mb_offset + TULIP_ROM_MB_CSR14);
4392 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom,
4393 mb_offset + TULIP_ROM_MB_CSR15);
4394 }
4395
4396 ifmedia_add(&sc->sc_mii.mii_media,
4397 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4398 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4399 break;
4400
4401 default:
4402 printf("%s: unknown media code 0x%02x\n",
4403 sc->sc_dev.dv_xname,
4404 mb & TULIP_ROM_MB_MEDIA_CODE);
4405 free(tm, M_DEVBUF);
4406 }
4407 }
4408
4409 /*
4410 * XXX Autosense not yet supported.
4411 */
4412
4413 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset +
4414 TULIP_ROM_IL_SELECT_CONN_TYPE);
4415 switch (romdef) {
4416 case SELECT_CONN_TYPE_TP:
4417 case SELECT_CONN_TYPE_TP_AUTONEG:
4418 case SELECT_CONN_TYPE_TP_NOLINKPASS:
4419 defmedia = IFM_ETHER|IFM_10_T;
4420 break;
4421
4422 case SELECT_CONN_TYPE_TP_FDX:
4423 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX;
4424 break;
4425
4426 case SELECT_CONN_TYPE_BNC:
4427 defmedia = IFM_ETHER|IFM_10_2;
4428 break;
4429
4430 case SELECT_CONN_TYPE_AUI:
4431 defmedia = IFM_ETHER|IFM_10_5;
4432 break;
4433 #if 0 /* XXX */
4434 case SELECT_CONN_TYPE_ASENSE:
4435 case SELECT_CONN_TYPE_ASENSE_AUTONEG:
4436 defmedia = IFM_ETHER|IFM_AUTO;
4437 break;
4438 #endif
4439 default:
4440 defmedia = 0;
4441 }
4442
4443 if (defmedia == 0) {
4444 /*
4445 * XXX We should default to auto-sense.
4446 */
4447 defmedia = IFM_ETHER|IFM_10_T;
4448 }
4449
4450 ifmedia_set(&sc->sc_mii.mii_media, defmedia);
4451
4452 tlp_print_media(sc);
4453 }
4454
4455 /*
4456 * DECchip 2114x ISV media switch.
4457 */
4458 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *));
4459 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
4460 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *));
4461
4462 const struct tulip_mediasw tlp_2114x_isv_mediasw = {
4463 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set
4464 };
4465
4466 void
4467 tlp_2114x_isv_tmsw_init(sc)
4468 struct tulip_softc *sc;
4469 {
4470 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4471 struct ifmedia_entry *ife;
4472 struct mii_softc *phy;
4473 struct tulip_21x4x_media *tm;
4474 const struct tulip_srom_to_ifmedia *tsti;
4475 int i, devcnt, leaf_offset, m_cnt, type, length;
4476 int defmedia, miidef;
4477 u_int16_t word;
4478 u_int8_t *cp, *ncp;
4479
4480 defmedia = miidef = 0;
4481
4482 sc->sc_mii.mii_ifp = ifp;
4483 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
4484 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
4485 sc->sc_mii.mii_statchg = sc->sc_statchg;
4486
4487 /*
4488 * Ignore `instance'; we may get a mixture of SIA and MII
4489 * media, and `instance' is used to isolate or select the
4490 * PHY on the MII as appropriate. Note that duplicate media
4491 * are disallowed, so ignoring `instance' is safe.
4492 */
4493 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange,
4494 tlp_mediastatus);
4495
4496 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
4497 for (i = 0; i < devcnt; i++) {
4498 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
4499 break;
4500 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
4501 sc->sc_devno)
4502 break;
4503 }
4504
4505 if (i == devcnt) {
4506 printf("%s: unable to locate info leaf in SROM\n",
4507 sc->sc_dev.dv_xname);
4508 return;
4509 }
4510
4511 leaf_offset = TULIP_ROM_GETW(sc->sc_srom,
4512 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i));
4513
4514 /* XXX SELECT CONN TYPE */
4515
4516 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT];
4517
4518 /*
4519 * On some chips, the first thing in the Info Leaf is the
4520 * GPIO pin direction data.
4521 */
4522 switch (sc->sc_chip) {
4523 case TULIP_CHIP_21140:
4524 case TULIP_CHIP_21140A:
4525 case TULIP_CHIP_MX98713:
4526 case TULIP_CHIP_AX88140:
4527 case TULIP_CHIP_AX88141:
4528 sc->sc_gp_dir = *cp++;
4529 break;
4530
4531 default:
4532 /* Nothing. */
4533 break;
4534 }
4535
4536 /* Get the media count. */
4537 m_cnt = *cp++;
4538
4539 for (; m_cnt != 0; cp = ncp, m_cnt--) {
4540 /*
4541 * Determine the type and length of this media block.
4542 */
4543 if ((*cp & 0x80) == 0) {
4544 length = 4;
4545 type = TULIP_ROM_MB_21140_GPR;
4546 } else {
4547 length = (*cp++ & 0x7f) - 1;
4548 type = *cp++ & 0x3f;
4549 }
4550
4551 /* Compute the start of the next block. */
4552 ncp = cp + length;
4553
4554 /* Now, parse the block. */
4555 switch (type) {
4556 case TULIP_ROM_MB_21140_GPR:
4557 tlp_get_minst(sc);
4558 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR;
4559
4560 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4561 memset(tm, 0, sizeof(*tm));
4562
4563 tm->tm_type = TULIP_ROM_MB_21140_GPR;
4564 tm->tm_get = tlp_21140_gpio_get;
4565 tm->tm_set = tlp_21140_gpio_set;
4566
4567 /* First is the media type code. */
4568 tsti = tlp_srom_to_ifmedia(cp[0] &
4569 TULIP_ROM_MB_MEDIA_CODE);
4570 if (tsti == NULL) {
4571 /* Invalid media code. */
4572 free(tm, M_DEVBUF);
4573 break;
4574 }
4575
4576 /* Get defaults. */
4577 tlp_srom_media_info(sc, tsti, tm);
4578
4579 /* Next is any GPIO info for this media. */
4580 tm->tm_gpdata = cp[1];
4581
4582 /*
4583 * Next is a word containing OPMODE information
4584 * and info on how to detect if this media is
4585 * active.
4586 */
4587 word = TULIP_ROM_GETW(cp, 2);
4588 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word);
4589 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
4590 tm->tm_actmask =
4591 TULIP_ROM_MB_BITPOS(word);
4592 tm->tm_actdata =
4593 (word & TULIP_ROM_MB_POLARITY) ?
4594 0 : tm->tm_actmask;
4595 }
4596
4597 ifmedia_add(&sc->sc_mii.mii_media,
4598 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4599 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4600 break;
4601
4602 case TULIP_ROM_MB_21140_MII:
4603 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII;
4604
4605 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4606 memset(tm, 0, sizeof(*tm));
4607
4608 tm->tm_type = TULIP_ROM_MB_21140_MII;
4609 tm->tm_get = tlp_mii_getmedia;
4610 tm->tm_set = tlp_mii_setmedia;
4611 tm->tm_opmode = OPMODE_PS;
4612
4613 if (sc->sc_reset == NULL)
4614 sc->sc_reset = tlp_21140_reset;
4615
4616 /* First is the PHY number. */
4617 tm->tm_phyno = *cp++;
4618
4619 /* Next is the MII select sequence length and offset. */
4620 tm->tm_gp_length = *cp++;
4621 tm->tm_gp_offset = cp - &sc->sc_srom[0];
4622 cp += tm->tm_gp_length;
4623
4624 /* Next is the MII reset sequence length and offset. */
4625 tm->tm_reset_length = *cp++;
4626 tm->tm_reset_offset = cp - &sc->sc_srom[0];
4627 cp += tm->tm_reset_length;
4628
4629 /*
4630 * The following items are left in the media block
4631 * that we don't particularly care about:
4632 *
4633 * capabilities W
4634 * advertisement W
4635 * full duplex W
4636 * tx threshold W
4637 *
4638 * These appear to be bits in the PHY registers,
4639 * which our MII code handles on its own.
4640 */
4641
4642 /*
4643 * Before we probe the MII bus, we need to reset
4644 * it and issue the selection sequence.
4645 */
4646
4647 /* Set the direction of the pins... */
4648 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
4649
4650 for (i = 0; i < tm->tm_reset_length; i++) {
4651 delay(10);
4652 TULIP_WRITE(sc, CSR_GPP,
4653 sc->sc_srom[tm->tm_reset_offset + i]);
4654 }
4655
4656 for (i = 0; i < tm->tm_gp_length; i++) {
4657 delay(10);
4658 TULIP_WRITE(sc, CSR_GPP,
4659 sc->sc_srom[tm->tm_gp_offset + i]);
4660 }
4661
4662 /* If there were no sequences, just lower the pins. */
4663 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
4664 delay(10);
4665 TULIP_WRITE(sc, CSR_GPP, 0);
4666 }
4667
4668 /*
4669 * Now, probe the MII for the PHY. Note, we know
4670 * the location of the PHY on the bus, but we don't
4671 * particularly care; the MII code just likes to
4672 * search the whole thing anyhow.
4673 */
4674 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4675 MII_PHY_ANY, tm->tm_phyno, 0);
4676
4677 /*
4678 * Now, search for the PHY we hopefully just
4679 * configured. If it's not configured into the
4680 * kernel, we lose. The PHY's default media always
4681 * takes priority.
4682 */
4683 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys);
4684 phy != NULL;
4685 phy = LIST_NEXT(phy, mii_list))
4686 if (phy->mii_offset == tm->tm_phyno)
4687 break;
4688 if (phy == NULL) {
4689 printf("%s: unable to configure MII\n",
4690 sc->sc_dev.dv_xname);
4691 break;
4692 }
4693
4694 sc->sc_flags |= TULIPF_HAS_MII;
4695 sc->sc_tick = tlp_mii_tick;
4696 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0,
4697 phy->mii_inst);
4698
4699 /*
4700 * Okay, now that we've found the PHY and the MII
4701 * layer has added all of the media associated
4702 * with that PHY, we need to traverse the media
4703 * list, and add our `tm' to each entry's `aux'
4704 * pointer.
4705 *
4706 * We do this by looking for media with our
4707 * PHY's `instance'.
4708 */
4709 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4710 ife != NULL;
4711 ife = TAILQ_NEXT(ife, ifm_list)) {
4712 if (IFM_INST(ife->ifm_media) != phy->mii_inst)
4713 continue;
4714 ife->ifm_aux = tm;
4715 }
4716 break;
4717
4718 case TULIP_ROM_MB_21142_SIA:
4719 tlp_get_minst(sc);
4720 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA;
4721
4722 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4723 memset(tm, 0, sizeof(*tm));
4724
4725 tm->tm_type = TULIP_ROM_MB_21142_SIA;
4726 tm->tm_get = tlp_sia_get;
4727 tm->tm_set = tlp_sia_set;
4728
4729 /* First is the media type code. */
4730 tsti = tlp_srom_to_ifmedia(cp[0] &
4731 TULIP_ROM_MB_MEDIA_CODE);
4732 if (tsti == NULL) {
4733 /* Invalid media code. */
4734 free(tm, M_DEVBUF);
4735 break;
4736 }
4737
4738 /* Get defaults. */
4739 tlp_srom_media_info(sc, tsti, tm);
4740
4741 /*
4742 * Override our default SIA settings if the
4743 * SROM contains its own.
4744 */
4745 if (cp[0] & 0x40) {
4746 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1);
4747 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3);
4748 tm->tm_siagen = TULIP_ROM_GETW(cp, 5);
4749 cp += 7;
4750 } else
4751 cp++;
4752
4753 /* Next is GPIO control/data. */
4754 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0);
4755 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2);
4756
4757 ifmedia_add(&sc->sc_mii.mii_media,
4758 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4759 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4760 break;
4761
4762 case TULIP_ROM_MB_21142_MII:
4763 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII;
4764
4765 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4766 memset(tm, 0, sizeof(*tm));
4767
4768 tm->tm_type = TULIP_ROM_MB_21142_MII;
4769 tm->tm_get = tlp_mii_getmedia;
4770 tm->tm_set = tlp_mii_setmedia;
4771 tm->tm_opmode = OPMODE_PS;
4772
4773 if (sc->sc_reset == NULL)
4774 sc->sc_reset = tlp_21142_reset;
4775
4776 /* First is the PHY number. */
4777 tm->tm_phyno = *cp++;
4778
4779 /* Next is the MII select sequence length and offset. */
4780 tm->tm_gp_length = *cp++;
4781 tm->tm_gp_offset = cp - &sc->sc_srom[0];
4782 cp += tm->tm_gp_length * 2;
4783
4784 /* Next is the MII reset sequence length and offset. */
4785 tm->tm_reset_length = *cp++;
4786 tm->tm_reset_offset = cp - &sc->sc_srom[0];
4787 cp += tm->tm_reset_length * 2;
4788
4789 /*
4790 * The following items are left in the media block
4791 * that we don't particularly care about:
4792 *
4793 * capabilities W
4794 * advertisement W
4795 * full duplex W
4796 * tx threshold W
4797 * MII interrupt W
4798 *
4799 * These appear to be bits in the PHY registers,
4800 * which our MII code handles on its own.
4801 */
4802
4803 /*
4804 * Before we probe the MII bus, we need to reset
4805 * it and issue the selection sequence.
4806 */
4807
4808 ncp = &sc->sc_srom[tm->tm_reset_offset];
4809 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) {
4810 delay(10);
4811 TULIP_WRITE(sc, CSR_SIAGEN,
4812 TULIP_ROM_GETW(ncp, 0) << 16);
4813 }
4814
4815 ncp = &sc->sc_srom[tm->tm_gp_offset];
4816 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) {
4817 delay(10);
4818 TULIP_WRITE(sc, CSR_SIAGEN,
4819 TULIP_ROM_GETW(ncp, 0) << 16);
4820 }
4821
4822 /* If there were no sequences, just lower the pins. */
4823 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
4824 delay(10);
4825 TULIP_WRITE(sc, CSR_SIAGEN, 0);
4826 }
4827
4828 /*
4829 * Now, probe the MII for the PHY. Note, we know
4830 * the location of the PHY on the bus, but we don't
4831 * particularly care; the MII code just likes to
4832 * search the whole thing anyhow.
4833 */
4834 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4835 MII_PHY_ANY, tm->tm_phyno, 0);
4836
4837 /*
4838 * Now, search for the PHY we hopefully just
4839 * configured. If it's not configured into the
4840 * kernel, we lose. The PHY's default media always
4841 * takes priority.
4842 */
4843 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys);
4844 phy != NULL;
4845 phy = LIST_NEXT(phy, mii_list))
4846 if (phy->mii_offset == tm->tm_phyno)
4847 break;
4848 if (phy == NULL) {
4849 printf("%s: unable to configure MII\n",
4850 sc->sc_dev.dv_xname);
4851 break;
4852 }
4853
4854 sc->sc_flags |= TULIPF_HAS_MII;
4855 sc->sc_tick = tlp_mii_tick;
4856 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0,
4857 phy->mii_inst);
4858
4859 /*
4860 * Okay, now that we've found the PHY and the MII
4861 * layer has added all of the media associated
4862 * with that PHY, we need to traverse the media
4863 * list, and add our `tm' to each entry's `aux'
4864 * pointer.
4865 *
4866 * We do this by looking for media with our
4867 * PHY's `instance'.
4868 */
4869 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4870 ife != NULL;
4871 ife = TAILQ_NEXT(ife, ifm_list)) {
4872 if (IFM_INST(ife->ifm_media) != phy->mii_inst)
4873 continue;
4874 ife->ifm_aux = tm;
4875 }
4876 break;
4877
4878 case TULIP_ROM_MB_21143_SYM:
4879 tlp_get_minst(sc);
4880 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM;
4881
4882 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4883 memset(tm, 0, sizeof(*tm));
4884
4885 tm->tm_type = TULIP_ROM_MB_21143_SYM;
4886 tm->tm_get = tlp_sia_get;
4887 tm->tm_set = tlp_sia_set;
4888
4889 /* First is the media type code. */
4890 tsti = tlp_srom_to_ifmedia(cp[0] &
4891 TULIP_ROM_MB_MEDIA_CODE);
4892 if (tsti == NULL) {
4893 /* Invalid media code. */
4894 free(tm, M_DEVBUF);
4895 break;
4896 }
4897
4898 /* Get defaults. */
4899 tlp_srom_media_info(sc, tsti, tm);
4900
4901 /* Next is GPIO control/data. */
4902 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1);
4903 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3);
4904
4905 /*
4906 * Next is a word containing OPMODE information
4907 * and info on how to detect if this media is
4908 * active.
4909 */
4910 word = TULIP_ROM_GETW(cp, 5);
4911 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word);
4912 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
4913 tm->tm_actmask =
4914 TULIP_ROM_MB_BITPOS(word);
4915 tm->tm_actdata =
4916 (word & TULIP_ROM_MB_POLARITY) ?
4917 0 : tm->tm_actmask;
4918 }
4919
4920 ifmedia_add(&sc->sc_mii.mii_media,
4921 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4922 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4923 break;
4924
4925 case TULIP_ROM_MB_21143_RESET:
4926 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname);
4927 break;
4928
4929 default:
4930 printf("%s: unknown ISV media block type 0x%02x\n",
4931 sc->sc_dev.dv_xname, type);
4932 }
4933 }
4934
4935 /*
4936 * Deal with the case where no media is configured.
4937 */
4938 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) {
4939 printf("%s: no media found!\n", sc->sc_dev.dv_xname);
4940 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
4941 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
4942 return;
4943 }
4944
4945 /*
4946 * Pick the default media.
4947 */
4948 if (miidef != 0)
4949 defmedia = miidef;
4950 else {
4951 /*
4952 * XXX Pick a better default. Should come from SROM
4953 * XXX on 21140[A], and should be "auto" on 21142,
4954 * XXX 21143, and Macronix chips.
4955 */
4956 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0);
4957 }
4958
4959 ifmedia_set(&sc->sc_mii.mii_media, defmedia);
4960
4961 /*
4962 * Display any non-MII media we've located.
4963 */
4964 if (sc->sc_media_seen &
4965 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII)))
4966 tlp_print_media(sc);
4967
4968 tlp_sia_fixup(sc);
4969 }
4970
4971 void
4972 tlp_2114x_isv_tmsw_get(sc, ifmr)
4973 struct tulip_softc *sc;
4974 struct ifmediareq *ifmr;
4975 {
4976 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
4977 struct tulip_21x4x_media *tm = ife->ifm_aux;
4978
4979 /*
4980 * We might be polling a non-MII autosense; check for that.
4981 */
4982 if (tm == NULL) {
4983 #ifdef DIAGNOSTIC
4984 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
4985 panic("tlp_2114x_isv_tmsw_get");
4986 #endif
4987 tm = sc->sc_nway_active->ifm_aux;
4988 }
4989
4990 (*tm->tm_get)(sc, ifmr);
4991 }
4992
4993 int
4994 tlp_2114x_isv_tmsw_set(sc)
4995 struct tulip_softc *sc;
4996 {
4997 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
4998 struct tulip_21x4x_media *tm = ife->ifm_aux;
4999
5000 /*
5001 * We might be setting a non-MII autosense; check for that.
5002 */
5003 if (tm == NULL) {
5004 #ifdef DIAGNOSTIC
5005 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
5006 panic("tlp_2114x_isv_tmsw_set");
5007 #endif
5008 /* XXX XXX XXX */
5009 }
5010
5011 /*
5012 * Check to see if we need to reset the chip, and do it. The
5013 * reset path will get the OPMODE register right the next
5014 * time through.
5015 */
5016 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode))
5017 return (tlp_init(&sc->sc_ethercom.ec_if));
5018
5019 return ((*tm->tm_set)(sc));
5020 }
5021
5022 /*
5023 * MII-on-SIO media switch. Handles only MII attached to the SIO.
5024 */
5025 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *));
5026
5027 const struct tulip_mediasw tlp_sio_mii_mediasw = {
5028 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5029 };
5030
5031 void
5032 tlp_sio_mii_tmsw_init(sc)
5033 struct tulip_softc *sc;
5034 {
5035 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5036
5037 /*
5038 * We don't attach any media info structures to the ifmedia
5039 * entries, so if we're using a pre-init function that needs
5040 * that info, override it to one that doesn't.
5041 */
5042 if (sc->sc_preinit == tlp_2114x_preinit)
5043 sc->sc_preinit = tlp_2114x_mii_preinit;
5044
5045 sc->sc_mii.mii_ifp = ifp;
5046 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5047 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5048 sc->sc_mii.mii_statchg = sc->sc_statchg;
5049 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5050 tlp_mediastatus);
5051 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5052 MII_OFFSET_ANY, 0);
5053 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5054 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5055 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5056 } else {
5057 sc->sc_flags |= TULIPF_HAS_MII;
5058 sc->sc_tick = tlp_mii_tick;
5059 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5060 }
5061 }
5062
5063 /*
5064 * Lite-On PNIC media switch. Must handle MII or internal NWAY.
5065 */
5066 void tlp_pnic_tmsw_init __P((struct tulip_softc *));
5067 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
5068 int tlp_pnic_tmsw_set __P((struct tulip_softc *));
5069
5070 const struct tulip_mediasw tlp_pnic_mediasw = {
5071 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set
5072 };
5073
5074 void tlp_pnic_nway_statchg __P((struct device *));
5075 void tlp_pnic_nway_tick __P((void *));
5076 int tlp_pnic_nway_service __P((struct tulip_softc *, int));
5077 void tlp_pnic_nway_reset __P((struct tulip_softc *));
5078 int tlp_pnic_nway_auto __P((struct tulip_softc *, int));
5079 void tlp_pnic_nway_auto_timeout __P((void *));
5080 void tlp_pnic_nway_status __P((struct tulip_softc *));
5081 void tlp_pnic_nway_acomp __P((struct tulip_softc *));
5082
5083 void
5084 tlp_pnic_tmsw_init(sc)
5085 struct tulip_softc *sc;
5086 {
5087 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5088 const char *sep = "";
5089
5090 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL)
5091 #define PRINT(str) printf("%s%s", sep, str); sep = ", "
5092
5093 sc->sc_mii.mii_ifp = ifp;
5094 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg;
5095 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg;
5096 sc->sc_mii.mii_statchg = sc->sc_statchg;
5097 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5098 tlp_mediastatus);
5099 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5100 MII_OFFSET_ANY, 0);
5101 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5102 /* XXX What about AUI/BNC support? */
5103 printf("%s: ", sc->sc_dev.dv_xname);
5104
5105 tlp_pnic_nway_reset(sc);
5106
5107 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0),
5108 PNIC_NWAY_TW|PNIC_NWAY_CAP10T);
5109 PRINT("10baseT");
5110
5111 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0),
5112 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX);
5113 PRINT("10baseT-FDX");
5114
5115 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
5116 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX);
5117 PRINT("100baseTX");
5118
5119 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0),
5120 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD|
5121 PNIC_NWAY_CAP100TXFDX);
5122 PRINT("100baseTX-FDX");
5123
5124 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0),
5125 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW|
5126 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX|
5127 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX);
5128 PRINT("auto");
5129
5130 printf("\n");
5131
5132 sc->sc_statchg = tlp_pnic_nway_statchg;
5133 sc->sc_tick = tlp_pnic_nway_tick;
5134 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5135 } else {
5136 sc->sc_flags |= TULIPF_HAS_MII;
5137 sc->sc_tick = tlp_mii_tick;
5138 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5139 }
5140
5141 #undef ADD
5142 #undef PRINT
5143 }
5144
5145 void
5146 tlp_pnic_tmsw_get(sc, ifmr)
5147 struct tulip_softc *sc;
5148 struct ifmediareq *ifmr;
5149 {
5150 struct mii_data *mii = &sc->sc_mii;
5151
5152 if (sc->sc_flags & TULIPF_HAS_MII)
5153 tlp_mii_getmedia(sc, ifmr);
5154 else {
5155 mii->mii_media_status = 0;
5156 mii->mii_media_active = IFM_NONE;
5157 tlp_pnic_nway_service(sc, MII_POLLSTAT);
5158 ifmr->ifm_status = sc->sc_mii.mii_media_status;
5159 ifmr->ifm_active = sc->sc_mii.mii_media_active;
5160 }
5161 }
5162
5163 int
5164 tlp_pnic_tmsw_set(sc)
5165 struct tulip_softc *sc;
5166 {
5167 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5168 struct mii_data *mii = &sc->sc_mii;
5169
5170 if (sc->sc_flags & TULIPF_HAS_MII) {
5171 /*
5172 * Make sure the built-in Tx jabber timer is disabled.
5173 */
5174 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS);
5175
5176 return (tlp_mii_setmedia(sc));
5177 }
5178
5179 if (ifp->if_flags & IFF_UP) {
5180 mii->mii_media_status = 0;
5181 mii->mii_media_active = IFM_NONE;
5182 return (tlp_pnic_nway_service(sc, MII_MEDIACHG));
5183 }
5184
5185 return (0);
5186 }
5187
5188 void
5189 tlp_pnic_nway_statchg(self)
5190 struct device *self;
5191 {
5192 struct tulip_softc *sc = (struct tulip_softc *)self;
5193
5194 /* Idle the transmit and receive processes. */
5195 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
5196
5197 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS|
5198 OPMODE_SCR|OPMODE_HBD);
5199
5200 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) {
5201 sc->sc_opmode |= OPMODE_TTM;
5202 TULIP_WRITE(sc, CSR_GPP,
5203 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) |
5204 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1));
5205 } else {
5206 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD;
5207 TULIP_WRITE(sc, CSR_GPP,
5208 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) |
5209 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1));
5210 }
5211
5212 if (sc->sc_mii.mii_media_active & IFM_FDX)
5213 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD;
5214
5215 /*
5216 * Write new OPMODE bits. This also restarts the transmit
5217 * and receive processes.
5218 */
5219 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
5220 }
5221
5222 void
5223 tlp_pnic_nway_tick(arg)
5224 void *arg;
5225 {
5226 struct tulip_softc *sc = arg;
5227 int s;
5228
5229 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
5230 return;
5231
5232 s = splnet();
5233 tlp_pnic_nway_service(sc, MII_TICK);
5234 splx(s);
5235
5236 callout_reset(&sc->sc_tick_callout, hz, tlp_pnic_nway_tick, sc);
5237 }
5238
5239 /*
5240 * Support for the Lite-On PNIC internal NWay block. This is constructed
5241 * somewhat like a PHY driver for simplicity.
5242 */
5243
5244 int
5245 tlp_pnic_nway_service(sc, cmd)
5246 struct tulip_softc *sc;
5247 int cmd;
5248 {
5249 struct mii_data *mii = &sc->sc_mii;
5250 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
5251
5252 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
5253 return (0);
5254
5255 switch (cmd) {
5256 case MII_POLLSTAT:
5257 /* Nothing special to do here. */
5258 break;
5259
5260 case MII_MEDIACHG:
5261 switch (IFM_SUBTYPE(ife->ifm_media)) {
5262 case IFM_AUTO:
5263 (void) tlp_pnic_nway_auto(sc, 1);
5264 break;
5265 case IFM_100_T4:
5266 /*
5267 * XXX Not supported as a manual setting right now.
5268 */
5269 return (EINVAL);
5270 default:
5271 /*
5272 * NWAY register data is stored in the ifmedia entry.
5273 */
5274 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
5275 }
5276 break;
5277
5278 case MII_TICK:
5279 /*
5280 * Only used for autonegotiation.
5281 */
5282 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
5283 return (0);
5284
5285 /*
5286 * Check to see if we have link. If we do, we don't
5287 * need to restart the autonegotiation process.
5288 */
5289 if (sc->sc_flags & TULIPF_LINK_UP)
5290 return (0);
5291
5292 /*
5293 * Only retry autonegotiation every 5 seconds.
5294 */
5295 if (++sc->sc_nway_ticks != 5)
5296 return (0);
5297
5298 sc->sc_nway_ticks = 0;
5299 tlp_pnic_nway_reset(sc);
5300 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN)
5301 return (0);
5302 break;
5303 }
5304
5305 /* Update the media status. */
5306 tlp_pnic_nway_status(sc);
5307
5308 /* Callback if something changed. */
5309 if ((sc->sc_nway_active == NULL ||
5310 sc->sc_nway_active->ifm_media != mii->mii_media_active) ||
5311 cmd == MII_MEDIACHG) {
5312 (*sc->sc_statchg)(&sc->sc_dev);
5313 tlp_nway_activate(sc, mii->mii_media_active);
5314 }
5315 return (0);
5316 }
5317
5318 void
5319 tlp_pnic_nway_reset(sc)
5320 struct tulip_softc *sc;
5321 {
5322
5323 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS);
5324 delay(100);
5325 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0);
5326 }
5327
5328 int
5329 tlp_pnic_nway_auto(sc, waitfor)
5330 struct tulip_softc *sc;
5331 int waitfor;
5332 {
5333 struct mii_data *mii = &sc->sc_mii;
5334 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
5335 u_int32_t reg;
5336 int i;
5337
5338 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0)
5339 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
5340
5341 if (waitfor) {
5342 /* Wait 500ms for it to complete. */
5343 for (i = 0; i < 500; i++) {
5344 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5345 if (reg & PNIC_NWAY_LPAR_MASK) {
5346 tlp_pnic_nway_acomp(sc);
5347 return (0);
5348 }
5349 delay(1000);
5350 }
5351 #if 0
5352 if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
5353 printf("%s: autonegotiation failed to complete\n",
5354 sc->sc_dev.dv_xname);
5355 #endif
5356
5357 /*
5358 * Don't need to worry about clearing DOINGAUTO.
5359 * If that's set, a timeout is pending, and it will
5360 * clear the flag.
5361 */
5362 return (EIO);
5363 }
5364
5365 /*
5366 * Just let it finish asynchronously. This is for the benefit of
5367 * the tick handler driving autonegotiation. Don't want 500ms
5368 * delays all the time while the system is running!
5369 */
5370 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) {
5371 sc->sc_flags |= TULIPF_DOINGAUTO;
5372 callout_reset(&sc->sc_nway_callout, hz >> 1,
5373 tlp_pnic_nway_auto_timeout, sc);
5374 }
5375 return (EJUSTRETURN);
5376 }
5377
5378 void
5379 tlp_pnic_nway_auto_timeout(arg)
5380 void *arg;
5381 {
5382 struct tulip_softc *sc = arg;
5383 u_int32_t reg;
5384 int s;
5385
5386 s = splnet();
5387 sc->sc_flags &= ~TULIPF_DOINGAUTO;
5388 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5389 #if 0
5390 if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
5391 printf("%s: autonegotiation failed to complete\n",
5392 sc->sc_dev.dv_xname);
5393 #endif
5394
5395 tlp_pnic_nway_acomp(sc);
5396
5397 /* Update the media status. */
5398 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT);
5399 splx(s);
5400 }
5401
5402 void
5403 tlp_pnic_nway_status(sc)
5404 struct tulip_softc *sc;
5405 {
5406 struct mii_data *mii = &sc->sc_mii;
5407 u_int32_t reg;
5408
5409 mii->mii_media_status = IFM_AVALID;
5410 mii->mii_media_active = IFM_ETHER;
5411
5412 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5413
5414 if (sc->sc_flags & TULIPF_LINK_UP)
5415 mii->mii_media_status |= IFM_ACTIVE;
5416
5417 if (reg & PNIC_NWAY_NW) {
5418 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) {
5419 /* Erg, still trying, I guess... */
5420 mii->mii_media_active |= IFM_NONE;
5421 return;
5422 }
5423
5424 #if 0
5425 if (reg & PNIC_NWAY_LPAR100T4)
5426 mii->mii_media_active |= IFM_100_T4;
5427 else
5428 #endif
5429 if (reg & PNIC_NWAY_LPAR100TXFDX)
5430 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
5431 else if (reg & PNIC_NWAY_LPAR100TX)
5432 mii->mii_media_active |= IFM_100_TX;
5433 else if (reg & PNIC_NWAY_LPAR10TFDX)
5434 mii->mii_media_active |= IFM_10_T|IFM_FDX;
5435 else if (reg & PNIC_NWAY_LPAR10T)
5436 mii->mii_media_active |= IFM_10_T;
5437 else
5438 mii->mii_media_active |= IFM_NONE;
5439 } else {
5440 if (reg & PNIC_NWAY_100)
5441 mii->mii_media_active |= IFM_100_TX;
5442 else
5443 mii->mii_media_active |= IFM_10_T;
5444 if (reg & PNIC_NWAY_FD)
5445 mii->mii_media_active |= IFM_FDX;
5446 }
5447 }
5448
5449 void
5450 tlp_pnic_nway_acomp(sc)
5451 struct tulip_softc *sc;
5452 {
5453 u_int32_t reg;
5454
5455 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5456 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN);
5457
5458 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX))
5459 reg |= PNIC_NWAY_100;
5460 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX))
5461 reg |= PNIC_NWAY_FD;
5462
5463 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg);
5464 }
5465
5466 /*
5467 * Macronix PMAC and Lite-On PNIC-II media switch:
5468 *
5469 * MX98713 and MX98713A 21140-like MII or GPIO media.
5470 *
5471 * MX98713A 21143-like MII or SIA/SYM media.
5472 *
5473 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media.
5474 * 82C115, MX98715AEC-C, -E
5475 *
5476 * So, what we do here is fake MII-on-SIO or ISV media info, and
5477 * use the ISV media switch get/set functions to handle the rest.
5478 */
5479
5480 void tlp_pmac_tmsw_init __P((struct tulip_softc *));
5481
5482 const struct tulip_mediasw tlp_pmac_mediasw = {
5483 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set
5484 };
5485
5486 const struct tulip_mediasw tlp_pmac_mii_mediasw = {
5487 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5488 };
5489
5490 void
5491 tlp_pmac_tmsw_init(sc)
5492 struct tulip_softc *sc;
5493 {
5494 static const u_int8_t media[] = {
5495 TULIP_ROM_MB_MEDIA_TP,
5496 TULIP_ROM_MB_MEDIA_TP_FDX,
5497 TULIP_ROM_MB_MEDIA_100TX,
5498 TULIP_ROM_MB_MEDIA_100TX_FDX,
5499 };
5500 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5501
5502 sc->sc_mii.mii_ifp = ifp;
5503 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5504 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5505 sc->sc_mii.mii_statchg = sc->sc_statchg;
5506 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5507 tlp_mediastatus);
5508 if (sc->sc_chip == TULIP_CHIP_MX98713 ||
5509 sc->sc_chip == TULIP_CHIP_MX98713A) {
5510 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
5511 MII_PHY_ANY, MII_OFFSET_ANY, 0);
5512 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) {
5513 sc->sc_flags |= TULIPF_HAS_MII;
5514 sc->sc_tick = tlp_mii_tick;
5515 sc->sc_preinit = tlp_2114x_mii_preinit;
5516 sc->sc_mediasw = &tlp_pmac_mii_mediasw;
5517 ifmedia_set(&sc->sc_mii.mii_media,
5518 IFM_ETHER|IFM_AUTO);
5519 return;
5520 }
5521 }
5522
5523 switch (sc->sc_chip) {
5524 case TULIP_CHIP_MX98713:
5525 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR,
5526 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4);
5527
5528 /*
5529 * XXX Should implement auto-sense for this someday,
5530 * XXX when we do the same for the 21140.
5531 */
5532 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
5533 break;
5534
5535 default:
5536 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA,
5537 tlp_sia_get, tlp_sia_set, media, 2);
5538 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM,
5539 tlp_sia_get, tlp_sia_set, media + 2, 2);
5540
5541 /*
5542 * XXX Autonegotiation not yet supported.
5543 */
5544 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
5545 break;
5546 }
5547
5548 tlp_print_media(sc);
5549 tlp_sia_fixup(sc);
5550
5551 /* Set the LED modes. */
5552 tlp_pmac_reset(sc);
5553
5554 sc->sc_reset = tlp_pmac_reset;
5555 }
5556
5557 /*
5558 * ADMtek AL981 media switch. Only has internal PHY.
5559 */
5560 void tlp_al981_tmsw_init __P((struct tulip_softc *));
5561
5562 const struct tulip_mediasw tlp_al981_mediasw = {
5563 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5564 };
5565
5566 void
5567 tlp_al981_tmsw_init(sc)
5568 struct tulip_softc *sc;
5569 {
5570 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5571
5572 sc->sc_mii.mii_ifp = ifp;
5573 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg;
5574 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg;
5575 sc->sc_mii.mii_statchg = sc->sc_statchg;
5576 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5577 tlp_mediastatus);
5578 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5579 MII_OFFSET_ANY, 0);
5580 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5581 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5582 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5583 } else {
5584 sc->sc_flags |= TULIPF_HAS_MII;
5585 sc->sc_tick = tlp_mii_tick;
5586 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5587 }
5588 }
5589
5590 /*
5591 * ADMtek AN983/985 media switch. Only has internal PHY, but
5592 * on an SIO-like interface. Unfortunately, we can't use the
5593 * standard SIO media switch, because the AN985 "ghosts" the
5594 * singly PHY at every address.
5595 */
5596 void tlp_an985_tmsw_init __P((struct tulip_softc *));
5597
5598 const struct tulip_mediasw tlp_an985_mediasw = {
5599 tlp_an985_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5600 };
5601
5602 void
5603 tlp_an985_tmsw_init(sc)
5604 struct tulip_softc *sc;
5605 {
5606 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5607
5608 sc->sc_mii.mii_ifp = ifp;
5609 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5610 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5611 sc->sc_mii.mii_statchg = sc->sc_statchg;
5612 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5613 tlp_mediastatus);
5614 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 1,
5615 MII_OFFSET_ANY, 0);
5616 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5617 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5618 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5619 } else {
5620 sc->sc_flags |= TULIPF_HAS_MII;
5621 sc->sc_tick = tlp_mii_tick;
5622 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5623 }
5624 }
5625
5626 /*
5627 * Davicom DM9102 media switch. Internal PHY and possibly HomePNA.
5628 */
5629 void tlp_dm9102_tmsw_init __P((struct tulip_softc *));
5630 void tlp_dm9102_tmsw_getmedia __P((struct tulip_softc *,
5631 struct ifmediareq *));
5632 int tlp_dm9102_tmsw_setmedia __P((struct tulip_softc *));
5633
5634 const struct tulip_mediasw tlp_dm9102_mediasw = {
5635 tlp_dm9102_tmsw_init, tlp_dm9102_tmsw_getmedia,
5636 tlp_dm9102_tmsw_setmedia
5637 };
5638
5639 void
5640 tlp_dm9102_tmsw_init(sc)
5641 struct tulip_softc *sc;
5642 {
5643 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5644 u_int32_t opmode;
5645
5646 sc->sc_mii.mii_ifp = ifp;
5647 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5648 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5649 sc->sc_mii.mii_statchg = sc->sc_statchg;
5650 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5651 tlp_mediastatus);
5652
5653 /* PHY block already reset via tlp_reset(). */
5654
5655 /*
5656 * Configure OPMODE properly for the internal MII interface.
5657 */
5658 switch (sc->sc_chip) {
5659 case TULIP_CHIP_DM9102:
5660 opmode = OPMODE_MBO|OPMODE_HBD|OPMODE_PS;
5661 break;
5662
5663 case TULIP_CHIP_DM9102A:
5664 opmode = OPMODE_MBO|OPMODE_HBD;
5665 break;
5666
5667 default:
5668 /* Nothing. */
5669 break;
5670 }
5671
5672 TULIP_WRITE(sc, CSR_OPMODE, opmode);
5673
5674 /* Now, probe the internal MII for the internal PHY. */
5675 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5676 MII_OFFSET_ANY, 0);
5677
5678 /*
5679 * XXX Figure out what to do about the HomePNA portion
5680 * XXX of the DM9102A.
5681 */
5682
5683 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5684 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5685 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5686 } else {
5687 sc->sc_flags |= TULIPF_HAS_MII;
5688 sc->sc_tick = tlp_mii_tick;
5689 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5690 }
5691 }
5692
5693 void
5694 tlp_dm9102_tmsw_getmedia(sc, ifmr)
5695 struct tulip_softc *sc;
5696 struct ifmediareq *ifmr;
5697 {
5698
5699 /* XXX HomePNA on DM9102A. */
5700 tlp_mii_getmedia(sc, ifmr);
5701 }
5702
5703 int
5704 tlp_dm9102_tmsw_setmedia(sc)
5705 struct tulip_softc *sc;
5706 {
5707
5708 /* XXX HomePNA on DM9102A. */
5709 return (tlp_mii_setmedia(sc));
5710 }
5711