tulip.c revision 1.15
1 /* $NetBSD: tulip.c,v 1.15 1999/09/20 19:52:31 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <vm/vm.h> /* for PAGE_SIZE */ 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #endif 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/if_inarp.h> 73 #endif 74 75 #ifdef NS 76 #include <netns/ns.h> 77 #include <netns/ns_if.h> 78 #endif 79 80 #include <machine/bus.h> 81 #include <machine/intr.h> 82 83 #include <dev/mii/mii.h> 84 #include <dev/mii/miivar.h> 85 86 #include <dev/ic/tulipreg.h> 87 #include <dev/ic/tulipvar.h> 88 89 /* 90 * The following tables compute the transmit threshold mode. We start 91 * at index 0. When ever we get a transmit underrun, we increment our 92 * index, falling back if we encounter the NULL terminator. 93 * 94 * Note: Store and forward mode is only available on the 100mbps chips 95 * (21140 and higher). 96 */ 97 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = { 98 { OPMODE_TR_72, "72 bytes" }, 99 { OPMODE_TR_96, "96 bytes" }, 100 { OPMODE_TR_128, "128 bytes" }, 101 { OPMODE_TR_160, "160 bytes" }, 102 { 0, NULL }, 103 }; 104 105 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = { 106 { OPMODE_TR_72, "72/128 bytes" }, 107 { OPMODE_TR_96, "96/256 bytes" }, 108 { OPMODE_TR_128, "128/512 bytes" }, 109 { OPMODE_TR_160, "160/1024 bytes" }, 110 { OPMODE_SF, "store and forward mode" }, 111 { 0, NULL }, 112 }; 113 114 #define TXTH_72 0 115 #define TXTH_96 1 116 #define TXTH_128 2 117 #define TXTH_160 3 118 #define TXTH_SF 4 119 120 /* 121 * The Winbond 89C840F does transmit threshold control totally 122 * differently. It simply has a 7-bit field which indicates 123 * the threshold: 124 * 125 * txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16; 126 * 127 * However, we just do Store-and-Forward mode on these chips, since 128 * the DMA engines seem to be flaky. 129 */ 130 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = { 131 { 0, "store and forward mode" }, 132 { 0, NULL }, 133 }; 134 135 #define TXTH_WINB_SF 0 136 137 void tlp_start __P((struct ifnet *)); 138 void tlp_watchdog __P((struct ifnet *)); 139 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 140 141 void tlp_shutdown __P((void *)); 142 143 void tlp_reset __P((struct tulip_softc *)); 144 int tlp_init __P((struct tulip_softc *)); 145 void tlp_rxdrain __P((struct tulip_softc *)); 146 void tlp_stop __P((struct tulip_softc *, int)); 147 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 148 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 149 void tlp_srom_idle __P((struct tulip_softc *)); 150 151 void tlp_filter_setup __P((struct tulip_softc *)); 152 void tlp_winb_filter_setup __P((struct tulip_softc *)); 153 154 void tlp_rxintr __P((struct tulip_softc *)); 155 void tlp_txintr __P((struct tulip_softc *)); 156 157 void tlp_mii_tick __P((void *)); 158 void tlp_mii_statchg __P((struct device *)); 159 void tlp_winb_mii_statchg __P((struct device *)); 160 161 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 162 int tlp_mii_setmedia __P((struct tulip_softc *)); 163 164 void tlp_sio_mii_sync __P((struct tulip_softc *)); 165 void tlp_sio_mii_sendbits __P((struct tulip_softc *, u_int32_t, int)); 166 int tlp_sio_mii_readreg __P((struct device *, int, int)); 167 void tlp_sio_mii_writereg __P((struct device *, int, int, int)); 168 169 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 170 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 171 172 void tlp_2114x_preinit __P((struct tulip_softc *)); 173 void tlp_pnic_preinit __P((struct tulip_softc *)); 174 175 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t)); 176 #define tlp_mchash(addr) (tlp_crc32((addr), ETHER_ADDR_LEN) & \ 177 (TULIP_MCHASHSIZE - 1)) 178 179 #ifdef TLP_DEBUG 180 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 181 printf x 182 #else 183 #define DPRINTF(sc, x) /* nothing */ 184 #endif 185 186 /* 187 * tlp_attach: 188 * 189 * Attach a Tulip interface to the system. 190 */ 191 void 192 tlp_attach(sc, enaddr) 193 struct tulip_softc *sc; 194 const u_int8_t *enaddr; 195 { 196 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 197 int i, rseg, error; 198 bus_dma_segment_t seg; 199 200 /* 201 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 202 */ 203 204 /* 205 * Setup the transmit threshold table. 206 */ 207 switch (sc->sc_chip) { 208 case TULIP_CHIP_DE425: 209 case TULIP_CHIP_21040: 210 case TULIP_CHIP_21041: 211 sc->sc_txth = tlp_10_txthresh_tab; 212 break; 213 214 default: 215 sc->sc_txth = tlp_10_100_txthresh_tab; 216 break; 217 } 218 219 /* 220 * Setup the filter setup function. 221 */ 222 switch (sc->sc_chip) { 223 case TULIP_CHIP_WB89C840F: 224 sc->sc_filter_setup = tlp_winb_filter_setup; 225 break; 226 227 default: 228 sc->sc_filter_setup = tlp_filter_setup; 229 break; 230 } 231 232 /* 233 * Set up the media status change function. 234 */ 235 switch (sc->sc_chip) { 236 case TULIP_CHIP_WB89C840F: 237 sc->sc_statchg = tlp_winb_mii_statchg; 238 break; 239 240 default: 241 /* 242 * We may override this if we have special media 243 * handling requirements (e.g. flipping GPIO pins). 244 * 245 * The pure-MII statchg function covers the basics. 246 */ 247 sc->sc_statchg = tlp_mii_statchg; 248 break; 249 } 250 251 /* 252 * Set up various chip-specific quirks. 253 */ 254 switch (sc->sc_chip) { 255 case TULIP_CHIP_21140: 256 case TULIP_CHIP_21140A: 257 case TULIP_CHIP_21142: 258 case TULIP_CHIP_21143: 259 sc->sc_preinit = tlp_2114x_preinit; 260 break; 261 262 case TULIP_CHIP_82C168: 263 case TULIP_CHIP_82C169: 264 sc->sc_preinit = tlp_pnic_preinit; 265 266 /* 267 * These chips seem to have busted DMA engines; just put them 268 * in Store-and-Forward mode from the get-go. 269 */ 270 sc->sc_txthresh = TXTH_SF; 271 break; 272 273 case TULIP_CHIP_WB89C840F: 274 sc->sc_flags |= TULIPF_IC_FS; 275 break; 276 277 default: 278 /* Nothing. */ 279 } 280 281 SIMPLEQ_INIT(&sc->sc_txfreeq); 282 SIMPLEQ_INIT(&sc->sc_txdirtyq); 283 284 /* 285 * Allocate the control data structures, and create and load the 286 * DMA map for it. 287 */ 288 if ((error = bus_dmamem_alloc(sc->sc_dmat, 289 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg, 290 0)) != 0) { 291 printf("%s: unable to allocate control data, error = %d\n", 292 sc->sc_dev.dv_xname, error); 293 goto fail_0; 294 } 295 296 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 297 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 298 BUS_DMA_COHERENT)) != 0) { 299 printf("%s: unable to map control data, error = %d\n", 300 sc->sc_dev.dv_xname, error); 301 goto fail_1; 302 } 303 304 if ((error = bus_dmamap_create(sc->sc_dmat, 305 sizeof(struct tulip_control_data), 1, 306 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 307 printf("%s: unable to create control data DMA map, " 308 "error = %d\n", sc->sc_dev.dv_xname, error); 309 goto fail_2; 310 } 311 312 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 313 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 314 0)) != 0) { 315 printf("%s: unable to load control data DMA map, error = %d\n", 316 sc->sc_dev.dv_xname, error); 317 goto fail_3; 318 } 319 320 /* 321 * Create the transmit buffer DMA maps. 322 */ 323 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 324 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 325 TULIP_NTXSEGS, MCLBYTES, 0, 0, 326 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 327 printf("%s: unable to create tx DMA map %d, " 328 "error = %d\n", sc->sc_dev.dv_xname, i, error); 329 goto fail_4; 330 } 331 } 332 333 /* 334 * Create the recieve buffer DMA maps. 335 */ 336 for (i = 0; i < TULIP_NRXDESC; i++) { 337 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 338 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 339 printf("%s: unable to create rx DMA map %d, " 340 "error = %d\n", sc->sc_dev.dv_xname, i, error); 341 goto fail_5; 342 } 343 sc->sc_rxsoft[i].rxs_mbuf = NULL; 344 } 345 346 /* 347 * Reset the chip to a known state. 348 */ 349 tlp_reset(sc); 350 351 /* Announce ourselves. */ 352 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 353 sc->sc_name[0] != '\0' ? sc->sc_name : "", 354 sc->sc_name[0] != '\0' ? ", " : "", 355 ether_sprintf(enaddr)); 356 357 /* 358 * Initialize our media structures. This may probe the MII, if 359 * present. 360 */ 361 (*sc->sc_mediasw->tmsw_init)(sc); 362 363 ifp = &sc->sc_ethercom.ec_if; 364 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 365 ifp->if_softc = sc; 366 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 367 ifp->if_ioctl = tlp_ioctl; 368 ifp->if_start = tlp_start; 369 ifp->if_watchdog = tlp_watchdog; 370 371 /* 372 * Attach the interface. 373 */ 374 if_attach(ifp); 375 ether_ifattach(ifp, enaddr); 376 #if NBPFILTER > 0 377 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 378 sizeof(struct ether_header)); 379 #endif 380 381 /* 382 * Make sure the interface is shutdown during reboot. 383 */ 384 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 385 if (sc->sc_sdhook == NULL) 386 printf("%s: WARNING: unable to establish shutdown hook\n", 387 sc->sc_dev.dv_xname); 388 return; 389 390 /* 391 * Free any resources we've allocated during the failed attach 392 * attempt. Do this in reverse order and fall through. 393 */ 394 fail_5: 395 for (i = 0; i < TULIP_NRXDESC; i++) { 396 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 397 bus_dmamap_destroy(sc->sc_dmat, 398 sc->sc_rxsoft[i].rxs_dmamap); 399 } 400 fail_4: 401 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 402 if (sc->sc_txsoft[i].txs_dmamap != NULL) 403 bus_dmamap_destroy(sc->sc_dmat, 404 sc->sc_txsoft[i].txs_dmamap); 405 } 406 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 407 fail_3: 408 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 409 fail_2: 410 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 411 sizeof(struct tulip_control_data)); 412 fail_1: 413 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 414 fail_0: 415 return; 416 } 417 418 /* 419 * tlp_shutdown: 420 * 421 * Make sure the interface is stopped at reboot time. 422 */ 423 void 424 tlp_shutdown(arg) 425 void *arg; 426 { 427 struct tulip_softc *sc = arg; 428 429 tlp_stop(sc, 1); 430 } 431 432 /* 433 * tlp_start: [ifnet interface function] 434 * 435 * Start packet transmission on the interface. 436 */ 437 void 438 tlp_start(ifp) 439 struct ifnet *ifp; 440 { 441 struct tulip_softc *sc = ifp->if_softc; 442 struct mbuf *m0, *m; 443 struct tulip_txsoft *txs, *last_txs; 444 bus_dmamap_t dmamap; 445 int error, firsttx, nexttx, lasttx, ofree, seg; 446 447 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 448 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 449 450 /* 451 * If we want a filter setup, it means no more descriptors were 452 * available for the setup routine. Let it get a chance to wedge 453 * itself into the ring. 454 */ 455 if (sc->sc_flags & TULIPF_WANT_SETUP) 456 ifp->if_flags |= IFF_OACTIVE; 457 458 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 459 return; 460 461 /* 462 * Remember the previous number of free descriptors and 463 * the first descriptor we'll use. 464 */ 465 ofree = sc->sc_txfree; 466 firsttx = sc->sc_txnext; 467 468 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 469 sc->sc_dev.dv_xname, ofree, firsttx)); 470 471 /* 472 * Loop through the send queue, setting up transmit descriptors 473 * until we drain the queue, or use up all available transmit 474 * descriptors. 475 */ 476 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 477 sc->sc_txfree != 0) { 478 /* 479 * Grab a packet off the queue. 480 */ 481 IF_DEQUEUE(&ifp->if_snd, m0); 482 if (m0 == NULL) 483 break; 484 485 dmamap = txs->txs_dmamap; 486 487 /* 488 * Load the DMA map. If this fails, the packet either 489 * didn't fit in the alloted number of segments, or we were 490 * short on resources. In this case, we'll copy and try 491 * again. 492 */ 493 if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 494 BUS_DMA_NOWAIT) != 0) { 495 MGETHDR(m, M_DONTWAIT, MT_DATA); 496 if (m == NULL) { 497 printf("%s: unable to allocate Tx mbuf\n", 498 sc->sc_dev.dv_xname); 499 IF_PREPEND(&ifp->if_snd, m0); 500 break; 501 } 502 if (m0->m_pkthdr.len > MHLEN) { 503 MCLGET(m, M_DONTWAIT); 504 if ((m->m_flags & M_EXT) == 0) { 505 printf("%s: unable to allocate Tx " 506 "cluster\n", sc->sc_dev.dv_xname); 507 m_freem(m); 508 IF_PREPEND(&ifp->if_snd, m0); 509 break; 510 } 511 } 512 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 513 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 514 m_freem(m0); 515 m0 = m; 516 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 517 m0, BUS_DMA_NOWAIT); 518 if (error) { 519 printf("%s: unable to load Tx buffer, " 520 "error = %d\n", sc->sc_dev.dv_xname, error); 521 IF_PREPEND(&ifp->if_snd, m0); 522 break; 523 } 524 } 525 526 /* 527 * Ensure we have enough descriptors free to describe 528 * the packet. 529 */ 530 if (dmamap->dm_nsegs > sc->sc_txfree) { 531 /* 532 * Not enough free descriptors to transmit this 533 * packet. We haven't committed to anything yet, 534 * so just unload the DMA map, put the packet 535 * back on the queue, and punt. Notify the upper 536 * layer that there are no more slots left. 537 * 538 * XXX We could allocate an mbuf and copy, but 539 * XXX it is worth it? 540 */ 541 ifp->if_flags |= IFF_OACTIVE; 542 bus_dmamap_unload(sc->sc_dmat, dmamap); 543 IF_PREPEND(&ifp->if_snd, m0); 544 break; 545 } 546 547 /* 548 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 549 */ 550 551 /* Sync the DMA map. */ 552 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 553 BUS_DMASYNC_PREWRITE); 554 555 /* 556 * Initialize the transmit descriptors. 557 */ 558 for (nexttx = sc->sc_txnext, seg = 0; 559 seg < dmamap->dm_nsegs; 560 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 561 /* 562 * If this is the first descriptor we're 563 * enqueueing, don't set the OWN bit just 564 * yet. That could cause a race condition. 565 * We'll do it below. 566 */ 567 sc->sc_txdescs[nexttx].td_status = 568 (nexttx == firsttx) ? 0 : TDSTAT_OWN; 569 sc->sc_txdescs[nexttx].td_bufaddr1 = 570 dmamap->dm_segs[seg].ds_addr; 571 sc->sc_txdescs[nexttx].td_ctl = 572 (dmamap->dm_segs[seg].ds_len << TDCTL_SIZE1_SHIFT) | 573 TDCTL_CH; 574 lasttx = nexttx; 575 } 576 577 /* Set `first segment' and `last segment' appropriately. */ 578 sc->sc_txdescs[sc->sc_txnext].td_ctl |= TDCTL_Tx_FS; 579 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_LS; 580 581 #ifdef TLP_DEBUG 582 if (ifp->if_flags & IFF_DEBUG) { 583 printf(" txsoft %p trainsmit chain:\n", txs); 584 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 585 printf(" descriptor %d:\n", seg); 586 printf(" td_status: 0x%08x\n", 587 sc->sc_txdescs[seg].td_status); 588 printf(" td_ctl: 0x%08x\n", 589 sc->sc_txdescs[seg].td_ctl); 590 printf(" td_bufaddr1: 0x%08x\n", 591 sc->sc_txdescs[seg].td_bufaddr1); 592 printf(" td_bufaddr2: 0x%08x\n", 593 sc->sc_txdescs[seg].td_bufaddr2); 594 if (seg == lasttx) 595 break; 596 } 597 } 598 #endif 599 600 /* Sync the descriptors we're using. */ 601 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 602 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 603 604 /* 605 * Store a pointer to the packet so we can free it later, 606 * and remember what txdirty will be once the packet is 607 * done. 608 */ 609 txs->txs_mbuf = m0; 610 txs->txs_firstdesc = sc->sc_txnext; 611 txs->txs_lastdesc = lasttx; 612 613 /* Advance the tx pointer. */ 614 sc->sc_txfree -= dmamap->dm_nsegs; 615 sc->sc_txnext = nexttx; 616 617 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 618 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 619 620 last_txs = txs; 621 622 #if NBPFILTER > 0 623 /* 624 * Pass the packet to any BPF listeners. 625 */ 626 if (ifp->if_bpf) 627 bpf_mtap(ifp->if_bpf, m0); 628 #endif /* NBPFILTER > 0 */ 629 } 630 631 if (txs == NULL || sc->sc_txfree == 0) { 632 /* No more slots left; notify upper layer. */ 633 ifp->if_flags |= IFF_OACTIVE; 634 } 635 636 if (sc->sc_txfree != ofree) { 637 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 638 sc->sc_dev.dv_xname, lasttx, firsttx)); 639 /* 640 * Cause a transmit interrupt to happen on the 641 * last packet we enqueued. 642 */ 643 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_IC; 644 TULIP_CDTXSYNC(sc, lasttx, 1, 645 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 646 647 /* 648 * Some clone chips want IC on the *first* segment in 649 * the packet. Appease them. 650 */ 651 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 652 last_txs->txs_firstdesc != lasttx) { 653 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 654 TDCTL_Tx_IC; 655 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 656 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 657 } 658 659 /* 660 * The entire packet chain is set up. Give the 661 * first descriptor to the chip now. 662 */ 663 sc->sc_txdescs[firsttx].td_status |= TDSTAT_OWN; 664 TULIP_CDTXSYNC(sc, firsttx, 1, 665 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 666 667 /* Wake up the transmitter. */ 668 /* XXX USE AUTOPOLLING? */ 669 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 670 671 /* Set a watchdog timer in case the chip flakes out. */ 672 ifp->if_timer = 5; 673 } 674 } 675 676 /* 677 * tlp_watchdog: [ifnet interface function] 678 * 679 * Watchdog timer handler. 680 */ 681 void 682 tlp_watchdog(ifp) 683 struct ifnet *ifp; 684 { 685 struct tulip_softc *sc = ifp->if_softc; 686 int doing_setup, doing_transmit; 687 688 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 689 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 690 691 if (doing_setup && doing_transmit) { 692 printf("%s: filter setup and transmit timeout\n", 693 sc->sc_dev.dv_xname); 694 ifp->if_oerrors++; 695 } else if (doing_transmit) { 696 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 697 ifp->if_oerrors++; 698 } else if (doing_setup) 699 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 700 else 701 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 702 703 (void) tlp_init(sc); 704 705 /* Try to get more packets going. */ 706 tlp_start(ifp); 707 } 708 709 /* 710 * tlp_ioctl: [ifnet interface function] 711 * 712 * Handle control requests from the operator. 713 */ 714 int 715 tlp_ioctl(ifp, cmd, data) 716 struct ifnet *ifp; 717 u_long cmd; 718 caddr_t data; 719 { 720 struct tulip_softc *sc = ifp->if_softc; 721 struct ifreq *ifr = (struct ifreq *)data; 722 struct ifaddr *ifa = (struct ifaddr *)data; 723 int s, error = 0; 724 725 s = splnet(); 726 727 switch (cmd) { 728 case SIOCSIFADDR: 729 ifp->if_flags |= IFF_UP; 730 731 switch (ifa->ifa_addr->sa_family) { 732 #ifdef INET 733 case AF_INET: 734 if ((error = tlp_init(sc)) != 0) 735 break; 736 arp_ifinit(ifp, ifa); 737 break; 738 #endif /* INET */ 739 #ifdef NS 740 case AF_NS: 741 { 742 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 743 744 if (ns_nullhost(*ina)) 745 ina->x_host = *(union ns_host *) 746 LLADDR(ifp->if_sadl); 747 else 748 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 749 ifp->if_addrlen); 750 /* Set new address. */ 751 error = tlp_init(sc); 752 break; 753 } 754 #endif /* NS */ 755 default: 756 error = tlp_init(sc); 757 break; 758 } 759 break; 760 761 case SIOCSIFMTU: 762 if (ifr->ifr_mtu > ETHERMTU) 763 error = EINVAL; 764 else 765 ifp->if_mtu = ifr->ifr_mtu; 766 break; 767 768 case SIOCSIFFLAGS: 769 if ((ifp->if_flags & IFF_UP) == 0 && 770 (ifp->if_flags & IFF_RUNNING) != 0) { 771 /* 772 * If interface is marked down and it is running, then 773 * stop it. 774 */ 775 tlp_stop(sc, 1); 776 } else if ((ifp->if_flags & IFF_UP) != 0 && 777 (ifp->if_flags & IFF_RUNNING) == 0) { 778 /* 779 * If interfase it marked up and it is stopped, then 780 * start it. 781 */ 782 error = tlp_init(sc); 783 } else if ((ifp->if_flags & IFF_UP) != 0) { 784 /* 785 * Reset the interface to pick up changes in any other 786 * flags that affect the hardware state. 787 */ 788 error = tlp_init(sc); 789 } 790 break; 791 792 case SIOCADDMULTI: 793 case SIOCDELMULTI: 794 error = (cmd == SIOCADDMULTI) ? 795 ether_addmulti(ifr, &sc->sc_ethercom) : 796 ether_delmulti(ifr, &sc->sc_ethercom); 797 798 if (error == ENETRESET) { 799 /* 800 * Multicast list has changed. Set the filter 801 * accordingly. 802 */ 803 (*sc->sc_filter_setup)(sc); 804 error = 0; 805 } 806 break; 807 808 case SIOCSIFMEDIA: 809 case SIOCGIFMEDIA: 810 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 811 break; 812 813 default: 814 error = EINVAL; 815 break; 816 } 817 818 /* Try to get more packets going. */ 819 tlp_start(ifp); 820 821 splx(s); 822 return (error); 823 } 824 825 /* 826 * tlp_intr: 827 * 828 * Interrupt service routine. 829 */ 830 int 831 tlp_intr(arg) 832 void *arg; 833 { 834 struct tulip_softc *sc = arg; 835 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 836 u_int32_t status, rxstatus, txstatus; 837 int handled = 0, txthresh; 838 839 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 840 841 /* 842 * If the interface isn't running, the interrupt couldn't 843 * possibly have come from us. 844 */ 845 if ((ifp->if_flags & IFF_RUNNING) == 0) 846 return (0); 847 848 for (;;) { 849 status = TULIP_READ(sc, CSR_STATUS); 850 if (status) 851 TULIP_WRITE(sc, CSR_STATUS, status); 852 853 if ((status & sc->sc_inten) == 0) 854 break; 855 856 handled = 1; 857 858 rxstatus = status & sc->sc_rxint_mask; 859 txstatus = status & sc->sc_txint_mask; 860 861 if (rxstatus) { 862 /* Grab new any new packets. */ 863 tlp_rxintr(sc); 864 865 if (rxstatus & STATUS_RWT) 866 printf("%s: receive watchdog timeout\n", 867 sc->sc_dev.dv_xname); 868 869 if (rxstatus & STATUS_RU) { 870 printf("%s: receive ring overrun\n", 871 sc->sc_dev.dv_xname); 872 /* Get the receive process going again. */ 873 tlp_idle(sc, OPMODE_SR); 874 TULIP_WRITE(sc, CSR_RXLIST, 875 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 876 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 877 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 878 break; 879 } 880 } 881 882 if (txstatus) { 883 /* Sweep up transmit descriptors. */ 884 tlp_txintr(sc); 885 886 if (txstatus & STATUS_TJT) 887 printf("%s: transmit jabber timeout\n", 888 sc->sc_dev.dv_xname); 889 890 if (txstatus & STATUS_UNF) { 891 /* 892 * Increase our transmit threshold if 893 * another is available. 894 */ 895 txthresh = sc->sc_txthresh + 1; 896 if (sc->sc_txth[txthresh].txth_name != NULL) { 897 /* Idle the transmit process. */ 898 tlp_idle(sc, OPMODE_ST); 899 900 sc->sc_txthresh = txthresh; 901 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 902 sc->sc_opmode |= 903 sc->sc_txth[txthresh].txth_opmode; 904 printf("%s: transmit underrun; new " 905 "threshold: %s\n", 906 sc->sc_dev.dv_xname, 907 sc->sc_txth[txthresh].txth_name); 908 909 /* 910 * Set the new threshold and restart 911 * the transmit process. 912 */ 913 TULIP_WRITE(sc, CSR_OPMODE, 914 sc->sc_opmode); 915 } 916 /* 917 * XXX Log every Nth underrun from 918 * XXX now on? 919 */ 920 } 921 } 922 923 if (status & (STATUS_TPS|STATUS_RPS)) { 924 if (status & STATUS_TPS) 925 printf("%s: transmit process stopped\n", 926 sc->sc_dev.dv_xname); 927 if (status & STATUS_RPS) 928 printf("%s: receive process stopped\n", 929 sc->sc_dev.dv_xname); 930 (void) tlp_init(sc); 931 break; 932 } 933 934 if (status & STATUS_SE) { 935 const char *str; 936 switch (status & STATUS_EB) { 937 case STATUS_EB_PARITY: 938 str = "parity error"; 939 break; 940 941 case STATUS_EB_MABT: 942 str = "master abort"; 943 break; 944 945 case STATUS_EB_TABT: 946 str = "target abort"; 947 break; 948 949 default: 950 str = "unknown error"; 951 break; 952 } 953 printf("%s: fatal system error: %s\n", 954 sc->sc_dev.dv_xname, str); 955 (void) tlp_init(sc); 956 break; 957 } 958 959 /* 960 * Not handled: 961 * 962 * Transmit buffer unavailable -- normal 963 * condition, nothing to do, really. 964 * 965 * General purpose timer experied -- we don't 966 * use the general purpose timer. 967 * 968 * Early receive interrupt -- not available on 969 * all chips, we just use RI. We also only 970 * use single-segment receive DMA, so this 971 * is mostly useless. 972 */ 973 } 974 975 /* Try to get more packets going. */ 976 tlp_start(ifp); 977 978 return (handled); 979 } 980 981 /* 982 * tlp_rxintr: 983 * 984 * Helper; handle receive interrupts. 985 */ 986 void 987 tlp_rxintr(sc) 988 struct tulip_softc *sc; 989 { 990 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 991 struct ether_header *eh; 992 struct tulip_rxsoft *rxs; 993 struct mbuf *m; 994 u_int32_t rxstat; 995 int i, len; 996 997 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 998 rxs = &sc->sc_rxsoft[i]; 999 1000 TULIP_CDRXSYNC(sc, i, 1001 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1002 1003 rxstat = sc->sc_rxdescs[i].td_status; 1004 1005 if (rxstat & TDSTAT_OWN) { 1006 /* 1007 * We have processed all of the receive buffers. 1008 */ 1009 break; 1010 } 1011 1012 /* 1013 * Make sure the packet fit in one buffer. This should 1014 * always be the case. But the Lite-On PNIC, rev 33 1015 * has an awful receive engine bug, which may require 1016 * a very icky work-around. 1017 */ 1018 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1019 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1020 printf("%s: incoming packet spilled, resetting\n", 1021 sc->sc_dev.dv_xname); 1022 (void) tlp_init(sc); 1023 return; 1024 } 1025 1026 /* 1027 * If any collisions were seen on the wire, count one. 1028 */ 1029 if (rxstat & TDSTAT_Rx_CS) 1030 ifp->if_collisions++; 1031 1032 /* 1033 * If an error occured, update stats, clear the status 1034 * word, and leave the packet buffer in place. It will 1035 * simply be reused the next time the ring comes around. 1036 */ 1037 if (rxstat & TDSTAT_ES) { 1038 #define PRINTERR(bit, str) \ 1039 if (rxstat & (bit)) \ 1040 printf("%s: receive error: %s\n", \ 1041 sc->sc_dev.dv_xname, str) 1042 ifp->if_ierrors++; 1043 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1044 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1045 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1046 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1047 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1048 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1049 #undef PRINTERR 1050 TULIP_INIT_RXDESC(sc, i); 1051 continue; 1052 } 1053 1054 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1055 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1056 1057 /* 1058 * No errors; receive the packet. Note the Tulip 1059 * includes the CRC with every packet; trim it. 1060 */ 1061 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; 1062 1063 #ifdef __NO_STRICT_ALIGNMENT 1064 /* 1065 * Allocate a new mbuf cluster. If that fails, we are 1066 * out of memory, and must drop the packet and recycle 1067 * the buffer that's already attached to this descriptor. 1068 */ 1069 m = rxs->rxs_mbuf; 1070 if (tlp_add_rxbuf(sc, i) != 0) { 1071 ifp->if_ierrors++; 1072 TULIP_INIT_RXDESC(sc, i); 1073 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1074 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1075 continue; 1076 } 1077 #else 1078 /* 1079 * The Tulip's receive buffers must be 4-byte aligned. 1080 * But this means that the data after the Ethernet header 1081 * is misaligned. We must allocate a new buffer and 1082 * copy the data, shifted forward 2 bytes. 1083 */ 1084 MGETHDR(m, M_DONTWAIT, MT_DATA); 1085 if (m == NULL) { 1086 dropit: 1087 ifp->if_ierrors++; 1088 TULIP_INIT_RXDESC(sc, i); 1089 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1090 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1091 continue; 1092 } 1093 if (len > (MHLEN - 2)) { 1094 MCLGET(m, M_DONTWAIT); 1095 if ((m->m_flags & M_EXT) == 0) { 1096 m_freem(m); 1097 goto dropit; 1098 } 1099 } 1100 m->m_data += 2; 1101 1102 /* 1103 * Note that we use clusters for incoming frames, so the 1104 * buffer is virtually contiguous. 1105 */ 1106 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1107 1108 /* Allow the receive descriptor to continue using its mbuf. */ 1109 TULIP_INIT_RXDESC(sc, i); 1110 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1111 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1112 #endif /* __NO_STRICT_ALIGNMENT */ 1113 1114 ifp->if_ipackets++; 1115 eh = mtod(m, struct ether_header *); 1116 m->m_pkthdr.rcvif = ifp; 1117 m->m_pkthdr.len = m->m_len = len; 1118 1119 #if NBPFILTER > 0 1120 /* 1121 * Pass this up to any BPF listeners, but only 1122 * pass it up the stack if its for us. 1123 */ 1124 if (ifp->if_bpf) 1125 bpf_mtap(ifp->if_bpf, m); 1126 #endif /* NPBFILTER > 0 */ 1127 1128 /* 1129 * This test is outside the NBPFILTER block because 1130 * on the 21140 we have to use Hash-Only mode due to 1131 * a bug in the filter logic. 1132 */ 1133 if ((ifp->if_flags & IFF_PROMISC) != 0 || 1134 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 1135 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1136 ETHER_ADDR_LEN) != 0 && 1137 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) { 1138 m_freem(m); 1139 continue; 1140 } 1141 } 1142 1143 /* Pass it on. */ 1144 (*ifp->if_input)(ifp, m); 1145 } 1146 1147 /* Update the recieve pointer. */ 1148 sc->sc_rxptr = i; 1149 } 1150 1151 /* 1152 * tlp_txintr: 1153 * 1154 * Helper; handle transmit interrupts. 1155 */ 1156 void 1157 tlp_txintr(sc) 1158 struct tulip_softc *sc; 1159 { 1160 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1161 struct tulip_txsoft *txs; 1162 u_int32_t txstat; 1163 1164 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1165 sc->sc_dev.dv_xname, sc->sc_flags)); 1166 1167 ifp->if_flags &= ~IFF_OACTIVE; 1168 1169 /* 1170 * If we were doing a filter setup, check to see if it completed. 1171 */ 1172 if (sc->sc_flags & TULIPF_DOING_SETUP) { 1173 TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1174 if ((sc->sc_setup_desc.td_status & TDSTAT_OWN) == 0) 1175 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1176 } 1177 1178 /* 1179 * Go through our Tx list and free mbufs for those 1180 * frames that have been transmitted. 1181 */ 1182 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1183 TULIP_CDTXSYNC(sc, txs->txs_firstdesc, 1184 txs->txs_dmamap->dm_nsegs, 1185 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1186 1187 #ifdef TLP_DEBUG 1188 if (ifp->if_flags & IFF_DEBUG) { 1189 int i; 1190 printf(" txsoft %p trainsmit chain:\n", txs); 1191 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1192 printf(" descriptor %d:\n", i); 1193 printf(" td_status: 0x%08x\n", 1194 sc->sc_txdescs[i].td_status); 1195 printf(" td_ctl: 0x%08x\n", 1196 sc->sc_txdescs[i].td_ctl); 1197 printf(" td_bufaddr1: 0x%08x\n", 1198 sc->sc_txdescs[i].td_bufaddr1); 1199 printf(" td_bufaddr2: 0x%08x\n", 1200 sc->sc_txdescs[i].td_bufaddr2); 1201 if (i == txs->txs_lastdesc) 1202 break; 1203 } 1204 } 1205 #endif 1206 1207 txstat = sc->sc_txdescs[txs->txs_firstdesc].td_status; 1208 if (txstat & TDSTAT_OWN) 1209 break; 1210 1211 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1212 1213 sc->sc_txfree += txs->txs_dmamap->dm_nsegs; 1214 1215 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1216 0, txs->txs_dmamap->dm_mapsize, 1217 BUS_DMASYNC_POSTWRITE); 1218 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1219 m_freem(txs->txs_mbuf); 1220 txs->txs_mbuf = NULL; 1221 1222 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1223 1224 /* 1225 * Check for errors and collisions. 1226 */ 1227 if (txstat & 1228 (TDSTAT_Tx_UF|TDSTAT_Tx_NC|TDSTAT_Tx_LO|TDSTAT_Tx_TO)) { 1229 ifp->if_oerrors++; 1230 #if 0 1231 /* 1232 * XXX Can't check for late or excessive collisions; 1233 * XXX Some 21040s seem to register those even on 1234 * XXX successful transmissions! 1235 */ 1236 if (txstat & TDSTAT_Tx_EC) 1237 ifp->if_collisions += 16; 1238 if (txstat & TDSTAT_Tx_LC) 1239 ifp->if_collisions++; 1240 #endif 1241 } else { 1242 /* Packet was transmitted successfully. */ 1243 ifp->if_opackets++; 1244 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1245 } 1246 } 1247 1248 /* 1249 * If there are no more pending transmissions, cancel the watchdog 1250 * timer. 1251 */ 1252 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1253 ifp->if_timer = 0; 1254 1255 /* 1256 * If we have a receive filter setup pending, do it now. 1257 */ 1258 if (sc->sc_flags & TULIPF_WANT_SETUP) 1259 (*sc->sc_filter_setup)(sc); 1260 } 1261 1262 /* 1263 * tlp_reset: 1264 * 1265 * Perform a soft reset on the Tulip. 1266 */ 1267 void 1268 tlp_reset(sc) 1269 struct tulip_softc *sc; 1270 { 1271 int i; 1272 1273 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1274 1275 for (i = 0; i < 1000; i++) { 1276 /* 1277 * Wait at least 50 PCI cycles for the reset to 1278 * complete before peeking at the Tulip again. 1279 * 10 uSec is a bit longer than 50 PCI cycles 1280 * (at 33MHz), but it doesn't hurt have the extra 1281 * wait. 1282 */ 1283 delay(10); 1284 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1285 break; 1286 } 1287 1288 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1289 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1290 1291 delay(1000); 1292 } 1293 1294 /* 1295 * tlp_init: 1296 * 1297 * Initialize the interface. Must be called at splnet(). 1298 */ 1299 int 1300 tlp_init(sc) 1301 struct tulip_softc *sc; 1302 { 1303 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1304 struct tulip_txsoft *txs; 1305 struct tulip_rxsoft *rxs; 1306 int i, error = 0; 1307 1308 /* 1309 * Cancel any pending I/O. 1310 */ 1311 tlp_stop(sc, 0); 1312 1313 /* 1314 * Initialize `opmode' to 0, and call the pre-init routine, if 1315 * any. This is required because the 2114x and some of the 1316 * clones require that the media-related bits in `opmode' be 1317 * set before performing a soft-reset in order to get internal 1318 * chip pathways are correct. Yay! 1319 */ 1320 sc->sc_opmode = 0; 1321 if (sc->sc_preinit != NULL) 1322 (*sc->sc_preinit)(sc); 1323 1324 /* 1325 * Reset the Tulip to a known state. 1326 */ 1327 tlp_reset(sc); 1328 1329 /* 1330 * Initialize the BUSMODE register. 1331 * 1332 * XXX What about read-multiple/read-line/write-line on 1333 * XXX the 21140 and up? 1334 */ 1335 sc->sc_busmode = BUSMODE_BAR | BUSMODE_PBL_DEFAULT; 1336 switch (sc->sc_cacheline) { 1337 default: 1338 /* 1339 * Note: We must *always* set these bits; a cache 1340 * alignment of 0 is RESERVED. 1341 */ 1342 case 8: 1343 sc->sc_busmode |= BUSMODE_CAL_8LW; 1344 break; 1345 case 16: 1346 sc->sc_busmode |= BUSMODE_CAL_16LW; 1347 break; 1348 case 32: 1349 sc->sc_busmode |= BUSMODE_CAL_32LW; 1350 break; 1351 } 1352 switch (sc->sc_chip) { 1353 case TULIP_CHIP_82C168: 1354 case TULIP_CHIP_82C169: 1355 sc->sc_busmode |= BUSMODE_PNIC_MBO; 1356 break; 1357 default: 1358 /* Nothing. */ 1359 break; 1360 } 1361 #if BYTE_ORDER == BIG_ENDIAN 1362 /* 1363 * XXX There are reports that this doesn't work properly 1364 * in the old Tulip driver, but BUSMODE_DBO does. However, 1365 * BUSMODE_DBO is not available on the 21040, and requires 1366 * us to byte-swap the setup packet. What to do? 1367 */ 1368 sc->sc_busmode |= BUSMODE_BLE; 1369 #endif 1370 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1371 1372 /* 1373 * Initialize the OPMODE register. We don't write it until 1374 * we're ready to begin the transmit and receive processes. 1375 * 1376 * Media-related OPMODE bits are set in the media callbacks 1377 * for each specific chip/board. 1378 */ 1379 sc->sc_opmode |= OPMODE_SR | OPMODE_ST | 1380 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1381 1382 /* 1383 * Magical mystery initialization on the Macronix chips. 1384 * The MX98713 uses its own magic value, the rest share 1385 * a common one. 1386 */ 1387 switch (sc->sc_chip) { 1388 case TULIP_CHIP_MX98713: 1389 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1390 break; 1391 1392 case TULIP_CHIP_MX98713A: 1393 case TULIP_CHIP_MX98715: 1394 case TULIP_CHIP_MX98725: 1395 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1396 break; 1397 1398 default: 1399 /* Nothing. */ 1400 } 1401 1402 /* 1403 * Initialize the transmit descriptor ring. 1404 */ 1405 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1406 for (i = 0; i < TULIP_NTXDESC; i++) { 1407 sc->sc_txdescs[i].td_ctl = TDCTL_CH; 1408 sc->sc_txdescs[i].td_bufaddr2 = 1409 TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)); 1410 } 1411 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1412 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1413 sc->sc_txfree = TULIP_NTXDESC; 1414 sc->sc_txnext = 0; 1415 1416 /* 1417 * Initialize the transmit job descriptors. 1418 */ 1419 SIMPLEQ_INIT(&sc->sc_txfreeq); 1420 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1421 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1422 txs = &sc->sc_txsoft[i]; 1423 txs->txs_mbuf = NULL; 1424 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1425 } 1426 1427 /* 1428 * Initialize the receive descriptor and receive job 1429 * descriptor rings. 1430 */ 1431 for (i = 0; i < TULIP_NRXDESC; i++) { 1432 rxs = &sc->sc_rxsoft[i]; 1433 if (rxs->rxs_mbuf == NULL) { 1434 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1435 printf("%s: unable to allocate or map rx " 1436 "buffer %d, error = %d\n", 1437 sc->sc_dev.dv_xname, i, error); 1438 /* 1439 * XXX Should attempt to run with fewer receive 1440 * XXX buffers instead of just failing. 1441 */ 1442 tlp_rxdrain(sc); 1443 goto out; 1444 } 1445 } 1446 } 1447 sc->sc_rxptr = 0; 1448 1449 /* 1450 * Initialize the interrupt mask and enable interrupts. 1451 */ 1452 /* normal interrupts */ 1453 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1454 1455 /* abnormal interrupts */ 1456 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1457 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1458 1459 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1460 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1461 1462 switch (sc->sc_chip) { 1463 case TULIP_CHIP_WB89C840F: 1464 /* 1465 * Clear bits that we don't want that happen to 1466 * overlap or don't exist. 1467 */ 1468 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1469 break; 1470 1471 default: 1472 /* Nothing. */ 1473 } 1474 1475 sc->sc_rxint_mask &= sc->sc_inten; 1476 sc->sc_txint_mask &= sc->sc_inten; 1477 1478 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1479 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1480 1481 /* 1482 * Give the transmit and receive rings to the Tulip. 1483 */ 1484 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1485 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1486 1487 /* 1488 * On chips that do this differently, set the station address. 1489 */ 1490 switch (sc->sc_chip) { 1491 case TULIP_CHIP_WB89C840F: 1492 { 1493 /* XXX Do this with stream writes? */ 1494 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1495 1496 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1497 bus_space_write_1(sc->sc_st, sc->sc_sh, 1498 cpa + i, LLADDR(ifp->if_sadl)[i]); 1499 } 1500 break; 1501 } 1502 1503 default: 1504 /* Nothing. */ 1505 } 1506 1507 /* 1508 * Set the receive filter. This will start the transmit and 1509 * receive processes. 1510 */ 1511 (*sc->sc_filter_setup)(sc); 1512 1513 /* 1514 * Start the receive process. 1515 */ 1516 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1517 1518 if (sc->sc_tick != NULL) { 1519 /* Start the one second clock. */ 1520 timeout(sc->sc_tick, sc, hz); 1521 } 1522 1523 /* 1524 * Note that the interface is now running. 1525 */ 1526 ifp->if_flags |= IFF_RUNNING; 1527 ifp->if_flags &= ~IFF_OACTIVE; 1528 1529 /* 1530 * Set the media. We must do this after the transmit process is 1531 * running, since we may actually have to transmit packets on 1532 * our board to test link integrity. 1533 */ 1534 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1535 1536 out: 1537 if (error) 1538 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1539 return (error); 1540 } 1541 1542 /* 1543 * tlp_rxdrain: 1544 * 1545 * Drain the receive queue. 1546 */ 1547 void 1548 tlp_rxdrain(sc) 1549 struct tulip_softc *sc; 1550 { 1551 struct tulip_rxsoft *rxs; 1552 int i; 1553 1554 for (i = 0; i < TULIP_NRXDESC; i++) { 1555 rxs = &sc->sc_rxsoft[i]; 1556 if (rxs->rxs_mbuf != NULL) { 1557 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1558 m_freem(rxs->rxs_mbuf); 1559 rxs->rxs_mbuf = NULL; 1560 } 1561 } 1562 } 1563 1564 /* 1565 * tlp_stop: 1566 * 1567 * Stop transmission on the interface. 1568 */ 1569 void 1570 tlp_stop(sc, drain) 1571 struct tulip_softc *sc; 1572 int drain; 1573 { 1574 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1575 struct tulip_txsoft *txs; 1576 1577 if (sc->sc_tick != NULL) { 1578 /* Stop the one second clock. */ 1579 untimeout(sc->sc_tick, sc); 1580 } 1581 1582 /* Disable interrupts. */ 1583 TULIP_WRITE(sc, CSR_INTEN, 0); 1584 1585 /* Stop the transmit and receive processes. */ 1586 TULIP_WRITE(sc, CSR_OPMODE, 0); 1587 TULIP_WRITE(sc, CSR_RXLIST, 0); 1588 TULIP_WRITE(sc, CSR_TXLIST, 0); 1589 1590 /* 1591 * Release any queued transmit buffers. 1592 */ 1593 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1594 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1595 if (txs->txs_mbuf != NULL) { 1596 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1597 m_freem(txs->txs_mbuf); 1598 txs->txs_mbuf = NULL; 1599 } 1600 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1601 } 1602 1603 if (drain) { 1604 /* 1605 * Release the receive buffers. 1606 */ 1607 tlp_rxdrain(sc); 1608 } 1609 1610 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 1611 1612 /* 1613 * Mark the interface down and cancel the watchdog timer. 1614 */ 1615 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1616 ifp->if_timer = 0; 1617 } 1618 1619 #define SROM_EMIT(sc, x) \ 1620 do { \ 1621 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 1622 delay(1); \ 1623 } while (0) 1624 1625 /* 1626 * tlp_srom_idle: 1627 * 1628 * Put the SROM in idle state. 1629 */ 1630 void 1631 tlp_srom_idle(sc) 1632 struct tulip_softc *sc; 1633 { 1634 u_int32_t miirom; 1635 int i; 1636 1637 miirom = MIIROM_SR; 1638 SROM_EMIT(sc, miirom); 1639 1640 miirom |= MIIROM_RD; 1641 SROM_EMIT(sc, miirom); 1642 1643 miirom |= MIIROM_SROMCS; 1644 SROM_EMIT(sc, miirom); 1645 1646 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1647 1648 /* Strobe the clock 25 times. */ 1649 for (i = 0; i < 25; i++) { 1650 SROM_EMIT(sc, miirom); 1651 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1652 } 1653 1654 SROM_EMIT(sc, miirom); 1655 1656 miirom &= ~MIIROM_SROMCS; 1657 SROM_EMIT(sc, miirom); 1658 1659 SROM_EMIT(sc, 0); 1660 } 1661 1662 /* 1663 * tlp_read_srom: 1664 * 1665 * Read the Tulip SROM. 1666 */ 1667 void 1668 tlp_read_srom(sc, word, wordcnt, data) 1669 struct tulip_softc *sc; 1670 int word, wordcnt; 1671 u_int16_t *data; 1672 { 1673 u_int32_t miirom; 1674 int i, x; 1675 1676 tlp_srom_idle(sc); 1677 1678 /* Select the SROM. */ 1679 miirom = MIIROM_SR; 1680 SROM_EMIT(sc, miirom); 1681 1682 miirom |= MIIROM_RD; 1683 SROM_EMIT(sc, miirom); 1684 1685 for (i = 0; i < wordcnt; i++) { 1686 /* Send CHIP SELECT for one clock tick. */ 1687 miirom |= MIIROM_SROMCS; 1688 SROM_EMIT(sc, miirom); 1689 1690 /* Shift in the READ opcode. */ 1691 for (x = 3; x > 0; x--) { 1692 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 1693 miirom |= MIIROM_SROMDI; 1694 else 1695 miirom &= ~MIIROM_SROMDI; 1696 SROM_EMIT(sc, miirom); 1697 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1698 SROM_EMIT(sc, miirom); 1699 } 1700 1701 /* Shift in address. */ 1702 for (x = 6; x > 0; x--) { 1703 if ((word + i) & (1 << (x - 1))) 1704 miirom |= MIIROM_SROMDI; 1705 else 1706 miirom &= ~MIIROM_SROMDI; 1707 SROM_EMIT(sc, miirom); 1708 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1709 SROM_EMIT(sc, miirom); 1710 } 1711 1712 /* Shift out data. */ 1713 miirom &= ~MIIROM_SROMDI; 1714 data[i] = 0; 1715 for (x = 16; x > 0; x--) { 1716 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1717 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 1718 data[i] |= (1 << (x - 1)); 1719 SROM_EMIT(sc, miirom); 1720 } 1721 1722 /* Clear CHIP SELECT. */ 1723 miirom &= ~MIIROM_SROMCS; 1724 SROM_EMIT(sc, miirom); 1725 } 1726 1727 /* Deselect the SROM. */ 1728 SROM_EMIT(sc, 0); 1729 1730 /* ...and idle it. */ 1731 tlp_srom_idle(sc); 1732 } 1733 1734 #undef SROM_EMIT 1735 1736 /* 1737 * tlp_add_rxbuf: 1738 * 1739 * Add a receive buffer to the indicated descriptor. 1740 */ 1741 int 1742 tlp_add_rxbuf(sc, idx) 1743 struct tulip_softc *sc; 1744 int idx; 1745 { 1746 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 1747 struct mbuf *m; 1748 int error; 1749 1750 MGETHDR(m, M_DONTWAIT, MT_DATA); 1751 if (m == NULL) 1752 return (ENOBUFS); 1753 1754 MCLGET(m, M_DONTWAIT); 1755 if ((m->m_flags & M_EXT) == 0) { 1756 m_freem(m); 1757 return (ENOBUFS); 1758 } 1759 1760 if (rxs->rxs_mbuf != NULL) 1761 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1762 1763 rxs->rxs_mbuf = m; 1764 1765 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 1766 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 1767 if (error) { 1768 printf("%s: can't load rx DMA map %d, error = %d\n", 1769 sc->sc_dev.dv_xname, idx, error); 1770 panic("tlp_add_rxbuf"); /* XXX */ 1771 } 1772 1773 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1774 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1775 1776 TULIP_INIT_RXDESC(sc, idx); 1777 1778 return (0); 1779 } 1780 1781 /* 1782 * tlp_crc32: 1783 * 1784 * Compute the 32-bit CRC of the provided buffer. 1785 */ 1786 u_int32_t 1787 tlp_crc32(buf, len) 1788 const u_int8_t *buf; 1789 size_t len; 1790 { 1791 static const u_int32_t crctab[] = { 1792 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 1793 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, 1794 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 1795 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c 1796 }; 1797 u_int32_t crc; 1798 int i; 1799 1800 crc = 0xffffffff; 1801 for (i = 0; i < len; i++) { 1802 crc ^= buf[i]; 1803 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1804 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1805 } 1806 return (crc); 1807 } 1808 1809 /* 1810 * tlp_srom_crcok: 1811 * 1812 * Check the CRC of the Tulip SROM. 1813 */ 1814 int 1815 tlp_srom_crcok(romdata) 1816 const u_int8_t *romdata; 1817 { 1818 u_int32_t crc; 1819 1820 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM); 1821 crc = (crc & 0xffff) ^ 0xffff; 1822 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 1823 return (1); 1824 return (0); 1825 } 1826 1827 /* 1828 * tlp_isv_srom: 1829 * 1830 * Check to see if the SROM is in the new standardized format. 1831 */ 1832 int 1833 tlp_isv_srom(romdata) 1834 const u_int8_t *romdata; 1835 { 1836 int i; 1837 u_int16_t cksum; 1838 1839 if (tlp_srom_crcok(romdata)) { 1840 /* 1841 * SROM CRC checks out; must be in the new format. 1842 */ 1843 return (1); 1844 } 1845 1846 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); 1847 if (cksum == 0xffff || cksum == 0) { 1848 /* 1849 * No checksum present. Check the SROM ID; 18 bytes of 0 1850 * followed by 1 (version) followed by the number of 1851 * adapters which use this SROM (should be non-zero). 1852 */ 1853 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { 1854 if (romdata[i] != 0) 1855 return (0); 1856 } 1857 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) 1858 return (0); 1859 if (romdata[TULIP_ROM_CHIP_COUNT] == 0) 1860 return (0); 1861 return (1); 1862 } 1863 1864 return (0); 1865 } 1866 1867 /* 1868 * tlp_isv_srom_enaddr: 1869 * 1870 * Get the Ethernet address from an ISV SROM. 1871 */ 1872 int 1873 tlp_isv_srom_enaddr(sc, enaddr) 1874 struct tulip_softc *sc; 1875 u_int8_t *enaddr; 1876 { 1877 int i, devcnt; 1878 1879 if (tlp_isv_srom(sc->sc_srom) == 0) 1880 return (0); 1881 1882 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 1883 for (i = 0; i < devcnt; i++) { 1884 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 1885 break; 1886 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 1887 sc->sc_devno) 1888 break; 1889 } 1890 1891 if (i == devcnt) 1892 return (0); 1893 1894 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], 1895 ETHER_ADDR_LEN); 1896 enaddr[5] += i; 1897 1898 return (1); 1899 } 1900 1901 /* 1902 * tlp_parse_old_srom: 1903 * 1904 * Parse old-format SROMs. 1905 * 1906 * This routine is largely lifted from Matt Thomas's `de' driver. 1907 */ 1908 int 1909 tlp_parse_old_srom(sc, enaddr) 1910 struct tulip_softc *sc; 1911 u_int8_t *enaddr; 1912 { 1913 static const u_int8_t testpat[] = 1914 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 1915 int i; 1916 u_int32_t cksum; 1917 1918 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 1919 /* 1920 * Some vendors (e.g. ZNYX) don't use the standard 1921 * DEC Address ROM format, but rather just have an 1922 * Ethernet address in the first 6 bytes, maybe a 1923 * 2 byte checksum, and then all 0xff's. 1924 */ 1925 for (i = 8; i < 32; i++) { 1926 if (sc->sc_srom[i] != 0xff) 1927 return (0); 1928 } 1929 1930 /* 1931 * Sanity check the Ethernet address: 1932 * 1933 * - Make sure it's not multicast or locally 1934 * assigned 1935 * - Make sure it has a non-0 OUI 1936 */ 1937 if (sc->sc_srom[0] & 3) 1938 return (0); 1939 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 1940 sc->sc_srom[2] == 0) 1941 return (0); 1942 1943 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1944 return (1); 1945 } 1946 1947 /* 1948 * Standard DEC Address ROM test. 1949 */ 1950 1951 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 1952 return (0); 1953 1954 for (i = 0; i < 8; i++) { 1955 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 1956 return (0); 1957 } 1958 1959 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1960 1961 cksum = *(u_int16_t *) &enaddr[0]; 1962 1963 cksum <<= 1; 1964 if (cksum > 0xffff) 1965 cksum -= 0xffff; 1966 1967 cksum += *(u_int16_t *) &enaddr[2]; 1968 if (cksum > 0xffff) 1969 cksum -= 0xffff; 1970 1971 cksum <<= 1; 1972 if (cksum > 0xffff) 1973 cksum -= 0xffff; 1974 1975 cksum += *(u_int16_t *) &enaddr[4]; 1976 if (cksum >= 0xffff) 1977 cksum -= 0xffff; 1978 1979 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 1980 return (0); 1981 1982 return (1); 1983 } 1984 1985 /* 1986 * tlp_filter_setup: 1987 * 1988 * Set the Tulip's receive filter. 1989 */ 1990 void 1991 tlp_filter_setup(sc) 1992 struct tulip_softc *sc; 1993 { 1994 struct ethercom *ec = &sc->sc_ethercom; 1995 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1996 struct ether_multi *enm; 1997 struct ether_multistep step; 1998 __volatile u_int32_t *sp; 1999 u_int8_t enaddr[ETHER_ADDR_LEN]; 2000 u_int32_t hash; 2001 int cnt; 2002 2003 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 2004 sc->sc_dev.dv_xname, sc->sc_flags)); 2005 2006 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 2007 2008 /* 2009 * If there are transmissions pending, wait until they have 2010 * completed. 2011 */ 2012 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 2013 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 2014 sc->sc_flags |= TULIPF_WANT_SETUP; 2015 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 2016 sc->sc_dev.dv_xname)); 2017 return; 2018 } 2019 sc->sc_flags &= ~TULIPF_WANT_SETUP; 2020 2021 /* 2022 * If we're running, idle the transmit and receive engines. If 2023 * we're NOT running, we're being called from tlp_init(), and our 2024 * writing OPMODE will start the transmit and receive processes 2025 * in motion. 2026 */ 2027 if (ifp->if_flags & IFF_RUNNING) 2028 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2029 2030 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2031 2032 if (ifp->if_flags & IFF_PROMISC) { 2033 sc->sc_opmode |= OPMODE_PR; 2034 goto allmulti; 2035 } 2036 2037 /* 2038 * Try Perfect filtering first. 2039 */ 2040 2041 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2042 sp = TULIP_CDSP(sc); 2043 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2044 cnt = 0; 2045 ETHER_FIRST_MULTI(step, ec, enm); 2046 while (enm != NULL) { 2047 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2048 /* 2049 * We must listen to a range of multicast addresses. 2050 * For now, just accept all multicasts, rather than 2051 * trying to set only those filter bits needed to match 2052 * the range. (At this time, the only use of address 2053 * ranges is for IP multicast routing, for which the 2054 * range is big enough to require all bits set.) 2055 */ 2056 goto allmulti; 2057 } 2058 if (cnt == (TULIP_MAXADDRS - 2)) { 2059 /* 2060 * We already have our multicast limit (still need 2061 * our station address and broadcast). Go to 2062 * Hash-Perfect mode. 2063 */ 2064 goto hashperfect; 2065 } 2066 *sp++ = ((u_int16_t *) enm->enm_addrlo)[0]; 2067 *sp++ = ((u_int16_t *) enm->enm_addrlo)[1]; 2068 *sp++ = ((u_int16_t *) enm->enm_addrlo)[2]; 2069 ETHER_NEXT_MULTI(step, enm); 2070 } 2071 2072 if (ifp->if_flags & IFF_BROADCAST) { 2073 /* ...and the broadcast address. */ 2074 cnt++; 2075 *sp++ = 0xffff; 2076 *sp++ = 0xffff; 2077 *sp++ = 0xffff; 2078 } 2079 2080 /* Pad the rest with our station address. */ 2081 for (; cnt < TULIP_MAXADDRS; cnt++) { 2082 *sp++ = ((u_int16_t *) enaddr)[0]; 2083 *sp++ = ((u_int16_t *) enaddr)[1]; 2084 *sp++ = ((u_int16_t *) enaddr)[2]; 2085 } 2086 ifp->if_flags &= ~IFF_ALLMULTI; 2087 goto setit; 2088 2089 hashperfect: 2090 /* 2091 * Try Hash-Perfect mode. 2092 */ 2093 2094 /* 2095 * Some 21140 chips have broken Hash-Perfect modes. On these 2096 * chips, we simply use Hash-Only mode, and put our station 2097 * address into the filter. 2098 */ 2099 if (sc->sc_chip == TULIP_CHIP_21140) 2100 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2101 else 2102 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2103 sp = TULIP_CDSP(sc); 2104 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2105 ETHER_FIRST_MULTI(step, ec, enm); 2106 while (enm != NULL) { 2107 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2108 /* 2109 * We must listen to a range of multicast addresses. 2110 * For now, just accept all multicasts, rather than 2111 * trying to set only those filter bits needed to match 2112 * the range. (At this time, the only use of address 2113 * ranges is for IP multicast routing, for which the 2114 * range is big enough to require all bits set.) 2115 */ 2116 goto allmulti; 2117 } 2118 hash = tlp_mchash(enm->enm_addrlo); 2119 sp[hash >> 4] |= 1 << (hash & 0xf); 2120 ETHER_NEXT_MULTI(step, enm); 2121 } 2122 2123 if (ifp->if_flags & IFF_BROADCAST) { 2124 /* ...and the broadcast address. */ 2125 hash = tlp_mchash(etherbroadcastaddr); 2126 sp[hash >> 4] |= 1 << (hash & 0xf); 2127 } 2128 2129 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2130 /* ...and our station address. */ 2131 hash = tlp_mchash(enaddr); 2132 sp[hash >> 4] |= 1 << (hash & 0xf); 2133 } else { 2134 /* 2135 * Hash-Perfect mode; put our station address after 2136 * the hash table. 2137 */ 2138 sp[39] = ((u_int16_t *) enaddr)[0]; 2139 sp[40] = ((u_int16_t *) enaddr)[1]; 2140 sp[41] = ((u_int16_t *) enaddr)[2]; 2141 } 2142 ifp->if_flags &= ~IFF_ALLMULTI; 2143 goto setit; 2144 2145 allmulti: 2146 /* 2147 * Use Perfect filter mode. First address is the broadcast address, 2148 * and pad the rest with our station address. We'll set Pass-all- 2149 * multicast in OPMODE below. 2150 */ 2151 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2152 sp = TULIP_CDSP(sc); 2153 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2154 cnt = 0; 2155 if (ifp->if_flags & IFF_BROADCAST) { 2156 cnt++; 2157 *sp++ = 0xffff; 2158 *sp++ = 0xffff; 2159 *sp++ = 0xffff; 2160 } 2161 for (; cnt < TULIP_MAXADDRS; cnt++) { 2162 *sp++ = ((u_int16_t *) enaddr)[0]; 2163 *sp++ = ((u_int16_t *) enaddr)[1]; 2164 *sp++ = ((u_int16_t *) enaddr)[2]; 2165 } 2166 ifp->if_flags |= IFF_ALLMULTI; 2167 2168 setit: 2169 if (ifp->if_flags & IFF_ALLMULTI) 2170 sc->sc_opmode |= OPMODE_PM; 2171 2172 /* Sync the setup packet buffer. */ 2173 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2174 2175 /* 2176 * Fill in the setup packet descriptor. 2177 */ 2178 sc->sc_setup_desc.td_bufaddr1 = TULIP_CDSPADDR(sc); 2179 sc->sc_setup_desc.td_bufaddr2 = TULIP_CDTXADDR(sc, sc->sc_txnext); 2180 sc->sc_setup_desc.td_ctl = 2181 (TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2182 sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS | 2183 TDCTL_Tx_IC | TDCTL_CH; 2184 sc->sc_setup_desc.td_status = TDSTAT_OWN; 2185 TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2186 2187 /* 2188 * Write the address of the setup descriptor. This also has 2189 * the side effect of giving the transmit ring to the chip, 2190 * since the setup descriptor points to the next available 2191 * descriptor in the ring. 2192 */ 2193 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc)); 2194 2195 /* 2196 * Set the OPMODE register. This will also resume the 2197 * transmit transmit process we idled above. 2198 */ 2199 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2200 2201 sc->sc_flags |= TULIPF_DOING_SETUP; 2202 2203 /* 2204 * Kick the transmitter; this will cause the Tulip to 2205 * read the setup descriptor. 2206 */ 2207 /* XXX USE AUTOPOLLING? */ 2208 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2209 2210 /* Set up a watchdog timer in case the chip flakes out. */ 2211 ifp->if_timer = 5; 2212 2213 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2214 } 2215 2216 /* 2217 * tlp_winb_filter_setup: 2218 * 2219 * Set the Winbond 89C840F's receive filter. 2220 */ 2221 void 2222 tlp_winb_filter_setup(sc) 2223 struct tulip_softc *sc; 2224 { 2225 struct ethercom *ec = &sc->sc_ethercom; 2226 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2227 struct ether_multi *enm; 2228 struct ether_multistep step; 2229 u_int32_t hash, mchash[2]; 2230 2231 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2232 sc->sc_dev.dv_xname, sc->sc_flags)); 2233 2234 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2235 2236 if (ifp->if_flags & IFF_MULTICAST) 2237 sc->sc_opmode |= OPMODE_WINB_AMP; 2238 2239 if (ifp->if_flags & IFF_BROADCAST) 2240 sc->sc_opmode |= OPMODE_WINB_ABP; 2241 2242 if (ifp->if_flags & IFF_PROMISC) { 2243 sc->sc_opmode |= OPMODE_WINB_APP; 2244 goto allmulti; 2245 } 2246 2247 mchash[0] = mchash[1] = 0; 2248 2249 ETHER_FIRST_MULTI(step, ec, enm); 2250 while (enm != NULL) { 2251 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2252 /* 2253 * We must listen to a range of multicast addresses. 2254 * For now, just accept all multicasts, rather than 2255 * trying to set only those filter bits needed to match 2256 * the range. (At this time, the only use of address 2257 * ranges is for IP multicast routing, for which the 2258 * range is big enough to require all bits set.) 2259 */ 2260 goto allmulti; 2261 } 2262 2263 /* 2264 * According to the FreeBSD `wb' driver, yes, you 2265 * really do invert the hash. 2266 */ 2267 hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2268 & 0x3f; 2269 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2270 ETHER_NEXT_MULTI(step, enm); 2271 } 2272 ifp->if_flags &= ~IFF_ALLMULTI; 2273 goto setit; 2274 2275 allmulti: 2276 ifp->if_flags |= IFF_ALLMULTI; 2277 mchash[0] = mchash[1] = 0xffffffff; 2278 2279 setit: 2280 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2281 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2282 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2283 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2284 sc->sc_dev.dv_xname)); 2285 } 2286 2287 /* 2288 * tlp_idle: 2289 * 2290 * Cause the transmit and/or receive processes to go idle. 2291 */ 2292 void 2293 tlp_idle(sc, bits) 2294 struct tulip_softc *sc; 2295 u_int32_t bits; 2296 { 2297 static const char *tx_state_names[] = { 2298 "STOPPED", 2299 "RUNNING - FETCH", 2300 "RUNNING - WAIT", 2301 "RUNNING - READING", 2302 "-- RESERVED --", 2303 "RUNNING - SETUP", 2304 "SUSPENDED", 2305 "RUNNING - CLOSE", 2306 }; 2307 static const char *rx_state_names[] = { 2308 "STOPPED", 2309 "RUNNING - FETCH", 2310 "RUNNING - CHECK", 2311 "RUNNING - WAIT", 2312 "SUSPENDED", 2313 "RUNNING - CLOSE", 2314 "RUNNING - FLUSH", 2315 "RUNNING - QUEUE", 2316 }; 2317 u_int32_t csr, ackmask = 0; 2318 int i; 2319 2320 if (bits & OPMODE_ST) 2321 ackmask |= STATUS_TPS; 2322 2323 if (bits & OPMODE_SR) 2324 ackmask |= STATUS_RPS; 2325 2326 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2327 2328 for (i = 0; i < 1000; i++) { 2329 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2330 break; 2331 delay(10); 2332 } 2333 2334 csr = TULIP_READ(sc, CSR_STATUS); 2335 if ((csr & ackmask) != ackmask) { 2336 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2337 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2338 printf("%s: transmit process failed to idle: " 2339 "state %s\n", sc->sc_dev.dv_xname, 2340 tx_state_names[(csr & STATUS_TS) >> 20]); 2341 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2342 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2343 printf("%s: receive process failed to idle: " 2344 "state %s\n", sc->sc_dev.dv_xname, 2345 rx_state_names[(csr & STATUS_RS) >> 17]); 2346 } 2347 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2348 } 2349 2350 /***************************************************************************** 2351 * Generic media support functions. 2352 *****************************************************************************/ 2353 2354 /* 2355 * tlp_mediastatus: [ifmedia interface function] 2356 * 2357 * Query the current media. 2358 */ 2359 void 2360 tlp_mediastatus(ifp, ifmr) 2361 struct ifnet *ifp; 2362 struct ifmediareq *ifmr; 2363 { 2364 struct tulip_softc *sc = ifp->if_softc; 2365 2366 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2367 } 2368 2369 /* 2370 * tlp_mediachange: [ifmedia interface function] 2371 * 2372 * Update the current media. 2373 */ 2374 int 2375 tlp_mediachange(ifp) 2376 struct ifnet *ifp; 2377 { 2378 struct tulip_softc *sc = ifp->if_softc; 2379 2380 return ((*sc->sc_mediasw->tmsw_set)(sc)); 2381 } 2382 2383 /***************************************************************************** 2384 * Support functions for MII-attached media. 2385 *****************************************************************************/ 2386 2387 /* 2388 * tlp_mii_tick: 2389 * 2390 * One second timer, used to tick the MII. 2391 */ 2392 void 2393 tlp_mii_tick(arg) 2394 void *arg; 2395 { 2396 struct tulip_softc *sc = arg; 2397 int s; 2398 2399 s = splnet(); 2400 mii_tick(&sc->sc_mii); 2401 splx(s); 2402 2403 timeout(sc->sc_tick, sc, hz); 2404 } 2405 2406 /* 2407 * tlp_mii_statchg: [mii interface function] 2408 * 2409 * Callback from PHY when media changes. 2410 */ 2411 void 2412 tlp_mii_statchg(self) 2413 struct device *self; 2414 { 2415 struct tulip_softc *sc = (struct tulip_softc *)self; 2416 2417 /* Idle the transmit and receive processes. */ 2418 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2419 2420 /* 2421 * XXX What about Heartbeat Disable? Is it magically frobbed 2422 * XXX by the PHY? I hope so... 2423 */ 2424 2425 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 2426 2427 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 2428 sc->sc_opmode |= OPMODE_TTM; 2429 2430 if (sc->sc_mii.mii_media_active & IFM_FDX) 2431 sc->sc_opmode |= OPMODE_FD; 2432 2433 /* 2434 * Write new OPMODE bits. This also restarts the transmit 2435 * and receive processes. 2436 */ 2437 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2438 2439 /* XXX Update ifp->if_baudrate */ 2440 } 2441 2442 /* 2443 * tlp_winb_mii_statchg: [mii interface function] 2444 * 2445 * Callback from PHY when media changes. This version is 2446 * for the Winbond 89C840F, which has different OPMODE bits. 2447 */ 2448 void 2449 tlp_winb_mii_statchg(self) 2450 struct device *self; 2451 { 2452 struct tulip_softc *sc = (struct tulip_softc *)self; 2453 2454 /* Idle the transmit and receive processes. */ 2455 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2456 2457 /* 2458 * XXX What about Heartbeat Disable? Is it magically frobbed 2459 * XXX by the PHY? I hope so... 2460 */ 2461 2462 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 2463 2464 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 2465 sc->sc_opmode |= OPMODE_WINB_FES; 2466 2467 if (sc->sc_mii.mii_media_active & IFM_FDX) 2468 sc->sc_opmode |= OPMODE_FD; 2469 2470 /* 2471 * Write new OPMODE bits. This also restarts the transmit 2472 * and receive processes. 2473 */ 2474 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2475 2476 /* XXX Update ifp->if_baudrate */ 2477 } 2478 2479 /* 2480 * tlp_mii_getmedia: 2481 * 2482 * Callback from ifmedia to request current media status. 2483 */ 2484 void 2485 tlp_mii_getmedia(sc, ifmr) 2486 struct tulip_softc *sc; 2487 struct ifmediareq *ifmr; 2488 { 2489 2490 mii_pollstat(&sc->sc_mii); 2491 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2492 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2493 } 2494 2495 /* 2496 * tlp_mii_setmedia: 2497 * 2498 * Callback from ifmedia to request new media setting. 2499 */ 2500 int 2501 tlp_mii_setmedia(sc) 2502 struct tulip_softc *sc; 2503 { 2504 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2505 2506 if (ifp->if_flags & IFF_UP) 2507 mii_mediachg(&sc->sc_mii); 2508 return (0); 2509 } 2510 2511 #define MII_EMIT(sc, x) \ 2512 do { \ 2513 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2514 delay(1); \ 2515 } while (0) 2516 2517 /* 2518 * tlp_sio_mii_sync: 2519 * 2520 * Synchronize the SIO-attached MII. 2521 */ 2522 void 2523 tlp_sio_mii_sync(sc) 2524 struct tulip_softc *sc; 2525 { 2526 u_int32_t miirom; 2527 int i; 2528 2529 miirom = MIIROM_MIIDIR|MIIROM_MDO; 2530 2531 MII_EMIT(sc, miirom); 2532 for (i = 0; i < 32; i++) { 2533 MII_EMIT(sc, miirom | MIIROM_MDC); 2534 MII_EMIT(sc, miirom); 2535 } 2536 } 2537 2538 /* 2539 * tlp_sio_mii_sendbits: 2540 * 2541 * Send a series of bits out the SIO to the MII. 2542 */ 2543 void 2544 tlp_sio_mii_sendbits(sc, data, nbits) 2545 struct tulip_softc *sc; 2546 u_int32_t data; 2547 int nbits; 2548 { 2549 u_int32_t miirom, i; 2550 2551 miirom = MIIROM_MIIDIR; 2552 MII_EMIT(sc, miirom); 2553 2554 for (i = 1 << (nbits - 1); i != 0; i >>= 1) { 2555 if (data & i) 2556 miirom |= MIIROM_MDO; 2557 else 2558 miirom &= ~MIIROM_MDO; 2559 MII_EMIT(sc, miirom); 2560 MII_EMIT(sc, miirom|MIIROM_MDC); 2561 MII_EMIT(sc, miirom); 2562 } 2563 } 2564 2565 /* 2566 * tlp_sio_mii_readreg: 2567 * 2568 * Read a PHY register via SIO-attached MII. 2569 */ 2570 int 2571 tlp_sio_mii_readreg(self, phy, reg) 2572 struct device *self; 2573 int phy, reg; 2574 { 2575 struct tulip_softc *sc = (void *) self; 2576 int val = 0, err = 0, i; 2577 2578 tlp_sio_mii_sync(sc); 2579 2580 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2581 tlp_sio_mii_sendbits(sc, MII_COMMAND_READ, 2); 2582 tlp_sio_mii_sendbits(sc, phy, 5); 2583 tlp_sio_mii_sendbits(sc, reg, 5); 2584 2585 MII_EMIT(sc, MIIROM_MIIDIR); 2586 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2587 2588 MII_EMIT(sc, 0); 2589 MII_EMIT(sc, MIIROM_MDC); 2590 2591 err = TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI); 2592 2593 MII_EMIT(sc, 0); 2594 MII_EMIT(sc, MIIROM_MDC); 2595 2596 for (i = 0; i < 16; i++) { 2597 val <<= 1; 2598 MII_EMIT(sc, 0); 2599 if (err == 0 && TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI)) 2600 val |= 1; 2601 MII_EMIT(sc, MIIROM_MDC); 2602 } 2603 2604 MII_EMIT(sc, 0); 2605 2606 return (err ? 0 : val); 2607 } 2608 2609 /* 2610 * tlp_sio_mii_writereg: 2611 * 2612 * Write a PHY register via SIO-attached MII. 2613 */ 2614 void 2615 tlp_sio_mii_writereg(self, phy, reg, val) 2616 struct device *self; 2617 int phy, reg, val; 2618 { 2619 struct tulip_softc *sc = (void *) self; 2620 2621 tlp_sio_mii_sync(sc); 2622 2623 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2624 tlp_sio_mii_sendbits(sc, MII_COMMAND_WRITE, 2); 2625 tlp_sio_mii_sendbits(sc, phy, 5); 2626 tlp_sio_mii_sendbits(sc, reg, 5); 2627 tlp_sio_mii_sendbits(sc, MII_COMMAND_ACK, 2); 2628 tlp_sio_mii_sendbits(sc, val, 16); 2629 2630 MII_EMIT(sc, 0); 2631 } 2632 2633 #undef MII_EMIT 2634 2635 /* 2636 * tlp_pnic_mii_readreg: 2637 * 2638 * Read a PHY register on the Lite-On PNIC. 2639 */ 2640 int 2641 tlp_pnic_mii_readreg(self, phy, reg) 2642 struct device *self; 2643 int phy, reg; 2644 { 2645 struct tulip_softc *sc = (void *) self; 2646 u_int32_t val; 2647 int i; 2648 2649 TULIP_WRITE(sc, CSR_PNIC_MII, 2650 PNIC_MII_MBO | PNIC_MII_RESERVED | 2651 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 2652 (reg << PNIC_MII_REGSHIFT)); 2653 2654 for (i = 0; i < 1000; i++) { 2655 delay(10); 2656 val = TULIP_READ(sc, CSR_PNIC_MII); 2657 if ((val & PNIC_MII_BUSY) == 0) { 2658 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 2659 return (0); 2660 else 2661 return (val & PNIC_MII_DATA); 2662 } 2663 } 2664 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 2665 return (0); 2666 } 2667 2668 /* 2669 * tlp_pnic_mii_writereg: 2670 * 2671 * Write a PHY register on the Lite-On PNIC. 2672 */ 2673 void 2674 tlp_pnic_mii_writereg(self, phy, reg, val) 2675 struct device *self; 2676 int phy, reg, val; 2677 { 2678 struct tulip_softc *sc = (void *) self; 2679 int i; 2680 2681 TULIP_WRITE(sc, CSR_PNIC_MII, 2682 PNIC_MII_MBO | PNIC_MII_RESERVED | 2683 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 2684 (reg << PNIC_MII_REGSHIFT) | val); 2685 2686 for (i = 0; i < 1000; i++) { 2687 delay(10); 2688 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 2689 return; 2690 } 2691 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 2692 } 2693 2694 /***************************************************************************** 2695 * Chip-specific pre-init and reset functions. 2696 *****************************************************************************/ 2697 2698 /* 2699 * tlp_2114x_preinit: 2700 * 2701 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 2702 */ 2703 void 2704 tlp_2114x_preinit(sc) 2705 struct tulip_softc *sc; 2706 { 2707 2708 /* 2709 * Always set the Must-Be-One bit. 2710 */ 2711 sc->sc_opmode |= OPMODE_MBO; 2712 2713 if (sc->sc_flags & TULIPF_HAS_MII) { 2714 /* 2715 * MII case: just set the port-select bit; we will never 2716 * be called during a media change. 2717 */ 2718 sc->sc_opmode |= OPMODE_PS; 2719 } else { 2720 /* 2721 * ENDEC/PCS mode; set according to selected media type. 2722 * XXX Auto-sense not supported yet. 2723 */ 2724 /* 2725 * XXX This sould come from the SROM. 2726 */ 2727 } 2728 2729 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2730 } 2731 2732 /* 2733 * tlp_pnic_preinit: 2734 * 2735 * Pre-init function for the Lite-On 82c168 and 82c169. 2736 */ 2737 void 2738 tlp_pnic_preinit(sc) 2739 struct tulip_softc *sc; 2740 { 2741 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2742 int media = ife->ifm_media; 2743 2744 if (sc->sc_flags & TULIPF_HAS_MII) { 2745 /* 2746 * MII case: just set the port-select bit; we will never 2747 * be called during a media change. 2748 */ 2749 sc->sc_opmode |= OPMODE_PS; 2750 } else { 2751 /* 2752 * ENDEC/PCS/Nway mode; set according to media type. 2753 */ 2754 if (IFM_SUBTYPE(media) == IFM_AUTO) 2755 media = sc->sc_mii.mii_media_active; 2756 switch (IFM_SUBTYPE(media)) { 2757 case IFM_10_T: 2758 /* Nothing. */ 2759 break; 2760 2761 case IFM_100_TX: 2762 case IFM_100_T4: 2763 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR; 2764 break; 2765 } 2766 } 2767 2768 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2769 2770 /* 2771 * If not using MII, enable the Tx backoff counter. 2772 */ 2773 if ((sc->sc_flags & TULIPF_HAS_MII) == 0) 2774 sc->sc_opmode |= OPMODE_PNIC_TBEN; 2775 } 2776 2777 /***************************************************************************** 2778 * Chip/board-specific media switches. The ones here are ones that 2779 * are potentially common to multiple front-ends. 2780 *****************************************************************************/ 2781 2782 /* 2783 * 21040 and 21041 media switches. 2784 */ 2785 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 2786 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 2787 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 2788 void tlp_21041_tmsw_init __P((struct tulip_softc *)); 2789 void tlp_21040_21041_tmsw_get __P((struct tulip_softc *, 2790 struct ifmediareq *)); 2791 int tlp_21040_21041_tmsw_set __P((struct tulip_softc *)); 2792 2793 const struct tulip_mediasw tlp_21040_mediasw = { 2794 tlp_21040_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2795 }; 2796 2797 const struct tulip_mediasw tlp_21040_tp_mediasw = { 2798 tlp_21040_tp_tmsw_init, tlp_21040_21041_tmsw_get, 2799 tlp_21040_21041_tmsw_set 2800 }; 2801 2802 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 2803 tlp_21040_auibnc_tmsw_init, tlp_21040_21041_tmsw_get, 2804 tlp_21040_21041_tmsw_set 2805 }; 2806 2807 const struct tulip_mediasw tlp_21041_mediasw = { 2808 tlp_21041_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2809 }; 2810 2811 #define ADD(m, t) ifmedia_add(&sc->sc_mii.mii_media, (m), 0, (t)) 2812 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 2813 2814 void 2815 tlp_21040_tmsw_init(sc) 2816 struct tulip_softc *sc; 2817 { 2818 struct tulip_21040_21041_sia_media *tsm; 2819 const char *sep = ""; 2820 2821 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2822 tlp_mediastatus); 2823 2824 printf("%s: ", sc->sc_dev.dv_xname); 2825 2826 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2827 M_WAITOK); 2828 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2829 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2830 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2831 ADD(IFM_ETHER|IFM_10_T, tsm); 2832 PRINT("10baseT"); 2833 2834 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2835 M_WAITOK); 2836 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2837 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2838 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2839 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2840 PRINT("10baseT-FDX"); 2841 2842 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2843 M_WAITOK); 2844 tsm->tsm_siaconn = SIACONN_21040_AUI; 2845 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2846 tsm->tsm_siagen = SIAGEN_21040_AUI; 2847 ADD(IFM_ETHER|IFM_10_5, tsm); 2848 PRINT("10base5"); 2849 2850 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2851 M_WAITOK); 2852 tsm->tsm_siaconn = SIACONN_21040_EXTSIA; 2853 tsm->tsm_siatxrx = SIATXRX_21040_EXTSIA; 2854 tsm->tsm_siagen = SIAGEN_21040_EXTSIA; 2855 ADD(IFM_ETHER|IFM_MANUAL, tsm); 2856 PRINT("manual"); 2857 2858 /* 2859 * XXX Autosense not yet supported. 2860 */ 2861 2862 /* XXX This should be auto-sense. */ 2863 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2864 printf(", default 10baseT"); 2865 2866 printf("\n"); 2867 } 2868 2869 void 2870 tlp_21040_tp_tmsw_init(sc) 2871 struct tulip_softc *sc; 2872 { 2873 struct tulip_21040_21041_sia_media *tsm; 2874 const char *sep = ""; 2875 2876 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2877 tlp_mediastatus); 2878 2879 printf("%s: ", sc->sc_dev.dv_xname); 2880 2881 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2882 M_WAITOK); 2883 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2884 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2885 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2886 ADD(IFM_ETHER|IFM_10_T, tsm); 2887 PRINT("10baseT"); 2888 2889 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2890 M_WAITOK); 2891 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2892 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2893 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2894 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2895 PRINT("10baseT-FDX"); 2896 2897 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2898 printf(", default 10baseT"); 2899 2900 printf("\n"); 2901 } 2902 2903 void 2904 tlp_21040_auibnc_tmsw_init(sc) 2905 struct tulip_softc *sc; 2906 { 2907 struct tulip_21040_21041_sia_media *tsm; 2908 const char *sep = ""; 2909 2910 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2911 tlp_mediastatus); 2912 2913 printf("%s: ", sc->sc_dev.dv_xname); 2914 2915 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2916 M_WAITOK); 2917 tsm->tsm_siaconn = SIACONN_21040_AUI; 2918 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2919 tsm->tsm_siagen = SIAGEN_21040_AUI; 2920 ADD(IFM_ETHER|IFM_10_5, tsm); 2921 PRINT("10base5"); 2922 2923 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 2924 2925 printf("\n"); 2926 } 2927 2928 void 2929 tlp_21041_tmsw_init(sc) 2930 struct tulip_softc *sc; 2931 { 2932 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt; 2933 struct tulip_21040_21041_sia_media *tsm; 2934 const char *sep = "", *defstr; 2935 u_int16_t romdef; 2936 u_int8_t mb; 2937 2938 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2939 tlp_mediastatus); 2940 2941 printf("%s: ", sc->sc_dev.dv_xname); 2942 2943 if (tlp_isv_srom(sc->sc_srom) == 0) 2944 goto not_isv_srom; 2945 2946 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 2947 for (i = 0; i < devcnt; i++) { 2948 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 2949 break; 2950 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 2951 sc->sc_devno) 2952 break; 2953 } 2954 2955 if (i == devcnt) 2956 goto not_isv_srom; 2957 2958 leaf_offset = sc->sc_srom[TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)]; 2959 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE; 2960 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 2961 2962 for (; m_cnt != 0; 2963 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) { 2964 mb = sc->sc_srom[mb_offset]; 2965 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), 2966 M_DEVBUF, M_WAITOK); 2967 switch (mb & TULIP_ROM_MB_MEDIA_CODE) { 2968 case TULIP_ROM_MB_MEDIA_TP: 2969 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 2970 TULIP_ROM_GETW(sc->sc_srom, 2971 mb_offset + TULIP_ROM_MB_CSR13) : 2972 SIACONN_21041_10BASET; 2973 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 2974 TULIP_ROM_GETW(sc->sc_srom, 2975 mb_offset + TULIP_ROM_MB_CSR14) : 2976 SIATXRX_21041_10BASET; 2977 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 2978 TULIP_ROM_GETW(sc->sc_srom, 2979 mb_offset + TULIP_ROM_MB_CSR15) : 2980 SIAGEN_21041_10BASET; 2981 ADD(IFM_ETHER|IFM_10_T, tsm); 2982 PRINT("10baseT"); 2983 break; 2984 2985 case TULIP_ROM_MB_MEDIA_BNC: 2986 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 2987 TULIP_ROM_GETW(sc->sc_srom, 2988 mb_offset + TULIP_ROM_MB_CSR13) : 2989 SIACONN_21041_BNC; 2990 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 2991 TULIP_ROM_GETW(sc->sc_srom, 2992 mb_offset + TULIP_ROM_MB_CSR14) : 2993 SIATXRX_21041_BNC; 2994 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 2995 TULIP_ROM_GETW(sc->sc_srom, 2996 mb_offset + TULIP_ROM_MB_CSR15) : 2997 SIAGEN_21041_BNC; 2998 ADD(IFM_ETHER|IFM_10_2, tsm); 2999 PRINT("10base2"); 3000 break; 3001 3002 case TULIP_ROM_MB_MEDIA_AUI: 3003 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 3004 TULIP_ROM_GETW(sc->sc_srom, 3005 mb_offset + TULIP_ROM_MB_CSR13) : 3006 SIACONN_21041_AUI; 3007 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 3008 TULIP_ROM_GETW(sc->sc_srom, 3009 mb_offset + TULIP_ROM_MB_CSR14) : 3010 SIATXRX_21041_AUI; 3011 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 3012 TULIP_ROM_GETW(sc->sc_srom, 3013 mb_offset + TULIP_ROM_MB_CSR15) : 3014 SIAGEN_21041_AUI; 3015 ADD(IFM_ETHER|IFM_10_5, tsm); 3016 PRINT("10base5"); 3017 break; 3018 3019 case TULIP_ROM_MB_MEDIA_TP_FDX: 3020 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 3021 TULIP_ROM_GETW(sc->sc_srom, 3022 mb_offset + TULIP_ROM_MB_CSR13) : 3023 SIACONN_21041_10BASET_FDX; 3024 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 3025 TULIP_ROM_GETW(sc->sc_srom, 3026 mb_offset + TULIP_ROM_MB_CSR14) : 3027 SIATXRX_21041_10BASET_FDX; 3028 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 3029 TULIP_ROM_GETW(sc->sc_srom, 3030 mb_offset + TULIP_ROM_MB_CSR15) : 3031 SIAGEN_21041_10BASET_FDX; 3032 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 3033 PRINT("10baseT-FDX"); 3034 break; 3035 3036 default: 3037 printf("%s<unknown 0x%02x>", sep, 3038 (mb & TULIP_ROM_MB_MEDIA_CODE)); 3039 sep = ", "; 3040 free(tsm, M_DEVBUF); 3041 } 3042 } 3043 3044 /* 3045 * XXX Autosense not yet supported. 3046 */ 3047 3048 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset + 3049 TULIP_ROM_IL_SELECT_CONN_TYPE); 3050 switch (romdef) { 3051 case SELECT_CONN_TYPE_TP: 3052 case SELECT_CONN_TYPE_TP_AUTONEG: 3053 case SELECT_CONN_TYPE_TP_NOLINKPASS: 3054 defmedia = IFM_ETHER|IFM_10_T; 3055 defstr = "10baseT"; 3056 break; 3057 3058 case SELECT_CONN_TYPE_TP_FDX: 3059 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX; 3060 defstr = "10baseT-FDX"; 3061 break; 3062 3063 case SELECT_CONN_TYPE_BNC: 3064 defmedia = IFM_ETHER|IFM_10_2; 3065 defstr = "10base2"; 3066 break; 3067 3068 case SELECT_CONN_TYPE_AUI: 3069 defmedia = IFM_ETHER|IFM_10_5; 3070 defstr = "10base5"; 3071 break; 3072 #if 0 /* XXX */ 3073 case SELECT_CONN_TYPE_ASENSE: 3074 case SELECT_CONN_TYPE_ASENSE_AUTONEG: 3075 defmedia = IFM_ETHER|IFM_AUTO; 3076 defstr = "auto"; 3077 break; 3078 #endif 3079 default: 3080 defmedia = 0; 3081 defstr = NULL; 3082 } 3083 3084 if (defmedia != 0) 3085 printf(", default %s\n", defstr); 3086 else { 3087 /* 3088 * XXX We should default to auto-sense. 3089 */ 3090 defmedia = IFM_ETHER|IFM_10_T; 3091 defstr = "10baseT"; 3092 3093 printf("\n%s: unknown default media in SROM (0x%04x), " 3094 "using %s\n", sc->sc_dev.dv_xname, romdef, defstr); 3095 } 3096 3097 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 3098 return; 3099 3100 not_isv_srom: 3101 /* 3102 * If we have a board without the standard 21041 SROM format, 3103 * we just assume all media are present and try and pick a 3104 * reasonable default. 3105 */ 3106 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3107 M_WAITOK); 3108 tsm->tsm_siaconn = SIACONN_21041_10BASET; 3109 tsm->tsm_siatxrx = SIATXRX_21041_10BASET; 3110 tsm->tsm_siagen = SIAGEN_21041_10BASET; 3111 ADD(IFM_ETHER|IFM_10_T, tsm); 3112 PRINT("10baseT"); 3113 3114 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3115 M_WAITOK); 3116 tsm->tsm_siaconn = SIACONN_21041_10BASET_FDX; 3117 tsm->tsm_siatxrx = SIATXRX_21041_10BASET_FDX; 3118 tsm->tsm_siagen = SIAGEN_21041_10BASET_FDX; 3119 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 3120 PRINT("10baseT-FDX"); 3121 3122 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3123 M_WAITOK); 3124 tsm->tsm_siaconn = SIACONN_21041_BNC; 3125 tsm->tsm_siatxrx = SIATXRX_21041_BNC; 3126 tsm->tsm_siagen = SIAGEN_21041_BNC; 3127 ADD(IFM_ETHER|IFM_10_2|IFM_FDX, tsm); 3128 PRINT("10base2"); 3129 3130 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3131 M_WAITOK); 3132 tsm->tsm_siaconn = SIACONN_21041_AUI; 3133 tsm->tsm_siatxrx = SIATXRX_21041_AUI; 3134 tsm->tsm_siagen = SIAGEN_21041_AUI; 3135 ADD(IFM_ETHER|IFM_10_5|IFM_FDX, tsm); 3136 PRINT("10base5"); 3137 3138 /* 3139 * XXX Autosense not yet supported. 3140 */ 3141 3142 /* XXX This should be auto-sense. */ 3143 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 3144 printf(", default 10baseT"); 3145 3146 printf("\n"); 3147 } 3148 3149 #undef ADD 3150 #undef PRINT 3151 3152 void 3153 tlp_21040_21041_tmsw_get(sc, ifmr) 3154 struct tulip_softc *sc; 3155 struct ifmediareq *ifmr; 3156 { 3157 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3158 3159 ifmr->ifm_status = 0; 3160 3161 switch (IFM_SUBTYPE(ife->ifm_media)) { 3162 case IFM_AUTO: 3163 /* 3164 * XXX Implement autosensing case. 3165 */ 3166 break; 3167 3168 case IFM_10_T: 3169 /* 3170 * We're able to detect link directly on twisted pair. 3171 */ 3172 ifmr->ifm_status = IFM_AVALID; 3173 if (TULIP_ISSET(sc, CSR_SIASTAT, SIASTAT_LKF) == 0) 3174 ifmr->ifm_status |= IFM_ACTIVE; 3175 /* FALLTHROUGH */ 3176 default: 3177 /* 3178 * If not autosensing, active media is the currently 3179 * selected media. 3180 */ 3181 ifmr->ifm_active = ife->ifm_media; 3182 } 3183 } 3184 3185 int 3186 tlp_21040_21041_tmsw_set(sc) 3187 struct tulip_softc *sc; 3188 { 3189 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3190 struct tulip_21040_21041_sia_media *tsm; 3191 3192 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 3193 /* 3194 * If not autosensing, just pull the SIA settings out 3195 * of the media entry. 3196 */ 3197 tsm = ife->ifm_aux; 3198 TULIP_WRITE(sc, CSR_SIACONN, SIACONN_SRL); 3199 TULIP_WRITE(sc, CSR_SIATXRX, tsm->tsm_siatxrx); 3200 TULIP_WRITE(sc, CSR_SIAGEN, tsm->tsm_siagen); 3201 TULIP_WRITE(sc, CSR_SIACONN, tsm->tsm_siaconn); 3202 3203 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3204 sc->sc_opmode &= ~OPMODE_FD; 3205 if (ife->ifm_media & IFM_FDX) 3206 sc->sc_opmode |= OPMODE_FD; 3207 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3208 } else { 3209 /* 3210 * XXX Implement autosensing case. 3211 */ 3212 } 3213 3214 return (0); 3215 } 3216 3217 /* 3218 * MII-on-SIO media switch. Handles only MII attached to the SIO. 3219 */ 3220 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 3221 3222 const struct tulip_mediasw tlp_sio_mii_mediasw = { 3223 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 3224 }; 3225 3226 void 3227 tlp_sio_mii_tmsw_init(sc) 3228 struct tulip_softc *sc; 3229 { 3230 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3231 3232 sc->sc_mii.mii_ifp = ifp; 3233 sc->sc_mii.mii_readreg = tlp_sio_mii_readreg; 3234 sc->sc_mii.mii_writereg = tlp_sio_mii_writereg; 3235 sc->sc_mii.mii_statchg = sc->sc_statchg; 3236 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3237 tlp_mediastatus); 3238 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 3239 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 3240 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 3241 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 3242 } else { 3243 sc->sc_flags |= TULIPF_HAS_MII; 3244 sc->sc_tick = tlp_mii_tick; 3245 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3246 } 3247 } 3248 3249 /* 3250 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 3251 */ 3252 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 3253 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 3254 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 3255 3256 const struct tulip_mediasw tlp_pnic_mediasw = { 3257 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 3258 }; 3259 3260 void tlp_pnic_nway_statchg __P((struct device *)); 3261 void tlp_pnic_nway_tick __P((void *)); 3262 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 3263 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 3264 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 3265 void tlp_pnic_nway_auto_timeout __P((void *)); 3266 void tlp_pnic_nway_status __P((struct tulip_softc *)); 3267 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 3268 3269 void 3270 tlp_pnic_tmsw_init(sc) 3271 struct tulip_softc *sc; 3272 { 3273 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3274 const char *sep = ""; 3275 3276 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 3277 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3278 3279 sc->sc_mii.mii_ifp = ifp; 3280 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 3281 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 3282 sc->sc_mii.mii_statchg = sc->sc_statchg; 3283 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3284 tlp_mediastatus); 3285 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 3286 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 3287 /* XXX What about AUI/BNC support? */ 3288 printf("%s: ", sc->sc_dev.dv_xname); 3289 3290 tlp_pnic_nway_reset(sc); 3291 3292 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 3293 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 3294 PRINT("10baseT"); 3295 3296 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 3297 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 3298 PRINT("10baseT-FDX"); 3299 3300 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 3301 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 3302 PRINT("100baseTX"); 3303 3304 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 3305 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 3306 PNIC_NWAY_CAP100TXFDX); 3307 PRINT("100baseTX-FDX"); 3308 3309 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 3310 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 3311 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 3312 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 3313 PRINT("auto"); 3314 3315 printf("\n"); 3316 3317 sc->sc_statchg = tlp_pnic_nway_statchg; 3318 sc->sc_tick = tlp_pnic_nway_tick; 3319 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3320 } else { 3321 sc->sc_flags |= TULIPF_HAS_MII; 3322 sc->sc_tick = tlp_mii_tick; 3323 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3324 } 3325 3326 #undef ADD 3327 #undef PRINT 3328 } 3329 3330 void 3331 tlp_pnic_tmsw_get(sc, ifmr) 3332 struct tulip_softc *sc; 3333 struct ifmediareq *ifmr; 3334 { 3335 struct mii_data *mii = &sc->sc_mii; 3336 3337 if (sc->sc_flags & TULIPF_HAS_MII) 3338 tlp_mii_getmedia(sc, ifmr); 3339 else { 3340 mii->mii_media_status = 0; 3341 mii->mii_media_active = IFM_NONE; 3342 tlp_pnic_nway_service(sc, MII_POLLSTAT); 3343 ifmr->ifm_status = sc->sc_mii.mii_media_status; 3344 ifmr->ifm_active = sc->sc_mii.mii_media_active; 3345 } 3346 } 3347 3348 int 3349 tlp_pnic_tmsw_set(sc) 3350 struct tulip_softc *sc; 3351 { 3352 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3353 struct mii_data *mii = &sc->sc_mii; 3354 3355 if (sc->sc_flags & TULIPF_HAS_MII) { 3356 /* 3357 * Make sure the built-in Tx jabber timer is disabled. 3358 */ 3359 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 3360 3361 return (tlp_mii_setmedia(sc)); 3362 } 3363 3364 if (ifp->if_flags & IFF_UP) { 3365 mii->mii_media_status = 0; 3366 mii->mii_media_active = IFM_NONE; 3367 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 3368 } 3369 3370 return (0); 3371 } 3372 3373 void 3374 tlp_pnic_nway_statchg(self) 3375 struct device *self; 3376 { 3377 struct tulip_softc *sc = (struct tulip_softc *)self; 3378 3379 /* Idle the transmit and receive processes. */ 3380 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3381 3382 /* 3383 * XXX What about Heartbeat Disable? Is it magically frobbed 3384 * XXX by the PHY? I hope so... 3385 */ 3386 3387 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 3388 OPMODE_SCR); 3389 3390 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 3391 sc->sc_opmode |= OPMODE_TTM; 3392 TULIP_WRITE(sc, CSR_GPP, 3393 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 3394 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3395 } else { 3396 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR; 3397 TULIP_WRITE(sc, CSR_GPP, 3398 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 3399 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3400 } 3401 3402 if (sc->sc_mii.mii_media_active & IFM_FDX) 3403 sc->sc_opmode |= OPMODE_FD; 3404 3405 /* 3406 * Write new OPMODE bits. This also restarts the transmit 3407 * and receive processes. 3408 */ 3409 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3410 3411 /* XXX Update ifp->if_baudrate */ 3412 } 3413 3414 void 3415 tlp_pnic_nway_tick(arg) 3416 void *arg; 3417 { 3418 struct tulip_softc *sc = arg; 3419 int s; 3420 3421 s = splnet(); 3422 tlp_pnic_nway_service(sc, MII_TICK); 3423 splx(s); 3424 3425 timeout(tlp_pnic_nway_tick, sc, hz); 3426 } 3427 3428 /* 3429 * Support for the Lite-On PNIC internal NWay block. This is constructed 3430 * somewhat like a PHY driver for simplicity. 3431 */ 3432 3433 int 3434 tlp_pnic_nway_service(sc, cmd) 3435 struct tulip_softc *sc; 3436 int cmd; 3437 { 3438 struct mii_data *mii = &sc->sc_mii; 3439 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3440 3441 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 3442 return (0); 3443 3444 switch (cmd) { 3445 case MII_POLLSTAT: 3446 /* Nothing special to do here. */ 3447 break; 3448 3449 case MII_MEDIACHG: 3450 switch (IFM_SUBTYPE(ife->ifm_media)) { 3451 case IFM_AUTO: 3452 (void) tlp_pnic_nway_auto(sc, 1); 3453 break; 3454 case IFM_100_T4: 3455 /* 3456 * XXX Not supported as a manual setting right now. 3457 */ 3458 return (EINVAL); 3459 default: 3460 /* 3461 * NWAY register data is stored in the ifmedia entry. 3462 */ 3463 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3464 } 3465 break; 3466 3467 case MII_TICK: 3468 /* 3469 * Only used for autonegotiation. 3470 */ 3471 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3472 return (0); 3473 3474 /* 3475 * Check to see if we have link. If we do, we don't 3476 * need to restart the autonegotiation process. 3477 */ 3478 if (sc->sc_flags & TULIPF_LINK_UP) 3479 return (0); 3480 3481 /* 3482 * Only retry autonegotiation every 5 seconds. 3483 */ 3484 if (++sc->sc_nway_ticks != 5) 3485 return (0); 3486 3487 sc->sc_nway_ticks = 0; 3488 tlp_pnic_nway_reset(sc); 3489 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 3490 return (0); 3491 break; 3492 } 3493 3494 /* Update the media status. */ 3495 tlp_pnic_nway_status(sc); 3496 3497 /* Callback if something changed. */ 3498 if (sc->sc_nway_active != mii->mii_media_active || 3499 cmd == MII_MEDIACHG) { 3500 (*sc->sc_statchg)(&sc->sc_dev); 3501 sc->sc_nway_active = mii->mii_media_active; 3502 } 3503 return (0); 3504 } 3505 3506 void 3507 tlp_pnic_nway_reset(sc) 3508 struct tulip_softc *sc; 3509 { 3510 3511 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 3512 delay(100); 3513 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 3514 } 3515 3516 int 3517 tlp_pnic_nway_auto(sc, waitfor) 3518 struct tulip_softc *sc; 3519 int waitfor; 3520 { 3521 struct mii_data *mii = &sc->sc_mii; 3522 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3523 u_int32_t reg; 3524 int i; 3525 3526 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 3527 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3528 3529 if (waitfor) { 3530 /* Wait 500ms for it to complete. */ 3531 for (i = 0; i < 500; i++) { 3532 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3533 if (reg & PNIC_NWAY_LPAR_MASK) { 3534 tlp_pnic_nway_acomp(sc); 3535 return (0); 3536 } 3537 delay(1000); 3538 } 3539 #if 0 3540 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3541 printf("%s: autonegotiation failed to complete\n", 3542 sc->sc_dev.dv_xname); 3543 #endif 3544 3545 /* 3546 * Don't need to worry about clearing DOINGAUTO. 3547 * If that's set, a timeout is pending, and it will 3548 * clear the flag. 3549 */ 3550 return (EIO); 3551 } 3552 3553 /* 3554 * Just let it finish asynchronously. This is for the benefit of 3555 * the tick handler driving autonegotiation. Don't want 500ms 3556 * delays all the time while the system is running! 3557 */ 3558 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 3559 sc->sc_flags |= TULIPF_DOINGAUTO; 3560 timeout(tlp_pnic_nway_auto_timeout, sc, hz >> 1); 3561 } 3562 return (EJUSTRETURN); 3563 } 3564 3565 void 3566 tlp_pnic_nway_auto_timeout(arg) 3567 void *arg; 3568 { 3569 struct tulip_softc *sc = arg; 3570 u_int32_t reg; 3571 int s; 3572 3573 s = splnet(); 3574 sc->sc_flags &= ~TULIPF_DOINGAUTO; 3575 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3576 #if 0 3577 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3578 printf("%s: autonegotiation failed to complete\n", 3579 sc->sc_dev.dv_xname); 3580 #endif 3581 3582 tlp_pnic_nway_acomp(sc); 3583 3584 /* Update the media status. */ 3585 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 3586 splx(s); 3587 } 3588 3589 void 3590 tlp_pnic_nway_status(sc) 3591 struct tulip_softc *sc; 3592 { 3593 struct mii_data *mii = &sc->sc_mii; 3594 u_int32_t reg; 3595 3596 mii->mii_media_status = IFM_AVALID; 3597 mii->mii_media_active = IFM_ETHER; 3598 3599 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3600 3601 if (sc->sc_flags & TULIPF_LINK_UP) 3602 mii->mii_media_status |= IFM_ACTIVE; 3603 3604 if (reg & PNIC_NWAY_NW) { 3605 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 3606 /* Erg, still trying, I guess... */ 3607 mii->mii_media_active |= IFM_NONE; 3608 return; 3609 } 3610 3611 #if 0 3612 if (reg & PNIC_NWAY_LPAR100T4) 3613 mii->mii_media_active |= IFM_100_T4; 3614 else 3615 #endif 3616 if (reg & PNIC_NWAY_LPAR100TXFDX) 3617 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 3618 else if (reg & PNIC_NWAY_LPAR100TX) 3619 mii->mii_media_active |= IFM_100_TX; 3620 else if (reg & PNIC_NWAY_LPAR10TFDX) 3621 mii->mii_media_active |= IFM_10_T|IFM_FDX; 3622 else if (reg & PNIC_NWAY_LPAR10T) 3623 mii->mii_media_active |= IFM_10_T; 3624 else 3625 mii->mii_media_active |= IFM_NONE; 3626 } else { 3627 if (reg & PNIC_NWAY_100) 3628 mii->mii_media_active |= IFM_100_TX; 3629 else 3630 mii->mii_media_active |= IFM_10_T; 3631 if (reg & PNIC_NWAY_FD) 3632 mii->mii_media_active |= IFM_FDX; 3633 } 3634 } 3635 3636 void 3637 tlp_pnic_nway_acomp(sc) 3638 struct tulip_softc *sc; 3639 { 3640 u_int32_t reg; 3641 3642 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3643 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 3644 3645 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 3646 reg |= PNIC_NWAY_100; 3647 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 3648 reg |= PNIC_NWAY_FD; 3649 3650 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 3651 } 3652
Indexes created Wed Sep 24 22:09:59 GMT 2025