tulip.c revision 1.16
1 /* $NetBSD: tulip.c,v 1.16 1999/09/21 00:14:54 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <vm/vm.h> /* for PAGE_SIZE */ 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #endif 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/if_inarp.h> 73 #endif 74 75 #ifdef NS 76 #include <netns/ns.h> 77 #include <netns/ns_if.h> 78 #endif 79 80 #include <machine/bus.h> 81 #include <machine/intr.h> 82 83 #include <dev/mii/mii.h> 84 #include <dev/mii/miivar.h> 85 86 #include <dev/ic/tulipreg.h> 87 #include <dev/ic/tulipvar.h> 88 89 /* 90 * The following tables compute the transmit threshold mode. We start 91 * at index 0. When ever we get a transmit underrun, we increment our 92 * index, falling back if we encounter the NULL terminator. 93 * 94 * Note: Store and forward mode is only available on the 100mbps chips 95 * (21140 and higher). 96 */ 97 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = { 98 { OPMODE_TR_72, "72 bytes" }, 99 { OPMODE_TR_96, "96 bytes" }, 100 { OPMODE_TR_128, "128 bytes" }, 101 { OPMODE_TR_160, "160 bytes" }, 102 { 0, NULL }, 103 }; 104 105 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = { 106 { OPMODE_TR_72, "72/128 bytes" }, 107 { OPMODE_TR_96, "96/256 bytes" }, 108 { OPMODE_TR_128, "128/512 bytes" }, 109 { OPMODE_TR_160, "160/1024 bytes" }, 110 { OPMODE_SF, "store and forward mode" }, 111 { 0, NULL }, 112 }; 113 114 #define TXTH_72 0 115 #define TXTH_96 1 116 #define TXTH_128 2 117 #define TXTH_160 3 118 #define TXTH_SF 4 119 120 /* 121 * The Winbond 89C840F does transmit threshold control totally 122 * differently. It simply has a 7-bit field which indicates 123 * the threshold: 124 * 125 * txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16; 126 * 127 * However, we just do Store-and-Forward mode on these chips, since 128 * the DMA engines seem to be flaky. 129 */ 130 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = { 131 { 0, "store and forward mode" }, 132 { 0, NULL }, 133 }; 134 135 #define TXTH_WINB_SF 0 136 137 void tlp_start __P((struct ifnet *)); 138 void tlp_watchdog __P((struct ifnet *)); 139 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 140 141 void tlp_shutdown __P((void *)); 142 143 void tlp_reset __P((struct tulip_softc *)); 144 int tlp_init __P((struct tulip_softc *)); 145 void tlp_rxdrain __P((struct tulip_softc *)); 146 void tlp_stop __P((struct tulip_softc *, int)); 147 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 148 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 149 void tlp_srom_idle __P((struct tulip_softc *)); 150 151 void tlp_filter_setup __P((struct tulip_softc *)); 152 void tlp_winb_filter_setup __P((struct tulip_softc *)); 153 154 void tlp_rxintr __P((struct tulip_softc *)); 155 void tlp_txintr __P((struct tulip_softc *)); 156 157 void tlp_mii_tick __P((void *)); 158 void tlp_mii_statchg __P((struct device *)); 159 void tlp_winb_mii_statchg __P((struct device *)); 160 161 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 162 int tlp_mii_setmedia __P((struct tulip_softc *)); 163 164 void tlp_sio_mii_sync __P((struct tulip_softc *)); 165 void tlp_sio_mii_sendbits __P((struct tulip_softc *, u_int32_t, int)); 166 int tlp_sio_mii_readreg __P((struct device *, int, int)); 167 void tlp_sio_mii_writereg __P((struct device *, int, int, int)); 168 169 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 170 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 171 172 void tlp_2114x_preinit __P((struct tulip_softc *)); 173 void tlp_pnic_preinit __P((struct tulip_softc *)); 174 175 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t)); 176 #define tlp_mchash(addr) (tlp_crc32((addr), ETHER_ADDR_LEN) & \ 177 (TULIP_MCHASHSIZE - 1)) 178 179 #ifdef TLP_DEBUG 180 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 181 printf x 182 #else 183 #define DPRINTF(sc, x) /* nothing */ 184 #endif 185 186 /* 187 * tlp_attach: 188 * 189 * Attach a Tulip interface to the system. 190 */ 191 void 192 tlp_attach(sc, enaddr) 193 struct tulip_softc *sc; 194 const u_int8_t *enaddr; 195 { 196 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 197 int i, rseg, error; 198 bus_dma_segment_t seg; 199 200 /* 201 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 202 */ 203 204 /* 205 * Setup the transmit threshold table. 206 */ 207 switch (sc->sc_chip) { 208 case TULIP_CHIP_DE425: 209 case TULIP_CHIP_21040: 210 case TULIP_CHIP_21041: 211 sc->sc_txth = tlp_10_txthresh_tab; 212 break; 213 214 default: 215 sc->sc_txth = tlp_10_100_txthresh_tab; 216 break; 217 } 218 219 /* 220 * Setup the filter setup function. 221 */ 222 switch (sc->sc_chip) { 223 case TULIP_CHIP_WB89C840F: 224 sc->sc_filter_setup = tlp_winb_filter_setup; 225 break; 226 227 default: 228 sc->sc_filter_setup = tlp_filter_setup; 229 break; 230 } 231 232 /* 233 * Set up the media status change function. 234 */ 235 switch (sc->sc_chip) { 236 case TULIP_CHIP_WB89C840F: 237 sc->sc_statchg = tlp_winb_mii_statchg; 238 break; 239 240 default: 241 /* 242 * We may override this if we have special media 243 * handling requirements (e.g. flipping GPIO pins). 244 * 245 * The pure-MII statchg function covers the basics. 246 */ 247 sc->sc_statchg = tlp_mii_statchg; 248 break; 249 } 250 251 /* 252 * Set up various chip-specific quirks. 253 */ 254 switch (sc->sc_chip) { 255 case TULIP_CHIP_21140: 256 case TULIP_CHIP_21140A: 257 case TULIP_CHIP_21142: 258 case TULIP_CHIP_21143: 259 sc->sc_preinit = tlp_2114x_preinit; 260 break; 261 262 case TULIP_CHIP_82C168: 263 case TULIP_CHIP_82C169: 264 sc->sc_preinit = tlp_pnic_preinit; 265 266 /* 267 * These chips seem to have busted DMA engines; just put them 268 * in Store-and-Forward mode from the get-go. 269 */ 270 sc->sc_txthresh = TXTH_SF; 271 break; 272 273 case TULIP_CHIP_WB89C840F: 274 sc->sc_flags |= TULIPF_IC_FS; 275 break; 276 277 default: 278 /* Nothing. */ 279 } 280 281 SIMPLEQ_INIT(&sc->sc_txfreeq); 282 SIMPLEQ_INIT(&sc->sc_txdirtyq); 283 284 /* 285 * Allocate the control data structures, and create and load the 286 * DMA map for it. 287 */ 288 if ((error = bus_dmamem_alloc(sc->sc_dmat, 289 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg, 290 0)) != 0) { 291 printf("%s: unable to allocate control data, error = %d\n", 292 sc->sc_dev.dv_xname, error); 293 goto fail_0; 294 } 295 296 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 297 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 298 BUS_DMA_COHERENT)) != 0) { 299 printf("%s: unable to map control data, error = %d\n", 300 sc->sc_dev.dv_xname, error); 301 goto fail_1; 302 } 303 304 if ((error = bus_dmamap_create(sc->sc_dmat, 305 sizeof(struct tulip_control_data), 1, 306 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 307 printf("%s: unable to create control data DMA map, " 308 "error = %d\n", sc->sc_dev.dv_xname, error); 309 goto fail_2; 310 } 311 312 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 313 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 314 0)) != 0) { 315 printf("%s: unable to load control data DMA map, error = %d\n", 316 sc->sc_dev.dv_xname, error); 317 goto fail_3; 318 } 319 320 /* 321 * Create the transmit buffer DMA maps. 322 */ 323 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 324 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 325 TULIP_NTXSEGS, MCLBYTES, 0, 0, 326 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 327 printf("%s: unable to create tx DMA map %d, " 328 "error = %d\n", sc->sc_dev.dv_xname, i, error); 329 goto fail_4; 330 } 331 } 332 333 /* 334 * Create the recieve buffer DMA maps. 335 */ 336 for (i = 0; i < TULIP_NRXDESC; i++) { 337 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 338 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 339 printf("%s: unable to create rx DMA map %d, " 340 "error = %d\n", sc->sc_dev.dv_xname, i, error); 341 goto fail_5; 342 } 343 sc->sc_rxsoft[i].rxs_mbuf = NULL; 344 } 345 346 /* 347 * Reset the chip to a known state. 348 */ 349 tlp_reset(sc); 350 351 /* Announce ourselves. */ 352 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 353 sc->sc_name[0] != '\0' ? sc->sc_name : "", 354 sc->sc_name[0] != '\0' ? ", " : "", 355 ether_sprintf(enaddr)); 356 357 /* 358 * Initialize our media structures. This may probe the MII, if 359 * present. 360 */ 361 (*sc->sc_mediasw->tmsw_init)(sc); 362 363 ifp = &sc->sc_ethercom.ec_if; 364 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 365 ifp->if_softc = sc; 366 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 367 ifp->if_ioctl = tlp_ioctl; 368 ifp->if_start = tlp_start; 369 ifp->if_watchdog = tlp_watchdog; 370 371 /* 372 * Attach the interface. 373 */ 374 if_attach(ifp); 375 ether_ifattach(ifp, enaddr); 376 #if NBPFILTER > 0 377 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 378 sizeof(struct ether_header)); 379 #endif 380 381 /* 382 * Make sure the interface is shutdown during reboot. 383 */ 384 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 385 if (sc->sc_sdhook == NULL) 386 printf("%s: WARNING: unable to establish shutdown hook\n", 387 sc->sc_dev.dv_xname); 388 return; 389 390 /* 391 * Free any resources we've allocated during the failed attach 392 * attempt. Do this in reverse order and fall through. 393 */ 394 fail_5: 395 for (i = 0; i < TULIP_NRXDESC; i++) { 396 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 397 bus_dmamap_destroy(sc->sc_dmat, 398 sc->sc_rxsoft[i].rxs_dmamap); 399 } 400 fail_4: 401 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 402 if (sc->sc_txsoft[i].txs_dmamap != NULL) 403 bus_dmamap_destroy(sc->sc_dmat, 404 sc->sc_txsoft[i].txs_dmamap); 405 } 406 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 407 fail_3: 408 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 409 fail_2: 410 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 411 sizeof(struct tulip_control_data)); 412 fail_1: 413 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 414 fail_0: 415 return; 416 } 417 418 /* 419 * tlp_shutdown: 420 * 421 * Make sure the interface is stopped at reboot time. 422 */ 423 void 424 tlp_shutdown(arg) 425 void *arg; 426 { 427 struct tulip_softc *sc = arg; 428 429 tlp_stop(sc, 1); 430 } 431 432 /* 433 * tlp_start: [ifnet interface function] 434 * 435 * Start packet transmission on the interface. 436 */ 437 void 438 tlp_start(ifp) 439 struct ifnet *ifp; 440 { 441 struct tulip_softc *sc = ifp->if_softc; 442 struct mbuf *m0, *m; 443 struct tulip_txsoft *txs, *last_txs; 444 bus_dmamap_t dmamap; 445 int error, firsttx, nexttx, lasttx, ofree, seg; 446 447 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 448 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 449 450 /* 451 * If we want a filter setup, it means no more descriptors were 452 * available for the setup routine. Let it get a chance to wedge 453 * itself into the ring. 454 */ 455 if (sc->sc_flags & TULIPF_WANT_SETUP) 456 ifp->if_flags |= IFF_OACTIVE; 457 458 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 459 return; 460 461 /* 462 * Remember the previous number of free descriptors and 463 * the first descriptor we'll use. 464 */ 465 ofree = sc->sc_txfree; 466 firsttx = sc->sc_txnext; 467 468 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 469 sc->sc_dev.dv_xname, ofree, firsttx)); 470 471 /* 472 * Loop through the send queue, setting up transmit descriptors 473 * until we drain the queue, or use up all available transmit 474 * descriptors. 475 */ 476 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 477 sc->sc_txfree != 0) { 478 /* 479 * Grab a packet off the queue. 480 */ 481 IF_DEQUEUE(&ifp->if_snd, m0); 482 if (m0 == NULL) 483 break; 484 485 dmamap = txs->txs_dmamap; 486 487 /* 488 * Load the DMA map. If this fails, the packet either 489 * didn't fit in the alloted number of segments, or we were 490 * short on resources. In this case, we'll copy and try 491 * again. 492 */ 493 if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 494 BUS_DMA_NOWAIT) != 0) { 495 MGETHDR(m, M_DONTWAIT, MT_DATA); 496 if (m == NULL) { 497 printf("%s: unable to allocate Tx mbuf\n", 498 sc->sc_dev.dv_xname); 499 IF_PREPEND(&ifp->if_snd, m0); 500 break; 501 } 502 if (m0->m_pkthdr.len > MHLEN) { 503 MCLGET(m, M_DONTWAIT); 504 if ((m->m_flags & M_EXT) == 0) { 505 printf("%s: unable to allocate Tx " 506 "cluster\n", sc->sc_dev.dv_xname); 507 m_freem(m); 508 IF_PREPEND(&ifp->if_snd, m0); 509 break; 510 } 511 } 512 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 513 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 514 m_freem(m0); 515 m0 = m; 516 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 517 m0, BUS_DMA_NOWAIT); 518 if (error) { 519 printf("%s: unable to load Tx buffer, " 520 "error = %d\n", sc->sc_dev.dv_xname, error); 521 IF_PREPEND(&ifp->if_snd, m0); 522 break; 523 } 524 } 525 526 /* 527 * Ensure we have enough descriptors free to describe 528 * the packet. 529 */ 530 if (dmamap->dm_nsegs > sc->sc_txfree) { 531 /* 532 * Not enough free descriptors to transmit this 533 * packet. We haven't committed to anything yet, 534 * so just unload the DMA map, put the packet 535 * back on the queue, and punt. Notify the upper 536 * layer that there are no more slots left. 537 * 538 * XXX We could allocate an mbuf and copy, but 539 * XXX it is worth it? 540 */ 541 ifp->if_flags |= IFF_OACTIVE; 542 bus_dmamap_unload(sc->sc_dmat, dmamap); 543 IF_PREPEND(&ifp->if_snd, m0); 544 break; 545 } 546 547 /* 548 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 549 */ 550 551 /* Sync the DMA map. */ 552 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 553 BUS_DMASYNC_PREWRITE); 554 555 /* 556 * Initialize the transmit descriptors. 557 */ 558 for (nexttx = sc->sc_txnext, seg = 0; 559 seg < dmamap->dm_nsegs; 560 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 561 /* 562 * If this is the first descriptor we're 563 * enqueueing, don't set the OWN bit just 564 * yet. That could cause a race condition. 565 * We'll do it below. 566 */ 567 sc->sc_txdescs[nexttx].td_status = 568 (nexttx == firsttx) ? 0 : TDSTAT_OWN; 569 sc->sc_txdescs[nexttx].td_bufaddr1 = 570 dmamap->dm_segs[seg].ds_addr; 571 sc->sc_txdescs[nexttx].td_ctl = 572 (dmamap->dm_segs[seg].ds_len << TDCTL_SIZE1_SHIFT) | 573 TDCTL_CH; 574 lasttx = nexttx; 575 } 576 577 /* Set `first segment' and `last segment' appropriately. */ 578 sc->sc_txdescs[sc->sc_txnext].td_ctl |= TDCTL_Tx_FS; 579 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_LS; 580 581 #ifdef TLP_DEBUG 582 if (ifp->if_flags & IFF_DEBUG) { 583 printf(" txsoft %p trainsmit chain:\n", txs); 584 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 585 printf(" descriptor %d:\n", seg); 586 printf(" td_status: 0x%08x\n", 587 sc->sc_txdescs[seg].td_status); 588 printf(" td_ctl: 0x%08x\n", 589 sc->sc_txdescs[seg].td_ctl); 590 printf(" td_bufaddr1: 0x%08x\n", 591 sc->sc_txdescs[seg].td_bufaddr1); 592 printf(" td_bufaddr2: 0x%08x\n", 593 sc->sc_txdescs[seg].td_bufaddr2); 594 if (seg == lasttx) 595 break; 596 } 597 } 598 #endif 599 600 /* Sync the descriptors we're using. */ 601 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 602 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 603 604 /* 605 * Store a pointer to the packet so we can free it later, 606 * and remember what txdirty will be once the packet is 607 * done. 608 */ 609 txs->txs_mbuf = m0; 610 txs->txs_firstdesc = sc->sc_txnext; 611 txs->txs_lastdesc = lasttx; 612 613 /* Advance the tx pointer. */ 614 sc->sc_txfree -= dmamap->dm_nsegs; 615 sc->sc_txnext = nexttx; 616 617 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 618 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 619 620 last_txs = txs; 621 622 #if NBPFILTER > 0 623 /* 624 * Pass the packet to any BPF listeners. 625 */ 626 if (ifp->if_bpf) 627 bpf_mtap(ifp->if_bpf, m0); 628 #endif /* NBPFILTER > 0 */ 629 } 630 631 if (txs == NULL || sc->sc_txfree == 0) { 632 /* No more slots left; notify upper layer. */ 633 ifp->if_flags |= IFF_OACTIVE; 634 } 635 636 if (sc->sc_txfree != ofree) { 637 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 638 sc->sc_dev.dv_xname, lasttx, firsttx)); 639 /* 640 * Cause a transmit interrupt to happen on the 641 * last packet we enqueued. 642 */ 643 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_IC; 644 TULIP_CDTXSYNC(sc, lasttx, 1, 645 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 646 647 /* 648 * Some clone chips want IC on the *first* segment in 649 * the packet. Appease them. 650 */ 651 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 652 last_txs->txs_firstdesc != lasttx) { 653 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 654 TDCTL_Tx_IC; 655 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 656 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 657 } 658 659 /* 660 * The entire packet chain is set up. Give the 661 * first descriptor to the chip now. 662 */ 663 sc->sc_txdescs[firsttx].td_status |= TDSTAT_OWN; 664 TULIP_CDTXSYNC(sc, firsttx, 1, 665 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 666 667 /* Wake up the transmitter. */ 668 /* XXX USE AUTOPOLLING? */ 669 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 670 671 /* Set a watchdog timer in case the chip flakes out. */ 672 ifp->if_timer = 5; 673 } 674 } 675 676 /* 677 * tlp_watchdog: [ifnet interface function] 678 * 679 * Watchdog timer handler. 680 */ 681 void 682 tlp_watchdog(ifp) 683 struct ifnet *ifp; 684 { 685 struct tulip_softc *sc = ifp->if_softc; 686 int doing_setup, doing_transmit; 687 688 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 689 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 690 691 if (doing_setup && doing_transmit) { 692 printf("%s: filter setup and transmit timeout\n", 693 sc->sc_dev.dv_xname); 694 ifp->if_oerrors++; 695 } else if (doing_transmit) { 696 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 697 ifp->if_oerrors++; 698 } else if (doing_setup) 699 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 700 else 701 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 702 703 (void) tlp_init(sc); 704 705 /* Try to get more packets going. */ 706 tlp_start(ifp); 707 } 708 709 /* 710 * tlp_ioctl: [ifnet interface function] 711 * 712 * Handle control requests from the operator. 713 */ 714 int 715 tlp_ioctl(ifp, cmd, data) 716 struct ifnet *ifp; 717 u_long cmd; 718 caddr_t data; 719 { 720 struct tulip_softc *sc = ifp->if_softc; 721 struct ifreq *ifr = (struct ifreq *)data; 722 struct ifaddr *ifa = (struct ifaddr *)data; 723 int s, error = 0; 724 725 s = splnet(); 726 727 switch (cmd) { 728 case SIOCSIFADDR: 729 ifp->if_flags |= IFF_UP; 730 731 switch (ifa->ifa_addr->sa_family) { 732 #ifdef INET 733 case AF_INET: 734 if ((error = tlp_init(sc)) != 0) 735 break; 736 arp_ifinit(ifp, ifa); 737 break; 738 #endif /* INET */ 739 #ifdef NS 740 case AF_NS: 741 { 742 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 743 744 if (ns_nullhost(*ina)) 745 ina->x_host = *(union ns_host *) 746 LLADDR(ifp->if_sadl); 747 else 748 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 749 ifp->if_addrlen); 750 /* Set new address. */ 751 error = tlp_init(sc); 752 break; 753 } 754 #endif /* NS */ 755 default: 756 error = tlp_init(sc); 757 break; 758 } 759 break; 760 761 case SIOCSIFMTU: 762 if (ifr->ifr_mtu > ETHERMTU) 763 error = EINVAL; 764 else 765 ifp->if_mtu = ifr->ifr_mtu; 766 break; 767 768 case SIOCSIFFLAGS: 769 if ((ifp->if_flags & IFF_UP) == 0 && 770 (ifp->if_flags & IFF_RUNNING) != 0) { 771 /* 772 * If interface is marked down and it is running, then 773 * stop it. 774 */ 775 tlp_stop(sc, 1); 776 } else if ((ifp->if_flags & IFF_UP) != 0 && 777 (ifp->if_flags & IFF_RUNNING) == 0) { 778 /* 779 * If interfase it marked up and it is stopped, then 780 * start it. 781 */ 782 error = tlp_init(sc); 783 } else if ((ifp->if_flags & IFF_UP) != 0) { 784 /* 785 * Reset the interface to pick up changes in any other 786 * flags that affect the hardware state. 787 */ 788 error = tlp_init(sc); 789 } 790 break; 791 792 case SIOCADDMULTI: 793 case SIOCDELMULTI: 794 error = (cmd == SIOCADDMULTI) ? 795 ether_addmulti(ifr, &sc->sc_ethercom) : 796 ether_delmulti(ifr, &sc->sc_ethercom); 797 798 if (error == ENETRESET) { 799 /* 800 * Multicast list has changed. Set the filter 801 * accordingly. 802 */ 803 (*sc->sc_filter_setup)(sc); 804 error = 0; 805 } 806 break; 807 808 case SIOCSIFMEDIA: 809 case SIOCGIFMEDIA: 810 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 811 break; 812 813 default: 814 error = EINVAL; 815 break; 816 } 817 818 /* Try to get more packets going. */ 819 tlp_start(ifp); 820 821 splx(s); 822 return (error); 823 } 824 825 /* 826 * tlp_intr: 827 * 828 * Interrupt service routine. 829 */ 830 int 831 tlp_intr(arg) 832 void *arg; 833 { 834 struct tulip_softc *sc = arg; 835 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 836 u_int32_t status, rxstatus, txstatus; 837 int handled = 0, txthresh; 838 839 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 840 841 /* 842 * If the interface isn't running, the interrupt couldn't 843 * possibly have come from us. 844 */ 845 if ((ifp->if_flags & IFF_RUNNING) == 0) 846 return (0); 847 848 for (;;) { 849 status = TULIP_READ(sc, CSR_STATUS); 850 if (status) 851 TULIP_WRITE(sc, CSR_STATUS, status); 852 853 if ((status & sc->sc_inten) == 0) 854 break; 855 856 handled = 1; 857 858 rxstatus = status & sc->sc_rxint_mask; 859 txstatus = status & sc->sc_txint_mask; 860 861 if (rxstatus) { 862 /* Grab new any new packets. */ 863 tlp_rxintr(sc); 864 865 if (rxstatus & STATUS_RWT) 866 printf("%s: receive watchdog timeout\n", 867 sc->sc_dev.dv_xname); 868 869 if (rxstatus & STATUS_RU) { 870 printf("%s: receive ring overrun\n", 871 sc->sc_dev.dv_xname); 872 /* Get the receive process going again. */ 873 tlp_idle(sc, OPMODE_SR); 874 TULIP_WRITE(sc, CSR_RXLIST, 875 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 876 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 877 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 878 break; 879 } 880 } 881 882 if (txstatus) { 883 /* Sweep up transmit descriptors. */ 884 tlp_txintr(sc); 885 886 if (txstatus & STATUS_TJT) 887 printf("%s: transmit jabber timeout\n", 888 sc->sc_dev.dv_xname); 889 890 if (txstatus & STATUS_UNF) { 891 /* 892 * Increase our transmit threshold if 893 * another is available. 894 */ 895 txthresh = sc->sc_txthresh + 1; 896 if (sc->sc_txth[txthresh].txth_name != NULL) { 897 /* Idle the transmit process. */ 898 tlp_idle(sc, OPMODE_ST); 899 900 sc->sc_txthresh = txthresh; 901 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 902 sc->sc_opmode |= 903 sc->sc_txth[txthresh].txth_opmode; 904 printf("%s: transmit underrun; new " 905 "threshold: %s\n", 906 sc->sc_dev.dv_xname, 907 sc->sc_txth[txthresh].txth_name); 908 909 /* 910 * Set the new threshold and restart 911 * the transmit process. 912 */ 913 TULIP_WRITE(sc, CSR_OPMODE, 914 sc->sc_opmode); 915 } 916 /* 917 * XXX Log every Nth underrun from 918 * XXX now on? 919 */ 920 } 921 } 922 923 if (status & (STATUS_TPS|STATUS_RPS)) { 924 if (status & STATUS_TPS) 925 printf("%s: transmit process stopped\n", 926 sc->sc_dev.dv_xname); 927 if (status & STATUS_RPS) 928 printf("%s: receive process stopped\n", 929 sc->sc_dev.dv_xname); 930 (void) tlp_init(sc); 931 break; 932 } 933 934 if (status & STATUS_SE) { 935 const char *str; 936 switch (status & STATUS_EB) { 937 case STATUS_EB_PARITY: 938 str = "parity error"; 939 break; 940 941 case STATUS_EB_MABT: 942 str = "master abort"; 943 break; 944 945 case STATUS_EB_TABT: 946 str = "target abort"; 947 break; 948 949 default: 950 str = "unknown error"; 951 break; 952 } 953 printf("%s: fatal system error: %s\n", 954 sc->sc_dev.dv_xname, str); 955 (void) tlp_init(sc); 956 break; 957 } 958 959 /* 960 * Not handled: 961 * 962 * Transmit buffer unavailable -- normal 963 * condition, nothing to do, really. 964 * 965 * General purpose timer experied -- we don't 966 * use the general purpose timer. 967 * 968 * Early receive interrupt -- not available on 969 * all chips, we just use RI. We also only 970 * use single-segment receive DMA, so this 971 * is mostly useless. 972 */ 973 } 974 975 /* Try to get more packets going. */ 976 tlp_start(ifp); 977 978 return (handled); 979 } 980 981 /* 982 * tlp_rxintr: 983 * 984 * Helper; handle receive interrupts. 985 */ 986 void 987 tlp_rxintr(sc) 988 struct tulip_softc *sc; 989 { 990 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 991 struct ether_header *eh; 992 struct tulip_rxsoft *rxs; 993 struct mbuf *m; 994 u_int32_t rxstat; 995 int i, len; 996 997 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 998 rxs = &sc->sc_rxsoft[i]; 999 1000 TULIP_CDRXSYNC(sc, i, 1001 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1002 1003 rxstat = sc->sc_rxdescs[i].td_status; 1004 1005 if (rxstat & TDSTAT_OWN) { 1006 /* 1007 * We have processed all of the receive buffers. 1008 */ 1009 break; 1010 } 1011 1012 /* 1013 * Make sure the packet fit in one buffer. This should 1014 * always be the case. But the Lite-On PNIC, rev 33 1015 * has an awful receive engine bug, which may require 1016 * a very icky work-around. 1017 */ 1018 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1019 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1020 printf("%s: incoming packet spilled, resetting\n", 1021 sc->sc_dev.dv_xname); 1022 (void) tlp_init(sc); 1023 return; 1024 } 1025 1026 /* 1027 * If any collisions were seen on the wire, count one. 1028 */ 1029 if (rxstat & TDSTAT_Rx_CS) 1030 ifp->if_collisions++; 1031 1032 /* 1033 * If an error occured, update stats, clear the status 1034 * word, and leave the packet buffer in place. It will 1035 * simply be reused the next time the ring comes around. 1036 */ 1037 if (rxstat & TDSTAT_ES) { 1038 #define PRINTERR(bit, str) \ 1039 if (rxstat & (bit)) \ 1040 printf("%s: receive error: %s\n", \ 1041 sc->sc_dev.dv_xname, str) 1042 ifp->if_ierrors++; 1043 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1044 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1045 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1046 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1047 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1048 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1049 #undef PRINTERR 1050 TULIP_INIT_RXDESC(sc, i); 1051 continue; 1052 } 1053 1054 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1055 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1056 1057 /* 1058 * No errors; receive the packet. Note the Tulip 1059 * includes the CRC with every packet; trim it. 1060 */ 1061 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; 1062 1063 #ifdef __NO_STRICT_ALIGNMENT 1064 /* 1065 * Allocate a new mbuf cluster. If that fails, we are 1066 * out of memory, and must drop the packet and recycle 1067 * the buffer that's already attached to this descriptor. 1068 */ 1069 m = rxs->rxs_mbuf; 1070 if (tlp_add_rxbuf(sc, i) != 0) { 1071 ifp->if_ierrors++; 1072 TULIP_INIT_RXDESC(sc, i); 1073 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1074 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1075 continue; 1076 } 1077 #else 1078 /* 1079 * The Tulip's receive buffers must be 4-byte aligned. 1080 * But this means that the data after the Ethernet header 1081 * is misaligned. We must allocate a new buffer and 1082 * copy the data, shifted forward 2 bytes. 1083 */ 1084 MGETHDR(m, M_DONTWAIT, MT_DATA); 1085 if (m == NULL) { 1086 dropit: 1087 ifp->if_ierrors++; 1088 TULIP_INIT_RXDESC(sc, i); 1089 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1090 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1091 continue; 1092 } 1093 if (len > (MHLEN - 2)) { 1094 MCLGET(m, M_DONTWAIT); 1095 if ((m->m_flags & M_EXT) == 0) { 1096 m_freem(m); 1097 goto dropit; 1098 } 1099 } 1100 m->m_data += 2; 1101 1102 /* 1103 * Note that we use clusters for incoming frames, so the 1104 * buffer is virtually contiguous. 1105 */ 1106 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1107 1108 /* Allow the receive descriptor to continue using its mbuf. */ 1109 TULIP_INIT_RXDESC(sc, i); 1110 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1111 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1112 #endif /* __NO_STRICT_ALIGNMENT */ 1113 1114 ifp->if_ipackets++; 1115 eh = mtod(m, struct ether_header *); 1116 m->m_pkthdr.rcvif = ifp; 1117 m->m_pkthdr.len = m->m_len = len; 1118 1119 #if NBPFILTER > 0 1120 /* 1121 * Pass this up to any BPF listeners, but only 1122 * pass it up the stack if its for us. 1123 */ 1124 if (ifp->if_bpf) 1125 bpf_mtap(ifp->if_bpf, m); 1126 #endif /* NPBFILTER > 0 */ 1127 1128 /* 1129 * This test is outside the NBPFILTER block because 1130 * on the 21140 we have to use Hash-Only mode due to 1131 * a bug in the filter logic. 1132 */ 1133 if ((ifp->if_flags & IFF_PROMISC) != 0 || 1134 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 1135 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1136 ETHER_ADDR_LEN) != 0 && 1137 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) { 1138 m_freem(m); 1139 continue; 1140 } 1141 } 1142 1143 /* Pass it on. */ 1144 (*ifp->if_input)(ifp, m); 1145 } 1146 1147 /* Update the recieve pointer. */ 1148 sc->sc_rxptr = i; 1149 } 1150 1151 /* 1152 * tlp_txintr: 1153 * 1154 * Helper; handle transmit interrupts. 1155 */ 1156 void 1157 tlp_txintr(sc) 1158 struct tulip_softc *sc; 1159 { 1160 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1161 struct tulip_txsoft *txs; 1162 u_int32_t txstat; 1163 1164 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1165 sc->sc_dev.dv_xname, sc->sc_flags)); 1166 1167 ifp->if_flags &= ~IFF_OACTIVE; 1168 1169 /* 1170 * If we were doing a filter setup, check to see if it completed. 1171 */ 1172 if (sc->sc_flags & TULIPF_DOING_SETUP) { 1173 TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1174 if ((sc->sc_setup_desc.td_status & TDSTAT_OWN) == 0) 1175 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1176 } 1177 1178 /* 1179 * Go through our Tx list and free mbufs for those 1180 * frames that have been transmitted. 1181 */ 1182 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1183 TULIP_CDTXSYNC(sc, txs->txs_firstdesc, 1184 txs->txs_dmamap->dm_nsegs, 1185 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1186 1187 #ifdef TLP_DEBUG 1188 if (ifp->if_flags & IFF_DEBUG) { 1189 int i; 1190 printf(" txsoft %p trainsmit chain:\n", txs); 1191 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1192 printf(" descriptor %d:\n", i); 1193 printf(" td_status: 0x%08x\n", 1194 sc->sc_txdescs[i].td_status); 1195 printf(" td_ctl: 0x%08x\n", 1196 sc->sc_txdescs[i].td_ctl); 1197 printf(" td_bufaddr1: 0x%08x\n", 1198 sc->sc_txdescs[i].td_bufaddr1); 1199 printf(" td_bufaddr2: 0x%08x\n", 1200 sc->sc_txdescs[i].td_bufaddr2); 1201 if (i == txs->txs_lastdesc) 1202 break; 1203 } 1204 } 1205 #endif 1206 1207 txstat = sc->sc_txdescs[txs->txs_firstdesc].td_status; 1208 if (txstat & TDSTAT_OWN) 1209 break; 1210 1211 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1212 1213 sc->sc_txfree += txs->txs_dmamap->dm_nsegs; 1214 1215 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1216 0, txs->txs_dmamap->dm_mapsize, 1217 BUS_DMASYNC_POSTWRITE); 1218 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1219 m_freem(txs->txs_mbuf); 1220 txs->txs_mbuf = NULL; 1221 1222 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1223 1224 /* 1225 * Check for errors and collisions. 1226 */ 1227 if (txstat & 1228 (TDSTAT_Tx_UF|TDSTAT_Tx_NC|TDSTAT_Tx_LO|TDSTAT_Tx_TO)) { 1229 ifp->if_oerrors++; 1230 #if 0 1231 /* 1232 * XXX Can't check for late or excessive collisions; 1233 * XXX Some 21040s seem to register those even on 1234 * XXX successful transmissions! 1235 */ 1236 if (txstat & TDSTAT_Tx_EC) 1237 ifp->if_collisions += 16; 1238 if (txstat & TDSTAT_Tx_LC) 1239 ifp->if_collisions++; 1240 #endif 1241 } else { 1242 /* Packet was transmitted successfully. */ 1243 ifp->if_opackets++; 1244 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1245 } 1246 } 1247 1248 /* 1249 * If there are no more pending transmissions, cancel the watchdog 1250 * timer. 1251 */ 1252 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1253 ifp->if_timer = 0; 1254 1255 /* 1256 * If we have a receive filter setup pending, do it now. 1257 */ 1258 if (sc->sc_flags & TULIPF_WANT_SETUP) 1259 (*sc->sc_filter_setup)(sc); 1260 } 1261 1262 /* 1263 * tlp_reset: 1264 * 1265 * Perform a soft reset on the Tulip. 1266 */ 1267 void 1268 tlp_reset(sc) 1269 struct tulip_softc *sc; 1270 { 1271 int i; 1272 1273 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1274 1275 for (i = 0; i < 1000; i++) { 1276 /* 1277 * Wait at least 50 PCI cycles for the reset to 1278 * complete before peeking at the Tulip again. 1279 * 10 uSec is a bit longer than 50 PCI cycles 1280 * (at 33MHz), but it doesn't hurt have the extra 1281 * wait. 1282 */ 1283 delay(10); 1284 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1285 break; 1286 } 1287 1288 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1289 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1290 1291 delay(1000); 1292 } 1293 1294 /* 1295 * tlp_init: 1296 * 1297 * Initialize the interface. Must be called at splnet(). 1298 */ 1299 int 1300 tlp_init(sc) 1301 struct tulip_softc *sc; 1302 { 1303 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1304 struct tulip_txsoft *txs; 1305 struct tulip_rxsoft *rxs; 1306 int i, error = 0; 1307 1308 /* 1309 * Cancel any pending I/O. 1310 */ 1311 tlp_stop(sc, 0); 1312 1313 /* 1314 * Initialize `opmode' to 0, and call the pre-init routine, if 1315 * any. This is required because the 2114x and some of the 1316 * clones require that the media-related bits in `opmode' be 1317 * set before performing a soft-reset in order to get internal 1318 * chip pathways are correct. Yay! 1319 */ 1320 sc->sc_opmode = 0; 1321 if (sc->sc_preinit != NULL) 1322 (*sc->sc_preinit)(sc); 1323 1324 /* 1325 * Reset the Tulip to a known state. 1326 */ 1327 tlp_reset(sc); 1328 1329 /* 1330 * Initialize the BUSMODE register. 1331 * 1332 * XXX What about read-multiple/read-line/write-line on 1333 * XXX the 21140 and up? 1334 */ 1335 sc->sc_busmode = BUSMODE_BAR; 1336 switch (sc->sc_cacheline) { 1337 default: 1338 /* 1339 * Note: We must *always* set these bits; a cache 1340 * alignment of 0 is RESERVED. 1341 */ 1342 case 8: 1343 sc->sc_busmode |= BUSMODE_CAL_8LW; 1344 break; 1345 case 16: 1346 sc->sc_busmode |= BUSMODE_CAL_16LW; 1347 break; 1348 case 32: 1349 sc->sc_busmode |= BUSMODE_CAL_32LW; 1350 break; 1351 } 1352 switch (sc->sc_chip) { 1353 case TULIP_CHIP_82C168: 1354 case TULIP_CHIP_82C169: 1355 sc->sc_busmode |= BUSMODE_PBL_16LW | BUSMODE_PNIC_MBO; 1356 break; 1357 default: 1358 sc->sc_busmode |= BUSMODE_PBL_DEFAULT; 1359 break; 1360 } 1361 #if BYTE_ORDER == BIG_ENDIAN 1362 /* 1363 * XXX There are reports that this doesn't work properly 1364 * in the old Tulip driver, but BUSMODE_DBO does. However, 1365 * BUSMODE_DBO is not available on the 21040, and requires 1366 * us to byte-swap the setup packet. What to do? 1367 */ 1368 sc->sc_busmode |= BUSMODE_BLE; 1369 #endif 1370 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1371 1372 /* 1373 * Initialize the OPMODE register. We don't write it until 1374 * we're ready to begin the transmit and receive processes. 1375 * 1376 * Media-related OPMODE bits are set in the media callbacks 1377 * for each specific chip/board. 1378 */ 1379 sc->sc_opmode |= OPMODE_SR | OPMODE_ST | 1380 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1381 1382 /* 1383 * Magical mystery initialization on the Macronix chips. 1384 * The MX98713 uses its own magic value, the rest share 1385 * a common one. 1386 */ 1387 switch (sc->sc_chip) { 1388 case TULIP_CHIP_MX98713: 1389 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1390 break; 1391 1392 case TULIP_CHIP_MX98713A: 1393 case TULIP_CHIP_MX98715: 1394 case TULIP_CHIP_MX98725: 1395 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1396 break; 1397 1398 default: 1399 /* Nothing. */ 1400 } 1401 1402 /* 1403 * Initialize the transmit descriptor ring. 1404 */ 1405 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1406 for (i = 0; i < TULIP_NTXDESC; i++) { 1407 sc->sc_txdescs[i].td_ctl = TDCTL_CH; 1408 sc->sc_txdescs[i].td_bufaddr2 = 1409 TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)); 1410 } 1411 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1412 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1413 sc->sc_txfree = TULIP_NTXDESC; 1414 sc->sc_txnext = 0; 1415 1416 /* 1417 * Initialize the transmit job descriptors. 1418 */ 1419 SIMPLEQ_INIT(&sc->sc_txfreeq); 1420 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1421 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1422 txs = &sc->sc_txsoft[i]; 1423 txs->txs_mbuf = NULL; 1424 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1425 } 1426 1427 /* 1428 * Initialize the receive descriptor and receive job 1429 * descriptor rings. 1430 */ 1431 for (i = 0; i < TULIP_NRXDESC; i++) { 1432 rxs = &sc->sc_rxsoft[i]; 1433 if (rxs->rxs_mbuf == NULL) { 1434 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1435 printf("%s: unable to allocate or map rx " 1436 "buffer %d, error = %d\n", 1437 sc->sc_dev.dv_xname, i, error); 1438 /* 1439 * XXX Should attempt to run with fewer receive 1440 * XXX buffers instead of just failing. 1441 */ 1442 tlp_rxdrain(sc); 1443 goto out; 1444 } 1445 } 1446 } 1447 sc->sc_rxptr = 0; 1448 1449 /* 1450 * Initialize the interrupt mask and enable interrupts. 1451 */ 1452 /* normal interrupts */ 1453 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1454 1455 /* abnormal interrupts */ 1456 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1457 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1458 1459 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1460 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1461 1462 switch (sc->sc_chip) { 1463 case TULIP_CHIP_WB89C840F: 1464 /* 1465 * Clear bits that we don't want that happen to 1466 * overlap or don't exist. 1467 */ 1468 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1469 break; 1470 1471 default: 1472 /* Nothing. */ 1473 } 1474 1475 sc->sc_rxint_mask &= sc->sc_inten; 1476 sc->sc_txint_mask &= sc->sc_inten; 1477 1478 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1479 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1480 1481 /* 1482 * Give the transmit and receive rings to the Tulip. 1483 */ 1484 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1485 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1486 1487 /* 1488 * On chips that do this differently, set the station address. 1489 */ 1490 switch (sc->sc_chip) { 1491 case TULIP_CHIP_WB89C840F: 1492 { 1493 /* XXX Do this with stream writes? */ 1494 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1495 1496 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1497 bus_space_write_1(sc->sc_st, sc->sc_sh, 1498 cpa + i, LLADDR(ifp->if_sadl)[i]); 1499 } 1500 break; 1501 } 1502 1503 default: 1504 /* Nothing. */ 1505 } 1506 1507 /* 1508 * Set the receive filter. This will start the transmit and 1509 * receive processes. 1510 */ 1511 (*sc->sc_filter_setup)(sc); 1512 1513 /* 1514 * Set the current media. 1515 */ 1516 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1517 1518 /* 1519 * Start the receive process. 1520 */ 1521 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1522 1523 if (sc->sc_tick != NULL) { 1524 /* Start the one second clock. */ 1525 timeout(sc->sc_tick, sc, hz); 1526 } 1527 1528 /* 1529 * Note that the interface is now running. 1530 */ 1531 ifp->if_flags |= IFF_RUNNING; 1532 ifp->if_flags &= ~IFF_OACTIVE; 1533 1534 out: 1535 if (error) 1536 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1537 return (error); 1538 } 1539 1540 /* 1541 * tlp_rxdrain: 1542 * 1543 * Drain the receive queue. 1544 */ 1545 void 1546 tlp_rxdrain(sc) 1547 struct tulip_softc *sc; 1548 { 1549 struct tulip_rxsoft *rxs; 1550 int i; 1551 1552 for (i = 0; i < TULIP_NRXDESC; i++) { 1553 rxs = &sc->sc_rxsoft[i]; 1554 if (rxs->rxs_mbuf != NULL) { 1555 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1556 m_freem(rxs->rxs_mbuf); 1557 rxs->rxs_mbuf = NULL; 1558 } 1559 } 1560 } 1561 1562 /* 1563 * tlp_stop: 1564 * 1565 * Stop transmission on the interface. 1566 */ 1567 void 1568 tlp_stop(sc, drain) 1569 struct tulip_softc *sc; 1570 int drain; 1571 { 1572 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1573 struct tulip_txsoft *txs; 1574 1575 if (sc->sc_tick != NULL) { 1576 /* Stop the one second clock. */ 1577 untimeout(sc->sc_tick, sc); 1578 } 1579 1580 /* Disable interrupts. */ 1581 TULIP_WRITE(sc, CSR_INTEN, 0); 1582 1583 /* Stop the transmit and receive processes. */ 1584 TULIP_WRITE(sc, CSR_OPMODE, 0); 1585 TULIP_WRITE(sc, CSR_RXLIST, 0); 1586 TULIP_WRITE(sc, CSR_TXLIST, 0); 1587 1588 /* 1589 * Release any queued transmit buffers. 1590 */ 1591 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1592 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1593 if (txs->txs_mbuf != NULL) { 1594 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1595 m_freem(txs->txs_mbuf); 1596 txs->txs_mbuf = NULL; 1597 } 1598 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1599 } 1600 1601 if (drain) { 1602 /* 1603 * Release the receive buffers. 1604 */ 1605 tlp_rxdrain(sc); 1606 } 1607 1608 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 1609 1610 /* 1611 * Mark the interface down and cancel the watchdog timer. 1612 */ 1613 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1614 ifp->if_timer = 0; 1615 } 1616 1617 #define SROM_EMIT(sc, x) \ 1618 do { \ 1619 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 1620 delay(1); \ 1621 } while (0) 1622 1623 /* 1624 * tlp_srom_idle: 1625 * 1626 * Put the SROM in idle state. 1627 */ 1628 void 1629 tlp_srom_idle(sc) 1630 struct tulip_softc *sc; 1631 { 1632 u_int32_t miirom; 1633 int i; 1634 1635 miirom = MIIROM_SR; 1636 SROM_EMIT(sc, miirom); 1637 1638 miirom |= MIIROM_RD; 1639 SROM_EMIT(sc, miirom); 1640 1641 miirom |= MIIROM_SROMCS; 1642 SROM_EMIT(sc, miirom); 1643 1644 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1645 1646 /* Strobe the clock 25 times. */ 1647 for (i = 0; i < 25; i++) { 1648 SROM_EMIT(sc, miirom); 1649 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1650 } 1651 1652 SROM_EMIT(sc, miirom); 1653 1654 miirom &= ~MIIROM_SROMCS; 1655 SROM_EMIT(sc, miirom); 1656 1657 SROM_EMIT(sc, 0); 1658 } 1659 1660 /* 1661 * tlp_read_srom: 1662 * 1663 * Read the Tulip SROM. 1664 */ 1665 void 1666 tlp_read_srom(sc, word, wordcnt, data) 1667 struct tulip_softc *sc; 1668 int word, wordcnt; 1669 u_int16_t *data; 1670 { 1671 u_int32_t miirom; 1672 int i, x; 1673 1674 tlp_srom_idle(sc); 1675 1676 /* Select the SROM. */ 1677 miirom = MIIROM_SR; 1678 SROM_EMIT(sc, miirom); 1679 1680 miirom |= MIIROM_RD; 1681 SROM_EMIT(sc, miirom); 1682 1683 for (i = 0; i < wordcnt; i++) { 1684 /* Send CHIP SELECT for one clock tick. */ 1685 miirom |= MIIROM_SROMCS; 1686 SROM_EMIT(sc, miirom); 1687 1688 /* Shift in the READ opcode. */ 1689 for (x = 3; x > 0; x--) { 1690 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 1691 miirom |= MIIROM_SROMDI; 1692 else 1693 miirom &= ~MIIROM_SROMDI; 1694 SROM_EMIT(sc, miirom); 1695 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1696 SROM_EMIT(sc, miirom); 1697 } 1698 1699 /* Shift in address. */ 1700 for (x = 6; x > 0; x--) { 1701 if ((word + i) & (1 << (x - 1))) 1702 miirom |= MIIROM_SROMDI; 1703 else 1704 miirom &= ~MIIROM_SROMDI; 1705 SROM_EMIT(sc, miirom); 1706 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1707 SROM_EMIT(sc, miirom); 1708 } 1709 1710 /* Shift out data. */ 1711 miirom &= ~MIIROM_SROMDI; 1712 data[i] = 0; 1713 for (x = 16; x > 0; x--) { 1714 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1715 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 1716 data[i] |= (1 << (x - 1)); 1717 SROM_EMIT(sc, miirom); 1718 } 1719 1720 /* Clear CHIP SELECT. */ 1721 miirom &= ~MIIROM_SROMCS; 1722 SROM_EMIT(sc, miirom); 1723 } 1724 1725 /* Deselect the SROM. */ 1726 SROM_EMIT(sc, 0); 1727 1728 /* ...and idle it. */ 1729 tlp_srom_idle(sc); 1730 } 1731 1732 #undef SROM_EMIT 1733 1734 /* 1735 * tlp_add_rxbuf: 1736 * 1737 * Add a receive buffer to the indicated descriptor. 1738 */ 1739 int 1740 tlp_add_rxbuf(sc, idx) 1741 struct tulip_softc *sc; 1742 int idx; 1743 { 1744 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 1745 struct mbuf *m; 1746 int error; 1747 1748 MGETHDR(m, M_DONTWAIT, MT_DATA); 1749 if (m == NULL) 1750 return (ENOBUFS); 1751 1752 MCLGET(m, M_DONTWAIT); 1753 if ((m->m_flags & M_EXT) == 0) { 1754 m_freem(m); 1755 return (ENOBUFS); 1756 } 1757 1758 if (rxs->rxs_mbuf != NULL) 1759 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1760 1761 rxs->rxs_mbuf = m; 1762 1763 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 1764 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 1765 if (error) { 1766 printf("%s: can't load rx DMA map %d, error = %d\n", 1767 sc->sc_dev.dv_xname, idx, error); 1768 panic("tlp_add_rxbuf"); /* XXX */ 1769 } 1770 1771 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1772 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1773 1774 TULIP_INIT_RXDESC(sc, idx); 1775 1776 return (0); 1777 } 1778 1779 /* 1780 * tlp_crc32: 1781 * 1782 * Compute the 32-bit CRC of the provided buffer. 1783 */ 1784 u_int32_t 1785 tlp_crc32(buf, len) 1786 const u_int8_t *buf; 1787 size_t len; 1788 { 1789 static const u_int32_t crctab[] = { 1790 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 1791 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, 1792 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 1793 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c 1794 }; 1795 u_int32_t crc; 1796 int i; 1797 1798 crc = 0xffffffff; 1799 for (i = 0; i < len; i++) { 1800 crc ^= buf[i]; 1801 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1802 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1803 } 1804 return (crc); 1805 } 1806 1807 /* 1808 * tlp_srom_crcok: 1809 * 1810 * Check the CRC of the Tulip SROM. 1811 */ 1812 int 1813 tlp_srom_crcok(romdata) 1814 const u_int8_t *romdata; 1815 { 1816 u_int32_t crc; 1817 1818 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM); 1819 crc = (crc & 0xffff) ^ 0xffff; 1820 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 1821 return (1); 1822 return (0); 1823 } 1824 1825 /* 1826 * tlp_isv_srom: 1827 * 1828 * Check to see if the SROM is in the new standardized format. 1829 */ 1830 int 1831 tlp_isv_srom(romdata) 1832 const u_int8_t *romdata; 1833 { 1834 int i; 1835 u_int16_t cksum; 1836 1837 if (tlp_srom_crcok(romdata)) { 1838 /* 1839 * SROM CRC checks out; must be in the new format. 1840 */ 1841 return (1); 1842 } 1843 1844 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); 1845 if (cksum == 0xffff || cksum == 0) { 1846 /* 1847 * No checksum present. Check the SROM ID; 18 bytes of 0 1848 * followed by 1 (version) followed by the number of 1849 * adapters which use this SROM (should be non-zero). 1850 */ 1851 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { 1852 if (romdata[i] != 0) 1853 return (0); 1854 } 1855 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) 1856 return (0); 1857 if (romdata[TULIP_ROM_CHIP_COUNT] == 0) 1858 return (0); 1859 return (1); 1860 } 1861 1862 return (0); 1863 } 1864 1865 /* 1866 * tlp_isv_srom_enaddr: 1867 * 1868 * Get the Ethernet address from an ISV SROM. 1869 */ 1870 int 1871 tlp_isv_srom_enaddr(sc, enaddr) 1872 struct tulip_softc *sc; 1873 u_int8_t *enaddr; 1874 { 1875 int i, devcnt; 1876 1877 if (tlp_isv_srom(sc->sc_srom) == 0) 1878 return (0); 1879 1880 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 1881 for (i = 0; i < devcnt; i++) { 1882 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 1883 break; 1884 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 1885 sc->sc_devno) 1886 break; 1887 } 1888 1889 if (i == devcnt) 1890 return (0); 1891 1892 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], 1893 ETHER_ADDR_LEN); 1894 enaddr[5] += i; 1895 1896 return (1); 1897 } 1898 1899 /* 1900 * tlp_parse_old_srom: 1901 * 1902 * Parse old-format SROMs. 1903 * 1904 * This routine is largely lifted from Matt Thomas's `de' driver. 1905 */ 1906 int 1907 tlp_parse_old_srom(sc, enaddr) 1908 struct tulip_softc *sc; 1909 u_int8_t *enaddr; 1910 { 1911 static const u_int8_t testpat[] = 1912 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 1913 int i; 1914 u_int32_t cksum; 1915 1916 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 1917 /* 1918 * Some vendors (e.g. ZNYX) don't use the standard 1919 * DEC Address ROM format, but rather just have an 1920 * Ethernet address in the first 6 bytes, maybe a 1921 * 2 byte checksum, and then all 0xff's. 1922 */ 1923 for (i = 8; i < 32; i++) { 1924 if (sc->sc_srom[i] != 0xff) 1925 return (0); 1926 } 1927 1928 /* 1929 * Sanity check the Ethernet address: 1930 * 1931 * - Make sure it's not multicast or locally 1932 * assigned 1933 * - Make sure it has a non-0 OUI 1934 */ 1935 if (sc->sc_srom[0] & 3) 1936 return (0); 1937 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 1938 sc->sc_srom[2] == 0) 1939 return (0); 1940 1941 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1942 return (1); 1943 } 1944 1945 /* 1946 * Standard DEC Address ROM test. 1947 */ 1948 1949 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 1950 return (0); 1951 1952 for (i = 0; i < 8; i++) { 1953 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 1954 return (0); 1955 } 1956 1957 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1958 1959 cksum = *(u_int16_t *) &enaddr[0]; 1960 1961 cksum <<= 1; 1962 if (cksum > 0xffff) 1963 cksum -= 0xffff; 1964 1965 cksum += *(u_int16_t *) &enaddr[2]; 1966 if (cksum > 0xffff) 1967 cksum -= 0xffff; 1968 1969 cksum <<= 1; 1970 if (cksum > 0xffff) 1971 cksum -= 0xffff; 1972 1973 cksum += *(u_int16_t *) &enaddr[4]; 1974 if (cksum >= 0xffff) 1975 cksum -= 0xffff; 1976 1977 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 1978 return (0); 1979 1980 return (1); 1981 } 1982 1983 /* 1984 * tlp_filter_setup: 1985 * 1986 * Set the Tulip's receive filter. 1987 */ 1988 void 1989 tlp_filter_setup(sc) 1990 struct tulip_softc *sc; 1991 { 1992 struct ethercom *ec = &sc->sc_ethercom; 1993 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1994 struct ether_multi *enm; 1995 struct ether_multistep step; 1996 __volatile u_int32_t *sp; 1997 u_int8_t enaddr[ETHER_ADDR_LEN]; 1998 u_int32_t hash; 1999 int cnt; 2000 2001 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 2002 sc->sc_dev.dv_xname, sc->sc_flags)); 2003 2004 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 2005 2006 /* 2007 * If there are transmissions pending, wait until they have 2008 * completed. 2009 */ 2010 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 2011 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 2012 sc->sc_flags |= TULIPF_WANT_SETUP; 2013 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 2014 sc->sc_dev.dv_xname)); 2015 return; 2016 } 2017 sc->sc_flags &= ~TULIPF_WANT_SETUP; 2018 2019 /* 2020 * If we're running, idle the transmit and receive engines. If 2021 * we're NOT running, we're being called from tlp_init(), and our 2022 * writing OPMODE will start the transmit and receive processes 2023 * in motion. 2024 */ 2025 if (ifp->if_flags & IFF_RUNNING) { 2026 /* 2027 * Actually, some chips seem to need a really hard 2028 * kick in the head for this to work. The genuine 2029 * DEC chips can just be idled, but some of the 2030 * clones seem to REALLY want a reset here. Doing 2031 * the reset will end up here again, but with 2032 * IFF_RUNNING cleared. 2033 */ 2034 switch (sc->sc_chip) { 2035 case TULIP_CHIP_82C168: 2036 case TULIP_CHIP_82C169: 2037 tlp_init(sc); 2038 return; 2039 2040 default: 2041 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2042 } 2043 } 2044 2045 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2046 2047 if (ifp->if_flags & IFF_PROMISC) { 2048 sc->sc_opmode |= OPMODE_PR; 2049 goto allmulti; 2050 } 2051 2052 /* 2053 * Try Perfect filtering first. 2054 */ 2055 2056 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2057 sp = TULIP_CDSP(sc); 2058 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2059 cnt = 0; 2060 ETHER_FIRST_MULTI(step, ec, enm); 2061 while (enm != NULL) { 2062 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2063 /* 2064 * We must listen to a range of multicast addresses. 2065 * For now, just accept all multicasts, rather than 2066 * trying to set only those filter bits needed to match 2067 * the range. (At this time, the only use of address 2068 * ranges is for IP multicast routing, for which the 2069 * range is big enough to require all bits set.) 2070 */ 2071 goto allmulti; 2072 } 2073 if (cnt == (TULIP_MAXADDRS - 2)) { 2074 /* 2075 * We already have our multicast limit (still need 2076 * our station address and broadcast). Go to 2077 * Hash-Perfect mode. 2078 */ 2079 goto hashperfect; 2080 } 2081 *sp++ = ((u_int16_t *) enm->enm_addrlo)[0]; 2082 *sp++ = ((u_int16_t *) enm->enm_addrlo)[1]; 2083 *sp++ = ((u_int16_t *) enm->enm_addrlo)[2]; 2084 ETHER_NEXT_MULTI(step, enm); 2085 } 2086 2087 if (ifp->if_flags & IFF_BROADCAST) { 2088 /* ...and the broadcast address. */ 2089 cnt++; 2090 *sp++ = 0xffff; 2091 *sp++ = 0xffff; 2092 *sp++ = 0xffff; 2093 } 2094 2095 /* Pad the rest with our station address. */ 2096 for (; cnt < TULIP_MAXADDRS; cnt++) { 2097 *sp++ = ((u_int16_t *) enaddr)[0]; 2098 *sp++ = ((u_int16_t *) enaddr)[1]; 2099 *sp++ = ((u_int16_t *) enaddr)[2]; 2100 } 2101 ifp->if_flags &= ~IFF_ALLMULTI; 2102 goto setit; 2103 2104 hashperfect: 2105 /* 2106 * Try Hash-Perfect mode. 2107 */ 2108 2109 /* 2110 * Some 21140 chips have broken Hash-Perfect modes. On these 2111 * chips, we simply use Hash-Only mode, and put our station 2112 * address into the filter. 2113 */ 2114 if (sc->sc_chip == TULIP_CHIP_21140) 2115 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2116 else 2117 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2118 sp = TULIP_CDSP(sc); 2119 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2120 ETHER_FIRST_MULTI(step, ec, enm); 2121 while (enm != NULL) { 2122 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2123 /* 2124 * We must listen to a range of multicast addresses. 2125 * For now, just accept all multicasts, rather than 2126 * trying to set only those filter bits needed to match 2127 * the range. (At this time, the only use of address 2128 * ranges is for IP multicast routing, for which the 2129 * range is big enough to require all bits set.) 2130 */ 2131 goto allmulti; 2132 } 2133 hash = tlp_mchash(enm->enm_addrlo); 2134 sp[hash >> 4] |= 1 << (hash & 0xf); 2135 ETHER_NEXT_MULTI(step, enm); 2136 } 2137 2138 if (ifp->if_flags & IFF_BROADCAST) { 2139 /* ...and the broadcast address. */ 2140 hash = tlp_mchash(etherbroadcastaddr); 2141 sp[hash >> 4] |= 1 << (hash & 0xf); 2142 } 2143 2144 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2145 /* ...and our station address. */ 2146 hash = tlp_mchash(enaddr); 2147 sp[hash >> 4] |= 1 << (hash & 0xf); 2148 } else { 2149 /* 2150 * Hash-Perfect mode; put our station address after 2151 * the hash table. 2152 */ 2153 sp[39] = ((u_int16_t *) enaddr)[0]; 2154 sp[40] = ((u_int16_t *) enaddr)[1]; 2155 sp[41] = ((u_int16_t *) enaddr)[2]; 2156 } 2157 ifp->if_flags &= ~IFF_ALLMULTI; 2158 goto setit; 2159 2160 allmulti: 2161 /* 2162 * Use Perfect filter mode. First address is the broadcast address, 2163 * and pad the rest with our station address. We'll set Pass-all- 2164 * multicast in OPMODE below. 2165 */ 2166 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2167 sp = TULIP_CDSP(sc); 2168 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2169 cnt = 0; 2170 if (ifp->if_flags & IFF_BROADCAST) { 2171 cnt++; 2172 *sp++ = 0xffff; 2173 *sp++ = 0xffff; 2174 *sp++ = 0xffff; 2175 } 2176 for (; cnt < TULIP_MAXADDRS; cnt++) { 2177 *sp++ = ((u_int16_t *) enaddr)[0]; 2178 *sp++ = ((u_int16_t *) enaddr)[1]; 2179 *sp++ = ((u_int16_t *) enaddr)[2]; 2180 } 2181 ifp->if_flags |= IFF_ALLMULTI; 2182 2183 setit: 2184 if (ifp->if_flags & IFF_ALLMULTI) 2185 sc->sc_opmode |= OPMODE_PM; 2186 2187 /* Sync the setup packet buffer. */ 2188 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2189 2190 /* 2191 * Fill in the setup packet descriptor. 2192 */ 2193 sc->sc_setup_desc.td_bufaddr1 = TULIP_CDSPADDR(sc); 2194 sc->sc_setup_desc.td_bufaddr2 = TULIP_CDTXADDR(sc, sc->sc_txnext); 2195 sc->sc_setup_desc.td_ctl = 2196 (TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2197 sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS | 2198 TDCTL_Tx_IC | TDCTL_CH; 2199 sc->sc_setup_desc.td_status = TDSTAT_OWN; 2200 TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2201 2202 /* 2203 * Write the address of the setup descriptor. This also has 2204 * the side effect of giving the transmit ring to the chip, 2205 * since the setup descriptor points to the next available 2206 * descriptor in the ring. 2207 */ 2208 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc)); 2209 2210 /* 2211 * Set the OPMODE register. This will also resume the 2212 * transmit transmit process we idled above. 2213 */ 2214 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2215 2216 sc->sc_flags |= TULIPF_DOING_SETUP; 2217 2218 /* 2219 * Kick the transmitter; this will cause the Tulip to 2220 * read the setup descriptor. 2221 */ 2222 /* XXX USE AUTOPOLLING? */ 2223 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2224 2225 /* Set up a watchdog timer in case the chip flakes out. */ 2226 ifp->if_timer = 5; 2227 2228 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2229 } 2230 2231 /* 2232 * tlp_winb_filter_setup: 2233 * 2234 * Set the Winbond 89C840F's receive filter. 2235 */ 2236 void 2237 tlp_winb_filter_setup(sc) 2238 struct tulip_softc *sc; 2239 { 2240 struct ethercom *ec = &sc->sc_ethercom; 2241 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2242 struct ether_multi *enm; 2243 struct ether_multistep step; 2244 u_int32_t hash, mchash[2]; 2245 2246 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2247 sc->sc_dev.dv_xname, sc->sc_flags)); 2248 2249 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2250 2251 if (ifp->if_flags & IFF_MULTICAST) 2252 sc->sc_opmode |= OPMODE_WINB_AMP; 2253 2254 if (ifp->if_flags & IFF_BROADCAST) 2255 sc->sc_opmode |= OPMODE_WINB_ABP; 2256 2257 if (ifp->if_flags & IFF_PROMISC) { 2258 sc->sc_opmode |= OPMODE_WINB_APP; 2259 goto allmulti; 2260 } 2261 2262 mchash[0] = mchash[1] = 0; 2263 2264 ETHER_FIRST_MULTI(step, ec, enm); 2265 while (enm != NULL) { 2266 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2267 /* 2268 * We must listen to a range of multicast addresses. 2269 * For now, just accept all multicasts, rather than 2270 * trying to set only those filter bits needed to match 2271 * the range. (At this time, the only use of address 2272 * ranges is for IP multicast routing, for which the 2273 * range is big enough to require all bits set.) 2274 */ 2275 goto allmulti; 2276 } 2277 2278 /* 2279 * According to the FreeBSD `wb' driver, yes, you 2280 * really do invert the hash. 2281 */ 2282 hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2283 & 0x3f; 2284 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2285 ETHER_NEXT_MULTI(step, enm); 2286 } 2287 ifp->if_flags &= ~IFF_ALLMULTI; 2288 goto setit; 2289 2290 allmulti: 2291 ifp->if_flags |= IFF_ALLMULTI; 2292 mchash[0] = mchash[1] = 0xffffffff; 2293 2294 setit: 2295 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2296 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2297 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2298 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2299 sc->sc_dev.dv_xname)); 2300 } 2301 2302 /* 2303 * tlp_idle: 2304 * 2305 * Cause the transmit and/or receive processes to go idle. 2306 */ 2307 void 2308 tlp_idle(sc, bits) 2309 struct tulip_softc *sc; 2310 u_int32_t bits; 2311 { 2312 static const char *tx_state_names[] = { 2313 "STOPPED", 2314 "RUNNING - FETCH", 2315 "RUNNING - WAIT", 2316 "RUNNING - READING", 2317 "-- RESERVED --", 2318 "RUNNING - SETUP", 2319 "SUSPENDED", 2320 "RUNNING - CLOSE", 2321 }; 2322 static const char *rx_state_names[] = { 2323 "STOPPED", 2324 "RUNNING - FETCH", 2325 "RUNNING - CHECK", 2326 "RUNNING - WAIT", 2327 "SUSPENDED", 2328 "RUNNING - CLOSE", 2329 "RUNNING - FLUSH", 2330 "RUNNING - QUEUE", 2331 }; 2332 u_int32_t csr, ackmask = 0; 2333 int i; 2334 2335 if (bits & OPMODE_ST) 2336 ackmask |= STATUS_TPS; 2337 2338 if (bits & OPMODE_SR) 2339 ackmask |= STATUS_RPS; 2340 2341 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2342 2343 for (i = 0; i < 1000; i++) { 2344 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2345 break; 2346 delay(10); 2347 } 2348 2349 csr = TULIP_READ(sc, CSR_STATUS); 2350 if ((csr & ackmask) != ackmask) { 2351 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2352 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2353 printf("%s: transmit process failed to idle: " 2354 "state %s\n", sc->sc_dev.dv_xname, 2355 tx_state_names[(csr & STATUS_TS) >> 20]); 2356 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2357 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2358 printf("%s: receive process failed to idle: " 2359 "state %s\n", sc->sc_dev.dv_xname, 2360 rx_state_names[(csr & STATUS_RS) >> 17]); 2361 } 2362 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2363 } 2364 2365 /***************************************************************************** 2366 * Generic media support functions. 2367 *****************************************************************************/ 2368 2369 /* 2370 * tlp_mediastatus: [ifmedia interface function] 2371 * 2372 * Query the current media. 2373 */ 2374 void 2375 tlp_mediastatus(ifp, ifmr) 2376 struct ifnet *ifp; 2377 struct ifmediareq *ifmr; 2378 { 2379 struct tulip_softc *sc = ifp->if_softc; 2380 2381 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2382 } 2383 2384 /* 2385 * tlp_mediachange: [ifmedia interface function] 2386 * 2387 * Update the current media. 2388 */ 2389 int 2390 tlp_mediachange(ifp) 2391 struct ifnet *ifp; 2392 { 2393 struct tulip_softc *sc = ifp->if_softc; 2394 2395 return ((*sc->sc_mediasw->tmsw_set)(sc)); 2396 } 2397 2398 /***************************************************************************** 2399 * Support functions for MII-attached media. 2400 *****************************************************************************/ 2401 2402 /* 2403 * tlp_mii_tick: 2404 * 2405 * One second timer, used to tick the MII. 2406 */ 2407 void 2408 tlp_mii_tick(arg) 2409 void *arg; 2410 { 2411 struct tulip_softc *sc = arg; 2412 int s; 2413 2414 s = splnet(); 2415 mii_tick(&sc->sc_mii); 2416 splx(s); 2417 2418 timeout(sc->sc_tick, sc, hz); 2419 } 2420 2421 /* 2422 * tlp_mii_statchg: [mii interface function] 2423 * 2424 * Callback from PHY when media changes. 2425 */ 2426 void 2427 tlp_mii_statchg(self) 2428 struct device *self; 2429 { 2430 struct tulip_softc *sc = (struct tulip_softc *)self; 2431 2432 /* Idle the transmit and receive processes. */ 2433 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2434 2435 /* 2436 * XXX What about Heartbeat Disable? Is it magically frobbed 2437 * XXX by the PHY? I hope so... 2438 */ 2439 2440 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 2441 2442 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 2443 sc->sc_opmode |= OPMODE_TTM; 2444 2445 if (sc->sc_mii.mii_media_active & IFM_FDX) 2446 sc->sc_opmode |= OPMODE_FD; 2447 2448 /* 2449 * Write new OPMODE bits. This also restarts the transmit 2450 * and receive processes. 2451 */ 2452 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2453 2454 /* XXX Update ifp->if_baudrate */ 2455 } 2456 2457 /* 2458 * tlp_winb_mii_statchg: [mii interface function] 2459 * 2460 * Callback from PHY when media changes. This version is 2461 * for the Winbond 89C840F, which has different OPMODE bits. 2462 */ 2463 void 2464 tlp_winb_mii_statchg(self) 2465 struct device *self; 2466 { 2467 struct tulip_softc *sc = (struct tulip_softc *)self; 2468 2469 /* Idle the transmit and receive processes. */ 2470 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2471 2472 /* 2473 * XXX What about Heartbeat Disable? Is it magically frobbed 2474 * XXX by the PHY? I hope so... 2475 */ 2476 2477 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 2478 2479 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 2480 sc->sc_opmode |= OPMODE_WINB_FES; 2481 2482 if (sc->sc_mii.mii_media_active & IFM_FDX) 2483 sc->sc_opmode |= OPMODE_FD; 2484 2485 /* 2486 * Write new OPMODE bits. This also restarts the transmit 2487 * and receive processes. 2488 */ 2489 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2490 2491 /* XXX Update ifp->if_baudrate */ 2492 } 2493 2494 /* 2495 * tlp_mii_getmedia: 2496 * 2497 * Callback from ifmedia to request current media status. 2498 */ 2499 void 2500 tlp_mii_getmedia(sc, ifmr) 2501 struct tulip_softc *sc; 2502 struct ifmediareq *ifmr; 2503 { 2504 2505 mii_pollstat(&sc->sc_mii); 2506 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2507 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2508 } 2509 2510 /* 2511 * tlp_mii_setmedia: 2512 * 2513 * Callback from ifmedia to request new media setting. 2514 */ 2515 int 2516 tlp_mii_setmedia(sc) 2517 struct tulip_softc *sc; 2518 { 2519 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2520 2521 if (ifp->if_flags & IFF_UP) 2522 mii_mediachg(&sc->sc_mii); 2523 return (0); 2524 } 2525 2526 #define MII_EMIT(sc, x) \ 2527 do { \ 2528 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2529 delay(1); \ 2530 } while (0) 2531 2532 /* 2533 * tlp_sio_mii_sync: 2534 * 2535 * Synchronize the SIO-attached MII. 2536 */ 2537 void 2538 tlp_sio_mii_sync(sc) 2539 struct tulip_softc *sc; 2540 { 2541 u_int32_t miirom; 2542 int i; 2543 2544 miirom = MIIROM_MIIDIR|MIIROM_MDO; 2545 2546 MII_EMIT(sc, miirom); 2547 for (i = 0; i < 32; i++) { 2548 MII_EMIT(sc, miirom | MIIROM_MDC); 2549 MII_EMIT(sc, miirom); 2550 } 2551 } 2552 2553 /* 2554 * tlp_sio_mii_sendbits: 2555 * 2556 * Send a series of bits out the SIO to the MII. 2557 */ 2558 void 2559 tlp_sio_mii_sendbits(sc, data, nbits) 2560 struct tulip_softc *sc; 2561 u_int32_t data; 2562 int nbits; 2563 { 2564 u_int32_t miirom, i; 2565 2566 miirom = MIIROM_MIIDIR; 2567 MII_EMIT(sc, miirom); 2568 2569 for (i = 1 << (nbits - 1); i != 0; i >>= 1) { 2570 if (data & i) 2571 miirom |= MIIROM_MDO; 2572 else 2573 miirom &= ~MIIROM_MDO; 2574 MII_EMIT(sc, miirom); 2575 MII_EMIT(sc, miirom|MIIROM_MDC); 2576 MII_EMIT(sc, miirom); 2577 } 2578 } 2579 2580 /* 2581 * tlp_sio_mii_readreg: 2582 * 2583 * Read a PHY register via SIO-attached MII. 2584 */ 2585 int 2586 tlp_sio_mii_readreg(self, phy, reg) 2587 struct device *self; 2588 int phy, reg; 2589 { 2590 struct tulip_softc *sc = (void *) self; 2591 int val = 0, err = 0, i; 2592 2593 tlp_sio_mii_sync(sc); 2594 2595 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2596 tlp_sio_mii_sendbits(sc, MII_COMMAND_READ, 2); 2597 tlp_sio_mii_sendbits(sc, phy, 5); 2598 tlp_sio_mii_sendbits(sc, reg, 5); 2599 2600 MII_EMIT(sc, MIIROM_MIIDIR); 2601 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2602 2603 MII_EMIT(sc, 0); 2604 MII_EMIT(sc, MIIROM_MDC); 2605 2606 err = TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI); 2607 2608 MII_EMIT(sc, 0); 2609 MII_EMIT(sc, MIIROM_MDC); 2610 2611 for (i = 0; i < 16; i++) { 2612 val <<= 1; 2613 MII_EMIT(sc, 0); 2614 if (err == 0 && TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI)) 2615 val |= 1; 2616 MII_EMIT(sc, MIIROM_MDC); 2617 } 2618 2619 MII_EMIT(sc, 0); 2620 2621 return (err ? 0 : val); 2622 } 2623 2624 /* 2625 * tlp_sio_mii_writereg: 2626 * 2627 * Write a PHY register via SIO-attached MII. 2628 */ 2629 void 2630 tlp_sio_mii_writereg(self, phy, reg, val) 2631 struct device *self; 2632 int phy, reg, val; 2633 { 2634 struct tulip_softc *sc = (void *) self; 2635 2636 tlp_sio_mii_sync(sc); 2637 2638 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2639 tlp_sio_mii_sendbits(sc, MII_COMMAND_WRITE, 2); 2640 tlp_sio_mii_sendbits(sc, phy, 5); 2641 tlp_sio_mii_sendbits(sc, reg, 5); 2642 tlp_sio_mii_sendbits(sc, MII_COMMAND_ACK, 2); 2643 tlp_sio_mii_sendbits(sc, val, 16); 2644 2645 MII_EMIT(sc, 0); 2646 } 2647 2648 #undef MII_EMIT 2649 2650 /* 2651 * tlp_pnic_mii_readreg: 2652 * 2653 * Read a PHY register on the Lite-On PNIC. 2654 */ 2655 int 2656 tlp_pnic_mii_readreg(self, phy, reg) 2657 struct device *self; 2658 int phy, reg; 2659 { 2660 struct tulip_softc *sc = (void *) self; 2661 u_int32_t val; 2662 int i; 2663 2664 TULIP_WRITE(sc, CSR_PNIC_MII, 2665 PNIC_MII_MBO | PNIC_MII_RESERVED | 2666 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 2667 (reg << PNIC_MII_REGSHIFT)); 2668 2669 for (i = 0; i < 1000; i++) { 2670 delay(10); 2671 val = TULIP_READ(sc, CSR_PNIC_MII); 2672 if ((val & PNIC_MII_BUSY) == 0) { 2673 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 2674 return (0); 2675 else 2676 return (val & PNIC_MII_DATA); 2677 } 2678 } 2679 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 2680 return (0); 2681 } 2682 2683 /* 2684 * tlp_pnic_mii_writereg: 2685 * 2686 * Write a PHY register on the Lite-On PNIC. 2687 */ 2688 void 2689 tlp_pnic_mii_writereg(self, phy, reg, val) 2690 struct device *self; 2691 int phy, reg, val; 2692 { 2693 struct tulip_softc *sc = (void *) self; 2694 int i; 2695 2696 TULIP_WRITE(sc, CSR_PNIC_MII, 2697 PNIC_MII_MBO | PNIC_MII_RESERVED | 2698 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 2699 (reg << PNIC_MII_REGSHIFT) | val); 2700 2701 for (i = 0; i < 1000; i++) { 2702 delay(10); 2703 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 2704 return; 2705 } 2706 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 2707 } 2708 2709 /***************************************************************************** 2710 * Chip-specific pre-init and reset functions. 2711 *****************************************************************************/ 2712 2713 /* 2714 * tlp_2114x_preinit: 2715 * 2716 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 2717 */ 2718 void 2719 tlp_2114x_preinit(sc) 2720 struct tulip_softc *sc; 2721 { 2722 2723 /* 2724 * Always set the Must-Be-One bit. 2725 */ 2726 sc->sc_opmode |= OPMODE_MBO; 2727 2728 if (sc->sc_flags & TULIPF_HAS_MII) { 2729 /* 2730 * MII case: just set the port-select bit; we will never 2731 * be called during a media change. 2732 */ 2733 sc->sc_opmode |= OPMODE_PS; 2734 } else { 2735 /* 2736 * ENDEC/PCS mode; set according to selected media type. 2737 * XXX Auto-sense not supported yet. 2738 */ 2739 /* 2740 * XXX This sould come from the SROM. 2741 */ 2742 } 2743 2744 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2745 } 2746 2747 /* 2748 * tlp_pnic_preinit: 2749 * 2750 * Pre-init function for the Lite-On 82c168 and 82c169. 2751 */ 2752 void 2753 tlp_pnic_preinit(sc) 2754 struct tulip_softc *sc; 2755 { 2756 2757 if (sc->sc_flags & TULIPF_HAS_MII) { 2758 /* 2759 * MII case: just set the port-select bit; we will never 2760 * be called during a media change. 2761 */ 2762 sc->sc_opmode |= OPMODE_PS; 2763 } else { 2764 /* 2765 * ENDEC/PCS/Nway mode; enable the Tx backoff counter. 2766 */ 2767 sc->sc_opmode |= OPMODE_PNIC_TBEN; 2768 } 2769 } 2770 2771 /***************************************************************************** 2772 * Chip/board-specific media switches. The ones here are ones that 2773 * are potentially common to multiple front-ends. 2774 *****************************************************************************/ 2775 2776 /* 2777 * 21040 and 21041 media switches. 2778 */ 2779 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 2780 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 2781 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 2782 void tlp_21041_tmsw_init __P((struct tulip_softc *)); 2783 void tlp_21040_21041_tmsw_get __P((struct tulip_softc *, 2784 struct ifmediareq *)); 2785 int tlp_21040_21041_tmsw_set __P((struct tulip_softc *)); 2786 2787 const struct tulip_mediasw tlp_21040_mediasw = { 2788 tlp_21040_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2789 }; 2790 2791 const struct tulip_mediasw tlp_21040_tp_mediasw = { 2792 tlp_21040_tp_tmsw_init, tlp_21040_21041_tmsw_get, 2793 tlp_21040_21041_tmsw_set 2794 }; 2795 2796 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 2797 tlp_21040_auibnc_tmsw_init, tlp_21040_21041_tmsw_get, 2798 tlp_21040_21041_tmsw_set 2799 }; 2800 2801 const struct tulip_mediasw tlp_21041_mediasw = { 2802 tlp_21041_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2803 }; 2804 2805 #define ADD(m, t) ifmedia_add(&sc->sc_mii.mii_media, (m), 0, (t)) 2806 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 2807 2808 void 2809 tlp_21040_tmsw_init(sc) 2810 struct tulip_softc *sc; 2811 { 2812 struct tulip_21040_21041_sia_media *tsm; 2813 const char *sep = ""; 2814 2815 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2816 tlp_mediastatus); 2817 2818 printf("%s: ", sc->sc_dev.dv_xname); 2819 2820 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2821 M_WAITOK); 2822 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2823 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2824 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2825 ADD(IFM_ETHER|IFM_10_T, tsm); 2826 PRINT("10baseT"); 2827 2828 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2829 M_WAITOK); 2830 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2831 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2832 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2833 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2834 PRINT("10baseT-FDX"); 2835 2836 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2837 M_WAITOK); 2838 tsm->tsm_siaconn = SIACONN_21040_AUI; 2839 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2840 tsm->tsm_siagen = SIAGEN_21040_AUI; 2841 ADD(IFM_ETHER|IFM_10_5, tsm); 2842 PRINT("10base5"); 2843 2844 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2845 M_WAITOK); 2846 tsm->tsm_siaconn = SIACONN_21040_EXTSIA; 2847 tsm->tsm_siatxrx = SIATXRX_21040_EXTSIA; 2848 tsm->tsm_siagen = SIAGEN_21040_EXTSIA; 2849 ADD(IFM_ETHER|IFM_MANUAL, tsm); 2850 PRINT("manual"); 2851 2852 /* 2853 * XXX Autosense not yet supported. 2854 */ 2855 2856 /* XXX This should be auto-sense. */ 2857 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2858 printf(", default 10baseT"); 2859 2860 printf("\n"); 2861 } 2862 2863 void 2864 tlp_21040_tp_tmsw_init(sc) 2865 struct tulip_softc *sc; 2866 { 2867 struct tulip_21040_21041_sia_media *tsm; 2868 const char *sep = ""; 2869 2870 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2871 tlp_mediastatus); 2872 2873 printf("%s: ", sc->sc_dev.dv_xname); 2874 2875 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2876 M_WAITOK); 2877 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2878 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2879 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2880 ADD(IFM_ETHER|IFM_10_T, tsm); 2881 PRINT("10baseT"); 2882 2883 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2884 M_WAITOK); 2885 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2886 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2887 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2888 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2889 PRINT("10baseT-FDX"); 2890 2891 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2892 printf(", default 10baseT"); 2893 2894 printf("\n"); 2895 } 2896 2897 void 2898 tlp_21040_auibnc_tmsw_init(sc) 2899 struct tulip_softc *sc; 2900 { 2901 struct tulip_21040_21041_sia_media *tsm; 2902 const char *sep = ""; 2903 2904 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2905 tlp_mediastatus); 2906 2907 printf("%s: ", sc->sc_dev.dv_xname); 2908 2909 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2910 M_WAITOK); 2911 tsm->tsm_siaconn = SIACONN_21040_AUI; 2912 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2913 tsm->tsm_siagen = SIAGEN_21040_AUI; 2914 ADD(IFM_ETHER|IFM_10_5, tsm); 2915 PRINT("10base5"); 2916 2917 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 2918 2919 printf("\n"); 2920 } 2921 2922 void 2923 tlp_21041_tmsw_init(sc) 2924 struct tulip_softc *sc; 2925 { 2926 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt; 2927 struct tulip_21040_21041_sia_media *tsm; 2928 const char *sep = "", *defstr; 2929 u_int16_t romdef; 2930 u_int8_t mb; 2931 2932 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2933 tlp_mediastatus); 2934 2935 printf("%s: ", sc->sc_dev.dv_xname); 2936 2937 if (tlp_isv_srom(sc->sc_srom) == 0) 2938 goto not_isv_srom; 2939 2940 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 2941 for (i = 0; i < devcnt; i++) { 2942 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 2943 break; 2944 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 2945 sc->sc_devno) 2946 break; 2947 } 2948 2949 if (i == devcnt) 2950 goto not_isv_srom; 2951 2952 leaf_offset = sc->sc_srom[TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)]; 2953 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE; 2954 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 2955 2956 for (; m_cnt != 0; 2957 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) { 2958 mb = sc->sc_srom[mb_offset]; 2959 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), 2960 M_DEVBUF, M_WAITOK); 2961 switch (mb & TULIP_ROM_MB_MEDIA_CODE) { 2962 case TULIP_ROM_MB_MEDIA_TP: 2963 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 2964 TULIP_ROM_GETW(sc->sc_srom, 2965 mb_offset + TULIP_ROM_MB_CSR13) : 2966 SIACONN_21041_10BASET; 2967 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 2968 TULIP_ROM_GETW(sc->sc_srom, 2969 mb_offset + TULIP_ROM_MB_CSR14) : 2970 SIATXRX_21041_10BASET; 2971 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 2972 TULIP_ROM_GETW(sc->sc_srom, 2973 mb_offset + TULIP_ROM_MB_CSR15) : 2974 SIAGEN_21041_10BASET; 2975 ADD(IFM_ETHER|IFM_10_T, tsm); 2976 PRINT("10baseT"); 2977 break; 2978 2979 case TULIP_ROM_MB_MEDIA_BNC: 2980 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 2981 TULIP_ROM_GETW(sc->sc_srom, 2982 mb_offset + TULIP_ROM_MB_CSR13) : 2983 SIACONN_21041_BNC; 2984 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 2985 TULIP_ROM_GETW(sc->sc_srom, 2986 mb_offset + TULIP_ROM_MB_CSR14) : 2987 SIATXRX_21041_BNC; 2988 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 2989 TULIP_ROM_GETW(sc->sc_srom, 2990 mb_offset + TULIP_ROM_MB_CSR15) : 2991 SIAGEN_21041_BNC; 2992 ADD(IFM_ETHER|IFM_10_2, tsm); 2993 PRINT("10base2"); 2994 break; 2995 2996 case TULIP_ROM_MB_MEDIA_AUI: 2997 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 2998 TULIP_ROM_GETW(sc->sc_srom, 2999 mb_offset + TULIP_ROM_MB_CSR13) : 3000 SIACONN_21041_AUI; 3001 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 3002 TULIP_ROM_GETW(sc->sc_srom, 3003 mb_offset + TULIP_ROM_MB_CSR14) : 3004 SIATXRX_21041_AUI; 3005 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 3006 TULIP_ROM_GETW(sc->sc_srom, 3007 mb_offset + TULIP_ROM_MB_CSR15) : 3008 SIAGEN_21041_AUI; 3009 ADD(IFM_ETHER|IFM_10_5, tsm); 3010 PRINT("10base5"); 3011 break; 3012 3013 case TULIP_ROM_MB_MEDIA_TP_FDX: 3014 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 3015 TULIP_ROM_GETW(sc->sc_srom, 3016 mb_offset + TULIP_ROM_MB_CSR13) : 3017 SIACONN_21041_10BASET_FDX; 3018 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 3019 TULIP_ROM_GETW(sc->sc_srom, 3020 mb_offset + TULIP_ROM_MB_CSR14) : 3021 SIATXRX_21041_10BASET_FDX; 3022 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 3023 TULIP_ROM_GETW(sc->sc_srom, 3024 mb_offset + TULIP_ROM_MB_CSR15) : 3025 SIAGEN_21041_10BASET_FDX; 3026 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 3027 PRINT("10baseT-FDX"); 3028 break; 3029 3030 default: 3031 printf("%s<unknown 0x%02x>", sep, 3032 (mb & TULIP_ROM_MB_MEDIA_CODE)); 3033 sep = ", "; 3034 free(tsm, M_DEVBUF); 3035 } 3036 } 3037 3038 /* 3039 * XXX Autosense not yet supported. 3040 */ 3041 3042 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset + 3043 TULIP_ROM_IL_SELECT_CONN_TYPE); 3044 switch (romdef) { 3045 case SELECT_CONN_TYPE_TP: 3046 case SELECT_CONN_TYPE_TP_AUTONEG: 3047 case SELECT_CONN_TYPE_TP_NOLINKPASS: 3048 defmedia = IFM_ETHER|IFM_10_T; 3049 defstr = "10baseT"; 3050 break; 3051 3052 case SELECT_CONN_TYPE_TP_FDX: 3053 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX; 3054 defstr = "10baseT-FDX"; 3055 break; 3056 3057 case SELECT_CONN_TYPE_BNC: 3058 defmedia = IFM_ETHER|IFM_10_2; 3059 defstr = "10base2"; 3060 break; 3061 3062 case SELECT_CONN_TYPE_AUI: 3063 defmedia = IFM_ETHER|IFM_10_5; 3064 defstr = "10base5"; 3065 break; 3066 #if 0 /* XXX */ 3067 case SELECT_CONN_TYPE_ASENSE: 3068 case SELECT_CONN_TYPE_ASENSE_AUTONEG: 3069 defmedia = IFM_ETHER|IFM_AUTO; 3070 defstr = "auto"; 3071 break; 3072 #endif 3073 default: 3074 defmedia = 0; 3075 defstr = NULL; 3076 } 3077 3078 if (defmedia != 0) 3079 printf(", default %s\n", defstr); 3080 else { 3081 /* 3082 * XXX We should default to auto-sense. 3083 */ 3084 defmedia = IFM_ETHER|IFM_10_T; 3085 defstr = "10baseT"; 3086 3087 printf("\n%s: unknown default media in SROM (0x%04x), " 3088 "using %s\n", sc->sc_dev.dv_xname, romdef, defstr); 3089 } 3090 3091 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 3092 return; 3093 3094 not_isv_srom: 3095 /* 3096 * If we have a board without the standard 21041 SROM format, 3097 * we just assume all media are present and try and pick a 3098 * reasonable default. 3099 */ 3100 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3101 M_WAITOK); 3102 tsm->tsm_siaconn = SIACONN_21041_10BASET; 3103 tsm->tsm_siatxrx = SIATXRX_21041_10BASET; 3104 tsm->tsm_siagen = SIAGEN_21041_10BASET; 3105 ADD(IFM_ETHER|IFM_10_T, tsm); 3106 PRINT("10baseT"); 3107 3108 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3109 M_WAITOK); 3110 tsm->tsm_siaconn = SIACONN_21041_10BASET_FDX; 3111 tsm->tsm_siatxrx = SIATXRX_21041_10BASET_FDX; 3112 tsm->tsm_siagen = SIAGEN_21041_10BASET_FDX; 3113 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 3114 PRINT("10baseT-FDX"); 3115 3116 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3117 M_WAITOK); 3118 tsm->tsm_siaconn = SIACONN_21041_BNC; 3119 tsm->tsm_siatxrx = SIATXRX_21041_BNC; 3120 tsm->tsm_siagen = SIAGEN_21041_BNC; 3121 ADD(IFM_ETHER|IFM_10_2|IFM_FDX, tsm); 3122 PRINT("10base2"); 3123 3124 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3125 M_WAITOK); 3126 tsm->tsm_siaconn = SIACONN_21041_AUI; 3127 tsm->tsm_siatxrx = SIATXRX_21041_AUI; 3128 tsm->tsm_siagen = SIAGEN_21041_AUI; 3129 ADD(IFM_ETHER|IFM_10_5|IFM_FDX, tsm); 3130 PRINT("10base5"); 3131 3132 /* 3133 * XXX Autosense not yet supported. 3134 */ 3135 3136 /* XXX This should be auto-sense. */ 3137 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 3138 printf(", default 10baseT"); 3139 3140 printf("\n"); 3141 } 3142 3143 #undef ADD 3144 #undef PRINT 3145 3146 void 3147 tlp_21040_21041_tmsw_get(sc, ifmr) 3148 struct tulip_softc *sc; 3149 struct ifmediareq *ifmr; 3150 { 3151 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3152 3153 ifmr->ifm_status = 0; 3154 3155 switch (IFM_SUBTYPE(ife->ifm_media)) { 3156 case IFM_AUTO: 3157 /* 3158 * XXX Implement autosensing case. 3159 */ 3160 break; 3161 3162 case IFM_10_T: 3163 /* 3164 * We're able to detect link directly on twisted pair. 3165 */ 3166 ifmr->ifm_status = IFM_AVALID; 3167 if (TULIP_ISSET(sc, CSR_SIASTAT, SIASTAT_LKF) == 0) 3168 ifmr->ifm_status |= IFM_ACTIVE; 3169 /* FALLTHROUGH */ 3170 default: 3171 /* 3172 * If not autosensing, active media is the currently 3173 * selected media. 3174 */ 3175 ifmr->ifm_active = ife->ifm_media; 3176 } 3177 } 3178 3179 int 3180 tlp_21040_21041_tmsw_set(sc) 3181 struct tulip_softc *sc; 3182 { 3183 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3184 struct tulip_21040_21041_sia_media *tsm; 3185 3186 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 3187 /* 3188 * If not autosensing, just pull the SIA settings out 3189 * of the media entry. 3190 */ 3191 tsm = ife->ifm_aux; 3192 TULIP_WRITE(sc, CSR_SIACONN, SIACONN_SRL); 3193 TULIP_WRITE(sc, CSR_SIATXRX, tsm->tsm_siatxrx); 3194 TULIP_WRITE(sc, CSR_SIAGEN, tsm->tsm_siagen); 3195 TULIP_WRITE(sc, CSR_SIACONN, tsm->tsm_siaconn); 3196 3197 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3198 sc->sc_opmode &= ~OPMODE_FD; 3199 if (ife->ifm_media & IFM_FDX) 3200 sc->sc_opmode |= OPMODE_FD; 3201 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3202 } else { 3203 /* 3204 * XXX Implement autosensing case. 3205 */ 3206 } 3207 3208 return (0); 3209 } 3210 3211 /* 3212 * MII-on-SIO media switch. Handles only MII attached to the SIO. 3213 */ 3214 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 3215 3216 const struct tulip_mediasw tlp_sio_mii_mediasw = { 3217 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 3218 }; 3219 3220 void 3221 tlp_sio_mii_tmsw_init(sc) 3222 struct tulip_softc *sc; 3223 { 3224 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3225 3226 sc->sc_mii.mii_ifp = ifp; 3227 sc->sc_mii.mii_readreg = tlp_sio_mii_readreg; 3228 sc->sc_mii.mii_writereg = tlp_sio_mii_writereg; 3229 sc->sc_mii.mii_statchg = sc->sc_statchg; 3230 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3231 tlp_mediastatus); 3232 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 3233 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 3234 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 3235 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 3236 } else { 3237 sc->sc_flags |= TULIPF_HAS_MII; 3238 sc->sc_tick = tlp_mii_tick; 3239 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3240 } 3241 } 3242 3243 /* 3244 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 3245 */ 3246 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 3247 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 3248 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 3249 3250 const struct tulip_mediasw tlp_pnic_mediasw = { 3251 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 3252 }; 3253 3254 void tlp_pnic_nway_statchg __P((struct device *)); 3255 void tlp_pnic_nway_tick __P((void *)); 3256 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 3257 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 3258 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 3259 void tlp_pnic_nway_auto_timeout __P((void *)); 3260 void tlp_pnic_nway_status __P((struct tulip_softc *)); 3261 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 3262 3263 void 3264 tlp_pnic_tmsw_init(sc) 3265 struct tulip_softc *sc; 3266 { 3267 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3268 const char *sep = ""; 3269 3270 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 3271 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3272 3273 sc->sc_mii.mii_ifp = ifp; 3274 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 3275 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 3276 sc->sc_mii.mii_statchg = sc->sc_statchg; 3277 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3278 tlp_mediastatus); 3279 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 3280 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 3281 /* XXX What about AUI/BNC support? */ 3282 printf("%s: ", sc->sc_dev.dv_xname); 3283 3284 tlp_pnic_nway_reset(sc); 3285 3286 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 3287 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 3288 PRINT("10baseT"); 3289 3290 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 3291 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 3292 PRINT("10baseT-FDX"); 3293 3294 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 3295 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 3296 PRINT("100baseTX"); 3297 3298 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 3299 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 3300 PNIC_NWAY_CAP100TXFDX); 3301 PRINT("100baseTX-FDX"); 3302 3303 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 3304 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 3305 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 3306 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 3307 PRINT("auto"); 3308 3309 printf("\n"); 3310 3311 sc->sc_statchg = tlp_pnic_nway_statchg; 3312 sc->sc_tick = tlp_pnic_nway_tick; 3313 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3314 } else { 3315 sc->sc_flags |= TULIPF_HAS_MII; 3316 sc->sc_tick = tlp_mii_tick; 3317 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3318 } 3319 3320 #undef ADD 3321 #undef PRINT 3322 } 3323 3324 void 3325 tlp_pnic_tmsw_get(sc, ifmr) 3326 struct tulip_softc *sc; 3327 struct ifmediareq *ifmr; 3328 { 3329 struct mii_data *mii = &sc->sc_mii; 3330 3331 if (sc->sc_flags & TULIPF_HAS_MII) 3332 tlp_mii_getmedia(sc, ifmr); 3333 else { 3334 mii->mii_media_status = 0; 3335 mii->mii_media_active = IFM_NONE; 3336 tlp_pnic_nway_service(sc, MII_POLLSTAT); 3337 ifmr->ifm_status = sc->sc_mii.mii_media_status; 3338 ifmr->ifm_active = sc->sc_mii.mii_media_active; 3339 } 3340 } 3341 3342 int 3343 tlp_pnic_tmsw_set(sc) 3344 struct tulip_softc *sc; 3345 { 3346 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3347 struct mii_data *mii = &sc->sc_mii; 3348 3349 if (sc->sc_flags & TULIPF_HAS_MII) { 3350 /* 3351 * Make sure the built-in Tx jabber timer is disabled. 3352 */ 3353 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 3354 3355 return (tlp_mii_setmedia(sc)); 3356 } 3357 3358 if (ifp->if_flags & IFF_UP) { 3359 mii->mii_media_status = 0; 3360 mii->mii_media_active = IFM_NONE; 3361 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 3362 } 3363 3364 return (0); 3365 } 3366 3367 void 3368 tlp_pnic_nway_statchg(self) 3369 struct device *self; 3370 { 3371 struct tulip_softc *sc = (struct tulip_softc *)self; 3372 3373 /* Idle the transmit and receive processes. */ 3374 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3375 3376 /* 3377 * XXX What about Heartbeat Disable? Is it magically frobbed 3378 * XXX by the PHY? I hope so... 3379 */ 3380 3381 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 3382 OPMODE_SCR); 3383 3384 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 3385 sc->sc_opmode |= OPMODE_TTM; 3386 TULIP_WRITE(sc, CSR_GPP, 3387 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 3388 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3389 } else { 3390 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR; 3391 TULIP_WRITE(sc, CSR_GPP, 3392 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 3393 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3394 } 3395 3396 if (sc->sc_mii.mii_media_active & IFM_FDX) 3397 sc->sc_opmode |= OPMODE_FD; 3398 3399 /* 3400 * Write new OPMODE bits. This also restarts the transmit 3401 * and receive processes. 3402 */ 3403 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3404 3405 /* XXX Update ifp->if_baudrate */ 3406 } 3407 3408 void 3409 tlp_pnic_nway_tick(arg) 3410 void *arg; 3411 { 3412 struct tulip_softc *sc = arg; 3413 int s; 3414 3415 s = splnet(); 3416 tlp_pnic_nway_service(sc, MII_TICK); 3417 splx(s); 3418 3419 timeout(tlp_pnic_nway_tick, sc, hz); 3420 } 3421 3422 /* 3423 * Support for the Lite-On PNIC internal NWay block. This is constructed 3424 * somewhat like a PHY driver for simplicity. 3425 */ 3426 3427 int 3428 tlp_pnic_nway_service(sc, cmd) 3429 struct tulip_softc *sc; 3430 int cmd; 3431 { 3432 struct mii_data *mii = &sc->sc_mii; 3433 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3434 3435 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 3436 return (0); 3437 3438 switch (cmd) { 3439 case MII_POLLSTAT: 3440 /* Nothing special to do here. */ 3441 break; 3442 3443 case MII_MEDIACHG: 3444 switch (IFM_SUBTYPE(ife->ifm_media)) { 3445 case IFM_AUTO: 3446 (void) tlp_pnic_nway_auto(sc, 1); 3447 break; 3448 case IFM_100_T4: 3449 /* 3450 * XXX Not supported as a manual setting right now. 3451 */ 3452 return (EINVAL); 3453 default: 3454 /* 3455 * NWAY register data is stored in the ifmedia entry. 3456 */ 3457 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3458 } 3459 break; 3460 3461 case MII_TICK: 3462 /* 3463 * Only used for autonegotiation. 3464 */ 3465 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3466 return (0); 3467 3468 /* 3469 * Check to see if we have link. If we do, we don't 3470 * need to restart the autonegotiation process. 3471 */ 3472 if (sc->sc_flags & TULIPF_LINK_UP) 3473 return (0); 3474 3475 /* 3476 * Only retry autonegotiation every 5 seconds. 3477 */ 3478 if (++sc->sc_nway_ticks != 5) 3479 return (0); 3480 3481 sc->sc_nway_ticks = 0; 3482 tlp_pnic_nway_reset(sc); 3483 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 3484 return (0); 3485 break; 3486 } 3487 3488 /* Update the media status. */ 3489 tlp_pnic_nway_status(sc); 3490 3491 /* Callback if something changed. */ 3492 if (sc->sc_nway_active != mii->mii_media_active || 3493 cmd == MII_MEDIACHG) { 3494 (*sc->sc_statchg)(&sc->sc_dev); 3495 sc->sc_nway_active = mii->mii_media_active; 3496 } 3497 return (0); 3498 } 3499 3500 void 3501 tlp_pnic_nway_reset(sc) 3502 struct tulip_softc *sc; 3503 { 3504 3505 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 3506 delay(100); 3507 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 3508 } 3509 3510 int 3511 tlp_pnic_nway_auto(sc, waitfor) 3512 struct tulip_softc *sc; 3513 int waitfor; 3514 { 3515 struct mii_data *mii = &sc->sc_mii; 3516 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3517 u_int32_t reg; 3518 int i; 3519 3520 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 3521 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3522 3523 if (waitfor) { 3524 /* Wait 500ms for it to complete. */ 3525 for (i = 0; i < 500; i++) { 3526 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3527 if (reg & PNIC_NWAY_LPAR_MASK) { 3528 tlp_pnic_nway_acomp(sc); 3529 return (0); 3530 } 3531 delay(1000); 3532 } 3533 #if 0 3534 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3535 printf("%s: autonegotiation failed to complete\n", 3536 sc->sc_dev.dv_xname); 3537 #endif 3538 3539 /* 3540 * Don't need to worry about clearing DOINGAUTO. 3541 * If that's set, a timeout is pending, and it will 3542 * clear the flag. 3543 */ 3544 return (EIO); 3545 } 3546 3547 /* 3548 * Just let it finish asynchronously. This is for the benefit of 3549 * the tick handler driving autonegotiation. Don't want 500ms 3550 * delays all the time while the system is running! 3551 */ 3552 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 3553 sc->sc_flags |= TULIPF_DOINGAUTO; 3554 timeout(tlp_pnic_nway_auto_timeout, sc, hz >> 1); 3555 } 3556 return (EJUSTRETURN); 3557 } 3558 3559 void 3560 tlp_pnic_nway_auto_timeout(arg) 3561 void *arg; 3562 { 3563 struct tulip_softc *sc = arg; 3564 u_int32_t reg; 3565 int s; 3566 3567 s = splnet(); 3568 sc->sc_flags &= ~TULIPF_DOINGAUTO; 3569 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3570 #if 0 3571 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3572 printf("%s: autonegotiation failed to complete\n", 3573 sc->sc_dev.dv_xname); 3574 #endif 3575 3576 tlp_pnic_nway_acomp(sc); 3577 3578 /* Update the media status. */ 3579 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 3580 splx(s); 3581 } 3582 3583 void 3584 tlp_pnic_nway_status(sc) 3585 struct tulip_softc *sc; 3586 { 3587 struct mii_data *mii = &sc->sc_mii; 3588 u_int32_t reg; 3589 3590 mii->mii_media_status = IFM_AVALID; 3591 mii->mii_media_active = IFM_ETHER; 3592 3593 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3594 3595 if (sc->sc_flags & TULIPF_LINK_UP) 3596 mii->mii_media_status |= IFM_ACTIVE; 3597 3598 if (reg & PNIC_NWAY_NW) { 3599 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 3600 /* Erg, still trying, I guess... */ 3601 mii->mii_media_active |= IFM_NONE; 3602 return; 3603 } 3604 3605 #if 0 3606 if (reg & PNIC_NWAY_LPAR100T4) 3607 mii->mii_media_active |= IFM_100_T4; 3608 else 3609 #endif 3610 if (reg & PNIC_NWAY_LPAR100TXFDX) 3611 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 3612 else if (reg & PNIC_NWAY_LPAR100TX) 3613 mii->mii_media_active |= IFM_100_TX; 3614 else if (reg & PNIC_NWAY_LPAR10TFDX) 3615 mii->mii_media_active |= IFM_10_T|IFM_FDX; 3616 else if (reg & PNIC_NWAY_LPAR10T) 3617 mii->mii_media_active |= IFM_10_T; 3618 else 3619 mii->mii_media_active |= IFM_NONE; 3620 } else { 3621 if (reg & PNIC_NWAY_100) 3622 mii->mii_media_active |= IFM_100_TX; 3623 else 3624 mii->mii_media_active |= IFM_10_T; 3625 if (reg & PNIC_NWAY_FD) 3626 mii->mii_media_active |= IFM_FDX; 3627 } 3628 } 3629 3630 void 3631 tlp_pnic_nway_acomp(sc) 3632 struct tulip_softc *sc; 3633 { 3634 u_int32_t reg; 3635 3636 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3637 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 3638 3639 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 3640 reg |= PNIC_NWAY_100; 3641 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 3642 reg |= PNIC_NWAY_FD; 3643 3644 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 3645 } 3646
Indexes created Thu Sep 25 08:09:54 GMT 2025