tulip.c revision 1.17
1 /* $NetBSD: tulip.c,v 1.17 1999/09/25 00:27:00 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <vm/vm.h> /* for PAGE_SIZE */ 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #endif 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/if_inarp.h> 73 #endif 74 75 #ifdef NS 76 #include <netns/ns.h> 77 #include <netns/ns_if.h> 78 #endif 79 80 #include <machine/bus.h> 81 #include <machine/intr.h> 82 83 #include <dev/mii/mii.h> 84 #include <dev/mii/miivar.h> 85 86 #include <dev/ic/tulipreg.h> 87 #include <dev/ic/tulipvar.h> 88 89 /* 90 * The following tables compute the transmit threshold mode. We start 91 * at index 0. When ever we get a transmit underrun, we increment our 92 * index, falling back if we encounter the NULL terminator. 93 * 94 * Note: Store and forward mode is only available on the 100mbps chips 95 * (21140 and higher). 96 */ 97 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = { 98 { OPMODE_TR_72, "72 bytes" }, 99 { OPMODE_TR_96, "96 bytes" }, 100 { OPMODE_TR_128, "128 bytes" }, 101 { OPMODE_TR_160, "160 bytes" }, 102 { 0, NULL }, 103 }; 104 105 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = { 106 { OPMODE_TR_72, "72/128 bytes" }, 107 { OPMODE_TR_96, "96/256 bytes" }, 108 { OPMODE_TR_128, "128/512 bytes" }, 109 { OPMODE_TR_160, "160/1024 bytes" }, 110 { OPMODE_SF, "store and forward mode" }, 111 { 0, NULL }, 112 }; 113 114 #define TXTH_72 0 115 #define TXTH_96 1 116 #define TXTH_128 2 117 #define TXTH_160 3 118 #define TXTH_SF 4 119 120 /* 121 * The Winbond 89C840F does transmit threshold control totally 122 * differently. It simply has a 7-bit field which indicates 123 * the threshold: 124 * 125 * txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16; 126 * 127 * However, we just do Store-and-Forward mode on these chips, since 128 * the DMA engines seem to be flaky. 129 */ 130 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = { 131 { 0, "store and forward mode" }, 132 { 0, NULL }, 133 }; 134 135 #define TXTH_WINB_SF 0 136 137 void tlp_start __P((struct ifnet *)); 138 void tlp_watchdog __P((struct ifnet *)); 139 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 140 141 void tlp_shutdown __P((void *)); 142 143 void tlp_reset __P((struct tulip_softc *)); 144 int tlp_init __P((struct tulip_softc *)); 145 void tlp_rxdrain __P((struct tulip_softc *)); 146 void tlp_stop __P((struct tulip_softc *, int)); 147 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 148 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 149 void tlp_srom_idle __P((struct tulip_softc *)); 150 151 void tlp_filter_setup __P((struct tulip_softc *)); 152 void tlp_winb_filter_setup __P((struct tulip_softc *)); 153 154 void tlp_rxintr __P((struct tulip_softc *)); 155 void tlp_txintr __P((struct tulip_softc *)); 156 157 void tlp_mii_tick __P((void *)); 158 void tlp_mii_statchg __P((struct device *)); 159 void tlp_winb_mii_statchg __P((struct device *)); 160 161 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 162 int tlp_mii_setmedia __P((struct tulip_softc *)); 163 164 void tlp_sio_mii_sync __P((struct tulip_softc *)); 165 void tlp_sio_mii_sendbits __P((struct tulip_softc *, u_int32_t, int)); 166 int tlp_sio_mii_readreg __P((struct device *, int, int)); 167 void tlp_sio_mii_writereg __P((struct device *, int, int, int)); 168 169 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 170 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 171 172 void tlp_2114x_preinit __P((struct tulip_softc *)); 173 void tlp_pnic_preinit __P((struct tulip_softc *)); 174 175 void tlp_21140_reset __P((struct tulip_softc *)); 176 177 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t)); 178 #define tlp_mchash(addr) (tlp_crc32((addr), ETHER_ADDR_LEN) & \ 179 (TULIP_MCHASHSIZE - 1)) 180 181 #ifdef TLP_DEBUG 182 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 183 printf x 184 #else 185 #define DPRINTF(sc, x) /* nothing */ 186 #endif 187 188 /* 189 * tlp_attach: 190 * 191 * Attach a Tulip interface to the system. 192 */ 193 void 194 tlp_attach(sc, enaddr) 195 struct tulip_softc *sc; 196 const u_int8_t *enaddr; 197 { 198 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 199 int i, rseg, error; 200 bus_dma_segment_t seg; 201 202 /* 203 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 204 */ 205 206 /* 207 * Setup the transmit threshold table. 208 */ 209 switch (sc->sc_chip) { 210 case TULIP_CHIP_DE425: 211 case TULIP_CHIP_21040: 212 case TULIP_CHIP_21041: 213 sc->sc_txth = tlp_10_txthresh_tab; 214 break; 215 216 default: 217 sc->sc_txth = tlp_10_100_txthresh_tab; 218 break; 219 } 220 221 /* 222 * Setup the filter setup function. 223 */ 224 switch (sc->sc_chip) { 225 case TULIP_CHIP_WB89C840F: 226 sc->sc_filter_setup = tlp_winb_filter_setup; 227 break; 228 229 default: 230 sc->sc_filter_setup = tlp_filter_setup; 231 break; 232 } 233 234 /* 235 * Set up the media status change function. 236 */ 237 switch (sc->sc_chip) { 238 case TULIP_CHIP_WB89C840F: 239 sc->sc_statchg = tlp_winb_mii_statchg; 240 break; 241 242 default: 243 /* 244 * We may override this if we have special media 245 * handling requirements (e.g. flipping GPIO pins). 246 * 247 * The pure-MII statchg function covers the basics. 248 */ 249 sc->sc_statchg = tlp_mii_statchg; 250 break; 251 } 252 253 /* 254 * Set up various chip-specific quirks. 255 */ 256 switch (sc->sc_chip) { 257 case TULIP_CHIP_21140: 258 case TULIP_CHIP_21140A: 259 case TULIP_CHIP_21142: 260 case TULIP_CHIP_21143: 261 sc->sc_preinit = tlp_2114x_preinit; 262 break; 263 264 case TULIP_CHIP_82C168: 265 case TULIP_CHIP_82C169: 266 sc->sc_preinit = tlp_pnic_preinit; 267 268 /* 269 * These chips seem to have busted DMA engines; just put them 270 * in Store-and-Forward mode from the get-go. 271 */ 272 sc->sc_txthresh = TXTH_SF; 273 break; 274 275 case TULIP_CHIP_WB89C840F: 276 sc->sc_flags |= TULIPF_IC_FS; 277 break; 278 279 default: 280 /* Nothing. */ 281 } 282 283 SIMPLEQ_INIT(&sc->sc_txfreeq); 284 SIMPLEQ_INIT(&sc->sc_txdirtyq); 285 286 /* 287 * Allocate the control data structures, and create and load the 288 * DMA map for it. 289 */ 290 if ((error = bus_dmamem_alloc(sc->sc_dmat, 291 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg, 292 0)) != 0) { 293 printf("%s: unable to allocate control data, error = %d\n", 294 sc->sc_dev.dv_xname, error); 295 goto fail_0; 296 } 297 298 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 299 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 300 BUS_DMA_COHERENT)) != 0) { 301 printf("%s: unable to map control data, error = %d\n", 302 sc->sc_dev.dv_xname, error); 303 goto fail_1; 304 } 305 306 if ((error = bus_dmamap_create(sc->sc_dmat, 307 sizeof(struct tulip_control_data), 1, 308 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 309 printf("%s: unable to create control data DMA map, " 310 "error = %d\n", sc->sc_dev.dv_xname, error); 311 goto fail_2; 312 } 313 314 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 315 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 316 0)) != 0) { 317 printf("%s: unable to load control data DMA map, error = %d\n", 318 sc->sc_dev.dv_xname, error); 319 goto fail_3; 320 } 321 322 /* 323 * Create the transmit buffer DMA maps. 324 */ 325 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 326 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 327 TULIP_NTXSEGS, MCLBYTES, 0, 0, 328 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 329 printf("%s: unable to create tx DMA map %d, " 330 "error = %d\n", sc->sc_dev.dv_xname, i, error); 331 goto fail_4; 332 } 333 } 334 335 /* 336 * Create the recieve buffer DMA maps. 337 */ 338 for (i = 0; i < TULIP_NRXDESC; i++) { 339 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 340 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 341 printf("%s: unable to create rx DMA map %d, " 342 "error = %d\n", sc->sc_dev.dv_xname, i, error); 343 goto fail_5; 344 } 345 sc->sc_rxsoft[i].rxs_mbuf = NULL; 346 } 347 348 /* 349 * Reset the chip to a known state. 350 */ 351 tlp_reset(sc); 352 353 /* Announce ourselves. */ 354 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 355 sc->sc_name[0] != '\0' ? sc->sc_name : "", 356 sc->sc_name[0] != '\0' ? ", " : "", 357 ether_sprintf(enaddr)); 358 359 /* 360 * Initialize our media structures. This may probe the MII, if 361 * present. 362 */ 363 (*sc->sc_mediasw->tmsw_init)(sc); 364 365 ifp = &sc->sc_ethercom.ec_if; 366 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 367 ifp->if_softc = sc; 368 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 369 ifp->if_ioctl = tlp_ioctl; 370 ifp->if_start = tlp_start; 371 ifp->if_watchdog = tlp_watchdog; 372 373 /* 374 * Attach the interface. 375 */ 376 if_attach(ifp); 377 ether_ifattach(ifp, enaddr); 378 #if NBPFILTER > 0 379 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 380 sizeof(struct ether_header)); 381 #endif 382 383 /* 384 * Make sure the interface is shutdown during reboot. 385 */ 386 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 387 if (sc->sc_sdhook == NULL) 388 printf("%s: WARNING: unable to establish shutdown hook\n", 389 sc->sc_dev.dv_xname); 390 return; 391 392 /* 393 * Free any resources we've allocated during the failed attach 394 * attempt. Do this in reverse order and fall through. 395 */ 396 fail_5: 397 for (i = 0; i < TULIP_NRXDESC; i++) { 398 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 399 bus_dmamap_destroy(sc->sc_dmat, 400 sc->sc_rxsoft[i].rxs_dmamap); 401 } 402 fail_4: 403 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 404 if (sc->sc_txsoft[i].txs_dmamap != NULL) 405 bus_dmamap_destroy(sc->sc_dmat, 406 sc->sc_txsoft[i].txs_dmamap); 407 } 408 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 409 fail_3: 410 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 411 fail_2: 412 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 413 sizeof(struct tulip_control_data)); 414 fail_1: 415 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 416 fail_0: 417 return; 418 } 419 420 /* 421 * tlp_shutdown: 422 * 423 * Make sure the interface is stopped at reboot time. 424 */ 425 void 426 tlp_shutdown(arg) 427 void *arg; 428 { 429 struct tulip_softc *sc = arg; 430 431 tlp_stop(sc, 1); 432 } 433 434 /* 435 * tlp_start: [ifnet interface function] 436 * 437 * Start packet transmission on the interface. 438 */ 439 void 440 tlp_start(ifp) 441 struct ifnet *ifp; 442 { 443 struct tulip_softc *sc = ifp->if_softc; 444 struct mbuf *m0, *m; 445 struct tulip_txsoft *txs, *last_txs; 446 bus_dmamap_t dmamap; 447 int error, firsttx, nexttx, lasttx, ofree, seg; 448 449 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 450 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 451 452 /* 453 * If we want a filter setup, it means no more descriptors were 454 * available for the setup routine. Let it get a chance to wedge 455 * itself into the ring. 456 */ 457 if (sc->sc_flags & TULIPF_WANT_SETUP) 458 ifp->if_flags |= IFF_OACTIVE; 459 460 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 461 return; 462 463 /* 464 * Remember the previous number of free descriptors and 465 * the first descriptor we'll use. 466 */ 467 ofree = sc->sc_txfree; 468 firsttx = sc->sc_txnext; 469 470 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 471 sc->sc_dev.dv_xname, ofree, firsttx)); 472 473 /* 474 * Loop through the send queue, setting up transmit descriptors 475 * until we drain the queue, or use up all available transmit 476 * descriptors. 477 */ 478 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 479 sc->sc_txfree != 0) { 480 /* 481 * Grab a packet off the queue. 482 */ 483 IF_DEQUEUE(&ifp->if_snd, m0); 484 if (m0 == NULL) 485 break; 486 487 dmamap = txs->txs_dmamap; 488 489 /* 490 * Load the DMA map. If this fails, the packet either 491 * didn't fit in the alloted number of segments, or we were 492 * short on resources. In this case, we'll copy and try 493 * again. 494 */ 495 if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 496 BUS_DMA_NOWAIT) != 0) { 497 MGETHDR(m, M_DONTWAIT, MT_DATA); 498 if (m == NULL) { 499 printf("%s: unable to allocate Tx mbuf\n", 500 sc->sc_dev.dv_xname); 501 IF_PREPEND(&ifp->if_snd, m0); 502 break; 503 } 504 if (m0->m_pkthdr.len > MHLEN) { 505 MCLGET(m, M_DONTWAIT); 506 if ((m->m_flags & M_EXT) == 0) { 507 printf("%s: unable to allocate Tx " 508 "cluster\n", sc->sc_dev.dv_xname); 509 m_freem(m); 510 IF_PREPEND(&ifp->if_snd, m0); 511 break; 512 } 513 } 514 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 515 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 516 m_freem(m0); 517 m0 = m; 518 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 519 m0, BUS_DMA_NOWAIT); 520 if (error) { 521 printf("%s: unable to load Tx buffer, " 522 "error = %d\n", sc->sc_dev.dv_xname, error); 523 IF_PREPEND(&ifp->if_snd, m0); 524 break; 525 } 526 } 527 528 /* 529 * Ensure we have enough descriptors free to describe 530 * the packet. 531 */ 532 if (dmamap->dm_nsegs > sc->sc_txfree) { 533 /* 534 * Not enough free descriptors to transmit this 535 * packet. We haven't committed to anything yet, 536 * so just unload the DMA map, put the packet 537 * back on the queue, and punt. Notify the upper 538 * layer that there are no more slots left. 539 * 540 * XXX We could allocate an mbuf and copy, but 541 * XXX it is worth it? 542 */ 543 ifp->if_flags |= IFF_OACTIVE; 544 bus_dmamap_unload(sc->sc_dmat, dmamap); 545 IF_PREPEND(&ifp->if_snd, m0); 546 break; 547 } 548 549 /* 550 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 551 */ 552 553 /* Sync the DMA map. */ 554 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 555 BUS_DMASYNC_PREWRITE); 556 557 /* 558 * Initialize the transmit descriptors. 559 */ 560 for (nexttx = sc->sc_txnext, seg = 0; 561 seg < dmamap->dm_nsegs; 562 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 563 /* 564 * If this is the first descriptor we're 565 * enqueueing, don't set the OWN bit just 566 * yet. That could cause a race condition. 567 * We'll do it below. 568 */ 569 sc->sc_txdescs[nexttx].td_status = 570 (nexttx == firsttx) ? 0 : TDSTAT_OWN; 571 sc->sc_txdescs[nexttx].td_bufaddr1 = 572 dmamap->dm_segs[seg].ds_addr; 573 sc->sc_txdescs[nexttx].td_ctl = 574 (dmamap->dm_segs[seg].ds_len << TDCTL_SIZE1_SHIFT) | 575 TDCTL_CH; 576 lasttx = nexttx; 577 } 578 579 /* Set `first segment' and `last segment' appropriately. */ 580 sc->sc_txdescs[sc->sc_txnext].td_ctl |= TDCTL_Tx_FS; 581 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_LS; 582 583 #ifdef TLP_DEBUG 584 if (ifp->if_flags & IFF_DEBUG) { 585 printf(" txsoft %p trainsmit chain:\n", txs); 586 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 587 printf(" descriptor %d:\n", seg); 588 printf(" td_status: 0x%08x\n", 589 sc->sc_txdescs[seg].td_status); 590 printf(" td_ctl: 0x%08x\n", 591 sc->sc_txdescs[seg].td_ctl); 592 printf(" td_bufaddr1: 0x%08x\n", 593 sc->sc_txdescs[seg].td_bufaddr1); 594 printf(" td_bufaddr2: 0x%08x\n", 595 sc->sc_txdescs[seg].td_bufaddr2); 596 if (seg == lasttx) 597 break; 598 } 599 } 600 #endif 601 602 /* Sync the descriptors we're using. */ 603 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 604 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 605 606 /* 607 * Store a pointer to the packet so we can free it later, 608 * and remember what txdirty will be once the packet is 609 * done. 610 */ 611 txs->txs_mbuf = m0; 612 txs->txs_firstdesc = sc->sc_txnext; 613 txs->txs_lastdesc = lasttx; 614 615 /* Advance the tx pointer. */ 616 sc->sc_txfree -= dmamap->dm_nsegs; 617 sc->sc_txnext = nexttx; 618 619 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 620 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 621 622 last_txs = txs; 623 624 #if NBPFILTER > 0 625 /* 626 * Pass the packet to any BPF listeners. 627 */ 628 if (ifp->if_bpf) 629 bpf_mtap(ifp->if_bpf, m0); 630 #endif /* NBPFILTER > 0 */ 631 } 632 633 if (txs == NULL || sc->sc_txfree == 0) { 634 /* No more slots left; notify upper layer. */ 635 ifp->if_flags |= IFF_OACTIVE; 636 } 637 638 if (sc->sc_txfree != ofree) { 639 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 640 sc->sc_dev.dv_xname, lasttx, firsttx)); 641 /* 642 * Cause a transmit interrupt to happen on the 643 * last packet we enqueued. 644 */ 645 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_IC; 646 TULIP_CDTXSYNC(sc, lasttx, 1, 647 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 648 649 /* 650 * Some clone chips want IC on the *first* segment in 651 * the packet. Appease them. 652 */ 653 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 654 last_txs->txs_firstdesc != lasttx) { 655 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 656 TDCTL_Tx_IC; 657 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 658 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 659 } 660 661 /* 662 * The entire packet chain is set up. Give the 663 * first descriptor to the chip now. 664 */ 665 sc->sc_txdescs[firsttx].td_status |= TDSTAT_OWN; 666 TULIP_CDTXSYNC(sc, firsttx, 1, 667 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 668 669 /* Wake up the transmitter. */ 670 /* XXX USE AUTOPOLLING? */ 671 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 672 673 /* Set a watchdog timer in case the chip flakes out. */ 674 ifp->if_timer = 5; 675 } 676 } 677 678 /* 679 * tlp_watchdog: [ifnet interface function] 680 * 681 * Watchdog timer handler. 682 */ 683 void 684 tlp_watchdog(ifp) 685 struct ifnet *ifp; 686 { 687 struct tulip_softc *sc = ifp->if_softc; 688 int doing_setup, doing_transmit; 689 690 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 691 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 692 693 if (doing_setup && doing_transmit) { 694 printf("%s: filter setup and transmit timeout\n", 695 sc->sc_dev.dv_xname); 696 ifp->if_oerrors++; 697 } else if (doing_transmit) { 698 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 699 ifp->if_oerrors++; 700 } else if (doing_setup) 701 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 702 else 703 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 704 705 (void) tlp_init(sc); 706 707 /* Try to get more packets going. */ 708 tlp_start(ifp); 709 } 710 711 /* 712 * tlp_ioctl: [ifnet interface function] 713 * 714 * Handle control requests from the operator. 715 */ 716 int 717 tlp_ioctl(ifp, cmd, data) 718 struct ifnet *ifp; 719 u_long cmd; 720 caddr_t data; 721 { 722 struct tulip_softc *sc = ifp->if_softc; 723 struct ifreq *ifr = (struct ifreq *)data; 724 struct ifaddr *ifa = (struct ifaddr *)data; 725 int s, error = 0; 726 727 s = splnet(); 728 729 switch (cmd) { 730 case SIOCSIFADDR: 731 ifp->if_flags |= IFF_UP; 732 733 switch (ifa->ifa_addr->sa_family) { 734 #ifdef INET 735 case AF_INET: 736 if ((error = tlp_init(sc)) != 0) 737 break; 738 arp_ifinit(ifp, ifa); 739 break; 740 #endif /* INET */ 741 #ifdef NS 742 case AF_NS: 743 { 744 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 745 746 if (ns_nullhost(*ina)) 747 ina->x_host = *(union ns_host *) 748 LLADDR(ifp->if_sadl); 749 else 750 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 751 ifp->if_addrlen); 752 /* Set new address. */ 753 error = tlp_init(sc); 754 break; 755 } 756 #endif /* NS */ 757 default: 758 error = tlp_init(sc); 759 break; 760 } 761 break; 762 763 case SIOCSIFMTU: 764 if (ifr->ifr_mtu > ETHERMTU) 765 error = EINVAL; 766 else 767 ifp->if_mtu = ifr->ifr_mtu; 768 break; 769 770 case SIOCSIFFLAGS: 771 if ((ifp->if_flags & IFF_UP) == 0 && 772 (ifp->if_flags & IFF_RUNNING) != 0) { 773 /* 774 * If interface is marked down and it is running, then 775 * stop it. 776 */ 777 tlp_stop(sc, 1); 778 } else if ((ifp->if_flags & IFF_UP) != 0 && 779 (ifp->if_flags & IFF_RUNNING) == 0) { 780 /* 781 * If interfase it marked up and it is stopped, then 782 * start it. 783 */ 784 error = tlp_init(sc); 785 } else if ((ifp->if_flags & IFF_UP) != 0) { 786 /* 787 * Reset the interface to pick up changes in any other 788 * flags that affect the hardware state. 789 */ 790 error = tlp_init(sc); 791 } 792 break; 793 794 case SIOCADDMULTI: 795 case SIOCDELMULTI: 796 error = (cmd == SIOCADDMULTI) ? 797 ether_addmulti(ifr, &sc->sc_ethercom) : 798 ether_delmulti(ifr, &sc->sc_ethercom); 799 800 if (error == ENETRESET) { 801 /* 802 * Multicast list has changed. Set the filter 803 * accordingly. 804 */ 805 (*sc->sc_filter_setup)(sc); 806 error = 0; 807 } 808 break; 809 810 case SIOCSIFMEDIA: 811 case SIOCGIFMEDIA: 812 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 813 break; 814 815 default: 816 error = EINVAL; 817 break; 818 } 819 820 /* Try to get more packets going. */ 821 tlp_start(ifp); 822 823 splx(s); 824 return (error); 825 } 826 827 /* 828 * tlp_intr: 829 * 830 * Interrupt service routine. 831 */ 832 int 833 tlp_intr(arg) 834 void *arg; 835 { 836 struct tulip_softc *sc = arg; 837 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 838 u_int32_t status, rxstatus, txstatus; 839 int handled = 0, txthresh; 840 841 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 842 843 /* 844 * If the interface isn't running, the interrupt couldn't 845 * possibly have come from us. 846 */ 847 if ((ifp->if_flags & IFF_RUNNING) == 0) 848 return (0); 849 850 for (;;) { 851 status = TULIP_READ(sc, CSR_STATUS); 852 if (status) 853 TULIP_WRITE(sc, CSR_STATUS, status); 854 855 if ((status & sc->sc_inten) == 0) 856 break; 857 858 handled = 1; 859 860 rxstatus = status & sc->sc_rxint_mask; 861 txstatus = status & sc->sc_txint_mask; 862 863 if (rxstatus) { 864 /* Grab new any new packets. */ 865 tlp_rxintr(sc); 866 867 if (rxstatus & STATUS_RWT) 868 printf("%s: receive watchdog timeout\n", 869 sc->sc_dev.dv_xname); 870 871 if (rxstatus & STATUS_RU) { 872 printf("%s: receive ring overrun\n", 873 sc->sc_dev.dv_xname); 874 /* Get the receive process going again. */ 875 tlp_idle(sc, OPMODE_SR); 876 TULIP_WRITE(sc, CSR_RXLIST, 877 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 878 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 879 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 880 break; 881 } 882 } 883 884 if (txstatus) { 885 /* Sweep up transmit descriptors. */ 886 tlp_txintr(sc); 887 888 if (txstatus & STATUS_TJT) 889 printf("%s: transmit jabber timeout\n", 890 sc->sc_dev.dv_xname); 891 892 if (txstatus & STATUS_UNF) { 893 /* 894 * Increase our transmit threshold if 895 * another is available. 896 */ 897 txthresh = sc->sc_txthresh + 1; 898 if (sc->sc_txth[txthresh].txth_name != NULL) { 899 /* Idle the transmit process. */ 900 tlp_idle(sc, OPMODE_ST); 901 902 sc->sc_txthresh = txthresh; 903 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 904 sc->sc_opmode |= 905 sc->sc_txth[txthresh].txth_opmode; 906 printf("%s: transmit underrun; new " 907 "threshold: %s\n", 908 sc->sc_dev.dv_xname, 909 sc->sc_txth[txthresh].txth_name); 910 911 /* 912 * Set the new threshold and restart 913 * the transmit process. 914 */ 915 TULIP_WRITE(sc, CSR_OPMODE, 916 sc->sc_opmode); 917 } 918 /* 919 * XXX Log every Nth underrun from 920 * XXX now on? 921 */ 922 } 923 } 924 925 if (status & (STATUS_TPS|STATUS_RPS)) { 926 if (status & STATUS_TPS) 927 printf("%s: transmit process stopped\n", 928 sc->sc_dev.dv_xname); 929 if (status & STATUS_RPS) 930 printf("%s: receive process stopped\n", 931 sc->sc_dev.dv_xname); 932 (void) tlp_init(sc); 933 break; 934 } 935 936 if (status & STATUS_SE) { 937 const char *str; 938 switch (status & STATUS_EB) { 939 case STATUS_EB_PARITY: 940 str = "parity error"; 941 break; 942 943 case STATUS_EB_MABT: 944 str = "master abort"; 945 break; 946 947 case STATUS_EB_TABT: 948 str = "target abort"; 949 break; 950 951 default: 952 str = "unknown error"; 953 break; 954 } 955 printf("%s: fatal system error: %s\n", 956 sc->sc_dev.dv_xname, str); 957 (void) tlp_init(sc); 958 break; 959 } 960 961 /* 962 * Not handled: 963 * 964 * Transmit buffer unavailable -- normal 965 * condition, nothing to do, really. 966 * 967 * General purpose timer experied -- we don't 968 * use the general purpose timer. 969 * 970 * Early receive interrupt -- not available on 971 * all chips, we just use RI. We also only 972 * use single-segment receive DMA, so this 973 * is mostly useless. 974 */ 975 } 976 977 /* Try to get more packets going. */ 978 tlp_start(ifp); 979 980 return (handled); 981 } 982 983 /* 984 * tlp_rxintr: 985 * 986 * Helper; handle receive interrupts. 987 */ 988 void 989 tlp_rxintr(sc) 990 struct tulip_softc *sc; 991 { 992 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 993 struct ether_header *eh; 994 struct tulip_rxsoft *rxs; 995 struct mbuf *m; 996 u_int32_t rxstat; 997 int i, len; 998 999 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 1000 rxs = &sc->sc_rxsoft[i]; 1001 1002 TULIP_CDRXSYNC(sc, i, 1003 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1004 1005 rxstat = sc->sc_rxdescs[i].td_status; 1006 1007 if (rxstat & TDSTAT_OWN) { 1008 /* 1009 * We have processed all of the receive buffers. 1010 */ 1011 break; 1012 } 1013 1014 /* 1015 * Make sure the packet fit in one buffer. This should 1016 * always be the case. But the Lite-On PNIC, rev 33 1017 * has an awful receive engine bug, which may require 1018 * a very icky work-around. 1019 */ 1020 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1021 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1022 printf("%s: incoming packet spilled, resetting\n", 1023 sc->sc_dev.dv_xname); 1024 (void) tlp_init(sc); 1025 return; 1026 } 1027 1028 /* 1029 * If any collisions were seen on the wire, count one. 1030 */ 1031 if (rxstat & TDSTAT_Rx_CS) 1032 ifp->if_collisions++; 1033 1034 /* 1035 * If an error occured, update stats, clear the status 1036 * word, and leave the packet buffer in place. It will 1037 * simply be reused the next time the ring comes around. 1038 */ 1039 if (rxstat & TDSTAT_ES) { 1040 #define PRINTERR(bit, str) \ 1041 if (rxstat & (bit)) \ 1042 printf("%s: receive error: %s\n", \ 1043 sc->sc_dev.dv_xname, str) 1044 ifp->if_ierrors++; 1045 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1046 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1047 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1048 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1049 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1050 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1051 #undef PRINTERR 1052 TULIP_INIT_RXDESC(sc, i); 1053 continue; 1054 } 1055 1056 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1057 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1058 1059 /* 1060 * No errors; receive the packet. Note the Tulip 1061 * includes the CRC with every packet; trim it. 1062 */ 1063 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; 1064 1065 #ifdef __NO_STRICT_ALIGNMENT 1066 /* 1067 * Allocate a new mbuf cluster. If that fails, we are 1068 * out of memory, and must drop the packet and recycle 1069 * the buffer that's already attached to this descriptor. 1070 */ 1071 m = rxs->rxs_mbuf; 1072 if (tlp_add_rxbuf(sc, i) != 0) { 1073 ifp->if_ierrors++; 1074 TULIP_INIT_RXDESC(sc, i); 1075 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1076 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1077 continue; 1078 } 1079 #else 1080 /* 1081 * The Tulip's receive buffers must be 4-byte aligned. 1082 * But this means that the data after the Ethernet header 1083 * is misaligned. We must allocate a new buffer and 1084 * copy the data, shifted forward 2 bytes. 1085 */ 1086 MGETHDR(m, M_DONTWAIT, MT_DATA); 1087 if (m == NULL) { 1088 dropit: 1089 ifp->if_ierrors++; 1090 TULIP_INIT_RXDESC(sc, i); 1091 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1092 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1093 continue; 1094 } 1095 if (len > (MHLEN - 2)) { 1096 MCLGET(m, M_DONTWAIT); 1097 if ((m->m_flags & M_EXT) == 0) { 1098 m_freem(m); 1099 goto dropit; 1100 } 1101 } 1102 m->m_data += 2; 1103 1104 /* 1105 * Note that we use clusters for incoming frames, so the 1106 * buffer is virtually contiguous. 1107 */ 1108 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1109 1110 /* Allow the receive descriptor to continue using its mbuf. */ 1111 TULIP_INIT_RXDESC(sc, i); 1112 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1113 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1114 #endif /* __NO_STRICT_ALIGNMENT */ 1115 1116 ifp->if_ipackets++; 1117 eh = mtod(m, struct ether_header *); 1118 m->m_pkthdr.rcvif = ifp; 1119 m->m_pkthdr.len = m->m_len = len; 1120 1121 #if NBPFILTER > 0 1122 /* 1123 * Pass this up to any BPF listeners, but only 1124 * pass it up the stack if its for us. 1125 */ 1126 if (ifp->if_bpf) 1127 bpf_mtap(ifp->if_bpf, m); 1128 #endif /* NPBFILTER > 0 */ 1129 1130 /* 1131 * This test is outside the NBPFILTER block because 1132 * on the 21140 we have to use Hash-Only mode due to 1133 * a bug in the filter logic. 1134 */ 1135 if ((ifp->if_flags & IFF_PROMISC) != 0 || 1136 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 1137 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1138 ETHER_ADDR_LEN) != 0 && 1139 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) { 1140 m_freem(m); 1141 continue; 1142 } 1143 } 1144 1145 /* Pass it on. */ 1146 (*ifp->if_input)(ifp, m); 1147 } 1148 1149 /* Update the recieve pointer. */ 1150 sc->sc_rxptr = i; 1151 } 1152 1153 /* 1154 * tlp_txintr: 1155 * 1156 * Helper; handle transmit interrupts. 1157 */ 1158 void 1159 tlp_txintr(sc) 1160 struct tulip_softc *sc; 1161 { 1162 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1163 struct tulip_txsoft *txs; 1164 u_int32_t txstat; 1165 1166 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1167 sc->sc_dev.dv_xname, sc->sc_flags)); 1168 1169 ifp->if_flags &= ~IFF_OACTIVE; 1170 1171 /* 1172 * If we were doing a filter setup, check to see if it completed. 1173 */ 1174 if (sc->sc_flags & TULIPF_DOING_SETUP) { 1175 TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1176 if ((sc->sc_setup_desc.td_status & TDSTAT_OWN) == 0) 1177 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1178 } 1179 1180 /* 1181 * Go through our Tx list and free mbufs for those 1182 * frames that have been transmitted. 1183 */ 1184 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1185 TULIP_CDTXSYNC(sc, txs->txs_firstdesc, 1186 txs->txs_dmamap->dm_nsegs, 1187 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1188 1189 #ifdef TLP_DEBUG 1190 if (ifp->if_flags & IFF_DEBUG) { 1191 int i; 1192 printf(" txsoft %p trainsmit chain:\n", txs); 1193 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1194 printf(" descriptor %d:\n", i); 1195 printf(" td_status: 0x%08x\n", 1196 sc->sc_txdescs[i].td_status); 1197 printf(" td_ctl: 0x%08x\n", 1198 sc->sc_txdescs[i].td_ctl); 1199 printf(" td_bufaddr1: 0x%08x\n", 1200 sc->sc_txdescs[i].td_bufaddr1); 1201 printf(" td_bufaddr2: 0x%08x\n", 1202 sc->sc_txdescs[i].td_bufaddr2); 1203 if (i == txs->txs_lastdesc) 1204 break; 1205 } 1206 } 1207 #endif 1208 1209 txstat = sc->sc_txdescs[txs->txs_firstdesc].td_status; 1210 if (txstat & TDSTAT_OWN) 1211 break; 1212 1213 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1214 1215 sc->sc_txfree += txs->txs_dmamap->dm_nsegs; 1216 1217 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1218 0, txs->txs_dmamap->dm_mapsize, 1219 BUS_DMASYNC_POSTWRITE); 1220 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1221 m_freem(txs->txs_mbuf); 1222 txs->txs_mbuf = NULL; 1223 1224 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1225 1226 /* 1227 * Check for errors and collisions. 1228 */ 1229 if (txstat & 1230 (TDSTAT_Tx_UF|TDSTAT_Tx_NC|TDSTAT_Tx_LO|TDSTAT_Tx_TO)) { 1231 ifp->if_oerrors++; 1232 #if 0 1233 /* 1234 * XXX Can't check for late or excessive collisions; 1235 * XXX Some 21040s seem to register those even on 1236 * XXX successful transmissions! 1237 */ 1238 if (txstat & TDSTAT_Tx_EC) 1239 ifp->if_collisions += 16; 1240 if (txstat & TDSTAT_Tx_LC) 1241 ifp->if_collisions++; 1242 #endif 1243 } else { 1244 /* Packet was transmitted successfully. */ 1245 ifp->if_opackets++; 1246 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1247 } 1248 } 1249 1250 /* 1251 * If there are no more pending transmissions, cancel the watchdog 1252 * timer. 1253 */ 1254 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1255 ifp->if_timer = 0; 1256 1257 /* 1258 * If we have a receive filter setup pending, do it now. 1259 */ 1260 if (sc->sc_flags & TULIPF_WANT_SETUP) 1261 (*sc->sc_filter_setup)(sc); 1262 } 1263 1264 /* 1265 * tlp_reset: 1266 * 1267 * Perform a soft reset on the Tulip. 1268 */ 1269 void 1270 tlp_reset(sc) 1271 struct tulip_softc *sc; 1272 { 1273 int i; 1274 1275 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1276 1277 for (i = 0; i < 1000; i++) { 1278 /* 1279 * Wait at least 50 PCI cycles for the reset to 1280 * complete before peeking at the Tulip again. 1281 * 10 uSec is a bit longer than 50 PCI cycles 1282 * (at 33MHz), but it doesn't hurt have the extra 1283 * wait. 1284 */ 1285 delay(10); 1286 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1287 break; 1288 } 1289 1290 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1291 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1292 1293 delay(1000); 1294 1295 /* 1296 * If the board has any GPIO reset sequences to issue, do them now. 1297 */ 1298 if (sc->sc_reset != NULL) 1299 (*sc->sc_reset)(sc); 1300 } 1301 1302 /* 1303 * tlp_init: 1304 * 1305 * Initialize the interface. Must be called at splnet(). 1306 */ 1307 int 1308 tlp_init(sc) 1309 struct tulip_softc *sc; 1310 { 1311 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1312 struct tulip_txsoft *txs; 1313 struct tulip_rxsoft *rxs; 1314 int i, error = 0; 1315 1316 /* 1317 * Cancel any pending I/O. 1318 */ 1319 tlp_stop(sc, 0); 1320 1321 /* 1322 * Initialize `opmode' to 0, and call the pre-init routine, if 1323 * any. This is required because the 2114x and some of the 1324 * clones require that the media-related bits in `opmode' be 1325 * set before performing a soft-reset in order to get internal 1326 * chip pathways are correct. Yay! 1327 */ 1328 sc->sc_opmode = 0; 1329 if (sc->sc_preinit != NULL) 1330 (*sc->sc_preinit)(sc); 1331 1332 /* 1333 * Reset the Tulip to a known state. 1334 */ 1335 tlp_reset(sc); 1336 1337 /* 1338 * Initialize the BUSMODE register. 1339 * 1340 * XXX What about read-multiple/read-line/write-line on 1341 * XXX the 21140 and up? 1342 */ 1343 sc->sc_busmode = BUSMODE_BAR; 1344 switch (sc->sc_cacheline) { 1345 default: 1346 /* 1347 * Note: We must *always* set these bits; a cache 1348 * alignment of 0 is RESERVED. 1349 */ 1350 case 8: 1351 sc->sc_busmode |= BUSMODE_CAL_8LW; 1352 break; 1353 case 16: 1354 sc->sc_busmode |= BUSMODE_CAL_16LW; 1355 break; 1356 case 32: 1357 sc->sc_busmode |= BUSMODE_CAL_32LW; 1358 break; 1359 } 1360 switch (sc->sc_chip) { 1361 case TULIP_CHIP_82C168: 1362 case TULIP_CHIP_82C169: 1363 sc->sc_busmode |= BUSMODE_PBL_16LW | BUSMODE_PNIC_MBO; 1364 break; 1365 default: 1366 sc->sc_busmode |= BUSMODE_PBL_DEFAULT; 1367 break; 1368 } 1369 #if BYTE_ORDER == BIG_ENDIAN 1370 /* 1371 * XXX There are reports that this doesn't work properly 1372 * in the old Tulip driver, but BUSMODE_DBO does. However, 1373 * BUSMODE_DBO is not available on the 21040, and requires 1374 * us to byte-swap the setup packet. What to do? 1375 */ 1376 sc->sc_busmode |= BUSMODE_BLE; 1377 #endif 1378 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1379 1380 /* 1381 * Initialize the OPMODE register. We don't write it until 1382 * we're ready to begin the transmit and receive processes. 1383 * 1384 * Media-related OPMODE bits are set in the media callbacks 1385 * for each specific chip/board. 1386 */ 1387 sc->sc_opmode |= OPMODE_SR | OPMODE_ST | 1388 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1389 1390 /* 1391 * Magical mystery initialization on the Macronix chips. 1392 * The MX98713 uses its own magic value, the rest share 1393 * a common one. 1394 */ 1395 switch (sc->sc_chip) { 1396 case TULIP_CHIP_MX98713: 1397 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1398 break; 1399 1400 case TULIP_CHIP_MX98713A: 1401 case TULIP_CHIP_MX98715: 1402 case TULIP_CHIP_MX98725: 1403 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1404 break; 1405 1406 default: 1407 /* Nothing. */ 1408 } 1409 1410 /* 1411 * Initialize the transmit descriptor ring. 1412 */ 1413 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1414 for (i = 0; i < TULIP_NTXDESC; i++) { 1415 sc->sc_txdescs[i].td_ctl = TDCTL_CH; 1416 sc->sc_txdescs[i].td_bufaddr2 = 1417 TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)); 1418 } 1419 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1420 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1421 sc->sc_txfree = TULIP_NTXDESC; 1422 sc->sc_txnext = 0; 1423 1424 /* 1425 * Initialize the transmit job descriptors. 1426 */ 1427 SIMPLEQ_INIT(&sc->sc_txfreeq); 1428 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1429 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1430 txs = &sc->sc_txsoft[i]; 1431 txs->txs_mbuf = NULL; 1432 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1433 } 1434 1435 /* 1436 * Initialize the receive descriptor and receive job 1437 * descriptor rings. 1438 */ 1439 for (i = 0; i < TULIP_NRXDESC; i++) { 1440 rxs = &sc->sc_rxsoft[i]; 1441 if (rxs->rxs_mbuf == NULL) { 1442 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1443 printf("%s: unable to allocate or map rx " 1444 "buffer %d, error = %d\n", 1445 sc->sc_dev.dv_xname, i, error); 1446 /* 1447 * XXX Should attempt to run with fewer receive 1448 * XXX buffers instead of just failing. 1449 */ 1450 tlp_rxdrain(sc); 1451 goto out; 1452 } 1453 } 1454 } 1455 sc->sc_rxptr = 0; 1456 1457 /* 1458 * Initialize the interrupt mask and enable interrupts. 1459 */ 1460 /* normal interrupts */ 1461 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1462 1463 /* abnormal interrupts */ 1464 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1465 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1466 1467 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1468 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1469 1470 switch (sc->sc_chip) { 1471 case TULIP_CHIP_WB89C840F: 1472 /* 1473 * Clear bits that we don't want that happen to 1474 * overlap or don't exist. 1475 */ 1476 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1477 break; 1478 1479 default: 1480 /* Nothing. */ 1481 } 1482 1483 sc->sc_rxint_mask &= sc->sc_inten; 1484 sc->sc_txint_mask &= sc->sc_inten; 1485 1486 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1487 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1488 1489 /* 1490 * Give the transmit and receive rings to the Tulip. 1491 */ 1492 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1493 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1494 1495 /* 1496 * On chips that do this differently, set the station address. 1497 */ 1498 switch (sc->sc_chip) { 1499 case TULIP_CHIP_WB89C840F: 1500 { 1501 /* XXX Do this with stream writes? */ 1502 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1503 1504 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1505 bus_space_write_1(sc->sc_st, sc->sc_sh, 1506 cpa + i, LLADDR(ifp->if_sadl)[i]); 1507 } 1508 break; 1509 } 1510 1511 default: 1512 /* Nothing. */ 1513 } 1514 1515 /* 1516 * Set the receive filter. This will start the transmit and 1517 * receive processes. 1518 */ 1519 (*sc->sc_filter_setup)(sc); 1520 1521 /* 1522 * Set the current media. 1523 */ 1524 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1525 1526 /* 1527 * Start the receive process. 1528 */ 1529 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1530 1531 if (sc->sc_tick != NULL) { 1532 /* Start the one second clock. */ 1533 timeout(sc->sc_tick, sc, hz); 1534 } 1535 1536 /* 1537 * Note that the interface is now running. 1538 */ 1539 ifp->if_flags |= IFF_RUNNING; 1540 ifp->if_flags &= ~IFF_OACTIVE; 1541 1542 out: 1543 if (error) 1544 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1545 return (error); 1546 } 1547 1548 /* 1549 * tlp_rxdrain: 1550 * 1551 * Drain the receive queue. 1552 */ 1553 void 1554 tlp_rxdrain(sc) 1555 struct tulip_softc *sc; 1556 { 1557 struct tulip_rxsoft *rxs; 1558 int i; 1559 1560 for (i = 0; i < TULIP_NRXDESC; i++) { 1561 rxs = &sc->sc_rxsoft[i]; 1562 if (rxs->rxs_mbuf != NULL) { 1563 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1564 m_freem(rxs->rxs_mbuf); 1565 rxs->rxs_mbuf = NULL; 1566 } 1567 } 1568 } 1569 1570 /* 1571 * tlp_stop: 1572 * 1573 * Stop transmission on the interface. 1574 */ 1575 void 1576 tlp_stop(sc, drain) 1577 struct tulip_softc *sc; 1578 int drain; 1579 { 1580 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1581 struct tulip_txsoft *txs; 1582 1583 if (sc->sc_tick != NULL) { 1584 /* Stop the one second clock. */ 1585 untimeout(sc->sc_tick, sc); 1586 } 1587 1588 /* Disable interrupts. */ 1589 TULIP_WRITE(sc, CSR_INTEN, 0); 1590 1591 /* Stop the transmit and receive processes. */ 1592 TULIP_WRITE(sc, CSR_OPMODE, 0); 1593 TULIP_WRITE(sc, CSR_RXLIST, 0); 1594 TULIP_WRITE(sc, CSR_TXLIST, 0); 1595 1596 /* 1597 * Release any queued transmit buffers. 1598 */ 1599 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1600 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1601 if (txs->txs_mbuf != NULL) { 1602 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1603 m_freem(txs->txs_mbuf); 1604 txs->txs_mbuf = NULL; 1605 } 1606 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1607 } 1608 1609 if (drain) { 1610 /* 1611 * Release the receive buffers. 1612 */ 1613 tlp_rxdrain(sc); 1614 } 1615 1616 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 1617 1618 /* 1619 * Mark the interface down and cancel the watchdog timer. 1620 */ 1621 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1622 ifp->if_timer = 0; 1623 } 1624 1625 #define SROM_EMIT(sc, x) \ 1626 do { \ 1627 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 1628 delay(1); \ 1629 } while (0) 1630 1631 /* 1632 * tlp_srom_idle: 1633 * 1634 * Put the SROM in idle state. 1635 */ 1636 void 1637 tlp_srom_idle(sc) 1638 struct tulip_softc *sc; 1639 { 1640 u_int32_t miirom; 1641 int i; 1642 1643 miirom = MIIROM_SR; 1644 SROM_EMIT(sc, miirom); 1645 1646 miirom |= MIIROM_RD; 1647 SROM_EMIT(sc, miirom); 1648 1649 miirom |= MIIROM_SROMCS; 1650 SROM_EMIT(sc, miirom); 1651 1652 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1653 1654 /* Strobe the clock 25 times. */ 1655 for (i = 0; i < 25; i++) { 1656 SROM_EMIT(sc, miirom); 1657 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1658 } 1659 1660 SROM_EMIT(sc, miirom); 1661 1662 miirom &= ~MIIROM_SROMCS; 1663 SROM_EMIT(sc, miirom); 1664 1665 SROM_EMIT(sc, 0); 1666 } 1667 1668 /* 1669 * tlp_read_srom: 1670 * 1671 * Read the Tulip SROM. 1672 */ 1673 void 1674 tlp_read_srom(sc, word, wordcnt, data) 1675 struct tulip_softc *sc; 1676 int word, wordcnt; 1677 u_int16_t *data; 1678 { 1679 u_int32_t miirom; 1680 int i, x; 1681 1682 tlp_srom_idle(sc); 1683 1684 /* Select the SROM. */ 1685 miirom = MIIROM_SR; 1686 SROM_EMIT(sc, miirom); 1687 1688 miirom |= MIIROM_RD; 1689 SROM_EMIT(sc, miirom); 1690 1691 for (i = 0; i < wordcnt; i++) { 1692 /* Send CHIP SELECT for one clock tick. */ 1693 miirom |= MIIROM_SROMCS; 1694 SROM_EMIT(sc, miirom); 1695 1696 /* Shift in the READ opcode. */ 1697 for (x = 3; x > 0; x--) { 1698 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 1699 miirom |= MIIROM_SROMDI; 1700 else 1701 miirom &= ~MIIROM_SROMDI; 1702 SROM_EMIT(sc, miirom); 1703 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1704 SROM_EMIT(sc, miirom); 1705 } 1706 1707 /* Shift in address. */ 1708 for (x = 6; x > 0; x--) { 1709 if ((word + i) & (1 << (x - 1))) 1710 miirom |= MIIROM_SROMDI; 1711 else 1712 miirom &= ~MIIROM_SROMDI; 1713 SROM_EMIT(sc, miirom); 1714 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1715 SROM_EMIT(sc, miirom); 1716 } 1717 1718 /* Shift out data. */ 1719 miirom &= ~MIIROM_SROMDI; 1720 data[i] = 0; 1721 for (x = 16; x > 0; x--) { 1722 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1723 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 1724 data[i] |= (1 << (x - 1)); 1725 SROM_EMIT(sc, miirom); 1726 } 1727 1728 /* Clear CHIP SELECT. */ 1729 miirom &= ~MIIROM_SROMCS; 1730 SROM_EMIT(sc, miirom); 1731 } 1732 1733 /* Deselect the SROM. */ 1734 SROM_EMIT(sc, 0); 1735 1736 /* ...and idle it. */ 1737 tlp_srom_idle(sc); 1738 } 1739 1740 #undef SROM_EMIT 1741 1742 /* 1743 * tlp_add_rxbuf: 1744 * 1745 * Add a receive buffer to the indicated descriptor. 1746 */ 1747 int 1748 tlp_add_rxbuf(sc, idx) 1749 struct tulip_softc *sc; 1750 int idx; 1751 { 1752 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 1753 struct mbuf *m; 1754 int error; 1755 1756 MGETHDR(m, M_DONTWAIT, MT_DATA); 1757 if (m == NULL) 1758 return (ENOBUFS); 1759 1760 MCLGET(m, M_DONTWAIT); 1761 if ((m->m_flags & M_EXT) == 0) { 1762 m_freem(m); 1763 return (ENOBUFS); 1764 } 1765 1766 if (rxs->rxs_mbuf != NULL) 1767 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1768 1769 rxs->rxs_mbuf = m; 1770 1771 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 1772 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 1773 if (error) { 1774 printf("%s: can't load rx DMA map %d, error = %d\n", 1775 sc->sc_dev.dv_xname, idx, error); 1776 panic("tlp_add_rxbuf"); /* XXX */ 1777 } 1778 1779 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1780 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1781 1782 TULIP_INIT_RXDESC(sc, idx); 1783 1784 return (0); 1785 } 1786 1787 /* 1788 * tlp_crc32: 1789 * 1790 * Compute the 32-bit CRC of the provided buffer. 1791 */ 1792 u_int32_t 1793 tlp_crc32(buf, len) 1794 const u_int8_t *buf; 1795 size_t len; 1796 { 1797 static const u_int32_t crctab[] = { 1798 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 1799 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, 1800 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 1801 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c 1802 }; 1803 u_int32_t crc; 1804 int i; 1805 1806 crc = 0xffffffff; 1807 for (i = 0; i < len; i++) { 1808 crc ^= buf[i]; 1809 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1810 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1811 } 1812 return (crc); 1813 } 1814 1815 /* 1816 * tlp_srom_crcok: 1817 * 1818 * Check the CRC of the Tulip SROM. 1819 */ 1820 int 1821 tlp_srom_crcok(romdata) 1822 const u_int8_t *romdata; 1823 { 1824 u_int32_t crc; 1825 1826 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM); 1827 crc = (crc & 0xffff) ^ 0xffff; 1828 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 1829 return (1); 1830 return (0); 1831 } 1832 1833 /* 1834 * tlp_isv_srom: 1835 * 1836 * Check to see if the SROM is in the new standardized format. 1837 */ 1838 int 1839 tlp_isv_srom(romdata) 1840 const u_int8_t *romdata; 1841 { 1842 int i; 1843 u_int16_t cksum; 1844 1845 if (tlp_srom_crcok(romdata)) { 1846 /* 1847 * SROM CRC checks out; must be in the new format. 1848 */ 1849 return (1); 1850 } 1851 1852 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); 1853 if (cksum == 0xffff || cksum == 0) { 1854 /* 1855 * No checksum present. Check the SROM ID; 18 bytes of 0 1856 * followed by 1 (version) followed by the number of 1857 * adapters which use this SROM (should be non-zero). 1858 */ 1859 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { 1860 if (romdata[i] != 0) 1861 return (0); 1862 } 1863 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) 1864 return (0); 1865 if (romdata[TULIP_ROM_CHIP_COUNT] == 0) 1866 return (0); 1867 return (1); 1868 } 1869 1870 return (0); 1871 } 1872 1873 /* 1874 * tlp_isv_srom_enaddr: 1875 * 1876 * Get the Ethernet address from an ISV SROM. 1877 */ 1878 int 1879 tlp_isv_srom_enaddr(sc, enaddr) 1880 struct tulip_softc *sc; 1881 u_int8_t *enaddr; 1882 { 1883 int i, devcnt; 1884 1885 if (tlp_isv_srom(sc->sc_srom) == 0) 1886 return (0); 1887 1888 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 1889 for (i = 0; i < devcnt; i++) { 1890 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 1891 break; 1892 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 1893 sc->sc_devno) 1894 break; 1895 } 1896 1897 if (i == devcnt) 1898 return (0); 1899 1900 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], 1901 ETHER_ADDR_LEN); 1902 enaddr[5] += i; 1903 1904 return (1); 1905 } 1906 1907 /* 1908 * tlp_parse_old_srom: 1909 * 1910 * Parse old-format SROMs. 1911 * 1912 * This routine is largely lifted from Matt Thomas's `de' driver. 1913 */ 1914 int 1915 tlp_parse_old_srom(sc, enaddr) 1916 struct tulip_softc *sc; 1917 u_int8_t *enaddr; 1918 { 1919 static const u_int8_t testpat[] = 1920 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 1921 int i; 1922 u_int32_t cksum; 1923 1924 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 1925 /* 1926 * Some vendors (e.g. ZNYX) don't use the standard 1927 * DEC Address ROM format, but rather just have an 1928 * Ethernet address in the first 6 bytes, maybe a 1929 * 2 byte checksum, and then all 0xff's. 1930 */ 1931 for (i = 8; i < 32; i++) { 1932 if (sc->sc_srom[i] != 0xff) 1933 return (0); 1934 } 1935 1936 /* 1937 * Sanity check the Ethernet address: 1938 * 1939 * - Make sure it's not multicast or locally 1940 * assigned 1941 * - Make sure it has a non-0 OUI 1942 */ 1943 if (sc->sc_srom[0] & 3) 1944 return (0); 1945 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 1946 sc->sc_srom[2] == 0) 1947 return (0); 1948 1949 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1950 return (1); 1951 } 1952 1953 /* 1954 * Standard DEC Address ROM test. 1955 */ 1956 1957 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 1958 return (0); 1959 1960 for (i = 0; i < 8; i++) { 1961 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 1962 return (0); 1963 } 1964 1965 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1966 1967 cksum = *(u_int16_t *) &enaddr[0]; 1968 1969 cksum <<= 1; 1970 if (cksum > 0xffff) 1971 cksum -= 0xffff; 1972 1973 cksum += *(u_int16_t *) &enaddr[2]; 1974 if (cksum > 0xffff) 1975 cksum -= 0xffff; 1976 1977 cksum <<= 1; 1978 if (cksum > 0xffff) 1979 cksum -= 0xffff; 1980 1981 cksum += *(u_int16_t *) &enaddr[4]; 1982 if (cksum >= 0xffff) 1983 cksum -= 0xffff; 1984 1985 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 1986 return (0); 1987 1988 return (1); 1989 } 1990 1991 /* 1992 * tlp_filter_setup: 1993 * 1994 * Set the Tulip's receive filter. 1995 */ 1996 void 1997 tlp_filter_setup(sc) 1998 struct tulip_softc *sc; 1999 { 2000 struct ethercom *ec = &sc->sc_ethercom; 2001 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2002 struct ether_multi *enm; 2003 struct ether_multistep step; 2004 __volatile u_int32_t *sp; 2005 u_int8_t enaddr[ETHER_ADDR_LEN]; 2006 u_int32_t hash; 2007 int cnt; 2008 2009 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 2010 sc->sc_dev.dv_xname, sc->sc_flags)); 2011 2012 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 2013 2014 /* 2015 * If there are transmissions pending, wait until they have 2016 * completed. 2017 */ 2018 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 2019 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 2020 sc->sc_flags |= TULIPF_WANT_SETUP; 2021 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 2022 sc->sc_dev.dv_xname)); 2023 return; 2024 } 2025 sc->sc_flags &= ~TULIPF_WANT_SETUP; 2026 2027 /* 2028 * If we're running, idle the transmit and receive engines. If 2029 * we're NOT running, we're being called from tlp_init(), and our 2030 * writing OPMODE will start the transmit and receive processes 2031 * in motion. 2032 */ 2033 if (ifp->if_flags & IFF_RUNNING) { 2034 /* 2035 * Actually, some chips seem to need a really hard 2036 * kick in the head for this to work. The genuine 2037 * DEC chips can just be idled, but some of the 2038 * clones seem to REALLY want a reset here. Doing 2039 * the reset will end up here again, but with 2040 * IFF_RUNNING cleared. 2041 */ 2042 switch (sc->sc_chip) { 2043 case TULIP_CHIP_82C168: 2044 case TULIP_CHIP_82C169: 2045 tlp_init(sc); 2046 return; 2047 2048 default: 2049 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2050 } 2051 } 2052 2053 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2054 2055 if (ifp->if_flags & IFF_PROMISC) { 2056 sc->sc_opmode |= OPMODE_PR; 2057 goto allmulti; 2058 } 2059 2060 /* 2061 * Try Perfect filtering first. 2062 */ 2063 2064 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2065 sp = TULIP_CDSP(sc); 2066 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2067 cnt = 0; 2068 ETHER_FIRST_MULTI(step, ec, enm); 2069 while (enm != NULL) { 2070 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2071 /* 2072 * We must listen to a range of multicast addresses. 2073 * For now, just accept all multicasts, rather than 2074 * trying to set only those filter bits needed to match 2075 * the range. (At this time, the only use of address 2076 * ranges is for IP multicast routing, for which the 2077 * range is big enough to require all bits set.) 2078 */ 2079 goto allmulti; 2080 } 2081 if (cnt == (TULIP_MAXADDRS - 2)) { 2082 /* 2083 * We already have our multicast limit (still need 2084 * our station address and broadcast). Go to 2085 * Hash-Perfect mode. 2086 */ 2087 goto hashperfect; 2088 } 2089 *sp++ = ((u_int16_t *) enm->enm_addrlo)[0]; 2090 *sp++ = ((u_int16_t *) enm->enm_addrlo)[1]; 2091 *sp++ = ((u_int16_t *) enm->enm_addrlo)[2]; 2092 ETHER_NEXT_MULTI(step, enm); 2093 } 2094 2095 if (ifp->if_flags & IFF_BROADCAST) { 2096 /* ...and the broadcast address. */ 2097 cnt++; 2098 *sp++ = 0xffff; 2099 *sp++ = 0xffff; 2100 *sp++ = 0xffff; 2101 } 2102 2103 /* Pad the rest with our station address. */ 2104 for (; cnt < TULIP_MAXADDRS; cnt++) { 2105 *sp++ = ((u_int16_t *) enaddr)[0]; 2106 *sp++ = ((u_int16_t *) enaddr)[1]; 2107 *sp++ = ((u_int16_t *) enaddr)[2]; 2108 } 2109 ifp->if_flags &= ~IFF_ALLMULTI; 2110 goto setit; 2111 2112 hashperfect: 2113 /* 2114 * Try Hash-Perfect mode. 2115 */ 2116 2117 /* 2118 * Some 21140 chips have broken Hash-Perfect modes. On these 2119 * chips, we simply use Hash-Only mode, and put our station 2120 * address into the filter. 2121 */ 2122 if (sc->sc_chip == TULIP_CHIP_21140) 2123 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2124 else 2125 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2126 sp = TULIP_CDSP(sc); 2127 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2128 ETHER_FIRST_MULTI(step, ec, enm); 2129 while (enm != NULL) { 2130 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2131 /* 2132 * We must listen to a range of multicast addresses. 2133 * For now, just accept all multicasts, rather than 2134 * trying to set only those filter bits needed to match 2135 * the range. (At this time, the only use of address 2136 * ranges is for IP multicast routing, for which the 2137 * range is big enough to require all bits set.) 2138 */ 2139 goto allmulti; 2140 } 2141 hash = tlp_mchash(enm->enm_addrlo); 2142 sp[hash >> 4] |= 1 << (hash & 0xf); 2143 ETHER_NEXT_MULTI(step, enm); 2144 } 2145 2146 if (ifp->if_flags & IFF_BROADCAST) { 2147 /* ...and the broadcast address. */ 2148 hash = tlp_mchash(etherbroadcastaddr); 2149 sp[hash >> 4] |= 1 << (hash & 0xf); 2150 } 2151 2152 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2153 /* ...and our station address. */ 2154 hash = tlp_mchash(enaddr); 2155 sp[hash >> 4] |= 1 << (hash & 0xf); 2156 } else { 2157 /* 2158 * Hash-Perfect mode; put our station address after 2159 * the hash table. 2160 */ 2161 sp[39] = ((u_int16_t *) enaddr)[0]; 2162 sp[40] = ((u_int16_t *) enaddr)[1]; 2163 sp[41] = ((u_int16_t *) enaddr)[2]; 2164 } 2165 ifp->if_flags &= ~IFF_ALLMULTI; 2166 goto setit; 2167 2168 allmulti: 2169 /* 2170 * Use Perfect filter mode. First address is the broadcast address, 2171 * and pad the rest with our station address. We'll set Pass-all- 2172 * multicast in OPMODE below. 2173 */ 2174 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2175 sp = TULIP_CDSP(sc); 2176 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2177 cnt = 0; 2178 if (ifp->if_flags & IFF_BROADCAST) { 2179 cnt++; 2180 *sp++ = 0xffff; 2181 *sp++ = 0xffff; 2182 *sp++ = 0xffff; 2183 } 2184 for (; cnt < TULIP_MAXADDRS; cnt++) { 2185 *sp++ = ((u_int16_t *) enaddr)[0]; 2186 *sp++ = ((u_int16_t *) enaddr)[1]; 2187 *sp++ = ((u_int16_t *) enaddr)[2]; 2188 } 2189 ifp->if_flags |= IFF_ALLMULTI; 2190 2191 setit: 2192 if (ifp->if_flags & IFF_ALLMULTI) 2193 sc->sc_opmode |= OPMODE_PM; 2194 2195 /* Sync the setup packet buffer. */ 2196 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2197 2198 /* 2199 * Fill in the setup packet descriptor. 2200 */ 2201 sc->sc_setup_desc.td_bufaddr1 = TULIP_CDSPADDR(sc); 2202 sc->sc_setup_desc.td_bufaddr2 = TULIP_CDTXADDR(sc, sc->sc_txnext); 2203 sc->sc_setup_desc.td_ctl = 2204 (TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2205 sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS | 2206 TDCTL_Tx_IC | TDCTL_CH; 2207 sc->sc_setup_desc.td_status = TDSTAT_OWN; 2208 TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2209 2210 /* 2211 * Write the address of the setup descriptor. This also has 2212 * the side effect of giving the transmit ring to the chip, 2213 * since the setup descriptor points to the next available 2214 * descriptor in the ring. 2215 */ 2216 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc)); 2217 2218 /* 2219 * Set the OPMODE register. This will also resume the 2220 * transmit transmit process we idled above. 2221 */ 2222 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2223 2224 sc->sc_flags |= TULIPF_DOING_SETUP; 2225 2226 /* 2227 * Kick the transmitter; this will cause the Tulip to 2228 * read the setup descriptor. 2229 */ 2230 /* XXX USE AUTOPOLLING? */ 2231 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2232 2233 /* Set up a watchdog timer in case the chip flakes out. */ 2234 ifp->if_timer = 5; 2235 2236 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2237 } 2238 2239 /* 2240 * tlp_winb_filter_setup: 2241 * 2242 * Set the Winbond 89C840F's receive filter. 2243 */ 2244 void 2245 tlp_winb_filter_setup(sc) 2246 struct tulip_softc *sc; 2247 { 2248 struct ethercom *ec = &sc->sc_ethercom; 2249 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2250 struct ether_multi *enm; 2251 struct ether_multistep step; 2252 u_int32_t hash, mchash[2]; 2253 2254 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2255 sc->sc_dev.dv_xname, sc->sc_flags)); 2256 2257 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2258 2259 if (ifp->if_flags & IFF_MULTICAST) 2260 sc->sc_opmode |= OPMODE_WINB_AMP; 2261 2262 if (ifp->if_flags & IFF_BROADCAST) 2263 sc->sc_opmode |= OPMODE_WINB_ABP; 2264 2265 if (ifp->if_flags & IFF_PROMISC) { 2266 sc->sc_opmode |= OPMODE_WINB_APP; 2267 goto allmulti; 2268 } 2269 2270 mchash[0] = mchash[1] = 0; 2271 2272 ETHER_FIRST_MULTI(step, ec, enm); 2273 while (enm != NULL) { 2274 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2275 /* 2276 * We must listen to a range of multicast addresses. 2277 * For now, just accept all multicasts, rather than 2278 * trying to set only those filter bits needed to match 2279 * the range. (At this time, the only use of address 2280 * ranges is for IP multicast routing, for which the 2281 * range is big enough to require all bits set.) 2282 */ 2283 goto allmulti; 2284 } 2285 2286 /* 2287 * According to the FreeBSD `wb' driver, yes, you 2288 * really do invert the hash. 2289 */ 2290 hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2291 & 0x3f; 2292 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2293 ETHER_NEXT_MULTI(step, enm); 2294 } 2295 ifp->if_flags &= ~IFF_ALLMULTI; 2296 goto setit; 2297 2298 allmulti: 2299 ifp->if_flags |= IFF_ALLMULTI; 2300 mchash[0] = mchash[1] = 0xffffffff; 2301 2302 setit: 2303 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2304 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2305 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2306 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2307 sc->sc_dev.dv_xname)); 2308 } 2309 2310 /* 2311 * tlp_idle: 2312 * 2313 * Cause the transmit and/or receive processes to go idle. 2314 */ 2315 void 2316 tlp_idle(sc, bits) 2317 struct tulip_softc *sc; 2318 u_int32_t bits; 2319 { 2320 static const char *tx_state_names[] = { 2321 "STOPPED", 2322 "RUNNING - FETCH", 2323 "RUNNING - WAIT", 2324 "RUNNING - READING", 2325 "-- RESERVED --", 2326 "RUNNING - SETUP", 2327 "SUSPENDED", 2328 "RUNNING - CLOSE", 2329 }; 2330 static const char *rx_state_names[] = { 2331 "STOPPED", 2332 "RUNNING - FETCH", 2333 "RUNNING - CHECK", 2334 "RUNNING - WAIT", 2335 "SUSPENDED", 2336 "RUNNING - CLOSE", 2337 "RUNNING - FLUSH", 2338 "RUNNING - QUEUE", 2339 }; 2340 u_int32_t csr, ackmask = 0; 2341 int i; 2342 2343 if (bits & OPMODE_ST) 2344 ackmask |= STATUS_TPS; 2345 2346 if (bits & OPMODE_SR) 2347 ackmask |= STATUS_RPS; 2348 2349 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2350 2351 for (i = 0; i < 1000; i++) { 2352 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2353 break; 2354 delay(10); 2355 } 2356 2357 csr = TULIP_READ(sc, CSR_STATUS); 2358 if ((csr & ackmask) != ackmask) { 2359 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2360 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2361 printf("%s: transmit process failed to idle: " 2362 "state %s\n", sc->sc_dev.dv_xname, 2363 tx_state_names[(csr & STATUS_TS) >> 20]); 2364 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2365 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2366 printf("%s: receive process failed to idle: " 2367 "state %s\n", sc->sc_dev.dv_xname, 2368 rx_state_names[(csr & STATUS_RS) >> 17]); 2369 } 2370 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2371 } 2372 2373 /***************************************************************************** 2374 * Generic media support functions. 2375 *****************************************************************************/ 2376 2377 /* 2378 * tlp_mediastatus: [ifmedia interface function] 2379 * 2380 * Query the current media. 2381 */ 2382 void 2383 tlp_mediastatus(ifp, ifmr) 2384 struct ifnet *ifp; 2385 struct ifmediareq *ifmr; 2386 { 2387 struct tulip_softc *sc = ifp->if_softc; 2388 2389 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2390 } 2391 2392 /* 2393 * tlp_mediachange: [ifmedia interface function] 2394 * 2395 * Update the current media. 2396 */ 2397 int 2398 tlp_mediachange(ifp) 2399 struct ifnet *ifp; 2400 { 2401 struct tulip_softc *sc = ifp->if_softc; 2402 2403 return ((*sc->sc_mediasw->tmsw_set)(sc)); 2404 } 2405 2406 /***************************************************************************** 2407 * Support functions for MII-attached media. 2408 *****************************************************************************/ 2409 2410 /* 2411 * tlp_mii_tick: 2412 * 2413 * One second timer, used to tick the MII. 2414 */ 2415 void 2416 tlp_mii_tick(arg) 2417 void *arg; 2418 { 2419 struct tulip_softc *sc = arg; 2420 int s; 2421 2422 s = splnet(); 2423 mii_tick(&sc->sc_mii); 2424 splx(s); 2425 2426 timeout(sc->sc_tick, sc, hz); 2427 } 2428 2429 /* 2430 * tlp_mii_statchg: [mii interface function] 2431 * 2432 * Callback from PHY when media changes. 2433 */ 2434 void 2435 tlp_mii_statchg(self) 2436 struct device *self; 2437 { 2438 struct tulip_softc *sc = (struct tulip_softc *)self; 2439 2440 /* Idle the transmit and receive processes. */ 2441 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2442 2443 /* 2444 * XXX What about Heartbeat Disable? Is it magically frobbed 2445 * XXX by the PHY? I hope so... 2446 */ 2447 2448 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 2449 2450 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 2451 sc->sc_opmode |= OPMODE_TTM; 2452 2453 if (sc->sc_mii.mii_media_active & IFM_FDX) 2454 sc->sc_opmode |= OPMODE_FD; 2455 2456 /* 2457 * Write new OPMODE bits. This also restarts the transmit 2458 * and receive processes. 2459 */ 2460 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2461 2462 /* XXX Update ifp->if_baudrate */ 2463 } 2464 2465 /* 2466 * tlp_winb_mii_statchg: [mii interface function] 2467 * 2468 * Callback from PHY when media changes. This version is 2469 * for the Winbond 89C840F, which has different OPMODE bits. 2470 */ 2471 void 2472 tlp_winb_mii_statchg(self) 2473 struct device *self; 2474 { 2475 struct tulip_softc *sc = (struct tulip_softc *)self; 2476 2477 /* Idle the transmit and receive processes. */ 2478 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2479 2480 /* 2481 * XXX What about Heartbeat Disable? Is it magically frobbed 2482 * XXX by the PHY? I hope so... 2483 */ 2484 2485 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 2486 2487 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 2488 sc->sc_opmode |= OPMODE_WINB_FES; 2489 2490 if (sc->sc_mii.mii_media_active & IFM_FDX) 2491 sc->sc_opmode |= OPMODE_FD; 2492 2493 /* 2494 * Write new OPMODE bits. This also restarts the transmit 2495 * and receive processes. 2496 */ 2497 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2498 2499 /* XXX Update ifp->if_baudrate */ 2500 } 2501 2502 /* 2503 * tlp_mii_getmedia: 2504 * 2505 * Callback from ifmedia to request current media status. 2506 */ 2507 void 2508 tlp_mii_getmedia(sc, ifmr) 2509 struct tulip_softc *sc; 2510 struct ifmediareq *ifmr; 2511 { 2512 2513 mii_pollstat(&sc->sc_mii); 2514 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2515 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2516 } 2517 2518 /* 2519 * tlp_mii_setmedia: 2520 * 2521 * Callback from ifmedia to request new media setting. 2522 */ 2523 int 2524 tlp_mii_setmedia(sc) 2525 struct tulip_softc *sc; 2526 { 2527 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2528 2529 if (ifp->if_flags & IFF_UP) 2530 mii_mediachg(&sc->sc_mii); 2531 return (0); 2532 } 2533 2534 #define MII_EMIT(sc, x) \ 2535 do { \ 2536 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2537 delay(1); \ 2538 } while (0) 2539 2540 /* 2541 * tlp_sio_mii_sync: 2542 * 2543 * Synchronize the SIO-attached MII. 2544 */ 2545 void 2546 tlp_sio_mii_sync(sc) 2547 struct tulip_softc *sc; 2548 { 2549 u_int32_t miirom; 2550 int i; 2551 2552 miirom = MIIROM_MDO; 2553 2554 MII_EMIT(sc, miirom); 2555 for (i = 0; i < 32; i++) { 2556 MII_EMIT(sc, miirom | MIIROM_MDC); 2557 MII_EMIT(sc, miirom); 2558 } 2559 } 2560 2561 /* 2562 * tlp_sio_mii_sendbits: 2563 * 2564 * Send a series of bits out the SIO to the MII. 2565 */ 2566 void 2567 tlp_sio_mii_sendbits(sc, data, nbits) 2568 struct tulip_softc *sc; 2569 u_int32_t data; 2570 int nbits; 2571 { 2572 u_int32_t miirom, i; 2573 2574 miirom = 0; 2575 MII_EMIT(sc, miirom); 2576 2577 for (i = 1 << (nbits - 1); i != 0; i >>= 1) { 2578 if (data & i) 2579 miirom |= MIIROM_MDO; 2580 else 2581 miirom &= ~MIIROM_MDO; 2582 MII_EMIT(sc, miirom); 2583 MII_EMIT(sc, miirom|MIIROM_MDC); 2584 MII_EMIT(sc, miirom); 2585 } 2586 } 2587 2588 /* 2589 * tlp_sio_mii_readreg: 2590 * 2591 * Read a PHY register via SIO-attached MII. 2592 */ 2593 int 2594 tlp_sio_mii_readreg(self, phy, reg) 2595 struct device *self; 2596 int phy, reg; 2597 { 2598 struct tulip_softc *sc = (void *) self; 2599 int val = 0, err = 0, i; 2600 2601 tlp_sio_mii_sync(sc); 2602 2603 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2604 tlp_sio_mii_sendbits(sc, MII_COMMAND_READ, 2); 2605 tlp_sio_mii_sendbits(sc, phy, 5); 2606 tlp_sio_mii_sendbits(sc, reg, 5); 2607 2608 /* Switch direction to PHY->host, without a clock transition. */ 2609 MII_EMIT(sc, MIIROM_MIIDIR); 2610 2611 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2612 MII_EMIT(sc, MIIROM_MIIDIR); 2613 2614 err = TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI); 2615 2616 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2617 MII_EMIT(sc, MIIROM_MIIDIR); 2618 2619 for (i = 0; i < 16; i++) { 2620 val <<= 1; 2621 /* Read data prior to clock low-high transition. */ 2622 if (err == 0 && TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI)) 2623 val |= 1; 2624 2625 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2626 MII_EMIT(sc, MIIROM_MIIDIR); 2627 } 2628 2629 /* Set direction to host->PHY, without a clock transition. */ 2630 MII_EMIT(sc, 0); 2631 2632 return (err ? 0 : val); 2633 } 2634 2635 /* 2636 * tlp_sio_mii_writereg: 2637 * 2638 * Write a PHY register via SIO-attached MII. 2639 */ 2640 void 2641 tlp_sio_mii_writereg(self, phy, reg, val) 2642 struct device *self; 2643 int phy, reg, val; 2644 { 2645 struct tulip_softc *sc = (void *) self; 2646 2647 tlp_sio_mii_sync(sc); 2648 2649 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2650 tlp_sio_mii_sendbits(sc, MII_COMMAND_WRITE, 2); 2651 tlp_sio_mii_sendbits(sc, phy, 5); 2652 tlp_sio_mii_sendbits(sc, reg, 5); 2653 tlp_sio_mii_sendbits(sc, MII_COMMAND_ACK, 2); 2654 tlp_sio_mii_sendbits(sc, val, 16); 2655 2656 MII_EMIT(sc, 0); 2657 } 2658 2659 #undef MII_EMIT 2660 2661 /* 2662 * tlp_pnic_mii_readreg: 2663 * 2664 * Read a PHY register on the Lite-On PNIC. 2665 */ 2666 int 2667 tlp_pnic_mii_readreg(self, phy, reg) 2668 struct device *self; 2669 int phy, reg; 2670 { 2671 struct tulip_softc *sc = (void *) self; 2672 u_int32_t val; 2673 int i; 2674 2675 TULIP_WRITE(sc, CSR_PNIC_MII, 2676 PNIC_MII_MBO | PNIC_MII_RESERVED | 2677 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 2678 (reg << PNIC_MII_REGSHIFT)); 2679 2680 for (i = 0; i < 1000; i++) { 2681 delay(10); 2682 val = TULIP_READ(sc, CSR_PNIC_MII); 2683 if ((val & PNIC_MII_BUSY) == 0) { 2684 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 2685 return (0); 2686 else 2687 return (val & PNIC_MII_DATA); 2688 } 2689 } 2690 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 2691 return (0); 2692 } 2693 2694 /* 2695 * tlp_pnic_mii_writereg: 2696 * 2697 * Write a PHY register on the Lite-On PNIC. 2698 */ 2699 void 2700 tlp_pnic_mii_writereg(self, phy, reg, val) 2701 struct device *self; 2702 int phy, reg, val; 2703 { 2704 struct tulip_softc *sc = (void *) self; 2705 int i; 2706 2707 TULIP_WRITE(sc, CSR_PNIC_MII, 2708 PNIC_MII_MBO | PNIC_MII_RESERVED | 2709 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 2710 (reg << PNIC_MII_REGSHIFT) | val); 2711 2712 for (i = 0; i < 1000; i++) { 2713 delay(10); 2714 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 2715 return; 2716 } 2717 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 2718 } 2719 2720 /***************************************************************************** 2721 * Chip-specific pre-init and reset functions. 2722 *****************************************************************************/ 2723 2724 /* 2725 * tlp_2114x_preinit: 2726 * 2727 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 2728 */ 2729 void 2730 tlp_2114x_preinit(sc) 2731 struct tulip_softc *sc; 2732 { 2733 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2734 struct tulip_2114x_media *tm = ife->ifm_aux; 2735 2736 /* 2737 * Always set the Must-Be-One bit. 2738 */ 2739 sc->sc_opmode |= OPMODE_MBO; 2740 2741 if (tm != NULL && 2742 (tm->tm_type == TULIP_ROM_MB_21140_MII || 2743 tm->tm_type == TULIP_ROM_MB_21142_MII)) { 2744 /* 2745 * MII case: just set the port-select bit; we will never 2746 * be called during a media change. 2747 */ 2748 sc->sc_opmode |= OPMODE_PS; 2749 goto set_opmode; 2750 } 2751 2752 /* 2753 * ENDEC/PCS mode; set according to selected media type. 2754 * XXX Auto-sense not supported yet. 2755 */ 2756 sc->sc_opmode |= tm->tm_opmode; 2757 2758 set_opmode: 2759 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2760 } 2761 2762 /* 2763 * tlp_pnic_preinit: 2764 * 2765 * Pre-init function for the Lite-On 82c168 and 82c169. 2766 */ 2767 void 2768 tlp_pnic_preinit(sc) 2769 struct tulip_softc *sc; 2770 { 2771 2772 if (sc->sc_flags & TULIPF_HAS_MII) { 2773 /* 2774 * MII case: just set the port-select bit; we will never 2775 * be called during a media change. 2776 */ 2777 sc->sc_opmode |= OPMODE_PS; 2778 } else { 2779 /* 2780 * ENDEC/PCS/Nway mode; enable the Tx backoff counter. 2781 */ 2782 sc->sc_opmode |= OPMODE_PNIC_TBEN; 2783 } 2784 } 2785 2786 /* 2787 * tlp_21140_reset: 2788 * 2789 * Issue a reset sequence on the 21140 via the GPIO facility. 2790 */ 2791 void 2792 tlp_21140_reset(sc) 2793 struct tulip_softc *sc; 2794 { 2795 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2796 struct tulip_2114x_media *tm = ife->ifm_aux; 2797 int i; 2798 2799 /* First, set the direction on the GPIO pins. */ 2800 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 2801 2802 /* Now, issue the reset sequence. */ 2803 for (i = 0; i < tm->tm_reset_length; i++) { 2804 delay(10); 2805 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]); 2806 } 2807 2808 /* Now, issue the selection sequence. */ 2809 for (i = 0; i < tm->tm_gp_length; i++) { 2810 delay(10); 2811 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]); 2812 } 2813 2814 /* If there were no sequences, just lower the pins. */ 2815 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) 2816 TULIP_WRITE(sc, CSR_GPP, 0); 2817 } 2818 2819 /***************************************************************************** 2820 * Chip/board-specific media switches. The ones here are ones that 2821 * are potentially common to multiple front-ends. 2822 *****************************************************************************/ 2823 2824 /* 2825 * 21040 and 21041 media switches. 2826 */ 2827 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 2828 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 2829 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 2830 void tlp_21041_tmsw_init __P((struct tulip_softc *)); 2831 void tlp_21040_21041_tmsw_get __P((struct tulip_softc *, 2832 struct ifmediareq *)); 2833 int tlp_21040_21041_tmsw_set __P((struct tulip_softc *)); 2834 2835 const struct tulip_mediasw tlp_21040_mediasw = { 2836 tlp_21040_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2837 }; 2838 2839 const struct tulip_mediasw tlp_21040_tp_mediasw = { 2840 tlp_21040_tp_tmsw_init, tlp_21040_21041_tmsw_get, 2841 tlp_21040_21041_tmsw_set 2842 }; 2843 2844 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 2845 tlp_21040_auibnc_tmsw_init, tlp_21040_21041_tmsw_get, 2846 tlp_21040_21041_tmsw_set 2847 }; 2848 2849 const struct tulip_mediasw tlp_21041_mediasw = { 2850 tlp_21041_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2851 }; 2852 2853 #define ADD(m, t) ifmedia_add(&sc->sc_mii.mii_media, (m), 0, (t)) 2854 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 2855 2856 void 2857 tlp_21040_tmsw_init(sc) 2858 struct tulip_softc *sc; 2859 { 2860 struct tulip_21040_21041_sia_media *tsm; 2861 const char *sep = ""; 2862 2863 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2864 tlp_mediastatus); 2865 2866 printf("%s: ", sc->sc_dev.dv_xname); 2867 2868 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2869 M_WAITOK); 2870 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2871 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2872 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2873 ADD(IFM_ETHER|IFM_10_T, tsm); 2874 PRINT("10baseT"); 2875 2876 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2877 M_WAITOK); 2878 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2879 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2880 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2881 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2882 PRINT("10baseT-FDX"); 2883 2884 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2885 M_WAITOK); 2886 tsm->tsm_siaconn = SIACONN_21040_AUI; 2887 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2888 tsm->tsm_siagen = SIAGEN_21040_AUI; 2889 ADD(IFM_ETHER|IFM_10_5, tsm); 2890 PRINT("10base5"); 2891 2892 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2893 M_WAITOK); 2894 tsm->tsm_siaconn = SIACONN_21040_EXTSIA; 2895 tsm->tsm_siatxrx = SIATXRX_21040_EXTSIA; 2896 tsm->tsm_siagen = SIAGEN_21040_EXTSIA; 2897 ADD(IFM_ETHER|IFM_MANUAL, tsm); 2898 PRINT("manual"); 2899 2900 /* 2901 * XXX Autosense not yet supported. 2902 */ 2903 2904 /* XXX This should be auto-sense. */ 2905 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2906 printf(", default 10baseT"); 2907 2908 printf("\n"); 2909 } 2910 2911 void 2912 tlp_21040_tp_tmsw_init(sc) 2913 struct tulip_softc *sc; 2914 { 2915 struct tulip_21040_21041_sia_media *tsm; 2916 const char *sep = ""; 2917 2918 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2919 tlp_mediastatus); 2920 2921 printf("%s: ", sc->sc_dev.dv_xname); 2922 2923 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2924 M_WAITOK); 2925 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2926 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2927 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2928 ADD(IFM_ETHER|IFM_10_T, tsm); 2929 PRINT("10baseT"); 2930 2931 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2932 M_WAITOK); 2933 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2934 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2935 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2936 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2937 PRINT("10baseT-FDX"); 2938 2939 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2940 printf(", default 10baseT"); 2941 2942 printf("\n"); 2943 } 2944 2945 void 2946 tlp_21040_auibnc_tmsw_init(sc) 2947 struct tulip_softc *sc; 2948 { 2949 struct tulip_21040_21041_sia_media *tsm; 2950 const char *sep = ""; 2951 2952 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2953 tlp_mediastatus); 2954 2955 printf("%s: ", sc->sc_dev.dv_xname); 2956 2957 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2958 M_WAITOK); 2959 tsm->tsm_siaconn = SIACONN_21040_AUI; 2960 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2961 tsm->tsm_siagen = SIAGEN_21040_AUI; 2962 ADD(IFM_ETHER|IFM_10_5, tsm); 2963 PRINT("10base5"); 2964 2965 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 2966 2967 printf("\n"); 2968 } 2969 2970 void 2971 tlp_21041_tmsw_init(sc) 2972 struct tulip_softc *sc; 2973 { 2974 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt; 2975 struct tulip_21040_21041_sia_media *tsm; 2976 const char *sep = "", *defstr; 2977 u_int16_t romdef; 2978 u_int8_t mb; 2979 2980 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2981 tlp_mediastatus); 2982 2983 printf("%s: ", sc->sc_dev.dv_xname); 2984 2985 if (tlp_isv_srom(sc->sc_srom) == 0) 2986 goto not_isv_srom; 2987 2988 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 2989 for (i = 0; i < devcnt; i++) { 2990 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 2991 break; 2992 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 2993 sc->sc_devno) 2994 break; 2995 } 2996 2997 if (i == devcnt) 2998 goto not_isv_srom; 2999 3000 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 3001 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 3002 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE; 3003 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 3004 3005 for (; m_cnt != 0; 3006 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) { 3007 mb = sc->sc_srom[mb_offset]; 3008 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), 3009 M_DEVBUF, M_WAITOK); 3010 switch (mb & TULIP_ROM_MB_MEDIA_CODE) { 3011 case TULIP_ROM_MB_MEDIA_TP: 3012 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 3013 TULIP_ROM_GETW(sc->sc_srom, 3014 mb_offset + TULIP_ROM_MB_CSR13) : 3015 SIACONN_21041_10BASET; 3016 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 3017 TULIP_ROM_GETW(sc->sc_srom, 3018 mb_offset + TULIP_ROM_MB_CSR14) : 3019 SIATXRX_21041_10BASET; 3020 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 3021 TULIP_ROM_GETW(sc->sc_srom, 3022 mb_offset + TULIP_ROM_MB_CSR15) : 3023 SIAGEN_21041_10BASET; 3024 ADD(IFM_ETHER|IFM_10_T, tsm); 3025 PRINT("10baseT"); 3026 break; 3027 3028 case TULIP_ROM_MB_MEDIA_BNC: 3029 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 3030 TULIP_ROM_GETW(sc->sc_srom, 3031 mb_offset + TULIP_ROM_MB_CSR13) : 3032 SIACONN_21041_BNC; 3033 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 3034 TULIP_ROM_GETW(sc->sc_srom, 3035 mb_offset + TULIP_ROM_MB_CSR14) : 3036 SIATXRX_21041_BNC; 3037 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 3038 TULIP_ROM_GETW(sc->sc_srom, 3039 mb_offset + TULIP_ROM_MB_CSR15) : 3040 SIAGEN_21041_BNC; 3041 ADD(IFM_ETHER|IFM_10_2, tsm); 3042 PRINT("10base2"); 3043 break; 3044 3045 case TULIP_ROM_MB_MEDIA_AUI: 3046 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 3047 TULIP_ROM_GETW(sc->sc_srom, 3048 mb_offset + TULIP_ROM_MB_CSR13) : 3049 SIACONN_21041_AUI; 3050 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 3051 TULIP_ROM_GETW(sc->sc_srom, 3052 mb_offset + TULIP_ROM_MB_CSR14) : 3053 SIATXRX_21041_AUI; 3054 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 3055 TULIP_ROM_GETW(sc->sc_srom, 3056 mb_offset + TULIP_ROM_MB_CSR15) : 3057 SIAGEN_21041_AUI; 3058 ADD(IFM_ETHER|IFM_10_5, tsm); 3059 PRINT("10base5"); 3060 break; 3061 3062 case TULIP_ROM_MB_MEDIA_TP_FDX: 3063 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 3064 TULIP_ROM_GETW(sc->sc_srom, 3065 mb_offset + TULIP_ROM_MB_CSR13) : 3066 SIACONN_21041_10BASET_FDX; 3067 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 3068 TULIP_ROM_GETW(sc->sc_srom, 3069 mb_offset + TULIP_ROM_MB_CSR14) : 3070 SIATXRX_21041_10BASET_FDX; 3071 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 3072 TULIP_ROM_GETW(sc->sc_srom, 3073 mb_offset + TULIP_ROM_MB_CSR15) : 3074 SIAGEN_21041_10BASET_FDX; 3075 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 3076 PRINT("10baseT-FDX"); 3077 break; 3078 3079 default: 3080 printf("%s<unknown 0x%02x>", sep, 3081 (mb & TULIP_ROM_MB_MEDIA_CODE)); 3082 sep = ", "; 3083 free(tsm, M_DEVBUF); 3084 } 3085 } 3086 3087 /* 3088 * XXX Autosense not yet supported. 3089 */ 3090 3091 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset + 3092 TULIP_ROM_IL_SELECT_CONN_TYPE); 3093 switch (romdef) { 3094 case SELECT_CONN_TYPE_TP: 3095 case SELECT_CONN_TYPE_TP_AUTONEG: 3096 case SELECT_CONN_TYPE_TP_NOLINKPASS: 3097 defmedia = IFM_ETHER|IFM_10_T; 3098 defstr = "10baseT"; 3099 break; 3100 3101 case SELECT_CONN_TYPE_TP_FDX: 3102 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX; 3103 defstr = "10baseT-FDX"; 3104 break; 3105 3106 case SELECT_CONN_TYPE_BNC: 3107 defmedia = IFM_ETHER|IFM_10_2; 3108 defstr = "10base2"; 3109 break; 3110 3111 case SELECT_CONN_TYPE_AUI: 3112 defmedia = IFM_ETHER|IFM_10_5; 3113 defstr = "10base5"; 3114 break; 3115 #if 0 /* XXX */ 3116 case SELECT_CONN_TYPE_ASENSE: 3117 case SELECT_CONN_TYPE_ASENSE_AUTONEG: 3118 defmedia = IFM_ETHER|IFM_AUTO; 3119 defstr = "auto"; 3120 break; 3121 #endif 3122 default: 3123 defmedia = 0; 3124 defstr = NULL; 3125 } 3126 3127 if (defmedia != 0) 3128 printf(", default %s\n", defstr); 3129 else { 3130 /* 3131 * XXX We should default to auto-sense. 3132 */ 3133 defmedia = IFM_ETHER|IFM_10_T; 3134 defstr = "10baseT"; 3135 3136 printf("\n%s: unknown default media in SROM (0x%04x), " 3137 "using %s\n", sc->sc_dev.dv_xname, romdef, defstr); 3138 } 3139 3140 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 3141 return; 3142 3143 not_isv_srom: 3144 /* 3145 * If we have a board without the standard 21041 SROM format, 3146 * we just assume all media are present and try and pick a 3147 * reasonable default. 3148 */ 3149 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3150 M_WAITOK); 3151 tsm->tsm_siaconn = SIACONN_21041_10BASET; 3152 tsm->tsm_siatxrx = SIATXRX_21041_10BASET; 3153 tsm->tsm_siagen = SIAGEN_21041_10BASET; 3154 ADD(IFM_ETHER|IFM_10_T, tsm); 3155 PRINT("10baseT"); 3156 3157 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3158 M_WAITOK); 3159 tsm->tsm_siaconn = SIACONN_21041_10BASET_FDX; 3160 tsm->tsm_siatxrx = SIATXRX_21041_10BASET_FDX; 3161 tsm->tsm_siagen = SIAGEN_21041_10BASET_FDX; 3162 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 3163 PRINT("10baseT-FDX"); 3164 3165 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3166 M_WAITOK); 3167 tsm->tsm_siaconn = SIACONN_21041_BNC; 3168 tsm->tsm_siatxrx = SIATXRX_21041_BNC; 3169 tsm->tsm_siagen = SIAGEN_21041_BNC; 3170 ADD(IFM_ETHER|IFM_10_2|IFM_FDX, tsm); 3171 PRINT("10base2"); 3172 3173 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3174 M_WAITOK); 3175 tsm->tsm_siaconn = SIACONN_21041_AUI; 3176 tsm->tsm_siatxrx = SIATXRX_21041_AUI; 3177 tsm->tsm_siagen = SIAGEN_21041_AUI; 3178 ADD(IFM_ETHER|IFM_10_5|IFM_FDX, tsm); 3179 PRINT("10base5"); 3180 3181 /* 3182 * XXX Autosense not yet supported. 3183 */ 3184 3185 /* XXX This should be auto-sense. */ 3186 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 3187 printf(", default 10baseT"); 3188 3189 printf("\n"); 3190 } 3191 3192 #undef ADD 3193 #undef PRINT 3194 3195 void 3196 tlp_21040_21041_tmsw_get(sc, ifmr) 3197 struct tulip_softc *sc; 3198 struct ifmediareq *ifmr; 3199 { 3200 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3201 3202 ifmr->ifm_status = 0; 3203 3204 switch (IFM_SUBTYPE(ife->ifm_media)) { 3205 case IFM_AUTO: 3206 /* 3207 * XXX Implement autosensing case. 3208 */ 3209 break; 3210 3211 case IFM_10_T: 3212 /* 3213 * We're able to detect link directly on twisted pair. 3214 */ 3215 ifmr->ifm_status = IFM_AVALID; 3216 if (TULIP_ISSET(sc, CSR_SIASTAT, SIASTAT_LKF) == 0) 3217 ifmr->ifm_status |= IFM_ACTIVE; 3218 /* FALLTHROUGH */ 3219 default: 3220 /* 3221 * If not autosensing, active media is the currently 3222 * selected media. 3223 */ 3224 ifmr->ifm_active = ife->ifm_media; 3225 } 3226 } 3227 3228 int 3229 tlp_21040_21041_tmsw_set(sc) 3230 struct tulip_softc *sc; 3231 { 3232 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3233 struct tulip_21040_21041_sia_media *tsm; 3234 3235 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 3236 /* 3237 * If not autosensing, just pull the SIA settings out 3238 * of the media entry. 3239 */ 3240 tsm = ife->ifm_aux; 3241 TULIP_WRITE(sc, CSR_SIACONN, SIACONN_SRL); 3242 TULIP_WRITE(sc, CSR_SIATXRX, tsm->tsm_siatxrx); 3243 TULIP_WRITE(sc, CSR_SIAGEN, tsm->tsm_siagen); 3244 TULIP_WRITE(sc, CSR_SIACONN, tsm->tsm_siaconn); 3245 3246 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3247 sc->sc_opmode &= ~OPMODE_FD; 3248 if (ife->ifm_media & IFM_FDX) 3249 sc->sc_opmode |= OPMODE_FD; 3250 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3251 } else { 3252 /* 3253 * XXX Implement autosensing case. 3254 */ 3255 } 3256 3257 return (0); 3258 } 3259 3260 /* 3261 * DECchip 2114x ISV media switch. 3262 * XXX Currently only handles 21140[A] MII. 3263 */ 3264 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *)); 3265 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 3266 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *)); 3267 3268 const struct tulip_mediasw tlp_2114x_isv_mediasw = { 3269 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 3270 }; 3271 3272 void 3273 tlp_2114x_isv_tmsw_init(sc) 3274 struct tulip_softc *sc; 3275 { 3276 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3277 struct ifmedia_entry *ife; 3278 struct mii_softc *phy; 3279 struct tulip_2114x_media *tm; 3280 int i, devcnt, leaf_offset, m_cnt, type, length, seen, defmedia; 3281 u_int8_t *cp, *ncp; 3282 3283 seen = defmedia = 0; 3284 3285 sc->sc_mii.mii_ifp = ifp; 3286 sc->sc_mii.mii_readreg = tlp_sio_mii_readreg; 3287 sc->sc_mii.mii_writereg = tlp_sio_mii_writereg; 3288 sc->sc_mii.mii_statchg = sc->sc_statchg; 3289 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3290 tlp_mediastatus); 3291 3292 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 3293 for (i = 0; i < devcnt; i++) { 3294 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 3295 break; 3296 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 3297 sc->sc_devno) 3298 break; 3299 } 3300 3301 if (i == devcnt) { 3302 printf("%s: unable to locate info leaf in SROM\n", 3303 sc->sc_dev.dv_xname); 3304 return; 3305 } 3306 3307 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 3308 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 3309 3310 /* XXX SELECT CONN TYPE */ 3311 3312 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 3313 3314 /* 3315 * On some chips, the first thing in the Info Leaf is the 3316 * GPIO pin direction data. 3317 */ 3318 switch (sc->sc_chip) { 3319 case TULIP_CHIP_21140: 3320 case TULIP_CHIP_21140A: 3321 case TULIP_CHIP_MX98713: 3322 case TULIP_CHIP_MX98713A: 3323 case TULIP_CHIP_AX88140: 3324 case TULIP_CHIP_AX88141: 3325 sc->sc_gp_dir = *cp++; 3326 break; 3327 3328 default: 3329 /* Nothing. */ 3330 } 3331 3332 /* Get the media count. */ 3333 m_cnt = *cp++; 3334 3335 for (; m_cnt != 0; cp = ncp, m_cnt--) { 3336 /* 3337 * Determine the type and length of this media block. 3338 */ 3339 if ((*cp & 0x80) == 0) { 3340 length = 4; 3341 type = TULIP_ROM_MB_21140_GPR; 3342 } else { 3343 length = (*cp++ & 0x7f) - 1; 3344 type = *cp++ & 0x3f; 3345 } 3346 3347 /* Compute the start of the next block. */ 3348 ncp = cp + length; 3349 3350 /* Now, parse the block. */ 3351 switch (type) { 3352 case TULIP_ROM_MB_21140_GPR: 3353 printf("%s: 21140 GPR block\n", sc->sc_dev.dv_xname); 3354 break; 3355 3356 case TULIP_ROM_MB_21140_MII: 3357 seen |= 1 << TULIP_ROM_MB_21140_MII; 3358 3359 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 3360 memset(tm, 0, sizeof(*tm)); 3361 3362 tm->tm_type = TULIP_ROM_MB_21140_MII; 3363 tm->tm_get = tlp_mii_getmedia; 3364 tm->tm_set = tlp_mii_setmedia; 3365 3366 sc->sc_reset = tlp_21140_reset; 3367 3368 /* First is the PHY number. */ 3369 tm->tm_phyno = *cp++; 3370 3371 /* Next is the MII select sequence length and offset. */ 3372 tm->tm_gp_length = *cp++; 3373 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 3374 cp += tm->tm_gp_length; 3375 3376 /* Next is the MII reset sequence length and offset. */ 3377 tm->tm_reset_length = *cp++; 3378 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 3379 cp += tm->tm_reset_length; 3380 3381 /* 3382 * The following items are left in the media block 3383 * that we don't particularly care about: 3384 * 3385 * capabilities W 3386 * advertisement W 3387 * full duplex W 3388 * tx threshold W 3389 * 3390 * These appear to be bits in the PHY registers, 3391 * which our MII code handles on its own. 3392 */ 3393 3394 /* 3395 * Before we probe the MII bus, we need to reset 3396 * it and issue the selection sequence. 3397 */ 3398 3399 /* Set the direction of the pins... */ 3400 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 3401 3402 for (i = 0; i < tm->tm_reset_length; i++) { 3403 delay(10); 3404 TULIP_WRITE(sc, CSR_GPP, 3405 sc->sc_srom[tm->tm_reset_offset + i]); 3406 } 3407 3408 for (i = 0; i < tm->tm_gp_length; i++) { 3409 delay(10); 3410 TULIP_WRITE(sc, CSR_GPP, 3411 sc->sc_srom[tm->tm_gp_offset + i]); 3412 } 3413 3414 /* If there were no sequences, just lower the pins. */ 3415 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 3416 delay(10); 3417 TULIP_WRITE(sc, CSR_GPP, 0); 3418 } 3419 3420 /* 3421 * Now, probe the MII for the PHY. Note, we know 3422 * the location of the PHY on the bus, but we don't 3423 * particularly care; the MII code just likes to 3424 * search the whole thing anyhow. 3425 */ 3426 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 3427 3428 /* 3429 * Now, search for the PHY we hopefully just 3430 * configured. If it's not configured into the 3431 * kernel, we lose. The PHY's default media always 3432 * takes priority. 3433 */ 3434 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 3435 phy != NULL; 3436 phy = LIST_NEXT(phy, mii_list)) 3437 if (phy->mii_offset == tm->tm_phyno) 3438 break; 3439 if (phy == NULL) { 3440 printf("%s: unable to configure MII\n", 3441 sc->sc_dev.dv_xname); 3442 break; 3443 } 3444 3445 sc->sc_flags |= TULIPF_HAS_MII; 3446 sc->sc_tick = tlp_mii_tick; 3447 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 3448 phy->mii_inst); 3449 3450 /* 3451 * Okay, now that we've found the PHY and the MII 3452 * layer has added all of the media associated 3453 * with that PHY, we need to traverse the media 3454 * list, and add our `tm' to each entry's `aux' 3455 * pointer. 3456 * 3457 * We do this by looking for media with our 3458 * PHY's `instance'. 3459 */ 3460 for (ife = LIST_FIRST(&sc->sc_mii.mii_media.ifm_list); 3461 ife != NULL; 3462 ife = LIST_NEXT(ife, ifm_list)) { 3463 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 3464 continue; 3465 ife->ifm_aux = tm; 3466 } 3467 break; 3468 3469 case TULIP_ROM_MB_21142_SIA: 3470 printf("%s: 21142 SIA block\n", sc->sc_dev.dv_xname); 3471 break; 3472 3473 case TULIP_ROM_MB_21142_MII: 3474 printf("%s: 21142 MII block\n", sc->sc_dev.dv_xname); 3475 break; 3476 3477 case TULIP_ROM_MB_21143_SYM: 3478 printf("%s: 21143 SYM block\n", sc->sc_dev.dv_xname); 3479 break; 3480 3481 case TULIP_ROM_MB_21143_RESET: 3482 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname); 3483 break; 3484 3485 default: 3486 printf("%s: unknown ISV media block type 0x%02x\n", 3487 sc->sc_dev.dv_xname, type); 3488 } 3489 } 3490 3491 /* 3492 * Deal with the case where no media is configured. 3493 */ 3494 if (LIST_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) { 3495 printf("%s: no media found!\n", sc->sc_dev.dv_xname); 3496 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 3497 defmedia = IFM_ETHER|IFM_NONE; 3498 goto set_default; 3499 } 3500 3501 /* 3502 * Display any non-MII media we've located. 3503 */ 3504 if (seen & (1 << TULIP_ROM_MB_21140_GPR)) { 3505 printf("%s: GPR media: ", sc->sc_dev.dv_xname); 3506 /* XXX */ 3507 printf("\n"); 3508 } 3509 3510 if (seen & (1 << TULIP_ROM_MB_21142_SIA)) { 3511 printf("%s: SIA media: ", sc->sc_dev.dv_xname); 3512 /* XXX */ 3513 printf("\n"); 3514 } 3515 3516 if (seen & (1 << TULIP_ROM_MB_21143_SYM)) { 3517 printf("%s: SYM media: ", sc->sc_dev.dv_xname); 3518 /* XXX */ 3519 printf("\n"); 3520 } 3521 3522 /* 3523 * XXX Display default media if not MII. 3524 */ 3525 3526 set_default: 3527 /* 3528 * Set the default media. 3529 * 3530 * XXX Should make some attempt to care about the SROM default 3531 * setting, but we don't. 3532 */ 3533 #ifdef DIAGNOSTIC 3534 if (defmedia == 0) 3535 panic("tlp_2114x_isv_tmsw_init: no default media"); 3536 #endif 3537 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 3538 } 3539 3540 void 3541 tlp_2114x_isv_tmsw_get(sc, ifmr) 3542 struct tulip_softc *sc; 3543 struct ifmediareq *ifmr; 3544 { 3545 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3546 struct tulip_2114x_media *tm = ife->ifm_aux; 3547 3548 (*tm->tm_get)(sc, ifmr); 3549 } 3550 3551 int 3552 tlp_2114x_isv_tmsw_set(sc) 3553 struct tulip_softc *sc; 3554 { 3555 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3556 struct tulip_2114x_media *tm = ife->ifm_aux; 3557 3558 return ((*tm->tm_set)(sc)); 3559 } 3560 3561 /* 3562 * MII-on-SIO media switch. Handles only MII attached to the SIO. 3563 */ 3564 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 3565 3566 const struct tulip_mediasw tlp_sio_mii_mediasw = { 3567 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 3568 }; 3569 3570 void 3571 tlp_sio_mii_tmsw_init(sc) 3572 struct tulip_softc *sc; 3573 { 3574 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3575 3576 sc->sc_mii.mii_ifp = ifp; 3577 sc->sc_mii.mii_readreg = tlp_sio_mii_readreg; 3578 sc->sc_mii.mii_writereg = tlp_sio_mii_writereg; 3579 sc->sc_mii.mii_statchg = sc->sc_statchg; 3580 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3581 tlp_mediastatus); 3582 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 3583 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 3584 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 3585 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 3586 } else { 3587 sc->sc_flags |= TULIPF_HAS_MII; 3588 sc->sc_tick = tlp_mii_tick; 3589 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3590 } 3591 } 3592 3593 /* 3594 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 3595 */ 3596 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 3597 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 3598 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 3599 3600 const struct tulip_mediasw tlp_pnic_mediasw = { 3601 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 3602 }; 3603 3604 void tlp_pnic_nway_statchg __P((struct device *)); 3605 void tlp_pnic_nway_tick __P((void *)); 3606 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 3607 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 3608 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 3609 void tlp_pnic_nway_auto_timeout __P((void *)); 3610 void tlp_pnic_nway_status __P((struct tulip_softc *)); 3611 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 3612 3613 void 3614 tlp_pnic_tmsw_init(sc) 3615 struct tulip_softc *sc; 3616 { 3617 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3618 const char *sep = ""; 3619 3620 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 3621 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3622 3623 sc->sc_mii.mii_ifp = ifp; 3624 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 3625 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 3626 sc->sc_mii.mii_statchg = sc->sc_statchg; 3627 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3628 tlp_mediastatus); 3629 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 3630 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 3631 /* XXX What about AUI/BNC support? */ 3632 printf("%s: ", sc->sc_dev.dv_xname); 3633 3634 tlp_pnic_nway_reset(sc); 3635 3636 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 3637 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 3638 PRINT("10baseT"); 3639 3640 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 3641 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 3642 PRINT("10baseT-FDX"); 3643 3644 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 3645 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 3646 PRINT("100baseTX"); 3647 3648 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 3649 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 3650 PNIC_NWAY_CAP100TXFDX); 3651 PRINT("100baseTX-FDX"); 3652 3653 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 3654 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 3655 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 3656 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 3657 PRINT("auto"); 3658 3659 printf("\n"); 3660 3661 sc->sc_statchg = tlp_pnic_nway_statchg; 3662 sc->sc_tick = tlp_pnic_nway_tick; 3663 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3664 } else { 3665 sc->sc_flags |= TULIPF_HAS_MII; 3666 sc->sc_tick = tlp_mii_tick; 3667 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3668 } 3669 3670 #undef ADD 3671 #undef PRINT 3672 } 3673 3674 void 3675 tlp_pnic_tmsw_get(sc, ifmr) 3676 struct tulip_softc *sc; 3677 struct ifmediareq *ifmr; 3678 { 3679 struct mii_data *mii = &sc->sc_mii; 3680 3681 if (sc->sc_flags & TULIPF_HAS_MII) 3682 tlp_mii_getmedia(sc, ifmr); 3683 else { 3684 mii->mii_media_status = 0; 3685 mii->mii_media_active = IFM_NONE; 3686 tlp_pnic_nway_service(sc, MII_POLLSTAT); 3687 ifmr->ifm_status = sc->sc_mii.mii_media_status; 3688 ifmr->ifm_active = sc->sc_mii.mii_media_active; 3689 } 3690 } 3691 3692 int 3693 tlp_pnic_tmsw_set(sc) 3694 struct tulip_softc *sc; 3695 { 3696 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3697 struct mii_data *mii = &sc->sc_mii; 3698 3699 if (sc->sc_flags & TULIPF_HAS_MII) { 3700 /* 3701 * Make sure the built-in Tx jabber timer is disabled. 3702 */ 3703 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 3704 3705 return (tlp_mii_setmedia(sc)); 3706 } 3707 3708 if (ifp->if_flags & IFF_UP) { 3709 mii->mii_media_status = 0; 3710 mii->mii_media_active = IFM_NONE; 3711 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 3712 } 3713 3714 return (0); 3715 } 3716 3717 void 3718 tlp_pnic_nway_statchg(self) 3719 struct device *self; 3720 { 3721 struct tulip_softc *sc = (struct tulip_softc *)self; 3722 3723 /* Idle the transmit and receive processes. */ 3724 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3725 3726 /* 3727 * XXX What about Heartbeat Disable? Is it magically frobbed 3728 * XXX by the PHY? I hope so... 3729 */ 3730 3731 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 3732 OPMODE_SCR); 3733 3734 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 3735 sc->sc_opmode |= OPMODE_TTM; 3736 TULIP_WRITE(sc, CSR_GPP, 3737 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 3738 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3739 } else { 3740 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR; 3741 TULIP_WRITE(sc, CSR_GPP, 3742 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 3743 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3744 } 3745 3746 if (sc->sc_mii.mii_media_active & IFM_FDX) 3747 sc->sc_opmode |= OPMODE_FD; 3748 3749 /* 3750 * Write new OPMODE bits. This also restarts the transmit 3751 * and receive processes. 3752 */ 3753 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3754 3755 /* XXX Update ifp->if_baudrate */ 3756 } 3757 3758 void 3759 tlp_pnic_nway_tick(arg) 3760 void *arg; 3761 { 3762 struct tulip_softc *sc = arg; 3763 int s; 3764 3765 s = splnet(); 3766 tlp_pnic_nway_service(sc, MII_TICK); 3767 splx(s); 3768 3769 timeout(tlp_pnic_nway_tick, sc, hz); 3770 } 3771 3772 /* 3773 * Support for the Lite-On PNIC internal NWay block. This is constructed 3774 * somewhat like a PHY driver for simplicity. 3775 */ 3776 3777 int 3778 tlp_pnic_nway_service(sc, cmd) 3779 struct tulip_softc *sc; 3780 int cmd; 3781 { 3782 struct mii_data *mii = &sc->sc_mii; 3783 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3784 3785 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 3786 return (0); 3787 3788 switch (cmd) { 3789 case MII_POLLSTAT: 3790 /* Nothing special to do here. */ 3791 break; 3792 3793 case MII_MEDIACHG: 3794 switch (IFM_SUBTYPE(ife->ifm_media)) { 3795 case IFM_AUTO: 3796 (void) tlp_pnic_nway_auto(sc, 1); 3797 break; 3798 case IFM_100_T4: 3799 /* 3800 * XXX Not supported as a manual setting right now. 3801 */ 3802 return (EINVAL); 3803 default: 3804 /* 3805 * NWAY register data is stored in the ifmedia entry. 3806 */ 3807 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3808 } 3809 break; 3810 3811 case MII_TICK: 3812 /* 3813 * Only used for autonegotiation. 3814 */ 3815 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3816 return (0); 3817 3818 /* 3819 * Check to see if we have link. If we do, we don't 3820 * need to restart the autonegotiation process. 3821 */ 3822 if (sc->sc_flags & TULIPF_LINK_UP) 3823 return (0); 3824 3825 /* 3826 * Only retry autonegotiation every 5 seconds. 3827 */ 3828 if (++sc->sc_nway_ticks != 5) 3829 return (0); 3830 3831 sc->sc_nway_ticks = 0; 3832 tlp_pnic_nway_reset(sc); 3833 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 3834 return (0); 3835 break; 3836 } 3837 3838 /* Update the media status. */ 3839 tlp_pnic_nway_status(sc); 3840 3841 /* Callback if something changed. */ 3842 if (sc->sc_nway_active != mii->mii_media_active || 3843 cmd == MII_MEDIACHG) { 3844 (*sc->sc_statchg)(&sc->sc_dev); 3845 sc->sc_nway_active = mii->mii_media_active; 3846 } 3847 return (0); 3848 } 3849 3850 void 3851 tlp_pnic_nway_reset(sc) 3852 struct tulip_softc *sc; 3853 { 3854 3855 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 3856 delay(100); 3857 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 3858 } 3859 3860 int 3861 tlp_pnic_nway_auto(sc, waitfor) 3862 struct tulip_softc *sc; 3863 int waitfor; 3864 { 3865 struct mii_data *mii = &sc->sc_mii; 3866 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3867 u_int32_t reg; 3868 int i; 3869 3870 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 3871 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3872 3873 if (waitfor) { 3874 /* Wait 500ms for it to complete. */ 3875 for (i = 0; i < 500; i++) { 3876 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3877 if (reg & PNIC_NWAY_LPAR_MASK) { 3878 tlp_pnic_nway_acomp(sc); 3879 return (0); 3880 } 3881 delay(1000); 3882 } 3883 #if 0 3884 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3885 printf("%s: autonegotiation failed to complete\n", 3886 sc->sc_dev.dv_xname); 3887 #endif 3888 3889 /* 3890 * Don't need to worry about clearing DOINGAUTO. 3891 * If that's set, a timeout is pending, and it will 3892 * clear the flag. 3893 */ 3894 return (EIO); 3895 } 3896 3897 /* 3898 * Just let it finish asynchronously. This is for the benefit of 3899 * the tick handler driving autonegotiation. Don't want 500ms 3900 * delays all the time while the system is running! 3901 */ 3902 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 3903 sc->sc_flags |= TULIPF_DOINGAUTO; 3904 timeout(tlp_pnic_nway_auto_timeout, sc, hz >> 1); 3905 } 3906 return (EJUSTRETURN); 3907 } 3908 3909 void 3910 tlp_pnic_nway_auto_timeout(arg) 3911 void *arg; 3912 { 3913 struct tulip_softc *sc = arg; 3914 u_int32_t reg; 3915 int s; 3916 3917 s = splnet(); 3918 sc->sc_flags &= ~TULIPF_DOINGAUTO; 3919 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3920 #if 0 3921 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3922 printf("%s: autonegotiation failed to complete\n", 3923 sc->sc_dev.dv_xname); 3924 #endif 3925 3926 tlp_pnic_nway_acomp(sc); 3927 3928 /* Update the media status. */ 3929 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 3930 splx(s); 3931 } 3932 3933 void 3934 tlp_pnic_nway_status(sc) 3935 struct tulip_softc *sc; 3936 { 3937 struct mii_data *mii = &sc->sc_mii; 3938 u_int32_t reg; 3939 3940 mii->mii_media_status = IFM_AVALID; 3941 mii->mii_media_active = IFM_ETHER; 3942 3943 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3944 3945 if (sc->sc_flags & TULIPF_LINK_UP) 3946 mii->mii_media_status |= IFM_ACTIVE; 3947 3948 if (reg & PNIC_NWAY_NW) { 3949 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 3950 /* Erg, still trying, I guess... */ 3951 mii->mii_media_active |= IFM_NONE; 3952 return; 3953 } 3954 3955 #if 0 3956 if (reg & PNIC_NWAY_LPAR100T4) 3957 mii->mii_media_active |= IFM_100_T4; 3958 else 3959 #endif 3960 if (reg & PNIC_NWAY_LPAR100TXFDX) 3961 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 3962 else if (reg & PNIC_NWAY_LPAR100TX) 3963 mii->mii_media_active |= IFM_100_TX; 3964 else if (reg & PNIC_NWAY_LPAR10TFDX) 3965 mii->mii_media_active |= IFM_10_T|IFM_FDX; 3966 else if (reg & PNIC_NWAY_LPAR10T) 3967 mii->mii_media_active |= IFM_10_T; 3968 else 3969 mii->mii_media_active |= IFM_NONE; 3970 } else { 3971 if (reg & PNIC_NWAY_100) 3972 mii->mii_media_active |= IFM_100_TX; 3973 else 3974 mii->mii_media_active |= IFM_10_T; 3975 if (reg & PNIC_NWAY_FD) 3976 mii->mii_media_active |= IFM_FDX; 3977 } 3978 } 3979 3980 void 3981 tlp_pnic_nway_acomp(sc) 3982 struct tulip_softc *sc; 3983 { 3984 u_int32_t reg; 3985 3986 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3987 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 3988 3989 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 3990 reg |= PNIC_NWAY_100; 3991 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 3992 reg |= PNIC_NWAY_FD; 3993 3994 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 3995 } 3996
Indexes created Tue Sep 23 07:09:52 GMT 2025