tulip.c revision 1.19
1 /* $NetBSD: tulip.c,v 1.19 1999/09/27 19:14:01 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <vm/vm.h> /* for PAGE_SIZE */ 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #endif 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/if_inarp.h> 73 #endif 74 75 #ifdef NS 76 #include <netns/ns.h> 77 #include <netns/ns_if.h> 78 #endif 79 80 #include <machine/bus.h> 81 #include <machine/intr.h> 82 83 #include <dev/mii/mii.h> 84 #include <dev/mii/miivar.h> 85 86 #include <dev/ic/tulipreg.h> 87 #include <dev/ic/tulipvar.h> 88 89 /* 90 * The following tables compute the transmit threshold mode. We start 91 * at index 0. When ever we get a transmit underrun, we increment our 92 * index, falling back if we encounter the NULL terminator. 93 * 94 * Note: Store and forward mode is only available on the 100mbps chips 95 * (21140 and higher). 96 */ 97 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = { 98 { OPMODE_TR_72, "72 bytes" }, 99 { OPMODE_TR_96, "96 bytes" }, 100 { OPMODE_TR_128, "128 bytes" }, 101 { OPMODE_TR_160, "160 bytes" }, 102 { 0, NULL }, 103 }; 104 105 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = { 106 { OPMODE_TR_72, "72/128 bytes" }, 107 { OPMODE_TR_96, "96/256 bytes" }, 108 { OPMODE_TR_128, "128/512 bytes" }, 109 { OPMODE_TR_160, "160/1024 bytes" }, 110 { OPMODE_SF, "store and forward mode" }, 111 { 0, NULL }, 112 }; 113 114 #define TXTH_72 0 115 #define TXTH_96 1 116 #define TXTH_128 2 117 #define TXTH_160 3 118 #define TXTH_SF 4 119 120 /* 121 * The Winbond 89C840F does transmit threshold control totally 122 * differently. It simply has a 7-bit field which indicates 123 * the threshold: 124 * 125 * txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16; 126 * 127 * However, we just do Store-and-Forward mode on these chips, since 128 * the DMA engines seem to be flaky. 129 */ 130 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = { 131 { 0, "store and forward mode" }, 132 { 0, NULL }, 133 }; 134 135 #define TXTH_WINB_SF 0 136 137 void tlp_start __P((struct ifnet *)); 138 void tlp_watchdog __P((struct ifnet *)); 139 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 140 141 void tlp_shutdown __P((void *)); 142 143 void tlp_reset __P((struct tulip_softc *)); 144 int tlp_init __P((struct tulip_softc *)); 145 void tlp_rxdrain __P((struct tulip_softc *)); 146 void tlp_stop __P((struct tulip_softc *, int)); 147 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 148 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 149 void tlp_srom_idle __P((struct tulip_softc *)); 150 151 void tlp_filter_setup __P((struct tulip_softc *)); 152 void tlp_winb_filter_setup __P((struct tulip_softc *)); 153 154 void tlp_rxintr __P((struct tulip_softc *)); 155 void tlp_txintr __P((struct tulip_softc *)); 156 157 void tlp_mii_tick __P((void *)); 158 void tlp_mii_statchg __P((struct device *)); 159 void tlp_winb_mii_statchg __P((struct device *)); 160 161 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 162 int tlp_mii_setmedia __P((struct tulip_softc *)); 163 164 void tlp_sio_mii_sync __P((struct tulip_softc *)); 165 void tlp_sio_mii_sendbits __P((struct tulip_softc *, u_int32_t, int)); 166 int tlp_sio_mii_readreg __P((struct device *, int, int)); 167 void tlp_sio_mii_writereg __P((struct device *, int, int, int)); 168 169 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 170 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 171 172 void tlp_2114x_preinit __P((struct tulip_softc *)); 173 void tlp_pnic_preinit __P((struct tulip_softc *)); 174 175 void tlp_21140_reset __P((struct tulip_softc *)); 176 177 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t)); 178 #define tlp_mchash(addr) (tlp_crc32((addr), ETHER_ADDR_LEN) & \ 179 (TULIP_MCHASHSIZE - 1)) 180 181 #ifdef TLP_DEBUG 182 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 183 printf x 184 #else 185 #define DPRINTF(sc, x) /* nothing */ 186 #endif 187 188 /* 189 * tlp_attach: 190 * 191 * Attach a Tulip interface to the system. 192 */ 193 void 194 tlp_attach(sc, enaddr) 195 struct tulip_softc *sc; 196 const u_int8_t *enaddr; 197 { 198 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 199 int i, rseg, error; 200 bus_dma_segment_t seg; 201 202 /* 203 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 204 */ 205 206 /* 207 * Setup the transmit threshold table. 208 */ 209 switch (sc->sc_chip) { 210 case TULIP_CHIP_DE425: 211 case TULIP_CHIP_21040: 212 case TULIP_CHIP_21041: 213 sc->sc_txth = tlp_10_txthresh_tab; 214 break; 215 216 default: 217 sc->sc_txth = tlp_10_100_txthresh_tab; 218 break; 219 } 220 221 /* 222 * Setup the filter setup function. 223 */ 224 switch (sc->sc_chip) { 225 case TULIP_CHIP_WB89C840F: 226 sc->sc_filter_setup = tlp_winb_filter_setup; 227 break; 228 229 default: 230 sc->sc_filter_setup = tlp_filter_setup; 231 break; 232 } 233 234 /* 235 * Set up the media status change function. 236 */ 237 switch (sc->sc_chip) { 238 case TULIP_CHIP_WB89C840F: 239 sc->sc_statchg = tlp_winb_mii_statchg; 240 break; 241 242 default: 243 /* 244 * We may override this if we have special media 245 * handling requirements (e.g. flipping GPIO pins). 246 * 247 * The pure-MII statchg function covers the basics. 248 */ 249 sc->sc_statchg = tlp_mii_statchg; 250 break; 251 } 252 253 /* 254 * Set up various chip-specific quirks. 255 */ 256 switch (sc->sc_chip) { 257 case TULIP_CHIP_21140: 258 case TULIP_CHIP_21140A: 259 case TULIP_CHIP_21142: 260 case TULIP_CHIP_21143: 261 sc->sc_preinit = tlp_2114x_preinit; 262 break; 263 264 case TULIP_CHIP_82C168: 265 case TULIP_CHIP_82C169: 266 sc->sc_preinit = tlp_pnic_preinit; 267 268 /* 269 * These chips seem to have busted DMA engines; just put them 270 * in Store-and-Forward mode from the get-go. 271 */ 272 sc->sc_txthresh = TXTH_SF; 273 break; 274 275 case TULIP_CHIP_WB89C840F: 276 sc->sc_flags |= TULIPF_IC_FS; 277 break; 278 279 default: 280 /* Nothing. */ 281 } 282 283 SIMPLEQ_INIT(&sc->sc_txfreeq); 284 SIMPLEQ_INIT(&sc->sc_txdirtyq); 285 286 /* 287 * Allocate the control data structures, and create and load the 288 * DMA map for it. 289 */ 290 if ((error = bus_dmamem_alloc(sc->sc_dmat, 291 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg, 292 0)) != 0) { 293 printf("%s: unable to allocate control data, error = %d\n", 294 sc->sc_dev.dv_xname, error); 295 goto fail_0; 296 } 297 298 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 299 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 300 BUS_DMA_COHERENT)) != 0) { 301 printf("%s: unable to map control data, error = %d\n", 302 sc->sc_dev.dv_xname, error); 303 goto fail_1; 304 } 305 306 if ((error = bus_dmamap_create(sc->sc_dmat, 307 sizeof(struct tulip_control_data), 1, 308 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 309 printf("%s: unable to create control data DMA map, " 310 "error = %d\n", sc->sc_dev.dv_xname, error); 311 goto fail_2; 312 } 313 314 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 315 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 316 0)) != 0) { 317 printf("%s: unable to load control data DMA map, error = %d\n", 318 sc->sc_dev.dv_xname, error); 319 goto fail_3; 320 } 321 322 /* 323 * Create the transmit buffer DMA maps. 324 */ 325 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 326 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 327 TULIP_NTXSEGS, MCLBYTES, 0, 0, 328 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 329 printf("%s: unable to create tx DMA map %d, " 330 "error = %d\n", sc->sc_dev.dv_xname, i, error); 331 goto fail_4; 332 } 333 } 334 335 /* 336 * Create the recieve buffer DMA maps. 337 */ 338 for (i = 0; i < TULIP_NRXDESC; i++) { 339 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 340 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 341 printf("%s: unable to create rx DMA map %d, " 342 "error = %d\n", sc->sc_dev.dv_xname, i, error); 343 goto fail_5; 344 } 345 sc->sc_rxsoft[i].rxs_mbuf = NULL; 346 } 347 348 /* 349 * Reset the chip to a known state. 350 */ 351 tlp_reset(sc); 352 353 /* Announce ourselves. */ 354 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 355 sc->sc_name[0] != '\0' ? sc->sc_name : "", 356 sc->sc_name[0] != '\0' ? ", " : "", 357 ether_sprintf(enaddr)); 358 359 /* 360 * Initialize our media structures. This may probe the MII, if 361 * present. 362 */ 363 (*sc->sc_mediasw->tmsw_init)(sc); 364 365 ifp = &sc->sc_ethercom.ec_if; 366 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 367 ifp->if_softc = sc; 368 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 369 ifp->if_ioctl = tlp_ioctl; 370 ifp->if_start = tlp_start; 371 ifp->if_watchdog = tlp_watchdog; 372 373 /* 374 * Attach the interface. 375 */ 376 if_attach(ifp); 377 ether_ifattach(ifp, enaddr); 378 #if NBPFILTER > 0 379 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 380 sizeof(struct ether_header)); 381 #endif 382 383 /* 384 * Make sure the interface is shutdown during reboot. 385 */ 386 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 387 if (sc->sc_sdhook == NULL) 388 printf("%s: WARNING: unable to establish shutdown hook\n", 389 sc->sc_dev.dv_xname); 390 return; 391 392 /* 393 * Free any resources we've allocated during the failed attach 394 * attempt. Do this in reverse order and fall through. 395 */ 396 fail_5: 397 for (i = 0; i < TULIP_NRXDESC; i++) { 398 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 399 bus_dmamap_destroy(sc->sc_dmat, 400 sc->sc_rxsoft[i].rxs_dmamap); 401 } 402 fail_4: 403 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 404 if (sc->sc_txsoft[i].txs_dmamap != NULL) 405 bus_dmamap_destroy(sc->sc_dmat, 406 sc->sc_txsoft[i].txs_dmamap); 407 } 408 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 409 fail_3: 410 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 411 fail_2: 412 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 413 sizeof(struct tulip_control_data)); 414 fail_1: 415 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 416 fail_0: 417 return; 418 } 419 420 /* 421 * tlp_shutdown: 422 * 423 * Make sure the interface is stopped at reboot time. 424 */ 425 void 426 tlp_shutdown(arg) 427 void *arg; 428 { 429 struct tulip_softc *sc = arg; 430 431 tlp_stop(sc, 1); 432 } 433 434 /* 435 * tlp_start: [ifnet interface function] 436 * 437 * Start packet transmission on the interface. 438 */ 439 void 440 tlp_start(ifp) 441 struct ifnet *ifp; 442 { 443 struct tulip_softc *sc = ifp->if_softc; 444 struct mbuf *m0, *m; 445 struct tulip_txsoft *txs, *last_txs; 446 bus_dmamap_t dmamap; 447 int error, firsttx, nexttx, lasttx, ofree, seg; 448 449 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 450 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 451 452 /* 453 * If we want a filter setup, it means no more descriptors were 454 * available for the setup routine. Let it get a chance to wedge 455 * itself into the ring. 456 */ 457 if (sc->sc_flags & TULIPF_WANT_SETUP) 458 ifp->if_flags |= IFF_OACTIVE; 459 460 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 461 return; 462 463 /* 464 * Remember the previous number of free descriptors and 465 * the first descriptor we'll use. 466 */ 467 ofree = sc->sc_txfree; 468 firsttx = sc->sc_txnext; 469 470 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 471 sc->sc_dev.dv_xname, ofree, firsttx)); 472 473 /* 474 * Loop through the send queue, setting up transmit descriptors 475 * until we drain the queue, or use up all available transmit 476 * descriptors. 477 */ 478 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 479 sc->sc_txfree != 0) { 480 /* 481 * Grab a packet off the queue. 482 */ 483 IF_DEQUEUE(&ifp->if_snd, m0); 484 if (m0 == NULL) 485 break; 486 487 dmamap = txs->txs_dmamap; 488 489 /* 490 * Load the DMA map. If this fails, the packet either 491 * didn't fit in the alloted number of segments, or we were 492 * short on resources. In this case, we'll copy and try 493 * again. 494 */ 495 if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 496 BUS_DMA_NOWAIT) != 0) { 497 MGETHDR(m, M_DONTWAIT, MT_DATA); 498 if (m == NULL) { 499 printf("%s: unable to allocate Tx mbuf\n", 500 sc->sc_dev.dv_xname); 501 IF_PREPEND(&ifp->if_snd, m0); 502 break; 503 } 504 if (m0->m_pkthdr.len > MHLEN) { 505 MCLGET(m, M_DONTWAIT); 506 if ((m->m_flags & M_EXT) == 0) { 507 printf("%s: unable to allocate Tx " 508 "cluster\n", sc->sc_dev.dv_xname); 509 m_freem(m); 510 IF_PREPEND(&ifp->if_snd, m0); 511 break; 512 } 513 } 514 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 515 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 516 m_freem(m0); 517 m0 = m; 518 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 519 m0, BUS_DMA_NOWAIT); 520 if (error) { 521 printf("%s: unable to load Tx buffer, " 522 "error = %d\n", sc->sc_dev.dv_xname, error); 523 IF_PREPEND(&ifp->if_snd, m0); 524 break; 525 } 526 } 527 528 /* 529 * Ensure we have enough descriptors free to describe 530 * the packet. 531 */ 532 if (dmamap->dm_nsegs > sc->sc_txfree) { 533 /* 534 * Not enough free descriptors to transmit this 535 * packet. We haven't committed to anything yet, 536 * so just unload the DMA map, put the packet 537 * back on the queue, and punt. Notify the upper 538 * layer that there are no more slots left. 539 * 540 * XXX We could allocate an mbuf and copy, but 541 * XXX it is worth it? 542 */ 543 ifp->if_flags |= IFF_OACTIVE; 544 bus_dmamap_unload(sc->sc_dmat, dmamap); 545 IF_PREPEND(&ifp->if_snd, m0); 546 break; 547 } 548 549 /* 550 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 551 */ 552 553 /* Sync the DMA map. */ 554 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 555 BUS_DMASYNC_PREWRITE); 556 557 /* 558 * Initialize the transmit descriptors. 559 */ 560 for (nexttx = sc->sc_txnext, seg = 0; 561 seg < dmamap->dm_nsegs; 562 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 563 /* 564 * If this is the first descriptor we're 565 * enqueueing, don't set the OWN bit just 566 * yet. That could cause a race condition. 567 * We'll do it below. 568 */ 569 sc->sc_txdescs[nexttx].td_status = 570 (nexttx == firsttx) ? 0 : TDSTAT_OWN; 571 sc->sc_txdescs[nexttx].td_bufaddr1 = 572 dmamap->dm_segs[seg].ds_addr; 573 sc->sc_txdescs[nexttx].td_ctl = 574 (dmamap->dm_segs[seg].ds_len << TDCTL_SIZE1_SHIFT) | 575 TDCTL_CH; 576 lasttx = nexttx; 577 } 578 579 /* Set `first segment' and `last segment' appropriately. */ 580 sc->sc_txdescs[sc->sc_txnext].td_ctl |= TDCTL_Tx_FS; 581 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_LS; 582 583 #ifdef TLP_DEBUG 584 if (ifp->if_flags & IFF_DEBUG) { 585 printf(" txsoft %p trainsmit chain:\n", txs); 586 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 587 printf(" descriptor %d:\n", seg); 588 printf(" td_status: 0x%08x\n", 589 sc->sc_txdescs[seg].td_status); 590 printf(" td_ctl: 0x%08x\n", 591 sc->sc_txdescs[seg].td_ctl); 592 printf(" td_bufaddr1: 0x%08x\n", 593 sc->sc_txdescs[seg].td_bufaddr1); 594 printf(" td_bufaddr2: 0x%08x\n", 595 sc->sc_txdescs[seg].td_bufaddr2); 596 if (seg == lasttx) 597 break; 598 } 599 } 600 #endif 601 602 /* Sync the descriptors we're using. */ 603 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 604 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 605 606 /* 607 * Store a pointer to the packet so we can free it later, 608 * and remember what txdirty will be once the packet is 609 * done. 610 */ 611 txs->txs_mbuf = m0; 612 txs->txs_firstdesc = sc->sc_txnext; 613 txs->txs_lastdesc = lasttx; 614 615 /* Advance the tx pointer. */ 616 sc->sc_txfree -= dmamap->dm_nsegs; 617 sc->sc_txnext = nexttx; 618 619 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 620 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 621 622 last_txs = txs; 623 624 #if NBPFILTER > 0 625 /* 626 * Pass the packet to any BPF listeners. 627 */ 628 if (ifp->if_bpf) 629 bpf_mtap(ifp->if_bpf, m0); 630 #endif /* NBPFILTER > 0 */ 631 } 632 633 if (txs == NULL || sc->sc_txfree == 0) { 634 /* No more slots left; notify upper layer. */ 635 ifp->if_flags |= IFF_OACTIVE; 636 } 637 638 if (sc->sc_txfree != ofree) { 639 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 640 sc->sc_dev.dv_xname, lasttx, firsttx)); 641 /* 642 * Cause a transmit interrupt to happen on the 643 * last packet we enqueued. 644 */ 645 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_IC; 646 TULIP_CDTXSYNC(sc, lasttx, 1, 647 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 648 649 /* 650 * Some clone chips want IC on the *first* segment in 651 * the packet. Appease them. 652 */ 653 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 654 last_txs->txs_firstdesc != lasttx) { 655 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 656 TDCTL_Tx_IC; 657 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 658 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 659 } 660 661 /* 662 * The entire packet chain is set up. Give the 663 * first descriptor to the chip now. 664 */ 665 sc->sc_txdescs[firsttx].td_status |= TDSTAT_OWN; 666 TULIP_CDTXSYNC(sc, firsttx, 1, 667 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 668 669 /* Wake up the transmitter. */ 670 /* XXX USE AUTOPOLLING? */ 671 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 672 673 /* Set a watchdog timer in case the chip flakes out. */ 674 ifp->if_timer = 5; 675 } 676 } 677 678 /* 679 * tlp_watchdog: [ifnet interface function] 680 * 681 * Watchdog timer handler. 682 */ 683 void 684 tlp_watchdog(ifp) 685 struct ifnet *ifp; 686 { 687 struct tulip_softc *sc = ifp->if_softc; 688 int doing_setup, doing_transmit; 689 690 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 691 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 692 693 if (doing_setup && doing_transmit) { 694 printf("%s: filter setup and transmit timeout\n", 695 sc->sc_dev.dv_xname); 696 ifp->if_oerrors++; 697 } else if (doing_transmit) { 698 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 699 ifp->if_oerrors++; 700 } else if (doing_setup) 701 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 702 else 703 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 704 705 (void) tlp_init(sc); 706 707 /* Try to get more packets going. */ 708 tlp_start(ifp); 709 } 710 711 /* 712 * tlp_ioctl: [ifnet interface function] 713 * 714 * Handle control requests from the operator. 715 */ 716 int 717 tlp_ioctl(ifp, cmd, data) 718 struct ifnet *ifp; 719 u_long cmd; 720 caddr_t data; 721 { 722 struct tulip_softc *sc = ifp->if_softc; 723 struct ifreq *ifr = (struct ifreq *)data; 724 struct ifaddr *ifa = (struct ifaddr *)data; 725 int s, error = 0; 726 727 s = splnet(); 728 729 switch (cmd) { 730 case SIOCSIFADDR: 731 ifp->if_flags |= IFF_UP; 732 733 switch (ifa->ifa_addr->sa_family) { 734 #ifdef INET 735 case AF_INET: 736 if ((error = tlp_init(sc)) != 0) 737 break; 738 arp_ifinit(ifp, ifa); 739 break; 740 #endif /* INET */ 741 #ifdef NS 742 case AF_NS: 743 { 744 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 745 746 if (ns_nullhost(*ina)) 747 ina->x_host = *(union ns_host *) 748 LLADDR(ifp->if_sadl); 749 else 750 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 751 ifp->if_addrlen); 752 /* Set new address. */ 753 error = tlp_init(sc); 754 break; 755 } 756 #endif /* NS */ 757 default: 758 error = tlp_init(sc); 759 break; 760 } 761 break; 762 763 case SIOCSIFMTU: 764 if (ifr->ifr_mtu > ETHERMTU) 765 error = EINVAL; 766 else 767 ifp->if_mtu = ifr->ifr_mtu; 768 break; 769 770 case SIOCSIFFLAGS: 771 if ((ifp->if_flags & IFF_UP) == 0 && 772 (ifp->if_flags & IFF_RUNNING) != 0) { 773 /* 774 * If interface is marked down and it is running, then 775 * stop it. 776 */ 777 tlp_stop(sc, 1); 778 } else if ((ifp->if_flags & IFF_UP) != 0 && 779 (ifp->if_flags & IFF_RUNNING) == 0) { 780 /* 781 * If interfase it marked up and it is stopped, then 782 * start it. 783 */ 784 error = tlp_init(sc); 785 } else if ((ifp->if_flags & IFF_UP) != 0) { 786 /* 787 * Reset the interface to pick up changes in any other 788 * flags that affect the hardware state. 789 */ 790 error = tlp_init(sc); 791 } 792 break; 793 794 case SIOCADDMULTI: 795 case SIOCDELMULTI: 796 error = (cmd == SIOCADDMULTI) ? 797 ether_addmulti(ifr, &sc->sc_ethercom) : 798 ether_delmulti(ifr, &sc->sc_ethercom); 799 800 if (error == ENETRESET) { 801 /* 802 * Multicast list has changed. Set the filter 803 * accordingly. 804 */ 805 (*sc->sc_filter_setup)(sc); 806 error = 0; 807 } 808 break; 809 810 case SIOCSIFMEDIA: 811 case SIOCGIFMEDIA: 812 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 813 break; 814 815 default: 816 error = EINVAL; 817 break; 818 } 819 820 /* Try to get more packets going. */ 821 tlp_start(ifp); 822 823 splx(s); 824 return (error); 825 } 826 827 /* 828 * tlp_intr: 829 * 830 * Interrupt service routine. 831 */ 832 int 833 tlp_intr(arg) 834 void *arg; 835 { 836 struct tulip_softc *sc = arg; 837 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 838 u_int32_t status, rxstatus, txstatus; 839 int handled = 0, txthresh; 840 841 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 842 843 /* 844 * If the interface isn't running, the interrupt couldn't 845 * possibly have come from us. 846 */ 847 if ((ifp->if_flags & IFF_RUNNING) == 0) 848 return (0); 849 850 for (;;) { 851 status = TULIP_READ(sc, CSR_STATUS); 852 if (status) 853 TULIP_WRITE(sc, CSR_STATUS, status); 854 855 if ((status & sc->sc_inten) == 0) 856 break; 857 858 handled = 1; 859 860 rxstatus = status & sc->sc_rxint_mask; 861 txstatus = status & sc->sc_txint_mask; 862 863 if (rxstatus) { 864 /* Grab new any new packets. */ 865 tlp_rxintr(sc); 866 867 if (rxstatus & STATUS_RWT) 868 printf("%s: receive watchdog timeout\n", 869 sc->sc_dev.dv_xname); 870 871 if (rxstatus & STATUS_RU) { 872 printf("%s: receive ring overrun\n", 873 sc->sc_dev.dv_xname); 874 /* Get the receive process going again. */ 875 tlp_idle(sc, OPMODE_SR); 876 TULIP_WRITE(sc, CSR_RXLIST, 877 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 878 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 879 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 880 break; 881 } 882 } 883 884 if (txstatus) { 885 /* Sweep up transmit descriptors. */ 886 tlp_txintr(sc); 887 888 if (txstatus & STATUS_TJT) 889 printf("%s: transmit jabber timeout\n", 890 sc->sc_dev.dv_xname); 891 892 if (txstatus & STATUS_UNF) { 893 /* 894 * Increase our transmit threshold if 895 * another is available. 896 */ 897 txthresh = sc->sc_txthresh + 1; 898 if (sc->sc_txth[txthresh].txth_name != NULL) { 899 /* Idle the transmit process. */ 900 tlp_idle(sc, OPMODE_ST); 901 902 sc->sc_txthresh = txthresh; 903 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 904 sc->sc_opmode |= 905 sc->sc_txth[txthresh].txth_opmode; 906 printf("%s: transmit underrun; new " 907 "threshold: %s\n", 908 sc->sc_dev.dv_xname, 909 sc->sc_txth[txthresh].txth_name); 910 911 /* 912 * Set the new threshold and restart 913 * the transmit process. 914 */ 915 TULIP_WRITE(sc, CSR_OPMODE, 916 sc->sc_opmode); 917 } 918 /* 919 * XXX Log every Nth underrun from 920 * XXX now on? 921 */ 922 } 923 } 924 925 if (status & (STATUS_TPS|STATUS_RPS)) { 926 if (status & STATUS_TPS) 927 printf("%s: transmit process stopped\n", 928 sc->sc_dev.dv_xname); 929 if (status & STATUS_RPS) 930 printf("%s: receive process stopped\n", 931 sc->sc_dev.dv_xname); 932 (void) tlp_init(sc); 933 break; 934 } 935 936 if (status & STATUS_SE) { 937 const char *str; 938 switch (status & STATUS_EB) { 939 case STATUS_EB_PARITY: 940 str = "parity error"; 941 break; 942 943 case STATUS_EB_MABT: 944 str = "master abort"; 945 break; 946 947 case STATUS_EB_TABT: 948 str = "target abort"; 949 break; 950 951 default: 952 str = "unknown error"; 953 break; 954 } 955 printf("%s: fatal system error: %s\n", 956 sc->sc_dev.dv_xname, str); 957 (void) tlp_init(sc); 958 break; 959 } 960 961 /* 962 * Not handled: 963 * 964 * Transmit buffer unavailable -- normal 965 * condition, nothing to do, really. 966 * 967 * General purpose timer experied -- we don't 968 * use the general purpose timer. 969 * 970 * Early receive interrupt -- not available on 971 * all chips, we just use RI. We also only 972 * use single-segment receive DMA, so this 973 * is mostly useless. 974 */ 975 } 976 977 /* Try to get more packets going. */ 978 tlp_start(ifp); 979 980 return (handled); 981 } 982 983 /* 984 * tlp_rxintr: 985 * 986 * Helper; handle receive interrupts. 987 */ 988 void 989 tlp_rxintr(sc) 990 struct tulip_softc *sc; 991 { 992 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 993 struct ether_header *eh; 994 struct tulip_rxsoft *rxs; 995 struct mbuf *m; 996 u_int32_t rxstat; 997 int i, len; 998 999 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 1000 rxs = &sc->sc_rxsoft[i]; 1001 1002 TULIP_CDRXSYNC(sc, i, 1003 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1004 1005 rxstat = sc->sc_rxdescs[i].td_status; 1006 1007 if (rxstat & TDSTAT_OWN) { 1008 /* 1009 * We have processed all of the receive buffers. 1010 */ 1011 break; 1012 } 1013 1014 /* 1015 * Make sure the packet fit in one buffer. This should 1016 * always be the case. But the Lite-On PNIC, rev 33 1017 * has an awful receive engine bug, which may require 1018 * a very icky work-around. 1019 */ 1020 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1021 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1022 printf("%s: incoming packet spilled, resetting\n", 1023 sc->sc_dev.dv_xname); 1024 (void) tlp_init(sc); 1025 return; 1026 } 1027 1028 /* 1029 * If any collisions were seen on the wire, count one. 1030 */ 1031 if (rxstat & TDSTAT_Rx_CS) 1032 ifp->if_collisions++; 1033 1034 /* 1035 * If an error occured, update stats, clear the status 1036 * word, and leave the packet buffer in place. It will 1037 * simply be reused the next time the ring comes around. 1038 */ 1039 if (rxstat & TDSTAT_ES) { 1040 #define PRINTERR(bit, str) \ 1041 if (rxstat & (bit)) \ 1042 printf("%s: receive error: %s\n", \ 1043 sc->sc_dev.dv_xname, str) 1044 ifp->if_ierrors++; 1045 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1046 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1047 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1048 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1049 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1050 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1051 #undef PRINTERR 1052 TULIP_INIT_RXDESC(sc, i); 1053 continue; 1054 } 1055 1056 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1057 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1058 1059 /* 1060 * No errors; receive the packet. Note the Tulip 1061 * includes the CRC with every packet; trim it. 1062 */ 1063 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; 1064 1065 #ifdef __NO_STRICT_ALIGNMENT 1066 /* 1067 * Allocate a new mbuf cluster. If that fails, we are 1068 * out of memory, and must drop the packet and recycle 1069 * the buffer that's already attached to this descriptor. 1070 */ 1071 m = rxs->rxs_mbuf; 1072 if (tlp_add_rxbuf(sc, i) != 0) { 1073 ifp->if_ierrors++; 1074 TULIP_INIT_RXDESC(sc, i); 1075 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1076 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1077 continue; 1078 } 1079 #else 1080 /* 1081 * The Tulip's receive buffers must be 4-byte aligned. 1082 * But this means that the data after the Ethernet header 1083 * is misaligned. We must allocate a new buffer and 1084 * copy the data, shifted forward 2 bytes. 1085 */ 1086 MGETHDR(m, M_DONTWAIT, MT_DATA); 1087 if (m == NULL) { 1088 dropit: 1089 ifp->if_ierrors++; 1090 TULIP_INIT_RXDESC(sc, i); 1091 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1092 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1093 continue; 1094 } 1095 if (len > (MHLEN - 2)) { 1096 MCLGET(m, M_DONTWAIT); 1097 if ((m->m_flags & M_EXT) == 0) { 1098 m_freem(m); 1099 goto dropit; 1100 } 1101 } 1102 m->m_data += 2; 1103 1104 /* 1105 * Note that we use clusters for incoming frames, so the 1106 * buffer is virtually contiguous. 1107 */ 1108 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1109 1110 /* Allow the receive descriptor to continue using its mbuf. */ 1111 TULIP_INIT_RXDESC(sc, i); 1112 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1113 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1114 #endif /* __NO_STRICT_ALIGNMENT */ 1115 1116 ifp->if_ipackets++; 1117 eh = mtod(m, struct ether_header *); 1118 m->m_pkthdr.rcvif = ifp; 1119 m->m_pkthdr.len = m->m_len = len; 1120 1121 #if NBPFILTER > 0 1122 /* 1123 * Pass this up to any BPF listeners, but only 1124 * pass it up the stack if its for us. 1125 */ 1126 if (ifp->if_bpf) 1127 bpf_mtap(ifp->if_bpf, m); 1128 #endif /* NPBFILTER > 0 */ 1129 1130 /* 1131 * This test is outside the NBPFILTER block because 1132 * on the 21140 we have to use Hash-Only mode due to 1133 * a bug in the filter logic. 1134 */ 1135 if ((ifp->if_flags & IFF_PROMISC) != 0 || 1136 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 1137 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1138 ETHER_ADDR_LEN) != 0 && 1139 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) { 1140 m_freem(m); 1141 continue; 1142 } 1143 } 1144 1145 /* Pass it on. */ 1146 (*ifp->if_input)(ifp, m); 1147 } 1148 1149 /* Update the recieve pointer. */ 1150 sc->sc_rxptr = i; 1151 } 1152 1153 /* 1154 * tlp_txintr: 1155 * 1156 * Helper; handle transmit interrupts. 1157 */ 1158 void 1159 tlp_txintr(sc) 1160 struct tulip_softc *sc; 1161 { 1162 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1163 struct tulip_txsoft *txs; 1164 u_int32_t txstat; 1165 1166 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1167 sc->sc_dev.dv_xname, sc->sc_flags)); 1168 1169 ifp->if_flags &= ~IFF_OACTIVE; 1170 1171 /* 1172 * If we were doing a filter setup, check to see if it completed. 1173 */ 1174 if (sc->sc_flags & TULIPF_DOING_SETUP) { 1175 TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1176 if ((sc->sc_setup_desc.td_status & TDSTAT_OWN) == 0) 1177 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1178 } 1179 1180 /* 1181 * Go through our Tx list and free mbufs for those 1182 * frames that have been transmitted. 1183 */ 1184 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1185 TULIP_CDTXSYNC(sc, txs->txs_firstdesc, 1186 txs->txs_dmamap->dm_nsegs, 1187 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1188 1189 #ifdef TLP_DEBUG 1190 if (ifp->if_flags & IFF_DEBUG) { 1191 int i; 1192 printf(" txsoft %p trainsmit chain:\n", txs); 1193 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1194 printf(" descriptor %d:\n", i); 1195 printf(" td_status: 0x%08x\n", 1196 sc->sc_txdescs[i].td_status); 1197 printf(" td_ctl: 0x%08x\n", 1198 sc->sc_txdescs[i].td_ctl); 1199 printf(" td_bufaddr1: 0x%08x\n", 1200 sc->sc_txdescs[i].td_bufaddr1); 1201 printf(" td_bufaddr2: 0x%08x\n", 1202 sc->sc_txdescs[i].td_bufaddr2); 1203 if (i == txs->txs_lastdesc) 1204 break; 1205 } 1206 } 1207 #endif 1208 1209 txstat = sc->sc_txdescs[txs->txs_firstdesc].td_status; 1210 if (txstat & TDSTAT_OWN) 1211 break; 1212 1213 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1214 1215 sc->sc_txfree += txs->txs_dmamap->dm_nsegs; 1216 1217 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1218 0, txs->txs_dmamap->dm_mapsize, 1219 BUS_DMASYNC_POSTWRITE); 1220 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1221 m_freem(txs->txs_mbuf); 1222 txs->txs_mbuf = NULL; 1223 1224 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1225 1226 /* 1227 * Check for errors and collisions. 1228 */ 1229 if (txstat & 1230 (TDSTAT_Tx_UF|TDSTAT_Tx_NC|TDSTAT_Tx_LO|TDSTAT_Tx_TO)) { 1231 ifp->if_oerrors++; 1232 #if 0 1233 /* 1234 * XXX Can't check for late or excessive collisions; 1235 * XXX Some 21040s seem to register those even on 1236 * XXX successful transmissions! 1237 */ 1238 if (txstat & TDSTAT_Tx_EC) 1239 ifp->if_collisions += 16; 1240 if (txstat & TDSTAT_Tx_LC) 1241 ifp->if_collisions++; 1242 #endif 1243 } else { 1244 /* Packet was transmitted successfully. */ 1245 ifp->if_opackets++; 1246 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1247 } 1248 } 1249 1250 /* 1251 * If there are no more pending transmissions, cancel the watchdog 1252 * timer. 1253 */ 1254 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1255 ifp->if_timer = 0; 1256 1257 /* 1258 * If we have a receive filter setup pending, do it now. 1259 */ 1260 if (sc->sc_flags & TULIPF_WANT_SETUP) 1261 (*sc->sc_filter_setup)(sc); 1262 } 1263 1264 /* 1265 * tlp_reset: 1266 * 1267 * Perform a soft reset on the Tulip. 1268 */ 1269 void 1270 tlp_reset(sc) 1271 struct tulip_softc *sc; 1272 { 1273 int i; 1274 1275 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1276 1277 for (i = 0; i < 1000; i++) { 1278 /* 1279 * Wait at least 50 PCI cycles for the reset to 1280 * complete before peeking at the Tulip again. 1281 * 10 uSec is a bit longer than 50 PCI cycles 1282 * (at 33MHz), but it doesn't hurt have the extra 1283 * wait. 1284 */ 1285 delay(10); 1286 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1287 break; 1288 } 1289 1290 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1291 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1292 1293 delay(1000); 1294 1295 /* 1296 * If the board has any GPIO reset sequences to issue, do them now. 1297 */ 1298 if (sc->sc_reset != NULL) 1299 (*sc->sc_reset)(sc); 1300 } 1301 1302 /* 1303 * tlp_init: 1304 * 1305 * Initialize the interface. Must be called at splnet(). 1306 */ 1307 int 1308 tlp_init(sc) 1309 struct tulip_softc *sc; 1310 { 1311 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1312 struct tulip_txsoft *txs; 1313 struct tulip_rxsoft *rxs; 1314 int i, error = 0; 1315 1316 /* 1317 * Cancel any pending I/O. 1318 */ 1319 tlp_stop(sc, 0); 1320 1321 /* 1322 * Initialize `opmode' to 0, and call the pre-init routine, if 1323 * any. This is required because the 2114x and some of the 1324 * clones require that the media-related bits in `opmode' be 1325 * set before performing a soft-reset in order to get internal 1326 * chip pathways are correct. Yay! 1327 */ 1328 sc->sc_opmode = 0; 1329 if (sc->sc_preinit != NULL) 1330 (*sc->sc_preinit)(sc); 1331 1332 /* 1333 * Reset the Tulip to a known state. 1334 */ 1335 tlp_reset(sc); 1336 1337 /* 1338 * Initialize the BUSMODE register. 1339 * 1340 * XXX What about read-multiple/read-line/write-line on 1341 * XXX the 21140 and up? 1342 */ 1343 sc->sc_busmode = BUSMODE_BAR; 1344 switch (sc->sc_cacheline) { 1345 default: 1346 /* 1347 * Note: We must *always* set these bits; a cache 1348 * alignment of 0 is RESERVED. 1349 */ 1350 case 8: 1351 sc->sc_busmode |= BUSMODE_CAL_8LW; 1352 break; 1353 case 16: 1354 sc->sc_busmode |= BUSMODE_CAL_16LW; 1355 break; 1356 case 32: 1357 sc->sc_busmode |= BUSMODE_CAL_32LW; 1358 break; 1359 } 1360 switch (sc->sc_chip) { 1361 case TULIP_CHIP_82C168: 1362 case TULIP_CHIP_82C169: 1363 sc->sc_busmode |= BUSMODE_PBL_16LW | BUSMODE_PNIC_MBO; 1364 break; 1365 default: 1366 sc->sc_busmode |= BUSMODE_PBL_DEFAULT; 1367 break; 1368 } 1369 #if BYTE_ORDER == BIG_ENDIAN 1370 /* 1371 * XXX There are reports that this doesn't work properly 1372 * in the old Tulip driver, but BUSMODE_DBO does. However, 1373 * BUSMODE_DBO is not available on the 21040, and requires 1374 * us to byte-swap the setup packet. What to do? 1375 */ 1376 sc->sc_busmode |= BUSMODE_BLE; 1377 #endif 1378 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1379 1380 /* 1381 * Initialize the OPMODE register. We don't write it until 1382 * we're ready to begin the transmit and receive processes. 1383 * 1384 * Media-related OPMODE bits are set in the media callbacks 1385 * for each specific chip/board. 1386 */ 1387 sc->sc_opmode |= OPMODE_SR | OPMODE_ST | 1388 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1389 1390 /* 1391 * Magical mystery initialization on the Macronix chips. 1392 * The MX98713 uses its own magic value, the rest share 1393 * a common one. 1394 */ 1395 switch (sc->sc_chip) { 1396 case TULIP_CHIP_MX98713: 1397 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1398 break; 1399 1400 case TULIP_CHIP_MX98713A: 1401 case TULIP_CHIP_MX98715: 1402 case TULIP_CHIP_MX98725: 1403 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1404 break; 1405 1406 default: 1407 /* Nothing. */ 1408 } 1409 1410 /* 1411 * Initialize the transmit descriptor ring. 1412 */ 1413 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1414 for (i = 0; i < TULIP_NTXDESC; i++) { 1415 sc->sc_txdescs[i].td_ctl = TDCTL_CH; 1416 sc->sc_txdescs[i].td_bufaddr2 = 1417 TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)); 1418 } 1419 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1420 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1421 sc->sc_txfree = TULIP_NTXDESC; 1422 sc->sc_txnext = 0; 1423 1424 /* 1425 * Initialize the transmit job descriptors. 1426 */ 1427 SIMPLEQ_INIT(&sc->sc_txfreeq); 1428 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1429 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1430 txs = &sc->sc_txsoft[i]; 1431 txs->txs_mbuf = NULL; 1432 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1433 } 1434 1435 /* 1436 * Initialize the receive descriptor and receive job 1437 * descriptor rings. 1438 */ 1439 for (i = 0; i < TULIP_NRXDESC; i++) { 1440 rxs = &sc->sc_rxsoft[i]; 1441 if (rxs->rxs_mbuf == NULL) { 1442 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1443 printf("%s: unable to allocate or map rx " 1444 "buffer %d, error = %d\n", 1445 sc->sc_dev.dv_xname, i, error); 1446 /* 1447 * XXX Should attempt to run with fewer receive 1448 * XXX buffers instead of just failing. 1449 */ 1450 tlp_rxdrain(sc); 1451 goto out; 1452 } 1453 } 1454 } 1455 sc->sc_rxptr = 0; 1456 1457 /* 1458 * Initialize the interrupt mask and enable interrupts. 1459 */ 1460 /* normal interrupts */ 1461 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1462 1463 /* abnormal interrupts */ 1464 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1465 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1466 1467 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1468 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1469 1470 switch (sc->sc_chip) { 1471 case TULIP_CHIP_WB89C840F: 1472 /* 1473 * Clear bits that we don't want that happen to 1474 * overlap or don't exist. 1475 */ 1476 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1477 break; 1478 1479 default: 1480 /* Nothing. */ 1481 } 1482 1483 sc->sc_rxint_mask &= sc->sc_inten; 1484 sc->sc_txint_mask &= sc->sc_inten; 1485 1486 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1487 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1488 1489 /* 1490 * Give the transmit and receive rings to the Tulip. 1491 */ 1492 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1493 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1494 1495 /* 1496 * On chips that do this differently, set the station address. 1497 */ 1498 switch (sc->sc_chip) { 1499 case TULIP_CHIP_WB89C840F: 1500 { 1501 /* XXX Do this with stream writes? */ 1502 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1503 1504 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1505 bus_space_write_1(sc->sc_st, sc->sc_sh, 1506 cpa + i, LLADDR(ifp->if_sadl)[i]); 1507 } 1508 break; 1509 } 1510 1511 default: 1512 /* Nothing. */ 1513 } 1514 1515 /* 1516 * Set the receive filter. This will start the transmit and 1517 * receive processes. 1518 */ 1519 (*sc->sc_filter_setup)(sc); 1520 1521 /* 1522 * Set the current media. 1523 */ 1524 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1525 1526 /* 1527 * Start the receive process. 1528 */ 1529 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1530 1531 if (sc->sc_tick != NULL) { 1532 /* Start the one second clock. */ 1533 timeout(sc->sc_tick, sc, hz); 1534 } 1535 1536 /* 1537 * Note that the interface is now running. 1538 */ 1539 ifp->if_flags |= IFF_RUNNING; 1540 ifp->if_flags &= ~IFF_OACTIVE; 1541 1542 out: 1543 if (error) 1544 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1545 return (error); 1546 } 1547 1548 /* 1549 * tlp_rxdrain: 1550 * 1551 * Drain the receive queue. 1552 */ 1553 void 1554 tlp_rxdrain(sc) 1555 struct tulip_softc *sc; 1556 { 1557 struct tulip_rxsoft *rxs; 1558 int i; 1559 1560 for (i = 0; i < TULIP_NRXDESC; i++) { 1561 rxs = &sc->sc_rxsoft[i]; 1562 if (rxs->rxs_mbuf != NULL) { 1563 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1564 m_freem(rxs->rxs_mbuf); 1565 rxs->rxs_mbuf = NULL; 1566 } 1567 } 1568 } 1569 1570 /* 1571 * tlp_stop: 1572 * 1573 * Stop transmission on the interface. 1574 */ 1575 void 1576 tlp_stop(sc, drain) 1577 struct tulip_softc *sc; 1578 int drain; 1579 { 1580 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1581 struct tulip_txsoft *txs; 1582 1583 if (sc->sc_tick != NULL) { 1584 /* Stop the one second clock. */ 1585 untimeout(sc->sc_tick, sc); 1586 } 1587 1588 /* Disable interrupts. */ 1589 TULIP_WRITE(sc, CSR_INTEN, 0); 1590 1591 /* Stop the transmit and receive processes. */ 1592 TULIP_WRITE(sc, CSR_OPMODE, 0); 1593 TULIP_WRITE(sc, CSR_RXLIST, 0); 1594 TULIP_WRITE(sc, CSR_TXLIST, 0); 1595 1596 /* 1597 * Release any queued transmit buffers. 1598 */ 1599 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1600 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1601 if (txs->txs_mbuf != NULL) { 1602 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1603 m_freem(txs->txs_mbuf); 1604 txs->txs_mbuf = NULL; 1605 } 1606 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1607 } 1608 1609 if (drain) { 1610 /* 1611 * Release the receive buffers. 1612 */ 1613 tlp_rxdrain(sc); 1614 } 1615 1616 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 1617 1618 /* 1619 * Mark the interface down and cancel the watchdog timer. 1620 */ 1621 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1622 ifp->if_timer = 0; 1623 } 1624 1625 #define SROM_EMIT(sc, x) \ 1626 do { \ 1627 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 1628 delay(1); \ 1629 } while (0) 1630 1631 /* 1632 * tlp_srom_idle: 1633 * 1634 * Put the SROM in idle state. 1635 */ 1636 void 1637 tlp_srom_idle(sc) 1638 struct tulip_softc *sc; 1639 { 1640 u_int32_t miirom; 1641 int i; 1642 1643 miirom = MIIROM_SR; 1644 SROM_EMIT(sc, miirom); 1645 1646 miirom |= MIIROM_RD; 1647 SROM_EMIT(sc, miirom); 1648 1649 miirom |= MIIROM_SROMCS; 1650 SROM_EMIT(sc, miirom); 1651 1652 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1653 1654 /* Strobe the clock 25 times. */ 1655 for (i = 0; i < 25; i++) { 1656 SROM_EMIT(sc, miirom); 1657 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1658 } 1659 1660 SROM_EMIT(sc, miirom); 1661 1662 miirom &= ~MIIROM_SROMCS; 1663 SROM_EMIT(sc, miirom); 1664 1665 SROM_EMIT(sc, 0); 1666 } 1667 1668 /* 1669 * tlp_read_srom: 1670 * 1671 * Read the Tulip SROM. 1672 */ 1673 void 1674 tlp_read_srom(sc, word, wordcnt, data) 1675 struct tulip_softc *sc; 1676 int word, wordcnt; 1677 u_int8_t *data; 1678 { 1679 u_int32_t miirom; 1680 u_int16_t datain; 1681 int i, x; 1682 1683 tlp_srom_idle(sc); 1684 1685 /* Select the SROM. */ 1686 miirom = MIIROM_SR; 1687 SROM_EMIT(sc, miirom); 1688 1689 miirom |= MIIROM_RD; 1690 SROM_EMIT(sc, miirom); 1691 1692 for (i = 0; i < wordcnt; i++) { 1693 /* Send CHIP SELECT for one clock tick. */ 1694 miirom |= MIIROM_SROMCS; 1695 SROM_EMIT(sc, miirom); 1696 1697 /* Shift in the READ opcode. */ 1698 for (x = 3; x > 0; x--) { 1699 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 1700 miirom |= MIIROM_SROMDI; 1701 else 1702 miirom &= ~MIIROM_SROMDI; 1703 SROM_EMIT(sc, miirom); 1704 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1705 SROM_EMIT(sc, miirom); 1706 } 1707 1708 /* Shift in address. */ 1709 for (x = 6; x > 0; x--) { 1710 if ((word + i) & (1 << (x - 1))) 1711 miirom |= MIIROM_SROMDI; 1712 else 1713 miirom &= ~MIIROM_SROMDI; 1714 SROM_EMIT(sc, miirom); 1715 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1716 SROM_EMIT(sc, miirom); 1717 } 1718 1719 /* Shift out data. */ 1720 miirom &= ~MIIROM_SROMDI; 1721 datain = 0; 1722 for (x = 16; x > 0; x--) { 1723 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1724 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 1725 datain |= (1 << (x - 1)); 1726 SROM_EMIT(sc, miirom); 1727 } 1728 data[2 * i] = datain & 0xff; 1729 data[(2 * i) + 1] = datain >> 8; 1730 1731 /* Clear CHIP SELECT. */ 1732 miirom &= ~MIIROM_SROMCS; 1733 SROM_EMIT(sc, miirom); 1734 } 1735 1736 /* Deselect the SROM. */ 1737 SROM_EMIT(sc, 0); 1738 1739 /* ...and idle it. */ 1740 tlp_srom_idle(sc); 1741 } 1742 1743 #undef SROM_EMIT 1744 1745 /* 1746 * tlp_add_rxbuf: 1747 * 1748 * Add a receive buffer to the indicated descriptor. 1749 */ 1750 int 1751 tlp_add_rxbuf(sc, idx) 1752 struct tulip_softc *sc; 1753 int idx; 1754 { 1755 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 1756 struct mbuf *m; 1757 int error; 1758 1759 MGETHDR(m, M_DONTWAIT, MT_DATA); 1760 if (m == NULL) 1761 return (ENOBUFS); 1762 1763 MCLGET(m, M_DONTWAIT); 1764 if ((m->m_flags & M_EXT) == 0) { 1765 m_freem(m); 1766 return (ENOBUFS); 1767 } 1768 1769 if (rxs->rxs_mbuf != NULL) 1770 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1771 1772 rxs->rxs_mbuf = m; 1773 1774 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 1775 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 1776 if (error) { 1777 printf("%s: can't load rx DMA map %d, error = %d\n", 1778 sc->sc_dev.dv_xname, idx, error); 1779 panic("tlp_add_rxbuf"); /* XXX */ 1780 } 1781 1782 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1783 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1784 1785 TULIP_INIT_RXDESC(sc, idx); 1786 1787 return (0); 1788 } 1789 1790 /* 1791 * tlp_crc32: 1792 * 1793 * Compute the 32-bit CRC of the provided buffer. 1794 */ 1795 u_int32_t 1796 tlp_crc32(buf, len) 1797 const u_int8_t *buf; 1798 size_t len; 1799 { 1800 static const u_int32_t crctab[] = { 1801 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 1802 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, 1803 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 1804 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c 1805 }; 1806 u_int32_t crc; 1807 int i; 1808 1809 crc = 0xffffffff; 1810 for (i = 0; i < len; i++) { 1811 crc ^= buf[i]; 1812 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1813 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1814 } 1815 return (crc); 1816 } 1817 1818 /* 1819 * tlp_srom_crcok: 1820 * 1821 * Check the CRC of the Tulip SROM. 1822 */ 1823 int 1824 tlp_srom_crcok(romdata) 1825 const u_int8_t *romdata; 1826 { 1827 u_int32_t crc; 1828 1829 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM); 1830 crc = (crc & 0xffff) ^ 0xffff; 1831 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 1832 return (1); 1833 return (0); 1834 } 1835 1836 /* 1837 * tlp_isv_srom: 1838 * 1839 * Check to see if the SROM is in the new standardized format. 1840 */ 1841 int 1842 tlp_isv_srom(romdata) 1843 const u_int8_t *romdata; 1844 { 1845 int i; 1846 u_int16_t cksum; 1847 1848 if (tlp_srom_crcok(romdata)) { 1849 /* 1850 * SROM CRC checks out; must be in the new format. 1851 */ 1852 return (1); 1853 } 1854 1855 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); 1856 if (cksum == 0xffff || cksum == 0) { 1857 /* 1858 * No checksum present. Check the SROM ID; 18 bytes of 0 1859 * followed by 1 (version) followed by the number of 1860 * adapters which use this SROM (should be non-zero). 1861 */ 1862 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { 1863 if (romdata[i] != 0) 1864 return (0); 1865 } 1866 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) 1867 return (0); 1868 if (romdata[TULIP_ROM_CHIP_COUNT] == 0) 1869 return (0); 1870 return (1); 1871 } 1872 1873 return (0); 1874 } 1875 1876 /* 1877 * tlp_isv_srom_enaddr: 1878 * 1879 * Get the Ethernet address from an ISV SROM. 1880 */ 1881 int 1882 tlp_isv_srom_enaddr(sc, enaddr) 1883 struct tulip_softc *sc; 1884 u_int8_t *enaddr; 1885 { 1886 int i, devcnt; 1887 1888 if (tlp_isv_srom(sc->sc_srom) == 0) 1889 return (0); 1890 1891 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 1892 for (i = 0; i < devcnt; i++) { 1893 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 1894 break; 1895 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 1896 sc->sc_devno) 1897 break; 1898 } 1899 1900 if (i == devcnt) 1901 return (0); 1902 1903 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], 1904 ETHER_ADDR_LEN); 1905 enaddr[5] += i; 1906 1907 return (1); 1908 } 1909 1910 /* 1911 * tlp_parse_old_srom: 1912 * 1913 * Parse old-format SROMs. 1914 * 1915 * This routine is largely lifted from Matt Thomas's `de' driver. 1916 */ 1917 int 1918 tlp_parse_old_srom(sc, enaddr) 1919 struct tulip_softc *sc; 1920 u_int8_t *enaddr; 1921 { 1922 static const u_int8_t testpat[] = 1923 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 1924 int i; 1925 u_int32_t cksum; 1926 1927 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 1928 /* 1929 * Some vendors (e.g. ZNYX) don't use the standard 1930 * DEC Address ROM format, but rather just have an 1931 * Ethernet address in the first 6 bytes, maybe a 1932 * 2 byte checksum, and then all 0xff's. 1933 */ 1934 for (i = 8; i < 32; i++) { 1935 if (sc->sc_srom[i] != 0xff) 1936 return (0); 1937 } 1938 1939 /* 1940 * Sanity check the Ethernet address: 1941 * 1942 * - Make sure it's not multicast or locally 1943 * assigned 1944 * - Make sure it has a non-0 OUI 1945 */ 1946 if (sc->sc_srom[0] & 3) 1947 return (0); 1948 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 1949 sc->sc_srom[2] == 0) 1950 return (0); 1951 1952 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1953 return (1); 1954 } 1955 1956 /* 1957 * Standard DEC Address ROM test. 1958 */ 1959 1960 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 1961 return (0); 1962 1963 for (i = 0; i < 8; i++) { 1964 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 1965 return (0); 1966 } 1967 1968 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1969 1970 cksum = *(u_int16_t *) &enaddr[0]; 1971 1972 cksum <<= 1; 1973 if (cksum > 0xffff) 1974 cksum -= 0xffff; 1975 1976 cksum += *(u_int16_t *) &enaddr[2]; 1977 if (cksum > 0xffff) 1978 cksum -= 0xffff; 1979 1980 cksum <<= 1; 1981 if (cksum > 0xffff) 1982 cksum -= 0xffff; 1983 1984 cksum += *(u_int16_t *) &enaddr[4]; 1985 if (cksum >= 0xffff) 1986 cksum -= 0xffff; 1987 1988 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 1989 return (0); 1990 1991 return (1); 1992 } 1993 1994 /* 1995 * tlp_filter_setup: 1996 * 1997 * Set the Tulip's receive filter. 1998 */ 1999 void 2000 tlp_filter_setup(sc) 2001 struct tulip_softc *sc; 2002 { 2003 struct ethercom *ec = &sc->sc_ethercom; 2004 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2005 struct ether_multi *enm; 2006 struct ether_multistep step; 2007 __volatile u_int32_t *sp; 2008 u_int8_t enaddr[ETHER_ADDR_LEN]; 2009 u_int32_t hash; 2010 int cnt; 2011 2012 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 2013 sc->sc_dev.dv_xname, sc->sc_flags)); 2014 2015 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 2016 2017 /* 2018 * If there are transmissions pending, wait until they have 2019 * completed. 2020 */ 2021 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 2022 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 2023 sc->sc_flags |= TULIPF_WANT_SETUP; 2024 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 2025 sc->sc_dev.dv_xname)); 2026 return; 2027 } 2028 sc->sc_flags &= ~TULIPF_WANT_SETUP; 2029 2030 /* 2031 * If we're running, idle the transmit and receive engines. If 2032 * we're NOT running, we're being called from tlp_init(), and our 2033 * writing OPMODE will start the transmit and receive processes 2034 * in motion. 2035 */ 2036 if (ifp->if_flags & IFF_RUNNING) { 2037 /* 2038 * Actually, some chips seem to need a really hard 2039 * kick in the head for this to work. The genuine 2040 * DEC chips can just be idled, but some of the 2041 * clones seem to REALLY want a reset here. Doing 2042 * the reset will end up here again, but with 2043 * IFF_RUNNING cleared. 2044 */ 2045 switch (sc->sc_chip) { 2046 case TULIP_CHIP_82C168: 2047 case TULIP_CHIP_82C169: 2048 tlp_init(sc); 2049 return; 2050 2051 default: 2052 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2053 } 2054 } 2055 2056 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2057 2058 if (ifp->if_flags & IFF_PROMISC) { 2059 sc->sc_opmode |= OPMODE_PR; 2060 goto allmulti; 2061 } 2062 2063 /* 2064 * Try Perfect filtering first. 2065 */ 2066 2067 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2068 sp = TULIP_CDSP(sc); 2069 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2070 cnt = 0; 2071 ETHER_FIRST_MULTI(step, ec, enm); 2072 while (enm != NULL) { 2073 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2074 /* 2075 * We must listen to a range of multicast addresses. 2076 * For now, just accept all multicasts, rather than 2077 * trying to set only those filter bits needed to match 2078 * the range. (At this time, the only use of address 2079 * ranges is for IP multicast routing, for which the 2080 * range is big enough to require all bits set.) 2081 */ 2082 goto allmulti; 2083 } 2084 if (cnt == (TULIP_MAXADDRS - 2)) { 2085 /* 2086 * We already have our multicast limit (still need 2087 * our station address and broadcast). Go to 2088 * Hash-Perfect mode. 2089 */ 2090 goto hashperfect; 2091 } 2092 *sp++ = ((u_int16_t *) enm->enm_addrlo)[0]; 2093 *sp++ = ((u_int16_t *) enm->enm_addrlo)[1]; 2094 *sp++ = ((u_int16_t *) enm->enm_addrlo)[2]; 2095 ETHER_NEXT_MULTI(step, enm); 2096 } 2097 2098 if (ifp->if_flags & IFF_BROADCAST) { 2099 /* ...and the broadcast address. */ 2100 cnt++; 2101 *sp++ = 0xffff; 2102 *sp++ = 0xffff; 2103 *sp++ = 0xffff; 2104 } 2105 2106 /* Pad the rest with our station address. */ 2107 for (; cnt < TULIP_MAXADDRS; cnt++) { 2108 *sp++ = ((u_int16_t *) enaddr)[0]; 2109 *sp++ = ((u_int16_t *) enaddr)[1]; 2110 *sp++ = ((u_int16_t *) enaddr)[2]; 2111 } 2112 ifp->if_flags &= ~IFF_ALLMULTI; 2113 goto setit; 2114 2115 hashperfect: 2116 /* 2117 * Try Hash-Perfect mode. 2118 */ 2119 2120 /* 2121 * Some 21140 chips have broken Hash-Perfect modes. On these 2122 * chips, we simply use Hash-Only mode, and put our station 2123 * address into the filter. 2124 */ 2125 if (sc->sc_chip == TULIP_CHIP_21140) 2126 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2127 else 2128 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2129 sp = TULIP_CDSP(sc); 2130 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2131 ETHER_FIRST_MULTI(step, ec, enm); 2132 while (enm != NULL) { 2133 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2134 /* 2135 * We must listen to a range of multicast addresses. 2136 * For now, just accept all multicasts, rather than 2137 * trying to set only those filter bits needed to match 2138 * the range. (At this time, the only use of address 2139 * ranges is for IP multicast routing, for which the 2140 * range is big enough to require all bits set.) 2141 */ 2142 goto allmulti; 2143 } 2144 hash = tlp_mchash(enm->enm_addrlo); 2145 sp[hash >> 4] |= 1 << (hash & 0xf); 2146 ETHER_NEXT_MULTI(step, enm); 2147 } 2148 2149 if (ifp->if_flags & IFF_BROADCAST) { 2150 /* ...and the broadcast address. */ 2151 hash = tlp_mchash(etherbroadcastaddr); 2152 sp[hash >> 4] |= 1 << (hash & 0xf); 2153 } 2154 2155 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2156 /* ...and our station address. */ 2157 hash = tlp_mchash(enaddr); 2158 sp[hash >> 4] |= 1 << (hash & 0xf); 2159 } else { 2160 /* 2161 * Hash-Perfect mode; put our station address after 2162 * the hash table. 2163 */ 2164 sp[39] = ((u_int16_t *) enaddr)[0]; 2165 sp[40] = ((u_int16_t *) enaddr)[1]; 2166 sp[41] = ((u_int16_t *) enaddr)[2]; 2167 } 2168 ifp->if_flags &= ~IFF_ALLMULTI; 2169 goto setit; 2170 2171 allmulti: 2172 /* 2173 * Use Perfect filter mode. First address is the broadcast address, 2174 * and pad the rest with our station address. We'll set Pass-all- 2175 * multicast in OPMODE below. 2176 */ 2177 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2178 sp = TULIP_CDSP(sc); 2179 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2180 cnt = 0; 2181 if (ifp->if_flags & IFF_BROADCAST) { 2182 cnt++; 2183 *sp++ = 0xffff; 2184 *sp++ = 0xffff; 2185 *sp++ = 0xffff; 2186 } 2187 for (; cnt < TULIP_MAXADDRS; cnt++) { 2188 *sp++ = ((u_int16_t *) enaddr)[0]; 2189 *sp++ = ((u_int16_t *) enaddr)[1]; 2190 *sp++ = ((u_int16_t *) enaddr)[2]; 2191 } 2192 ifp->if_flags |= IFF_ALLMULTI; 2193 2194 setit: 2195 if (ifp->if_flags & IFF_ALLMULTI) 2196 sc->sc_opmode |= OPMODE_PM; 2197 2198 /* Sync the setup packet buffer. */ 2199 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2200 2201 /* 2202 * Fill in the setup packet descriptor. 2203 */ 2204 sc->sc_setup_desc.td_bufaddr1 = TULIP_CDSPADDR(sc); 2205 sc->sc_setup_desc.td_bufaddr2 = TULIP_CDTXADDR(sc, sc->sc_txnext); 2206 sc->sc_setup_desc.td_ctl = 2207 (TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2208 sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS | 2209 TDCTL_Tx_IC | TDCTL_CH; 2210 sc->sc_setup_desc.td_status = TDSTAT_OWN; 2211 TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2212 2213 /* 2214 * Write the address of the setup descriptor. This also has 2215 * the side effect of giving the transmit ring to the chip, 2216 * since the setup descriptor points to the next available 2217 * descriptor in the ring. 2218 */ 2219 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc)); 2220 2221 /* 2222 * Set the OPMODE register. This will also resume the 2223 * transmit transmit process we idled above. 2224 */ 2225 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2226 2227 sc->sc_flags |= TULIPF_DOING_SETUP; 2228 2229 /* 2230 * Kick the transmitter; this will cause the Tulip to 2231 * read the setup descriptor. 2232 */ 2233 /* XXX USE AUTOPOLLING? */ 2234 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2235 2236 /* Set up a watchdog timer in case the chip flakes out. */ 2237 ifp->if_timer = 5; 2238 2239 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2240 } 2241 2242 /* 2243 * tlp_winb_filter_setup: 2244 * 2245 * Set the Winbond 89C840F's receive filter. 2246 */ 2247 void 2248 tlp_winb_filter_setup(sc) 2249 struct tulip_softc *sc; 2250 { 2251 struct ethercom *ec = &sc->sc_ethercom; 2252 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2253 struct ether_multi *enm; 2254 struct ether_multistep step; 2255 u_int32_t hash, mchash[2]; 2256 2257 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2258 sc->sc_dev.dv_xname, sc->sc_flags)); 2259 2260 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2261 2262 if (ifp->if_flags & IFF_MULTICAST) 2263 sc->sc_opmode |= OPMODE_WINB_AMP; 2264 2265 if (ifp->if_flags & IFF_BROADCAST) 2266 sc->sc_opmode |= OPMODE_WINB_ABP; 2267 2268 if (ifp->if_flags & IFF_PROMISC) { 2269 sc->sc_opmode |= OPMODE_WINB_APP; 2270 goto allmulti; 2271 } 2272 2273 mchash[0] = mchash[1] = 0; 2274 2275 ETHER_FIRST_MULTI(step, ec, enm); 2276 while (enm != NULL) { 2277 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2278 /* 2279 * We must listen to a range of multicast addresses. 2280 * For now, just accept all multicasts, rather than 2281 * trying to set only those filter bits needed to match 2282 * the range. (At this time, the only use of address 2283 * ranges is for IP multicast routing, for which the 2284 * range is big enough to require all bits set.) 2285 */ 2286 goto allmulti; 2287 } 2288 2289 /* 2290 * According to the FreeBSD `wb' driver, yes, you 2291 * really do invert the hash. 2292 */ 2293 hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2294 & 0x3f; 2295 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2296 ETHER_NEXT_MULTI(step, enm); 2297 } 2298 ifp->if_flags &= ~IFF_ALLMULTI; 2299 goto setit; 2300 2301 allmulti: 2302 ifp->if_flags |= IFF_ALLMULTI; 2303 mchash[0] = mchash[1] = 0xffffffff; 2304 2305 setit: 2306 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2307 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2308 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2309 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2310 sc->sc_dev.dv_xname)); 2311 } 2312 2313 /* 2314 * tlp_idle: 2315 * 2316 * Cause the transmit and/or receive processes to go idle. 2317 */ 2318 void 2319 tlp_idle(sc, bits) 2320 struct tulip_softc *sc; 2321 u_int32_t bits; 2322 { 2323 static const char *tx_state_names[] = { 2324 "STOPPED", 2325 "RUNNING - FETCH", 2326 "RUNNING - WAIT", 2327 "RUNNING - READING", 2328 "-- RESERVED --", 2329 "RUNNING - SETUP", 2330 "SUSPENDED", 2331 "RUNNING - CLOSE", 2332 }; 2333 static const char *rx_state_names[] = { 2334 "STOPPED", 2335 "RUNNING - FETCH", 2336 "RUNNING - CHECK", 2337 "RUNNING - WAIT", 2338 "SUSPENDED", 2339 "RUNNING - CLOSE", 2340 "RUNNING - FLUSH", 2341 "RUNNING - QUEUE", 2342 }; 2343 u_int32_t csr, ackmask = 0; 2344 int i; 2345 2346 if (bits & OPMODE_ST) 2347 ackmask |= STATUS_TPS; 2348 2349 if (bits & OPMODE_SR) 2350 ackmask |= STATUS_RPS; 2351 2352 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2353 2354 for (i = 0; i < 1000; i++) { 2355 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2356 break; 2357 delay(10); 2358 } 2359 2360 csr = TULIP_READ(sc, CSR_STATUS); 2361 if ((csr & ackmask) != ackmask) { 2362 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2363 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2364 printf("%s: transmit process failed to idle: " 2365 "state %s\n", sc->sc_dev.dv_xname, 2366 tx_state_names[(csr & STATUS_TS) >> 20]); 2367 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2368 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2369 printf("%s: receive process failed to idle: " 2370 "state %s\n", sc->sc_dev.dv_xname, 2371 rx_state_names[(csr & STATUS_RS) >> 17]); 2372 } 2373 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2374 } 2375 2376 /***************************************************************************** 2377 * Generic media support functions. 2378 *****************************************************************************/ 2379 2380 /* 2381 * tlp_mediastatus: [ifmedia interface function] 2382 * 2383 * Query the current media. 2384 */ 2385 void 2386 tlp_mediastatus(ifp, ifmr) 2387 struct ifnet *ifp; 2388 struct ifmediareq *ifmr; 2389 { 2390 struct tulip_softc *sc = ifp->if_softc; 2391 2392 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2393 } 2394 2395 /* 2396 * tlp_mediachange: [ifmedia interface function] 2397 * 2398 * Update the current media. 2399 */ 2400 int 2401 tlp_mediachange(ifp) 2402 struct ifnet *ifp; 2403 { 2404 struct tulip_softc *sc = ifp->if_softc; 2405 2406 return ((*sc->sc_mediasw->tmsw_set)(sc)); 2407 } 2408 2409 /***************************************************************************** 2410 * Support functions for MII-attached media. 2411 *****************************************************************************/ 2412 2413 /* 2414 * tlp_mii_tick: 2415 * 2416 * One second timer, used to tick the MII. 2417 */ 2418 void 2419 tlp_mii_tick(arg) 2420 void *arg; 2421 { 2422 struct tulip_softc *sc = arg; 2423 int s; 2424 2425 s = splnet(); 2426 mii_tick(&sc->sc_mii); 2427 splx(s); 2428 2429 timeout(sc->sc_tick, sc, hz); 2430 } 2431 2432 /* 2433 * tlp_mii_statchg: [mii interface function] 2434 * 2435 * Callback from PHY when media changes. 2436 */ 2437 void 2438 tlp_mii_statchg(self) 2439 struct device *self; 2440 { 2441 struct tulip_softc *sc = (struct tulip_softc *)self; 2442 2443 /* Idle the transmit and receive processes. */ 2444 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2445 2446 /* 2447 * XXX What about Heartbeat Disable? Is it magically frobbed 2448 * XXX by the PHY? I hope so... 2449 */ 2450 2451 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 2452 2453 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 2454 sc->sc_opmode |= OPMODE_TTM; 2455 2456 if (sc->sc_mii.mii_media_active & IFM_FDX) 2457 sc->sc_opmode |= OPMODE_FD; 2458 2459 /* 2460 * Write new OPMODE bits. This also restarts the transmit 2461 * and receive processes. 2462 */ 2463 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2464 2465 /* XXX Update ifp->if_baudrate */ 2466 } 2467 2468 /* 2469 * tlp_winb_mii_statchg: [mii interface function] 2470 * 2471 * Callback from PHY when media changes. This version is 2472 * for the Winbond 89C840F, which has different OPMODE bits. 2473 */ 2474 void 2475 tlp_winb_mii_statchg(self) 2476 struct device *self; 2477 { 2478 struct tulip_softc *sc = (struct tulip_softc *)self; 2479 2480 /* Idle the transmit and receive processes. */ 2481 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2482 2483 /* 2484 * XXX What about Heartbeat Disable? Is it magically frobbed 2485 * XXX by the PHY? I hope so... 2486 */ 2487 2488 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 2489 2490 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 2491 sc->sc_opmode |= OPMODE_WINB_FES; 2492 2493 if (sc->sc_mii.mii_media_active & IFM_FDX) 2494 sc->sc_opmode |= OPMODE_FD; 2495 2496 /* 2497 * Write new OPMODE bits. This also restarts the transmit 2498 * and receive processes. 2499 */ 2500 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2501 2502 /* XXX Update ifp->if_baudrate */ 2503 } 2504 2505 /* 2506 * tlp_mii_getmedia: 2507 * 2508 * Callback from ifmedia to request current media status. 2509 */ 2510 void 2511 tlp_mii_getmedia(sc, ifmr) 2512 struct tulip_softc *sc; 2513 struct ifmediareq *ifmr; 2514 { 2515 2516 mii_pollstat(&sc->sc_mii); 2517 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2518 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2519 } 2520 2521 /* 2522 * tlp_mii_setmedia: 2523 * 2524 * Callback from ifmedia to request new media setting. 2525 */ 2526 int 2527 tlp_mii_setmedia(sc) 2528 struct tulip_softc *sc; 2529 { 2530 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2531 2532 if (ifp->if_flags & IFF_UP) 2533 mii_mediachg(&sc->sc_mii); 2534 return (0); 2535 } 2536 2537 #define MII_EMIT(sc, x) \ 2538 do { \ 2539 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2540 delay(1); \ 2541 } while (0) 2542 2543 /* 2544 * tlp_sio_mii_sync: 2545 * 2546 * Synchronize the SIO-attached MII. 2547 */ 2548 void 2549 tlp_sio_mii_sync(sc) 2550 struct tulip_softc *sc; 2551 { 2552 u_int32_t miirom; 2553 int i; 2554 2555 miirom = MIIROM_MDO; 2556 2557 MII_EMIT(sc, miirom); 2558 for (i = 0; i < 32; i++) { 2559 MII_EMIT(sc, miirom | MIIROM_MDC); 2560 MII_EMIT(sc, miirom); 2561 } 2562 } 2563 2564 /* 2565 * tlp_sio_mii_sendbits: 2566 * 2567 * Send a series of bits out the SIO to the MII. 2568 */ 2569 void 2570 tlp_sio_mii_sendbits(sc, data, nbits) 2571 struct tulip_softc *sc; 2572 u_int32_t data; 2573 int nbits; 2574 { 2575 u_int32_t miirom, i; 2576 2577 miirom = 0; 2578 MII_EMIT(sc, miirom); 2579 2580 for (i = 1 << (nbits - 1); i != 0; i >>= 1) { 2581 if (data & i) 2582 miirom |= MIIROM_MDO; 2583 else 2584 miirom &= ~MIIROM_MDO; 2585 MII_EMIT(sc, miirom); 2586 MII_EMIT(sc, miirom|MIIROM_MDC); 2587 MII_EMIT(sc, miirom); 2588 } 2589 } 2590 2591 /* 2592 * tlp_sio_mii_readreg: 2593 * 2594 * Read a PHY register via SIO-attached MII. 2595 */ 2596 int 2597 tlp_sio_mii_readreg(self, phy, reg) 2598 struct device *self; 2599 int phy, reg; 2600 { 2601 struct tulip_softc *sc = (void *) self; 2602 int val = 0, err = 0, i; 2603 2604 tlp_sio_mii_sync(sc); 2605 2606 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2607 tlp_sio_mii_sendbits(sc, MII_COMMAND_READ, 2); 2608 tlp_sio_mii_sendbits(sc, phy, 5); 2609 tlp_sio_mii_sendbits(sc, reg, 5); 2610 2611 /* Switch direction to PHY->host, without a clock transition. */ 2612 MII_EMIT(sc, MIIROM_MIIDIR); 2613 2614 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2615 MII_EMIT(sc, MIIROM_MIIDIR); 2616 2617 err = TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI); 2618 2619 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2620 MII_EMIT(sc, MIIROM_MIIDIR); 2621 2622 for (i = 0; i < 16; i++) { 2623 val <<= 1; 2624 /* Read data prior to clock low-high transition. */ 2625 if (err == 0 && TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI)) 2626 val |= 1; 2627 2628 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2629 MII_EMIT(sc, MIIROM_MIIDIR); 2630 } 2631 2632 /* Set direction to host->PHY, without a clock transition. */ 2633 MII_EMIT(sc, 0); 2634 2635 return (err ? 0 : val); 2636 } 2637 2638 /* 2639 * tlp_sio_mii_writereg: 2640 * 2641 * Write a PHY register via SIO-attached MII. 2642 */ 2643 void 2644 tlp_sio_mii_writereg(self, phy, reg, val) 2645 struct device *self; 2646 int phy, reg, val; 2647 { 2648 struct tulip_softc *sc = (void *) self; 2649 2650 tlp_sio_mii_sync(sc); 2651 2652 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2653 tlp_sio_mii_sendbits(sc, MII_COMMAND_WRITE, 2); 2654 tlp_sio_mii_sendbits(sc, phy, 5); 2655 tlp_sio_mii_sendbits(sc, reg, 5); 2656 tlp_sio_mii_sendbits(sc, MII_COMMAND_ACK, 2); 2657 tlp_sio_mii_sendbits(sc, val, 16); 2658 2659 MII_EMIT(sc, 0); 2660 } 2661 2662 #undef MII_EMIT 2663 2664 /* 2665 * tlp_pnic_mii_readreg: 2666 * 2667 * Read a PHY register on the Lite-On PNIC. 2668 */ 2669 int 2670 tlp_pnic_mii_readreg(self, phy, reg) 2671 struct device *self; 2672 int phy, reg; 2673 { 2674 struct tulip_softc *sc = (void *) self; 2675 u_int32_t val; 2676 int i; 2677 2678 TULIP_WRITE(sc, CSR_PNIC_MII, 2679 PNIC_MII_MBO | PNIC_MII_RESERVED | 2680 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 2681 (reg << PNIC_MII_REGSHIFT)); 2682 2683 for (i = 0; i < 1000; i++) { 2684 delay(10); 2685 val = TULIP_READ(sc, CSR_PNIC_MII); 2686 if ((val & PNIC_MII_BUSY) == 0) { 2687 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 2688 return (0); 2689 else 2690 return (val & PNIC_MII_DATA); 2691 } 2692 } 2693 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 2694 return (0); 2695 } 2696 2697 /* 2698 * tlp_pnic_mii_writereg: 2699 * 2700 * Write a PHY register on the Lite-On PNIC. 2701 */ 2702 void 2703 tlp_pnic_mii_writereg(self, phy, reg, val) 2704 struct device *self; 2705 int phy, reg, val; 2706 { 2707 struct tulip_softc *sc = (void *) self; 2708 int i; 2709 2710 TULIP_WRITE(sc, CSR_PNIC_MII, 2711 PNIC_MII_MBO | PNIC_MII_RESERVED | 2712 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 2713 (reg << PNIC_MII_REGSHIFT) | val); 2714 2715 for (i = 0; i < 1000; i++) { 2716 delay(10); 2717 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 2718 return; 2719 } 2720 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 2721 } 2722 2723 /***************************************************************************** 2724 * Chip-specific pre-init and reset functions. 2725 *****************************************************************************/ 2726 2727 /* 2728 * tlp_2114x_preinit: 2729 * 2730 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 2731 */ 2732 void 2733 tlp_2114x_preinit(sc) 2734 struct tulip_softc *sc; 2735 { 2736 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2737 struct tulip_2114x_media *tm = ife->ifm_aux; 2738 2739 /* 2740 * Always set the Must-Be-One bit. 2741 */ 2742 sc->sc_opmode |= OPMODE_MBO; 2743 2744 if (tm != NULL && 2745 (tm->tm_type == TULIP_ROM_MB_21140_MII || 2746 tm->tm_type == TULIP_ROM_MB_21142_MII)) { 2747 /* 2748 * MII case: just set the port-select bit; we will never 2749 * be called during a media change. 2750 */ 2751 sc->sc_opmode |= OPMODE_PS; 2752 goto set_opmode; 2753 } 2754 2755 /* 2756 * ENDEC/PCS mode; set according to selected media type. 2757 * XXX Auto-sense not supported yet. 2758 */ 2759 sc->sc_opmode |= tm->tm_opmode; 2760 2761 set_opmode: 2762 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2763 } 2764 2765 /* 2766 * tlp_pnic_preinit: 2767 * 2768 * Pre-init function for the Lite-On 82c168 and 82c169. 2769 */ 2770 void 2771 tlp_pnic_preinit(sc) 2772 struct tulip_softc *sc; 2773 { 2774 2775 if (sc->sc_flags & TULIPF_HAS_MII) { 2776 /* 2777 * MII case: just set the port-select bit; we will never 2778 * be called during a media change. 2779 */ 2780 sc->sc_opmode |= OPMODE_PS; 2781 } else { 2782 /* 2783 * ENDEC/PCS/Nway mode; enable the Tx backoff counter. 2784 */ 2785 sc->sc_opmode |= OPMODE_PNIC_TBEN; 2786 } 2787 } 2788 2789 /* 2790 * tlp_21140_reset: 2791 * 2792 * Issue a reset sequence on the 21140 via the GPIO facility. 2793 */ 2794 void 2795 tlp_21140_reset(sc) 2796 struct tulip_softc *sc; 2797 { 2798 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2799 struct tulip_2114x_media *tm = ife->ifm_aux; 2800 int i; 2801 2802 /* First, set the direction on the GPIO pins. */ 2803 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 2804 2805 /* Now, issue the reset sequence. */ 2806 for (i = 0; i < tm->tm_reset_length; i++) { 2807 delay(10); 2808 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]); 2809 } 2810 2811 /* Now, issue the selection sequence. */ 2812 for (i = 0; i < tm->tm_gp_length; i++) { 2813 delay(10); 2814 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]); 2815 } 2816 2817 /* If there were no sequences, just lower the pins. */ 2818 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) 2819 TULIP_WRITE(sc, CSR_GPP, 0); 2820 } 2821 2822 /***************************************************************************** 2823 * Chip/board-specific media switches. The ones here are ones that 2824 * are potentially common to multiple front-ends. 2825 *****************************************************************************/ 2826 2827 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = { 2828 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0, 2829 "10baseT", SIACONN_21041_10BASET, 2830 SIATXRX_21041_10BASET, SIAGEN_21041_10BASET }, 2831 2832 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0, 2833 "10base2", SIACONN_21041_BNC, 2834 SIATXRX_21041_BNC, SIAGEN_21041_BNC }, 2835 2836 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0, 2837 "10base5", SIACONN_21041_AUI, 2838 SIATXRX_21041_AUI, SIAGEN_21041_AUI }, 2839 2840 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0, 2841 "100baseTX", 0, 2842 0, 0 }, 2843 2844 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX, 2845 "10baseT-FDX", SIACONN_21041_10BASET_FDX, 2846 SIATXRX_21041_10BASET_FDX, SIAGEN_21041_10BASET_FDX }, 2847 2848 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX, 2849 "100baseTX-FDX", 0, 2850 0, 0 }, 2851 2852 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0, 2853 "100baseT4", 0, 2854 0, 0 }, 2855 2856 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0, 2857 "100baseFX", 0, 2858 0, 0 }, 2859 2860 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX, 2861 "100baseFX-FDX", 0, 2862 0, 0 }, 2863 2864 { 0, 0, 0, 2865 NULL, 0, 2866 0, 0 }, 2867 }; 2868 2869 const struct tulip_srom_to_ifmedia *tulip_srom_to_ifmedia __P((u_int8_t)); 2870 2871 const struct tulip_srom_to_ifmedia * 2872 tulip_srom_to_ifmedia(sm) 2873 u_int8_t sm; 2874 { 2875 const struct tulip_srom_to_ifmedia *tsti; 2876 2877 for (tsti = tulip_srom_to_ifmedia_table; 2878 tsti->tsti_name != NULL; tsti++) { 2879 if (tsti->tsti_srom == sm) 2880 return (tsti); 2881 } 2882 2883 return (NULL); 2884 } 2885 2886 /* 2887 * 21040 and 21041 media switches. 2888 */ 2889 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 2890 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 2891 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 2892 void tlp_21041_tmsw_init __P((struct tulip_softc *)); 2893 void tlp_21040_21041_tmsw_get __P((struct tulip_softc *, 2894 struct ifmediareq *)); 2895 int tlp_21040_21041_tmsw_set __P((struct tulip_softc *)); 2896 2897 const struct tulip_mediasw tlp_21040_mediasw = { 2898 tlp_21040_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2899 }; 2900 2901 const struct tulip_mediasw tlp_21040_tp_mediasw = { 2902 tlp_21040_tp_tmsw_init, tlp_21040_21041_tmsw_get, 2903 tlp_21040_21041_tmsw_set 2904 }; 2905 2906 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 2907 tlp_21040_auibnc_tmsw_init, tlp_21040_21041_tmsw_get, 2908 tlp_21040_21041_tmsw_set 2909 }; 2910 2911 const struct tulip_mediasw tlp_21041_mediasw = { 2912 tlp_21041_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2913 }; 2914 2915 #define ADD(m, t) ifmedia_add(&sc->sc_mii.mii_media, (m), 0, (t)) 2916 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 2917 2918 void 2919 tlp_21040_tmsw_init(sc) 2920 struct tulip_softc *sc; 2921 { 2922 struct tulip_21040_21041_sia_media *tsm; 2923 const char *sep = ""; 2924 2925 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2926 tlp_mediastatus); 2927 2928 printf("%s: ", sc->sc_dev.dv_xname); 2929 2930 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2931 M_WAITOK); 2932 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2933 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2934 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2935 ADD(IFM_ETHER|IFM_10_T, tsm); 2936 PRINT("10baseT"); 2937 2938 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2939 M_WAITOK); 2940 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2941 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2942 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2943 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2944 PRINT("10baseT-FDX"); 2945 2946 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2947 M_WAITOK); 2948 tsm->tsm_siaconn = SIACONN_21040_AUI; 2949 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2950 tsm->tsm_siagen = SIAGEN_21040_AUI; 2951 ADD(IFM_ETHER|IFM_10_5, tsm); 2952 PRINT("10base5"); 2953 2954 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2955 M_WAITOK); 2956 tsm->tsm_siaconn = SIACONN_21040_EXTSIA; 2957 tsm->tsm_siatxrx = SIATXRX_21040_EXTSIA; 2958 tsm->tsm_siagen = SIAGEN_21040_EXTSIA; 2959 ADD(IFM_ETHER|IFM_MANUAL, tsm); 2960 PRINT("manual"); 2961 2962 /* 2963 * XXX Autosense not yet supported. 2964 */ 2965 2966 /* XXX This should be auto-sense. */ 2967 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2968 printf(", default 10baseT"); 2969 2970 printf("\n"); 2971 } 2972 2973 void 2974 tlp_21040_tp_tmsw_init(sc) 2975 struct tulip_softc *sc; 2976 { 2977 struct tulip_21040_21041_sia_media *tsm; 2978 const char *sep = ""; 2979 2980 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2981 tlp_mediastatus); 2982 2983 printf("%s: ", sc->sc_dev.dv_xname); 2984 2985 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2986 M_WAITOK); 2987 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2988 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2989 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2990 ADD(IFM_ETHER|IFM_10_T, tsm); 2991 PRINT("10baseT"); 2992 2993 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2994 M_WAITOK); 2995 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2996 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2997 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2998 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2999 PRINT("10baseT-FDX"); 3000 3001 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 3002 printf(", default 10baseT"); 3003 3004 printf("\n"); 3005 } 3006 3007 void 3008 tlp_21040_auibnc_tmsw_init(sc) 3009 struct tulip_softc *sc; 3010 { 3011 struct tulip_21040_21041_sia_media *tsm; 3012 const char *sep = ""; 3013 3014 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3015 tlp_mediastatus); 3016 3017 printf("%s: ", sc->sc_dev.dv_xname); 3018 3019 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3020 M_WAITOK); 3021 tsm->tsm_siaconn = SIACONN_21040_AUI; 3022 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 3023 tsm->tsm_siagen = SIAGEN_21040_AUI; 3024 ADD(IFM_ETHER|IFM_10_5, tsm); 3025 PRINT("10base5"); 3026 3027 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 3028 3029 printf("\n"); 3030 } 3031 3032 void 3033 tlp_21041_tmsw_init(sc) 3034 struct tulip_softc *sc; 3035 { 3036 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt; 3037 const struct tulip_srom_to_ifmedia *tsti; 3038 struct tulip_21040_21041_sia_media *tsm; 3039 const char *sep = "", *defstr; 3040 u_int16_t romdef; 3041 u_int8_t mb; 3042 3043 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3044 tlp_mediastatus); 3045 3046 printf("%s: ", sc->sc_dev.dv_xname); 3047 3048 if (tlp_isv_srom(sc->sc_srom) == 0) 3049 goto not_isv_srom; 3050 3051 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 3052 for (i = 0; i < devcnt; i++) { 3053 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 3054 break; 3055 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 3056 sc->sc_devno) 3057 break; 3058 } 3059 3060 if (i == devcnt) 3061 goto not_isv_srom; 3062 3063 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 3064 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 3065 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE; 3066 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 3067 3068 for (; m_cnt != 0; 3069 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) { 3070 mb = sc->sc_srom[mb_offset]; 3071 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), 3072 M_DEVBUF, M_WAITOK); 3073 switch (mb & TULIP_ROM_MB_MEDIA_CODE) { 3074 case TULIP_ROM_MB_MEDIA_TP: 3075 case TULIP_ROM_MB_MEDIA_BNC: 3076 case TULIP_ROM_MB_MEDIA_AUI: 3077 case TULIP_ROM_MB_MEDIA_TP_FDX: 3078 tsti = tulip_srom_to_ifmedia(mb & 3079 TULIP_ROM_MB_MEDIA_CODE); 3080 3081 tsm->tsm_siaconn = (mb & TULIP_ROM_MB_EXT) ? 3082 TULIP_ROM_GETW(sc->sc_srom, 3083 mb_offset + TULIP_ROM_MB_CSR13) : 3084 tsti->tsti_21041_siaconn; 3085 tsm->tsm_siatxrx = (mb & TULIP_ROM_MB_EXT) ? 3086 TULIP_ROM_GETW(sc->sc_srom, 3087 mb_offset + TULIP_ROM_MB_CSR14) : 3088 tsti->tsti_21041_siatxrx; 3089 tsm->tsm_siagen = (mb & TULIP_ROM_MB_EXT) ? 3090 TULIP_ROM_GETW(sc->sc_srom, 3091 mb_offset + TULIP_ROM_MB_CSR15) : 3092 tsti->tsti_21041_siagen; 3093 3094 ifmedia_add(&sc->sc_mii.mii_media, 3095 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 3096 tsti->tsti_options, 0), 0, tsm); 3097 PRINT(tsti->tsti_name); 3098 break; 3099 3100 default: 3101 printf("%s<unknown 0x%02x>", sep, 3102 (mb & TULIP_ROM_MB_MEDIA_CODE)); 3103 sep = ", "; 3104 free(tsm, M_DEVBUF); 3105 } 3106 } 3107 3108 /* 3109 * XXX Autosense not yet supported. 3110 */ 3111 3112 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset + 3113 TULIP_ROM_IL_SELECT_CONN_TYPE); 3114 switch (romdef) { 3115 case SELECT_CONN_TYPE_TP: 3116 case SELECT_CONN_TYPE_TP_AUTONEG: 3117 case SELECT_CONN_TYPE_TP_NOLINKPASS: 3118 defmedia = IFM_ETHER|IFM_10_T; 3119 defstr = "10baseT"; 3120 break; 3121 3122 case SELECT_CONN_TYPE_TP_FDX: 3123 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX; 3124 defstr = "10baseT-FDX"; 3125 break; 3126 3127 case SELECT_CONN_TYPE_BNC: 3128 defmedia = IFM_ETHER|IFM_10_2; 3129 defstr = "10base2"; 3130 break; 3131 3132 case SELECT_CONN_TYPE_AUI: 3133 defmedia = IFM_ETHER|IFM_10_5; 3134 defstr = "10base5"; 3135 break; 3136 #if 0 /* XXX */ 3137 case SELECT_CONN_TYPE_ASENSE: 3138 case SELECT_CONN_TYPE_ASENSE_AUTONEG: 3139 defmedia = IFM_ETHER|IFM_AUTO; 3140 defstr = "auto"; 3141 break; 3142 #endif 3143 default: 3144 defmedia = 0; 3145 defstr = NULL; 3146 } 3147 3148 if (defmedia != 0) 3149 printf(", default %s\n", defstr); 3150 else { 3151 /* 3152 * XXX We should default to auto-sense. 3153 */ 3154 defmedia = IFM_ETHER|IFM_10_T; 3155 defstr = "10baseT"; 3156 3157 printf("\n%s: unknown default media in SROM (0x%04x), " 3158 "using %s\n", sc->sc_dev.dv_xname, romdef, defstr); 3159 } 3160 3161 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 3162 return; 3163 3164 not_isv_srom: 3165 /* 3166 * If we have a board without the standard 21041 SROM format, 3167 * we just assume all media are present and try and pick a 3168 * reasonable default. 3169 */ 3170 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3171 M_WAITOK); 3172 tsm->tsm_siaconn = SIACONN_21041_10BASET; 3173 tsm->tsm_siatxrx = SIATXRX_21041_10BASET; 3174 tsm->tsm_siagen = SIAGEN_21041_10BASET; 3175 ADD(IFM_ETHER|IFM_10_T, tsm); 3176 PRINT("10baseT"); 3177 3178 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3179 M_WAITOK); 3180 tsm->tsm_siaconn = SIACONN_21041_10BASET_FDX; 3181 tsm->tsm_siatxrx = SIATXRX_21041_10BASET_FDX; 3182 tsm->tsm_siagen = SIAGEN_21041_10BASET_FDX; 3183 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 3184 PRINT("10baseT-FDX"); 3185 3186 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3187 M_WAITOK); 3188 tsm->tsm_siaconn = SIACONN_21041_BNC; 3189 tsm->tsm_siatxrx = SIATXRX_21041_BNC; 3190 tsm->tsm_siagen = SIAGEN_21041_BNC; 3191 ADD(IFM_ETHER|IFM_10_2|IFM_FDX, tsm); 3192 PRINT("10base2"); 3193 3194 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 3195 M_WAITOK); 3196 tsm->tsm_siaconn = SIACONN_21041_AUI; 3197 tsm->tsm_siatxrx = SIATXRX_21041_AUI; 3198 tsm->tsm_siagen = SIAGEN_21041_AUI; 3199 ADD(IFM_ETHER|IFM_10_5|IFM_FDX, tsm); 3200 PRINT("10base5"); 3201 3202 /* 3203 * XXX Autosense not yet supported. 3204 */ 3205 3206 /* XXX This should be auto-sense. */ 3207 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 3208 printf(", default 10baseT"); 3209 3210 printf("\n"); 3211 } 3212 3213 #undef ADD 3214 #undef PRINT 3215 3216 void 3217 tlp_21040_21041_tmsw_get(sc, ifmr) 3218 struct tulip_softc *sc; 3219 struct ifmediareq *ifmr; 3220 { 3221 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3222 3223 ifmr->ifm_status = 0; 3224 3225 switch (IFM_SUBTYPE(ife->ifm_media)) { 3226 case IFM_AUTO: 3227 /* 3228 * XXX Implement autosensing case. 3229 */ 3230 break; 3231 3232 case IFM_10_T: 3233 /* 3234 * We're able to detect link directly on twisted pair. 3235 */ 3236 ifmr->ifm_status = IFM_AVALID; 3237 if (TULIP_ISSET(sc, CSR_SIASTAT, SIASTAT_LKF) == 0) 3238 ifmr->ifm_status |= IFM_ACTIVE; 3239 /* FALLTHROUGH */ 3240 default: 3241 /* 3242 * If not autosensing, active media is the currently 3243 * selected media. 3244 */ 3245 ifmr->ifm_active = ife->ifm_media; 3246 } 3247 } 3248 3249 int 3250 tlp_21040_21041_tmsw_set(sc) 3251 struct tulip_softc *sc; 3252 { 3253 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3254 struct tulip_21040_21041_sia_media *tsm; 3255 3256 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 3257 /* 3258 * If not autosensing, just pull the SIA settings out 3259 * of the media entry. 3260 */ 3261 tsm = ife->ifm_aux; 3262 TULIP_WRITE(sc, CSR_SIACONN, SIACONN_SRL); 3263 TULIP_WRITE(sc, CSR_SIATXRX, tsm->tsm_siatxrx); 3264 TULIP_WRITE(sc, CSR_SIAGEN, tsm->tsm_siagen); 3265 TULIP_WRITE(sc, CSR_SIACONN, tsm->tsm_siaconn); 3266 3267 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3268 sc->sc_opmode &= ~OPMODE_FD; 3269 if (ife->ifm_media & IFM_FDX) 3270 sc->sc_opmode |= OPMODE_FD; 3271 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3272 } else { 3273 /* 3274 * XXX Implement autosensing case. 3275 */ 3276 } 3277 3278 return (0); 3279 } 3280 3281 /* 3282 * DECchip 2114x ISV media switch. 3283 * XXX Currently only handles 21140[A] GPR and MII. 3284 */ 3285 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *)); 3286 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 3287 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *)); 3288 3289 const struct tulip_mediasw tlp_2114x_isv_mediasw = { 3290 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 3291 }; 3292 3293 void tlp_21140_gpr_getmedia __P((struct tulip_softc *sc, 3294 struct ifmediareq *ifmr)); 3295 int tlp_21140_gpr_setmedia __P((struct tulip_softc *sc)); 3296 3297 void 3298 tlp_2114x_isv_tmsw_init(sc) 3299 struct tulip_softc *sc; 3300 { 3301 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3302 struct ifmedia_entry *ife; 3303 struct mii_softc *phy; 3304 struct tulip_2114x_media *tm; 3305 const struct tulip_srom_to_ifmedia *tsti; 3306 int i, devcnt, leaf_offset, m_cnt, type, length, seen, defmedia, minst; 3307 u_int16_t word; 3308 u_int8_t *cp, *ncp; 3309 3310 seen = defmedia = 0; 3311 3312 sc->sc_mii.mii_ifp = ifp; 3313 sc->sc_mii.mii_readreg = tlp_sio_mii_readreg; 3314 sc->sc_mii.mii_writereg = tlp_sio_mii_writereg; 3315 sc->sc_mii.mii_statchg = sc->sc_statchg; 3316 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3317 tlp_mediastatus); 3318 3319 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 3320 for (i = 0; i < devcnt; i++) { 3321 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 3322 break; 3323 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 3324 sc->sc_devno) 3325 break; 3326 } 3327 3328 if (i == devcnt) { 3329 printf("%s: unable to locate info leaf in SROM\n", 3330 sc->sc_dev.dv_xname); 3331 return; 3332 } 3333 3334 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 3335 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 3336 3337 /* XXX SELECT CONN TYPE */ 3338 3339 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 3340 3341 /* 3342 * On some chips, the first thing in the Info Leaf is the 3343 * GPIO pin direction data. 3344 */ 3345 switch (sc->sc_chip) { 3346 case TULIP_CHIP_21140: 3347 case TULIP_CHIP_21140A: 3348 case TULIP_CHIP_MX98713: 3349 case TULIP_CHIP_MX98713A: 3350 case TULIP_CHIP_AX88140: 3351 case TULIP_CHIP_AX88141: 3352 sc->sc_gp_dir = *cp++; 3353 break; 3354 3355 default: 3356 /* Nothing. */ 3357 } 3358 3359 /* Get the media count. */ 3360 m_cnt = *cp++; 3361 3362 for (; m_cnt != 0; cp = ncp, m_cnt--) { 3363 /* 3364 * Determine the type and length of this media block. 3365 */ 3366 if ((*cp & 0x80) == 0) { 3367 length = 4; 3368 type = TULIP_ROM_MB_21140_GPR; 3369 } else { 3370 length = (*cp++ & 0x7f) - 1; 3371 type = *cp++ & 0x3f; 3372 } 3373 3374 /* Compute the start of the next block. */ 3375 ncp = cp + length; 3376 3377 /* Now, parse the block. */ 3378 switch (type) { 3379 case TULIP_ROM_MB_21140_GPR: 3380 seen |= 1 << TULIP_ROM_MB_21140_GPR; 3381 3382 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 3383 memset(tm, 0, sizeof(*tm)); 3384 3385 tm->tm_type = TULIP_ROM_MB_21140_GPR; 3386 tm->tm_get = tlp_21140_gpr_getmedia; 3387 tm->tm_set = tlp_21140_gpr_setmedia; 3388 3389 minst = 0; /* XXX compute new instance */ 3390 3391 /* First is the media type code. */ 3392 tsti = tulip_srom_to_ifmedia(cp[0] & 3393 TULIP_ROM_MB_MEDIA_CODE); 3394 if (tsti == NULL) { 3395 /* Invalid media code. */ 3396 free(tm, M_DEVBUF); 3397 break; 3398 } 3399 tm->tm_name = tsti->tsti_name; 3400 3401 /* Next is any GPIO info for this media. */ 3402 tm->tm_gpdata = cp[1]; 3403 3404 /* 3405 * Next is a word containing OPMODE information 3406 * and info on how to detect if this media is 3407 * active. 3408 */ 3409 word = TULIP_ROM_GETW(cp, 2); 3410 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 3411 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 3412 tm->tm_actmask = 3413 TULIP_ROM_MB_BITPOS(word); 3414 tm->tm_actdata = 3415 (word & TULIP_ROM_MB_POLARITY) ? 3416 0 : tm->tm_actmask; 3417 } 3418 3419 /* 3420 * Now, add the media to our list. We will 3421 * print them out later. 3422 */ 3423 ifmedia_add(&sc->sc_mii.mii_media, 3424 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 3425 tsti->tsti_options, minst), 0, tm); 3426 break; 3427 3428 case TULIP_ROM_MB_21140_MII: 3429 seen |= 1 << TULIP_ROM_MB_21140_MII; 3430 3431 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 3432 memset(tm, 0, sizeof(*tm)); 3433 3434 tm->tm_type = TULIP_ROM_MB_21140_MII; 3435 tm->tm_get = tlp_mii_getmedia; 3436 tm->tm_set = tlp_mii_setmedia; 3437 3438 if (sc->sc_reset == NULL) 3439 sc->sc_reset = tlp_21140_reset; 3440 3441 /* First is the PHY number. */ 3442 tm->tm_phyno = *cp++; 3443 3444 /* Next is the MII select sequence length and offset. */ 3445 tm->tm_gp_length = *cp++; 3446 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 3447 cp += tm->tm_gp_length; 3448 3449 /* Next is the MII reset sequence length and offset. */ 3450 tm->tm_reset_length = *cp++; 3451 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 3452 cp += tm->tm_reset_length; 3453 3454 /* 3455 * The following items are left in the media block 3456 * that we don't particularly care about: 3457 * 3458 * capabilities W 3459 * advertisement W 3460 * full duplex W 3461 * tx threshold W 3462 * 3463 * These appear to be bits in the PHY registers, 3464 * which our MII code handles on its own. 3465 */ 3466 3467 /* 3468 * Before we probe the MII bus, we need to reset 3469 * it and issue the selection sequence. 3470 */ 3471 3472 /* Set the direction of the pins... */ 3473 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 3474 3475 for (i = 0; i < tm->tm_reset_length; i++) { 3476 delay(10); 3477 TULIP_WRITE(sc, CSR_GPP, 3478 sc->sc_srom[tm->tm_reset_offset + i]); 3479 } 3480 3481 for (i = 0; i < tm->tm_gp_length; i++) { 3482 delay(10); 3483 TULIP_WRITE(sc, CSR_GPP, 3484 sc->sc_srom[tm->tm_gp_offset + i]); 3485 } 3486 3487 /* If there were no sequences, just lower the pins. */ 3488 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 3489 delay(10); 3490 TULIP_WRITE(sc, CSR_GPP, 0); 3491 } 3492 3493 /* 3494 * Now, probe the MII for the PHY. Note, we know 3495 * the location of the PHY on the bus, but we don't 3496 * particularly care; the MII code just likes to 3497 * search the whole thing anyhow. 3498 */ 3499 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 3500 3501 /* 3502 * Now, search for the PHY we hopefully just 3503 * configured. If it's not configured into the 3504 * kernel, we lose. The PHY's default media always 3505 * takes priority. 3506 */ 3507 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 3508 phy != NULL; 3509 phy = LIST_NEXT(phy, mii_list)) 3510 if (phy->mii_offset == tm->tm_phyno) 3511 break; 3512 if (phy == NULL) { 3513 printf("%s: unable to configure MII\n", 3514 sc->sc_dev.dv_xname); 3515 break; 3516 } 3517 3518 sc->sc_flags |= TULIPF_HAS_MII; 3519 sc->sc_tick = tlp_mii_tick; 3520 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 3521 phy->mii_inst); 3522 3523 /* 3524 * Okay, now that we've found the PHY and the MII 3525 * layer has added all of the media associated 3526 * with that PHY, we need to traverse the media 3527 * list, and add our `tm' to each entry's `aux' 3528 * pointer. 3529 * 3530 * We do this by looking for media with our 3531 * PHY's `instance'. 3532 */ 3533 for (ife = LIST_FIRST(&sc->sc_mii.mii_media.ifm_list); 3534 ife != NULL; 3535 ife = LIST_NEXT(ife, ifm_list)) { 3536 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 3537 continue; 3538 ife->ifm_aux = tm; 3539 } 3540 break; 3541 3542 case TULIP_ROM_MB_21142_SIA: 3543 printf("%s: 21142 SIA block\n", sc->sc_dev.dv_xname); 3544 break; 3545 3546 case TULIP_ROM_MB_21142_MII: 3547 printf("%s: 21142 MII block\n", sc->sc_dev.dv_xname); 3548 break; 3549 3550 case TULIP_ROM_MB_21143_SYM: 3551 printf("%s: 21143 SYM block\n", sc->sc_dev.dv_xname); 3552 break; 3553 3554 case TULIP_ROM_MB_21143_RESET: 3555 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname); 3556 break; 3557 3558 default: 3559 printf("%s: unknown ISV media block type 0x%02x\n", 3560 sc->sc_dev.dv_xname, type); 3561 } 3562 } 3563 3564 /* 3565 * Deal with the case where no media is configured. 3566 */ 3567 if (LIST_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) { 3568 printf("%s: no media found!\n", sc->sc_dev.dv_xname); 3569 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 3570 defmedia = IFM_ETHER|IFM_NONE; 3571 goto set_default; 3572 } 3573 3574 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3575 3576 /* 3577 * Display any non-MII media we've located. 3578 */ 3579 if (seen & (1 << TULIP_ROM_MB_21140_GPR)) { 3580 const char *sep = ""; 3581 printf("%s: GPR media: ", sc->sc_dev.dv_xname); 3582 for (ife = LIST_FIRST(&sc->sc_mii.mii_media.ifm_list); 3583 ife != NULL; 3584 ife = LIST_NEXT(ife, ifm_list)) { 3585 minst = IFM_INST(ife->ifm_media); 3586 tm = ife->ifm_aux; 3587 if (tm->tm_type != TULIP_ROM_MB_21140_GPR) 3588 continue; 3589 PRINT(tm->tm_name); 3590 } 3591 3592 /* 3593 * XXX Pick a better default. Should come 3594 * XXX from SROM on 21140[A], and should 3595 * XXX be "auto" on Macronix chips (which 3596 * XXX have an internal NWay block). 3597 */ 3598 if (defmedia == 0) { 3599 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 3600 minst); 3601 printf(", default 10baseT"); 3602 } 3603 printf("\n"); 3604 } 3605 3606 if (seen & (1 << TULIP_ROM_MB_21142_SIA)) { 3607 printf("%s: SIA media: ", sc->sc_dev.dv_xname); 3608 /* XXX */ 3609 printf("\n"); 3610 } 3611 3612 if (seen & (1 << TULIP_ROM_MB_21143_SYM)) { 3613 printf("%s: SYM media: ", sc->sc_dev.dv_xname); 3614 /* XXX */ 3615 printf("\n"); 3616 } 3617 3618 /* 3619 * XXX Display default media if not MII. 3620 */ 3621 3622 #undef PRINT 3623 3624 set_default: 3625 /* 3626 * Set the default media. 3627 * 3628 * XXX Should make some attempt to care about the SROM default 3629 * setting, but we don't. 3630 */ 3631 #ifdef DIAGNOSTIC 3632 if (defmedia == 0) 3633 panic("tlp_2114x_isv_tmsw_init: no default media"); 3634 #endif 3635 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 3636 } 3637 3638 void 3639 tlp_2114x_isv_tmsw_get(sc, ifmr) 3640 struct tulip_softc *sc; 3641 struct ifmediareq *ifmr; 3642 { 3643 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3644 struct tulip_2114x_media *tm = ife->ifm_aux; 3645 3646 (*tm->tm_get)(sc, ifmr); 3647 } 3648 3649 int 3650 tlp_2114x_isv_tmsw_set(sc) 3651 struct tulip_softc *sc; 3652 { 3653 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3654 struct tulip_2114x_media *tm = ife->ifm_aux; 3655 3656 return ((*tm->tm_set)(sc)); 3657 } 3658 3659 void 3660 tlp_21140_gpr_getmedia(sc, ifmr) 3661 struct tulip_softc *sc; 3662 struct ifmediareq *ifmr; 3663 { 3664 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3665 struct tulip_2114x_media *tm = ife->ifm_aux; 3666 3667 ifmr->ifm_status = 0; 3668 3669 switch (IFM_SUBTYPE(ife->ifm_media)) { 3670 case IFM_AUTO: 3671 /* 3672 * XXX Implement autosensing case. 3673 */ 3674 break; 3675 3676 default: 3677 /* 3678 * If not autosensing, active media is the currently 3679 * selected media. 3680 */ 3681 ifmr->ifm_active = ife->ifm_media; 3682 3683 /* 3684 * If we can sense the active status of the link, 3685 * so do. 3686 */ 3687 if (tm->tm_actmask != 0) { 3688 ifmr->ifm_status |= IFM_AVALID; 3689 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) == 3690 tm->tm_actdata) 3691 ifmr->ifm_status |= IFM_ACTIVE; 3692 } 3693 } 3694 } 3695 3696 int 3697 tlp_21140_gpr_setmedia(sc) 3698 struct tulip_softc *sc; 3699 { 3700 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3701 struct tulip_2114x_media *tm = ife->ifm_aux; 3702 3703 switch (IFM_SUBTYPE(ife->ifm_media)) { 3704 case IFM_AUTO: 3705 /* 3706 * XXX Implement autosensing case. 3707 */ 3708 break; 3709 3710 default: 3711 /* 3712 * The ifmedia entry contains the OPMODE bits necessary 3713 * to enable this media type. It may be necessary to 3714 * perform a reset of the chip; see tlp_21140_reset(). 3715 */ 3716 if ((tm->tm_opmode & OPMODE_MEDIA_BITS) != 3717 (sc->sc_opmode & OPMODE_MEDIA_BITS)) { 3718 /* 3719 * We have to reset the chip. Note that we 3720 * won't recurse into this path again as 3721 * the OPMODE bits will be correct this 3722 * next time through. 3723 */ 3724 return (tlp_init(sc)); 3725 } 3726 3727 /* 3728 * Set new OPMODE bits and write the OPMODE register. 3729 */ 3730 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3731 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | 3732 tm->tm_opmode; 3733 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3734 3735 /* 3736 * Set the GPIO pins for this media, to flip any 3737 * relays, etc. 3738 */ 3739 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 3740 delay(10); 3741 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata); 3742 break; 3743 } 3744 3745 return (0); 3746 } 3747 3748 /* 3749 * MII-on-SIO media switch. Handles only MII attached to the SIO. 3750 */ 3751 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 3752 3753 const struct tulip_mediasw tlp_sio_mii_mediasw = { 3754 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 3755 }; 3756 3757 void 3758 tlp_sio_mii_tmsw_init(sc) 3759 struct tulip_softc *sc; 3760 { 3761 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3762 3763 sc->sc_mii.mii_ifp = ifp; 3764 sc->sc_mii.mii_readreg = tlp_sio_mii_readreg; 3765 sc->sc_mii.mii_writereg = tlp_sio_mii_writereg; 3766 sc->sc_mii.mii_statchg = sc->sc_statchg; 3767 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3768 tlp_mediastatus); 3769 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 3770 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 3771 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 3772 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 3773 } else { 3774 sc->sc_flags |= TULIPF_HAS_MII; 3775 sc->sc_tick = tlp_mii_tick; 3776 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3777 } 3778 } 3779 3780 /* 3781 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 3782 */ 3783 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 3784 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 3785 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 3786 3787 const struct tulip_mediasw tlp_pnic_mediasw = { 3788 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 3789 }; 3790 3791 void tlp_pnic_nway_statchg __P((struct device *)); 3792 void tlp_pnic_nway_tick __P((void *)); 3793 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 3794 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 3795 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 3796 void tlp_pnic_nway_auto_timeout __P((void *)); 3797 void tlp_pnic_nway_status __P((struct tulip_softc *)); 3798 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 3799 3800 void 3801 tlp_pnic_tmsw_init(sc) 3802 struct tulip_softc *sc; 3803 { 3804 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3805 const char *sep = ""; 3806 3807 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 3808 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3809 3810 sc->sc_mii.mii_ifp = ifp; 3811 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 3812 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 3813 sc->sc_mii.mii_statchg = sc->sc_statchg; 3814 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 3815 tlp_mediastatus); 3816 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 3817 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 3818 /* XXX What about AUI/BNC support? */ 3819 printf("%s: ", sc->sc_dev.dv_xname); 3820 3821 tlp_pnic_nway_reset(sc); 3822 3823 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 3824 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 3825 PRINT("10baseT"); 3826 3827 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 3828 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 3829 PRINT("10baseT-FDX"); 3830 3831 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 3832 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 3833 PRINT("100baseTX"); 3834 3835 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 3836 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 3837 PNIC_NWAY_CAP100TXFDX); 3838 PRINT("100baseTX-FDX"); 3839 3840 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 3841 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 3842 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 3843 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 3844 PRINT("auto"); 3845 3846 printf("\n"); 3847 3848 sc->sc_statchg = tlp_pnic_nway_statchg; 3849 sc->sc_tick = tlp_pnic_nway_tick; 3850 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3851 } else { 3852 sc->sc_flags |= TULIPF_HAS_MII; 3853 sc->sc_tick = tlp_mii_tick; 3854 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 3855 } 3856 3857 #undef ADD 3858 #undef PRINT 3859 } 3860 3861 void 3862 tlp_pnic_tmsw_get(sc, ifmr) 3863 struct tulip_softc *sc; 3864 struct ifmediareq *ifmr; 3865 { 3866 struct mii_data *mii = &sc->sc_mii; 3867 3868 if (sc->sc_flags & TULIPF_HAS_MII) 3869 tlp_mii_getmedia(sc, ifmr); 3870 else { 3871 mii->mii_media_status = 0; 3872 mii->mii_media_active = IFM_NONE; 3873 tlp_pnic_nway_service(sc, MII_POLLSTAT); 3874 ifmr->ifm_status = sc->sc_mii.mii_media_status; 3875 ifmr->ifm_active = sc->sc_mii.mii_media_active; 3876 } 3877 } 3878 3879 int 3880 tlp_pnic_tmsw_set(sc) 3881 struct tulip_softc *sc; 3882 { 3883 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3884 struct mii_data *mii = &sc->sc_mii; 3885 3886 if (sc->sc_flags & TULIPF_HAS_MII) { 3887 /* 3888 * Make sure the built-in Tx jabber timer is disabled. 3889 */ 3890 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 3891 3892 return (tlp_mii_setmedia(sc)); 3893 } 3894 3895 if (ifp->if_flags & IFF_UP) { 3896 mii->mii_media_status = 0; 3897 mii->mii_media_active = IFM_NONE; 3898 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 3899 } 3900 3901 return (0); 3902 } 3903 3904 void 3905 tlp_pnic_nway_statchg(self) 3906 struct device *self; 3907 { 3908 struct tulip_softc *sc = (struct tulip_softc *)self; 3909 3910 /* Idle the transmit and receive processes. */ 3911 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3912 3913 /* 3914 * XXX What about Heartbeat Disable? Is it magically frobbed 3915 * XXX by the PHY? I hope so... 3916 */ 3917 3918 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 3919 OPMODE_SCR); 3920 3921 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 3922 sc->sc_opmode |= OPMODE_TTM; 3923 TULIP_WRITE(sc, CSR_GPP, 3924 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 3925 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3926 } else { 3927 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR; 3928 TULIP_WRITE(sc, CSR_GPP, 3929 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 3930 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3931 } 3932 3933 if (sc->sc_mii.mii_media_active & IFM_FDX) 3934 sc->sc_opmode |= OPMODE_FD; 3935 3936 /* 3937 * Write new OPMODE bits. This also restarts the transmit 3938 * and receive processes. 3939 */ 3940 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3941 3942 /* XXX Update ifp->if_baudrate */ 3943 } 3944 3945 void 3946 tlp_pnic_nway_tick(arg) 3947 void *arg; 3948 { 3949 struct tulip_softc *sc = arg; 3950 int s; 3951 3952 s = splnet(); 3953 tlp_pnic_nway_service(sc, MII_TICK); 3954 splx(s); 3955 3956 timeout(tlp_pnic_nway_tick, sc, hz); 3957 } 3958 3959 /* 3960 * Support for the Lite-On PNIC internal NWay block. This is constructed 3961 * somewhat like a PHY driver for simplicity. 3962 */ 3963 3964 int 3965 tlp_pnic_nway_service(sc, cmd) 3966 struct tulip_softc *sc; 3967 int cmd; 3968 { 3969 struct mii_data *mii = &sc->sc_mii; 3970 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3971 3972 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 3973 return (0); 3974 3975 switch (cmd) { 3976 case MII_POLLSTAT: 3977 /* Nothing special to do here. */ 3978 break; 3979 3980 case MII_MEDIACHG: 3981 switch (IFM_SUBTYPE(ife->ifm_media)) { 3982 case IFM_AUTO: 3983 (void) tlp_pnic_nway_auto(sc, 1); 3984 break; 3985 case IFM_100_T4: 3986 /* 3987 * XXX Not supported as a manual setting right now. 3988 */ 3989 return (EINVAL); 3990 default: 3991 /* 3992 * NWAY register data is stored in the ifmedia entry. 3993 */ 3994 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3995 } 3996 break; 3997 3998 case MII_TICK: 3999 /* 4000 * Only used for autonegotiation. 4001 */ 4002 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4003 return (0); 4004 4005 /* 4006 * Check to see if we have link. If we do, we don't 4007 * need to restart the autonegotiation process. 4008 */ 4009 if (sc->sc_flags & TULIPF_LINK_UP) 4010 return (0); 4011 4012 /* 4013 * Only retry autonegotiation every 5 seconds. 4014 */ 4015 if (++sc->sc_nway_ticks != 5) 4016 return (0); 4017 4018 sc->sc_nway_ticks = 0; 4019 tlp_pnic_nway_reset(sc); 4020 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 4021 return (0); 4022 break; 4023 } 4024 4025 /* Update the media status. */ 4026 tlp_pnic_nway_status(sc); 4027 4028 /* Callback if something changed. */ 4029 if (sc->sc_nway_active != mii->mii_media_active || 4030 cmd == MII_MEDIACHG) { 4031 (*sc->sc_statchg)(&sc->sc_dev); 4032 sc->sc_nway_active = mii->mii_media_active; 4033 } 4034 return (0); 4035 } 4036 4037 void 4038 tlp_pnic_nway_reset(sc) 4039 struct tulip_softc *sc; 4040 { 4041 4042 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 4043 delay(100); 4044 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 4045 } 4046 4047 int 4048 tlp_pnic_nway_auto(sc, waitfor) 4049 struct tulip_softc *sc; 4050 int waitfor; 4051 { 4052 struct mii_data *mii = &sc->sc_mii; 4053 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 4054 u_int32_t reg; 4055 int i; 4056 4057 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 4058 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 4059 4060 if (waitfor) { 4061 /* Wait 500ms for it to complete. */ 4062 for (i = 0; i < 500; i++) { 4063 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 4064 if (reg & PNIC_NWAY_LPAR_MASK) { 4065 tlp_pnic_nway_acomp(sc); 4066 return (0); 4067 } 4068 delay(1000); 4069 } 4070 #if 0 4071 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 4072 printf("%s: autonegotiation failed to complete\n", 4073 sc->sc_dev.dv_xname); 4074 #endif 4075 4076 /* 4077 * Don't need to worry about clearing DOINGAUTO. 4078 * If that's set, a timeout is pending, and it will 4079 * clear the flag. 4080 */ 4081 return (EIO); 4082 } 4083 4084 /* 4085 * Just let it finish asynchronously. This is for the benefit of 4086 * the tick handler driving autonegotiation. Don't want 500ms 4087 * delays all the time while the system is running! 4088 */ 4089 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 4090 sc->sc_flags |= TULIPF_DOINGAUTO; 4091 timeout(tlp_pnic_nway_auto_timeout, sc, hz >> 1); 4092 } 4093 return (EJUSTRETURN); 4094 } 4095 4096 void 4097 tlp_pnic_nway_auto_timeout(arg) 4098 void *arg; 4099 { 4100 struct tulip_softc *sc = arg; 4101 u_int32_t reg; 4102 int s; 4103 4104 s = splnet(); 4105 sc->sc_flags &= ~TULIPF_DOINGAUTO; 4106 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 4107 #if 0 4108 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 4109 printf("%s: autonegotiation failed to complete\n", 4110 sc->sc_dev.dv_xname); 4111 #endif 4112 4113 tlp_pnic_nway_acomp(sc); 4114 4115 /* Update the media status. */ 4116 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 4117 splx(s); 4118 } 4119 4120 void 4121 tlp_pnic_nway_status(sc) 4122 struct tulip_softc *sc; 4123 { 4124 struct mii_data *mii = &sc->sc_mii; 4125 u_int32_t reg; 4126 4127 mii->mii_media_status = IFM_AVALID; 4128 mii->mii_media_active = IFM_ETHER; 4129 4130 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 4131 4132 if (sc->sc_flags & TULIPF_LINK_UP) 4133 mii->mii_media_status |= IFM_ACTIVE; 4134 4135 if (reg & PNIC_NWAY_NW) { 4136 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 4137 /* Erg, still trying, I guess... */ 4138 mii->mii_media_active |= IFM_NONE; 4139 return; 4140 } 4141 4142 #if 0 4143 if (reg & PNIC_NWAY_LPAR100T4) 4144 mii->mii_media_active |= IFM_100_T4; 4145 else 4146 #endif 4147 if (reg & PNIC_NWAY_LPAR100TXFDX) 4148 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 4149 else if (reg & PNIC_NWAY_LPAR100TX) 4150 mii->mii_media_active |= IFM_100_TX; 4151 else if (reg & PNIC_NWAY_LPAR10TFDX) 4152 mii->mii_media_active |= IFM_10_T|IFM_FDX; 4153 else if (reg & PNIC_NWAY_LPAR10T) 4154 mii->mii_media_active |= IFM_10_T; 4155 else 4156 mii->mii_media_active |= IFM_NONE; 4157 } else { 4158 if (reg & PNIC_NWAY_100) 4159 mii->mii_media_active |= IFM_100_TX; 4160 else 4161 mii->mii_media_active |= IFM_10_T; 4162 if (reg & PNIC_NWAY_FD) 4163 mii->mii_media_active |= IFM_FDX; 4164 } 4165 } 4166 4167 void 4168 tlp_pnic_nway_acomp(sc) 4169 struct tulip_softc *sc; 4170 { 4171 u_int32_t reg; 4172 4173 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 4174 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 4175 4176 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 4177 reg |= PNIC_NWAY_100; 4178 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 4179 reg |= PNIC_NWAY_FD; 4180 4181 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 4182 } 4183
Indexes created Wed Sep 24 05:09:52 GMT 2025