tulip.c revision 1.3
1 /* $NetBSD: tulip.c,v 1.3 1999/09/01 20:11:19 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <vm/vm.h> /* for PAGE_SIZE */ 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #endif 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/if_inarp.h> 73 #endif 74 75 #ifdef NS 76 #include <netns/ns.h> 77 #include <netns/ns_if.h> 78 #endif 79 80 #include <machine/bus.h> 81 #include <machine/intr.h> 82 83 #include <dev/mii/mii.h> 84 #include <dev/mii/miivar.h> 85 86 #include <dev/ic/tulipreg.h> 87 #include <dev/ic/tulipvar.h> 88 89 /* 90 * The following tables compute the transmit threshold mode. We start 91 * at index 0. When ever we get a transmit underrun, we increment our 92 * index, falling back if we encounter the NULL terminator. 93 * 94 * Note: Store and forward mode is only available on the 100mbps chips 95 * (21140 and higher). 96 */ 97 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = { 98 { OPMODE_TR_72, "72 bytes" }, 99 { OPMODE_TR_96, "96 bytes" }, 100 { OPMODE_TR_128, "128 bytes" }, 101 { OPMODE_TR_160, "160 bytes" }, 102 { 0, NULL }, 103 }; 104 105 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = { 106 { OPMODE_TR_72, "72/128 bytes" }, 107 { OPMODE_TR_96, "96/256 bytes" }, 108 { OPMODE_TR_128, "128/512 bytes" }, 109 { OPMODE_TR_160, "160/1024 bytes" }, 110 { OPMODE_SF, "store and forward mode" }, 111 { 0, NULL }, 112 }; 113 114 #define TXTH_72 0 115 #define TXTH_96 1 116 #define TXTH_128 2 117 #define TXTH_160 3 118 #define TXTH_SF 4 119 120 void tlp_start __P((struct ifnet *)); 121 void tlp_watchdog __P((struct ifnet *)); 122 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 123 124 void tlp_shutdown __P((void *)); 125 126 void tlp_reset __P((struct tulip_softc *)); 127 int tlp_init __P((struct tulip_softc *)); 128 void tlp_rxdrain __P((struct tulip_softc *)); 129 void tlp_stop __P((struct tulip_softc *, int)); 130 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 131 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 132 void tlp_srom_idle __P((struct tulip_softc *)); 133 134 void tlp_filter_setup __P((struct tulip_softc *)); 135 void tlp_winb_filter_setup __P((struct tulip_softc *)); 136 137 void tlp_rxintr __P((struct tulip_softc *)); 138 void tlp_txintr __P((struct tulip_softc *)); 139 140 void tlp_mii_tick __P((void *)); 141 void tlp_mii_statchg __P((struct device *)); 142 143 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 144 int tlp_mii_setmedia __P((struct tulip_softc *)); 145 146 void tlp_sio_mii_sync __P((struct tulip_softc *)); 147 void tlp_sio_mii_sendbits __P((struct tulip_softc *, u_int32_t, int)); 148 int tlp_sio_mii_readreg __P((struct device *, int, int)); 149 void tlp_sio_mii_writereg __P((struct device *, int, int, int)); 150 151 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 152 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 153 154 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t)); 155 #define tlp_mchash(addr) (tlp_crc32((addr), ETHER_ADDR_LEN) & \ 156 (TULIP_MCHASHSIZE - 1)) 157 158 #ifdef TLP_DEBUG 159 #define DPRINTF(x) printf x 160 #else 161 #define DPRINTF(x) /* nothing */ 162 #endif 163 164 /* 165 * tlp_attach: 166 * 167 * Attach a Tulip interface to the system. 168 */ 169 void 170 tlp_attach(sc, name, enaddr) 171 struct tulip_softc *sc; 172 const char *name; 173 const u_int8_t *enaddr; 174 { 175 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 176 int i, rseg, error; 177 bus_dma_segment_t seg; 178 179 /* 180 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 181 */ 182 183 /* 184 * Setup the transmit threshold table. 185 */ 186 switch (sc->sc_chip) { 187 case TULIP_CHIP_DE425: 188 case TULIP_CHIP_21040: 189 case TULIP_CHIP_21041: 190 sc->sc_txth = tlp_10_txthresh_tab; 191 break; 192 193 default: 194 sc->sc_txth = tlp_10_100_txthresh_tab; 195 break; 196 } 197 198 /* 199 * Setup the filter setup function. 200 */ 201 switch (sc->sc_chip) { 202 case TULIP_CHIP_WB89C840F: 203 sc->sc_filter_setup = tlp_winb_filter_setup; 204 break; 205 206 default: 207 sc->sc_filter_setup = tlp_filter_setup; 208 break; 209 } 210 211 /* 212 * Set up various chip-specific quirks. 213 */ 214 switch (sc->sc_chip) { 215 case TULIP_CHIP_82C168: 216 case TULIP_CHIP_82C169: 217 /* 218 * These chips seem to have busted DMA engines; just put them 219 * in Store-and-Forward mode from the get-go. 220 */ 221 sc->sc_txthresh = TXTH_SF; 222 break; 223 224 case TULIP_CHIP_WB89C840F: 225 sc->sc_flags |= TULIPF_IC_FS; 226 break; 227 228 default: 229 /* Nothing. */ 230 } 231 232 SIMPLEQ_INIT(&sc->sc_txfreeq); 233 SIMPLEQ_INIT(&sc->sc_txdirtyq); 234 235 /* 236 * Allocate the control data structures, and create and load the 237 * DMA map for it. 238 */ 239 if ((error = bus_dmamem_alloc(sc->sc_dmat, 240 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg, 241 0)) != 0) { 242 printf("%s: unable to allocate control data, error = %d\n", 243 sc->sc_dev.dv_xname, error); 244 goto fail_0; 245 } 246 247 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 248 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 249 BUS_DMA_COHERENT)) != 0) { 250 printf("%s: unable to map control data, error = %d\n", 251 sc->sc_dev.dv_xname, error); 252 goto fail_1; 253 } 254 255 if ((error = bus_dmamap_create(sc->sc_dmat, 256 sizeof(struct tulip_control_data), 1, 257 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 258 printf("%s: unable to create control data DMA map, " 259 "error = %d\n", sc->sc_dev.dv_xname, error); 260 goto fail_2; 261 } 262 263 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 264 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 265 0)) != 0) { 266 printf("%s: unable to load control data DMA map, error = %d\n", 267 sc->sc_dev.dv_xname, error); 268 goto fail_3; 269 } 270 271 /* 272 * Create the transmit buffer DMA maps. 273 */ 274 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 275 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 276 TULIP_NTXSEGS, MCLBYTES, 0, 0, 277 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 278 printf("%s: unable to create tx DMA map %d, " 279 "error = %d\n", sc->sc_dev.dv_xname, i, error); 280 goto fail_4; 281 } 282 } 283 284 /* 285 * Create the recieve buffer DMA maps. 286 */ 287 for (i = 0; i < TULIP_NRXDESC; i++) { 288 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 289 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 290 printf("%s: unable to create rx DMA map %d, " 291 "error = %d\n", sc->sc_dev.dv_xname, i, error); 292 goto fail_5; 293 } 294 sc->sc_rxsoft[i].rxs_mbuf = NULL; 295 } 296 297 /* 298 * Reset the chip to a known state. 299 */ 300 tlp_reset(sc); 301 302 /* Announce ourselves. */ 303 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 304 name != NULL ? name : "", name != NULL ? ", " : "", 305 ether_sprintf(enaddr)); 306 307 /* 308 * Initialize our media structures. This may probe the MII, if 309 * present. 310 */ 311 (*sc->sc_mediasw->tmsw_init)(sc); 312 313 ifp = &sc->sc_ethercom.ec_if; 314 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 315 ifp->if_softc = sc; 316 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 317 ifp->if_ioctl = tlp_ioctl; 318 ifp->if_start = tlp_start; 319 ifp->if_watchdog = tlp_watchdog; 320 321 /* 322 * Attach the interface. 323 */ 324 if_attach(ifp); 325 ether_ifattach(ifp, enaddr); 326 #if NBPFILTER > 0 327 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 328 sizeof(struct ether_header)); 329 #endif 330 331 /* 332 * Make sure the interface is shutdown during reboot. 333 */ 334 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 335 if (sc->sc_sdhook == NULL) 336 printf("%s: WARNING: unable to establish shutdown hook\n", 337 sc->sc_dev.dv_xname); 338 return; 339 340 /* 341 * Free any resources we've allocated during the failed attach 342 * attempt. Do this in reverse order and fall through. 343 */ 344 fail_5: 345 for (i = 0; i < TULIP_NRXDESC; i++) { 346 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 347 bus_dmamap_destroy(sc->sc_dmat, 348 sc->sc_rxsoft[i].rxs_dmamap); 349 } 350 fail_4: 351 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 352 if (sc->sc_txsoft[i].txs_dmamap != NULL) 353 bus_dmamap_destroy(sc->sc_dmat, 354 sc->sc_txsoft[i].txs_dmamap); 355 } 356 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 357 fail_3: 358 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 359 fail_2: 360 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 361 sizeof(struct tulip_control_data)); 362 fail_1: 363 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 364 fail_0: 365 return; 366 } 367 368 /* 369 * tlp_shutdown: 370 * 371 * Make sure the interface is stopped at reboot time. 372 */ 373 void 374 tlp_shutdown(arg) 375 void *arg; 376 { 377 struct tulip_softc *sc = arg; 378 379 tlp_stop(sc, 1); 380 } 381 382 /* 383 * tlp_start: [ifnet interface function] 384 * 385 * Start packet transmission on the interface. 386 */ 387 void 388 tlp_start(ifp) 389 struct ifnet *ifp; 390 { 391 struct tulip_softc *sc = ifp->if_softc; 392 struct mbuf *m0, *m; 393 struct tulip_txsoft *txs, *last_txs; 394 bus_dmamap_t dmamap; 395 int error, firsttx, nexttx, lasttx, ofree, seg; 396 397 DPRINTF(("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 398 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 399 400 /* 401 * If we want a filter setup, it means no more descriptors were 402 * available for the setup routine. Let it get a chance to wedge 403 * itself into the ring. 404 */ 405 if (sc->sc_flags & TULIPF_WANT_SETUP) 406 ifp->if_flags |= IFF_OACTIVE; 407 408 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 409 return; 410 411 /* 412 * Remember the previous number of free descriptors and 413 * the first descriptor we'll use. 414 */ 415 ofree = sc->sc_txfree; 416 firsttx = sc->sc_txnext; 417 418 DPRINTF(("%s: tlp_start: txfree %d, txnext %d\n", 419 sc->sc_dev.dv_xname, ofree, firsttx)); 420 421 /* 422 * Loop through the send queue, setting up transmit descriptors 423 * until we drain the queue, or use up all available transmit 424 * descriptors. 425 */ 426 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 427 sc->sc_txfree != 0) { 428 /* 429 * Grab a packet off the queue. 430 */ 431 IF_DEQUEUE(&ifp->if_snd, m0); 432 if (m0 == NULL) 433 break; 434 435 dmamap = txs->txs_dmamap; 436 437 /* 438 * Load the DMA map. If this fails, the packet either 439 * didn't fit in the alloted number of segments, or we were 440 * short on resources. In this case, we'll copy and try 441 * again. 442 */ 443 if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 444 BUS_DMA_NOWAIT) != 0) { 445 MGETHDR(m, M_DONTWAIT, MT_DATA); 446 if (m == NULL) { 447 printf("%s: unable to allocate Tx mbuf\n", 448 sc->sc_dev.dv_xname); 449 IF_PREPEND(&ifp->if_snd, m0); 450 break; 451 } 452 if (m0->m_pkthdr.len > MHLEN) { 453 MCLGET(m, M_DONTWAIT); 454 if ((m->m_flags & M_EXT) == 0) { 455 printf("%s: unable to allocate Tx " 456 "cluster\n", sc->sc_dev.dv_xname); 457 m_freem(m); 458 IF_PREPEND(&ifp->if_snd, m0); 459 break; 460 } 461 } 462 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 463 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 464 m_freem(m0); 465 m0 = m; 466 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 467 m0, BUS_DMA_NOWAIT); 468 if (error) { 469 printf("%s: unable to load Tx buffer, " 470 "error = %d\n", sc->sc_dev.dv_xname, error); 471 IF_PREPEND(&ifp->if_snd, m0); 472 break; 473 } 474 } 475 476 /* 477 * Ensure we have enough descriptors free to describe 478 * the packet. 479 */ 480 if (dmamap->dm_nsegs > sc->sc_txfree) { 481 /* 482 * Not enough free descriptors to transmit this 483 * packet. We haven't committed to anything yet, 484 * so just unload the DMA map, put the packet 485 * back on the queue, and punt. Notify the upper 486 * layer that there are no more slots left. 487 * 488 * XXX We could allocate an mbuf and copy, but 489 * XXX it is worth it? 490 */ 491 ifp->if_flags |= IFF_OACTIVE; 492 bus_dmamap_unload(sc->sc_dmat, dmamap); 493 IF_PREPEND(&ifp->if_snd, m0); 494 break; 495 } 496 497 /* 498 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 499 */ 500 501 /* Sync the DMA map. */ 502 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 503 BUS_DMASYNC_PREWRITE); 504 505 /* 506 * Initialize the transmit descriptors. 507 */ 508 for (nexttx = sc->sc_txnext, seg = 0; 509 seg < dmamap->dm_nsegs; 510 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 511 /* 512 * If this is the first descriptor we're 513 * enqueueing, don't set the OWN bit just 514 * yet. That could cause a race condition. 515 * We'll do it below. 516 */ 517 sc->sc_txdescs[nexttx].td_status = 518 (nexttx == firsttx) ? 0 : TDSTAT_OWN; 519 sc->sc_txdescs[nexttx].td_bufaddr1 = 520 dmamap->dm_segs[seg].ds_addr; 521 sc->sc_txdescs[nexttx].td_ctl = 522 (dmamap->dm_segs[seg].ds_len << TDCTL_SIZE1_SHIFT) | 523 TDCTL_CH; 524 lasttx = nexttx; 525 } 526 527 /* Set `first segment' and `last segment' appropriately. */ 528 sc->sc_txdescs[sc->sc_txnext].td_ctl |= TDCTL_Tx_FS; 529 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_LS; 530 531 #ifdef TLP_DEBUG 532 printf(" txsoft %p trainsmit chain:\n", txs); 533 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 534 printf(" descriptor %d:\n", seg); 535 printf(" td_status: 0x%08x\n", 536 sc->sc_txdescs[seg].td_status); 537 printf(" td_ctl: 0x%08x\n", 538 sc->sc_txdescs[seg].td_ctl); 539 printf(" td_bufaddr1: 0x%08x\n", 540 sc->sc_txdescs[seg].td_bufaddr1); 541 printf(" td_bufaddr2: 0x%08x\n", 542 sc->sc_txdescs[seg].td_bufaddr2); 543 if (seg == lasttx) 544 break; 545 } 546 #endif 547 548 /* Sync the descriptors we're using. */ 549 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 550 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 551 552 /* 553 * Store a pointer to the packet so we can free it later, 554 * and remember what txdirty will be once the packet is 555 * done. 556 */ 557 txs->txs_mbuf = m0; 558 txs->txs_firstdesc = sc->sc_txnext; 559 txs->txs_lastdesc = lasttx; 560 561 /* Advance the tx pointer. */ 562 sc->sc_txfree -= dmamap->dm_nsegs; 563 sc->sc_txnext = nexttx; 564 565 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 566 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 567 568 last_txs = txs; 569 570 #if NBPFILTER > 0 571 /* 572 * Pass the packet to any BPF listeners. 573 */ 574 if (ifp->if_bpf) 575 bpf_mtap(ifp->if_bpf, m0); 576 #endif /* NBPFILTER > 0 */ 577 } 578 579 if (txs == NULL || sc->sc_txfree == 0) { 580 /* No more slots left; notify upper layer. */ 581 ifp->if_flags |= IFF_OACTIVE; 582 } 583 584 if (sc->sc_txfree != ofree) { 585 DPRINTF(("%s: packets enqueued, IC on %d, OWN on %d\n", 586 sc->sc_dev.dv_xname, lasttx, firsttx)); 587 /* 588 * Cause a transmit interrupt to happen on the 589 * last packet we enqueued. 590 */ 591 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_IC; 592 TULIP_CDTXSYNC(sc, lasttx, 1, 593 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 594 595 /* 596 * Some clone chips want IC on the *first* segment in 597 * the packet. Appease them. 598 */ 599 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 600 last_txs->txs_firstdesc != lasttx) { 601 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 602 TDCTL_Tx_IC; 603 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 604 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 605 } 606 607 /* 608 * The entire packet chain is set up. Give the 609 * first descriptor to the chip now. 610 */ 611 sc->sc_txdescs[firsttx].td_status |= TDSTAT_OWN; 612 TULIP_CDTXSYNC(sc, firsttx, 1, 613 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 614 615 /* Wake up the transmitter. */ 616 /* XXX USE AUTOPOLLING? */ 617 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 618 619 /* Set a watchdog timer in case the chip flakes out. */ 620 ifp->if_timer = 5; 621 } 622 } 623 624 /* 625 * tlp_watchdog: [ifnet interface function] 626 * 627 * Watchdog timer handler. 628 */ 629 void 630 tlp_watchdog(ifp) 631 struct ifnet *ifp; 632 { 633 struct tulip_softc *sc = ifp->if_softc; 634 635 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 636 ifp->if_oerrors++; 637 (void) tlp_init(sc); 638 639 /* Try to get more packets going. */ 640 tlp_start(ifp); 641 } 642 643 /* 644 * tlp_ioctl: [ifnet interface function] 645 * 646 * Handle control requests from the operator. 647 */ 648 int 649 tlp_ioctl(ifp, cmd, data) 650 struct ifnet *ifp; 651 u_long cmd; 652 caddr_t data; 653 { 654 struct tulip_softc *sc = ifp->if_softc; 655 struct ifreq *ifr = (struct ifreq *)data; 656 struct ifaddr *ifa = (struct ifaddr *)data; 657 int s, error = 0; 658 659 s = splnet(); 660 661 switch (cmd) { 662 case SIOCSIFADDR: 663 ifp->if_flags |= IFF_UP; 664 665 switch (ifa->ifa_addr->sa_family) { 666 #ifdef INET 667 case AF_INET: 668 if ((error = tlp_init(sc)) != 0) 669 break; 670 arp_ifinit(ifp, ifa); 671 break; 672 #endif /* INET */ 673 #ifdef NS 674 case AF_NS: 675 { 676 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 677 678 if (ns_nullhost(*ina)) 679 ina->x_host = *(union ns_host *) 680 LLADDR(ifp->if_sadl); 681 else 682 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 683 ifp->if_addrlen); 684 /* Set new address. */ 685 error = tlp_init(sc); 686 break; 687 } 688 #endif /* NS */ 689 default: 690 error = tlp_init(sc); 691 break; 692 } 693 break; 694 695 case SIOCSIFMTU: 696 if (ifr->ifr_mtu > ETHERMTU) 697 error = EINVAL; 698 else 699 ifp->if_mtu = ifr->ifr_mtu; 700 break; 701 702 case SIOCSIFFLAGS: 703 if ((ifp->if_flags & IFF_UP) == 0 && 704 (ifp->if_flags & IFF_RUNNING) != 0) { 705 /* 706 * If interface is marked down and it is running, then 707 * stop it. 708 */ 709 tlp_stop(sc, 1); 710 } else if ((ifp->if_flags & IFF_UP) != 0 && 711 (ifp->if_flags & IFF_RUNNING) == 0) { 712 /* 713 * If interfase it marked up and it is stopped, then 714 * start it. 715 */ 716 error = tlp_init(sc); 717 } else if ((ifp->if_flags & IFF_UP) != 0) { 718 /* 719 * Reset the interface to pick up changes in any other 720 * flags that affect the hardware state. 721 */ 722 error = tlp_init(sc); 723 } 724 break; 725 726 case SIOCADDMULTI: 727 case SIOCDELMULTI: 728 error = (cmd == SIOCADDMULTI) ? 729 ether_addmulti(ifr, &sc->sc_ethercom) : 730 ether_delmulti(ifr, &sc->sc_ethercom); 731 732 if (error == ENETRESET) { 733 /* 734 * Multicast list has changed. Set the filter 735 * accordingly. 736 */ 737 (*sc->sc_filter_setup)(sc); 738 error = 0; 739 } 740 break; 741 742 case SIOCSIFMEDIA: 743 case SIOCGIFMEDIA: 744 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 745 break; 746 747 default: 748 error = EINVAL; 749 break; 750 } 751 752 /* Try to get more packets going. */ 753 tlp_start(ifp); 754 755 splx(s); 756 return (error); 757 } 758 759 /* 760 * tlp_intr: 761 * 762 * Interrupt service routine. 763 */ 764 int 765 tlp_intr(arg) 766 void *arg; 767 { 768 struct tulip_softc *sc = arg; 769 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 770 u_int32_t status; 771 int handled = 0, txthresh; 772 773 DPRINTF(("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 774 775 for (;;) { 776 status = TULIP_READ(sc, CSR_STATUS); 777 if (status) 778 TULIP_WRITE(sc, CSR_STATUS, status); 779 780 if ((status & sc->sc_inten) == 0) 781 break; 782 783 handled = 1; 784 785 if (status & (STATUS_RI|STATUS_RU|STATUS_RWT)) { 786 /* Grab new any new packets. */ 787 tlp_rxintr(sc); 788 789 if (status & STATUS_RWT) 790 printf("%s: receive watchdog timeout\n", 791 sc->sc_dev.dv_xname); 792 793 if (status & STATUS_RU) { 794 printf("%s: receive ring overrun\n", 795 sc->sc_dev.dv_xname); 796 /* Get the receive process going again. */ 797 tlp_idle(sc, OPMODE_SR); 798 TULIP_WRITE(sc, CSR_RXLIST, 799 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 800 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 801 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 802 break; 803 } 804 } 805 806 if (status & (STATUS_TI|STATUS_UNF|STATUS_TJT)) { 807 /* Sweep up transmit descriptors. */ 808 tlp_txintr(sc); 809 810 if (status & STATUS_TJT) 811 printf("%s: transmit jabber timeout\n", 812 sc->sc_dev.dv_xname); 813 814 if (status & STATUS_UNF) { 815 /* 816 * Increase our transmit threshold if 817 * another is available. 818 */ 819 txthresh = sc->sc_txthresh + 1; 820 if (sc->sc_txth[txthresh].txth_name != NULL) { 821 /* Idle the transmit process. */ 822 tlp_idle(sc, OPMODE_ST); 823 824 sc->sc_txthresh = txthresh; 825 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 826 sc->sc_opmode |= 827 sc->sc_txth[txthresh].txth_opmode; 828 printf("%s: transmit underrun; new " 829 "threshold: %s\n", 830 sc->sc_dev.dv_xname, 831 sc->sc_txth[txthresh].txth_name); 832 833 /* 834 * Set the new threshold and restart 835 * the transmit process. 836 */ 837 TULIP_WRITE(sc, CSR_OPMODE, 838 sc->sc_opmode); 839 } 840 /* 841 * XXX Log every Nth underrun from 842 * XXX now on? 843 */ 844 } 845 } 846 847 if (status & (STATUS_TPS|STATUS_RPS)) { 848 if (status & STATUS_TPS) 849 printf("%s: transmit process stopped\n", 850 sc->sc_dev.dv_xname); 851 if (status & STATUS_RPS) 852 printf("%s: receive process stopped\n", 853 sc->sc_dev.dv_xname); 854 (void) tlp_init(sc); 855 break; 856 } 857 858 if (status & STATUS_SE) { 859 const char *str; 860 switch (status & STATUS_EB) { 861 case STATUS_EB_PARITY: 862 str = "parity error"; 863 break; 864 865 case STATUS_EB_MABT: 866 str = "master abort"; 867 break; 868 869 case STATUS_EB_TABT: 870 str = "target abort"; 871 break; 872 873 default: 874 str = "unknown error"; 875 break; 876 } 877 printf("%s: fatal system error: %s\n", 878 sc->sc_dev.dv_xname, str); 879 (void) tlp_init(sc); 880 break; 881 } 882 883 /* 884 * Not handled: 885 * 886 * Transmit buffer unavailable -- normal 887 * condition, nothing to do, really. 888 * 889 * General purpose timer experied -- we don't 890 * use the general purpose timer. 891 * 892 * Early receive interrupt -- not available on 893 * all chips, we just use RI. We also only 894 * use single-segment receive DMA, so this 895 * is mostly useless. 896 */ 897 } 898 899 /* Try to get more packets going. */ 900 tlp_start(ifp); 901 902 return (handled); 903 } 904 905 /* 906 * tlp_rxintr: 907 * 908 * Helper; handle receive interrupts. 909 */ 910 void 911 tlp_rxintr(sc) 912 struct tulip_softc *sc; 913 { 914 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 915 struct ether_header *eh; 916 struct tulip_rxsoft *rxs; 917 struct mbuf *m; 918 u_int32_t rxstat; 919 int i, len; 920 921 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 922 rxs = &sc->sc_rxsoft[i]; 923 924 TULIP_CDRXSYNC(sc, i, 925 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 926 927 rxstat = sc->sc_rxdescs[i].td_status; 928 929 if (rxstat & TDSTAT_OWN) { 930 /* 931 * We have processed all of the receive buffers. 932 */ 933 break; 934 } 935 936 /* 937 * Make sure the packet fit in one buffer. This should 938 * always be the case. But the Lite-On PNIC, rev 33 939 * has an awful receive engine bug, which may require 940 * a very icky work-around. 941 */ 942 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 943 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 944 printf("%s: incoming packet spilled, resetting\n", 945 sc->sc_dev.dv_xname); 946 (void) tlp_init(sc); 947 return; 948 } 949 950 /* 951 * If any collisions were seen on the wire, count one. 952 */ 953 if (rxstat & TDSTAT_Rx_CS) 954 ifp->if_collisions++; 955 956 /* 957 * If an error occured, update stats, clear the status 958 * word, and leave the packet buffer in place. It will 959 * simply be reused the next time the ring comes around. 960 */ 961 if (rxstat & TDSTAT_ES) { 962 #define PRINTERR(bit, str) \ 963 if (rxstat & (bit)) \ 964 printf("%s: receive error: %s\n", \ 965 sc->sc_dev.dv_xname, str) 966 ifp->if_ierrors++; 967 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 968 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 969 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 970 PRINTERR(TDSTAT_Rx_RE, "MII error"); 971 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 972 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 973 #undef PRINTERR 974 TULIP_INIT_RXDESC(sc, i); 975 continue; 976 } 977 978 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 979 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 980 981 /* 982 * No errors; receive the packet. Note the Tulip 983 * includes the CRC with every packet; trim it. 984 */ 985 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; 986 987 #ifdef __NO_STRICT_ALIGNMENT 988 /* 989 * Allocate a new mbuf cluster. If that fails, we are 990 * out of memory, and must drop the packet and recycle 991 * the buffer that's already attached to this descriptor. 992 */ 993 m = rxs->rxs_mbuf; 994 if (tlp_add_rxbuf(sc, i) != 0) { 995 ifp->if_ierrors++; 996 TULIP_INIT_RXDESC(sc, i); 997 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 998 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 999 continue; 1000 } 1001 #else 1002 /* 1003 * The Tulip's receive buffers must be 4-byte aligned. 1004 * But this means that the data after the Ethernet header 1005 * is misaligned. We must allocate a new buffer and 1006 * copy the data, shifted forward 2 bytes. 1007 */ 1008 MGETHDR(m, M_DONTWAIT, MT_DATA); 1009 if (m == NULL) { 1010 dropit: 1011 ifp->if_ierrors++; 1012 TULIP_INIT_RXDESC(sc, i); 1013 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1014 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1015 continue; 1016 } 1017 if (len > (MHLEN - 2)) { 1018 MCLGET(m, M_DONTWAIT); 1019 if ((m->m_flags & M_EXT) == 0) { 1020 m_freem(m); 1021 goto dropit; 1022 } 1023 } 1024 m->m_data += 2; 1025 1026 /* 1027 * Note that we use clusters for incoming frames, so the 1028 * buffer is virtually contiguous. 1029 */ 1030 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1031 1032 /* Allow the receive descriptor to continue using its mbuf. */ 1033 TULIP_INIT_RXDESC(sc, i); 1034 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1035 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1036 #endif /* __NO_STRICT_ALIGNMENT */ 1037 1038 ifp->if_ipackets++; 1039 eh = mtod(m, struct ether_header *); 1040 m->m_pkthdr.rcvif = ifp; 1041 m->m_pkthdr.len = m->m_len = len; 1042 1043 #if NBPFILTER > 0 1044 /* 1045 * Pass this up to any BPF listeners, but only 1046 * pass it up the stack if its for us. 1047 */ 1048 if (ifp->if_bpf) 1049 bpf_mtap(ifp->if_bpf, m); 1050 #endif /* NPBFILTER > 0 */ 1051 1052 /* 1053 * This test is outside the NBPFILTER block because 1054 * on the 21140 we have to use Hash-Only mode due to 1055 * a bug in the filter logic. 1056 */ 1057 if ((ifp->if_flags & IFF_PROMISC) != 0 || 1058 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 1059 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1060 ETHER_ADDR_LEN) != 0 && 1061 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) { 1062 m_freem(m); 1063 continue; 1064 } 1065 } 1066 1067 /* Pass it on. */ 1068 (*ifp->if_input)(ifp, m); 1069 } 1070 1071 /* Update the recieve pointer. */ 1072 sc->sc_rxptr = i; 1073 } 1074 1075 /* 1076 * tlp_txintr: 1077 * 1078 * Helper; handle transmit interrupts. 1079 */ 1080 void 1081 tlp_txintr(sc) 1082 struct tulip_softc *sc; 1083 { 1084 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1085 struct tulip_txsoft *txs; 1086 u_int32_t txstat; 1087 1088 DPRINTF(("%s: tlp_txintr: sc_flags 0x%08x\n", 1089 sc->sc_dev.dv_xname, sc->sc_flags)); 1090 1091 ifp->if_flags &= ~IFF_OACTIVE; 1092 1093 /* 1094 * Go through our Tx list and free mbufs for those 1095 * frames that have been transmitted. 1096 */ 1097 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1098 TULIP_CDTXSYNC(sc, txs->txs_firstdesc, 1099 txs->txs_dmamap->dm_nsegs, 1100 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1101 1102 #ifdef TLP_DEBUG 1103 { int i; 1104 printf(" txsoft %p trainsmit chain:\n", txs); 1105 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1106 printf(" descriptor %d:\n", i); 1107 printf(" td_status: 0x%08x\n", 1108 sc->sc_txdescs[i].td_status); 1109 printf(" td_ctl: 0x%08x\n", 1110 sc->sc_txdescs[i].td_ctl); 1111 printf(" td_bufaddr1: 0x%08x\n", 1112 sc->sc_txdescs[i].td_bufaddr1); 1113 printf(" td_bufaddr2: 0x%08x\n", 1114 sc->sc_txdescs[i].td_bufaddr2); 1115 if (i == txs->txs_lastdesc) 1116 break; 1117 }} 1118 #endif 1119 1120 txstat = sc->sc_txdescs[txs->txs_firstdesc].td_status; 1121 if (txstat & TDSTAT_OWN) 1122 break; 1123 1124 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1125 1126 sc->sc_txfree += txs->txs_dmamap->dm_nsegs; 1127 1128 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1129 0, txs->txs_dmamap->dm_mapsize, 1130 BUS_DMASYNC_POSTWRITE); 1131 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1132 m_freem(txs->txs_mbuf); 1133 txs->txs_mbuf = NULL; 1134 1135 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1136 1137 /* 1138 * Check for errors and collisions. 1139 */ 1140 if (txstat & TDSTAT_ES) { 1141 ifp->if_oerrors++; 1142 if (txstat & TDSTAT_Tx_EC) 1143 ifp->if_collisions += 16; 1144 if (txstat & TDSTAT_Tx_LC) 1145 ifp->if_collisions++; 1146 } else { 1147 /* Packet was transmitted successfully. */ 1148 ifp->if_opackets++; 1149 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1150 } 1151 } 1152 1153 /* 1154 * If there are no more pending transmissions, cancel the watchdog 1155 * timer. 1156 */ 1157 if (txs == NULL) 1158 ifp->if_timer = 0; 1159 1160 /* 1161 * If we have a receive filter setup pending, do it now. 1162 */ 1163 if (sc->sc_flags & TULIPF_WANT_SETUP) 1164 (*sc->sc_filter_setup)(sc); 1165 } 1166 1167 /* 1168 * tlp_reset: 1169 * 1170 * Perform a soft reset on the Tulip. 1171 */ 1172 void 1173 tlp_reset(sc) 1174 struct tulip_softc *sc; 1175 { 1176 int i; 1177 1178 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1179 1180 for (i = 0; i < 1000; i++) { 1181 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1182 break; 1183 delay(10); 1184 } 1185 1186 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1187 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1188 1189 delay(1000); 1190 } 1191 1192 /* 1193 * tlp_init: 1194 * 1195 * Initialize the interface. Must be called at splnet(). 1196 */ 1197 int 1198 tlp_init(sc) 1199 struct tulip_softc *sc; 1200 { 1201 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1202 struct tulip_txsoft *txs; 1203 struct tulip_rxsoft *rxs; 1204 int i, error = 0; 1205 1206 /* 1207 * Cancel any pending I/O. 1208 */ 1209 tlp_stop(sc, 0); 1210 1211 /* 1212 * Reset the Tulip to a known state. 1213 */ 1214 tlp_reset(sc); 1215 1216 /* 1217 * Initialize the BUSMODE register. 1218 * 1219 * XXX What about read-multiple/read-line/write-line on 1220 * XXX the 21140 and up? 1221 */ 1222 sc->sc_busmode = BUSMODE_BAR | BUSMODE_PBL_DEFAULT; 1223 switch (sc->sc_cacheline) { 1224 default: 1225 /* 1226 * Note: We must *always* set these bits; a cache 1227 * alignment of 0 is RESERVED. 1228 */ 1229 case 8: 1230 sc->sc_busmode |= BUSMODE_CAL_8LW; 1231 break; 1232 case 16: 1233 sc->sc_busmode |= BUSMODE_CAL_16LW; 1234 break; 1235 case 32: 1236 sc->sc_busmode |= BUSMODE_CAL_32LW; 1237 break; 1238 } 1239 switch (sc->sc_chip) { 1240 case TULIP_CHIP_82C168: 1241 case TULIP_CHIP_82C169: 1242 sc->sc_busmode |= BUSMODE_PNIC_MBO; 1243 break; 1244 default: 1245 /* Nothing. */ 1246 break; 1247 } 1248 #if BYTE_ORDER == BIG_ENDIAN 1249 /* 1250 * XXX There are reports that this doesn't work properly 1251 * in the old Tulip driver, but BUSMODE_DBO does. However, 1252 * BUSMODE_DBO is not available on the 21040, and requires 1253 * us to byte-swap the setup packet. What to do? 1254 */ 1255 sc->sc_busmode |= BUSMODE_BLE; 1256 #endif 1257 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1258 1259 /* 1260 * Initialize the OPMODE register. We don't write it until 1261 * we're ready to begin the transmit and receive processes. 1262 * 1263 * Media-related OPMODE bits are set in the media callbacks 1264 * for each specific chip/board. 1265 */ 1266 sc->sc_opmode = OPMODE_SR | OPMODE_ST | 1267 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1268 switch (sc->sc_chip) { 1269 case TULIP_CHIP_21140: 1270 case TULIP_CHIP_21140A: 1271 case TULIP_CHIP_21142: 1272 case TULIP_CHIP_21143: 1273 sc->sc_opmode |= OPMODE_MBO; 1274 break; 1275 1276 default: 1277 /* Nothing. */ 1278 } 1279 1280 if (sc->sc_flags & TULIPF_HAS_MII) { 1281 /* Enable the MII port. */ 1282 sc->sc_opmode |= OPMODE_PS; 1283 1284 switch (sc->sc_chip) { 1285 case TULIP_CHIP_82C168: 1286 case TULIP_CHIP_82C169: 1287 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JABBERDIS); 1288 break; 1289 1290 default: 1291 /* Nothing. */ 1292 } 1293 } 1294 1295 /* 1296 * Magical mystery initialization on the Macronix chips. 1297 * The MX98713 uses its own magic value, the rest share 1298 * a common one. 1299 */ 1300 switch (sc->sc_chip) { 1301 case TULIP_CHIP_MX98713: 1302 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1303 break; 1304 1305 case TULIP_CHIP_MX98713A: 1306 case TULIP_CHIP_MX98715: 1307 case TULIP_CHIP_MX98725: 1308 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1309 break; 1310 1311 default: 1312 /* Nothing. */ 1313 } 1314 1315 /* 1316 * Initialize the transmit descriptor ring. 1317 */ 1318 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1319 for (i = 0; i < TULIP_NTXDESC; i++) { 1320 sc->sc_txdescs[i].td_ctl = TDCTL_CH; 1321 sc->sc_txdescs[i].td_bufaddr2 = 1322 TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)); 1323 } 1324 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1325 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1326 sc->sc_txfree = TULIP_NTXDESC; 1327 sc->sc_txnext = 0; 1328 1329 /* 1330 * Initialize the transmit job descriptors. 1331 */ 1332 SIMPLEQ_INIT(&sc->sc_txfreeq); 1333 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1334 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1335 txs = &sc->sc_txsoft[i]; 1336 txs->txs_mbuf = NULL; 1337 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1338 } 1339 1340 /* 1341 * Initialize the receive descriptor and receive job 1342 * descriptor rings. 1343 */ 1344 for (i = 0; i < TULIP_NRXDESC; i++) { 1345 rxs = &sc->sc_rxsoft[i]; 1346 if (rxs->rxs_mbuf == NULL) { 1347 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1348 printf("%s: unable to allocate or map rx " 1349 "buffer %d, error = %d\n", 1350 sc->sc_dev.dv_xname, i, error); 1351 /* 1352 * XXX Should attempt to run with fewer receive 1353 * XXX buffers instead of just failing. 1354 */ 1355 tlp_rxdrain(sc); 1356 goto out; 1357 } 1358 } 1359 } 1360 sc->sc_rxptr = 0; 1361 1362 /* 1363 * Initialize the interrupt mask and enable interrupts. 1364 */ 1365 /* normal interrupts */ 1366 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1367 /* abnormal interrupts */ 1368 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1369 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1370 1371 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1372 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1373 1374 /* 1375 * Give the transmit and receive rings to the Tulip. 1376 */ 1377 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1378 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1379 1380 /* 1381 * On chips that do this differently, set the station address. 1382 */ 1383 switch (sc->sc_chip) { 1384 case TULIP_CHIP_WB89C840F: 1385 /* XXX Do this with stream writes? */ 1386 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1387 bus_space_write_1(sc->sc_st, sc->sc_sh, 1388 (CSR_WINB_NODE0 >> sc->sc_regshift) + i, 1389 LLADDR(ifp->if_sadl)[i]); 1390 } 1391 break; 1392 1393 default: 1394 /* Nothing. */ 1395 } 1396 1397 /* 1398 * Set the receive filter. This will start the transmit and 1399 * receive processes. 1400 */ 1401 (*sc->sc_filter_setup)(sc); 1402 1403 /* 1404 * Start the receive process. 1405 */ 1406 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1407 1408 if (sc->sc_flags & TULIPF_HAS_MII) { 1409 /* Start the one second clock. */ 1410 timeout(tlp_mii_tick, sc, hz); 1411 } 1412 1413 /* 1414 * Note that the interface is now running. 1415 */ 1416 ifp->if_flags |= IFF_RUNNING; 1417 ifp->if_flags &= ~IFF_OACTIVE; 1418 1419 /* 1420 * Set the media. We must do this after the transmit process is 1421 * running, since we may actually have to transmit packets on 1422 * our board to test link integrity. 1423 */ 1424 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1425 1426 out: 1427 if (error) 1428 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1429 return (error); 1430 } 1431 1432 /* 1433 * tlp_rxdrain: 1434 * 1435 * Drain the receive queue. 1436 */ 1437 void 1438 tlp_rxdrain(sc) 1439 struct tulip_softc *sc; 1440 { 1441 struct tulip_rxsoft *rxs; 1442 int i; 1443 1444 for (i = 0; i < TULIP_NRXDESC; i++) { 1445 rxs = &sc->sc_rxsoft[i]; 1446 if (rxs->rxs_mbuf != NULL) { 1447 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1448 m_freem(rxs->rxs_mbuf); 1449 rxs->rxs_mbuf = NULL; 1450 } 1451 } 1452 } 1453 1454 /* 1455 * tlp_stop: 1456 * 1457 * Stop transmission on the interface. 1458 */ 1459 void 1460 tlp_stop(sc, drain) 1461 struct tulip_softc *sc; 1462 int drain; 1463 { 1464 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1465 struct tulip_txsoft *txs; 1466 1467 if (sc->sc_flags & TULIPF_HAS_MII) { 1468 /* Stop the one second clock. */ 1469 untimeout(tlp_mii_tick, sc); 1470 } 1471 1472 /* Disable interrupts. */ 1473 TULIP_WRITE(sc, CSR_INTEN, 0); 1474 1475 /* Stop the transmit and receive processes. */ 1476 TULIP_WRITE(sc, CSR_OPMODE, 0); 1477 TULIP_WRITE(sc, CSR_RXLIST, 0); 1478 TULIP_WRITE(sc, CSR_TXLIST, 0); 1479 1480 /* 1481 * Release any queued transmit buffers. 1482 */ 1483 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1484 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1485 if (txs->txs_mbuf != NULL) { 1486 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1487 m_freem(txs->txs_mbuf); 1488 txs->txs_mbuf = NULL; 1489 } 1490 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1491 } 1492 1493 if (drain) { 1494 /* 1495 * Release the receive buffers. 1496 */ 1497 tlp_rxdrain(sc); 1498 } 1499 1500 sc->sc_flags &= ~TULIPF_WANT_SETUP; 1501 1502 /* 1503 * Mark the interface down and cancel the watchdog timer. 1504 */ 1505 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1506 ifp->if_timer = 0; 1507 } 1508 1509 #define SROM_EMIT(sc, x) \ 1510 do { \ 1511 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 1512 delay(1); \ 1513 } while (0) 1514 1515 /* 1516 * tlp_srom_idle: 1517 * 1518 * Put the SROM in idle state. 1519 */ 1520 void 1521 tlp_srom_idle(sc) 1522 struct tulip_softc *sc; 1523 { 1524 u_int32_t miirom; 1525 int i; 1526 1527 miirom = MIIROM_SR; 1528 SROM_EMIT(sc, miirom); 1529 1530 miirom |= MIIROM_RD; 1531 SROM_EMIT(sc, miirom); 1532 1533 miirom |= MIIROM_SROMCS; 1534 SROM_EMIT(sc, miirom); 1535 1536 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1537 1538 /* Strobe the clock 25 times. */ 1539 for (i = 0; i < 25; i++) { 1540 SROM_EMIT(sc, miirom); 1541 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1542 } 1543 1544 SROM_EMIT(sc, miirom); 1545 1546 miirom &= ~MIIROM_SROMCS; 1547 SROM_EMIT(sc, miirom); 1548 1549 SROM_EMIT(sc, 0); 1550 } 1551 1552 /* 1553 * tlp_read_srom: 1554 * 1555 * Read the Tulip SROM. 1556 */ 1557 void 1558 tlp_read_srom(sc, word, wordcnt, data) 1559 struct tulip_softc *sc; 1560 int word, wordcnt; 1561 u_int16_t *data; 1562 { 1563 u_int32_t miirom; 1564 int i, x; 1565 1566 tlp_srom_idle(sc); 1567 1568 /* Select the SROM. */ 1569 miirom = MIIROM_SR; 1570 SROM_EMIT(sc, miirom); 1571 1572 miirom |= MIIROM_RD; 1573 SROM_EMIT(sc, miirom); 1574 1575 for (i = 0; i < wordcnt; i++) { 1576 /* Send CHIP SELECT for one clock tick. */ 1577 miirom |= MIIROM_SROMCS; 1578 SROM_EMIT(sc, miirom); 1579 1580 /* Shift in the READ opcode. */ 1581 for (x = 3; x > 0; x--) { 1582 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 1583 miirom |= MIIROM_SROMDI; 1584 else 1585 miirom &= ~MIIROM_SROMDI; 1586 SROM_EMIT(sc, miirom); 1587 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1588 SROM_EMIT(sc, miirom); 1589 } 1590 1591 /* Shift in address. */ 1592 for (x = 6; x > 0; x--) { 1593 if ((word + i) & (1 << (x - 1))) 1594 miirom |= MIIROM_SROMDI; 1595 else 1596 miirom &= ~MIIROM_SROMDI; 1597 SROM_EMIT(sc, miirom); 1598 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1599 SROM_EMIT(sc, miirom); 1600 } 1601 1602 /* Shift out data. */ 1603 miirom &= ~MIIROM_SROMDI; 1604 data[i] = 0; 1605 for (x = 16; x > 0; x--) { 1606 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1607 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 1608 data[i] |= (1 << (x - 1)); 1609 SROM_EMIT(sc, miirom); 1610 } 1611 1612 /* Clear CHIP SELECT. */ 1613 miirom &= ~MIIROM_SROMCS; 1614 SROM_EMIT(sc, miirom); 1615 } 1616 1617 /* Deselect the SROM. */ 1618 SROM_EMIT(sc, 0); 1619 1620 /* ...and idle it. */ 1621 tlp_srom_idle(sc); 1622 } 1623 1624 #undef SROM_EMIT 1625 1626 /* 1627 * tlp_add_rxbuf: 1628 * 1629 * Add a receive buffer to the indicated descriptor. 1630 */ 1631 int 1632 tlp_add_rxbuf(sc, idx) 1633 struct tulip_softc *sc; 1634 int idx; 1635 { 1636 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 1637 struct mbuf *m; 1638 int error; 1639 1640 MGETHDR(m, M_DONTWAIT, MT_DATA); 1641 if (m == NULL) 1642 return (ENOBUFS); 1643 1644 MCLGET(m, M_DONTWAIT); 1645 if ((m->m_flags & M_EXT) == 0) { 1646 m_freem(m); 1647 return (ENOBUFS); 1648 } 1649 1650 if (rxs->rxs_mbuf != NULL) 1651 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1652 1653 rxs->rxs_mbuf = m; 1654 1655 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 1656 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 1657 if (error) { 1658 printf("%s: can't load rx DMA map %d, error = %d\n", 1659 sc->sc_dev.dv_xname, idx, error); 1660 panic("tlp_add_rxbuf"); /* XXX */ 1661 } 1662 1663 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1664 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1665 1666 TULIP_INIT_RXDESC(sc, idx); 1667 1668 return (0); 1669 } 1670 1671 /* 1672 * tlp_crc32: 1673 * 1674 * Compute the 32-bit CRC of the provided buffer. 1675 */ 1676 u_int32_t 1677 tlp_crc32(buf, len) 1678 const u_int8_t *buf; 1679 size_t len; 1680 { 1681 static const u_int32_t crctab[] = { 1682 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 1683 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, 1684 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 1685 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c 1686 }; 1687 u_int32_t crc; 1688 int i; 1689 1690 crc = 0xffffffff; 1691 for (i = 0; i < len; i++) { 1692 crc ^= buf[i]; 1693 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1694 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1695 } 1696 return (crc); 1697 } 1698 1699 /* 1700 * tlp_srom_crcok: 1701 * 1702 * Check the CRC of the Tulip SROM. 1703 */ 1704 int 1705 tlp_srom_crcok(romdata) 1706 u_int8_t *romdata; 1707 { 1708 u_int32_t crc; 1709 1710 crc = tlp_crc32(romdata, 126); 1711 if ((crc ^ 0xffff) == (romdata[126] | (romdata[127] << 8))) 1712 return (1); 1713 return (0); 1714 } 1715 1716 /* 1717 * tlp_filter_setup: 1718 * 1719 * Set the Tulip's receive filter. 1720 */ 1721 void 1722 tlp_filter_setup(sc) 1723 struct tulip_softc *sc; 1724 { 1725 struct ethercom *ec = &sc->sc_ethercom; 1726 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1727 struct ether_multi *enm; 1728 struct ether_multistep step; 1729 __volatile u_int32_t *sp; 1730 u_int8_t enaddr[ETHER_ADDR_LEN]; 1731 u_int32_t hash; 1732 int cnt; 1733 1734 DPRINTF(("%s: tlp_filter_setup: sc_flags 0x%08x\n", 1735 sc->sc_dev.dv_xname, sc->sc_flags)); 1736 1737 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 1738 1739 /* 1740 * If there are transmissions pending, wait until they have 1741 * completed. 1742 */ 1743 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL) { 1744 sc->sc_flags |= TULIPF_WANT_SETUP; 1745 DPRINTF(("%s: tlp_filter_setup: deferring\n", 1746 sc->sc_dev.dv_xname)); 1747 return; 1748 } 1749 sc->sc_flags &= ~TULIPF_WANT_SETUP; 1750 1751 /* 1752 * If we're running, idle the transmit and receive engines. If 1753 * we're NOT running, we're being called from tlp_init(), and our 1754 * writing OPMODE will start the transmit and receive processes 1755 * in motion. 1756 */ 1757 if (ifp->if_flags & IFF_RUNNING) 1758 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 1759 1760 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 1761 1762 if (ifp->if_flags & IFF_PROMISC) { 1763 sc->sc_opmode |= OPMODE_PR; 1764 goto allmulti; 1765 } 1766 1767 /* 1768 * Try Perfect filtering first. 1769 */ 1770 1771 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 1772 sp = TULIP_CDSP(sc); 1773 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 1774 cnt = 0; 1775 ETHER_FIRST_MULTI(step, ec, enm); 1776 while (enm != NULL) { 1777 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 1778 /* 1779 * We must listen to a range of multicast addresses. 1780 * For now, just accept all multicasts, rather than 1781 * trying to set only those filter bits needed to match 1782 * the range. (At this time, the only use of address 1783 * ranges is for IP multicast routing, for which the 1784 * range is big enough to require all bits set.) 1785 */ 1786 goto allmulti; 1787 } 1788 if (cnt == (TULIP_MAXADDRS - 2)) { 1789 /* 1790 * We already have our multicast limit (still need 1791 * our station address and broadcast). Go to 1792 * Hash-Perfect mode. 1793 */ 1794 goto hashperfect; 1795 } 1796 *sp++ = ((u_int16_t *) enm->enm_addrlo)[0]; 1797 *sp++ = ((u_int16_t *) enm->enm_addrlo)[1]; 1798 *sp++ = ((u_int16_t *) enm->enm_addrlo)[2]; 1799 ETHER_NEXT_MULTI(step, enm); 1800 } 1801 1802 if (ifp->if_flags & IFF_BROADCAST) { 1803 /* ...and the broadcast address. */ 1804 cnt++; 1805 *sp++ = 0xffff; 1806 *sp++ = 0xffff; 1807 *sp++ = 0xffff; 1808 } 1809 1810 /* Pad the rest with our station address. */ 1811 for (; cnt < TULIP_MAXADDRS; cnt++) { 1812 *sp++ = ((u_int16_t *) enaddr)[0]; 1813 *sp++ = ((u_int16_t *) enaddr)[1]; 1814 *sp++ = ((u_int16_t *) enaddr)[2]; 1815 } 1816 ifp->if_flags &= ~IFF_ALLMULTI; 1817 goto setit; 1818 1819 hashperfect: 1820 /* 1821 * Try Hash-Perfect mode. 1822 */ 1823 1824 /* 1825 * Some 21140 chips have broken Hash-Perfect modes. On these 1826 * chips, we simply use Hash-Only mode, and put our station 1827 * address into the filter. 1828 */ 1829 if (sc->sc_chip == TULIP_CHIP_21140) 1830 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 1831 else 1832 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 1833 sp = TULIP_CDSP(sc); 1834 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 1835 ETHER_FIRST_MULTI(step, ec, enm); 1836 while (enm != NULL) { 1837 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 1838 /* 1839 * We must listen to a range of multicast addresses. 1840 * For now, just accept all multicasts, rather than 1841 * trying to set only those filter bits needed to match 1842 * the range. (At this time, the only use of address 1843 * ranges is for IP multicast routing, for which the 1844 * range is big enough to require all bits set.) 1845 */ 1846 goto allmulti; 1847 } 1848 hash = tlp_mchash(enm->enm_addrlo); 1849 sp[hash >> 4] |= 1 << (hash & 0xf); 1850 ETHER_NEXT_MULTI(step, enm); 1851 } 1852 1853 if (ifp->if_flags & IFF_BROADCAST) { 1854 /* ...and the broadcast address. */ 1855 hash = tlp_mchash(etherbroadcastaddr); 1856 sp[hash >> 4] |= 1 << (hash & 0xf); 1857 } 1858 1859 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 1860 /* ...and our station address. */ 1861 hash = tlp_mchash(enaddr); 1862 sp[hash >> 4] |= 1 << (hash & 0xf); 1863 } else { 1864 /* 1865 * Hash-Perfect mode; put our station address after 1866 * the hash table. 1867 */ 1868 sp[39] = ((u_int16_t *) enaddr)[0]; 1869 sp[40] = ((u_int16_t *) enaddr)[1]; 1870 sp[41] = ((u_int16_t *) enaddr)[2]; 1871 } 1872 ifp->if_flags &= ~IFF_ALLMULTI; 1873 goto setit; 1874 1875 allmulti: 1876 /* 1877 * Use Perfect filter mode. First address is the broadcast address, 1878 * and pad the rest with our station address. We'll set Pass-all- 1879 * multicast in OPMODE below. 1880 */ 1881 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 1882 sp = TULIP_CDSP(sc); 1883 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 1884 cnt = 0; 1885 if (ifp->if_flags & IFF_BROADCAST) { 1886 cnt++; 1887 *sp++ = 0xffff; 1888 *sp++ = 0xffff; 1889 *sp++ = 0xffff; 1890 } 1891 for (; cnt < TULIP_MAXADDRS; cnt++) { 1892 *sp++ = ((u_int16_t *) enaddr)[0]; 1893 *sp++ = ((u_int16_t *) enaddr)[1]; 1894 *sp++ = ((u_int16_t *) enaddr)[2]; 1895 } 1896 ifp->if_flags |= IFF_ALLMULTI; 1897 1898 setit: 1899 if (ifp->if_flags & IFF_ALLMULTI) 1900 sc->sc_opmode |= OPMODE_PM; 1901 1902 /* Sync the setup packet buffer. */ 1903 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 1904 1905 /* 1906 * Fill in the setup packet descriptor. 1907 */ 1908 sc->sc_setup_desc.td_bufaddr1 = TULIP_CDSPADDR(sc); 1909 sc->sc_setup_desc.td_bufaddr2 = TULIP_CDTXADDR(sc, sc->sc_txnext); 1910 sc->sc_setup_desc.td_ctl = 1911 (TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 1912 sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS | 1913 TDCTL_CH; 1914 sc->sc_setup_desc.td_status = TDSTAT_OWN; 1915 TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1916 1917 /* 1918 * Write the address of the setup descriptor. This also has 1919 * the side effect of giving the transmit ring to the chip, 1920 * since the setup descriptor points to the next available 1921 * descriptor in the ring. 1922 */ 1923 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc)); 1924 1925 /* 1926 * Set the OPMODE register. This will also resume the 1927 * transmit transmit process we idled above. 1928 */ 1929 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1930 1931 /* 1932 * Kick the transmitter; this will cause the Tulip to 1933 * read the setup descriptor. 1934 */ 1935 /* XXX USE AUTOPOLLING? */ 1936 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 1937 1938 /* 1939 * Now wait for the OWN bit to clear. 1940 */ 1941 for (cnt = 0; cnt < 1000; cnt++) { 1942 TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1943 if ((sc->sc_setup_desc.td_status & TDSTAT_OWN) == 0) 1944 break; 1945 delay(10); 1946 } 1947 if (sc->sc_setup_desc.td_status & TDSTAT_OWN) 1948 printf("%s: filter setup failed to complete\n", 1949 sc->sc_dev.dv_xname); 1950 DPRINTF(("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 1951 } 1952 1953 /* 1954 * tlp_winb_filter_setup: 1955 * 1956 * Set the Winbond 89C840F's receive filter. 1957 */ 1958 void 1959 tlp_winb_filter_setup(sc) 1960 struct tulip_softc *sc; 1961 { 1962 struct ethercom *ec = &sc->sc_ethercom; 1963 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1964 struct ether_multi *enm; 1965 struct ether_multistep step; 1966 u_int32_t hash, mchash[2]; 1967 1968 DPRINTF(("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 1969 sc->sc_dev.dv_xname, sc->sc_flags)); 1970 1971 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 1972 1973 if (ifp->if_flags & IFF_PROMISC) { 1974 sc->sc_opmode |= OPMODE_PR; 1975 goto allmulti; 1976 } 1977 1978 mchash[0] = mchash[1] = 0; 1979 1980 ETHER_FIRST_MULTI(step, ec, enm); 1981 while (enm != NULL) { 1982 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 1983 /* 1984 * We must listen to a range of multicast addresses. 1985 * For now, just accept all multicasts, rather than 1986 * trying to set only those filter bits needed to match 1987 * the range. (At this time, the only use of address 1988 * ranges is for IP multicast routing, for which the 1989 * range is big enough to require all bits set.) 1990 */ 1991 goto allmulti; 1992 } 1993 1994 /* 1995 * According to the FreeBSD `wb' driver, yes, you 1996 * really do invert the hash. 1997 */ 1998 hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 1999 & 0x3f; 2000 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2001 ETHER_NEXT_MULTI(step, enm); 2002 } 2003 ifp->if_flags &= ~IFF_ALLMULTI; 2004 goto setit; 2005 2006 allmulti: 2007 ifp->if_flags |= IFF_ALLMULTI; 2008 mchash[0] = mchash[1] = 0xffffffff; 2009 2010 setit: 2011 if (ifp->if_flags & IFF_ALLMULTI) 2012 sc->sc_opmode |= OPMODE_PM; 2013 2014 TULIP_WRITE(sc, CSR_WINB_MAR0, mchash[0]); 2015 TULIP_WRITE(sc, CSR_WINB_MAR1, mchash[1]); 2016 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2017 DPRINTF(("%s: tlp_winb_filter_setup: returning\n", 2018 sc->sc_dev.dv_xname)); 2019 } 2020 2021 /* 2022 * tlp_idle: 2023 * 2024 * Cause the transmit and/or receive processes to go idle. 2025 */ 2026 void 2027 tlp_idle(sc, bits) 2028 struct tulip_softc *sc; 2029 u_int32_t bits; 2030 { 2031 static const char *tx_state_names[] = { 2032 "STOPPED", 2033 "RUNNING - FETCH", 2034 "RUNNING - WAIT", 2035 "RUNNING - READING", 2036 "-- RESERVED --", 2037 "RUNNING - SETUP", 2038 "SUSPENDED", 2039 "RUNNING - CLOSE", 2040 }; 2041 static const char *rx_state_names[] = { 2042 "STOPPED", 2043 "RUNNING - FETCH", 2044 "RUNNING - CHECK", 2045 "RUNNING - WAIT", 2046 "SUSPENDED", 2047 "RUNNING - CLOSE", 2048 "RUNNING - FLUSH", 2049 "RUNNING - QUEUE", 2050 }; 2051 u_int32_t csr, ackmask = 0; 2052 int i; 2053 2054 if (bits & OPMODE_ST) 2055 ackmask |= STATUS_TPS; 2056 2057 if (bits & OPMODE_SR) 2058 ackmask |= STATUS_RPS; 2059 2060 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2061 2062 for (i = 0; i < 1000; i++) { 2063 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2064 break; 2065 delay(10); 2066 } 2067 2068 csr = TULIP_READ(sc, CSR_STATUS); 2069 if ((csr & ackmask) != ackmask) { 2070 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2071 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2072 printf("%s: transmit process failed to idle: " 2073 "state %s\n", sc->sc_dev.dv_xname, 2074 tx_state_names[(csr & STATUS_TS) >> 20]); 2075 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2076 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2077 printf("%s: receive process failed to idle: " 2078 "state %s\n", sc->sc_dev.dv_xname, 2079 rx_state_names[(csr & STATUS_RS) >> 17]); 2080 } 2081 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2082 } 2083 2084 /***************************************************************************** 2085 * Generic media support functions. 2086 *****************************************************************************/ 2087 2088 /* 2089 * tlp_mediastatus: [ifmedia interface function] 2090 * 2091 * Query the current media. 2092 */ 2093 void 2094 tlp_mediastatus(ifp, ifmr) 2095 struct ifnet *ifp; 2096 struct ifmediareq *ifmr; 2097 { 2098 struct tulip_softc *sc = ifp->if_softc; 2099 2100 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2101 } 2102 2103 /* 2104 * tlp_mediachange: [ifmedia interface function] 2105 * 2106 * Update the current media. 2107 */ 2108 int 2109 tlp_mediachange(ifp) 2110 struct ifnet *ifp; 2111 { 2112 struct tulip_softc *sc = ifp->if_softc; 2113 2114 return ((*sc->sc_mediasw->tmsw_set)(sc)); 2115 } 2116 2117 /***************************************************************************** 2118 * Support functions for MII-attached media. 2119 *****************************************************************************/ 2120 2121 /* 2122 * tlp_mii_tick: 2123 * 2124 * One second timer, used to tick the MII. 2125 */ 2126 void 2127 tlp_mii_tick(arg) 2128 void *arg; 2129 { 2130 struct tulip_softc *sc = arg; 2131 int s; 2132 2133 s = splnet(); 2134 mii_tick(&sc->sc_mii); 2135 splx(s); 2136 2137 timeout(tlp_mii_tick, sc, hz); 2138 } 2139 2140 /* 2141 * tlp_mii_statchg: [mii interface function] 2142 * 2143 * Callback from PHY when media changes. 2144 */ 2145 void 2146 tlp_mii_statchg(self) 2147 struct device *self; 2148 { 2149 struct tulip_softc *sc = (struct tulip_softc *)self; 2150 2151 /* Idle the transmit and receive processes. */ 2152 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2153 2154 /* 2155 * XXX What about Heartbeat Disable? Is it magically frobbed 2156 * XXX by the PHY? I hope so... 2157 */ 2158 2159 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 2160 sc->sc_opmode |= OPMODE_TTM; 2161 else 2162 sc->sc_opmode &= ~OPMODE_TTM; 2163 2164 if (sc->sc_mii.mii_media_active & IFM_FDX) 2165 sc->sc_opmode |= OPMODE_FD; 2166 else 2167 sc->sc_opmode &= ~OPMODE_FD; 2168 2169 /* 2170 * Write new OPMODE bits. This also restarts the transmit 2171 * and receive processes. 2172 */ 2173 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2174 2175 /* XXX Update ifp->if_baudrate */ 2176 } 2177 2178 /* 2179 * tlp_mii_getmedia: 2180 * 2181 * Callback from ifmedia to request current media status. 2182 */ 2183 void 2184 tlp_mii_getmedia(sc, ifmr) 2185 struct tulip_softc *sc; 2186 struct ifmediareq *ifmr; 2187 { 2188 2189 mii_pollstat(&sc->sc_mii); 2190 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2191 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2192 } 2193 2194 /* 2195 * tlp_mii_setmedia: 2196 * 2197 * Callback from ifmedia to request new media setting. 2198 */ 2199 int 2200 tlp_mii_setmedia(sc) 2201 struct tulip_softc *sc; 2202 { 2203 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2204 2205 if (ifp->if_flags & IFF_UP) 2206 mii_mediachg(&sc->sc_mii); 2207 return (0); 2208 } 2209 2210 #define MII_EMIT(sc, x) \ 2211 do { \ 2212 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2213 delay(1); \ 2214 } while (0) 2215 2216 /* 2217 * tlp_sio_mii_sync: 2218 * 2219 * Synchronize the SIO-attached MII. 2220 */ 2221 void 2222 tlp_sio_mii_sync(sc) 2223 struct tulip_softc *sc; 2224 { 2225 u_int32_t miirom; 2226 int i; 2227 2228 miirom = MIIROM_MIIDIR|MIIROM_MDO; 2229 2230 MII_EMIT(sc, miirom); 2231 for (i = 0; i < 32; i++) { 2232 MII_EMIT(sc, miirom | MIIROM_MDC); 2233 MII_EMIT(sc, miirom); 2234 } 2235 } 2236 2237 /* 2238 * tlp_sio_mii_sendbits: 2239 * 2240 * Send a series of bits out the SIO to the MII. 2241 */ 2242 void 2243 tlp_sio_mii_sendbits(sc, data, nbits) 2244 struct tulip_softc *sc; 2245 u_int32_t data; 2246 int nbits; 2247 { 2248 u_int32_t miirom, i; 2249 2250 miirom = MIIROM_MIIDIR; 2251 MII_EMIT(sc, miirom); 2252 2253 for (i = 1 << (nbits - 1); i != 0; i >>= 1) { 2254 if (data & i) 2255 miirom |= MIIROM_MDO; 2256 else 2257 miirom &= ~MIIROM_MDO; 2258 MII_EMIT(sc, miirom); 2259 MII_EMIT(sc, miirom|MIIROM_MDC); 2260 MII_EMIT(sc, miirom); 2261 } 2262 } 2263 2264 /* 2265 * tlp_sio_mii_readreg: 2266 * 2267 * Read a PHY register via SIO-attached MII. 2268 */ 2269 int 2270 tlp_sio_mii_readreg(self, phy, reg) 2271 struct device *self; 2272 int phy, reg; 2273 { 2274 struct tulip_softc *sc = (void *) self; 2275 int val = 0, err = 0, i; 2276 2277 tlp_sio_mii_sync(sc); 2278 2279 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2280 tlp_sio_mii_sendbits(sc, MII_COMMAND_READ, 2); 2281 tlp_sio_mii_sendbits(sc, phy, 5); 2282 tlp_sio_mii_sendbits(sc, reg, 5); 2283 2284 MII_EMIT(sc, MIIROM_MIIDIR); 2285 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2286 2287 MII_EMIT(sc, 0); 2288 MII_EMIT(sc, MIIROM_MDC); 2289 2290 err = TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI); 2291 2292 MII_EMIT(sc, 0); 2293 MII_EMIT(sc, MIIROM_MDC); 2294 2295 for (i = 0; i < 16; i++) { 2296 val <<= 1; 2297 MII_EMIT(sc, 0); 2298 if (err == 0 && TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI)) 2299 val |= 1; 2300 MII_EMIT(sc, MIIROM_MDC); 2301 } 2302 2303 MII_EMIT(sc, 0); 2304 2305 return (err ? 0 : val); 2306 } 2307 2308 /* 2309 * tlp_sio_mii_writereg: 2310 * 2311 * Write a PHY register via SIO-attached MII. 2312 */ 2313 void 2314 tlp_sio_mii_writereg(self, phy, reg, val) 2315 struct device *self; 2316 int phy, reg, val; 2317 { 2318 struct tulip_softc *sc = (void *) self; 2319 2320 tlp_sio_mii_sync(sc); 2321 2322 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2323 tlp_sio_mii_sendbits(sc, MII_COMMAND_WRITE, 2); 2324 tlp_sio_mii_sendbits(sc, phy, 5); 2325 tlp_sio_mii_sendbits(sc, reg, 5); 2326 tlp_sio_mii_sendbits(sc, MII_COMMAND_ACK, 2); 2327 tlp_sio_mii_sendbits(sc, val, 16); 2328 2329 MII_EMIT(sc, 0); 2330 } 2331 2332 #undef MII_EMIT 2333 2334 /* 2335 * tlp_pnic_mii_readreg: 2336 * 2337 * Read a PHY register on the Lite-On PNIC. 2338 */ 2339 int 2340 tlp_pnic_mii_readreg(self, phy, reg) 2341 struct device *self; 2342 int phy, reg; 2343 { 2344 struct tulip_softc *sc = (void *) self; 2345 u_int32_t val; 2346 int i; 2347 2348 TULIP_WRITE(sc, CSR_PNIC_MII, 2349 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 2350 (reg << PNIC_MII_REGSHIFT)); 2351 2352 for (i = 0; i < 1000; i++) { 2353 delay(10); 2354 val = TULIP_READ(sc, CSR_PNIC_MII); 2355 if ((val & PNIC_MII_BUSY) == 0) { 2356 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 2357 return (0); 2358 else 2359 return (val & PNIC_MII_DATA); 2360 } 2361 } 2362 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 2363 return (0); 2364 } 2365 2366 /* 2367 * tlp_pnic_mii_writereg: 2368 * 2369 * Write a PHY register on the Lite-On PNIC. 2370 */ 2371 void 2372 tlp_pnic_mii_writereg(self, phy, reg, val) 2373 struct device *self; 2374 int phy, reg, val; 2375 { 2376 struct tulip_softc *sc = (void *) self; 2377 int i; 2378 2379 TULIP_WRITE(sc, CSR_PNIC_MII, 2380 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 2381 (reg << PNIC_MII_REGSHIFT) | val); 2382 2383 for (i = 0; i < 1000; i++) { 2384 delay(10); 2385 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 2386 return; 2387 } 2388 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 2389 } 2390 2391 /***************************************************************************** 2392 * Chip/board-specific media switches. The ones here are ones that 2393 * are potentially common to multiple front-ends. 2394 *****************************************************************************/ 2395 2396 /* 2397 * MII-on-SIO media switch. Handles only MII attached to the SIO. 2398 */ 2399 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 2400 2401 const struct tulip_mediasw tlp_sio_mii_mediasw = { 2402 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 2403 }; 2404 2405 void 2406 tlp_sio_mii_tmsw_init(sc) 2407 struct tulip_softc *sc; 2408 { 2409 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2410 2411 sc->sc_mii.mii_ifp = ifp; 2412 sc->sc_mii.mii_readreg = tlp_sio_mii_readreg; 2413 sc->sc_mii.mii_writereg = tlp_sio_mii_writereg; 2414 sc->sc_mii.mii_statchg = tlp_mii_statchg; 2415 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2416 tlp_mediastatus); 2417 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 2418 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 2419 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 2420 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 2421 } else { 2422 sc->sc_flags |= TULIPF_HAS_MII; 2423 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2424 } 2425 } 2426 2427 /* 2428 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 2429 */ 2430 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 2431 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 2432 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 2433 2434 const struct tulip_mediasw tlp_pnic_mediasw = { 2435 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 2436 }; 2437 2438 void 2439 tlp_pnic_tmsw_init(sc) 2440 struct tulip_softc *sc; 2441 { 2442 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2443 2444 sc->sc_mii.mii_ifp = ifp; 2445 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 2446 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 2447 sc->sc_mii.mii_statchg = tlp_mii_statchg; 2448 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2449 tlp_mediastatus); 2450 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 2451 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 2452 /* XXX USE INTERNAL NWAY! */ 2453 printf("%s: no support for PNIC NWAY yet\n", 2454 sc->sc_dev.dv_xname); 2455 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 2456 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 2457 } else { 2458 sc->sc_flags |= TULIPF_HAS_MII; 2459 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2460 } 2461 } 2462 2463 void 2464 tlp_pnic_tmsw_get(sc, ifmr) 2465 struct tulip_softc *sc; 2466 struct ifmediareq *ifmr; 2467 { 2468 2469 if (sc->sc_flags & TULIPF_HAS_MII) 2470 tlp_mii_getmedia(sc, ifmr); 2471 else { 2472 /* XXX CHECK INTERNAL NWAY! */ 2473 ifmr->ifm_status = 0; 2474 ifmr->ifm_active = IFM_ETHER|IFM_NONE; 2475 } 2476 } 2477 2478 int 2479 tlp_pnic_tmsw_set(sc) 2480 struct tulip_softc *sc; 2481 { 2482 2483 if (sc->sc_flags & TULIPF_HAS_MII) 2484 return (tlp_mii_setmedia(sc)); 2485 2486 /* XXX USE INTERNAL NWAY! */ 2487 return (EIO); 2488 } 2489
Indexes created Tue Sep 23 22:09:46 GMT 2025