tulip.c revision 1.35 1 /* $NetBSD: tulip.c,v 1.35 1999/12/11 00:33:01 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family, and a variety of clone chips.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/mbuf.h>
52 #include <sys/malloc.h>
53 #include <sys/kernel.h>
54 #include <sys/socket.h>
55 #include <sys/ioctl.h>
56 #include <sys/errno.h>
57 #include <sys/device.h>
58
59 #include <machine/endian.h>
60
61 #include <vm/vm.h> /* for PAGE_SIZE */
62
63 #include <net/if.h>
64 #include <net/if_dl.h>
65 #include <net/if_media.h>
66 #include <net/if_ether.h>
67
68 #if NBPFILTER > 0
69 #include <net/bpf.h>
70 #endif
71
72 #ifdef INET
73 #include <netinet/in.h>
74 #include <netinet/if_inarp.h>
75 #endif
76
77 #ifdef NS
78 #include <netns/ns.h>
79 #include <netns/ns_if.h>
80 #endif
81
82 #include <machine/bus.h>
83 #include <machine/intr.h>
84
85 #include <dev/mii/mii.h>
86 #include <dev/mii/miivar.h>
87 #include <dev/mii/mii_bitbang.h>
88
89 #include <dev/ic/tulipreg.h>
90 #include <dev/ic/tulipvar.h>
91
92 /*
93 * The following tables compute the transmit threshold mode. We start
94 * at index 0. When ever we get a transmit underrun, we increment our
95 * index, falling back if we encounter the NULL terminator.
96 *
97 * Note: Store and forward mode is only available on the 100mbps chips
98 * (21140 and higher).
99 */
100 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = {
101 { OPMODE_TR_72, "72 bytes" },
102 { OPMODE_TR_96, "96 bytes" },
103 { OPMODE_TR_128, "128 bytes" },
104 { OPMODE_TR_160, "160 bytes" },
105 { 0, NULL },
106 };
107
108 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = {
109 { OPMODE_TR_72, "72/128 bytes" },
110 { OPMODE_TR_96, "96/256 bytes" },
111 { OPMODE_TR_128, "128/512 bytes" },
112 { OPMODE_TR_160, "160/1024 bytes" },
113 { OPMODE_SF, "store and forward mode" },
114 { 0, NULL },
115 };
116
117 #define TXTH_72 0
118 #define TXTH_96 1
119 #define TXTH_128 2
120 #define TXTH_160 3
121 #define TXTH_SF 4
122
123 /*
124 * The Winbond 89C840F does transmit threshold control totally
125 * differently. It simply has a 7-bit field which indicates
126 * the threshold:
127 *
128 * txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16;
129 *
130 * However, we just do Store-and-Forward mode on these chips, since
131 * the DMA engines seem to be flaky.
132 */
133 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = {
134 { 0, "store and forward mode" },
135 { 0, NULL },
136 };
137
138 #define TXTH_WINB_SF 0
139
140 void tlp_start __P((struct ifnet *));
141 void tlp_watchdog __P((struct ifnet *));
142 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t));
143
144 void tlp_shutdown __P((void *));
145
146 void tlp_reset __P((struct tulip_softc *));
147 int tlp_init __P((struct tulip_softc *));
148 void tlp_rxdrain __P((struct tulip_softc *));
149 void tlp_stop __P((struct tulip_softc *, int));
150 int tlp_add_rxbuf __P((struct tulip_softc *, int));
151 void tlp_idle __P((struct tulip_softc *, u_int32_t));
152 void tlp_srom_idle __P((struct tulip_softc *));
153
154 void tlp_filter_setup __P((struct tulip_softc *));
155 void tlp_winb_filter_setup __P((struct tulip_softc *));
156 void tlp_al981_filter_setup __P((struct tulip_softc *));
157
158 void tlp_rxintr __P((struct tulip_softc *));
159 void tlp_txintr __P((struct tulip_softc *));
160
161 void tlp_mii_tick __P((void *));
162 void tlp_mii_statchg __P((struct device *));
163 void tlp_winb_mii_statchg __P((struct device *));
164
165 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *));
166 int tlp_mii_setmedia __P((struct tulip_softc *));
167
168 int tlp_bitbang_mii_readreg __P((struct device *, int, int));
169 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int));
170
171 int tlp_pnic_mii_readreg __P((struct device *, int, int));
172 void tlp_pnic_mii_writereg __P((struct device *, int, int, int));
173
174 int tlp_al981_mii_readreg __P((struct device *, int, int));
175 void tlp_al981_mii_writereg __P((struct device *, int, int, int));
176
177 void tlp_2114x_preinit __P((struct tulip_softc *));
178 void tlp_2114x_mii_preinit __P((struct tulip_softc *));
179 void tlp_pnic_preinit __P((struct tulip_softc *));
180
181 void tlp_21140_reset __P((struct tulip_softc *));
182 void tlp_21142_reset __P((struct tulip_softc *));
183 void tlp_pmac_reset __P((struct tulip_softc *));
184
185 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t));
186 #define tlp_mchash(addr, sz) (tlp_crc32((addr), ETHER_ADDR_LEN) & ((sz) - 1))
187
188 /*
189 * MII bit-bang glue.
190 */
191 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *));
192 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t));
193
194 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = {
195 tlp_sio_mii_bitbang_read,
196 tlp_sio_mii_bitbang_write,
197 {
198 MIIROM_MDO, /* MII_BIT_MDO */
199 MIIROM_MDI, /* MII_BIT_MDI */
200 MIIROM_MDC, /* MII_BIT_MDC */
201 0, /* MII_BIT_DIR_HOST_PHY */
202 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */
203 }
204 };
205
206 #ifdef TLP_DEBUG
207 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \
208 printf x
209 #else
210 #define DPRINTF(sc, x) /* nothing */
211 #endif
212
213 #ifdef TLP_STATS
214 void tlp_print_stats __P((struct tulip_softc *));
215 #endif
216
217 /*
218 * tlp_attach:
219 *
220 * Attach a Tulip interface to the system.
221 */
222 void
223 tlp_attach(sc, enaddr)
224 struct tulip_softc *sc;
225 const u_int8_t *enaddr;
226 {
227 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
228 int i, rseg, error;
229 bus_dma_segment_t seg;
230
231 /*
232 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift!
233 */
234
235 /*
236 * Setup the transmit threshold table.
237 */
238 switch (sc->sc_chip) {
239 case TULIP_CHIP_DE425:
240 case TULIP_CHIP_21040:
241 case TULIP_CHIP_21041:
242 sc->sc_txth = tlp_10_txthresh_tab;
243 break;
244
245 default:
246 sc->sc_txth = tlp_10_100_txthresh_tab;
247 break;
248 }
249
250 /*
251 * Setup the filter setup function.
252 */
253 switch (sc->sc_chip) {
254 case TULIP_CHIP_WB89C840F:
255 sc->sc_filter_setup = tlp_winb_filter_setup;
256 break;
257
258 case TULIP_CHIP_AL981:
259 sc->sc_filter_setup = tlp_al981_filter_setup;
260 break;
261
262 default:
263 sc->sc_filter_setup = tlp_filter_setup;
264 break;
265 }
266
267 /*
268 * Set up the media status change function.
269 */
270 switch (sc->sc_chip) {
271 case TULIP_CHIP_WB89C840F:
272 sc->sc_statchg = tlp_winb_mii_statchg;
273 break;
274
275 default:
276 /*
277 * We may override this if we have special media
278 * handling requirements (e.g. flipping GPIO pins).
279 *
280 * The pure-MII statchg function covers the basics.
281 */
282 sc->sc_statchg = tlp_mii_statchg;
283 break;
284 }
285
286 /*
287 * Set up various chip-specific quirks.
288 */
289 switch (sc->sc_chip) {
290 case TULIP_CHIP_21140:
291 case TULIP_CHIP_21140A:
292 case TULIP_CHIP_21142:
293 case TULIP_CHIP_21143:
294 case TULIP_CHIP_82C115: /* 21143-like */
295 case TULIP_CHIP_MX98713: /* 21140-like */
296 case TULIP_CHIP_MX98713A: /* 21143-like */
297 case TULIP_CHIP_MX98715: /* 21143-like */
298 case TULIP_CHIP_MX98715A: /* 21143-like */
299 case TULIP_CHIP_MX98725: /* 21143-like */
300 sc->sc_preinit = tlp_2114x_preinit;
301 break;
302
303 case TULIP_CHIP_82C168:
304 case TULIP_CHIP_82C169:
305 sc->sc_preinit = tlp_pnic_preinit;
306
307 /*
308 * These chips seem to have busted DMA engines; just put them
309 * in Store-and-Forward mode from the get-go.
310 */
311 sc->sc_txthresh = TXTH_SF;
312 break;
313
314 case TULIP_CHIP_WB89C840F:
315 sc->sc_flags |= TULIPF_IC_FS;
316 break;
317
318 default:
319 /* Nothing. */
320 }
321
322 /*
323 * Set up the MII bit-bang operations.
324 */
325 switch (sc->sc_chip) {
326 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */
327 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
328 break;
329
330 default:
331 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
332 }
333
334 SIMPLEQ_INIT(&sc->sc_txfreeq);
335 SIMPLEQ_INIT(&sc->sc_txdirtyq);
336
337 /*
338 * Allocate the control data structures, and create and load the
339 * DMA map for it.
340 */
341 if ((error = bus_dmamem_alloc(sc->sc_dmat,
342 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg,
343 0)) != 0) {
344 printf("%s: unable to allocate control data, error = %d\n",
345 sc->sc_dev.dv_xname, error);
346 goto fail_0;
347 }
348
349 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
350 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data,
351 BUS_DMA_COHERENT)) != 0) {
352 printf("%s: unable to map control data, error = %d\n",
353 sc->sc_dev.dv_xname, error);
354 goto fail_1;
355 }
356
357 if ((error = bus_dmamap_create(sc->sc_dmat,
358 sizeof(struct tulip_control_data), 1,
359 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
360 printf("%s: unable to create control data DMA map, "
361 "error = %d\n", sc->sc_dev.dv_xname, error);
362 goto fail_2;
363 }
364
365 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
366 sc->sc_control_data, sizeof(struct tulip_control_data), NULL,
367 0)) != 0) {
368 printf("%s: unable to load control data DMA map, error = %d\n",
369 sc->sc_dev.dv_xname, error);
370 goto fail_3;
371 }
372
373 /*
374 * Create the transmit buffer DMA maps.
375 */
376 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
377 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
378 TULIP_NTXSEGS, MCLBYTES, 0, 0,
379 &sc->sc_txsoft[i].txs_dmamap)) != 0) {
380 printf("%s: unable to create tx DMA map %d, "
381 "error = %d\n", sc->sc_dev.dv_xname, i, error);
382 goto fail_4;
383 }
384 }
385
386 /*
387 * Create the recieve buffer DMA maps.
388 */
389 for (i = 0; i < TULIP_NRXDESC; i++) {
390 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
391 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
392 printf("%s: unable to create rx DMA map %d, "
393 "error = %d\n", sc->sc_dev.dv_xname, i, error);
394 goto fail_5;
395 }
396 sc->sc_rxsoft[i].rxs_mbuf = NULL;
397 }
398
399 /*
400 * Reset the chip to a known state.
401 */
402 tlp_reset(sc);
403
404 /* Announce ourselves. */
405 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname,
406 sc->sc_name[0] != '\0' ? sc->sc_name : "",
407 sc->sc_name[0] != '\0' ? ", " : "",
408 ether_sprintf(enaddr));
409
410 /*
411 * Initialize our media structures. This may probe the MII, if
412 * present.
413 */
414 (*sc->sc_mediasw->tmsw_init)(sc);
415
416 ifp = &sc->sc_ethercom.ec_if;
417 strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
418 ifp->if_softc = sc;
419 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
420 ifp->if_ioctl = tlp_ioctl;
421 ifp->if_start = tlp_start;
422 ifp->if_watchdog = tlp_watchdog;
423
424 /*
425 * Attach the interface.
426 */
427 if_attach(ifp);
428 ether_ifattach(ifp, enaddr);
429 #if NBPFILTER > 0
430 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
431 sizeof(struct ether_header));
432 #endif
433
434 /*
435 * Make sure the interface is shutdown during reboot.
436 */
437 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc);
438 if (sc->sc_sdhook == NULL)
439 printf("%s: WARNING: unable to establish shutdown hook\n",
440 sc->sc_dev.dv_xname);
441 return;
442
443 /*
444 * Free any resources we've allocated during the failed attach
445 * attempt. Do this in reverse order and fall through.
446 */
447 fail_5:
448 for (i = 0; i < TULIP_NRXDESC; i++) {
449 if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
450 bus_dmamap_destroy(sc->sc_dmat,
451 sc->sc_rxsoft[i].rxs_dmamap);
452 }
453 fail_4:
454 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
455 if (sc->sc_txsoft[i].txs_dmamap != NULL)
456 bus_dmamap_destroy(sc->sc_dmat,
457 sc->sc_txsoft[i].txs_dmamap);
458 }
459 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
460 fail_3:
461 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
462 fail_2:
463 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
464 sizeof(struct tulip_control_data));
465 fail_1:
466 bus_dmamem_free(sc->sc_dmat, &seg, rseg);
467 fail_0:
468 return;
469 }
470
471 /*
472 * tlp_shutdown:
473 *
474 * Make sure the interface is stopped at reboot time.
475 */
476 void
477 tlp_shutdown(arg)
478 void *arg;
479 {
480 struct tulip_softc *sc = arg;
481
482 tlp_stop(sc, 1);
483 }
484
485 /*
486 * tlp_start: [ifnet interface function]
487 *
488 * Start packet transmission on the interface.
489 */
490 void
491 tlp_start(ifp)
492 struct ifnet *ifp;
493 {
494 struct tulip_softc *sc = ifp->if_softc;
495 struct mbuf *m0, *m;
496 struct tulip_txsoft *txs, *last_txs;
497 bus_dmamap_t dmamap;
498 int error, firsttx, nexttx, lasttx, ofree, seg;
499
500 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n",
501 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags));
502
503 /*
504 * If we want a filter setup, it means no more descriptors were
505 * available for the setup routine. Let it get a chance to wedge
506 * itself into the ring.
507 */
508 if (sc->sc_flags & TULIPF_WANT_SETUP)
509 ifp->if_flags |= IFF_OACTIVE;
510
511 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
512 return;
513
514 /*
515 * Remember the previous number of free descriptors and
516 * the first descriptor we'll use.
517 */
518 ofree = sc->sc_txfree;
519 firsttx = sc->sc_txnext;
520
521 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n",
522 sc->sc_dev.dv_xname, ofree, firsttx));
523
524 /*
525 * Loop through the send queue, setting up transmit descriptors
526 * until we drain the queue, or use up all available transmit
527 * descriptors.
528 */
529 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL &&
530 sc->sc_txfree != 0) {
531 /*
532 * Grab a packet off the queue.
533 */
534 IF_DEQUEUE(&ifp->if_snd, m0);
535 if (m0 == NULL)
536 break;
537
538 dmamap = txs->txs_dmamap;
539
540 /*
541 * Load the DMA map. If this fails, the packet either
542 * didn't fit in the alloted number of segments, or we were
543 * short on resources. In this case, we'll copy and try
544 * again.
545 */
546 if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
547 BUS_DMA_NOWAIT) != 0) {
548 MGETHDR(m, M_DONTWAIT, MT_DATA);
549 if (m == NULL) {
550 printf("%s: unable to allocate Tx mbuf\n",
551 sc->sc_dev.dv_xname);
552 IF_PREPEND(&ifp->if_snd, m0);
553 break;
554 }
555 if (m0->m_pkthdr.len > MHLEN) {
556 MCLGET(m, M_DONTWAIT);
557 if ((m->m_flags & M_EXT) == 0) {
558 printf("%s: unable to allocate Tx "
559 "cluster\n", sc->sc_dev.dv_xname);
560 m_freem(m);
561 IF_PREPEND(&ifp->if_snd, m0);
562 break;
563 }
564 }
565 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
566 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
567 m_freem(m0);
568 m0 = m;
569 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
570 m0, BUS_DMA_NOWAIT);
571 if (error) {
572 printf("%s: unable to load Tx buffer, "
573 "error = %d\n", sc->sc_dev.dv_xname, error);
574 IF_PREPEND(&ifp->if_snd, m0);
575 break;
576 }
577 }
578
579 /*
580 * Ensure we have enough descriptors free to describe
581 * the packet.
582 */
583 if (dmamap->dm_nsegs > sc->sc_txfree) {
584 /*
585 * Not enough free descriptors to transmit this
586 * packet. We haven't committed to anything yet,
587 * so just unload the DMA map, put the packet
588 * back on the queue, and punt. Notify the upper
589 * layer that there are no more slots left.
590 *
591 * XXX We could allocate an mbuf and copy, but
592 * XXX it is worth it?
593 */
594 ifp->if_flags |= IFF_OACTIVE;
595 bus_dmamap_unload(sc->sc_dmat, dmamap);
596 IF_PREPEND(&ifp->if_snd, m0);
597 break;
598 }
599
600 /*
601 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET.
602 */
603
604 /* Sync the DMA map. */
605 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
606 BUS_DMASYNC_PREWRITE);
607
608 /*
609 * Initialize the transmit descriptors.
610 */
611 for (nexttx = sc->sc_txnext, seg = 0;
612 seg < dmamap->dm_nsegs;
613 seg++, nexttx = TULIP_NEXTTX(nexttx)) {
614 /*
615 * If this is the first descriptor we're
616 * enqueueing, don't set the OWN bit just
617 * yet. That could cause a race condition.
618 * We'll do it below.
619 */
620 sc->sc_txdescs[nexttx].td_status =
621 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN);
622 sc->sc_txdescs[nexttx].td_bufaddr1 =
623 htole32(dmamap->dm_segs[seg].ds_addr);
624 sc->sc_txdescs[nexttx].td_ctl =
625 htole32((dmamap->dm_segs[seg].ds_len <<
626 TDCTL_SIZE1_SHIFT) | TDCTL_CH);
627 lasttx = nexttx;
628 }
629
630 /* Set `first segment' and `last segment' appropriately. */
631 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS);
632 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS);
633
634 #ifdef TLP_DEBUG
635 if (ifp->if_flags & IFF_DEBUG) {
636 printf(" txsoft %p trainsmit chain:\n", txs);
637 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) {
638 printf(" descriptor %d:\n", seg);
639 printf(" td_status: 0x%08x\n",
640 le32toh(sc->sc_txdescs[seg].td_status));
641 printf(" td_ctl: 0x%08x\n",
642 le32toh(sc->sc_txdescs[seg].td_ctl));
643 printf(" td_bufaddr1: 0x%08x\n",
644 le32toh(sc->sc_txdescs[seg].td_bufaddr1));
645 printf(" td_bufaddr2: 0x%08x\n",
646 le32toh(sc->sc_txdescs[seg].td_bufaddr2));
647 if (seg == lasttx)
648 break;
649 }
650 }
651 #endif
652
653 /* Sync the descriptors we're using. */
654 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
655 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
656
657 /*
658 * Store a pointer to the packet so we can free it later,
659 * and remember what txdirty will be once the packet is
660 * done.
661 */
662 txs->txs_mbuf = m0;
663 txs->txs_firstdesc = sc->sc_txnext;
664 txs->txs_lastdesc = lasttx;
665
666 /* Advance the tx pointer. */
667 sc->sc_txfree -= dmamap->dm_nsegs;
668 sc->sc_txnext = nexttx;
669
670 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q);
671 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
672
673 last_txs = txs;
674
675 #if NBPFILTER > 0
676 /*
677 * Pass the packet to any BPF listeners.
678 */
679 if (ifp->if_bpf)
680 bpf_mtap(ifp->if_bpf, m0);
681 #endif /* NBPFILTER > 0 */
682 }
683
684 if (txs == NULL || sc->sc_txfree == 0) {
685 /* No more slots left; notify upper layer. */
686 ifp->if_flags |= IFF_OACTIVE;
687 }
688
689 if (sc->sc_txfree != ofree) {
690 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n",
691 sc->sc_dev.dv_xname, lasttx, firsttx));
692 /*
693 * Cause a transmit interrupt to happen on the
694 * last packet we enqueued.
695 */
696 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC);
697 TULIP_CDTXSYNC(sc, lasttx, 1,
698 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
699
700 /*
701 * Some clone chips want IC on the *first* segment in
702 * the packet. Appease them.
703 */
704 if ((sc->sc_flags & TULIPF_IC_FS) != 0 &&
705 last_txs->txs_firstdesc != lasttx) {
706 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |=
707 htole32(TDCTL_Tx_IC);
708 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1,
709 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
710 }
711
712 /*
713 * The entire packet chain is set up. Give the
714 * first descriptor to the chip now.
715 */
716 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN);
717 TULIP_CDTXSYNC(sc, firsttx, 1,
718 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
719
720 /* Wake up the transmitter. */
721 /* XXX USE AUTOPOLLING? */
722 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
723
724 /* Set a watchdog timer in case the chip flakes out. */
725 ifp->if_timer = 5;
726 }
727 }
728
729 /*
730 * tlp_watchdog: [ifnet interface function]
731 *
732 * Watchdog timer handler.
733 */
734 void
735 tlp_watchdog(ifp)
736 struct ifnet *ifp;
737 {
738 struct tulip_softc *sc = ifp->if_softc;
739 int doing_setup, doing_transmit;
740
741 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP);
742 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL);
743
744 if (doing_setup && doing_transmit) {
745 printf("%s: filter setup and transmit timeout\n",
746 sc->sc_dev.dv_xname);
747 ifp->if_oerrors++;
748 } else if (doing_transmit) {
749 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname);
750 ifp->if_oerrors++;
751 } else if (doing_setup)
752 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname);
753 else
754 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname);
755
756 (void) tlp_init(sc);
757
758 /* Try to get more packets going. */
759 tlp_start(ifp);
760 }
761
762 /*
763 * tlp_ioctl: [ifnet interface function]
764 *
765 * Handle control requests from the operator.
766 */
767 int
768 tlp_ioctl(ifp, cmd, data)
769 struct ifnet *ifp;
770 u_long cmd;
771 caddr_t data;
772 {
773 struct tulip_softc *sc = ifp->if_softc;
774 struct ifreq *ifr = (struct ifreq *)data;
775 struct ifaddr *ifa = (struct ifaddr *)data;
776 int s, error = 0;
777
778 s = splnet();
779
780 switch (cmd) {
781 case SIOCSIFADDR:
782 ifp->if_flags |= IFF_UP;
783
784 switch (ifa->ifa_addr->sa_family) {
785 #ifdef INET
786 case AF_INET:
787 if ((error = tlp_init(sc)) != 0)
788 break;
789 arp_ifinit(ifp, ifa);
790 break;
791 #endif /* INET */
792 #ifdef NS
793 case AF_NS:
794 {
795 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
796
797 if (ns_nullhost(*ina))
798 ina->x_host = *(union ns_host *)
799 LLADDR(ifp->if_sadl);
800 else
801 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
802 ifp->if_addrlen);
803 /* Set new address. */
804 error = tlp_init(sc);
805 break;
806 }
807 #endif /* NS */
808 default:
809 error = tlp_init(sc);
810 break;
811 }
812 break;
813
814 case SIOCSIFMTU:
815 if (ifr->ifr_mtu > ETHERMTU)
816 error = EINVAL;
817 else
818 ifp->if_mtu = ifr->ifr_mtu;
819 break;
820
821 case SIOCSIFFLAGS:
822 #ifdef TLP_STATS
823 if (ifp->if_flags & IFF_DEBUG)
824 tlp_print_stats(sc);
825 #endif
826 if ((ifp->if_flags & IFF_UP) == 0 &&
827 (ifp->if_flags & IFF_RUNNING) != 0) {
828 /*
829 * If interface is marked down and it is running, then
830 * stop it.
831 */
832 tlp_stop(sc, 1);
833 } else if ((ifp->if_flags & IFF_UP) != 0 &&
834 (ifp->if_flags & IFF_RUNNING) == 0) {
835 /*
836 * If interfase it marked up and it is stopped, then
837 * start it.
838 */
839 error = tlp_init(sc);
840 } else if ((ifp->if_flags & IFF_UP) != 0) {
841 /*
842 * Reset the interface to pick up changes in any other
843 * flags that affect the hardware state.
844 */
845 error = tlp_init(sc);
846 }
847 break;
848
849 case SIOCADDMULTI:
850 case SIOCDELMULTI:
851 error = (cmd == SIOCADDMULTI) ?
852 ether_addmulti(ifr, &sc->sc_ethercom) :
853 ether_delmulti(ifr, &sc->sc_ethercom);
854
855 if (error == ENETRESET) {
856 /*
857 * Multicast list has changed. Set the filter
858 * accordingly.
859 */
860 (*sc->sc_filter_setup)(sc);
861 error = 0;
862 }
863 break;
864
865 case SIOCSIFMEDIA:
866 case SIOCGIFMEDIA:
867 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
868 break;
869
870 default:
871 error = EINVAL;
872 break;
873 }
874
875 /* Try to get more packets going. */
876 tlp_start(ifp);
877
878 splx(s);
879 return (error);
880 }
881
882 /*
883 * tlp_intr:
884 *
885 * Interrupt service routine.
886 */
887 int
888 tlp_intr(arg)
889 void *arg;
890 {
891 struct tulip_softc *sc = arg;
892 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
893 u_int32_t status, rxstatus, txstatus;
894 int handled = 0, txthresh;
895
896 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname));
897
898 /*
899 * If the interface isn't running, the interrupt couldn't
900 * possibly have come from us.
901 */
902 if ((ifp->if_flags & IFF_RUNNING) == 0)
903 return (0);
904
905 for (;;) {
906 status = TULIP_READ(sc, CSR_STATUS);
907 if (status)
908 TULIP_WRITE(sc, CSR_STATUS, status);
909
910 if ((status & sc->sc_inten) == 0)
911 break;
912
913 handled = 1;
914
915 rxstatus = status & sc->sc_rxint_mask;
916 txstatus = status & sc->sc_txint_mask;
917
918 if (rxstatus) {
919 /* Grab new any new packets. */
920 tlp_rxintr(sc);
921
922 if (rxstatus & STATUS_RWT)
923 printf("%s: receive watchdog timeout\n",
924 sc->sc_dev.dv_xname);
925
926 if (rxstatus & STATUS_RU) {
927 printf("%s: receive ring overrun\n",
928 sc->sc_dev.dv_xname);
929 /* Get the receive process going again. */
930 tlp_idle(sc, OPMODE_SR);
931 TULIP_WRITE(sc, CSR_RXLIST,
932 TULIP_CDRXADDR(sc, sc->sc_rxptr));
933 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
934 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
935 break;
936 }
937 }
938
939 if (txstatus) {
940 /* Sweep up transmit descriptors. */
941 tlp_txintr(sc);
942
943 if (txstatus & STATUS_TJT)
944 printf("%s: transmit jabber timeout\n",
945 sc->sc_dev.dv_xname);
946
947 if (txstatus & STATUS_UNF) {
948 /*
949 * Increase our transmit threshold if
950 * another is available.
951 */
952 txthresh = sc->sc_txthresh + 1;
953 if (sc->sc_txth[txthresh].txth_name != NULL) {
954 /* Idle the transmit process. */
955 tlp_idle(sc, OPMODE_ST);
956
957 sc->sc_txthresh = txthresh;
958 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF);
959 sc->sc_opmode |=
960 sc->sc_txth[txthresh].txth_opmode;
961 printf("%s: transmit underrun; new "
962 "threshold: %s\n",
963 sc->sc_dev.dv_xname,
964 sc->sc_txth[txthresh].txth_name);
965
966 /*
967 * Set the new threshold and restart
968 * the transmit process.
969 */
970 TULIP_WRITE(sc, CSR_OPMODE,
971 sc->sc_opmode);
972 }
973 /*
974 * XXX Log every Nth underrun from
975 * XXX now on?
976 */
977 }
978 }
979
980 if (status & (STATUS_TPS|STATUS_RPS)) {
981 if (status & STATUS_TPS)
982 printf("%s: transmit process stopped\n",
983 sc->sc_dev.dv_xname);
984 if (status & STATUS_RPS)
985 printf("%s: receive process stopped\n",
986 sc->sc_dev.dv_xname);
987 (void) tlp_init(sc);
988 break;
989 }
990
991 if (status & STATUS_SE) {
992 const char *str;
993 switch (status & STATUS_EB) {
994 case STATUS_EB_PARITY:
995 str = "parity error";
996 break;
997
998 case STATUS_EB_MABT:
999 str = "master abort";
1000 break;
1001
1002 case STATUS_EB_TABT:
1003 str = "target abort";
1004 break;
1005
1006 default:
1007 str = "unknown error";
1008 break;
1009 }
1010 printf("%s: fatal system error: %s\n",
1011 sc->sc_dev.dv_xname, str);
1012 (void) tlp_init(sc);
1013 break;
1014 }
1015
1016 /*
1017 * Not handled:
1018 *
1019 * Transmit buffer unavailable -- normal
1020 * condition, nothing to do, really.
1021 *
1022 * General purpose timer experied -- we don't
1023 * use the general purpose timer.
1024 *
1025 * Early receive interrupt -- not available on
1026 * all chips, we just use RI. We also only
1027 * use single-segment receive DMA, so this
1028 * is mostly useless.
1029 */
1030 }
1031
1032 /* Try to get more packets going. */
1033 tlp_start(ifp);
1034
1035 return (handled);
1036 }
1037
1038 /*
1039 * tlp_rxintr:
1040 *
1041 * Helper; handle receive interrupts.
1042 */
1043 void
1044 tlp_rxintr(sc)
1045 struct tulip_softc *sc;
1046 {
1047 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1048 struct ether_header *eh;
1049 struct tulip_rxsoft *rxs;
1050 struct mbuf *m;
1051 u_int32_t rxstat;
1052 int i, len;
1053
1054 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) {
1055 rxs = &sc->sc_rxsoft[i];
1056
1057 TULIP_CDRXSYNC(sc, i,
1058 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1059
1060 rxstat = le32toh(sc->sc_rxdescs[i].td_status);
1061
1062 if (rxstat & TDSTAT_OWN) {
1063 /*
1064 * We have processed all of the receive buffers.
1065 */
1066 break;
1067 }
1068
1069 /*
1070 * Make sure the packet fit in one buffer. This should
1071 * always be the case. But the Lite-On PNIC, rev 33
1072 * has an awful receive engine bug, which may require
1073 * a very icky work-around.
1074 */
1075 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) !=
1076 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) {
1077 printf("%s: incoming packet spilled, resetting\n",
1078 sc->sc_dev.dv_xname);
1079 (void) tlp_init(sc);
1080 return;
1081 }
1082
1083 /*
1084 * If any collisions were seen on the wire, count one.
1085 */
1086 if (rxstat & TDSTAT_Rx_CS)
1087 ifp->if_collisions++;
1088
1089 /*
1090 * If an error occured, update stats, clear the status
1091 * word, and leave the packet buffer in place. It will
1092 * simply be reused the next time the ring comes around.
1093 */
1094 if (rxstat & TDSTAT_ES) {
1095 #define PRINTERR(bit, str) \
1096 if (rxstat & (bit)) \
1097 printf("%s: receive error: %s\n", \
1098 sc->sc_dev.dv_xname, str)
1099 ifp->if_ierrors++;
1100 PRINTERR(TDSTAT_Rx_DE, "descriptor error");
1101 PRINTERR(TDSTAT_Rx_RF, "runt frame");
1102 PRINTERR(TDSTAT_Rx_TL, "frame too long");
1103 PRINTERR(TDSTAT_Rx_RE, "MII error");
1104 PRINTERR(TDSTAT_Rx_DB, "dribbling bit");
1105 PRINTERR(TDSTAT_Rx_CE, "CRC error");
1106 #undef PRINTERR
1107 TULIP_INIT_RXDESC(sc, i);
1108 continue;
1109 }
1110
1111 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1112 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1113
1114 /*
1115 * No errors; receive the packet. Note the Tulip
1116 * includes the CRC with every packet; trim it.
1117 */
1118 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN;
1119
1120 #ifdef __NO_STRICT_ALIGNMENT
1121 /*
1122 * Allocate a new mbuf cluster. If that fails, we are
1123 * out of memory, and must drop the packet and recycle
1124 * the buffer that's already attached to this descriptor.
1125 */
1126 m = rxs->rxs_mbuf;
1127 if (tlp_add_rxbuf(sc, i) != 0) {
1128 ifp->if_ierrors++;
1129 TULIP_INIT_RXDESC(sc, i);
1130 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1131 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1132 continue;
1133 }
1134 #else
1135 /*
1136 * The Tulip's receive buffers must be 4-byte aligned.
1137 * But this means that the data after the Ethernet header
1138 * is misaligned. We must allocate a new buffer and
1139 * copy the data, shifted forward 2 bytes.
1140 */
1141 MGETHDR(m, M_DONTWAIT, MT_DATA);
1142 if (m == NULL) {
1143 dropit:
1144 ifp->if_ierrors++;
1145 TULIP_INIT_RXDESC(sc, i);
1146 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1147 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1148 continue;
1149 }
1150 if (len > (MHLEN - 2)) {
1151 MCLGET(m, M_DONTWAIT);
1152 if ((m->m_flags & M_EXT) == 0) {
1153 m_freem(m);
1154 goto dropit;
1155 }
1156 }
1157 m->m_data += 2;
1158
1159 /*
1160 * Note that we use clusters for incoming frames, so the
1161 * buffer is virtually contiguous.
1162 */
1163 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len);
1164
1165 /* Allow the receive descriptor to continue using its mbuf. */
1166 TULIP_INIT_RXDESC(sc, i);
1167 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1168 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1169 #endif /* __NO_STRICT_ALIGNMENT */
1170
1171 ifp->if_ipackets++;
1172 eh = mtod(m, struct ether_header *);
1173 m->m_pkthdr.rcvif = ifp;
1174 m->m_pkthdr.len = m->m_len = len;
1175
1176 #if NBPFILTER > 0
1177 /*
1178 * Pass this up to any BPF listeners, but only
1179 * pass it up the stack if its for us.
1180 */
1181 if (ifp->if_bpf)
1182 bpf_mtap(ifp->if_bpf, m);
1183 #endif /* NPBFILTER > 0 */
1184
1185 /*
1186 * This test is outside the NBPFILTER block because
1187 * on the 21140 we have to use Hash-Only mode due to
1188 * a bug in the filter logic.
1189 */
1190 if ((ifp->if_flags & IFF_PROMISC) != 0 ||
1191 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) {
1192 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost,
1193 ETHER_ADDR_LEN) != 0 &&
1194 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) {
1195 m_freem(m);
1196 continue;
1197 }
1198 }
1199
1200 /* Pass it on. */
1201 (*ifp->if_input)(ifp, m);
1202 }
1203
1204 /* Update the recieve pointer. */
1205 sc->sc_rxptr = i;
1206 }
1207
1208 /*
1209 * tlp_txintr:
1210 *
1211 * Helper; handle transmit interrupts.
1212 */
1213 void
1214 tlp_txintr(sc)
1215 struct tulip_softc *sc;
1216 {
1217 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1218 struct tulip_txsoft *txs;
1219 u_int32_t txstat;
1220
1221 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n",
1222 sc->sc_dev.dv_xname, sc->sc_flags));
1223
1224 ifp->if_flags &= ~IFF_OACTIVE;
1225
1226 /*
1227 * If we were doing a filter setup, check to see if it completed.
1228 */
1229 if (sc->sc_flags & TULIPF_DOING_SETUP) {
1230 TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1231 if ((sc->sc_setup_desc.td_status & TDSTAT_OWN) == 0)
1232 sc->sc_flags &= ~TULIPF_DOING_SETUP;
1233 }
1234
1235 /*
1236 * Go through our Tx list and free mbufs for those
1237 * frames that have been transmitted.
1238 */
1239 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
1240 TULIP_CDTXSYNC(sc, txs->txs_lastdesc,
1241 txs->txs_dmamap->dm_nsegs,
1242 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1243
1244 #ifdef TLP_DEBUG
1245 if (ifp->if_flags & IFF_DEBUG) {
1246 int i;
1247 printf(" txsoft %p trainsmit chain:\n", txs);
1248 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) {
1249 printf(" descriptor %d:\n", i);
1250 printf(" td_status: 0x%08x\n",
1251 le32toh(sc->sc_txdescs[i].td_status));
1252 printf(" td_ctl: 0x%08x\n",
1253 le32toh(sc->sc_txdescs[i].td_ctl));
1254 printf(" td_bufaddr1: 0x%08x\n",
1255 le32toh(sc->sc_txdescs[i].td_bufaddr1));
1256 printf(" td_bufaddr2: 0x%08x\n",
1257 le32toh(sc->sc_txdescs[i].td_bufaddr2));
1258 if (i == txs->txs_lastdesc)
1259 break;
1260 }
1261 }
1262 #endif
1263
1264 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status);
1265 if (txstat & TDSTAT_OWN)
1266 break;
1267
1268 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
1269
1270 sc->sc_txfree += txs->txs_dmamap->dm_nsegs;
1271
1272 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap,
1273 0, txs->txs_dmamap->dm_mapsize,
1274 BUS_DMASYNC_POSTWRITE);
1275 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
1276 m_freem(txs->txs_mbuf);
1277 txs->txs_mbuf = NULL;
1278
1279 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1280
1281 /*
1282 * Check for errors and collisions.
1283 */
1284 #ifdef TLP_STATS
1285 if (txstat & TDSTAT_Tx_UF)
1286 sc->sc_stats.ts_tx_uf++;
1287 if (txstat & TDSTAT_Tx_TO)
1288 sc->sc_stats.ts_tx_to++;
1289 if (txstat & TDSTAT_Tx_EC)
1290 sc->sc_stats.ts_tx_ec++;
1291 if (txstat & TDSTAT_Tx_LC)
1292 sc->sc_stats.ts_tx_lc++;
1293 #endif
1294
1295 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO))
1296 ifp->if_oerrors++;
1297
1298 if (txstat & TDSTAT_Tx_EC)
1299 ifp->if_collisions += 16;
1300 else
1301 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat);
1302 if (txstat & TDSTAT_Tx_LC)
1303 ifp->if_collisions++;
1304
1305 ifp->if_opackets++;
1306 }
1307
1308 /*
1309 * If there are no more pending transmissions, cancel the watchdog
1310 * timer.
1311 */
1312 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0)
1313 ifp->if_timer = 0;
1314
1315 /*
1316 * If we have a receive filter setup pending, do it now.
1317 */
1318 if (sc->sc_flags & TULIPF_WANT_SETUP)
1319 (*sc->sc_filter_setup)(sc);
1320 }
1321
1322 #ifdef TLP_STATS
1323 void
1324 tlp_print_stats(sc)
1325 struct tulip_softc *sc;
1326 {
1327
1328 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n",
1329 sc->sc_dev.dv_xname,
1330 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to,
1331 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc);
1332 }
1333 #endif
1334
1335 /*
1336 * tlp_reset:
1337 *
1338 * Perform a soft reset on the Tulip.
1339 */
1340 void
1341 tlp_reset(sc)
1342 struct tulip_softc *sc;
1343 {
1344 int i;
1345
1346 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR);
1347
1348 for (i = 0; i < 1000; i++) {
1349 /*
1350 * Wait at least 50 PCI cycles for the reset to
1351 * complete before peeking at the Tulip again.
1352 * 10 uSec is a bit longer than 50 PCI cycles
1353 * (at 33MHz), but it doesn't hurt have the extra
1354 * wait.
1355 */
1356 delay(10);
1357 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0)
1358 break;
1359 }
1360
1361 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR))
1362 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname);
1363
1364 delay(1000);
1365
1366 /*
1367 * If the board has any GPIO reset sequences to issue, do them now.
1368 */
1369 if (sc->sc_reset != NULL)
1370 (*sc->sc_reset)(sc);
1371 }
1372
1373 /*
1374 * tlp_init:
1375 *
1376 * Initialize the interface. Must be called at splnet().
1377 */
1378 int
1379 tlp_init(sc)
1380 struct tulip_softc *sc;
1381 {
1382 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1383 struct tulip_txsoft *txs;
1384 struct tulip_rxsoft *rxs;
1385 int i, error = 0;
1386
1387 /*
1388 * Cancel any pending I/O.
1389 */
1390 tlp_stop(sc, 0);
1391
1392 /*
1393 * Initialize `opmode' to 0, and call the pre-init routine, if
1394 * any. This is required because the 2114x and some of the
1395 * clones require that the media-related bits in `opmode' be
1396 * set before performing a soft-reset in order to get internal
1397 * chip pathways are correct. Yay!
1398 */
1399 sc->sc_opmode = 0;
1400 if (sc->sc_preinit != NULL)
1401 (*sc->sc_preinit)(sc);
1402
1403 /*
1404 * Reset the Tulip to a known state.
1405 */
1406 tlp_reset(sc);
1407
1408 /*
1409 * Initialize the BUSMODE register.
1410 */
1411 sc->sc_busmode = BUSMODE_BAR;
1412 switch (sc->sc_chip) {
1413 case TULIP_CHIP_21140:
1414 case TULIP_CHIP_21140A:
1415 case TULIP_CHIP_21142:
1416 case TULIP_CHIP_21143:
1417 case TULIP_CHIP_82C115:
1418 case TULIP_CHIP_MX98725:
1419 /*
1420 * If we're allowed to do so, use Memory Read Line
1421 * and Memory Read Multiple.
1422 *
1423 * XXX Should we use Memory Write and Invalidate?
1424 */
1425 if (sc->sc_flags & TULIPF_MRL)
1426 sc->sc_busmode |= BUSMODE_RLE;
1427 if (sc->sc_flags & TULIPF_MRM)
1428 sc->sc_busmode |= BUSMODE_RME;
1429 #if 0
1430 if (sc->sc_flags & TULIPF_MWI)
1431 sc->sc_busmode |= BUSMODE_WLE;
1432 #endif
1433
1434 default:
1435 /* Nothing. */
1436 }
1437 switch (sc->sc_cacheline) {
1438 default:
1439 /*
1440 * Note: We must *always* set these bits; a cache
1441 * alignment of 0 is RESERVED.
1442 */
1443 case 8:
1444 sc->sc_busmode |= BUSMODE_CAL_8LW;
1445 break;
1446 case 16:
1447 sc->sc_busmode |= BUSMODE_CAL_16LW;
1448 break;
1449 case 32:
1450 sc->sc_busmode |= BUSMODE_CAL_32LW;
1451 break;
1452 }
1453 switch (sc->sc_chip) {
1454 case TULIP_CHIP_82C168:
1455 case TULIP_CHIP_82C169:
1456 sc->sc_busmode |= BUSMODE_PBL_16LW | BUSMODE_PNIC_MBO;
1457 break;
1458 default:
1459 sc->sc_busmode |= BUSMODE_PBL_DEFAULT;
1460 break;
1461 }
1462 #if BYTE_ORDER == BIG_ENDIAN
1463 /*
1464 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips
1465 * support them, and even on ones that do, it doesn't
1466 * always work.
1467 */
1468 #endif
1469 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode);
1470
1471 /*
1472 * Initialize the OPMODE register. We don't write it until
1473 * we're ready to begin the transmit and receive processes.
1474 *
1475 * Media-related OPMODE bits are set in the media callbacks
1476 * for each specific chip/board.
1477 */
1478 sc->sc_opmode |= OPMODE_SR | OPMODE_ST |
1479 sc->sc_txth[sc->sc_txthresh].txth_opmode;
1480
1481 /*
1482 * Magical mystery initialization on the Macronix chips.
1483 * The MX98713 uses its own magic value, the rest share
1484 * a common one.
1485 */
1486 switch (sc->sc_chip) {
1487 case TULIP_CHIP_MX98713:
1488 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713);
1489 break;
1490
1491 case TULIP_CHIP_MX98713A:
1492 case TULIP_CHIP_MX98715:
1493 case TULIP_CHIP_MX98715A:
1494 case TULIP_CHIP_MX98725:
1495 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715);
1496 break;
1497
1498 default:
1499 /* Nothing. */
1500 }
1501
1502 /*
1503 * Initialize the transmit descriptor ring.
1504 */
1505 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
1506 for (i = 0; i < TULIP_NTXDESC; i++) {
1507 sc->sc_txdescs[i].td_ctl = htole32(TDCTL_CH);
1508 sc->sc_txdescs[i].td_bufaddr2 =
1509 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)));
1510 }
1511 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC,
1512 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1513 sc->sc_txfree = TULIP_NTXDESC;
1514 sc->sc_txnext = 0;
1515
1516 /*
1517 * Initialize the transmit job descriptors.
1518 */
1519 SIMPLEQ_INIT(&sc->sc_txfreeq);
1520 SIMPLEQ_INIT(&sc->sc_txdirtyq);
1521 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
1522 txs = &sc->sc_txsoft[i];
1523 txs->txs_mbuf = NULL;
1524 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1525 }
1526
1527 /*
1528 * Initialize the receive descriptor and receive job
1529 * descriptor rings.
1530 */
1531 for (i = 0; i < TULIP_NRXDESC; i++) {
1532 rxs = &sc->sc_rxsoft[i];
1533 if (rxs->rxs_mbuf == NULL) {
1534 if ((error = tlp_add_rxbuf(sc, i)) != 0) {
1535 printf("%s: unable to allocate or map rx "
1536 "buffer %d, error = %d\n",
1537 sc->sc_dev.dv_xname, i, error);
1538 /*
1539 * XXX Should attempt to run with fewer receive
1540 * XXX buffers instead of just failing.
1541 */
1542 tlp_rxdrain(sc);
1543 goto out;
1544 }
1545 }
1546 }
1547 sc->sc_rxptr = 0;
1548
1549 /*
1550 * Initialize the interrupt mask and enable interrupts.
1551 */
1552 /* normal interrupts */
1553 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS;
1554
1555 /* abnormal interrupts */
1556 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF |
1557 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS;
1558
1559 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT;
1560 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT;
1561
1562 switch (sc->sc_chip) {
1563 case TULIP_CHIP_WB89C840F:
1564 /*
1565 * Clear bits that we don't want that happen to
1566 * overlap or don't exist.
1567 */
1568 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT);
1569 break;
1570
1571 default:
1572 /* Nothing. */
1573 }
1574
1575 sc->sc_rxint_mask &= sc->sc_inten;
1576 sc->sc_txint_mask &= sc->sc_inten;
1577
1578 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten);
1579 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff);
1580
1581 /*
1582 * Give the transmit and receive rings to the Tulip.
1583 */
1584 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext));
1585 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr));
1586
1587 /*
1588 * On chips that do this differently, set the station address.
1589 */
1590 switch (sc->sc_chip) {
1591 case TULIP_CHIP_WB89C840F:
1592 {
1593 /* XXX Do this with stream writes? */
1594 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0);
1595
1596 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1597 bus_space_write_1(sc->sc_st, sc->sc_sh,
1598 cpa + i, LLADDR(ifp->if_sadl)[i]);
1599 }
1600 break;
1601 }
1602
1603 case TULIP_CHIP_AL981:
1604 {
1605 u_int32_t reg;
1606 u_int8_t *enaddr = LLADDR(ifp->if_sadl);
1607
1608 reg = enaddr[0] |
1609 (enaddr[1] << 8) |
1610 (enaddr[2] << 16) |
1611 (enaddr[3] << 24);
1612 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg);
1613
1614 reg = enaddr[4] |
1615 (enaddr[5] << 8);
1616 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg);
1617 }
1618
1619 default:
1620 /* Nothing. */
1621 }
1622
1623 /*
1624 * Set the receive filter. This will start the transmit and
1625 * receive processes.
1626 */
1627 (*sc->sc_filter_setup)(sc);
1628
1629 /*
1630 * Set the current media.
1631 */
1632 (void) (*sc->sc_mediasw->tmsw_set)(sc);
1633
1634 /*
1635 * Start the receive process.
1636 */
1637 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
1638
1639 if (sc->sc_tick != NULL) {
1640 /* Start the one second clock. */
1641 timeout(sc->sc_tick, sc, hz);
1642 }
1643
1644 /*
1645 * Note that the interface is now running.
1646 */
1647 ifp->if_flags |= IFF_RUNNING;
1648 ifp->if_flags &= ~IFF_OACTIVE;
1649
1650 out:
1651 if (error)
1652 printf("%s: interface not running\n", sc->sc_dev.dv_xname);
1653 return (error);
1654 }
1655
1656 /*
1657 * tlp_rxdrain:
1658 *
1659 * Drain the receive queue.
1660 */
1661 void
1662 tlp_rxdrain(sc)
1663 struct tulip_softc *sc;
1664 {
1665 struct tulip_rxsoft *rxs;
1666 int i;
1667
1668 for (i = 0; i < TULIP_NRXDESC; i++) {
1669 rxs = &sc->sc_rxsoft[i];
1670 if (rxs->rxs_mbuf != NULL) {
1671 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
1672 m_freem(rxs->rxs_mbuf);
1673 rxs->rxs_mbuf = NULL;
1674 }
1675 }
1676 }
1677
1678 /*
1679 * tlp_stop:
1680 *
1681 * Stop transmission on the interface.
1682 */
1683 void
1684 tlp_stop(sc, drain)
1685 struct tulip_softc *sc;
1686 int drain;
1687 {
1688 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1689 struct tulip_txsoft *txs;
1690
1691 if (sc->sc_tick != NULL) {
1692 /* Stop the one second clock. */
1693 untimeout(sc->sc_tick, sc);
1694 }
1695
1696 if (sc->sc_flags & TULIPF_HAS_MII) {
1697 /* Down the MII. */
1698 mii_down(&sc->sc_mii);
1699 }
1700
1701 /* Disable interrupts. */
1702 TULIP_WRITE(sc, CSR_INTEN, 0);
1703
1704 /* Stop the transmit and receive processes. */
1705 TULIP_WRITE(sc, CSR_OPMODE, 0);
1706 TULIP_WRITE(sc, CSR_RXLIST, 0);
1707 TULIP_WRITE(sc, CSR_TXLIST, 0);
1708
1709 /*
1710 * Release any queued transmit buffers.
1711 */
1712 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
1713 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
1714 if (txs->txs_mbuf != NULL) {
1715 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
1716 m_freem(txs->txs_mbuf);
1717 txs->txs_mbuf = NULL;
1718 }
1719 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1720 }
1721
1722 if (drain) {
1723 /*
1724 * Release the receive buffers.
1725 */
1726 tlp_rxdrain(sc);
1727 }
1728
1729 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP);
1730
1731 /*
1732 * Mark the interface down and cancel the watchdog timer.
1733 */
1734 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1735 ifp->if_timer = 0;
1736 }
1737
1738 #define SROM_EMIT(sc, x) \
1739 do { \
1740 TULIP_WRITE((sc), CSR_MIIROM, (x)); \
1741 delay(1); \
1742 } while (0)
1743
1744 /*
1745 * tlp_srom_idle:
1746 *
1747 * Put the SROM in idle state.
1748 */
1749 void
1750 tlp_srom_idle(sc)
1751 struct tulip_softc *sc;
1752 {
1753 u_int32_t miirom;
1754 int i;
1755
1756 miirom = MIIROM_SR;
1757 SROM_EMIT(sc, miirom);
1758
1759 miirom |= MIIROM_RD;
1760 SROM_EMIT(sc, miirom);
1761
1762 miirom |= MIIROM_SROMCS;
1763 SROM_EMIT(sc, miirom);
1764
1765 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
1766
1767 /* Strobe the clock 25 times. */
1768 for (i = 0; i < 25; i++) {
1769 SROM_EMIT(sc, miirom);
1770 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
1771 }
1772
1773 SROM_EMIT(sc, miirom);
1774
1775 miirom &= ~MIIROM_SROMCS;
1776 SROM_EMIT(sc, miirom);
1777
1778 SROM_EMIT(sc, 0);
1779 }
1780
1781 /*
1782 * tlp_read_srom:
1783 *
1784 * Read the Tulip SROM.
1785 */
1786 void
1787 tlp_read_srom(sc, word, wordcnt, data)
1788 struct tulip_softc *sc;
1789 int word, wordcnt;
1790 u_int8_t *data;
1791 {
1792 u_int32_t miirom;
1793 u_int16_t datain;
1794 int i, x;
1795
1796 tlp_srom_idle(sc);
1797
1798 /* Select the SROM. */
1799 miirom = MIIROM_SR;
1800 SROM_EMIT(sc, miirom);
1801
1802 miirom |= MIIROM_RD;
1803 SROM_EMIT(sc, miirom);
1804
1805 for (i = 0; i < wordcnt; i++) {
1806 /* Send CHIP SELECT for one clock tick. */
1807 miirom |= MIIROM_SROMCS;
1808 SROM_EMIT(sc, miirom);
1809
1810 /* Shift in the READ opcode. */
1811 for (x = 3; x > 0; x--) {
1812 if (TULIP_SROM_OPC_READ & (1 << (x - 1)))
1813 miirom |= MIIROM_SROMDI;
1814 else
1815 miirom &= ~MIIROM_SROMDI;
1816 SROM_EMIT(sc, miirom);
1817 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
1818 SROM_EMIT(sc, miirom);
1819 }
1820
1821 /* Shift in address. */
1822 for (x = sc->sc_srom_addrbits; x > 0; x--) {
1823 if ((word + i) & (1 << (x - 1)))
1824 miirom |= MIIROM_SROMDI;
1825 else
1826 miirom &= ~MIIROM_SROMDI;
1827 SROM_EMIT(sc, miirom);
1828 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
1829 SROM_EMIT(sc, miirom);
1830 }
1831
1832 /* Shift out data. */
1833 miirom &= ~MIIROM_SROMDI;
1834 datain = 0;
1835 for (x = 16; x > 0; x--) {
1836 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
1837 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO))
1838 datain |= (1 << (x - 1));
1839 SROM_EMIT(sc, miirom);
1840 }
1841 data[2 * i] = datain & 0xff;
1842 data[(2 * i) + 1] = datain >> 8;
1843
1844 /* Clear CHIP SELECT. */
1845 miirom &= ~MIIROM_SROMCS;
1846 SROM_EMIT(sc, miirom);
1847 }
1848
1849 /* Deselect the SROM. */
1850 SROM_EMIT(sc, 0);
1851
1852 /* ...and idle it. */
1853 tlp_srom_idle(sc);
1854 }
1855
1856 #undef SROM_EMIT
1857
1858 /*
1859 * tlp_add_rxbuf:
1860 *
1861 * Add a receive buffer to the indicated descriptor.
1862 */
1863 int
1864 tlp_add_rxbuf(sc, idx)
1865 struct tulip_softc *sc;
1866 int idx;
1867 {
1868 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx];
1869 struct mbuf *m;
1870 int error;
1871
1872 MGETHDR(m, M_DONTWAIT, MT_DATA);
1873 if (m == NULL)
1874 return (ENOBUFS);
1875
1876 MCLGET(m, M_DONTWAIT);
1877 if ((m->m_flags & M_EXT) == 0) {
1878 m_freem(m);
1879 return (ENOBUFS);
1880 }
1881
1882 if (rxs->rxs_mbuf != NULL)
1883 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
1884
1885 rxs->rxs_mbuf = m;
1886
1887 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap,
1888 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT);
1889 if (error) {
1890 printf("%s: can't load rx DMA map %d, error = %d\n",
1891 sc->sc_dev.dv_xname, idx, error);
1892 panic("tlp_add_rxbuf"); /* XXX */
1893 }
1894
1895 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1896 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1897
1898 TULIP_INIT_RXDESC(sc, idx);
1899
1900 return (0);
1901 }
1902
1903 /*
1904 * tlp_crc32:
1905 *
1906 * Compute the 32-bit CRC of the provided buffer.
1907 */
1908 u_int32_t
1909 tlp_crc32(buf, len)
1910 const u_int8_t *buf;
1911 size_t len;
1912 {
1913 static const u_int32_t crctab[] = {
1914 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac,
1915 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c,
1916 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c,
1917 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c
1918 };
1919 u_int32_t crc;
1920 int i;
1921
1922 crc = 0xffffffff;
1923 for (i = 0; i < len; i++) {
1924 crc ^= buf[i];
1925 crc = (crc >> 4) ^ crctab[crc & 0xf];
1926 crc = (crc >> 4) ^ crctab[crc & 0xf];
1927 }
1928 return (crc);
1929 }
1930
1931 /*
1932 * tlp_srom_crcok:
1933 *
1934 * Check the CRC of the Tulip SROM.
1935 */
1936 int
1937 tlp_srom_crcok(romdata)
1938 const u_int8_t *romdata;
1939 {
1940 u_int32_t crc;
1941
1942 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM);
1943 crc = (crc & 0xffff) ^ 0xffff;
1944 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM))
1945 return (1);
1946
1947 /*
1948 * Try an alternate checksum.
1949 */
1950 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM1);
1951 crc = (crc & 0xffff) ^ 0xffff;
1952 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1))
1953 return (1);
1954
1955 return (0);
1956 }
1957
1958 /*
1959 * tlp_isv_srom:
1960 *
1961 * Check to see if the SROM is in the new standardized format.
1962 */
1963 int
1964 tlp_isv_srom(romdata)
1965 const u_int8_t *romdata;
1966 {
1967 int i;
1968 u_int16_t cksum;
1969
1970 if (tlp_srom_crcok(romdata)) {
1971 /*
1972 * SROM CRC checks out; must be in the new format.
1973 */
1974 return (1);
1975 }
1976
1977 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM);
1978 if (cksum == 0xffff || cksum == 0) {
1979 /*
1980 * No checksum present. Check the SROM ID; 18 bytes of 0
1981 * followed by 1 (version) followed by the number of
1982 * adapters which use this SROM (should be non-zero).
1983 */
1984 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) {
1985 if (romdata[i] != 0)
1986 return (0);
1987 }
1988 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1)
1989 return (0);
1990 if (romdata[TULIP_ROM_CHIP_COUNT] == 0)
1991 return (0);
1992 return (1);
1993 }
1994
1995 return (0);
1996 }
1997
1998 /*
1999 * tlp_isv_srom_enaddr:
2000 *
2001 * Get the Ethernet address from an ISV SROM.
2002 */
2003 int
2004 tlp_isv_srom_enaddr(sc, enaddr)
2005 struct tulip_softc *sc;
2006 u_int8_t *enaddr;
2007 {
2008 int i, devcnt;
2009
2010 if (tlp_isv_srom(sc->sc_srom) == 0)
2011 return (0);
2012
2013 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
2014 for (i = 0; i < devcnt; i++) {
2015 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
2016 break;
2017 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
2018 sc->sc_devno)
2019 break;
2020 }
2021
2022 if (i == devcnt)
2023 return (0);
2024
2025 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS],
2026 ETHER_ADDR_LEN);
2027 enaddr[5] += i;
2028
2029 return (1);
2030 }
2031
2032 /*
2033 * tlp_parse_old_srom:
2034 *
2035 * Parse old-format SROMs.
2036 *
2037 * This routine is largely lifted from Matt Thomas's `de' driver.
2038 */
2039 int
2040 tlp_parse_old_srom(sc, enaddr)
2041 struct tulip_softc *sc;
2042 u_int8_t *enaddr;
2043 {
2044 static const u_int8_t testpat[] =
2045 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa };
2046 int i;
2047 u_int32_t cksum;
2048
2049 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) {
2050 /*
2051 * Some vendors (e.g. ZNYX) don't use the standard
2052 * DEC Address ROM format, but rather just have an
2053 * Ethernet address in the first 6 bytes, maybe a
2054 * 2 byte checksum, and then all 0xff's.
2055 */
2056 for (i = 8; i < 32; i++) {
2057 if (sc->sc_srom[i] != 0xff)
2058 return (0);
2059 }
2060
2061 /*
2062 * Sanity check the Ethernet address:
2063 *
2064 * - Make sure it's not multicast or locally
2065 * assigned
2066 * - Make sure it has a non-0 OUI
2067 */
2068 if (sc->sc_srom[0] & 3)
2069 return (0);
2070 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 &&
2071 sc->sc_srom[2] == 0)
2072 return (0);
2073
2074 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
2075 return (1);
2076 }
2077
2078 /*
2079 * Standard DEC Address ROM test.
2080 */
2081
2082 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0)
2083 return (0);
2084
2085 for (i = 0; i < 8; i++) {
2086 if (sc->sc_srom[i] != sc->sc_srom[15 - i])
2087 return (0);
2088 }
2089
2090 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
2091
2092 cksum = *(u_int16_t *) &enaddr[0];
2093
2094 cksum <<= 1;
2095 if (cksum > 0xffff)
2096 cksum -= 0xffff;
2097
2098 cksum += *(u_int16_t *) &enaddr[2];
2099 if (cksum > 0xffff)
2100 cksum -= 0xffff;
2101
2102 cksum <<= 1;
2103 if (cksum > 0xffff)
2104 cksum -= 0xffff;
2105
2106 cksum += *(u_int16_t *) &enaddr[4];
2107 if (cksum >= 0xffff)
2108 cksum -= 0xffff;
2109
2110 if (cksum != *(u_int16_t *) &sc->sc_srom[6])
2111 return (0);
2112
2113 return (1);
2114 }
2115
2116 /*
2117 * tlp_filter_setup:
2118 *
2119 * Set the Tulip's receive filter.
2120 */
2121 void
2122 tlp_filter_setup(sc)
2123 struct tulip_softc *sc;
2124 {
2125 struct ethercom *ec = &sc->sc_ethercom;
2126 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2127 struct ether_multi *enm;
2128 struct ether_multistep step;
2129 __volatile u_int32_t *sp;
2130 u_int8_t enaddr[ETHER_ADDR_LEN];
2131 u_int32_t hash, hashsize;
2132 int cnt;
2133
2134 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n",
2135 sc->sc_dev.dv_xname, sc->sc_flags));
2136
2137 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN);
2138
2139 /*
2140 * If there are transmissions pending, wait until they have
2141 * completed.
2142 */
2143 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL ||
2144 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) {
2145 sc->sc_flags |= TULIPF_WANT_SETUP;
2146 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n",
2147 sc->sc_dev.dv_xname));
2148 return;
2149 }
2150 sc->sc_flags &= ~TULIPF_WANT_SETUP;
2151
2152 switch (sc->sc_chip) {
2153 case TULIP_CHIP_82C115:
2154 hashsize = TULIP_PNICII_HASHSIZE;
2155 break;
2156
2157 default:
2158 hashsize = TULIP_MCHASHSIZE;
2159 }
2160
2161 /*
2162 * If we're running, idle the transmit and receive engines. If
2163 * we're NOT running, we're being called from tlp_init(), and our
2164 * writing OPMODE will start the transmit and receive processes
2165 * in motion.
2166 */
2167 if (ifp->if_flags & IFF_RUNNING) {
2168 /*
2169 * Actually, some chips seem to need a really hard
2170 * kick in the head for this to work. The genuine
2171 * DEC chips can just be idled, but some of the
2172 * clones seem to REALLY want a reset here. Doing
2173 * the reset will end up here again, but with
2174 * IFF_RUNNING cleared.
2175 */
2176 switch (sc->sc_chip) {
2177 case TULIP_CHIP_82C168:
2178 case TULIP_CHIP_82C169:
2179 tlp_init(sc);
2180 return;
2181
2182 default:
2183 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2184 }
2185 }
2186
2187 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
2188
2189 if (ifp->if_flags & IFF_PROMISC) {
2190 sc->sc_opmode |= OPMODE_PR;
2191 goto allmulti;
2192 }
2193
2194 /*
2195 * Try Perfect filtering first.
2196 */
2197
2198 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
2199 sp = TULIP_CDSP(sc);
2200 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2201 cnt = 0;
2202 ETHER_FIRST_MULTI(step, ec, enm);
2203 while (enm != NULL) {
2204 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2205 /*
2206 * We must listen to a range of multicast addresses.
2207 * For now, just accept all multicasts, rather than
2208 * trying to set only those filter bits needed to match
2209 * the range. (At this time, the only use of address
2210 * ranges is for IP multicast routing, for which the
2211 * range is big enough to require all bits set.)
2212 */
2213 goto allmulti;
2214 }
2215 if (cnt == (TULIP_MAXADDRS - 2)) {
2216 /*
2217 * We already have our multicast limit (still need
2218 * our station address and broadcast). Go to
2219 * Hash-Perfect mode.
2220 */
2221 goto hashperfect;
2222 }
2223 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0);
2224 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1);
2225 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2);
2226 ETHER_NEXT_MULTI(step, enm);
2227 }
2228
2229 if (ifp->if_flags & IFF_BROADCAST) {
2230 /* ...and the broadcast address. */
2231 cnt++;
2232 *sp++ = TULIP_SP_FIELD_C(0xffff);
2233 *sp++ = TULIP_SP_FIELD_C(0xffff);
2234 *sp++ = TULIP_SP_FIELD_C(0xffff);
2235 }
2236
2237 /* Pad the rest with our station address. */
2238 for (; cnt < TULIP_MAXADDRS; cnt++) {
2239 *sp++ = TULIP_SP_FIELD(enaddr, 0);
2240 *sp++ = TULIP_SP_FIELD(enaddr, 1);
2241 *sp++ = TULIP_SP_FIELD(enaddr, 2);
2242 }
2243 ifp->if_flags &= ~IFF_ALLMULTI;
2244 goto setit;
2245
2246 hashperfect:
2247 /*
2248 * Try Hash-Perfect mode.
2249 */
2250
2251 /*
2252 * Some 21140 chips have broken Hash-Perfect modes. On these
2253 * chips, we simply use Hash-Only mode, and put our station
2254 * address into the filter.
2255 */
2256 if (sc->sc_chip == TULIP_CHIP_21140)
2257 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY;
2258 else
2259 sc->sc_filtmode = TDCTL_Tx_FT_HASH;
2260 sp = TULIP_CDSP(sc);
2261 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2262 ETHER_FIRST_MULTI(step, ec, enm);
2263 while (enm != NULL) {
2264 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2265 /*
2266 * We must listen to a range of multicast addresses.
2267 * For now, just accept all multicasts, rather than
2268 * trying to set only those filter bits needed to match
2269 * the range. (At this time, the only use of address
2270 * ranges is for IP multicast routing, for which the
2271 * range is big enough to require all bits set.)
2272 */
2273 goto allmulti;
2274 }
2275 hash = tlp_mchash(enm->enm_addrlo, hashsize);
2276 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2277 ETHER_NEXT_MULTI(step, enm);
2278 }
2279
2280 if (ifp->if_flags & IFF_BROADCAST) {
2281 /* ...and the broadcast address. */
2282 hash = tlp_mchash(etherbroadcastaddr, hashsize);
2283 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2284 }
2285
2286 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) {
2287 /* ...and our station address. */
2288 hash = tlp_mchash(enaddr, hashsize);
2289 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2290 } else {
2291 /*
2292 * Hash-Perfect mode; put our station address after
2293 * the hash table.
2294 */
2295 sp[39] = TULIP_SP_FIELD(enaddr, 0);
2296 sp[40] = TULIP_SP_FIELD(enaddr, 1);
2297 sp[41] = TULIP_SP_FIELD(enaddr, 2);
2298 }
2299 ifp->if_flags &= ~IFF_ALLMULTI;
2300 goto setit;
2301
2302 allmulti:
2303 /*
2304 * Use Perfect filter mode. First address is the broadcast address,
2305 * and pad the rest with our station address. We'll set Pass-all-
2306 * multicast in OPMODE below.
2307 */
2308 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
2309 sp = TULIP_CDSP(sc);
2310 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2311 cnt = 0;
2312 if (ifp->if_flags & IFF_BROADCAST) {
2313 cnt++;
2314 *sp++ = TULIP_SP_FIELD_C(0xffff);
2315 *sp++ = TULIP_SP_FIELD_C(0xffff);
2316 *sp++ = TULIP_SP_FIELD_C(0xffff);
2317 }
2318 for (; cnt < TULIP_MAXADDRS; cnt++) {
2319 *sp++ = TULIP_SP_FIELD(enaddr, 0);
2320 *sp++ = TULIP_SP_FIELD(enaddr, 1);
2321 *sp++ = TULIP_SP_FIELD(enaddr, 2);
2322 }
2323 ifp->if_flags |= IFF_ALLMULTI;
2324
2325 setit:
2326 if (ifp->if_flags & IFF_ALLMULTI)
2327 sc->sc_opmode |= OPMODE_PM;
2328
2329 /* Sync the setup packet buffer. */
2330 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE);
2331
2332 /*
2333 * Fill in the setup packet descriptor.
2334 */
2335 sc->sc_setup_desc.td_bufaddr1 = htole32(TULIP_CDSPADDR(sc));
2336 sc->sc_setup_desc.td_bufaddr2 =
2337 htole32(TULIP_CDTXADDR(sc, sc->sc_txnext));
2338 sc->sc_setup_desc.td_ctl =
2339 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) |
2340 sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS |
2341 TDCTL_Tx_IC | TDCTL_CH);
2342 sc->sc_setup_desc.td_status = htole32(TDSTAT_OWN);
2343 TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2344
2345 /*
2346 * Write the address of the setup descriptor. This also has
2347 * the side effect of giving the transmit ring to the chip,
2348 * since the setup descriptor points to the next available
2349 * descriptor in the ring.
2350 */
2351 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc));
2352
2353 /*
2354 * Set the OPMODE register. This will also resume the
2355 * transmit transmit process we idled above.
2356 */
2357 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2358
2359 sc->sc_flags |= TULIPF_DOING_SETUP;
2360
2361 /*
2362 * Kick the transmitter; this will cause the Tulip to
2363 * read the setup descriptor.
2364 */
2365 /* XXX USE AUTOPOLLING? */
2366 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
2367
2368 /* Set up a watchdog timer in case the chip flakes out. */
2369 ifp->if_timer = 5;
2370
2371 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname));
2372 }
2373
2374 /*
2375 * tlp_winb_filter_setup:
2376 *
2377 * Set the Winbond 89C840F's receive filter.
2378 */
2379 void
2380 tlp_winb_filter_setup(sc)
2381 struct tulip_softc *sc;
2382 {
2383 struct ethercom *ec = &sc->sc_ethercom;
2384 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2385 struct ether_multi *enm;
2386 struct ether_multistep step;
2387 u_int32_t hash, mchash[2];
2388
2389 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n",
2390 sc->sc_dev.dv_xname, sc->sc_flags));
2391
2392 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP);
2393
2394 if (ifp->if_flags & IFF_MULTICAST)
2395 sc->sc_opmode |= OPMODE_WINB_AMP;
2396
2397 if (ifp->if_flags & IFF_BROADCAST)
2398 sc->sc_opmode |= OPMODE_WINB_ABP;
2399
2400 if (ifp->if_flags & IFF_PROMISC) {
2401 sc->sc_opmode |= OPMODE_WINB_APP;
2402 goto allmulti;
2403 }
2404
2405 mchash[0] = mchash[1] = 0;
2406
2407 ETHER_FIRST_MULTI(step, ec, enm);
2408 while (enm != NULL) {
2409 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2410 /*
2411 * We must listen to a range of multicast addresses.
2412 * For now, just accept all multicasts, rather than
2413 * trying to set only those filter bits needed to match
2414 * the range. (At this time, the only use of address
2415 * ranges is for IP multicast routing, for which the
2416 * range is big enough to require all bits set.)
2417 */
2418 goto allmulti;
2419 }
2420
2421 /*
2422 * According to the FreeBSD `wb' driver, yes, you
2423 * really do invert the hash.
2424 */
2425 hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26))
2426 & 0x3f;
2427 mchash[hash >> 5] |= 1 << (hash & 0x1f);
2428 ETHER_NEXT_MULTI(step, enm);
2429 }
2430 ifp->if_flags &= ~IFF_ALLMULTI;
2431 goto setit;
2432
2433 allmulti:
2434 ifp->if_flags |= IFF_ALLMULTI;
2435 mchash[0] = mchash[1] = 0xffffffff;
2436
2437 setit:
2438 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]);
2439 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]);
2440 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2441 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n",
2442 sc->sc_dev.dv_xname));
2443 }
2444
2445 /*
2446 * tlp_al981_filter_setup:
2447 *
2448 * Set the ADMtek AL981's receive filter.
2449 */
2450 void
2451 tlp_al981_filter_setup(sc)
2452 struct tulip_softc *sc;
2453 {
2454 struct ethercom *ec = &sc->sc_ethercom;
2455 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2456 struct ether_multi *enm;
2457 struct ether_multistep step;
2458 u_int32_t hash, mchash[2];
2459
2460 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n",
2461 sc->sc_dev.dv_xname, sc->sc_flags));
2462
2463 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2464
2465 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
2466
2467 if (ifp->if_flags & IFF_PROMISC) {
2468 sc->sc_opmode |= OPMODE_PR;
2469 goto allmulti;
2470 }
2471
2472 mchash[0] = mchash[1] = 0;
2473
2474 ETHER_FIRST_MULTI(step, ec, enm);
2475 while (enm != NULL) {
2476 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2477 /*
2478 * We must listen to a range of multicast addresses.
2479 * For now, just accept all multicasts, rather than
2480 * trying to set only those filter bits needed to match
2481 * the range. (At this time, the only use of address
2482 * ranges is for IP multicast routing, for which the
2483 * range is big enough to require all bits set.)
2484 */
2485 goto allmulti;
2486 }
2487
2488 hash = (tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)
2489 & 0x3f;
2490 mchash[hash >> 5] |= 1 << (hash & 0x1f);
2491 ETHER_NEXT_MULTI(step, enm);
2492 }
2493 ifp->if_flags &= ~IFF_ALLMULTI;
2494 goto setit;
2495
2496 allmulti:
2497 ifp->if_flags |= IFF_ALLMULTI;
2498 mchash[0] = mchash[1] = 0xffffffff;
2499
2500 setit:
2501 TULIP_WRITE(sc, CSR_ADM_MAR0, mchash[0]);
2502 TULIP_WRITE(sc, CSR_ADM_MAR1, mchash[1]);
2503 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2504 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n",
2505 sc->sc_dev.dv_xname));
2506 }
2507
2508 /*
2509 * tlp_idle:
2510 *
2511 * Cause the transmit and/or receive processes to go idle.
2512 */
2513 void
2514 tlp_idle(sc, bits)
2515 struct tulip_softc *sc;
2516 u_int32_t bits;
2517 {
2518 static const char *tx_state_names[] = {
2519 "STOPPED",
2520 "RUNNING - FETCH",
2521 "RUNNING - WAIT",
2522 "RUNNING - READING",
2523 "-- RESERVED --",
2524 "RUNNING - SETUP",
2525 "SUSPENDED",
2526 "RUNNING - CLOSE",
2527 };
2528 static const char *rx_state_names[] = {
2529 "STOPPED",
2530 "RUNNING - FETCH",
2531 "RUNNING - CHECK",
2532 "RUNNING - WAIT",
2533 "SUSPENDED",
2534 "RUNNING - CLOSE",
2535 "RUNNING - FLUSH",
2536 "RUNNING - QUEUE",
2537 };
2538 u_int32_t csr, ackmask = 0;
2539 int i;
2540
2541 if (bits & OPMODE_ST)
2542 ackmask |= STATUS_TPS;
2543
2544 if (bits & OPMODE_SR)
2545 ackmask |= STATUS_RPS;
2546
2547 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits);
2548
2549 for (i = 0; i < 1000; i++) {
2550 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask)
2551 break;
2552 delay(10);
2553 }
2554
2555 csr = TULIP_READ(sc, CSR_STATUS);
2556 if ((csr & ackmask) != ackmask) {
2557 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 &&
2558 (csr & STATUS_TS) != STATUS_TS_STOPPED)
2559 printf("%s: transmit process failed to idle: "
2560 "state %s\n", sc->sc_dev.dv_xname,
2561 tx_state_names[(csr & STATUS_TS) >> 20]);
2562 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 &&
2563 (csr & STATUS_RS) != STATUS_RS_STOPPED)
2564 printf("%s: receive process failed to idle: "
2565 "state %s\n", sc->sc_dev.dv_xname,
2566 rx_state_names[(csr & STATUS_RS) >> 17]);
2567 }
2568 TULIP_WRITE(sc, CSR_STATUS, ackmask);
2569 }
2570
2571 /*****************************************************************************
2572 * Generic media support functions.
2573 *****************************************************************************/
2574
2575 /*
2576 * tlp_mediastatus: [ifmedia interface function]
2577 *
2578 * Query the current media.
2579 */
2580 void
2581 tlp_mediastatus(ifp, ifmr)
2582 struct ifnet *ifp;
2583 struct ifmediareq *ifmr;
2584 {
2585 struct tulip_softc *sc = ifp->if_softc;
2586
2587 (*sc->sc_mediasw->tmsw_get)(sc, ifmr);
2588 }
2589
2590 /*
2591 * tlp_mediachange: [ifmedia interface function]
2592 *
2593 * Update the current media.
2594 */
2595 int
2596 tlp_mediachange(ifp)
2597 struct ifnet *ifp;
2598 {
2599 struct tulip_softc *sc = ifp->if_softc;
2600
2601 return ((*sc->sc_mediasw->tmsw_set)(sc));
2602 }
2603
2604 /*****************************************************************************
2605 * Support functions for MII-attached media.
2606 *****************************************************************************/
2607
2608 /*
2609 * tlp_mii_tick:
2610 *
2611 * One second timer, used to tick the MII.
2612 */
2613 void
2614 tlp_mii_tick(arg)
2615 void *arg;
2616 {
2617 struct tulip_softc *sc = arg;
2618 int s;
2619
2620 s = splnet();
2621 mii_tick(&sc->sc_mii);
2622 splx(s);
2623
2624 timeout(sc->sc_tick, sc, hz);
2625 }
2626
2627 /*
2628 * tlp_mii_statchg: [mii interface function]
2629 *
2630 * Callback from PHY when media changes.
2631 */
2632 void
2633 tlp_mii_statchg(self)
2634 struct device *self;
2635 {
2636 struct tulip_softc *sc = (struct tulip_softc *)self;
2637
2638 /* Idle the transmit and receive processes. */
2639 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2640
2641 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD);
2642
2643 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T)
2644 sc->sc_opmode |= OPMODE_TTM;
2645 else
2646 sc->sc_opmode |= OPMODE_HBD;
2647
2648 if (sc->sc_mii.mii_media_active & IFM_FDX)
2649 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD;
2650
2651 /*
2652 * Write new OPMODE bits. This also restarts the transmit
2653 * and receive processes.
2654 */
2655 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2656
2657 /* XXX Update ifp->if_baudrate */
2658 }
2659
2660 /*
2661 * tlp_winb_mii_statchg: [mii interface function]
2662 *
2663 * Callback from PHY when media changes. This version is
2664 * for the Winbond 89C840F, which has different OPMODE bits.
2665 */
2666 void
2667 tlp_winb_mii_statchg(self)
2668 struct device *self;
2669 {
2670 struct tulip_softc *sc = (struct tulip_softc *)self;
2671
2672 /* Idle the transmit and receive processes. */
2673 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2674
2675 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD);
2676
2677 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX)
2678 sc->sc_opmode |= OPMODE_WINB_FES;
2679
2680 if (sc->sc_mii.mii_media_active & IFM_FDX)
2681 sc->sc_opmode |= OPMODE_FD;
2682
2683 /*
2684 * Write new OPMODE bits. This also restarts the transmit
2685 * and receive processes.
2686 */
2687 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2688
2689 /* XXX Update ifp->if_baudrate */
2690 }
2691
2692 /*
2693 * tlp_mii_getmedia:
2694 *
2695 * Callback from ifmedia to request current media status.
2696 */
2697 void
2698 tlp_mii_getmedia(sc, ifmr)
2699 struct tulip_softc *sc;
2700 struct ifmediareq *ifmr;
2701 {
2702
2703 mii_pollstat(&sc->sc_mii);
2704 ifmr->ifm_status = sc->sc_mii.mii_media_status;
2705 ifmr->ifm_active = sc->sc_mii.mii_media_active;
2706 }
2707
2708 /*
2709 * tlp_mii_setmedia:
2710 *
2711 * Callback from ifmedia to request new media setting.
2712 */
2713 int
2714 tlp_mii_setmedia(sc)
2715 struct tulip_softc *sc;
2716 {
2717 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2718
2719 if (ifp->if_flags & IFF_UP)
2720 mii_mediachg(&sc->sc_mii);
2721 return (0);
2722 }
2723
2724 /*
2725 * tlp_bitbang_mii_readreg:
2726 *
2727 * Read a PHY register via bit-bang'ing the MII.
2728 */
2729 int
2730 tlp_bitbang_mii_readreg(self, phy, reg)
2731 struct device *self;
2732 int phy, reg;
2733 {
2734 struct tulip_softc *sc = (void *) self;
2735
2736 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg));
2737 }
2738
2739 /*
2740 * tlp_bitbang_mii_writereg:
2741 *
2742 * Write a PHY register via bit-bang'ing the MII.
2743 */
2744 void
2745 tlp_bitbang_mii_writereg(self, phy, reg, val)
2746 struct device *self;
2747 int phy, reg, val;
2748 {
2749 struct tulip_softc *sc = (void *) self;
2750
2751 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val);
2752 }
2753
2754 /*
2755 * tlp_sio_mii_bitbang_read:
2756 *
2757 * Read the MII serial port for the MII bit-bang module.
2758 */
2759 u_int32_t
2760 tlp_sio_mii_bitbang_read(self)
2761 struct device *self;
2762 {
2763 struct tulip_softc *sc = (void *) self;
2764
2765 return (TULIP_READ(sc, CSR_MIIROM));
2766 }
2767
2768 /*
2769 * tlp_sio_mii_bitbang_write:
2770 *
2771 * Write the MII serial port for the MII bit-bang module.
2772 */
2773 void
2774 tlp_sio_mii_bitbang_write(self, val)
2775 struct device *self;
2776 u_int32_t val;
2777 {
2778 struct tulip_softc *sc = (void *) self;
2779
2780 TULIP_WRITE(sc, CSR_MIIROM, val);
2781 }
2782
2783 /*
2784 * tlp_pnic_mii_readreg:
2785 *
2786 * Read a PHY register on the Lite-On PNIC.
2787 */
2788 int
2789 tlp_pnic_mii_readreg(self, phy, reg)
2790 struct device *self;
2791 int phy, reg;
2792 {
2793 struct tulip_softc *sc = (void *) self;
2794 u_int32_t val;
2795 int i;
2796
2797 TULIP_WRITE(sc, CSR_PNIC_MII,
2798 PNIC_MII_MBO | PNIC_MII_RESERVED |
2799 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) |
2800 (reg << PNIC_MII_REGSHIFT));
2801
2802 for (i = 0; i < 1000; i++) {
2803 delay(10);
2804 val = TULIP_READ(sc, CSR_PNIC_MII);
2805 if ((val & PNIC_MII_BUSY) == 0) {
2806 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA)
2807 return (0);
2808 else
2809 return (val & PNIC_MII_DATA);
2810 }
2811 }
2812 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname);
2813 return (0);
2814 }
2815
2816 /*
2817 * tlp_pnic_mii_writereg:
2818 *
2819 * Write a PHY register on the Lite-On PNIC.
2820 */
2821 void
2822 tlp_pnic_mii_writereg(self, phy, reg, val)
2823 struct device *self;
2824 int phy, reg, val;
2825 {
2826 struct tulip_softc *sc = (void *) self;
2827 int i;
2828
2829 TULIP_WRITE(sc, CSR_PNIC_MII,
2830 PNIC_MII_MBO | PNIC_MII_RESERVED |
2831 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) |
2832 (reg << PNIC_MII_REGSHIFT) | val);
2833
2834 for (i = 0; i < 1000; i++) {
2835 delay(10);
2836 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0)
2837 return;
2838 }
2839 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname);
2840 }
2841
2842 const bus_addr_t tlp_al981_phy_regmap[] = {
2843 CSR_ADM_BMCR,
2844 CSR_ADM_BMSR,
2845 CSR_ADM_PHYIDR1,
2846 CSR_ADM_PHYIDR2,
2847 CSR_ADM_ANAR,
2848 CSR_ADM_ANLPAR,
2849 CSR_ADM_ANER,
2850
2851 CSR_ADM_XMC,
2852 CSR_ADM_XCIIS,
2853 CSR_ADM_XIE,
2854 CSR_ADM_100CTR,
2855 };
2856 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) /
2857 sizeof(tlp_al981_phy_regmap[0]);
2858
2859 /*
2860 * tlp_al981_mii_readreg:
2861 *
2862 * Read a PHY register on the ADMtek AL981.
2863 */
2864 int
2865 tlp_al981_mii_readreg(self, phy, reg)
2866 struct device *self;
2867 int phy, reg;
2868 {
2869 struct tulip_softc *sc = (struct tulip_softc *)self;
2870
2871 /* AL981 only has an internal PHY. */
2872 if (phy != 0)
2873 return (0);
2874
2875 if (reg >= tlp_al981_phy_regmap_size)
2876 return (0);
2877
2878 return (bus_space_read_4(sc->sc_st, sc->sc_sh,
2879 tlp_al981_phy_regmap[reg]) & 0xffff);
2880 }
2881
2882 /*
2883 * tlp_al981_mii_writereg:
2884 *
2885 * Write a PHY register on the ADMtek AL981.
2886 */
2887 void
2888 tlp_al981_mii_writereg(self, phy, reg, val)
2889 struct device *self;
2890 int phy, reg, val;
2891 {
2892 struct tulip_softc *sc = (struct tulip_softc *)self;
2893
2894 /* AL981 only has an internal PHY. */
2895 if (phy != 0)
2896 return;
2897
2898 if (reg >= tlp_al981_phy_regmap_size)
2899 return;
2900
2901 bus_space_write_4(sc->sc_st, sc->sc_sh,
2902 tlp_al981_phy_regmap[reg], val);
2903 }
2904
2905 /*****************************************************************************
2906 * Chip-specific pre-init and reset functions.
2907 *****************************************************************************/
2908
2909 /*
2910 * tlp_2114x_preinit:
2911 *
2912 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
2913 */
2914 void
2915 tlp_2114x_preinit(sc)
2916 struct tulip_softc *sc;
2917 {
2918 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
2919 struct tulip_21x4x_media *tm = ife->ifm_aux;
2920
2921 /*
2922 * Whether or not we're in MII or SIA/SYM mode, the media info
2923 * contains the appropriate OPMODE bits.
2924 *
2925 * Note that if we have no media info, we are are doing
2926 * non-MII `auto'.
2927 *
2928 * Also, we always set the Must-Be-One bit.
2929 */
2930 if (tm == NULL) {
2931 #ifdef DIAGNOSTIC
2932 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
2933 panic("tlp_2114x_preinit: not IFM_AUTO");
2934 if (sc->sc_nway_active == NULL)
2935 panic("tlp_2114x_preinit: nway_active NULL");
2936 #endif
2937 tm = sc->sc_nway_active->ifm_aux;
2938 }
2939 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode;
2940
2941 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2942 }
2943
2944 /*
2945 * tlp_2114x_mii_preinit:
2946 *
2947 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
2948 * This version is used by boards which only have MII and don't have
2949 * an ISV SROM.
2950 */
2951 void
2952 tlp_2114x_mii_preinit(sc)
2953 struct tulip_softc *sc;
2954 {
2955
2956 /*
2957 * Always set the Must-Be-One bit, and Port Select (to select MII).
2958 * We'll never be called during a media change.
2959 */
2960 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS;
2961 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2962 }
2963
2964 /*
2965 * tlp_pnic_preinit:
2966 *
2967 * Pre-init function for the Lite-On 82c168 and 82c169.
2968 */
2969 void
2970 tlp_pnic_preinit(sc)
2971 struct tulip_softc *sc;
2972 {
2973
2974 if (sc->sc_flags & TULIPF_HAS_MII) {
2975 /*
2976 * MII case: just set the port-select bit; we will never
2977 * be called during a media change.
2978 */
2979 sc->sc_opmode |= OPMODE_PS;
2980 } else {
2981 /*
2982 * ENDEC/PCS/Nway mode; enable the Tx backoff counter.
2983 */
2984 sc->sc_opmode |= OPMODE_PNIC_TBEN;
2985 }
2986 }
2987
2988 /*
2989 * tlp_21140_reset:
2990 *
2991 * Issue a reset sequence on the 21140 via the GPIO facility.
2992 */
2993 void
2994 tlp_21140_reset(sc)
2995 struct tulip_softc *sc;
2996 {
2997 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
2998 struct tulip_21x4x_media *tm = ife->ifm_aux;
2999 int i;
3000
3001 /* First, set the direction on the GPIO pins. */
3002 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
3003
3004 /* Now, issue the reset sequence. */
3005 for (i = 0; i < tm->tm_reset_length; i++) {
3006 delay(10);
3007 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]);
3008 }
3009
3010 /* Now, issue the selection sequence. */
3011 for (i = 0; i < tm->tm_gp_length; i++) {
3012 delay(10);
3013 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]);
3014 }
3015
3016 /* If there were no sequences, just lower the pins. */
3017 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0)
3018 TULIP_WRITE(sc, CSR_GPP, 0);
3019 }
3020
3021 /*
3022 * tlp_21142_reset:
3023 *
3024 * Issue a reset sequence on the 21142 via the GPIO facility.
3025 */
3026 void
3027 tlp_21142_reset(sc)
3028 struct tulip_softc *sc;
3029 {
3030 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3031 struct tulip_21x4x_media *tm = ife->ifm_aux;
3032 const u_int8_t *ncp;
3033 int i;
3034
3035 ncp = &sc->sc_srom[tm->tm_reset_offset];
3036 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) {
3037 delay(10);
3038 TULIP_WRITE(sc, CSR_SIAGEN,
3039 TULIP_ROM_GETW(ncp, 0) << 16);
3040 }
3041
3042 ncp = &sc->sc_srom[tm->tm_gp_offset];
3043 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) {
3044 delay(10);
3045 TULIP_WRITE(sc, CSR_SIAGEN,
3046 TULIP_ROM_GETW(ncp, 0) << 16);
3047 }
3048
3049 /* If there were no sequences, just lower the pins. */
3050 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
3051 delay(10);
3052 TULIP_WRITE(sc, CSR_SIAGEN, 0);
3053 }
3054 }
3055
3056 /*
3057 * tlp_pmac_reset:
3058 *
3059 * Reset routine for Macronix chips.
3060 */
3061 void
3062 tlp_pmac_reset(sc)
3063 struct tulip_softc *sc;
3064 {
3065
3066 switch (sc->sc_chip) {
3067 case TULIP_CHIP_82C115:
3068 case TULIP_CHIP_MX98715:
3069 case TULIP_CHIP_MX98715A:
3070 case TULIP_CHIP_MX98725:
3071 /*
3072 * Set the LED operating mode. This information is located
3073 * in the EEPROM at byte offset 0x77, per the MX98715A and
3074 * MX98725 application notes.
3075 */
3076 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24);
3077 break;
3078
3079 default:
3080 /* Nothing. */
3081 }
3082 }
3083
3084 /*****************************************************************************
3085 * Chip/board-specific media switches. The ones here are ones that
3086 * are potentially common to multiple front-ends.
3087 *****************************************************************************/
3088
3089 /*
3090 * This table is a common place for all sorts of media information,
3091 * keyed off of the SROM media code for that media.
3092 *
3093 * Note that we explicitly configure the 21142/21143 to always advertise
3094 * NWay capabilities when using the UTP port.
3095 * XXX Actually, we don't yet.
3096 */
3097 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = {
3098 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0,
3099 "10baseT",
3100 0,
3101 { SIACONN_21040_10BASET,
3102 SIATXRX_21040_10BASET,
3103 SIAGEN_21040_10BASET },
3104
3105 { SIACONN_21041_10BASET,
3106 SIATXRX_21041_10BASET,
3107 SIAGEN_21041_10BASET },
3108
3109 { SIACONN_21142_10BASET,
3110 SIATXRX_21142_10BASET,
3111 SIAGEN_21142_10BASET } },
3112
3113 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0,
3114 "10base2",
3115 0,
3116 { 0,
3117 0,
3118 0 },
3119
3120 { SIACONN_21041_BNC,
3121 SIATXRX_21041_BNC,
3122 SIAGEN_21041_BNC },
3123
3124 { SIACONN_21142_BNC,
3125 SIATXRX_21142_BNC,
3126 SIAGEN_21142_BNC } },
3127
3128 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0,
3129 "10base5",
3130 0,
3131 { SIACONN_21040_AUI,
3132 SIATXRX_21040_AUI,
3133 SIAGEN_21040_AUI },
3134
3135 { SIACONN_21041_AUI,
3136 SIATXRX_21041_AUI,
3137 SIAGEN_21041_AUI },
3138
3139 { SIACONN_21142_AUI,
3140 SIATXRX_21142_AUI,
3141 SIAGEN_21142_AUI } },
3142
3143 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0,
3144 "100baseTX",
3145 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD,
3146 { 0,
3147 0,
3148 0 },
3149
3150 { 0,
3151 0,
3152 0 },
3153
3154 { 0,
3155 0,
3156 SIAGEN_ABM } },
3157
3158 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX,
3159 "10baseT-FDX",
3160 OPMODE_FD|OPMODE_HBD,
3161 { SIACONN_21040_10BASET_FDX,
3162 SIATXRX_21040_10BASET_FDX,
3163 SIAGEN_21040_10BASET_FDX },
3164
3165 { SIACONN_21041_10BASET_FDX,
3166 SIATXRX_21041_10BASET_FDX,
3167 SIAGEN_21041_10BASET_FDX },
3168
3169 { SIACONN_21142_10BASET_FDX,
3170 SIATXRX_21142_10BASET_FDX,
3171 SIAGEN_21142_10BASET_FDX } },
3172
3173 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX,
3174 "100baseTX-FDX",
3175 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD,
3176 { 0,
3177 0,
3178 0 },
3179
3180 { 0,
3181 0,
3182 0 },
3183
3184 { 0,
3185 0,
3186 SIAGEN_ABM } },
3187
3188 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0,
3189 "100baseT4",
3190 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD,
3191 { 0,
3192 0,
3193 0 },
3194
3195 { 0,
3196 0,
3197 0 },
3198
3199 { 0,
3200 0,
3201 SIAGEN_ABM } },
3202
3203 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0,
3204 "100baseFX",
3205 OPMODE_PS|OPMODE_PCS|OPMODE_HBD,
3206 { 0,
3207 0,
3208 0 },
3209
3210 { 0,
3211 0,
3212 0 },
3213
3214 { 0,
3215 0,
3216 SIAGEN_ABM } },
3217
3218 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX,
3219 "100baseFX-FDX",
3220 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD,
3221 { 0,
3222 0,
3223 0 },
3224
3225 { 0,
3226 0,
3227 0 },
3228
3229 { 0,
3230 0,
3231 SIAGEN_ABM } },
3232
3233 { 0, 0, 0,
3234 NULL,
3235 0,
3236 { 0,
3237 0,
3238 0 },
3239
3240 { 0,
3241 0,
3242 0 },
3243
3244 { 0,
3245 0,
3246 0 } },
3247 };
3248
3249 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t));
3250 void tlp_srom_media_info __P((struct tulip_softc *,
3251 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *));
3252 void tlp_add_srom_media __P((struct tulip_softc *, int,
3253 void (*)(struct tulip_softc *, struct ifmediareq *),
3254 int (*)(struct tulip_softc *), const u_int8_t *, int));
3255 void tlp_print_media __P((struct tulip_softc *));
3256 void tlp_nway_activate __P((struct tulip_softc *, int));
3257 void tlp_get_minst __P((struct tulip_softc *));
3258
3259 const struct tulip_srom_to_ifmedia *
3260 tlp_srom_to_ifmedia(sm)
3261 u_int8_t sm;
3262 {
3263 const struct tulip_srom_to_ifmedia *tsti;
3264
3265 for (tsti = tulip_srom_to_ifmedia_table;
3266 tsti->tsti_name != NULL; tsti++) {
3267 if (tsti->tsti_srom == sm)
3268 return (tsti);
3269 }
3270
3271 return (NULL);
3272 }
3273
3274 void
3275 tlp_srom_media_info(sc, tsti, tm)
3276 struct tulip_softc *sc;
3277 const struct tulip_srom_to_ifmedia *tsti;
3278 struct tulip_21x4x_media *tm;
3279 {
3280
3281 tm->tm_name = tsti->tsti_name;
3282 tm->tm_opmode = tsti->tsti_opmode;
3283
3284 switch (sc->sc_chip) {
3285 case TULIP_CHIP_DE425:
3286 case TULIP_CHIP_21040:
3287 tm->tm_sia = tsti->tsti_21040; /* struct assignment */
3288 break;
3289
3290 case TULIP_CHIP_21041:
3291 tm->tm_sia = tsti->tsti_21041; /* struct assignment */
3292 break;
3293
3294 case TULIP_CHIP_21142:
3295 case TULIP_CHIP_21143:
3296 case TULIP_CHIP_82C115:
3297 case TULIP_CHIP_MX98715:
3298 case TULIP_CHIP_MX98715A:
3299 case TULIP_CHIP_MX98725:
3300 tm->tm_sia = tsti->tsti_21142; /* struct assignment */
3301 break;
3302
3303 default:
3304 /* Nothing. */
3305 }
3306 }
3307
3308 void
3309 tlp_add_srom_media(sc, type, get, set, list, cnt)
3310 struct tulip_softc *sc;
3311 int type;
3312 void (*get) __P((struct tulip_softc *, struct ifmediareq *));
3313 int (*set) __P((struct tulip_softc *));
3314 const u_int8_t *list;
3315 int cnt;
3316 {
3317 struct tulip_21x4x_media *tm;
3318 const struct tulip_srom_to_ifmedia *tsti;
3319 int i;
3320
3321 for (i = 0; i < cnt; i++) {
3322 tsti = tlp_srom_to_ifmedia(list[i]);
3323 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
3324 memset(tm, 0, sizeof(*tm));
3325 tlp_srom_media_info(sc, tsti, tm);
3326 tm->tm_type = type;
3327 tm->tm_get = get;
3328 tm->tm_set = set;
3329
3330 ifmedia_add(&sc->sc_mii.mii_media,
3331 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
3332 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
3333 }
3334 }
3335
3336 void
3337 tlp_print_media(sc)
3338 struct tulip_softc *sc;
3339 {
3340 struct ifmedia_entry *ife;
3341 struct tulip_21x4x_media *tm;
3342 const char *sep = "";
3343
3344 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
3345
3346 printf("%s: ", sc->sc_dev.dv_xname);
3347 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
3348 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) {
3349 tm = ife->ifm_aux;
3350 if (tm == NULL) {
3351 #ifdef DIAGNOSTIC
3352 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
3353 panic("tlp_print_media");
3354 #endif
3355 PRINT("auto");
3356 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII &&
3357 tm->tm_type != TULIP_ROM_MB_21142_MII) {
3358 PRINT(tm->tm_name);
3359 }
3360 }
3361 printf("\n");
3362
3363 #undef PRINT
3364 }
3365
3366 void
3367 tlp_nway_activate(sc, media)
3368 struct tulip_softc *sc;
3369 int media;
3370 {
3371 struct ifmedia_entry *ife;
3372
3373 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0);
3374 #ifdef DIAGNOSTIC
3375 if (ife == NULL)
3376 panic("tlp_nway_activate");
3377 #endif
3378 sc->sc_nway_active = ife;
3379 }
3380
3381 void
3382 tlp_get_minst(sc)
3383 struct tulip_softc *sc;
3384 {
3385
3386 if ((sc->sc_media_seen &
3387 ~((1 << TULIP_ROM_MB_21140_MII) |
3388 (1 << TULIP_ROM_MB_21142_MII))) == 0) {
3389 /*
3390 * We have not yet seen any SIA/SYM media (but are
3391 * about to; that's why we're called!), so assign
3392 * the current media instance to be the `internal media'
3393 * instance, and advance it so any MII media gets a
3394 * fresh one (used to selecting/isolating a PHY).
3395 */
3396 sc->sc_tlp_minst = sc->sc_mii.mii_instance++;
3397 }
3398 }
3399
3400 /*
3401 * SIA Utility functions.
3402 */
3403 void tlp_sia_update_link __P((struct tulip_softc *));
3404 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *));
3405 int tlp_sia_set __P((struct tulip_softc *));
3406 void tlp_sia_fixup __P((struct tulip_softc *));
3407
3408 void
3409 tlp_sia_update_link(sc)
3410 struct tulip_softc *sc;
3411 {
3412 struct ifmedia_entry *ife;
3413 struct tulip_21x4x_media *tm;
3414 u_int32_t siastat;
3415
3416 ife = TULIP_CURRENT_MEDIA(sc);
3417 tm = ife->ifm_aux;
3418
3419 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID);
3420
3421 siastat = TULIP_READ(sc, CSR_SIASTAT);
3422
3423 /*
3424 * Note that when we do SIA link tests, we are assuming that
3425 * the chip is really in the mode that the current media setting
3426 * reflects. If we're not, then the link tests will not be
3427 * accurate!
3428 */
3429 switch (IFM_SUBTYPE(ife->ifm_media)) {
3430 case IFM_10_T:
3431 sc->sc_flags |= TULIPF_LINK_VALID;
3432 if ((siastat & SIASTAT_LS10) == 0)
3433 sc->sc_flags |= TULIPF_LINK_UP;
3434 break;
3435
3436 case IFM_100_TX:
3437 case IFM_100_T4:
3438 sc->sc_flags |= TULIPF_LINK_VALID;
3439 if ((siastat & SIASTAT_LS100) == 0)
3440 sc->sc_flags |= TULIPF_LINK_UP;
3441 break;
3442 }
3443
3444 switch (sc->sc_chip) {
3445 case TULIP_CHIP_21142:
3446 case TULIP_CHIP_21143:
3447 /*
3448 * On these chips, we can tell more information about
3449 * AUI/BNC. Note that the AUI/BNC selection is made
3450 * in a different register; for our purpose, it's all
3451 * AUI.
3452 */
3453 switch (IFM_SUBTYPE(ife->ifm_media)) {
3454 case IFM_10_2:
3455 case IFM_10_5:
3456 sc->sc_flags |= TULIPF_LINK_VALID;
3457 if (siastat & SIASTAT_ARA) {
3458 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA);
3459 sc->sc_flags |= TULIPF_LINK_UP;
3460 }
3461 break;
3462
3463 default:
3464 /*
3465 * If we're SYM media and can detect the link
3466 * via the GPIO facility, prefer that status
3467 * over LS100.
3468 */
3469 if (tm->tm_type == TULIP_ROM_MB_21143_SYM &&
3470 tm->tm_actmask != 0) {
3471 sc->sc_flags = (sc->sc_flags &
3472 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID;
3473 if (TULIP_ISSET(sc, CSR_SIAGEN,
3474 tm->tm_actmask) == tm->tm_actdata)
3475 sc->sc_flags |= TULIPF_LINK_UP;
3476 }
3477 }
3478 break;
3479
3480 default:
3481 /* Nothing. */
3482 }
3483 }
3484
3485 void
3486 tlp_sia_get(sc, ifmr)
3487 struct tulip_softc *sc;
3488 struct ifmediareq *ifmr;
3489 {
3490 struct ifmedia_entry *ife;
3491
3492 ifmr->ifm_status = 0;
3493
3494 tlp_sia_update_link(sc);
3495
3496 ife = TULIP_CURRENT_MEDIA(sc);
3497
3498 if (sc->sc_flags & TULIPF_LINK_VALID)
3499 ifmr->ifm_status |= IFM_AVALID;
3500 if (sc->sc_flags & TULIPF_LINK_UP)
3501 ifmr->ifm_status |= IFM_ACTIVE;
3502 ifmr->ifm_active = ife->ifm_media;
3503 }
3504
3505 void
3506 tlp_sia_fixup(sc)
3507 struct tulip_softc *sc;
3508 {
3509 struct ifmedia_entry *ife;
3510 struct tulip_21x4x_media *tm;
3511 u_int32_t siaconn, siatxrx, siagen;
3512
3513 switch (sc->sc_chip) {
3514 case TULIP_CHIP_82C115:
3515 case TULIP_CHIP_MX98713A:
3516 case TULIP_CHIP_MX98715:
3517 case TULIP_CHIP_MX98715A:
3518 case TULIP_CHIP_MX98725:
3519 siaconn = PMAC_SIACONN_MASK;
3520 siatxrx = PMAC_SIATXRX_MASK;
3521 siagen = PMAC_SIAGEN_MASK;
3522 break;
3523
3524 default:
3525 /* No fixups required on any other chips. */
3526 return;
3527 }
3528
3529 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
3530 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) {
3531 tm = ife->ifm_aux;
3532 if (tm == NULL)
3533 continue;
3534
3535 tm->tm_siaconn &= siaconn;
3536 tm->tm_siatxrx &= siatxrx;
3537 tm->tm_siagen &= siagen;
3538 }
3539 }
3540
3541 int
3542 tlp_sia_set(sc)
3543 struct tulip_softc *sc;
3544 {
3545 struct ifmedia_entry *ife;
3546 struct tulip_21x4x_media *tm;
3547
3548 ife = TULIP_CURRENT_MEDIA(sc);
3549 tm = ife->ifm_aux;
3550
3551 /*
3552 * XXX This appears to be necessary on a bunch of the clone chips.
3553 */
3554 delay(20000);
3555
3556 /*
3557 * Idle the chip.
3558 */
3559 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
3560
3561 /*
3562 * Program the SIA. It's important to write in this order,
3563 * resetting the SIA first.
3564 */
3565 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */
3566 delay(1000);
3567
3568 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx);
3569
3570 switch (sc->sc_chip) {
3571 case TULIP_CHIP_21142:
3572 case TULIP_CHIP_21143:
3573 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl);
3574 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata);
3575 break;
3576 default:
3577 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen);
3578 }
3579
3580 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn);
3581
3582 /*
3583 * Set the OPMODE bits for this media and write OPMODE.
3584 * This will resume the transmit and receive processes.
3585 */
3586 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
3587 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3588
3589 return (0);
3590 }
3591
3592 /*
3593 * 21140 GPIO utility functions.
3594 */
3595 void tlp_21140_gpio_update_link __P((struct tulip_softc *));
3596 void tlp_21140_gpio_get __P((struct tulip_softc *sc,
3597 struct ifmediareq *ifmr));
3598 int tlp_21140_gpio_set __P((struct tulip_softc *sc));
3599
3600 void
3601 tlp_21140_gpio_update_link(sc)
3602 struct tulip_softc *sc;
3603 {
3604 struct ifmedia_entry *ife;
3605 struct tulip_21x4x_media *tm;
3606
3607 ife = TULIP_CURRENT_MEDIA(sc);
3608 tm = ife->ifm_aux;
3609
3610 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID);
3611
3612 if (tm->tm_actmask != 0) {
3613 sc->sc_flags |= TULIPF_LINK_VALID;
3614 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) ==
3615 tm->tm_actdata)
3616 sc->sc_flags |= TULIPF_LINK_UP;
3617 }
3618 }
3619
3620 void
3621 tlp_21140_gpio_get(sc, ifmr)
3622 struct tulip_softc *sc;
3623 struct ifmediareq *ifmr;
3624 {
3625 struct ifmedia_entry *ife;
3626
3627 ifmr->ifm_status = 0;
3628
3629 tlp_21140_gpio_update_link(sc);
3630
3631 ife = TULIP_CURRENT_MEDIA(sc);
3632
3633 if (sc->sc_flags & TULIPF_LINK_VALID)
3634 ifmr->ifm_status |= IFM_AVALID;
3635 if (sc->sc_flags & TULIPF_LINK_UP)
3636 ifmr->ifm_status |= IFM_ACTIVE;
3637 ifmr->ifm_active = ife->ifm_media;
3638 }
3639
3640 int
3641 tlp_21140_gpio_set(sc)
3642 struct tulip_softc *sc;
3643 {
3644 struct ifmedia_entry *ife;
3645 struct tulip_21x4x_media *tm;
3646
3647 ife = TULIP_CURRENT_MEDIA(sc);
3648 tm = ife->ifm_aux;
3649
3650 /*
3651 * Idle the chip.
3652 */
3653 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
3654
3655 /*
3656 * Set the GPIO pins for this media, to flip any
3657 * relays, etc.
3658 */
3659 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
3660 delay(10);
3661 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata);
3662
3663 /*
3664 * Set the OPMODE bits for this media and write OPMODE.
3665 * This will resume the transmit and receive processes.
3666 */
3667 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
3668 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3669
3670 return (0);
3671 }
3672
3673 /*
3674 * 21040 and 21041 media switches.
3675 */
3676 void tlp_21040_tmsw_init __P((struct tulip_softc *));
3677 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *));
3678 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *));
3679 void tlp_21041_tmsw_init __P((struct tulip_softc *));
3680
3681 const struct tulip_mediasw tlp_21040_mediasw = {
3682 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set
3683 };
3684
3685 const struct tulip_mediasw tlp_21040_tp_mediasw = {
3686 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set
3687 };
3688
3689 const struct tulip_mediasw tlp_21040_auibnc_mediasw = {
3690 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set
3691 };
3692
3693 const struct tulip_mediasw tlp_21041_mediasw = {
3694 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set
3695 };
3696
3697
3698 void
3699 tlp_21040_tmsw_init(sc)
3700 struct tulip_softc *sc;
3701 {
3702 static const u_int8_t media[] = {
3703 TULIP_ROM_MB_MEDIA_TP,
3704 TULIP_ROM_MB_MEDIA_TP_FDX,
3705 TULIP_ROM_MB_MEDIA_AUI,
3706 };
3707 struct tulip_21x4x_media *tm;
3708
3709 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
3710 tlp_mediastatus);
3711
3712 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3);
3713
3714 /*
3715 * No SROM type for External SIA.
3716 */
3717 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
3718 memset(tm, 0, sizeof(*tm));
3719 tm->tm_name = "manual";
3720 tm->tm_opmode = 0;
3721 tm->tm_siaconn = SIACONN_21040_EXTSIA;
3722 tm->tm_siatxrx = SIATXRX_21040_EXTSIA;
3723 tm->tm_siagen = SIAGEN_21040_EXTSIA;
3724 ifmedia_add(&sc->sc_mii.mii_media,
3725 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm);
3726
3727 /*
3728 * XXX Autosense not yet supported.
3729 */
3730
3731 /* XXX This should be auto-sense. */
3732 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
3733
3734 tlp_print_media(sc);
3735 }
3736
3737 void
3738 tlp_21040_tp_tmsw_init(sc)
3739 struct tulip_softc *sc;
3740 {
3741 static const u_int8_t media[] = {
3742 TULIP_ROM_MB_MEDIA_TP,
3743 TULIP_ROM_MB_MEDIA_TP_FDX,
3744 };
3745
3746 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
3747 tlp_mediastatus);
3748
3749 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2);
3750
3751 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
3752
3753 tlp_print_media(sc);
3754 }
3755
3756 void
3757 tlp_21040_auibnc_tmsw_init(sc)
3758 struct tulip_softc *sc;
3759 {
3760 static const u_int8_t media[] = {
3761 TULIP_ROM_MB_MEDIA_AUI,
3762 };
3763
3764 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
3765 tlp_mediastatus);
3766
3767 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1);
3768
3769 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5);
3770
3771 tlp_print_media(sc);
3772 }
3773
3774 void
3775 tlp_21041_tmsw_init(sc)
3776 struct tulip_softc *sc;
3777 {
3778 static const u_int8_t media[] = {
3779 TULIP_ROM_MB_MEDIA_TP,
3780 TULIP_ROM_MB_MEDIA_TP_FDX,
3781 TULIP_ROM_MB_MEDIA_BNC,
3782 TULIP_ROM_MB_MEDIA_AUI,
3783 };
3784 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt;
3785 const struct tulip_srom_to_ifmedia *tsti;
3786 struct tulip_21x4x_media *tm;
3787 u_int16_t romdef;
3788 u_int8_t mb;
3789
3790 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
3791 tlp_mediastatus);
3792
3793 if (tlp_isv_srom(sc->sc_srom) == 0) {
3794 not_isv_srom:
3795 /*
3796 * If we have a board without the standard 21041 SROM format,
3797 * we just assume all media are present and try and pick a
3798 * reasonable default.
3799 */
3800 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4);
3801
3802 /*
3803 * XXX Autosense not yet supported.
3804 */
3805
3806 /* XXX This should be auto-sense. */
3807 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
3808
3809 tlp_print_media(sc);
3810 return;
3811 }
3812
3813 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
3814 for (i = 0; i < devcnt; i++) {
3815 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
3816 break;
3817 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
3818 sc->sc_devno)
3819 break;
3820 }
3821
3822 if (i == devcnt)
3823 goto not_isv_srom;
3824
3825 leaf_offset = TULIP_ROM_GETW(sc->sc_srom,
3826 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i));
3827 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE;
3828 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT];
3829
3830 for (; m_cnt != 0;
3831 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) {
3832 mb = sc->sc_srom[mb_offset];
3833 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
3834 memset(tm, 0, sizeof(*tm));
3835 switch (mb & TULIP_ROM_MB_MEDIA_CODE) {
3836 case TULIP_ROM_MB_MEDIA_TP_FDX:
3837 case TULIP_ROM_MB_MEDIA_TP:
3838 case TULIP_ROM_MB_MEDIA_BNC:
3839 case TULIP_ROM_MB_MEDIA_AUI:
3840 tsti = tlp_srom_to_ifmedia(mb &
3841 TULIP_ROM_MB_MEDIA_CODE);
3842
3843 tlp_srom_media_info(sc, tsti, tm);
3844
3845 /*
3846 * Override our default SIA settings if the
3847 * SROM contains its own.
3848 */
3849 if (mb & TULIP_ROM_MB_EXT) {
3850 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom,
3851 mb_offset + TULIP_ROM_MB_CSR13);
3852 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom,
3853 mb_offset + TULIP_ROM_MB_CSR14);
3854 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom,
3855 mb_offset + TULIP_ROM_MB_CSR15);
3856 }
3857
3858 ifmedia_add(&sc->sc_mii.mii_media,
3859 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
3860 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
3861 break;
3862
3863 default:
3864 printf("%s: unknown media code 0x%02x\n",
3865 sc->sc_dev.dv_xname,
3866 mb & TULIP_ROM_MB_MEDIA_CODE);
3867 free(tm, M_DEVBUF);
3868 }
3869 }
3870
3871 /*
3872 * XXX Autosense not yet supported.
3873 */
3874
3875 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset +
3876 TULIP_ROM_IL_SELECT_CONN_TYPE);
3877 switch (romdef) {
3878 case SELECT_CONN_TYPE_TP:
3879 case SELECT_CONN_TYPE_TP_AUTONEG:
3880 case SELECT_CONN_TYPE_TP_NOLINKPASS:
3881 defmedia = IFM_ETHER|IFM_10_T;
3882 break;
3883
3884 case SELECT_CONN_TYPE_TP_FDX:
3885 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX;
3886 break;
3887
3888 case SELECT_CONN_TYPE_BNC:
3889 defmedia = IFM_ETHER|IFM_10_2;
3890 break;
3891
3892 case SELECT_CONN_TYPE_AUI:
3893 defmedia = IFM_ETHER|IFM_10_5;
3894 break;
3895 #if 0 /* XXX */
3896 case SELECT_CONN_TYPE_ASENSE:
3897 case SELECT_CONN_TYPE_ASENSE_AUTONEG:
3898 defmedia = IFM_ETHER|IFM_AUTO;
3899 break;
3900 #endif
3901 default:
3902 defmedia = 0;
3903 }
3904
3905 if (defmedia == 0) {
3906 /*
3907 * XXX We should default to auto-sense.
3908 */
3909 defmedia = IFM_ETHER|IFM_10_T;
3910 }
3911
3912 ifmedia_set(&sc->sc_mii.mii_media, defmedia);
3913
3914 tlp_print_media(sc);
3915 }
3916
3917 /*
3918 * DECchip 2114x ISV media switch.
3919 */
3920 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *));
3921 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
3922 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *));
3923
3924 const struct tulip_mediasw tlp_2114x_isv_mediasw = {
3925 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set
3926 };
3927
3928 void
3929 tlp_2114x_isv_tmsw_init(sc)
3930 struct tulip_softc *sc;
3931 {
3932 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
3933 struct ifmedia_entry *ife;
3934 struct mii_softc *phy;
3935 struct tulip_21x4x_media *tm;
3936 const struct tulip_srom_to_ifmedia *tsti;
3937 int i, devcnt, leaf_offset, m_cnt, type, length;
3938 int defmedia, miidef;
3939 u_int16_t word;
3940 u_int8_t *cp, *ncp;
3941
3942 defmedia = miidef = 0;
3943
3944 sc->sc_mii.mii_ifp = ifp;
3945 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
3946 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
3947 sc->sc_mii.mii_statchg = sc->sc_statchg;
3948
3949 /*
3950 * Ignore `instance'; we may get a mixture of SIA and MII
3951 * media, and `instance' is used to isolate or select the
3952 * PHY on the MII as appropriate. Note that duplicate media
3953 * are disallowed, so ignoring `instance' is safe.
3954 */
3955 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange,
3956 tlp_mediastatus);
3957
3958 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
3959 for (i = 0; i < devcnt; i++) {
3960 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
3961 break;
3962 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
3963 sc->sc_devno)
3964 break;
3965 }
3966
3967 if (i == devcnt) {
3968 printf("%s: unable to locate info leaf in SROM\n",
3969 sc->sc_dev.dv_xname);
3970 return;
3971 }
3972
3973 leaf_offset = TULIP_ROM_GETW(sc->sc_srom,
3974 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i));
3975
3976 /* XXX SELECT CONN TYPE */
3977
3978 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT];
3979
3980 /*
3981 * On some chips, the first thing in the Info Leaf is the
3982 * GPIO pin direction data.
3983 */
3984 switch (sc->sc_chip) {
3985 case TULIP_CHIP_21140:
3986 case TULIP_CHIP_21140A:
3987 case TULIP_CHIP_MX98713:
3988 case TULIP_CHIP_AX88140:
3989 case TULIP_CHIP_AX88141:
3990 sc->sc_gp_dir = *cp++;
3991 break;
3992
3993 default:
3994 /* Nothing. */
3995 }
3996
3997 /* Get the media count. */
3998 m_cnt = *cp++;
3999
4000 for (; m_cnt != 0; cp = ncp, m_cnt--) {
4001 /*
4002 * Determine the type and length of this media block.
4003 */
4004 if ((*cp & 0x80) == 0) {
4005 length = 4;
4006 type = TULIP_ROM_MB_21140_GPR;
4007 } else {
4008 length = (*cp++ & 0x7f) - 1;
4009 type = *cp++ & 0x3f;
4010 }
4011
4012 /* Compute the start of the next block. */
4013 ncp = cp + length;
4014
4015 /* Now, parse the block. */
4016 switch (type) {
4017 case TULIP_ROM_MB_21140_GPR:
4018 tlp_get_minst(sc);
4019 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR;
4020
4021 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4022 memset(tm, 0, sizeof(*tm));
4023
4024 tm->tm_type = TULIP_ROM_MB_21140_GPR;
4025 tm->tm_get = tlp_21140_gpio_get;
4026 tm->tm_set = tlp_21140_gpio_set;
4027
4028 /* First is the media type code. */
4029 tsti = tlp_srom_to_ifmedia(cp[0] &
4030 TULIP_ROM_MB_MEDIA_CODE);
4031 if (tsti == NULL) {
4032 /* Invalid media code. */
4033 free(tm, M_DEVBUF);
4034 break;
4035 }
4036
4037 /* Get defaults. */
4038 tlp_srom_media_info(sc, tsti, tm);
4039
4040 /* Next is any GPIO info for this media. */
4041 tm->tm_gpdata = cp[1];
4042
4043 /*
4044 * Next is a word containing OPMODE information
4045 * and info on how to detect if this media is
4046 * active.
4047 */
4048 word = TULIP_ROM_GETW(cp, 2);
4049 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word);
4050 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
4051 tm->tm_actmask =
4052 TULIP_ROM_MB_BITPOS(word);
4053 tm->tm_actdata =
4054 (word & TULIP_ROM_MB_POLARITY) ?
4055 0 : tm->tm_actmask;
4056 }
4057
4058 ifmedia_add(&sc->sc_mii.mii_media,
4059 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4060 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4061 break;
4062
4063 case TULIP_ROM_MB_21140_MII:
4064 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII;
4065
4066 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4067 memset(tm, 0, sizeof(*tm));
4068
4069 tm->tm_type = TULIP_ROM_MB_21140_MII;
4070 tm->tm_get = tlp_mii_getmedia;
4071 tm->tm_set = tlp_mii_setmedia;
4072 tm->tm_opmode = OPMODE_PS;
4073
4074 if (sc->sc_reset == NULL)
4075 sc->sc_reset = tlp_21140_reset;
4076
4077 /* First is the PHY number. */
4078 tm->tm_phyno = *cp++;
4079
4080 /* Next is the MII select sequence length and offset. */
4081 tm->tm_gp_length = *cp++;
4082 tm->tm_gp_offset = cp - &sc->sc_srom[0];
4083 cp += tm->tm_gp_length;
4084
4085 /* Next is the MII reset sequence length and offset. */
4086 tm->tm_reset_length = *cp++;
4087 tm->tm_reset_offset = cp - &sc->sc_srom[0];
4088 cp += tm->tm_reset_length;
4089
4090 /*
4091 * The following items are left in the media block
4092 * that we don't particularly care about:
4093 *
4094 * capabilities W
4095 * advertisement W
4096 * full duplex W
4097 * tx threshold W
4098 *
4099 * These appear to be bits in the PHY registers,
4100 * which our MII code handles on its own.
4101 */
4102
4103 /*
4104 * Before we probe the MII bus, we need to reset
4105 * it and issue the selection sequence.
4106 */
4107
4108 /* Set the direction of the pins... */
4109 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
4110
4111 for (i = 0; i < tm->tm_reset_length; i++) {
4112 delay(10);
4113 TULIP_WRITE(sc, CSR_GPP,
4114 sc->sc_srom[tm->tm_reset_offset + i]);
4115 }
4116
4117 for (i = 0; i < tm->tm_gp_length; i++) {
4118 delay(10);
4119 TULIP_WRITE(sc, CSR_GPP,
4120 sc->sc_srom[tm->tm_gp_offset + i]);
4121 }
4122
4123 /* If there were no sequences, just lower the pins. */
4124 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
4125 delay(10);
4126 TULIP_WRITE(sc, CSR_GPP, 0);
4127 }
4128
4129 /*
4130 * Now, probe the MII for the PHY. Note, we know
4131 * the location of the PHY on the bus, but we don't
4132 * particularly care; the MII code just likes to
4133 * search the whole thing anyhow.
4134 */
4135 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4136 MII_PHY_ANY, tm->tm_phyno);
4137
4138 /*
4139 * Now, search for the PHY we hopefully just
4140 * configured. If it's not configured into the
4141 * kernel, we lose. The PHY's default media always
4142 * takes priority.
4143 */
4144 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys);
4145 phy != NULL;
4146 phy = LIST_NEXT(phy, mii_list))
4147 if (phy->mii_offset == tm->tm_phyno)
4148 break;
4149 if (phy == NULL) {
4150 printf("%s: unable to configure MII\n",
4151 sc->sc_dev.dv_xname);
4152 break;
4153 }
4154
4155 sc->sc_flags |= TULIPF_HAS_MII;
4156 sc->sc_tick = tlp_mii_tick;
4157 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0,
4158 phy->mii_inst);
4159
4160 /*
4161 * Okay, now that we've found the PHY and the MII
4162 * layer has added all of the media associated
4163 * with that PHY, we need to traverse the media
4164 * list, and add our `tm' to each entry's `aux'
4165 * pointer.
4166 *
4167 * We do this by looking for media with our
4168 * PHY's `instance'.
4169 */
4170 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4171 ife != NULL;
4172 ife = TAILQ_NEXT(ife, ifm_list)) {
4173 if (IFM_INST(ife->ifm_media) != phy->mii_inst)
4174 continue;
4175 ife->ifm_aux = tm;
4176 }
4177 break;
4178
4179 case TULIP_ROM_MB_21142_SIA:
4180 tlp_get_minst(sc);
4181 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA;
4182
4183 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4184 memset(tm, 0, sizeof(*tm));
4185
4186 tm->tm_type = TULIP_ROM_MB_21142_SIA;
4187 tm->tm_get = tlp_sia_get;
4188 tm->tm_set = tlp_sia_set;
4189
4190 /* First is the media type code. */
4191 tsti = tlp_srom_to_ifmedia(cp[0] &
4192 TULIP_ROM_MB_MEDIA_CODE);
4193 if (tsti == NULL) {
4194 /* Invalid media code. */
4195 free(tm, M_DEVBUF);
4196 break;
4197 }
4198
4199 /* Get defaults. */
4200 tlp_srom_media_info(sc, tsti, tm);
4201
4202 /*
4203 * Override our default SIA settings if the
4204 * SROM contains its own.
4205 */
4206 if (cp[0] & 0x40) {
4207 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1);
4208 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3);
4209 tm->tm_siagen = TULIP_ROM_GETW(cp, 5);
4210 cp += 7;
4211 } else
4212 cp++;
4213
4214 /* Next is GPIO control/data. */
4215 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0);
4216 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2);
4217
4218 ifmedia_add(&sc->sc_mii.mii_media,
4219 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4220 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4221 break;
4222
4223 case TULIP_ROM_MB_21142_MII:
4224 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII;
4225
4226 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4227 memset(tm, 0, sizeof(*tm));
4228
4229 tm->tm_type = TULIP_ROM_MB_21142_MII;
4230 tm->tm_get = tlp_mii_getmedia;
4231 tm->tm_set = tlp_mii_setmedia;
4232 tm->tm_opmode = OPMODE_PS;
4233
4234 if (sc->sc_reset == NULL)
4235 sc->sc_reset = tlp_21142_reset;
4236
4237 /* First is the PHY number. */
4238 tm->tm_phyno = *cp++;
4239
4240 /* Next is the MII select sequence length and offset. */
4241 tm->tm_gp_length = *cp++;
4242 tm->tm_gp_offset = cp - &sc->sc_srom[0];
4243 cp += tm->tm_gp_length * 2;
4244
4245 /* Next is the MII reset sequence length and offset. */
4246 tm->tm_reset_length = *cp++;
4247 tm->tm_reset_offset = cp - &sc->sc_srom[0];
4248 cp += tm->tm_reset_length * 2;
4249
4250 /*
4251 * The following items are left in the media block
4252 * that we don't particularly care about:
4253 *
4254 * capabilities W
4255 * advertisement W
4256 * full duplex W
4257 * tx threshold W
4258 * MII interrupt W
4259 *
4260 * These appear to be bits in the PHY registers,
4261 * which our MII code handles on its own.
4262 */
4263
4264 /*
4265 * Before we probe the MII bus, we need to reset
4266 * it and issue the selection sequence.
4267 */
4268
4269 ncp = &sc->sc_srom[tm->tm_reset_offset];
4270 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) {
4271 delay(10);
4272 TULIP_WRITE(sc, CSR_SIAGEN,
4273 TULIP_ROM_GETW(ncp, 0) << 16);
4274 }
4275
4276 ncp = &sc->sc_srom[tm->tm_gp_offset];
4277 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) {
4278 delay(10);
4279 TULIP_WRITE(sc, CSR_SIAGEN,
4280 TULIP_ROM_GETW(ncp, 0) << 16);
4281 }
4282
4283 /* If there were no sequences, just lower the pins. */
4284 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
4285 delay(10);
4286 TULIP_WRITE(sc, CSR_SIAGEN, 0);
4287 }
4288
4289 /*
4290 * Now, probe the MII for the PHY. Note, we know
4291 * the location of the PHY on the bus, but we don't
4292 * particularly care; the MII code just likes to
4293 * search the whole thing anyhow.
4294 */
4295 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4296 MII_PHY_ANY, tm->tm_phyno);
4297
4298 /*
4299 * Now, search for the PHY we hopefully just
4300 * configured. If it's not configured into the
4301 * kernel, we lose. The PHY's default media always
4302 * takes priority.
4303 */
4304 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys);
4305 phy != NULL;
4306 phy = LIST_NEXT(phy, mii_list))
4307 if (phy->mii_offset == tm->tm_phyno)
4308 break;
4309 if (phy == NULL) {
4310 printf("%s: unable to configure MII\n",
4311 sc->sc_dev.dv_xname);
4312 break;
4313 }
4314
4315 sc->sc_flags |= TULIPF_HAS_MII;
4316 sc->sc_tick = tlp_mii_tick;
4317 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0,
4318 phy->mii_inst);
4319
4320 /*
4321 * Okay, now that we've found the PHY and the MII
4322 * layer has added all of the media associated
4323 * with that PHY, we need to traverse the media
4324 * list, and add our `tm' to each entry's `aux'
4325 * pointer.
4326 *
4327 * We do this by looking for media with our
4328 * PHY's `instance'.
4329 */
4330 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4331 ife != NULL;
4332 ife = TAILQ_NEXT(ife, ifm_list)) {
4333 if (IFM_INST(ife->ifm_media) != phy->mii_inst)
4334 continue;
4335 ife->ifm_aux = tm;
4336 }
4337 break;
4338
4339 case TULIP_ROM_MB_21143_SYM:
4340 tlp_get_minst(sc);
4341 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM;
4342
4343 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4344 memset(tm, 0, sizeof(*tm));
4345
4346 tm->tm_type = TULIP_ROM_MB_21143_SYM;
4347 tm->tm_get = tlp_sia_get;
4348 tm->tm_set = tlp_sia_set;
4349
4350 /* First is the media type code. */
4351 tsti = tlp_srom_to_ifmedia(cp[0] &
4352 TULIP_ROM_MB_MEDIA_CODE);
4353 if (tsti == NULL) {
4354 /* Invalid media code. */
4355 free(tm, M_DEVBUF);
4356 break;
4357 }
4358
4359 /* Get defaults. */
4360 tlp_srom_media_info(sc, tsti, tm);
4361
4362 /* Next is GPIO control/data. */
4363 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1);
4364 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3);
4365
4366 /*
4367 * Next is a word containing OPMODE information
4368 * and info on how to detect if this media is
4369 * active.
4370 */
4371 word = TULIP_ROM_GETW(cp, 5);
4372 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word);
4373 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
4374 tm->tm_actmask =
4375 TULIP_ROM_MB_BITPOS(word);
4376 tm->tm_actdata =
4377 (word & TULIP_ROM_MB_POLARITY) ?
4378 0 : tm->tm_actmask;
4379 }
4380
4381 ifmedia_add(&sc->sc_mii.mii_media,
4382 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4383 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4384 break;
4385
4386 case TULIP_ROM_MB_21143_RESET:
4387 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname);
4388 break;
4389
4390 default:
4391 printf("%s: unknown ISV media block type 0x%02x\n",
4392 sc->sc_dev.dv_xname, type);
4393 }
4394 }
4395
4396 /*
4397 * Deal with the case where no media is configured.
4398 */
4399 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) {
4400 printf("%s: no media found!\n", sc->sc_dev.dv_xname);
4401 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
4402 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
4403 return;
4404 }
4405
4406 /*
4407 * Pick the default media.
4408 */
4409 if (miidef != 0)
4410 defmedia = miidef;
4411 else {
4412 /*
4413 * XXX Pick a better default. Should come from SROM
4414 * XXX on 21140[A], and should be "auto" on 21142,
4415 * XXX 21143, and Macronix chips.
4416 */
4417 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0);
4418 }
4419
4420 ifmedia_set(&sc->sc_mii.mii_media, defmedia);
4421
4422 /*
4423 * Display any non-MII media we've located.
4424 */
4425 if (sc->sc_media_seen &
4426 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII)))
4427 tlp_print_media(sc);
4428
4429 tlp_sia_fixup(sc);
4430 }
4431
4432 void
4433 tlp_2114x_isv_tmsw_get(sc, ifmr)
4434 struct tulip_softc *sc;
4435 struct ifmediareq *ifmr;
4436 {
4437 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
4438 struct tulip_21x4x_media *tm = ife->ifm_aux;
4439
4440 /*
4441 * We might be polling a non-MII autosense; check for that.
4442 */
4443 if (tm == NULL) {
4444 #ifdef DIAGNOSTIC
4445 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
4446 panic("tlp_2114x_isv_tmsw_get");
4447 #endif
4448 tm = sc->sc_nway_active->ifm_aux;
4449 }
4450
4451 (*tm->tm_get)(sc, ifmr);
4452 }
4453
4454 int
4455 tlp_2114x_isv_tmsw_set(sc)
4456 struct tulip_softc *sc;
4457 {
4458 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
4459 struct tulip_21x4x_media *tm = ife->ifm_aux;
4460
4461 /*
4462 * We might be setting a non-MII autosense; check for that.
4463 */
4464 if (tm == NULL) {
4465 #ifdef DIAGNOSTIC
4466 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
4467 panic("tlp_2114x_isv_tmsw_set");
4468 #endif
4469 /* XXX XXX XXX */
4470 }
4471
4472 /*
4473 * Check to see if we need to reset the chip, and do it. The
4474 * reset path will get the OPMODE register right the next
4475 * time through.
4476 */
4477 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode))
4478 return (tlp_init(sc));
4479
4480 return ((*tm->tm_set)(sc));
4481 }
4482
4483 /*
4484 * MII-on-SIO media switch. Handles only MII attached to the SIO.
4485 */
4486 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *));
4487
4488 const struct tulip_mediasw tlp_sio_mii_mediasw = {
4489 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
4490 };
4491
4492 void
4493 tlp_sio_mii_tmsw_init(sc)
4494 struct tulip_softc *sc;
4495 {
4496 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4497
4498 /*
4499 * We don't attach any media info structures to the ifmedia
4500 * entries, so if we're using a pre-init function that needs
4501 * that info, override it to one that doesn't.
4502 */
4503 if (sc->sc_preinit == tlp_2114x_preinit)
4504 sc->sc_preinit = tlp_2114x_mii_preinit;
4505
4506 sc->sc_mii.mii_ifp = ifp;
4507 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
4508 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
4509 sc->sc_mii.mii_statchg = sc->sc_statchg;
4510 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4511 tlp_mediastatus);
4512 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
4513 MII_OFFSET_ANY);
4514 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
4515 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
4516 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
4517 } else {
4518 sc->sc_flags |= TULIPF_HAS_MII;
4519 sc->sc_tick = tlp_mii_tick;
4520 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
4521 }
4522 }
4523
4524 /*
4525 * Lite-On PNIC media switch. Must handle MII or internal NWAY.
4526 */
4527 void tlp_pnic_tmsw_init __P((struct tulip_softc *));
4528 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
4529 int tlp_pnic_tmsw_set __P((struct tulip_softc *));
4530
4531 const struct tulip_mediasw tlp_pnic_mediasw = {
4532 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set
4533 };
4534
4535 void tlp_pnic_nway_statchg __P((struct device *));
4536 void tlp_pnic_nway_tick __P((void *));
4537 int tlp_pnic_nway_service __P((struct tulip_softc *, int));
4538 void tlp_pnic_nway_reset __P((struct tulip_softc *));
4539 int tlp_pnic_nway_auto __P((struct tulip_softc *, int));
4540 void tlp_pnic_nway_auto_timeout __P((void *));
4541 void tlp_pnic_nway_status __P((struct tulip_softc *));
4542 void tlp_pnic_nway_acomp __P((struct tulip_softc *));
4543
4544 void
4545 tlp_pnic_tmsw_init(sc)
4546 struct tulip_softc *sc;
4547 {
4548 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4549 const char *sep = "";
4550
4551 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL)
4552 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
4553
4554 sc->sc_mii.mii_ifp = ifp;
4555 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg;
4556 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg;
4557 sc->sc_mii.mii_statchg = sc->sc_statchg;
4558 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4559 tlp_mediastatus);
4560 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
4561 MII_OFFSET_ANY);
4562 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
4563 /* XXX What about AUI/BNC support? */
4564 printf("%s: ", sc->sc_dev.dv_xname);
4565
4566 tlp_pnic_nway_reset(sc);
4567
4568 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0),
4569 PNIC_NWAY_TW|PNIC_NWAY_CAP10T);
4570 PRINT("10baseT");
4571
4572 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0),
4573 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX);
4574 PRINT("10baseT-FDX");
4575
4576 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
4577 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX);
4578 PRINT("100baseTX");
4579
4580 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0),
4581 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD|
4582 PNIC_NWAY_CAP100TXFDX);
4583 PRINT("100baseTX-FDX");
4584
4585 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0),
4586 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW|
4587 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX|
4588 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX);
4589 PRINT("auto");
4590
4591 printf("\n");
4592
4593 sc->sc_statchg = tlp_pnic_nway_statchg;
4594 sc->sc_tick = tlp_pnic_nway_tick;
4595 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
4596 } else {
4597 sc->sc_flags |= TULIPF_HAS_MII;
4598 sc->sc_tick = tlp_mii_tick;
4599 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
4600 }
4601
4602 #undef ADD
4603 #undef PRINT
4604 }
4605
4606 void
4607 tlp_pnic_tmsw_get(sc, ifmr)
4608 struct tulip_softc *sc;
4609 struct ifmediareq *ifmr;
4610 {
4611 struct mii_data *mii = &sc->sc_mii;
4612
4613 if (sc->sc_flags & TULIPF_HAS_MII)
4614 tlp_mii_getmedia(sc, ifmr);
4615 else {
4616 mii->mii_media_status = 0;
4617 mii->mii_media_active = IFM_NONE;
4618 tlp_pnic_nway_service(sc, MII_POLLSTAT);
4619 ifmr->ifm_status = sc->sc_mii.mii_media_status;
4620 ifmr->ifm_active = sc->sc_mii.mii_media_active;
4621 }
4622 }
4623
4624 int
4625 tlp_pnic_tmsw_set(sc)
4626 struct tulip_softc *sc;
4627 {
4628 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4629 struct mii_data *mii = &sc->sc_mii;
4630
4631 if (sc->sc_flags & TULIPF_HAS_MII) {
4632 /*
4633 * Make sure the built-in Tx jabber timer is disabled.
4634 */
4635 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS);
4636
4637 return (tlp_mii_setmedia(sc));
4638 }
4639
4640 if (ifp->if_flags & IFF_UP) {
4641 mii->mii_media_status = 0;
4642 mii->mii_media_active = IFM_NONE;
4643 return (tlp_pnic_nway_service(sc, MII_MEDIACHG));
4644 }
4645
4646 return (0);
4647 }
4648
4649 void
4650 tlp_pnic_nway_statchg(self)
4651 struct device *self;
4652 {
4653 struct tulip_softc *sc = (struct tulip_softc *)self;
4654
4655 /* Idle the transmit and receive processes. */
4656 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
4657
4658 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS|
4659 OPMODE_SCR|OPMODE_HBD);
4660
4661 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) {
4662 sc->sc_opmode |= OPMODE_TTM;
4663 TULIP_WRITE(sc, CSR_GPP,
4664 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) |
4665 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1));
4666 } else {
4667 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD;
4668 TULIP_WRITE(sc, CSR_GPP,
4669 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) |
4670 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1));
4671 }
4672
4673 if (sc->sc_mii.mii_media_active & IFM_FDX)
4674 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD;
4675
4676 /*
4677 * Write new OPMODE bits. This also restarts the transmit
4678 * and receive processes.
4679 */
4680 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
4681
4682 /* XXX Update ifp->if_baudrate */
4683 }
4684
4685 void
4686 tlp_pnic_nway_tick(arg)
4687 void *arg;
4688 {
4689 struct tulip_softc *sc = arg;
4690 int s;
4691
4692 s = splnet();
4693 tlp_pnic_nway_service(sc, MII_TICK);
4694 splx(s);
4695
4696 timeout(tlp_pnic_nway_tick, sc, hz);
4697 }
4698
4699 /*
4700 * Support for the Lite-On PNIC internal NWay block. This is constructed
4701 * somewhat like a PHY driver for simplicity.
4702 */
4703
4704 int
4705 tlp_pnic_nway_service(sc, cmd)
4706 struct tulip_softc *sc;
4707 int cmd;
4708 {
4709 struct mii_data *mii = &sc->sc_mii;
4710 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
4711
4712 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
4713 return (0);
4714
4715 switch (cmd) {
4716 case MII_POLLSTAT:
4717 /* Nothing special to do here. */
4718 break;
4719
4720 case MII_MEDIACHG:
4721 switch (IFM_SUBTYPE(ife->ifm_media)) {
4722 case IFM_AUTO:
4723 (void) tlp_pnic_nway_auto(sc, 1);
4724 break;
4725 case IFM_100_T4:
4726 /*
4727 * XXX Not supported as a manual setting right now.
4728 */
4729 return (EINVAL);
4730 default:
4731 /*
4732 * NWAY register data is stored in the ifmedia entry.
4733 */
4734 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
4735 }
4736 break;
4737
4738 case MII_TICK:
4739 /*
4740 * Only used for autonegotiation.
4741 */
4742 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
4743 return (0);
4744
4745 /*
4746 * Check to see if we have link. If we do, we don't
4747 * need to restart the autonegotiation process.
4748 */
4749 if (sc->sc_flags & TULIPF_LINK_UP)
4750 return (0);
4751
4752 /*
4753 * Only retry autonegotiation every 5 seconds.
4754 */
4755 if (++sc->sc_nway_ticks != 5)
4756 return (0);
4757
4758 sc->sc_nway_ticks = 0;
4759 tlp_pnic_nway_reset(sc);
4760 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN)
4761 return (0);
4762 break;
4763 }
4764
4765 /* Update the media status. */
4766 tlp_pnic_nway_status(sc);
4767
4768 /* Callback if something changed. */
4769 if ((sc->sc_nway_active == NULL ||
4770 sc->sc_nway_active->ifm_media != mii->mii_media_active) ||
4771 cmd == MII_MEDIACHG) {
4772 (*sc->sc_statchg)(&sc->sc_dev);
4773 tlp_nway_activate(sc, mii->mii_media_active);
4774 }
4775 return (0);
4776 }
4777
4778 void
4779 tlp_pnic_nway_reset(sc)
4780 struct tulip_softc *sc;
4781 {
4782
4783 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS);
4784 delay(100);
4785 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0);
4786 }
4787
4788 int
4789 tlp_pnic_nway_auto(sc, waitfor)
4790 struct tulip_softc *sc;
4791 int waitfor;
4792 {
4793 struct mii_data *mii = &sc->sc_mii;
4794 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
4795 u_int32_t reg;
4796 int i;
4797
4798 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0)
4799 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
4800
4801 if (waitfor) {
4802 /* Wait 500ms for it to complete. */
4803 for (i = 0; i < 500; i++) {
4804 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
4805 if (reg & PNIC_NWAY_LPAR_MASK) {
4806 tlp_pnic_nway_acomp(sc);
4807 return (0);
4808 }
4809 delay(1000);
4810 }
4811 #if 0
4812 if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
4813 printf("%s: autonegotiation failed to complete\n",
4814 sc->sc_dev.dv_xname);
4815 #endif
4816
4817 /*
4818 * Don't need to worry about clearing DOINGAUTO.
4819 * If that's set, a timeout is pending, and it will
4820 * clear the flag.
4821 */
4822 return (EIO);
4823 }
4824
4825 /*
4826 * Just let it finish asynchronously. This is for the benefit of
4827 * the tick handler driving autonegotiation. Don't want 500ms
4828 * delays all the time while the system is running!
4829 */
4830 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) {
4831 sc->sc_flags |= TULIPF_DOINGAUTO;
4832 timeout(tlp_pnic_nway_auto_timeout, sc, hz >> 1);
4833 }
4834 return (EJUSTRETURN);
4835 }
4836
4837 void
4838 tlp_pnic_nway_auto_timeout(arg)
4839 void *arg;
4840 {
4841 struct tulip_softc *sc = arg;
4842 u_int32_t reg;
4843 int s;
4844
4845 s = splnet();
4846 sc->sc_flags &= ~TULIPF_DOINGAUTO;
4847 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
4848 #if 0
4849 if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
4850 printf("%s: autonegotiation failed to complete\n",
4851 sc->sc_dev.dv_xname);
4852 #endif
4853
4854 tlp_pnic_nway_acomp(sc);
4855
4856 /* Update the media status. */
4857 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT);
4858 splx(s);
4859 }
4860
4861 void
4862 tlp_pnic_nway_status(sc)
4863 struct tulip_softc *sc;
4864 {
4865 struct mii_data *mii = &sc->sc_mii;
4866 u_int32_t reg;
4867
4868 mii->mii_media_status = IFM_AVALID;
4869 mii->mii_media_active = IFM_ETHER;
4870
4871 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
4872
4873 if (sc->sc_flags & TULIPF_LINK_UP)
4874 mii->mii_media_status |= IFM_ACTIVE;
4875
4876 if (reg & PNIC_NWAY_NW) {
4877 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) {
4878 /* Erg, still trying, I guess... */
4879 mii->mii_media_active |= IFM_NONE;
4880 return;
4881 }
4882
4883 #if 0
4884 if (reg & PNIC_NWAY_LPAR100T4)
4885 mii->mii_media_active |= IFM_100_T4;
4886 else
4887 #endif
4888 if (reg & PNIC_NWAY_LPAR100TXFDX)
4889 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
4890 else if (reg & PNIC_NWAY_LPAR100TX)
4891 mii->mii_media_active |= IFM_100_TX;
4892 else if (reg & PNIC_NWAY_LPAR10TFDX)
4893 mii->mii_media_active |= IFM_10_T|IFM_FDX;
4894 else if (reg & PNIC_NWAY_LPAR10T)
4895 mii->mii_media_active |= IFM_10_T;
4896 else
4897 mii->mii_media_active |= IFM_NONE;
4898 } else {
4899 if (reg & PNIC_NWAY_100)
4900 mii->mii_media_active |= IFM_100_TX;
4901 else
4902 mii->mii_media_active |= IFM_10_T;
4903 if (reg & PNIC_NWAY_FD)
4904 mii->mii_media_active |= IFM_FDX;
4905 }
4906 }
4907
4908 void
4909 tlp_pnic_nway_acomp(sc)
4910 struct tulip_softc *sc;
4911 {
4912 u_int32_t reg;
4913
4914 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
4915 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN);
4916
4917 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX))
4918 reg |= PNIC_NWAY_100;
4919 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX))
4920 reg |= PNIC_NWAY_FD;
4921
4922 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg);
4923 }
4924
4925 /*
4926 * Macronix PMAC and Lite-On PNIC-II media switch:
4927 *
4928 * MX98713 and MX98713A 21140-like MII or GPIO media.
4929 *
4930 * MX98713A 21143-like MII or SIA/SYM media.
4931 *
4932 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media.
4933 * 82C115
4934 *
4935 * So, what we do here is fake MII-on-SIO or ISV media info, and
4936 * use the ISV media switch get/set functions to handle the rest.
4937 */
4938
4939 void tlp_pmac_tmsw_init __P((struct tulip_softc *));
4940
4941 const struct tulip_mediasw tlp_pmac_mediasw = {
4942 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set
4943 };
4944
4945 const struct tulip_mediasw tlp_pmac_mii_mediasw = {
4946 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
4947 };
4948
4949 void
4950 tlp_pmac_tmsw_init(sc)
4951 struct tulip_softc *sc;
4952 {
4953 static const u_int8_t media[] = {
4954 TULIP_ROM_MB_MEDIA_TP,
4955 TULIP_ROM_MB_MEDIA_TP_FDX,
4956 TULIP_ROM_MB_MEDIA_100TX,
4957 TULIP_ROM_MB_MEDIA_100TX_FDX,
4958 };
4959 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4960
4961 sc->sc_mii.mii_ifp = ifp;
4962 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
4963 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
4964 sc->sc_mii.mii_statchg = sc->sc_statchg;
4965 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4966 tlp_mediastatus);
4967 if (sc->sc_chip == TULIP_CHIP_MX98713 ||
4968 sc->sc_chip == TULIP_CHIP_MX98713A) {
4969 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4970 MII_PHY_ANY, MII_OFFSET_ANY);
4971 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) {
4972 sc->sc_flags |= TULIPF_HAS_MII;
4973 sc->sc_tick = tlp_mii_tick;
4974 sc->sc_preinit = tlp_2114x_mii_preinit;
4975 sc->sc_mediasw = &tlp_pmac_mii_mediasw;
4976 ifmedia_set(&sc->sc_mii.mii_media,
4977 IFM_ETHER|IFM_AUTO);
4978 return;
4979 }
4980 }
4981
4982 switch (sc->sc_chip) {
4983 case TULIP_CHIP_MX98713:
4984 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR,
4985 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4);
4986
4987 /*
4988 * XXX Should implement auto-sense for this someday,
4989 * XXX when we do the same for the 21140.
4990 */
4991 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4992 break;
4993
4994 default:
4995 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA,
4996 tlp_sia_get, tlp_sia_set, media, 2);
4997 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM,
4998 tlp_sia_get, tlp_sia_set, media + 2, 2);
4999
5000 /*
5001 * XXX Autonegotiation not yet supported.
5002 */
5003 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
5004 break;
5005 }
5006
5007 tlp_print_media(sc);
5008 tlp_sia_fixup(sc);
5009
5010 /* Set the LED modes. */
5011 tlp_pmac_reset(sc);
5012
5013 sc->sc_reset = tlp_pmac_reset;
5014 }
5015
5016 /*
5017 * ADMtek AL981 media switch. Only has internal PHY.
5018 */
5019 void tlp_al981_tmsw_init __P((struct tulip_softc *));
5020
5021 const struct tulip_mediasw tlp_al981_mediasw = {
5022 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5023 };
5024
5025 void
5026 tlp_al981_tmsw_init(sc)
5027 struct tulip_softc *sc;
5028 {
5029 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5030
5031 sc->sc_mii.mii_ifp = ifp;
5032 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg;
5033 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg;
5034 sc->sc_mii.mii_statchg = sc->sc_statchg;
5035 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5036 tlp_mediastatus);
5037 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5038 MII_OFFSET_ANY);
5039 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5040 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5041 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5042 } else {
5043 sc->sc_flags |= TULIPF_HAS_MII;
5044 sc->sc_tick = tlp_mii_tick;
5045 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5046 }
5047 }
5048