tulip.c revision 1.38 1 /* $NetBSD: tulip.c,v 1.38 2000/01/25 19:29:17 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family, and a variety of clone chips.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/mbuf.h>
52 #include <sys/malloc.h>
53 #include <sys/kernel.h>
54 #include <sys/socket.h>
55 #include <sys/ioctl.h>
56 #include <sys/errno.h>
57 #include <sys/device.h>
58
59 #include <machine/endian.h>
60
61 #include <vm/vm.h> /* for PAGE_SIZE */
62
63 #include <net/if.h>
64 #include <net/if_dl.h>
65 #include <net/if_media.h>
66 #include <net/if_ether.h>
67
68 #if NBPFILTER > 0
69 #include <net/bpf.h>
70 #endif
71
72 #ifdef INET
73 #include <netinet/in.h>
74 #include <netinet/if_inarp.h>
75 #endif
76
77 #ifdef NS
78 #include <netns/ns.h>
79 #include <netns/ns_if.h>
80 #endif
81
82 #include <machine/bus.h>
83 #include <machine/intr.h>
84
85 #include <dev/mii/mii.h>
86 #include <dev/mii/miivar.h>
87 #include <dev/mii/mii_bitbang.h>
88
89 #include <dev/ic/tulipreg.h>
90 #include <dev/ic/tulipvar.h>
91
92 const char *tlp_chip_names[] = TULIP_CHIP_NAMES;
93
94 /*
95 * The following tables compute the transmit threshold mode. We start
96 * at index 0. When ever we get a transmit underrun, we increment our
97 * index, falling back if we encounter the NULL terminator.
98 *
99 * Note: Store and forward mode is only available on the 100mbps chips
100 * (21140 and higher).
101 */
102 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = {
103 { OPMODE_TR_72, "72 bytes" },
104 { OPMODE_TR_96, "96 bytes" },
105 { OPMODE_TR_128, "128 bytes" },
106 { OPMODE_TR_160, "160 bytes" },
107 { 0, NULL },
108 };
109
110 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = {
111 { OPMODE_TR_72, "72/128 bytes" },
112 { OPMODE_TR_96, "96/256 bytes" },
113 { OPMODE_TR_128, "128/512 bytes" },
114 { OPMODE_TR_160, "160/1024 bytes" },
115 { OPMODE_SF, "store and forward mode" },
116 { 0, NULL },
117 };
118
119 #define TXTH_72 0
120 #define TXTH_96 1
121 #define TXTH_128 2
122 #define TXTH_160 3
123 #define TXTH_SF 4
124
125 /*
126 * The Winbond 89C840F does transmit threshold control totally
127 * differently. It simply has a 7-bit field which indicates
128 * the threshold:
129 *
130 * txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16;
131 *
132 * However, we just do Store-and-Forward mode on these chips, since
133 * the DMA engines seem to be flaky.
134 */
135 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = {
136 { 0, "store and forward mode" },
137 { 0, NULL },
138 };
139
140 #define TXTH_WINB_SF 0
141
142 void tlp_start __P((struct ifnet *));
143 void tlp_watchdog __P((struct ifnet *));
144 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t));
145
146 void tlp_shutdown __P((void *));
147
148 void tlp_reset __P((struct tulip_softc *));
149 int tlp_init __P((struct tulip_softc *));
150 void tlp_rxdrain __P((struct tulip_softc *));
151 void tlp_stop __P((struct tulip_softc *, int));
152 int tlp_add_rxbuf __P((struct tulip_softc *, int));
153 void tlp_idle __P((struct tulip_softc *, u_int32_t));
154 void tlp_srom_idle __P((struct tulip_softc *));
155
156 void tlp_filter_setup __P((struct tulip_softc *));
157 void tlp_winb_filter_setup __P((struct tulip_softc *));
158 void tlp_al981_filter_setup __P((struct tulip_softc *));
159
160 void tlp_rxintr __P((struct tulip_softc *));
161 void tlp_txintr __P((struct tulip_softc *));
162
163 void tlp_mii_tick __P((void *));
164 void tlp_mii_statchg __P((struct device *));
165 void tlp_winb_mii_statchg __P((struct device *));
166
167 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *));
168 int tlp_mii_setmedia __P((struct tulip_softc *));
169
170 int tlp_bitbang_mii_readreg __P((struct device *, int, int));
171 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int));
172
173 int tlp_pnic_mii_readreg __P((struct device *, int, int));
174 void tlp_pnic_mii_writereg __P((struct device *, int, int, int));
175
176 int tlp_al981_mii_readreg __P((struct device *, int, int));
177 void tlp_al981_mii_writereg __P((struct device *, int, int, int));
178
179 void tlp_2114x_preinit __P((struct tulip_softc *));
180 void tlp_2114x_mii_preinit __P((struct tulip_softc *));
181 void tlp_pnic_preinit __P((struct tulip_softc *));
182
183 void tlp_21140_reset __P((struct tulip_softc *));
184 void tlp_21142_reset __P((struct tulip_softc *));
185 void tlp_pmac_reset __P((struct tulip_softc *));
186
187 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t));
188 #define tlp_mchash(addr, sz) (tlp_crc32((addr), ETHER_ADDR_LEN) & ((sz) - 1))
189
190 /*
191 * MII bit-bang glue.
192 */
193 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *));
194 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t));
195
196 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = {
197 tlp_sio_mii_bitbang_read,
198 tlp_sio_mii_bitbang_write,
199 {
200 MIIROM_MDO, /* MII_BIT_MDO */
201 MIIROM_MDI, /* MII_BIT_MDI */
202 MIIROM_MDC, /* MII_BIT_MDC */
203 0, /* MII_BIT_DIR_HOST_PHY */
204 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */
205 }
206 };
207
208 #ifdef TLP_DEBUG
209 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \
210 printf x
211 #else
212 #define DPRINTF(sc, x) /* nothing */
213 #endif
214
215 #ifdef TLP_STATS
216 void tlp_print_stats __P((struct tulip_softc *));
217 #endif
218
219 /*
220 * tlp_attach:
221 *
222 * Attach a Tulip interface to the system.
223 */
224 void
225 tlp_attach(sc, enaddr)
226 struct tulip_softc *sc;
227 const u_int8_t *enaddr;
228 {
229 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
230 int i, rseg, error;
231 bus_dma_segment_t seg;
232
233 /*
234 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift!
235 */
236
237 /*
238 * Setup the transmit threshold table.
239 */
240 switch (sc->sc_chip) {
241 case TULIP_CHIP_DE425:
242 case TULIP_CHIP_21040:
243 case TULIP_CHIP_21041:
244 sc->sc_txth = tlp_10_txthresh_tab;
245 break;
246
247 default:
248 sc->sc_txth = tlp_10_100_txthresh_tab;
249 break;
250 }
251
252 /*
253 * Setup the filter setup function.
254 */
255 switch (sc->sc_chip) {
256 case TULIP_CHIP_WB89C840F:
257 sc->sc_filter_setup = tlp_winb_filter_setup;
258 break;
259
260 case TULIP_CHIP_AL981:
261 sc->sc_filter_setup = tlp_al981_filter_setup;
262 break;
263
264 default:
265 sc->sc_filter_setup = tlp_filter_setup;
266 break;
267 }
268
269 /*
270 * Set up the media status change function.
271 */
272 switch (sc->sc_chip) {
273 case TULIP_CHIP_WB89C840F:
274 sc->sc_statchg = tlp_winb_mii_statchg;
275 break;
276
277 default:
278 /*
279 * We may override this if we have special media
280 * handling requirements (e.g. flipping GPIO pins).
281 *
282 * The pure-MII statchg function covers the basics.
283 */
284 sc->sc_statchg = tlp_mii_statchg;
285 break;
286 }
287
288 /*
289 * Set up various chip-specific quirks.
290 */
291 switch (sc->sc_chip) {
292 case TULIP_CHIP_21140:
293 case TULIP_CHIP_21140A:
294 case TULIP_CHIP_21142:
295 case TULIP_CHIP_21143:
296 case TULIP_CHIP_82C115: /* 21143-like */
297 case TULIP_CHIP_MX98713: /* 21140-like */
298 case TULIP_CHIP_MX98713A: /* 21143-like */
299 case TULIP_CHIP_MX98715: /* 21143-like */
300 case TULIP_CHIP_MX98715A: /* 21143-like */
301 case TULIP_CHIP_MX98725: /* 21143-like */
302 sc->sc_preinit = tlp_2114x_preinit;
303 break;
304
305 case TULIP_CHIP_82C168:
306 case TULIP_CHIP_82C169:
307 sc->sc_preinit = tlp_pnic_preinit;
308
309 /*
310 * These chips seem to have busted DMA engines; just put them
311 * in Store-and-Forward mode from the get-go.
312 */
313 sc->sc_txthresh = TXTH_SF;
314 break;
315
316 case TULIP_CHIP_WB89C840F:
317 sc->sc_flags |= TULIPF_IC_FS;
318 break;
319
320 default:
321 /* Nothing. */
322 }
323
324 /*
325 * Set up the MII bit-bang operations.
326 */
327 switch (sc->sc_chip) {
328 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */
329 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
330 break;
331
332 default:
333 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
334 }
335
336 SIMPLEQ_INIT(&sc->sc_txfreeq);
337 SIMPLEQ_INIT(&sc->sc_txdirtyq);
338
339 /*
340 * Allocate the control data structures, and create and load the
341 * DMA map for it.
342 */
343 if ((error = bus_dmamem_alloc(sc->sc_dmat,
344 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg,
345 0)) != 0) {
346 printf("%s: unable to allocate control data, error = %d\n",
347 sc->sc_dev.dv_xname, error);
348 goto fail_0;
349 }
350
351 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
352 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data,
353 BUS_DMA_COHERENT)) != 0) {
354 printf("%s: unable to map control data, error = %d\n",
355 sc->sc_dev.dv_xname, error);
356 goto fail_1;
357 }
358
359 if ((error = bus_dmamap_create(sc->sc_dmat,
360 sizeof(struct tulip_control_data), 1,
361 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
362 printf("%s: unable to create control data DMA map, "
363 "error = %d\n", sc->sc_dev.dv_xname, error);
364 goto fail_2;
365 }
366
367 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
368 sc->sc_control_data, sizeof(struct tulip_control_data), NULL,
369 0)) != 0) {
370 printf("%s: unable to load control data DMA map, error = %d\n",
371 sc->sc_dev.dv_xname, error);
372 goto fail_3;
373 }
374
375 /*
376 * Create the transmit buffer DMA maps.
377 */
378 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
379 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
380 TULIP_NTXSEGS, MCLBYTES, 0, 0,
381 &sc->sc_txsoft[i].txs_dmamap)) != 0) {
382 printf("%s: unable to create tx DMA map %d, "
383 "error = %d\n", sc->sc_dev.dv_xname, i, error);
384 goto fail_4;
385 }
386 }
387
388 /*
389 * Create the recieve buffer DMA maps.
390 */
391 for (i = 0; i < TULIP_NRXDESC; i++) {
392 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
393 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
394 printf("%s: unable to create rx DMA map %d, "
395 "error = %d\n", sc->sc_dev.dv_xname, i, error);
396 goto fail_5;
397 }
398 sc->sc_rxsoft[i].rxs_mbuf = NULL;
399 }
400
401 /*
402 * Reset the chip to a known state.
403 */
404 tlp_reset(sc);
405
406 /* Announce ourselves. */
407 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname,
408 sc->sc_name[0] != '\0' ? sc->sc_name : "",
409 sc->sc_name[0] != '\0' ? ", " : "",
410 ether_sprintf(enaddr));
411
412 /*
413 * Initialize our media structures. This may probe the MII, if
414 * present.
415 */
416 (*sc->sc_mediasw->tmsw_init)(sc);
417
418 ifp = &sc->sc_ethercom.ec_if;
419 strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
420 ifp->if_softc = sc;
421 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
422 ifp->if_ioctl = tlp_ioctl;
423 ifp->if_start = tlp_start;
424 ifp->if_watchdog = tlp_watchdog;
425
426 /*
427 * Attach the interface.
428 */
429 if_attach(ifp);
430 ether_ifattach(ifp, enaddr);
431 #if NBPFILTER > 0
432 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
433 sizeof(struct ether_header));
434 #endif
435
436 /*
437 * Make sure the interface is shutdown during reboot.
438 */
439 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc);
440 if (sc->sc_sdhook == NULL)
441 printf("%s: WARNING: unable to establish shutdown hook\n",
442 sc->sc_dev.dv_xname);
443 return;
444
445 /*
446 * Free any resources we've allocated during the failed attach
447 * attempt. Do this in reverse order and fall through.
448 */
449 fail_5:
450 for (i = 0; i < TULIP_NRXDESC; i++) {
451 if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
452 bus_dmamap_destroy(sc->sc_dmat,
453 sc->sc_rxsoft[i].rxs_dmamap);
454 }
455 fail_4:
456 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
457 if (sc->sc_txsoft[i].txs_dmamap != NULL)
458 bus_dmamap_destroy(sc->sc_dmat,
459 sc->sc_txsoft[i].txs_dmamap);
460 }
461 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
462 fail_3:
463 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
464 fail_2:
465 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
466 sizeof(struct tulip_control_data));
467 fail_1:
468 bus_dmamem_free(sc->sc_dmat, &seg, rseg);
469 fail_0:
470 return;
471 }
472
473 /*
474 * tlp_shutdown:
475 *
476 * Make sure the interface is stopped at reboot time.
477 */
478 void
479 tlp_shutdown(arg)
480 void *arg;
481 {
482 struct tulip_softc *sc = arg;
483
484 tlp_stop(sc, 1);
485 }
486
487 /*
488 * tlp_start: [ifnet interface function]
489 *
490 * Start packet transmission on the interface.
491 */
492 void
493 tlp_start(ifp)
494 struct ifnet *ifp;
495 {
496 struct tulip_softc *sc = ifp->if_softc;
497 struct mbuf *m0, *m;
498 struct tulip_txsoft *txs, *last_txs;
499 bus_dmamap_t dmamap;
500 int error, firsttx, nexttx, lasttx, ofree, seg;
501
502 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n",
503 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags));
504
505 /*
506 * If we want a filter setup, it means no more descriptors were
507 * available for the setup routine. Let it get a chance to wedge
508 * itself into the ring.
509 */
510 if (sc->sc_flags & TULIPF_WANT_SETUP)
511 ifp->if_flags |= IFF_OACTIVE;
512
513 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
514 return;
515
516 /*
517 * Remember the previous number of free descriptors and
518 * the first descriptor we'll use.
519 */
520 ofree = sc->sc_txfree;
521 firsttx = sc->sc_txnext;
522
523 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n",
524 sc->sc_dev.dv_xname, ofree, firsttx));
525
526 /*
527 * Loop through the send queue, setting up transmit descriptors
528 * until we drain the queue, or use up all available transmit
529 * descriptors.
530 */
531 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL &&
532 sc->sc_txfree != 0) {
533 /*
534 * Grab a packet off the queue.
535 */
536 IF_DEQUEUE(&ifp->if_snd, m0);
537 if (m0 == NULL)
538 break;
539
540 dmamap = txs->txs_dmamap;
541
542 /*
543 * Load the DMA map. If this fails, the packet either
544 * didn't fit in the alloted number of segments, or we were
545 * short on resources. In this case, we'll copy and try
546 * again.
547 */
548 if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
549 BUS_DMA_NOWAIT) != 0) {
550 MGETHDR(m, M_DONTWAIT, MT_DATA);
551 if (m == NULL) {
552 printf("%s: unable to allocate Tx mbuf\n",
553 sc->sc_dev.dv_xname);
554 IF_PREPEND(&ifp->if_snd, m0);
555 break;
556 }
557 if (m0->m_pkthdr.len > MHLEN) {
558 MCLGET(m, M_DONTWAIT);
559 if ((m->m_flags & M_EXT) == 0) {
560 printf("%s: unable to allocate Tx "
561 "cluster\n", sc->sc_dev.dv_xname);
562 m_freem(m);
563 IF_PREPEND(&ifp->if_snd, m0);
564 break;
565 }
566 }
567 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
568 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
569 m_freem(m0);
570 m0 = m;
571 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
572 m0, BUS_DMA_NOWAIT);
573 if (error) {
574 printf("%s: unable to load Tx buffer, "
575 "error = %d\n", sc->sc_dev.dv_xname, error);
576 IF_PREPEND(&ifp->if_snd, m0);
577 break;
578 }
579 }
580
581 /*
582 * Ensure we have enough descriptors free to describe
583 * the packet.
584 */
585 if (dmamap->dm_nsegs > sc->sc_txfree) {
586 /*
587 * Not enough free descriptors to transmit this
588 * packet. We haven't committed to anything yet,
589 * so just unload the DMA map, put the packet
590 * back on the queue, and punt. Notify the upper
591 * layer that there are no more slots left.
592 *
593 * XXX We could allocate an mbuf and copy, but
594 * XXX it is worth it?
595 */
596 ifp->if_flags |= IFF_OACTIVE;
597 bus_dmamap_unload(sc->sc_dmat, dmamap);
598 IF_PREPEND(&ifp->if_snd, m0);
599 break;
600 }
601
602 /*
603 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET.
604 */
605
606 /* Sync the DMA map. */
607 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
608 BUS_DMASYNC_PREWRITE);
609
610 /*
611 * Initialize the transmit descriptors.
612 */
613 for (nexttx = sc->sc_txnext, seg = 0;
614 seg < dmamap->dm_nsegs;
615 seg++, nexttx = TULIP_NEXTTX(nexttx)) {
616 /*
617 * If this is the first descriptor we're
618 * enqueueing, don't set the OWN bit just
619 * yet. That could cause a race condition.
620 * We'll do it below.
621 */
622 sc->sc_txdescs[nexttx].td_status =
623 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN);
624 sc->sc_txdescs[nexttx].td_bufaddr1 =
625 htole32(dmamap->dm_segs[seg].ds_addr);
626 sc->sc_txdescs[nexttx].td_ctl =
627 htole32((dmamap->dm_segs[seg].ds_len <<
628 TDCTL_SIZE1_SHIFT) | TDCTL_CH);
629 lasttx = nexttx;
630 }
631
632 /* Set `first segment' and `last segment' appropriately. */
633 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS);
634 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS);
635
636 #ifdef TLP_DEBUG
637 if (ifp->if_flags & IFF_DEBUG) {
638 printf(" txsoft %p trainsmit chain:\n", txs);
639 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) {
640 printf(" descriptor %d:\n", seg);
641 printf(" td_status: 0x%08x\n",
642 le32toh(sc->sc_txdescs[seg].td_status));
643 printf(" td_ctl: 0x%08x\n",
644 le32toh(sc->sc_txdescs[seg].td_ctl));
645 printf(" td_bufaddr1: 0x%08x\n",
646 le32toh(sc->sc_txdescs[seg].td_bufaddr1));
647 printf(" td_bufaddr2: 0x%08x\n",
648 le32toh(sc->sc_txdescs[seg].td_bufaddr2));
649 if (seg == lasttx)
650 break;
651 }
652 }
653 #endif
654
655 /* Sync the descriptors we're using. */
656 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
657 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
658
659 /*
660 * Store a pointer to the packet so we can free it later,
661 * and remember what txdirty will be once the packet is
662 * done.
663 */
664 txs->txs_mbuf = m0;
665 txs->txs_firstdesc = sc->sc_txnext;
666 txs->txs_lastdesc = lasttx;
667
668 /* Advance the tx pointer. */
669 sc->sc_txfree -= dmamap->dm_nsegs;
670 sc->sc_txnext = nexttx;
671
672 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q);
673 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
674
675 last_txs = txs;
676
677 #if NBPFILTER > 0
678 /*
679 * Pass the packet to any BPF listeners.
680 */
681 if (ifp->if_bpf)
682 bpf_mtap(ifp->if_bpf, m0);
683 #endif /* NBPFILTER > 0 */
684 }
685
686 if (txs == NULL || sc->sc_txfree == 0) {
687 /* No more slots left; notify upper layer. */
688 ifp->if_flags |= IFF_OACTIVE;
689 }
690
691 if (sc->sc_txfree != ofree) {
692 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n",
693 sc->sc_dev.dv_xname, lasttx, firsttx));
694 /*
695 * Cause a transmit interrupt to happen on the
696 * last packet we enqueued.
697 */
698 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC);
699 TULIP_CDTXSYNC(sc, lasttx, 1,
700 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
701
702 /*
703 * Some clone chips want IC on the *first* segment in
704 * the packet. Appease them.
705 */
706 if ((sc->sc_flags & TULIPF_IC_FS) != 0 &&
707 last_txs->txs_firstdesc != lasttx) {
708 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |=
709 htole32(TDCTL_Tx_IC);
710 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1,
711 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
712 }
713
714 /*
715 * The entire packet chain is set up. Give the
716 * first descriptor to the chip now.
717 */
718 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN);
719 TULIP_CDTXSYNC(sc, firsttx, 1,
720 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
721
722 /* Wake up the transmitter. */
723 /* XXX USE AUTOPOLLING? */
724 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
725
726 /* Set a watchdog timer in case the chip flakes out. */
727 ifp->if_timer = 5;
728 }
729 }
730
731 /*
732 * tlp_watchdog: [ifnet interface function]
733 *
734 * Watchdog timer handler.
735 */
736 void
737 tlp_watchdog(ifp)
738 struct ifnet *ifp;
739 {
740 struct tulip_softc *sc = ifp->if_softc;
741 int doing_setup, doing_transmit;
742
743 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP);
744 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL);
745
746 if (doing_setup && doing_transmit) {
747 printf("%s: filter setup and transmit timeout\n",
748 sc->sc_dev.dv_xname);
749 ifp->if_oerrors++;
750 } else if (doing_transmit) {
751 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname);
752 ifp->if_oerrors++;
753 } else if (doing_setup)
754 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname);
755 else
756 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname);
757
758 (void) tlp_init(sc);
759
760 /* Try to get more packets going. */
761 tlp_start(ifp);
762 }
763
764 /*
765 * tlp_ioctl: [ifnet interface function]
766 *
767 * Handle control requests from the operator.
768 */
769 int
770 tlp_ioctl(ifp, cmd, data)
771 struct ifnet *ifp;
772 u_long cmd;
773 caddr_t data;
774 {
775 struct tulip_softc *sc = ifp->if_softc;
776 struct ifreq *ifr = (struct ifreq *)data;
777 struct ifaddr *ifa = (struct ifaddr *)data;
778 int s, error = 0;
779
780 s = splnet();
781
782 switch (cmd) {
783 case SIOCSIFADDR:
784 ifp->if_flags |= IFF_UP;
785
786 switch (ifa->ifa_addr->sa_family) {
787 #ifdef INET
788 case AF_INET:
789 if ((error = tlp_init(sc)) != 0)
790 break;
791 arp_ifinit(ifp, ifa);
792 break;
793 #endif /* INET */
794 #ifdef NS
795 case AF_NS:
796 {
797 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
798
799 if (ns_nullhost(*ina))
800 ina->x_host = *(union ns_host *)
801 LLADDR(ifp->if_sadl);
802 else
803 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
804 ifp->if_addrlen);
805 /* Set new address. */
806 error = tlp_init(sc);
807 break;
808 }
809 #endif /* NS */
810 default:
811 error = tlp_init(sc);
812 break;
813 }
814 break;
815
816 case SIOCSIFMTU:
817 if (ifr->ifr_mtu > ETHERMTU)
818 error = EINVAL;
819 else
820 ifp->if_mtu = ifr->ifr_mtu;
821 break;
822
823 case SIOCSIFFLAGS:
824 #ifdef TLP_STATS
825 if (ifp->if_flags & IFF_DEBUG)
826 tlp_print_stats(sc);
827 #endif
828 if ((ifp->if_flags & IFF_UP) == 0 &&
829 (ifp->if_flags & IFF_RUNNING) != 0) {
830 /*
831 * If interface is marked down and it is running, then
832 * stop it.
833 */
834 tlp_stop(sc, 1);
835 } else if ((ifp->if_flags & IFF_UP) != 0 &&
836 (ifp->if_flags & IFF_RUNNING) == 0) {
837 /*
838 * If interfase it marked up and it is stopped, then
839 * start it.
840 */
841 error = tlp_init(sc);
842 } else if ((ifp->if_flags & IFF_UP) != 0) {
843 /*
844 * Reset the interface to pick up changes in any other
845 * flags that affect the hardware state.
846 */
847 error = tlp_init(sc);
848 }
849 break;
850
851 case SIOCADDMULTI:
852 case SIOCDELMULTI:
853 error = (cmd == SIOCADDMULTI) ?
854 ether_addmulti(ifr, &sc->sc_ethercom) :
855 ether_delmulti(ifr, &sc->sc_ethercom);
856
857 if (error == ENETRESET) {
858 /*
859 * Multicast list has changed. Set the filter
860 * accordingly.
861 */
862 (*sc->sc_filter_setup)(sc);
863 error = 0;
864 }
865 break;
866
867 case SIOCSIFMEDIA:
868 case SIOCGIFMEDIA:
869 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
870 break;
871
872 default:
873 error = EINVAL;
874 break;
875 }
876
877 /* Try to get more packets going. */
878 tlp_start(ifp);
879
880 splx(s);
881 return (error);
882 }
883
884 /*
885 * tlp_intr:
886 *
887 * Interrupt service routine.
888 */
889 int
890 tlp_intr(arg)
891 void *arg;
892 {
893 struct tulip_softc *sc = arg;
894 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
895 u_int32_t status, rxstatus, txstatus;
896 int handled = 0, txthresh;
897
898 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname));
899
900 /*
901 * If the interface isn't running, the interrupt couldn't
902 * possibly have come from us.
903 */
904 if ((ifp->if_flags & IFF_RUNNING) == 0)
905 return (0);
906
907 for (;;) {
908 status = TULIP_READ(sc, CSR_STATUS);
909 if (status)
910 TULIP_WRITE(sc, CSR_STATUS, status);
911
912 if ((status & sc->sc_inten) == 0)
913 break;
914
915 handled = 1;
916
917 rxstatus = status & sc->sc_rxint_mask;
918 txstatus = status & sc->sc_txint_mask;
919
920 if (rxstatus) {
921 /* Grab new any new packets. */
922 tlp_rxintr(sc);
923
924 if (rxstatus & STATUS_RWT)
925 printf("%s: receive watchdog timeout\n",
926 sc->sc_dev.dv_xname);
927
928 if (rxstatus & STATUS_RU) {
929 printf("%s: receive ring overrun\n",
930 sc->sc_dev.dv_xname);
931 /* Get the receive process going again. */
932 tlp_idle(sc, OPMODE_SR);
933 TULIP_WRITE(sc, CSR_RXLIST,
934 TULIP_CDRXADDR(sc, sc->sc_rxptr));
935 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
936 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
937 break;
938 }
939 }
940
941 if (txstatus) {
942 /* Sweep up transmit descriptors. */
943 tlp_txintr(sc);
944
945 if (txstatus & STATUS_TJT)
946 printf("%s: transmit jabber timeout\n",
947 sc->sc_dev.dv_xname);
948
949 if (txstatus & STATUS_UNF) {
950 /*
951 * Increase our transmit threshold if
952 * another is available.
953 */
954 txthresh = sc->sc_txthresh + 1;
955 if (sc->sc_txth[txthresh].txth_name != NULL) {
956 /* Idle the transmit process. */
957 tlp_idle(sc, OPMODE_ST);
958
959 sc->sc_txthresh = txthresh;
960 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF);
961 sc->sc_opmode |=
962 sc->sc_txth[txthresh].txth_opmode;
963 printf("%s: transmit underrun; new "
964 "threshold: %s\n",
965 sc->sc_dev.dv_xname,
966 sc->sc_txth[txthresh].txth_name);
967
968 /*
969 * Set the new threshold and restart
970 * the transmit process.
971 */
972 TULIP_WRITE(sc, CSR_OPMODE,
973 sc->sc_opmode);
974 }
975 /*
976 * XXX Log every Nth underrun from
977 * XXX now on?
978 */
979 }
980 }
981
982 if (status & (STATUS_TPS|STATUS_RPS)) {
983 if (status & STATUS_TPS)
984 printf("%s: transmit process stopped\n",
985 sc->sc_dev.dv_xname);
986 if (status & STATUS_RPS)
987 printf("%s: receive process stopped\n",
988 sc->sc_dev.dv_xname);
989 (void) tlp_init(sc);
990 break;
991 }
992
993 if (status & STATUS_SE) {
994 const char *str;
995 switch (status & STATUS_EB) {
996 case STATUS_EB_PARITY:
997 str = "parity error";
998 break;
999
1000 case STATUS_EB_MABT:
1001 str = "master abort";
1002 break;
1003
1004 case STATUS_EB_TABT:
1005 str = "target abort";
1006 break;
1007
1008 default:
1009 str = "unknown error";
1010 break;
1011 }
1012 printf("%s: fatal system error: %s\n",
1013 sc->sc_dev.dv_xname, str);
1014 (void) tlp_init(sc);
1015 break;
1016 }
1017
1018 /*
1019 * Not handled:
1020 *
1021 * Transmit buffer unavailable -- normal
1022 * condition, nothing to do, really.
1023 *
1024 * General purpose timer experied -- we don't
1025 * use the general purpose timer.
1026 *
1027 * Early receive interrupt -- not available on
1028 * all chips, we just use RI. We also only
1029 * use single-segment receive DMA, so this
1030 * is mostly useless.
1031 */
1032 }
1033
1034 /* Try to get more packets going. */
1035 tlp_start(ifp);
1036
1037 return (handled);
1038 }
1039
1040 /*
1041 * tlp_rxintr:
1042 *
1043 * Helper; handle receive interrupts.
1044 */
1045 void
1046 tlp_rxintr(sc)
1047 struct tulip_softc *sc;
1048 {
1049 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1050 struct ether_header *eh;
1051 struct tulip_rxsoft *rxs;
1052 struct mbuf *m;
1053 u_int32_t rxstat;
1054 int i, len;
1055
1056 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) {
1057 rxs = &sc->sc_rxsoft[i];
1058
1059 TULIP_CDRXSYNC(sc, i,
1060 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1061
1062 rxstat = le32toh(sc->sc_rxdescs[i].td_status);
1063
1064 if (rxstat & TDSTAT_OWN) {
1065 /*
1066 * We have processed all of the receive buffers.
1067 */
1068 break;
1069 }
1070
1071 /*
1072 * Make sure the packet fit in one buffer. This should
1073 * always be the case. But the Lite-On PNIC, rev 33
1074 * has an awful receive engine bug, which may require
1075 * a very icky work-around.
1076 */
1077 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) !=
1078 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) {
1079 printf("%s: incoming packet spilled, resetting\n",
1080 sc->sc_dev.dv_xname);
1081 (void) tlp_init(sc);
1082 return;
1083 }
1084
1085 /*
1086 * If any collisions were seen on the wire, count one.
1087 */
1088 if (rxstat & TDSTAT_Rx_CS)
1089 ifp->if_collisions++;
1090
1091 /*
1092 * If an error occured, update stats, clear the status
1093 * word, and leave the packet buffer in place. It will
1094 * simply be reused the next time the ring comes around.
1095 */
1096 if (rxstat & TDSTAT_ES) {
1097 #define PRINTERR(bit, str) \
1098 if (rxstat & (bit)) \
1099 printf("%s: receive error: %s\n", \
1100 sc->sc_dev.dv_xname, str)
1101 ifp->if_ierrors++;
1102 PRINTERR(TDSTAT_Rx_DE, "descriptor error");
1103 PRINTERR(TDSTAT_Rx_RF, "runt frame");
1104 PRINTERR(TDSTAT_Rx_TL, "frame too long");
1105 PRINTERR(TDSTAT_Rx_RE, "MII error");
1106 PRINTERR(TDSTAT_Rx_DB, "dribbling bit");
1107 PRINTERR(TDSTAT_Rx_CE, "CRC error");
1108 #undef PRINTERR
1109 TULIP_INIT_RXDESC(sc, i);
1110 continue;
1111 }
1112
1113 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1114 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1115
1116 /*
1117 * No errors; receive the packet. Note the Tulip
1118 * includes the CRC with every packet; trim it.
1119 */
1120 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN;
1121
1122 #ifdef __NO_STRICT_ALIGNMENT
1123 /*
1124 * Allocate a new mbuf cluster. If that fails, we are
1125 * out of memory, and must drop the packet and recycle
1126 * the buffer that's already attached to this descriptor.
1127 */
1128 m = rxs->rxs_mbuf;
1129 if (tlp_add_rxbuf(sc, i) != 0) {
1130 ifp->if_ierrors++;
1131 TULIP_INIT_RXDESC(sc, i);
1132 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1133 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1134 continue;
1135 }
1136 #else
1137 /*
1138 * The Tulip's receive buffers must be 4-byte aligned.
1139 * But this means that the data after the Ethernet header
1140 * is misaligned. We must allocate a new buffer and
1141 * copy the data, shifted forward 2 bytes.
1142 */
1143 MGETHDR(m, M_DONTWAIT, MT_DATA);
1144 if (m == NULL) {
1145 dropit:
1146 ifp->if_ierrors++;
1147 TULIP_INIT_RXDESC(sc, i);
1148 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1149 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1150 continue;
1151 }
1152 if (len > (MHLEN - 2)) {
1153 MCLGET(m, M_DONTWAIT);
1154 if ((m->m_flags & M_EXT) == 0) {
1155 m_freem(m);
1156 goto dropit;
1157 }
1158 }
1159 m->m_data += 2;
1160
1161 /*
1162 * Note that we use clusters for incoming frames, so the
1163 * buffer is virtually contiguous.
1164 */
1165 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len);
1166
1167 /* Allow the receive descriptor to continue using its mbuf. */
1168 TULIP_INIT_RXDESC(sc, i);
1169 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1170 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1171 #endif /* __NO_STRICT_ALIGNMENT */
1172
1173 ifp->if_ipackets++;
1174 eh = mtod(m, struct ether_header *);
1175 m->m_pkthdr.rcvif = ifp;
1176 m->m_pkthdr.len = m->m_len = len;
1177
1178 #if NBPFILTER > 0
1179 /*
1180 * Pass this up to any BPF listeners, but only
1181 * pass it up the stack if its for us.
1182 */
1183 if (ifp->if_bpf)
1184 bpf_mtap(ifp->if_bpf, m);
1185 #endif /* NPBFILTER > 0 */
1186
1187 /*
1188 * This test is outside the NBPFILTER block because
1189 * on the 21140 we have to use Hash-Only mode due to
1190 * a bug in the filter logic.
1191 */
1192 if ((ifp->if_flags & IFF_PROMISC) != 0 ||
1193 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) {
1194 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost,
1195 ETHER_ADDR_LEN) != 0 &&
1196 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) {
1197 m_freem(m);
1198 continue;
1199 }
1200 }
1201
1202 /* Pass it on. */
1203 (*ifp->if_input)(ifp, m);
1204 }
1205
1206 /* Update the recieve pointer. */
1207 sc->sc_rxptr = i;
1208 }
1209
1210 /*
1211 * tlp_txintr:
1212 *
1213 * Helper; handle transmit interrupts.
1214 */
1215 void
1216 tlp_txintr(sc)
1217 struct tulip_softc *sc;
1218 {
1219 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1220 struct tulip_txsoft *txs;
1221 u_int32_t txstat;
1222
1223 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n",
1224 sc->sc_dev.dv_xname, sc->sc_flags));
1225
1226 ifp->if_flags &= ~IFF_OACTIVE;
1227
1228 /*
1229 * If we were doing a filter setup, check to see if it completed.
1230 */
1231 if (sc->sc_flags & TULIPF_DOING_SETUP) {
1232 TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1233 if ((sc->sc_setup_desc.td_status & htole32(TDSTAT_OWN)) == 0)
1234 sc->sc_flags &= ~TULIPF_DOING_SETUP;
1235 }
1236
1237 /*
1238 * Go through our Tx list and free mbufs for those
1239 * frames that have been transmitted.
1240 */
1241 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
1242 TULIP_CDTXSYNC(sc, txs->txs_lastdesc,
1243 txs->txs_dmamap->dm_nsegs,
1244 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1245
1246 #ifdef TLP_DEBUG
1247 if (ifp->if_flags & IFF_DEBUG) {
1248 int i;
1249 printf(" txsoft %p trainsmit chain:\n", txs);
1250 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) {
1251 printf(" descriptor %d:\n", i);
1252 printf(" td_status: 0x%08x\n",
1253 le32toh(sc->sc_txdescs[i].td_status));
1254 printf(" td_ctl: 0x%08x\n",
1255 le32toh(sc->sc_txdescs[i].td_ctl));
1256 printf(" td_bufaddr1: 0x%08x\n",
1257 le32toh(sc->sc_txdescs[i].td_bufaddr1));
1258 printf(" td_bufaddr2: 0x%08x\n",
1259 le32toh(sc->sc_txdescs[i].td_bufaddr2));
1260 if (i == txs->txs_lastdesc)
1261 break;
1262 }
1263 }
1264 #endif
1265
1266 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status);
1267 if (txstat & TDSTAT_OWN)
1268 break;
1269
1270 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
1271
1272 sc->sc_txfree += txs->txs_dmamap->dm_nsegs;
1273
1274 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap,
1275 0, txs->txs_dmamap->dm_mapsize,
1276 BUS_DMASYNC_POSTWRITE);
1277 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
1278 m_freem(txs->txs_mbuf);
1279 txs->txs_mbuf = NULL;
1280
1281 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1282
1283 /*
1284 * Check for errors and collisions.
1285 */
1286 #ifdef TLP_STATS
1287 if (txstat & TDSTAT_Tx_UF)
1288 sc->sc_stats.ts_tx_uf++;
1289 if (txstat & TDSTAT_Tx_TO)
1290 sc->sc_stats.ts_tx_to++;
1291 if (txstat & TDSTAT_Tx_EC)
1292 sc->sc_stats.ts_tx_ec++;
1293 if (txstat & TDSTAT_Tx_LC)
1294 sc->sc_stats.ts_tx_lc++;
1295 #endif
1296
1297 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO))
1298 ifp->if_oerrors++;
1299
1300 if (txstat & TDSTAT_Tx_EC)
1301 ifp->if_collisions += 16;
1302 else
1303 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat);
1304 if (txstat & TDSTAT_Tx_LC)
1305 ifp->if_collisions++;
1306
1307 ifp->if_opackets++;
1308 }
1309
1310 /*
1311 * If there are no more pending transmissions, cancel the watchdog
1312 * timer.
1313 */
1314 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0)
1315 ifp->if_timer = 0;
1316
1317 /*
1318 * If we have a receive filter setup pending, do it now.
1319 */
1320 if (sc->sc_flags & TULIPF_WANT_SETUP)
1321 (*sc->sc_filter_setup)(sc);
1322 }
1323
1324 #ifdef TLP_STATS
1325 void
1326 tlp_print_stats(sc)
1327 struct tulip_softc *sc;
1328 {
1329
1330 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n",
1331 sc->sc_dev.dv_xname,
1332 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to,
1333 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc);
1334 }
1335 #endif
1336
1337 /*
1338 * tlp_reset:
1339 *
1340 * Perform a soft reset on the Tulip.
1341 */
1342 void
1343 tlp_reset(sc)
1344 struct tulip_softc *sc;
1345 {
1346 int i;
1347
1348 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR);
1349
1350 for (i = 0; i < 1000; i++) {
1351 /*
1352 * Wait at least 50 PCI cycles for the reset to
1353 * complete before peeking at the Tulip again.
1354 * 10 uSec is a bit longer than 50 PCI cycles
1355 * (at 33MHz), but it doesn't hurt have the extra
1356 * wait.
1357 */
1358 delay(10);
1359 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0)
1360 break;
1361 }
1362
1363 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR))
1364 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname);
1365
1366 delay(1000);
1367
1368 /*
1369 * If the board has any GPIO reset sequences to issue, do them now.
1370 */
1371 if (sc->sc_reset != NULL)
1372 (*sc->sc_reset)(sc);
1373 }
1374
1375 /*
1376 * tlp_init:
1377 *
1378 * Initialize the interface. Must be called at splnet().
1379 */
1380 int
1381 tlp_init(sc)
1382 struct tulip_softc *sc;
1383 {
1384 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1385 struct tulip_txsoft *txs;
1386 struct tulip_rxsoft *rxs;
1387 int i, error = 0;
1388
1389 /*
1390 * Cancel any pending I/O.
1391 */
1392 tlp_stop(sc, 0);
1393
1394 /*
1395 * Initialize `opmode' to 0, and call the pre-init routine, if
1396 * any. This is required because the 2114x and some of the
1397 * clones require that the media-related bits in `opmode' be
1398 * set before performing a soft-reset in order to get internal
1399 * chip pathways are correct. Yay!
1400 */
1401 sc->sc_opmode = 0;
1402 if (sc->sc_preinit != NULL)
1403 (*sc->sc_preinit)(sc);
1404
1405 /*
1406 * Reset the Tulip to a known state.
1407 */
1408 tlp_reset(sc);
1409
1410 /*
1411 * Initialize the BUSMODE register.
1412 */
1413 sc->sc_busmode = BUSMODE_BAR;
1414 switch (sc->sc_chip) {
1415 case TULIP_CHIP_21140:
1416 case TULIP_CHIP_21140A:
1417 case TULIP_CHIP_21142:
1418 case TULIP_CHIP_21143:
1419 case TULIP_CHIP_82C115:
1420 case TULIP_CHIP_MX98725:
1421 /*
1422 * If we're allowed to do so, use Memory Read Line
1423 * and Memory Read Multiple.
1424 *
1425 * XXX Should we use Memory Write and Invalidate?
1426 */
1427 if (sc->sc_flags & TULIPF_MRL)
1428 sc->sc_busmode |= BUSMODE_RLE;
1429 if (sc->sc_flags & TULIPF_MRM)
1430 sc->sc_busmode |= BUSMODE_RME;
1431 #if 0
1432 if (sc->sc_flags & TULIPF_MWI)
1433 sc->sc_busmode |= BUSMODE_WLE;
1434 #endif
1435
1436 default:
1437 /* Nothing. */
1438 }
1439 switch (sc->sc_cacheline) {
1440 default:
1441 /*
1442 * Note: We must *always* set these bits; a cache
1443 * alignment of 0 is RESERVED.
1444 */
1445 case 8:
1446 sc->sc_busmode |= BUSMODE_CAL_8LW;
1447 break;
1448 case 16:
1449 sc->sc_busmode |= BUSMODE_CAL_16LW;
1450 break;
1451 case 32:
1452 sc->sc_busmode |= BUSMODE_CAL_32LW;
1453 break;
1454 }
1455 switch (sc->sc_chip) {
1456 case TULIP_CHIP_82C168:
1457 case TULIP_CHIP_82C169:
1458 sc->sc_busmode |= BUSMODE_PBL_16LW | BUSMODE_PNIC_MBO;
1459 break;
1460 default:
1461 sc->sc_busmode |= BUSMODE_PBL_DEFAULT;
1462 break;
1463 }
1464 #if BYTE_ORDER == BIG_ENDIAN
1465 /*
1466 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips
1467 * support them, and even on ones that do, it doesn't
1468 * always work.
1469 */
1470 #endif
1471 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode);
1472
1473 /*
1474 * Initialize the OPMODE register. We don't write it until
1475 * we're ready to begin the transmit and receive processes.
1476 *
1477 * Media-related OPMODE bits are set in the media callbacks
1478 * for each specific chip/board.
1479 */
1480 sc->sc_opmode |= OPMODE_SR | OPMODE_ST |
1481 sc->sc_txth[sc->sc_txthresh].txth_opmode;
1482
1483 /*
1484 * Magical mystery initialization on the Macronix chips.
1485 * The MX98713 uses its own magic value, the rest share
1486 * a common one.
1487 */
1488 switch (sc->sc_chip) {
1489 case TULIP_CHIP_MX98713:
1490 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713);
1491 break;
1492
1493 case TULIP_CHIP_MX98713A:
1494 case TULIP_CHIP_MX98715:
1495 case TULIP_CHIP_MX98715A:
1496 case TULIP_CHIP_MX98725:
1497 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715);
1498 break;
1499
1500 default:
1501 /* Nothing. */
1502 }
1503
1504 /*
1505 * Initialize the transmit descriptor ring.
1506 */
1507 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
1508 for (i = 0; i < TULIP_NTXDESC; i++) {
1509 sc->sc_txdescs[i].td_ctl = htole32(TDCTL_CH);
1510 sc->sc_txdescs[i].td_bufaddr2 =
1511 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)));
1512 }
1513 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC,
1514 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1515 sc->sc_txfree = TULIP_NTXDESC;
1516 sc->sc_txnext = 0;
1517
1518 /*
1519 * Initialize the transmit job descriptors.
1520 */
1521 SIMPLEQ_INIT(&sc->sc_txfreeq);
1522 SIMPLEQ_INIT(&sc->sc_txdirtyq);
1523 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
1524 txs = &sc->sc_txsoft[i];
1525 txs->txs_mbuf = NULL;
1526 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1527 }
1528
1529 /*
1530 * Initialize the receive descriptor and receive job
1531 * descriptor rings.
1532 */
1533 for (i = 0; i < TULIP_NRXDESC; i++) {
1534 rxs = &sc->sc_rxsoft[i];
1535 if (rxs->rxs_mbuf == NULL) {
1536 if ((error = tlp_add_rxbuf(sc, i)) != 0) {
1537 printf("%s: unable to allocate or map rx "
1538 "buffer %d, error = %d\n",
1539 sc->sc_dev.dv_xname, i, error);
1540 /*
1541 * XXX Should attempt to run with fewer receive
1542 * XXX buffers instead of just failing.
1543 */
1544 tlp_rxdrain(sc);
1545 goto out;
1546 }
1547 }
1548 }
1549 sc->sc_rxptr = 0;
1550
1551 /*
1552 * Initialize the interrupt mask and enable interrupts.
1553 */
1554 /* normal interrupts */
1555 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS;
1556
1557 /* abnormal interrupts */
1558 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF |
1559 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS;
1560
1561 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT;
1562 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT;
1563
1564 switch (sc->sc_chip) {
1565 case TULIP_CHIP_WB89C840F:
1566 /*
1567 * Clear bits that we don't want that happen to
1568 * overlap or don't exist.
1569 */
1570 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT);
1571 break;
1572
1573 default:
1574 /* Nothing. */
1575 }
1576
1577 sc->sc_rxint_mask &= sc->sc_inten;
1578 sc->sc_txint_mask &= sc->sc_inten;
1579
1580 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten);
1581 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff);
1582
1583 /*
1584 * Give the transmit and receive rings to the Tulip.
1585 */
1586 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext));
1587 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr));
1588
1589 /*
1590 * On chips that do this differently, set the station address.
1591 */
1592 switch (sc->sc_chip) {
1593 case TULIP_CHIP_WB89C840F:
1594 {
1595 /* XXX Do this with stream writes? */
1596 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0);
1597
1598 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1599 bus_space_write_1(sc->sc_st, sc->sc_sh,
1600 cpa + i, LLADDR(ifp->if_sadl)[i]);
1601 }
1602 break;
1603 }
1604
1605 case TULIP_CHIP_AL981:
1606 {
1607 u_int32_t reg;
1608 u_int8_t *enaddr = LLADDR(ifp->if_sadl);
1609
1610 reg = enaddr[0] |
1611 (enaddr[1] << 8) |
1612 (enaddr[2] << 16) |
1613 (enaddr[3] << 24);
1614 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg);
1615
1616 reg = enaddr[4] |
1617 (enaddr[5] << 8);
1618 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg);
1619 }
1620
1621 default:
1622 /* Nothing. */
1623 }
1624
1625 /*
1626 * Set the receive filter. This will start the transmit and
1627 * receive processes.
1628 */
1629 (*sc->sc_filter_setup)(sc);
1630
1631 /*
1632 * Set the current media.
1633 */
1634 (void) (*sc->sc_mediasw->tmsw_set)(sc);
1635
1636 /*
1637 * Start the receive process.
1638 */
1639 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
1640
1641 if (sc->sc_tick != NULL) {
1642 /* Start the one second clock. */
1643 timeout(sc->sc_tick, sc, hz);
1644 }
1645
1646 /*
1647 * Note that the interface is now running.
1648 */
1649 ifp->if_flags |= IFF_RUNNING;
1650 ifp->if_flags &= ~IFF_OACTIVE;
1651
1652 out:
1653 if (error)
1654 printf("%s: interface not running\n", sc->sc_dev.dv_xname);
1655 return (error);
1656 }
1657
1658 /*
1659 * tlp_rxdrain:
1660 *
1661 * Drain the receive queue.
1662 */
1663 void
1664 tlp_rxdrain(sc)
1665 struct tulip_softc *sc;
1666 {
1667 struct tulip_rxsoft *rxs;
1668 int i;
1669
1670 for (i = 0; i < TULIP_NRXDESC; i++) {
1671 rxs = &sc->sc_rxsoft[i];
1672 if (rxs->rxs_mbuf != NULL) {
1673 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
1674 m_freem(rxs->rxs_mbuf);
1675 rxs->rxs_mbuf = NULL;
1676 }
1677 }
1678 }
1679
1680 /*
1681 * tlp_stop:
1682 *
1683 * Stop transmission on the interface.
1684 */
1685 void
1686 tlp_stop(sc, drain)
1687 struct tulip_softc *sc;
1688 int drain;
1689 {
1690 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1691 struct tulip_txsoft *txs;
1692
1693 if (sc->sc_tick != NULL) {
1694 /* Stop the one second clock. */
1695 untimeout(sc->sc_tick, sc);
1696 }
1697
1698 if (sc->sc_flags & TULIPF_HAS_MII) {
1699 /* Down the MII. */
1700 mii_down(&sc->sc_mii);
1701 }
1702
1703 /* Disable interrupts. */
1704 TULIP_WRITE(sc, CSR_INTEN, 0);
1705
1706 /* Stop the transmit and receive processes. */
1707 TULIP_WRITE(sc, CSR_OPMODE, 0);
1708 TULIP_WRITE(sc, CSR_RXLIST, 0);
1709 TULIP_WRITE(sc, CSR_TXLIST, 0);
1710
1711 /*
1712 * Release any queued transmit buffers.
1713 */
1714 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
1715 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
1716 if (txs->txs_mbuf != NULL) {
1717 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
1718 m_freem(txs->txs_mbuf);
1719 txs->txs_mbuf = NULL;
1720 }
1721 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1722 }
1723
1724 if (drain) {
1725 /*
1726 * Release the receive buffers.
1727 */
1728 tlp_rxdrain(sc);
1729 }
1730
1731 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP);
1732
1733 /*
1734 * Mark the interface down and cancel the watchdog timer.
1735 */
1736 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1737 ifp->if_timer = 0;
1738 }
1739
1740 #define SROM_EMIT(sc, x) \
1741 do { \
1742 TULIP_WRITE((sc), CSR_MIIROM, (x)); \
1743 delay(1); \
1744 } while (0)
1745
1746 /*
1747 * tlp_srom_idle:
1748 *
1749 * Put the SROM in idle state.
1750 */
1751 void
1752 tlp_srom_idle(sc)
1753 struct tulip_softc *sc;
1754 {
1755 u_int32_t miirom;
1756 int i;
1757
1758 miirom = MIIROM_SR;
1759 SROM_EMIT(sc, miirom);
1760
1761 miirom |= MIIROM_RD;
1762 SROM_EMIT(sc, miirom);
1763
1764 miirom |= MIIROM_SROMCS;
1765 SROM_EMIT(sc, miirom);
1766
1767 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
1768
1769 /* Strobe the clock 25 times. */
1770 for (i = 0; i < 25; i++) {
1771 SROM_EMIT(sc, miirom);
1772 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
1773 }
1774
1775 SROM_EMIT(sc, miirom);
1776
1777 miirom &= ~MIIROM_SROMCS;
1778 SROM_EMIT(sc, miirom);
1779
1780 SROM_EMIT(sc, 0);
1781 }
1782
1783 /*
1784 * tlp_read_srom:
1785 *
1786 * Read the Tulip SROM.
1787 */
1788 void
1789 tlp_read_srom(sc, word, wordcnt, data)
1790 struct tulip_softc *sc;
1791 int word, wordcnt;
1792 u_int8_t *data;
1793 {
1794 u_int32_t miirom;
1795 u_int16_t datain;
1796 int i, x;
1797
1798 tlp_srom_idle(sc);
1799
1800 /* Select the SROM. */
1801 miirom = MIIROM_SR;
1802 SROM_EMIT(sc, miirom);
1803
1804 miirom |= MIIROM_RD;
1805 SROM_EMIT(sc, miirom);
1806
1807 for (i = 0; i < wordcnt; i++) {
1808 /* Send CHIP SELECT for one clock tick. */
1809 miirom |= MIIROM_SROMCS;
1810 SROM_EMIT(sc, miirom);
1811
1812 /* Shift in the READ opcode. */
1813 for (x = 3; x > 0; x--) {
1814 if (TULIP_SROM_OPC_READ & (1 << (x - 1)))
1815 miirom |= MIIROM_SROMDI;
1816 else
1817 miirom &= ~MIIROM_SROMDI;
1818 SROM_EMIT(sc, miirom);
1819 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
1820 SROM_EMIT(sc, miirom);
1821 }
1822
1823 /* Shift in address. */
1824 for (x = sc->sc_srom_addrbits; x > 0; x--) {
1825 if ((word + i) & (1 << (x - 1)))
1826 miirom |= MIIROM_SROMDI;
1827 else
1828 miirom &= ~MIIROM_SROMDI;
1829 SROM_EMIT(sc, miirom);
1830 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
1831 SROM_EMIT(sc, miirom);
1832 }
1833
1834 /* Shift out data. */
1835 miirom &= ~MIIROM_SROMDI;
1836 datain = 0;
1837 for (x = 16; x > 0; x--) {
1838 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
1839 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO))
1840 datain |= (1 << (x - 1));
1841 SROM_EMIT(sc, miirom);
1842 }
1843 data[2 * i] = datain & 0xff;
1844 data[(2 * i) + 1] = datain >> 8;
1845
1846 /* Clear CHIP SELECT. */
1847 miirom &= ~MIIROM_SROMCS;
1848 SROM_EMIT(sc, miirom);
1849 }
1850
1851 /* Deselect the SROM. */
1852 SROM_EMIT(sc, 0);
1853
1854 /* ...and idle it. */
1855 tlp_srom_idle(sc);
1856 }
1857
1858 #undef SROM_EMIT
1859
1860 /*
1861 * tlp_add_rxbuf:
1862 *
1863 * Add a receive buffer to the indicated descriptor.
1864 */
1865 int
1866 tlp_add_rxbuf(sc, idx)
1867 struct tulip_softc *sc;
1868 int idx;
1869 {
1870 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx];
1871 struct mbuf *m;
1872 int error;
1873
1874 MGETHDR(m, M_DONTWAIT, MT_DATA);
1875 if (m == NULL)
1876 return (ENOBUFS);
1877
1878 MCLGET(m, M_DONTWAIT);
1879 if ((m->m_flags & M_EXT) == 0) {
1880 m_freem(m);
1881 return (ENOBUFS);
1882 }
1883
1884 if (rxs->rxs_mbuf != NULL)
1885 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
1886
1887 rxs->rxs_mbuf = m;
1888
1889 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap,
1890 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT);
1891 if (error) {
1892 printf("%s: can't load rx DMA map %d, error = %d\n",
1893 sc->sc_dev.dv_xname, idx, error);
1894 panic("tlp_add_rxbuf"); /* XXX */
1895 }
1896
1897 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1898 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1899
1900 TULIP_INIT_RXDESC(sc, idx);
1901
1902 return (0);
1903 }
1904
1905 /*
1906 * tlp_crc32:
1907 *
1908 * Compute the 32-bit CRC of the provided buffer.
1909 */
1910 u_int32_t
1911 tlp_crc32(buf, len)
1912 const u_int8_t *buf;
1913 size_t len;
1914 {
1915 static const u_int32_t crctab[] = {
1916 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac,
1917 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c,
1918 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c,
1919 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c
1920 };
1921 u_int32_t crc;
1922 int i;
1923
1924 crc = 0xffffffff;
1925 for (i = 0; i < len; i++) {
1926 crc ^= buf[i];
1927 crc = (crc >> 4) ^ crctab[crc & 0xf];
1928 crc = (crc >> 4) ^ crctab[crc & 0xf];
1929 }
1930 return (crc);
1931 }
1932
1933 /*
1934 * tlp_srom_crcok:
1935 *
1936 * Check the CRC of the Tulip SROM.
1937 */
1938 int
1939 tlp_srom_crcok(romdata)
1940 const u_int8_t *romdata;
1941 {
1942 u_int32_t crc;
1943
1944 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM);
1945 crc = (crc & 0xffff) ^ 0xffff;
1946 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM))
1947 return (1);
1948
1949 /*
1950 * Try an alternate checksum.
1951 */
1952 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM1);
1953 crc = (crc & 0xffff) ^ 0xffff;
1954 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1))
1955 return (1);
1956
1957 return (0);
1958 }
1959
1960 /*
1961 * tlp_isv_srom:
1962 *
1963 * Check to see if the SROM is in the new standardized format.
1964 */
1965 int
1966 tlp_isv_srom(romdata)
1967 const u_int8_t *romdata;
1968 {
1969 int i;
1970 u_int16_t cksum;
1971
1972 if (tlp_srom_crcok(romdata)) {
1973 /*
1974 * SROM CRC checks out; must be in the new format.
1975 */
1976 return (1);
1977 }
1978
1979 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM);
1980 if (cksum == 0xffff || cksum == 0) {
1981 /*
1982 * No checksum present. Check the SROM ID; 18 bytes of 0
1983 * followed by 1 (version) followed by the number of
1984 * adapters which use this SROM (should be non-zero).
1985 */
1986 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) {
1987 if (romdata[i] != 0)
1988 return (0);
1989 }
1990 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1)
1991 return (0);
1992 if (romdata[TULIP_ROM_CHIP_COUNT] == 0)
1993 return (0);
1994 return (1);
1995 }
1996
1997 return (0);
1998 }
1999
2000 /*
2001 * tlp_isv_srom_enaddr:
2002 *
2003 * Get the Ethernet address from an ISV SROM.
2004 */
2005 int
2006 tlp_isv_srom_enaddr(sc, enaddr)
2007 struct tulip_softc *sc;
2008 u_int8_t *enaddr;
2009 {
2010 int i, devcnt;
2011
2012 if (tlp_isv_srom(sc->sc_srom) == 0)
2013 return (0);
2014
2015 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
2016 for (i = 0; i < devcnt; i++) {
2017 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
2018 break;
2019 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
2020 sc->sc_devno)
2021 break;
2022 }
2023
2024 if (i == devcnt)
2025 return (0);
2026
2027 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS],
2028 ETHER_ADDR_LEN);
2029 enaddr[5] += i;
2030
2031 return (1);
2032 }
2033
2034 /*
2035 * tlp_parse_old_srom:
2036 *
2037 * Parse old-format SROMs.
2038 *
2039 * This routine is largely lifted from Matt Thomas's `de' driver.
2040 */
2041 int
2042 tlp_parse_old_srom(sc, enaddr)
2043 struct tulip_softc *sc;
2044 u_int8_t *enaddr;
2045 {
2046 static const u_int8_t testpat[] =
2047 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa };
2048 int i;
2049 u_int32_t cksum;
2050
2051 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) {
2052 /*
2053 * Some vendors (e.g. ZNYX) don't use the standard
2054 * DEC Address ROM format, but rather just have an
2055 * Ethernet address in the first 6 bytes, maybe a
2056 * 2 byte checksum, and then all 0xff's.
2057 *
2058 * On the other hand, Cobalt Networks interfaces
2059 * simply have the address in the first six bytes
2060 * with the rest zeroed out.
2061 */
2062 for (i = 8; i < 32; i++) {
2063 if (sc->sc_srom[i] != 0xff &&
2064 sc->sc_srom[i] != 0)
2065 return (0);
2066 }
2067
2068 /*
2069 * Sanity check the Ethernet address:
2070 *
2071 * - Make sure it's not multicast or locally
2072 * assigned
2073 * - Make sure it has a non-0 OUI
2074 */
2075 if (sc->sc_srom[0] & 3)
2076 return (0);
2077 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 &&
2078 sc->sc_srom[2] == 0)
2079 return (0);
2080
2081 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
2082 return (1);
2083 }
2084
2085 /*
2086 * Standard DEC Address ROM test.
2087 */
2088
2089 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0)
2090 return (0);
2091
2092 for (i = 0; i < 8; i++) {
2093 if (sc->sc_srom[i] != sc->sc_srom[15 - i])
2094 return (0);
2095 }
2096
2097 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
2098
2099 cksum = *(u_int16_t *) &enaddr[0];
2100
2101 cksum <<= 1;
2102 if (cksum > 0xffff)
2103 cksum -= 0xffff;
2104
2105 cksum += *(u_int16_t *) &enaddr[2];
2106 if (cksum > 0xffff)
2107 cksum -= 0xffff;
2108
2109 cksum <<= 1;
2110 if (cksum > 0xffff)
2111 cksum -= 0xffff;
2112
2113 cksum += *(u_int16_t *) &enaddr[4];
2114 if (cksum >= 0xffff)
2115 cksum -= 0xffff;
2116
2117 if (cksum != *(u_int16_t *) &sc->sc_srom[6])
2118 return (0);
2119
2120 return (1);
2121 }
2122
2123 /*
2124 * tlp_filter_setup:
2125 *
2126 * Set the Tulip's receive filter.
2127 */
2128 void
2129 tlp_filter_setup(sc)
2130 struct tulip_softc *sc;
2131 {
2132 struct ethercom *ec = &sc->sc_ethercom;
2133 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2134 struct ether_multi *enm;
2135 struct ether_multistep step;
2136 __volatile u_int32_t *sp;
2137 u_int8_t enaddr[ETHER_ADDR_LEN];
2138 u_int32_t hash, hashsize;
2139 int cnt;
2140
2141 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n",
2142 sc->sc_dev.dv_xname, sc->sc_flags));
2143
2144 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN);
2145
2146 /*
2147 * If there are transmissions pending, wait until they have
2148 * completed.
2149 */
2150 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL ||
2151 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) {
2152 sc->sc_flags |= TULIPF_WANT_SETUP;
2153 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n",
2154 sc->sc_dev.dv_xname));
2155 return;
2156 }
2157 sc->sc_flags &= ~TULIPF_WANT_SETUP;
2158
2159 switch (sc->sc_chip) {
2160 case TULIP_CHIP_82C115:
2161 hashsize = TULIP_PNICII_HASHSIZE;
2162 break;
2163
2164 default:
2165 hashsize = TULIP_MCHASHSIZE;
2166 }
2167
2168 /*
2169 * If we're running, idle the transmit and receive engines. If
2170 * we're NOT running, we're being called from tlp_init(), and our
2171 * writing OPMODE will start the transmit and receive processes
2172 * in motion.
2173 */
2174 if (ifp->if_flags & IFF_RUNNING) {
2175 /*
2176 * Actually, some chips seem to need a really hard
2177 * kick in the head for this to work. The genuine
2178 * DEC chips can just be idled, but some of the
2179 * clones seem to REALLY want a reset here. Doing
2180 * the reset will end up here again, but with
2181 * IFF_RUNNING cleared.
2182 */
2183 switch (sc->sc_chip) {
2184 case TULIP_CHIP_82C168:
2185 case TULIP_CHIP_82C169:
2186 tlp_init(sc);
2187 return;
2188
2189 default:
2190 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2191 }
2192 }
2193
2194 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
2195
2196 if (ifp->if_flags & IFF_PROMISC) {
2197 sc->sc_opmode |= OPMODE_PR;
2198 goto allmulti;
2199 }
2200
2201 /*
2202 * Try Perfect filtering first.
2203 */
2204
2205 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
2206 sp = TULIP_CDSP(sc);
2207 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2208 cnt = 0;
2209 ETHER_FIRST_MULTI(step, ec, enm);
2210 while (enm != NULL) {
2211 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2212 /*
2213 * We must listen to a range of multicast addresses.
2214 * For now, just accept all multicasts, rather than
2215 * trying to set only those filter bits needed to match
2216 * the range. (At this time, the only use of address
2217 * ranges is for IP multicast routing, for which the
2218 * range is big enough to require all bits set.)
2219 */
2220 goto allmulti;
2221 }
2222 if (cnt == (TULIP_MAXADDRS - 2)) {
2223 /*
2224 * We already have our multicast limit (still need
2225 * our station address and broadcast). Go to
2226 * Hash-Perfect mode.
2227 */
2228 goto hashperfect;
2229 }
2230 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0);
2231 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1);
2232 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2);
2233 ETHER_NEXT_MULTI(step, enm);
2234 }
2235
2236 if (ifp->if_flags & IFF_BROADCAST) {
2237 /* ...and the broadcast address. */
2238 cnt++;
2239 *sp++ = TULIP_SP_FIELD_C(0xffff);
2240 *sp++ = TULIP_SP_FIELD_C(0xffff);
2241 *sp++ = TULIP_SP_FIELD_C(0xffff);
2242 }
2243
2244 /* Pad the rest with our station address. */
2245 for (; cnt < TULIP_MAXADDRS; cnt++) {
2246 *sp++ = TULIP_SP_FIELD(enaddr, 0);
2247 *sp++ = TULIP_SP_FIELD(enaddr, 1);
2248 *sp++ = TULIP_SP_FIELD(enaddr, 2);
2249 }
2250 ifp->if_flags &= ~IFF_ALLMULTI;
2251 goto setit;
2252
2253 hashperfect:
2254 /*
2255 * Try Hash-Perfect mode.
2256 */
2257
2258 /*
2259 * Some 21140 chips have broken Hash-Perfect modes. On these
2260 * chips, we simply use Hash-Only mode, and put our station
2261 * address into the filter.
2262 */
2263 if (sc->sc_chip == TULIP_CHIP_21140)
2264 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY;
2265 else
2266 sc->sc_filtmode = TDCTL_Tx_FT_HASH;
2267 sp = TULIP_CDSP(sc);
2268 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2269 ETHER_FIRST_MULTI(step, ec, enm);
2270 while (enm != NULL) {
2271 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2272 /*
2273 * We must listen to a range of multicast addresses.
2274 * For now, just accept all multicasts, rather than
2275 * trying to set only those filter bits needed to match
2276 * the range. (At this time, the only use of address
2277 * ranges is for IP multicast routing, for which the
2278 * range is big enough to require all bits set.)
2279 */
2280 goto allmulti;
2281 }
2282 hash = tlp_mchash(enm->enm_addrlo, hashsize);
2283 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2284 ETHER_NEXT_MULTI(step, enm);
2285 }
2286
2287 if (ifp->if_flags & IFF_BROADCAST) {
2288 /* ...and the broadcast address. */
2289 hash = tlp_mchash(etherbroadcastaddr, hashsize);
2290 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2291 }
2292
2293 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) {
2294 /* ...and our station address. */
2295 hash = tlp_mchash(enaddr, hashsize);
2296 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2297 } else {
2298 /*
2299 * Hash-Perfect mode; put our station address after
2300 * the hash table.
2301 */
2302 sp[39] = TULIP_SP_FIELD(enaddr, 0);
2303 sp[40] = TULIP_SP_FIELD(enaddr, 1);
2304 sp[41] = TULIP_SP_FIELD(enaddr, 2);
2305 }
2306 ifp->if_flags &= ~IFF_ALLMULTI;
2307 goto setit;
2308
2309 allmulti:
2310 /*
2311 * Use Perfect filter mode. First address is the broadcast address,
2312 * and pad the rest with our station address. We'll set Pass-all-
2313 * multicast in OPMODE below.
2314 */
2315 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
2316 sp = TULIP_CDSP(sc);
2317 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2318 cnt = 0;
2319 if (ifp->if_flags & IFF_BROADCAST) {
2320 cnt++;
2321 *sp++ = TULIP_SP_FIELD_C(0xffff);
2322 *sp++ = TULIP_SP_FIELD_C(0xffff);
2323 *sp++ = TULIP_SP_FIELD_C(0xffff);
2324 }
2325 for (; cnt < TULIP_MAXADDRS; cnt++) {
2326 *sp++ = TULIP_SP_FIELD(enaddr, 0);
2327 *sp++ = TULIP_SP_FIELD(enaddr, 1);
2328 *sp++ = TULIP_SP_FIELD(enaddr, 2);
2329 }
2330 ifp->if_flags |= IFF_ALLMULTI;
2331
2332 setit:
2333 if (ifp->if_flags & IFF_ALLMULTI)
2334 sc->sc_opmode |= OPMODE_PM;
2335
2336 /* Sync the setup packet buffer. */
2337 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE);
2338
2339 /*
2340 * Fill in the setup packet descriptor.
2341 */
2342 sc->sc_setup_desc.td_bufaddr1 = htole32(TULIP_CDSPADDR(sc));
2343 sc->sc_setup_desc.td_bufaddr2 =
2344 htole32(TULIP_CDTXADDR(sc, sc->sc_txnext));
2345 sc->sc_setup_desc.td_ctl =
2346 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) |
2347 sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS |
2348 TDCTL_Tx_IC | TDCTL_CH);
2349 sc->sc_setup_desc.td_status = htole32(TDSTAT_OWN);
2350 TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2351
2352 /*
2353 * Write the address of the setup descriptor. This also has
2354 * the side effect of giving the transmit ring to the chip,
2355 * since the setup descriptor points to the next available
2356 * descriptor in the ring.
2357 */
2358 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc));
2359
2360 /*
2361 * Set the OPMODE register. This will also resume the
2362 * transmit transmit process we idled above.
2363 */
2364 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2365
2366 sc->sc_flags |= TULIPF_DOING_SETUP;
2367
2368 /*
2369 * Kick the transmitter; this will cause the Tulip to
2370 * read the setup descriptor.
2371 */
2372 /* XXX USE AUTOPOLLING? */
2373 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
2374
2375 /* Set up a watchdog timer in case the chip flakes out. */
2376 ifp->if_timer = 5;
2377
2378 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname));
2379 }
2380
2381 /*
2382 * tlp_winb_filter_setup:
2383 *
2384 * Set the Winbond 89C840F's receive filter.
2385 */
2386 void
2387 tlp_winb_filter_setup(sc)
2388 struct tulip_softc *sc;
2389 {
2390 struct ethercom *ec = &sc->sc_ethercom;
2391 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2392 struct ether_multi *enm;
2393 struct ether_multistep step;
2394 u_int32_t hash, mchash[2];
2395
2396 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n",
2397 sc->sc_dev.dv_xname, sc->sc_flags));
2398
2399 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP);
2400
2401 if (ifp->if_flags & IFF_MULTICAST)
2402 sc->sc_opmode |= OPMODE_WINB_AMP;
2403
2404 if (ifp->if_flags & IFF_BROADCAST)
2405 sc->sc_opmode |= OPMODE_WINB_ABP;
2406
2407 if (ifp->if_flags & IFF_PROMISC) {
2408 sc->sc_opmode |= OPMODE_WINB_APP;
2409 goto allmulti;
2410 }
2411
2412 mchash[0] = mchash[1] = 0;
2413
2414 ETHER_FIRST_MULTI(step, ec, enm);
2415 while (enm != NULL) {
2416 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2417 /*
2418 * We must listen to a range of multicast addresses.
2419 * For now, just accept all multicasts, rather than
2420 * trying to set only those filter bits needed to match
2421 * the range. (At this time, the only use of address
2422 * ranges is for IP multicast routing, for which the
2423 * range is big enough to require all bits set.)
2424 */
2425 goto allmulti;
2426 }
2427
2428 /*
2429 * According to the FreeBSD `wb' driver, yes, you
2430 * really do invert the hash.
2431 */
2432 hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26))
2433 & 0x3f;
2434 mchash[hash >> 5] |= 1 << (hash & 0x1f);
2435 ETHER_NEXT_MULTI(step, enm);
2436 }
2437 ifp->if_flags &= ~IFF_ALLMULTI;
2438 goto setit;
2439
2440 allmulti:
2441 ifp->if_flags |= IFF_ALLMULTI;
2442 mchash[0] = mchash[1] = 0xffffffff;
2443
2444 setit:
2445 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]);
2446 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]);
2447 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2448 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n",
2449 sc->sc_dev.dv_xname));
2450 }
2451
2452 /*
2453 * tlp_al981_filter_setup:
2454 *
2455 * Set the ADMtek AL981's receive filter.
2456 */
2457 void
2458 tlp_al981_filter_setup(sc)
2459 struct tulip_softc *sc;
2460 {
2461 struct ethercom *ec = &sc->sc_ethercom;
2462 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2463 struct ether_multi *enm;
2464 struct ether_multistep step;
2465 u_int32_t hash, mchash[2];
2466
2467 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n",
2468 sc->sc_dev.dv_xname, sc->sc_flags));
2469
2470 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2471
2472 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
2473
2474 if (ifp->if_flags & IFF_PROMISC) {
2475 sc->sc_opmode |= OPMODE_PR;
2476 goto allmulti;
2477 }
2478
2479 mchash[0] = mchash[1] = 0;
2480
2481 ETHER_FIRST_MULTI(step, ec, enm);
2482 while (enm != NULL) {
2483 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2484 /*
2485 * We must listen to a range of multicast addresses.
2486 * For now, just accept all multicasts, rather than
2487 * trying to set only those filter bits needed to match
2488 * the range. (At this time, the only use of address
2489 * ranges is for IP multicast routing, for which the
2490 * range is big enough to require all bits set.)
2491 */
2492 goto allmulti;
2493 }
2494
2495 hash = (tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)
2496 & 0x3f;
2497 mchash[hash >> 5] |= 1 << (hash & 0x1f);
2498 ETHER_NEXT_MULTI(step, enm);
2499 }
2500 ifp->if_flags &= ~IFF_ALLMULTI;
2501 goto setit;
2502
2503 allmulti:
2504 ifp->if_flags |= IFF_ALLMULTI;
2505 mchash[0] = mchash[1] = 0xffffffff;
2506
2507 setit:
2508 TULIP_WRITE(sc, CSR_ADM_MAR0, mchash[0]);
2509 TULIP_WRITE(sc, CSR_ADM_MAR1, mchash[1]);
2510 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2511 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n",
2512 sc->sc_dev.dv_xname));
2513 }
2514
2515 /*
2516 * tlp_idle:
2517 *
2518 * Cause the transmit and/or receive processes to go idle.
2519 */
2520 void
2521 tlp_idle(sc, bits)
2522 struct tulip_softc *sc;
2523 u_int32_t bits;
2524 {
2525 static const char *tx_state_names[] = {
2526 "STOPPED",
2527 "RUNNING - FETCH",
2528 "RUNNING - WAIT",
2529 "RUNNING - READING",
2530 "-- RESERVED --",
2531 "RUNNING - SETUP",
2532 "SUSPENDED",
2533 "RUNNING - CLOSE",
2534 };
2535 static const char *rx_state_names[] = {
2536 "STOPPED",
2537 "RUNNING - FETCH",
2538 "RUNNING - CHECK",
2539 "RUNNING - WAIT",
2540 "SUSPENDED",
2541 "RUNNING - CLOSE",
2542 "RUNNING - FLUSH",
2543 "RUNNING - QUEUE",
2544 };
2545 u_int32_t csr, ackmask = 0;
2546 int i;
2547
2548 if (bits & OPMODE_ST)
2549 ackmask |= STATUS_TPS;
2550
2551 if (bits & OPMODE_SR)
2552 ackmask |= STATUS_RPS;
2553
2554 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits);
2555
2556 for (i = 0; i < 1000; i++) {
2557 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask)
2558 break;
2559 delay(10);
2560 }
2561
2562 csr = TULIP_READ(sc, CSR_STATUS);
2563 if ((csr & ackmask) != ackmask) {
2564 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 &&
2565 (csr & STATUS_TS) != STATUS_TS_STOPPED)
2566 printf("%s: transmit process failed to idle: "
2567 "state %s\n", sc->sc_dev.dv_xname,
2568 tx_state_names[(csr & STATUS_TS) >> 20]);
2569 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 &&
2570 (csr & STATUS_RS) != STATUS_RS_STOPPED)
2571 printf("%s: receive process failed to idle: "
2572 "state %s\n", sc->sc_dev.dv_xname,
2573 rx_state_names[(csr & STATUS_RS) >> 17]);
2574 }
2575 TULIP_WRITE(sc, CSR_STATUS, ackmask);
2576 }
2577
2578 /*****************************************************************************
2579 * Generic media support functions.
2580 *****************************************************************************/
2581
2582 /*
2583 * tlp_mediastatus: [ifmedia interface function]
2584 *
2585 * Query the current media.
2586 */
2587 void
2588 tlp_mediastatus(ifp, ifmr)
2589 struct ifnet *ifp;
2590 struct ifmediareq *ifmr;
2591 {
2592 struct tulip_softc *sc = ifp->if_softc;
2593
2594 (*sc->sc_mediasw->tmsw_get)(sc, ifmr);
2595 }
2596
2597 /*
2598 * tlp_mediachange: [ifmedia interface function]
2599 *
2600 * Update the current media.
2601 */
2602 int
2603 tlp_mediachange(ifp)
2604 struct ifnet *ifp;
2605 {
2606 struct tulip_softc *sc = ifp->if_softc;
2607
2608 return ((*sc->sc_mediasw->tmsw_set)(sc));
2609 }
2610
2611 /*****************************************************************************
2612 * Support functions for MII-attached media.
2613 *****************************************************************************/
2614
2615 /*
2616 * tlp_mii_tick:
2617 *
2618 * One second timer, used to tick the MII.
2619 */
2620 void
2621 tlp_mii_tick(arg)
2622 void *arg;
2623 {
2624 struct tulip_softc *sc = arg;
2625 int s;
2626
2627 s = splnet();
2628 mii_tick(&sc->sc_mii);
2629 splx(s);
2630
2631 timeout(sc->sc_tick, sc, hz);
2632 }
2633
2634 /*
2635 * tlp_mii_statchg: [mii interface function]
2636 *
2637 * Callback from PHY when media changes.
2638 */
2639 void
2640 tlp_mii_statchg(self)
2641 struct device *self;
2642 {
2643 struct tulip_softc *sc = (struct tulip_softc *)self;
2644
2645 /* Idle the transmit and receive processes. */
2646 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2647
2648 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD);
2649
2650 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T)
2651 sc->sc_opmode |= OPMODE_TTM;
2652 else
2653 sc->sc_opmode |= OPMODE_HBD;
2654
2655 if (sc->sc_mii.mii_media_active & IFM_FDX)
2656 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD;
2657
2658 /*
2659 * Write new OPMODE bits. This also restarts the transmit
2660 * and receive processes.
2661 */
2662 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2663
2664 /* XXX Update ifp->if_baudrate */
2665 }
2666
2667 /*
2668 * tlp_winb_mii_statchg: [mii interface function]
2669 *
2670 * Callback from PHY when media changes. This version is
2671 * for the Winbond 89C840F, which has different OPMODE bits.
2672 */
2673 void
2674 tlp_winb_mii_statchg(self)
2675 struct device *self;
2676 {
2677 struct tulip_softc *sc = (struct tulip_softc *)self;
2678
2679 /* Idle the transmit and receive processes. */
2680 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2681
2682 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD);
2683
2684 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX)
2685 sc->sc_opmode |= OPMODE_WINB_FES;
2686
2687 if (sc->sc_mii.mii_media_active & IFM_FDX)
2688 sc->sc_opmode |= OPMODE_FD;
2689
2690 /*
2691 * Write new OPMODE bits. This also restarts the transmit
2692 * and receive processes.
2693 */
2694 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2695
2696 /* XXX Update ifp->if_baudrate */
2697 }
2698
2699 /*
2700 * tlp_mii_getmedia:
2701 *
2702 * Callback from ifmedia to request current media status.
2703 */
2704 void
2705 tlp_mii_getmedia(sc, ifmr)
2706 struct tulip_softc *sc;
2707 struct ifmediareq *ifmr;
2708 {
2709
2710 mii_pollstat(&sc->sc_mii);
2711 ifmr->ifm_status = sc->sc_mii.mii_media_status;
2712 ifmr->ifm_active = sc->sc_mii.mii_media_active;
2713 }
2714
2715 /*
2716 * tlp_mii_setmedia:
2717 *
2718 * Callback from ifmedia to request new media setting.
2719 */
2720 int
2721 tlp_mii_setmedia(sc)
2722 struct tulip_softc *sc;
2723 {
2724 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2725
2726 if (ifp->if_flags & IFF_UP)
2727 mii_mediachg(&sc->sc_mii);
2728 return (0);
2729 }
2730
2731 /*
2732 * tlp_bitbang_mii_readreg:
2733 *
2734 * Read a PHY register via bit-bang'ing the MII.
2735 */
2736 int
2737 tlp_bitbang_mii_readreg(self, phy, reg)
2738 struct device *self;
2739 int phy, reg;
2740 {
2741 struct tulip_softc *sc = (void *) self;
2742
2743 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg));
2744 }
2745
2746 /*
2747 * tlp_bitbang_mii_writereg:
2748 *
2749 * Write a PHY register via bit-bang'ing the MII.
2750 */
2751 void
2752 tlp_bitbang_mii_writereg(self, phy, reg, val)
2753 struct device *self;
2754 int phy, reg, val;
2755 {
2756 struct tulip_softc *sc = (void *) self;
2757
2758 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val);
2759 }
2760
2761 /*
2762 * tlp_sio_mii_bitbang_read:
2763 *
2764 * Read the MII serial port for the MII bit-bang module.
2765 */
2766 u_int32_t
2767 tlp_sio_mii_bitbang_read(self)
2768 struct device *self;
2769 {
2770 struct tulip_softc *sc = (void *) self;
2771
2772 return (TULIP_READ(sc, CSR_MIIROM));
2773 }
2774
2775 /*
2776 * tlp_sio_mii_bitbang_write:
2777 *
2778 * Write the MII serial port for the MII bit-bang module.
2779 */
2780 void
2781 tlp_sio_mii_bitbang_write(self, val)
2782 struct device *self;
2783 u_int32_t val;
2784 {
2785 struct tulip_softc *sc = (void *) self;
2786
2787 TULIP_WRITE(sc, CSR_MIIROM, val);
2788 }
2789
2790 /*
2791 * tlp_pnic_mii_readreg:
2792 *
2793 * Read a PHY register on the Lite-On PNIC.
2794 */
2795 int
2796 tlp_pnic_mii_readreg(self, phy, reg)
2797 struct device *self;
2798 int phy, reg;
2799 {
2800 struct tulip_softc *sc = (void *) self;
2801 u_int32_t val;
2802 int i;
2803
2804 TULIP_WRITE(sc, CSR_PNIC_MII,
2805 PNIC_MII_MBO | PNIC_MII_RESERVED |
2806 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) |
2807 (reg << PNIC_MII_REGSHIFT));
2808
2809 for (i = 0; i < 1000; i++) {
2810 delay(10);
2811 val = TULIP_READ(sc, CSR_PNIC_MII);
2812 if ((val & PNIC_MII_BUSY) == 0) {
2813 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA)
2814 return (0);
2815 else
2816 return (val & PNIC_MII_DATA);
2817 }
2818 }
2819 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname);
2820 return (0);
2821 }
2822
2823 /*
2824 * tlp_pnic_mii_writereg:
2825 *
2826 * Write a PHY register on the Lite-On PNIC.
2827 */
2828 void
2829 tlp_pnic_mii_writereg(self, phy, reg, val)
2830 struct device *self;
2831 int phy, reg, val;
2832 {
2833 struct tulip_softc *sc = (void *) self;
2834 int i;
2835
2836 TULIP_WRITE(sc, CSR_PNIC_MII,
2837 PNIC_MII_MBO | PNIC_MII_RESERVED |
2838 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) |
2839 (reg << PNIC_MII_REGSHIFT) | val);
2840
2841 for (i = 0; i < 1000; i++) {
2842 delay(10);
2843 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0)
2844 return;
2845 }
2846 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname);
2847 }
2848
2849 const bus_addr_t tlp_al981_phy_regmap[] = {
2850 CSR_ADM_BMCR,
2851 CSR_ADM_BMSR,
2852 CSR_ADM_PHYIDR1,
2853 CSR_ADM_PHYIDR2,
2854 CSR_ADM_ANAR,
2855 CSR_ADM_ANLPAR,
2856 CSR_ADM_ANER,
2857
2858 CSR_ADM_XMC,
2859 CSR_ADM_XCIIS,
2860 CSR_ADM_XIE,
2861 CSR_ADM_100CTR,
2862 };
2863 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) /
2864 sizeof(tlp_al981_phy_regmap[0]);
2865
2866 /*
2867 * tlp_al981_mii_readreg:
2868 *
2869 * Read a PHY register on the ADMtek AL981.
2870 */
2871 int
2872 tlp_al981_mii_readreg(self, phy, reg)
2873 struct device *self;
2874 int phy, reg;
2875 {
2876 struct tulip_softc *sc = (struct tulip_softc *)self;
2877
2878 /* AL981 only has an internal PHY. */
2879 if (phy != 0)
2880 return (0);
2881
2882 if (reg >= tlp_al981_phy_regmap_size)
2883 return (0);
2884
2885 return (bus_space_read_4(sc->sc_st, sc->sc_sh,
2886 tlp_al981_phy_regmap[reg]) & 0xffff);
2887 }
2888
2889 /*
2890 * tlp_al981_mii_writereg:
2891 *
2892 * Write a PHY register on the ADMtek AL981.
2893 */
2894 void
2895 tlp_al981_mii_writereg(self, phy, reg, val)
2896 struct device *self;
2897 int phy, reg, val;
2898 {
2899 struct tulip_softc *sc = (struct tulip_softc *)self;
2900
2901 /* AL981 only has an internal PHY. */
2902 if (phy != 0)
2903 return;
2904
2905 if (reg >= tlp_al981_phy_regmap_size)
2906 return;
2907
2908 bus_space_write_4(sc->sc_st, sc->sc_sh,
2909 tlp_al981_phy_regmap[reg], val);
2910 }
2911
2912 /*****************************************************************************
2913 * Chip-specific pre-init and reset functions.
2914 *****************************************************************************/
2915
2916 /*
2917 * tlp_2114x_preinit:
2918 *
2919 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
2920 */
2921 void
2922 tlp_2114x_preinit(sc)
2923 struct tulip_softc *sc;
2924 {
2925 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
2926 struct tulip_21x4x_media *tm = ife->ifm_aux;
2927
2928 /*
2929 * Whether or not we're in MII or SIA/SYM mode, the media info
2930 * contains the appropriate OPMODE bits.
2931 *
2932 * Note that if we have no media info, we are are doing
2933 * non-MII `auto'.
2934 *
2935 * Also, we always set the Must-Be-One bit.
2936 */
2937 if (tm == NULL) {
2938 #ifdef DIAGNOSTIC
2939 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
2940 panic("tlp_2114x_preinit: not IFM_AUTO");
2941 if (sc->sc_nway_active == NULL)
2942 panic("tlp_2114x_preinit: nway_active NULL");
2943 #endif
2944 tm = sc->sc_nway_active->ifm_aux;
2945 }
2946 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode;
2947
2948 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2949 }
2950
2951 /*
2952 * tlp_2114x_mii_preinit:
2953 *
2954 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
2955 * This version is used by boards which only have MII and don't have
2956 * an ISV SROM.
2957 */
2958 void
2959 tlp_2114x_mii_preinit(sc)
2960 struct tulip_softc *sc;
2961 {
2962
2963 /*
2964 * Always set the Must-Be-One bit, and Port Select (to select MII).
2965 * We'll never be called during a media change.
2966 */
2967 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS;
2968 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2969 }
2970
2971 /*
2972 * tlp_pnic_preinit:
2973 *
2974 * Pre-init function for the Lite-On 82c168 and 82c169.
2975 */
2976 void
2977 tlp_pnic_preinit(sc)
2978 struct tulip_softc *sc;
2979 {
2980
2981 if (sc->sc_flags & TULIPF_HAS_MII) {
2982 /*
2983 * MII case: just set the port-select bit; we will never
2984 * be called during a media change.
2985 */
2986 sc->sc_opmode |= OPMODE_PS;
2987 } else {
2988 /*
2989 * ENDEC/PCS/Nway mode; enable the Tx backoff counter.
2990 */
2991 sc->sc_opmode |= OPMODE_PNIC_TBEN;
2992 }
2993 }
2994
2995 /*
2996 * tlp_21140_reset:
2997 *
2998 * Issue a reset sequence on the 21140 via the GPIO facility.
2999 */
3000 void
3001 tlp_21140_reset(sc)
3002 struct tulip_softc *sc;
3003 {
3004 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3005 struct tulip_21x4x_media *tm = ife->ifm_aux;
3006 int i;
3007
3008 /* First, set the direction on the GPIO pins. */
3009 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
3010
3011 /* Now, issue the reset sequence. */
3012 for (i = 0; i < tm->tm_reset_length; i++) {
3013 delay(10);
3014 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]);
3015 }
3016
3017 /* Now, issue the selection sequence. */
3018 for (i = 0; i < tm->tm_gp_length; i++) {
3019 delay(10);
3020 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]);
3021 }
3022
3023 /* If there were no sequences, just lower the pins. */
3024 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0)
3025 TULIP_WRITE(sc, CSR_GPP, 0);
3026 }
3027
3028 /*
3029 * tlp_21142_reset:
3030 *
3031 * Issue a reset sequence on the 21142 via the GPIO facility.
3032 */
3033 void
3034 tlp_21142_reset(sc)
3035 struct tulip_softc *sc;
3036 {
3037 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3038 struct tulip_21x4x_media *tm = ife->ifm_aux;
3039 const u_int8_t *ncp;
3040 int i;
3041
3042 ncp = &sc->sc_srom[tm->tm_reset_offset];
3043 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) {
3044 delay(10);
3045 TULIP_WRITE(sc, CSR_SIAGEN,
3046 TULIP_ROM_GETW(ncp, 0) << 16);
3047 }
3048
3049 ncp = &sc->sc_srom[tm->tm_gp_offset];
3050 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) {
3051 delay(10);
3052 TULIP_WRITE(sc, CSR_SIAGEN,
3053 TULIP_ROM_GETW(ncp, 0) << 16);
3054 }
3055
3056 /* If there were no sequences, just lower the pins. */
3057 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
3058 delay(10);
3059 TULIP_WRITE(sc, CSR_SIAGEN, 0);
3060 }
3061 }
3062
3063 /*
3064 * tlp_pmac_reset:
3065 *
3066 * Reset routine for Macronix chips.
3067 */
3068 void
3069 tlp_pmac_reset(sc)
3070 struct tulip_softc *sc;
3071 {
3072
3073 switch (sc->sc_chip) {
3074 case TULIP_CHIP_82C115:
3075 case TULIP_CHIP_MX98715:
3076 case TULIP_CHIP_MX98715A:
3077 case TULIP_CHIP_MX98725:
3078 /*
3079 * Set the LED operating mode. This information is located
3080 * in the EEPROM at byte offset 0x77, per the MX98715A and
3081 * MX98725 application notes.
3082 */
3083 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24);
3084 break;
3085
3086 default:
3087 /* Nothing. */
3088 }
3089 }
3090
3091 /*****************************************************************************
3092 * Chip/board-specific media switches. The ones here are ones that
3093 * are potentially common to multiple front-ends.
3094 *****************************************************************************/
3095
3096 /*
3097 * This table is a common place for all sorts of media information,
3098 * keyed off of the SROM media code for that media.
3099 *
3100 * Note that we explicitly configure the 21142/21143 to always advertise
3101 * NWay capabilities when using the UTP port.
3102 * XXX Actually, we don't yet.
3103 */
3104 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = {
3105 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0,
3106 "10baseT",
3107 0,
3108 { SIACONN_21040_10BASET,
3109 SIATXRX_21040_10BASET,
3110 SIAGEN_21040_10BASET },
3111
3112 { SIACONN_21041_10BASET,
3113 SIATXRX_21041_10BASET,
3114 SIAGEN_21041_10BASET },
3115
3116 { SIACONN_21142_10BASET,
3117 SIATXRX_21142_10BASET,
3118 SIAGEN_21142_10BASET } },
3119
3120 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0,
3121 "10base2",
3122 0,
3123 { 0,
3124 0,
3125 0 },
3126
3127 { SIACONN_21041_BNC,
3128 SIATXRX_21041_BNC,
3129 SIAGEN_21041_BNC },
3130
3131 { SIACONN_21142_BNC,
3132 SIATXRX_21142_BNC,
3133 SIAGEN_21142_BNC } },
3134
3135 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0,
3136 "10base5",
3137 0,
3138 { SIACONN_21040_AUI,
3139 SIATXRX_21040_AUI,
3140 SIAGEN_21040_AUI },
3141
3142 { SIACONN_21041_AUI,
3143 SIATXRX_21041_AUI,
3144 SIAGEN_21041_AUI },
3145
3146 { SIACONN_21142_AUI,
3147 SIATXRX_21142_AUI,
3148 SIAGEN_21142_AUI } },
3149
3150 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0,
3151 "100baseTX",
3152 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD,
3153 { 0,
3154 0,
3155 0 },
3156
3157 { 0,
3158 0,
3159 0 },
3160
3161 { 0,
3162 0,
3163 SIAGEN_ABM } },
3164
3165 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX,
3166 "10baseT-FDX",
3167 OPMODE_FD|OPMODE_HBD,
3168 { SIACONN_21040_10BASET_FDX,
3169 SIATXRX_21040_10BASET_FDX,
3170 SIAGEN_21040_10BASET_FDX },
3171
3172 { SIACONN_21041_10BASET_FDX,
3173 SIATXRX_21041_10BASET_FDX,
3174 SIAGEN_21041_10BASET_FDX },
3175
3176 { SIACONN_21142_10BASET_FDX,
3177 SIATXRX_21142_10BASET_FDX,
3178 SIAGEN_21142_10BASET_FDX } },
3179
3180 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX,
3181 "100baseTX-FDX",
3182 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD,
3183 { 0,
3184 0,
3185 0 },
3186
3187 { 0,
3188 0,
3189 0 },
3190
3191 { 0,
3192 0,
3193 SIAGEN_ABM } },
3194
3195 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0,
3196 "100baseT4",
3197 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD,
3198 { 0,
3199 0,
3200 0 },
3201
3202 { 0,
3203 0,
3204 0 },
3205
3206 { 0,
3207 0,
3208 SIAGEN_ABM } },
3209
3210 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0,
3211 "100baseFX",
3212 OPMODE_PS|OPMODE_PCS|OPMODE_HBD,
3213 { 0,
3214 0,
3215 0 },
3216
3217 { 0,
3218 0,
3219 0 },
3220
3221 { 0,
3222 0,
3223 SIAGEN_ABM } },
3224
3225 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX,
3226 "100baseFX-FDX",
3227 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD,
3228 { 0,
3229 0,
3230 0 },
3231
3232 { 0,
3233 0,
3234 0 },
3235
3236 { 0,
3237 0,
3238 SIAGEN_ABM } },
3239
3240 { 0, 0, 0,
3241 NULL,
3242 0,
3243 { 0,
3244 0,
3245 0 },
3246
3247 { 0,
3248 0,
3249 0 },
3250
3251 { 0,
3252 0,
3253 0 } },
3254 };
3255
3256 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t));
3257 void tlp_srom_media_info __P((struct tulip_softc *,
3258 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *));
3259 void tlp_add_srom_media __P((struct tulip_softc *, int,
3260 void (*)(struct tulip_softc *, struct ifmediareq *),
3261 int (*)(struct tulip_softc *), const u_int8_t *, int));
3262 void tlp_print_media __P((struct tulip_softc *));
3263 void tlp_nway_activate __P((struct tulip_softc *, int));
3264 void tlp_get_minst __P((struct tulip_softc *));
3265
3266 const struct tulip_srom_to_ifmedia *
3267 tlp_srom_to_ifmedia(sm)
3268 u_int8_t sm;
3269 {
3270 const struct tulip_srom_to_ifmedia *tsti;
3271
3272 for (tsti = tulip_srom_to_ifmedia_table;
3273 tsti->tsti_name != NULL; tsti++) {
3274 if (tsti->tsti_srom == sm)
3275 return (tsti);
3276 }
3277
3278 return (NULL);
3279 }
3280
3281 void
3282 tlp_srom_media_info(sc, tsti, tm)
3283 struct tulip_softc *sc;
3284 const struct tulip_srom_to_ifmedia *tsti;
3285 struct tulip_21x4x_media *tm;
3286 {
3287
3288 tm->tm_name = tsti->tsti_name;
3289 tm->tm_opmode = tsti->tsti_opmode;
3290
3291 switch (sc->sc_chip) {
3292 case TULIP_CHIP_DE425:
3293 case TULIP_CHIP_21040:
3294 tm->tm_sia = tsti->tsti_21040; /* struct assignment */
3295 break;
3296
3297 case TULIP_CHIP_21041:
3298 tm->tm_sia = tsti->tsti_21041; /* struct assignment */
3299 break;
3300
3301 case TULIP_CHIP_21142:
3302 case TULIP_CHIP_21143:
3303 case TULIP_CHIP_82C115:
3304 case TULIP_CHIP_MX98715:
3305 case TULIP_CHIP_MX98715A:
3306 case TULIP_CHIP_MX98725:
3307 tm->tm_sia = tsti->tsti_21142; /* struct assignment */
3308 break;
3309
3310 default:
3311 /* Nothing. */
3312 }
3313 }
3314
3315 void
3316 tlp_add_srom_media(sc, type, get, set, list, cnt)
3317 struct tulip_softc *sc;
3318 int type;
3319 void (*get) __P((struct tulip_softc *, struct ifmediareq *));
3320 int (*set) __P((struct tulip_softc *));
3321 const u_int8_t *list;
3322 int cnt;
3323 {
3324 struct tulip_21x4x_media *tm;
3325 const struct tulip_srom_to_ifmedia *tsti;
3326 int i;
3327
3328 for (i = 0; i < cnt; i++) {
3329 tsti = tlp_srom_to_ifmedia(list[i]);
3330 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
3331 memset(tm, 0, sizeof(*tm));
3332 tlp_srom_media_info(sc, tsti, tm);
3333 tm->tm_type = type;
3334 tm->tm_get = get;
3335 tm->tm_set = set;
3336
3337 ifmedia_add(&sc->sc_mii.mii_media,
3338 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
3339 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
3340 }
3341 }
3342
3343 void
3344 tlp_print_media(sc)
3345 struct tulip_softc *sc;
3346 {
3347 struct ifmedia_entry *ife;
3348 struct tulip_21x4x_media *tm;
3349 const char *sep = "";
3350
3351 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
3352
3353 printf("%s: ", sc->sc_dev.dv_xname);
3354 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
3355 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) {
3356 tm = ife->ifm_aux;
3357 if (tm == NULL) {
3358 #ifdef DIAGNOSTIC
3359 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
3360 panic("tlp_print_media");
3361 #endif
3362 PRINT("auto");
3363 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII &&
3364 tm->tm_type != TULIP_ROM_MB_21142_MII) {
3365 PRINT(tm->tm_name);
3366 }
3367 }
3368 printf("\n");
3369
3370 #undef PRINT
3371 }
3372
3373 void
3374 tlp_nway_activate(sc, media)
3375 struct tulip_softc *sc;
3376 int media;
3377 {
3378 struct ifmedia_entry *ife;
3379
3380 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0);
3381 #ifdef DIAGNOSTIC
3382 if (ife == NULL)
3383 panic("tlp_nway_activate");
3384 #endif
3385 sc->sc_nway_active = ife;
3386 }
3387
3388 void
3389 tlp_get_minst(sc)
3390 struct tulip_softc *sc;
3391 {
3392
3393 if ((sc->sc_media_seen &
3394 ~((1 << TULIP_ROM_MB_21140_MII) |
3395 (1 << TULIP_ROM_MB_21142_MII))) == 0) {
3396 /*
3397 * We have not yet seen any SIA/SYM media (but are
3398 * about to; that's why we're called!), so assign
3399 * the current media instance to be the `internal media'
3400 * instance, and advance it so any MII media gets a
3401 * fresh one (used to selecting/isolating a PHY).
3402 */
3403 sc->sc_tlp_minst = sc->sc_mii.mii_instance++;
3404 }
3405 }
3406
3407 /*
3408 * SIA Utility functions.
3409 */
3410 void tlp_sia_update_link __P((struct tulip_softc *));
3411 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *));
3412 int tlp_sia_set __P((struct tulip_softc *));
3413 void tlp_sia_fixup __P((struct tulip_softc *));
3414
3415 void
3416 tlp_sia_update_link(sc)
3417 struct tulip_softc *sc;
3418 {
3419 struct ifmedia_entry *ife;
3420 struct tulip_21x4x_media *tm;
3421 u_int32_t siastat;
3422
3423 ife = TULIP_CURRENT_MEDIA(sc);
3424 tm = ife->ifm_aux;
3425
3426 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID);
3427
3428 siastat = TULIP_READ(sc, CSR_SIASTAT);
3429
3430 /*
3431 * Note that when we do SIA link tests, we are assuming that
3432 * the chip is really in the mode that the current media setting
3433 * reflects. If we're not, then the link tests will not be
3434 * accurate!
3435 */
3436 switch (IFM_SUBTYPE(ife->ifm_media)) {
3437 case IFM_10_T:
3438 sc->sc_flags |= TULIPF_LINK_VALID;
3439 if ((siastat & SIASTAT_LS10) == 0)
3440 sc->sc_flags |= TULIPF_LINK_UP;
3441 break;
3442
3443 case IFM_100_TX:
3444 case IFM_100_T4:
3445 sc->sc_flags |= TULIPF_LINK_VALID;
3446 if ((siastat & SIASTAT_LS100) == 0)
3447 sc->sc_flags |= TULIPF_LINK_UP;
3448 break;
3449 }
3450
3451 switch (sc->sc_chip) {
3452 case TULIP_CHIP_21142:
3453 case TULIP_CHIP_21143:
3454 /*
3455 * On these chips, we can tell more information about
3456 * AUI/BNC. Note that the AUI/BNC selection is made
3457 * in a different register; for our purpose, it's all
3458 * AUI.
3459 */
3460 switch (IFM_SUBTYPE(ife->ifm_media)) {
3461 case IFM_10_2:
3462 case IFM_10_5:
3463 sc->sc_flags |= TULIPF_LINK_VALID;
3464 if (siastat & SIASTAT_ARA) {
3465 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA);
3466 sc->sc_flags |= TULIPF_LINK_UP;
3467 }
3468 break;
3469
3470 default:
3471 /*
3472 * If we're SYM media and can detect the link
3473 * via the GPIO facility, prefer that status
3474 * over LS100.
3475 */
3476 if (tm->tm_type == TULIP_ROM_MB_21143_SYM &&
3477 tm->tm_actmask != 0) {
3478 sc->sc_flags = (sc->sc_flags &
3479 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID;
3480 if (TULIP_ISSET(sc, CSR_SIAGEN,
3481 tm->tm_actmask) == tm->tm_actdata)
3482 sc->sc_flags |= TULIPF_LINK_UP;
3483 }
3484 }
3485 break;
3486
3487 default:
3488 /* Nothing. */
3489 }
3490 }
3491
3492 void
3493 tlp_sia_get(sc, ifmr)
3494 struct tulip_softc *sc;
3495 struct ifmediareq *ifmr;
3496 {
3497 struct ifmedia_entry *ife;
3498
3499 ifmr->ifm_status = 0;
3500
3501 tlp_sia_update_link(sc);
3502
3503 ife = TULIP_CURRENT_MEDIA(sc);
3504
3505 if (sc->sc_flags & TULIPF_LINK_VALID)
3506 ifmr->ifm_status |= IFM_AVALID;
3507 if (sc->sc_flags & TULIPF_LINK_UP)
3508 ifmr->ifm_status |= IFM_ACTIVE;
3509 ifmr->ifm_active = ife->ifm_media;
3510 }
3511
3512 void
3513 tlp_sia_fixup(sc)
3514 struct tulip_softc *sc;
3515 {
3516 struct ifmedia_entry *ife;
3517 struct tulip_21x4x_media *tm;
3518 u_int32_t siaconn, siatxrx, siagen;
3519
3520 switch (sc->sc_chip) {
3521 case TULIP_CHIP_82C115:
3522 case TULIP_CHIP_MX98713A:
3523 case TULIP_CHIP_MX98715:
3524 case TULIP_CHIP_MX98715A:
3525 case TULIP_CHIP_MX98725:
3526 siaconn = PMAC_SIACONN_MASK;
3527 siatxrx = PMAC_SIATXRX_MASK;
3528 siagen = PMAC_SIAGEN_MASK;
3529 break;
3530
3531 default:
3532 /* No fixups required on any other chips. */
3533 return;
3534 }
3535
3536 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
3537 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) {
3538 tm = ife->ifm_aux;
3539 if (tm == NULL)
3540 continue;
3541
3542 tm->tm_siaconn &= siaconn;
3543 tm->tm_siatxrx &= siatxrx;
3544 tm->tm_siagen &= siagen;
3545 }
3546 }
3547
3548 int
3549 tlp_sia_set(sc)
3550 struct tulip_softc *sc;
3551 {
3552 struct ifmedia_entry *ife;
3553 struct tulip_21x4x_media *tm;
3554
3555 ife = TULIP_CURRENT_MEDIA(sc);
3556 tm = ife->ifm_aux;
3557
3558 /*
3559 * XXX This appears to be necessary on a bunch of the clone chips.
3560 */
3561 delay(20000);
3562
3563 /*
3564 * Idle the chip.
3565 */
3566 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
3567
3568 /*
3569 * Program the SIA. It's important to write in this order,
3570 * resetting the SIA first.
3571 */
3572 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */
3573 delay(1000);
3574
3575 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx);
3576
3577 switch (sc->sc_chip) {
3578 case TULIP_CHIP_21142:
3579 case TULIP_CHIP_21143:
3580 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl);
3581 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata);
3582 break;
3583 default:
3584 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen);
3585 }
3586
3587 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn);
3588
3589 /*
3590 * Set the OPMODE bits for this media and write OPMODE.
3591 * This will resume the transmit and receive processes.
3592 */
3593 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
3594 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3595
3596 return (0);
3597 }
3598
3599 /*
3600 * 21140 GPIO utility functions.
3601 */
3602 void tlp_21140_gpio_update_link __P((struct tulip_softc *));
3603 void tlp_21140_gpio_get __P((struct tulip_softc *sc,
3604 struct ifmediareq *ifmr));
3605 int tlp_21140_gpio_set __P((struct tulip_softc *sc));
3606
3607 void
3608 tlp_21140_gpio_update_link(sc)
3609 struct tulip_softc *sc;
3610 {
3611 struct ifmedia_entry *ife;
3612 struct tulip_21x4x_media *tm;
3613
3614 ife = TULIP_CURRENT_MEDIA(sc);
3615 tm = ife->ifm_aux;
3616
3617 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID);
3618
3619 if (tm->tm_actmask != 0) {
3620 sc->sc_flags |= TULIPF_LINK_VALID;
3621 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) ==
3622 tm->tm_actdata)
3623 sc->sc_flags |= TULIPF_LINK_UP;
3624 }
3625 }
3626
3627 void
3628 tlp_21140_gpio_get(sc, ifmr)
3629 struct tulip_softc *sc;
3630 struct ifmediareq *ifmr;
3631 {
3632 struct ifmedia_entry *ife;
3633
3634 ifmr->ifm_status = 0;
3635
3636 tlp_21140_gpio_update_link(sc);
3637
3638 ife = TULIP_CURRENT_MEDIA(sc);
3639
3640 if (sc->sc_flags & TULIPF_LINK_VALID)
3641 ifmr->ifm_status |= IFM_AVALID;
3642 if (sc->sc_flags & TULIPF_LINK_UP)
3643 ifmr->ifm_status |= IFM_ACTIVE;
3644 ifmr->ifm_active = ife->ifm_media;
3645 }
3646
3647 int
3648 tlp_21140_gpio_set(sc)
3649 struct tulip_softc *sc;
3650 {
3651 struct ifmedia_entry *ife;
3652 struct tulip_21x4x_media *tm;
3653
3654 ife = TULIP_CURRENT_MEDIA(sc);
3655 tm = ife->ifm_aux;
3656
3657 /*
3658 * Idle the chip.
3659 */
3660 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
3661
3662 /*
3663 * Set the GPIO pins for this media, to flip any
3664 * relays, etc.
3665 */
3666 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
3667 delay(10);
3668 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata);
3669
3670 /*
3671 * Set the OPMODE bits for this media and write OPMODE.
3672 * This will resume the transmit and receive processes.
3673 */
3674 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
3675 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3676
3677 return (0);
3678 }
3679
3680 /*
3681 * 21040 and 21041 media switches.
3682 */
3683 void tlp_21040_tmsw_init __P((struct tulip_softc *));
3684 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *));
3685 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *));
3686 void tlp_21041_tmsw_init __P((struct tulip_softc *));
3687
3688 const struct tulip_mediasw tlp_21040_mediasw = {
3689 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set
3690 };
3691
3692 const struct tulip_mediasw tlp_21040_tp_mediasw = {
3693 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set
3694 };
3695
3696 const struct tulip_mediasw tlp_21040_auibnc_mediasw = {
3697 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set
3698 };
3699
3700 const struct tulip_mediasw tlp_21041_mediasw = {
3701 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set
3702 };
3703
3704
3705 void
3706 tlp_21040_tmsw_init(sc)
3707 struct tulip_softc *sc;
3708 {
3709 static const u_int8_t media[] = {
3710 TULIP_ROM_MB_MEDIA_TP,
3711 TULIP_ROM_MB_MEDIA_TP_FDX,
3712 TULIP_ROM_MB_MEDIA_AUI,
3713 };
3714 struct tulip_21x4x_media *tm;
3715
3716 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
3717 tlp_mediastatus);
3718
3719 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3);
3720
3721 /*
3722 * No SROM type for External SIA.
3723 */
3724 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
3725 memset(tm, 0, sizeof(*tm));
3726 tm->tm_name = "manual";
3727 tm->tm_opmode = 0;
3728 tm->tm_siaconn = SIACONN_21040_EXTSIA;
3729 tm->tm_siatxrx = SIATXRX_21040_EXTSIA;
3730 tm->tm_siagen = SIAGEN_21040_EXTSIA;
3731 ifmedia_add(&sc->sc_mii.mii_media,
3732 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm);
3733
3734 /*
3735 * XXX Autosense not yet supported.
3736 */
3737
3738 /* XXX This should be auto-sense. */
3739 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
3740
3741 tlp_print_media(sc);
3742 }
3743
3744 void
3745 tlp_21040_tp_tmsw_init(sc)
3746 struct tulip_softc *sc;
3747 {
3748 static const u_int8_t media[] = {
3749 TULIP_ROM_MB_MEDIA_TP,
3750 TULIP_ROM_MB_MEDIA_TP_FDX,
3751 };
3752
3753 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
3754 tlp_mediastatus);
3755
3756 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2);
3757
3758 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
3759
3760 tlp_print_media(sc);
3761 }
3762
3763 void
3764 tlp_21040_auibnc_tmsw_init(sc)
3765 struct tulip_softc *sc;
3766 {
3767 static const u_int8_t media[] = {
3768 TULIP_ROM_MB_MEDIA_AUI,
3769 };
3770
3771 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
3772 tlp_mediastatus);
3773
3774 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1);
3775
3776 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5);
3777
3778 tlp_print_media(sc);
3779 }
3780
3781 void
3782 tlp_21041_tmsw_init(sc)
3783 struct tulip_softc *sc;
3784 {
3785 static const u_int8_t media[] = {
3786 TULIP_ROM_MB_MEDIA_TP,
3787 TULIP_ROM_MB_MEDIA_TP_FDX,
3788 TULIP_ROM_MB_MEDIA_BNC,
3789 TULIP_ROM_MB_MEDIA_AUI,
3790 };
3791 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt;
3792 const struct tulip_srom_to_ifmedia *tsti;
3793 struct tulip_21x4x_media *tm;
3794 u_int16_t romdef;
3795 u_int8_t mb;
3796
3797 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
3798 tlp_mediastatus);
3799
3800 if (tlp_isv_srom(sc->sc_srom) == 0) {
3801 not_isv_srom:
3802 /*
3803 * If we have a board without the standard 21041 SROM format,
3804 * we just assume all media are present and try and pick a
3805 * reasonable default.
3806 */
3807 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4);
3808
3809 /*
3810 * XXX Autosense not yet supported.
3811 */
3812
3813 /* XXX This should be auto-sense. */
3814 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
3815
3816 tlp_print_media(sc);
3817 return;
3818 }
3819
3820 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
3821 for (i = 0; i < devcnt; i++) {
3822 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
3823 break;
3824 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
3825 sc->sc_devno)
3826 break;
3827 }
3828
3829 if (i == devcnt)
3830 goto not_isv_srom;
3831
3832 leaf_offset = TULIP_ROM_GETW(sc->sc_srom,
3833 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i));
3834 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE;
3835 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT];
3836
3837 for (; m_cnt != 0;
3838 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) {
3839 mb = sc->sc_srom[mb_offset];
3840 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
3841 memset(tm, 0, sizeof(*tm));
3842 switch (mb & TULIP_ROM_MB_MEDIA_CODE) {
3843 case TULIP_ROM_MB_MEDIA_TP_FDX:
3844 case TULIP_ROM_MB_MEDIA_TP:
3845 case TULIP_ROM_MB_MEDIA_BNC:
3846 case TULIP_ROM_MB_MEDIA_AUI:
3847 tsti = tlp_srom_to_ifmedia(mb &
3848 TULIP_ROM_MB_MEDIA_CODE);
3849
3850 tlp_srom_media_info(sc, tsti, tm);
3851
3852 /*
3853 * Override our default SIA settings if the
3854 * SROM contains its own.
3855 */
3856 if (mb & TULIP_ROM_MB_EXT) {
3857 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom,
3858 mb_offset + TULIP_ROM_MB_CSR13);
3859 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom,
3860 mb_offset + TULIP_ROM_MB_CSR14);
3861 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom,
3862 mb_offset + TULIP_ROM_MB_CSR15);
3863 }
3864
3865 ifmedia_add(&sc->sc_mii.mii_media,
3866 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
3867 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
3868 break;
3869
3870 default:
3871 printf("%s: unknown media code 0x%02x\n",
3872 sc->sc_dev.dv_xname,
3873 mb & TULIP_ROM_MB_MEDIA_CODE);
3874 free(tm, M_DEVBUF);
3875 }
3876 }
3877
3878 /*
3879 * XXX Autosense not yet supported.
3880 */
3881
3882 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset +
3883 TULIP_ROM_IL_SELECT_CONN_TYPE);
3884 switch (romdef) {
3885 case SELECT_CONN_TYPE_TP:
3886 case SELECT_CONN_TYPE_TP_AUTONEG:
3887 case SELECT_CONN_TYPE_TP_NOLINKPASS:
3888 defmedia = IFM_ETHER|IFM_10_T;
3889 break;
3890
3891 case SELECT_CONN_TYPE_TP_FDX:
3892 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX;
3893 break;
3894
3895 case SELECT_CONN_TYPE_BNC:
3896 defmedia = IFM_ETHER|IFM_10_2;
3897 break;
3898
3899 case SELECT_CONN_TYPE_AUI:
3900 defmedia = IFM_ETHER|IFM_10_5;
3901 break;
3902 #if 0 /* XXX */
3903 case SELECT_CONN_TYPE_ASENSE:
3904 case SELECT_CONN_TYPE_ASENSE_AUTONEG:
3905 defmedia = IFM_ETHER|IFM_AUTO;
3906 break;
3907 #endif
3908 default:
3909 defmedia = 0;
3910 }
3911
3912 if (defmedia == 0) {
3913 /*
3914 * XXX We should default to auto-sense.
3915 */
3916 defmedia = IFM_ETHER|IFM_10_T;
3917 }
3918
3919 ifmedia_set(&sc->sc_mii.mii_media, defmedia);
3920
3921 tlp_print_media(sc);
3922 }
3923
3924 /*
3925 * DECchip 2114x ISV media switch.
3926 */
3927 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *));
3928 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
3929 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *));
3930
3931 const struct tulip_mediasw tlp_2114x_isv_mediasw = {
3932 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set
3933 };
3934
3935 void
3936 tlp_2114x_isv_tmsw_init(sc)
3937 struct tulip_softc *sc;
3938 {
3939 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
3940 struct ifmedia_entry *ife;
3941 struct mii_softc *phy;
3942 struct tulip_21x4x_media *tm;
3943 const struct tulip_srom_to_ifmedia *tsti;
3944 int i, devcnt, leaf_offset, m_cnt, type, length;
3945 int defmedia, miidef;
3946 u_int16_t word;
3947 u_int8_t *cp, *ncp;
3948
3949 defmedia = miidef = 0;
3950
3951 sc->sc_mii.mii_ifp = ifp;
3952 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
3953 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
3954 sc->sc_mii.mii_statchg = sc->sc_statchg;
3955
3956 /*
3957 * Ignore `instance'; we may get a mixture of SIA and MII
3958 * media, and `instance' is used to isolate or select the
3959 * PHY on the MII as appropriate. Note that duplicate media
3960 * are disallowed, so ignoring `instance' is safe.
3961 */
3962 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange,
3963 tlp_mediastatus);
3964
3965 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
3966 for (i = 0; i < devcnt; i++) {
3967 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
3968 break;
3969 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
3970 sc->sc_devno)
3971 break;
3972 }
3973
3974 if (i == devcnt) {
3975 printf("%s: unable to locate info leaf in SROM\n",
3976 sc->sc_dev.dv_xname);
3977 return;
3978 }
3979
3980 leaf_offset = TULIP_ROM_GETW(sc->sc_srom,
3981 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i));
3982
3983 /* XXX SELECT CONN TYPE */
3984
3985 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT];
3986
3987 /*
3988 * On some chips, the first thing in the Info Leaf is the
3989 * GPIO pin direction data.
3990 */
3991 switch (sc->sc_chip) {
3992 case TULIP_CHIP_21140:
3993 case TULIP_CHIP_21140A:
3994 case TULIP_CHIP_MX98713:
3995 case TULIP_CHIP_AX88140:
3996 case TULIP_CHIP_AX88141:
3997 sc->sc_gp_dir = *cp++;
3998 break;
3999
4000 default:
4001 /* Nothing. */
4002 }
4003
4004 /* Get the media count. */
4005 m_cnt = *cp++;
4006
4007 for (; m_cnt != 0; cp = ncp, m_cnt--) {
4008 /*
4009 * Determine the type and length of this media block.
4010 */
4011 if ((*cp & 0x80) == 0) {
4012 length = 4;
4013 type = TULIP_ROM_MB_21140_GPR;
4014 } else {
4015 length = (*cp++ & 0x7f) - 1;
4016 type = *cp++ & 0x3f;
4017 }
4018
4019 /* Compute the start of the next block. */
4020 ncp = cp + length;
4021
4022 /* Now, parse the block. */
4023 switch (type) {
4024 case TULIP_ROM_MB_21140_GPR:
4025 tlp_get_minst(sc);
4026 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR;
4027
4028 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4029 memset(tm, 0, sizeof(*tm));
4030
4031 tm->tm_type = TULIP_ROM_MB_21140_GPR;
4032 tm->tm_get = tlp_21140_gpio_get;
4033 tm->tm_set = tlp_21140_gpio_set;
4034
4035 /* First is the media type code. */
4036 tsti = tlp_srom_to_ifmedia(cp[0] &
4037 TULIP_ROM_MB_MEDIA_CODE);
4038 if (tsti == NULL) {
4039 /* Invalid media code. */
4040 free(tm, M_DEVBUF);
4041 break;
4042 }
4043
4044 /* Get defaults. */
4045 tlp_srom_media_info(sc, tsti, tm);
4046
4047 /* Next is any GPIO info for this media. */
4048 tm->tm_gpdata = cp[1];
4049
4050 /*
4051 * Next is a word containing OPMODE information
4052 * and info on how to detect if this media is
4053 * active.
4054 */
4055 word = TULIP_ROM_GETW(cp, 2);
4056 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word);
4057 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
4058 tm->tm_actmask =
4059 TULIP_ROM_MB_BITPOS(word);
4060 tm->tm_actdata =
4061 (word & TULIP_ROM_MB_POLARITY) ?
4062 0 : tm->tm_actmask;
4063 }
4064
4065 ifmedia_add(&sc->sc_mii.mii_media,
4066 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4067 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4068 break;
4069
4070 case TULIP_ROM_MB_21140_MII:
4071 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII;
4072
4073 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4074 memset(tm, 0, sizeof(*tm));
4075
4076 tm->tm_type = TULIP_ROM_MB_21140_MII;
4077 tm->tm_get = tlp_mii_getmedia;
4078 tm->tm_set = tlp_mii_setmedia;
4079 tm->tm_opmode = OPMODE_PS;
4080
4081 if (sc->sc_reset == NULL)
4082 sc->sc_reset = tlp_21140_reset;
4083
4084 /* First is the PHY number. */
4085 tm->tm_phyno = *cp++;
4086
4087 /* Next is the MII select sequence length and offset. */
4088 tm->tm_gp_length = *cp++;
4089 tm->tm_gp_offset = cp - &sc->sc_srom[0];
4090 cp += tm->tm_gp_length;
4091
4092 /* Next is the MII reset sequence length and offset. */
4093 tm->tm_reset_length = *cp++;
4094 tm->tm_reset_offset = cp - &sc->sc_srom[0];
4095 cp += tm->tm_reset_length;
4096
4097 /*
4098 * The following items are left in the media block
4099 * that we don't particularly care about:
4100 *
4101 * capabilities W
4102 * advertisement W
4103 * full duplex W
4104 * tx threshold W
4105 *
4106 * These appear to be bits in the PHY registers,
4107 * which our MII code handles on its own.
4108 */
4109
4110 /*
4111 * Before we probe the MII bus, we need to reset
4112 * it and issue the selection sequence.
4113 */
4114
4115 /* Set the direction of the pins... */
4116 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
4117
4118 for (i = 0; i < tm->tm_reset_length; i++) {
4119 delay(10);
4120 TULIP_WRITE(sc, CSR_GPP,
4121 sc->sc_srom[tm->tm_reset_offset + i]);
4122 }
4123
4124 for (i = 0; i < tm->tm_gp_length; i++) {
4125 delay(10);
4126 TULIP_WRITE(sc, CSR_GPP,
4127 sc->sc_srom[tm->tm_gp_offset + i]);
4128 }
4129
4130 /* If there were no sequences, just lower the pins. */
4131 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
4132 delay(10);
4133 TULIP_WRITE(sc, CSR_GPP, 0);
4134 }
4135
4136 /*
4137 * Now, probe the MII for the PHY. Note, we know
4138 * the location of the PHY on the bus, but we don't
4139 * particularly care; the MII code just likes to
4140 * search the whole thing anyhow.
4141 */
4142 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4143 MII_PHY_ANY, tm->tm_phyno);
4144
4145 /*
4146 * Now, search for the PHY we hopefully just
4147 * configured. If it's not configured into the
4148 * kernel, we lose. The PHY's default media always
4149 * takes priority.
4150 */
4151 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys);
4152 phy != NULL;
4153 phy = LIST_NEXT(phy, mii_list))
4154 if (phy->mii_offset == tm->tm_phyno)
4155 break;
4156 if (phy == NULL) {
4157 printf("%s: unable to configure MII\n",
4158 sc->sc_dev.dv_xname);
4159 break;
4160 }
4161
4162 sc->sc_flags |= TULIPF_HAS_MII;
4163 sc->sc_tick = tlp_mii_tick;
4164 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0,
4165 phy->mii_inst);
4166
4167 /*
4168 * Okay, now that we've found the PHY and the MII
4169 * layer has added all of the media associated
4170 * with that PHY, we need to traverse the media
4171 * list, and add our `tm' to each entry's `aux'
4172 * pointer.
4173 *
4174 * We do this by looking for media with our
4175 * PHY's `instance'.
4176 */
4177 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4178 ife != NULL;
4179 ife = TAILQ_NEXT(ife, ifm_list)) {
4180 if (IFM_INST(ife->ifm_media) != phy->mii_inst)
4181 continue;
4182 ife->ifm_aux = tm;
4183 }
4184 break;
4185
4186 case TULIP_ROM_MB_21142_SIA:
4187 tlp_get_minst(sc);
4188 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA;
4189
4190 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4191 memset(tm, 0, sizeof(*tm));
4192
4193 tm->tm_type = TULIP_ROM_MB_21142_SIA;
4194 tm->tm_get = tlp_sia_get;
4195 tm->tm_set = tlp_sia_set;
4196
4197 /* First is the media type code. */
4198 tsti = tlp_srom_to_ifmedia(cp[0] &
4199 TULIP_ROM_MB_MEDIA_CODE);
4200 if (tsti == NULL) {
4201 /* Invalid media code. */
4202 free(tm, M_DEVBUF);
4203 break;
4204 }
4205
4206 /* Get defaults. */
4207 tlp_srom_media_info(sc, tsti, tm);
4208
4209 /*
4210 * Override our default SIA settings if the
4211 * SROM contains its own.
4212 */
4213 if (cp[0] & 0x40) {
4214 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1);
4215 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3);
4216 tm->tm_siagen = TULIP_ROM_GETW(cp, 5);
4217 cp += 7;
4218 } else
4219 cp++;
4220
4221 /* Next is GPIO control/data. */
4222 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0);
4223 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2);
4224
4225 ifmedia_add(&sc->sc_mii.mii_media,
4226 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4227 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4228 break;
4229
4230 case TULIP_ROM_MB_21142_MII:
4231 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII;
4232
4233 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4234 memset(tm, 0, sizeof(*tm));
4235
4236 tm->tm_type = TULIP_ROM_MB_21142_MII;
4237 tm->tm_get = tlp_mii_getmedia;
4238 tm->tm_set = tlp_mii_setmedia;
4239 tm->tm_opmode = OPMODE_PS;
4240
4241 if (sc->sc_reset == NULL)
4242 sc->sc_reset = tlp_21142_reset;
4243
4244 /* First is the PHY number. */
4245 tm->tm_phyno = *cp++;
4246
4247 /* Next is the MII select sequence length and offset. */
4248 tm->tm_gp_length = *cp++;
4249 tm->tm_gp_offset = cp - &sc->sc_srom[0];
4250 cp += tm->tm_gp_length * 2;
4251
4252 /* Next is the MII reset sequence length and offset. */
4253 tm->tm_reset_length = *cp++;
4254 tm->tm_reset_offset = cp - &sc->sc_srom[0];
4255 cp += tm->tm_reset_length * 2;
4256
4257 /*
4258 * The following items are left in the media block
4259 * that we don't particularly care about:
4260 *
4261 * capabilities W
4262 * advertisement W
4263 * full duplex W
4264 * tx threshold W
4265 * MII interrupt W
4266 *
4267 * These appear to be bits in the PHY registers,
4268 * which our MII code handles on its own.
4269 */
4270
4271 /*
4272 * Before we probe the MII bus, we need to reset
4273 * it and issue the selection sequence.
4274 */
4275
4276 ncp = &sc->sc_srom[tm->tm_reset_offset];
4277 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) {
4278 delay(10);
4279 TULIP_WRITE(sc, CSR_SIAGEN,
4280 TULIP_ROM_GETW(ncp, 0) << 16);
4281 }
4282
4283 ncp = &sc->sc_srom[tm->tm_gp_offset];
4284 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) {
4285 delay(10);
4286 TULIP_WRITE(sc, CSR_SIAGEN,
4287 TULIP_ROM_GETW(ncp, 0) << 16);
4288 }
4289
4290 /* If there were no sequences, just lower the pins. */
4291 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
4292 delay(10);
4293 TULIP_WRITE(sc, CSR_SIAGEN, 0);
4294 }
4295
4296 /*
4297 * Now, probe the MII for the PHY. Note, we know
4298 * the location of the PHY on the bus, but we don't
4299 * particularly care; the MII code just likes to
4300 * search the whole thing anyhow.
4301 */
4302 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4303 MII_PHY_ANY, tm->tm_phyno);
4304
4305 /*
4306 * Now, search for the PHY we hopefully just
4307 * configured. If it's not configured into the
4308 * kernel, we lose. The PHY's default media always
4309 * takes priority.
4310 */
4311 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys);
4312 phy != NULL;
4313 phy = LIST_NEXT(phy, mii_list))
4314 if (phy->mii_offset == tm->tm_phyno)
4315 break;
4316 if (phy == NULL) {
4317 printf("%s: unable to configure MII\n",
4318 sc->sc_dev.dv_xname);
4319 break;
4320 }
4321
4322 sc->sc_flags |= TULIPF_HAS_MII;
4323 sc->sc_tick = tlp_mii_tick;
4324 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0,
4325 phy->mii_inst);
4326
4327 /*
4328 * Okay, now that we've found the PHY and the MII
4329 * layer has added all of the media associated
4330 * with that PHY, we need to traverse the media
4331 * list, and add our `tm' to each entry's `aux'
4332 * pointer.
4333 *
4334 * We do this by looking for media with our
4335 * PHY's `instance'.
4336 */
4337 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4338 ife != NULL;
4339 ife = TAILQ_NEXT(ife, ifm_list)) {
4340 if (IFM_INST(ife->ifm_media) != phy->mii_inst)
4341 continue;
4342 ife->ifm_aux = tm;
4343 }
4344 break;
4345
4346 case TULIP_ROM_MB_21143_SYM:
4347 tlp_get_minst(sc);
4348 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM;
4349
4350 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4351 memset(tm, 0, sizeof(*tm));
4352
4353 tm->tm_type = TULIP_ROM_MB_21143_SYM;
4354 tm->tm_get = tlp_sia_get;
4355 tm->tm_set = tlp_sia_set;
4356
4357 /* First is the media type code. */
4358 tsti = tlp_srom_to_ifmedia(cp[0] &
4359 TULIP_ROM_MB_MEDIA_CODE);
4360 if (tsti == NULL) {
4361 /* Invalid media code. */
4362 free(tm, M_DEVBUF);
4363 break;
4364 }
4365
4366 /* Get defaults. */
4367 tlp_srom_media_info(sc, tsti, tm);
4368
4369 /* Next is GPIO control/data. */
4370 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1);
4371 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3);
4372
4373 /*
4374 * Next is a word containing OPMODE information
4375 * and info on how to detect if this media is
4376 * active.
4377 */
4378 word = TULIP_ROM_GETW(cp, 5);
4379 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word);
4380 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
4381 tm->tm_actmask =
4382 TULIP_ROM_MB_BITPOS(word);
4383 tm->tm_actdata =
4384 (word & TULIP_ROM_MB_POLARITY) ?
4385 0 : tm->tm_actmask;
4386 }
4387
4388 ifmedia_add(&sc->sc_mii.mii_media,
4389 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4390 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4391 break;
4392
4393 case TULIP_ROM_MB_21143_RESET:
4394 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname);
4395 break;
4396
4397 default:
4398 printf("%s: unknown ISV media block type 0x%02x\n",
4399 sc->sc_dev.dv_xname, type);
4400 }
4401 }
4402
4403 /*
4404 * Deal with the case where no media is configured.
4405 */
4406 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) {
4407 printf("%s: no media found!\n", sc->sc_dev.dv_xname);
4408 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
4409 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
4410 return;
4411 }
4412
4413 /*
4414 * Pick the default media.
4415 */
4416 if (miidef != 0)
4417 defmedia = miidef;
4418 else {
4419 /*
4420 * XXX Pick a better default. Should come from SROM
4421 * XXX on 21140[A], and should be "auto" on 21142,
4422 * XXX 21143, and Macronix chips.
4423 */
4424 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0);
4425 }
4426
4427 ifmedia_set(&sc->sc_mii.mii_media, defmedia);
4428
4429 /*
4430 * Display any non-MII media we've located.
4431 */
4432 if (sc->sc_media_seen &
4433 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII)))
4434 tlp_print_media(sc);
4435
4436 tlp_sia_fixup(sc);
4437 }
4438
4439 void
4440 tlp_2114x_isv_tmsw_get(sc, ifmr)
4441 struct tulip_softc *sc;
4442 struct ifmediareq *ifmr;
4443 {
4444 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
4445 struct tulip_21x4x_media *tm = ife->ifm_aux;
4446
4447 /*
4448 * We might be polling a non-MII autosense; check for that.
4449 */
4450 if (tm == NULL) {
4451 #ifdef DIAGNOSTIC
4452 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
4453 panic("tlp_2114x_isv_tmsw_get");
4454 #endif
4455 tm = sc->sc_nway_active->ifm_aux;
4456 }
4457
4458 (*tm->tm_get)(sc, ifmr);
4459 }
4460
4461 int
4462 tlp_2114x_isv_tmsw_set(sc)
4463 struct tulip_softc *sc;
4464 {
4465 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
4466 struct tulip_21x4x_media *tm = ife->ifm_aux;
4467
4468 /*
4469 * We might be setting a non-MII autosense; check for that.
4470 */
4471 if (tm == NULL) {
4472 #ifdef DIAGNOSTIC
4473 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
4474 panic("tlp_2114x_isv_tmsw_set");
4475 #endif
4476 /* XXX XXX XXX */
4477 }
4478
4479 /*
4480 * Check to see if we need to reset the chip, and do it. The
4481 * reset path will get the OPMODE register right the next
4482 * time through.
4483 */
4484 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode))
4485 return (tlp_init(sc));
4486
4487 return ((*tm->tm_set)(sc));
4488 }
4489
4490 /*
4491 * MII-on-SIO media switch. Handles only MII attached to the SIO.
4492 */
4493 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *));
4494
4495 const struct tulip_mediasw tlp_sio_mii_mediasw = {
4496 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
4497 };
4498
4499 void
4500 tlp_sio_mii_tmsw_init(sc)
4501 struct tulip_softc *sc;
4502 {
4503 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4504
4505 /*
4506 * We don't attach any media info structures to the ifmedia
4507 * entries, so if we're using a pre-init function that needs
4508 * that info, override it to one that doesn't.
4509 */
4510 if (sc->sc_preinit == tlp_2114x_preinit)
4511 sc->sc_preinit = tlp_2114x_mii_preinit;
4512
4513 sc->sc_mii.mii_ifp = ifp;
4514 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
4515 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
4516 sc->sc_mii.mii_statchg = sc->sc_statchg;
4517 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4518 tlp_mediastatus);
4519 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
4520 MII_OFFSET_ANY);
4521 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
4522 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
4523 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
4524 } else {
4525 sc->sc_flags |= TULIPF_HAS_MII;
4526 sc->sc_tick = tlp_mii_tick;
4527 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
4528 }
4529 }
4530
4531 /*
4532 * Lite-On PNIC media switch. Must handle MII or internal NWAY.
4533 */
4534 void tlp_pnic_tmsw_init __P((struct tulip_softc *));
4535 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
4536 int tlp_pnic_tmsw_set __P((struct tulip_softc *));
4537
4538 const struct tulip_mediasw tlp_pnic_mediasw = {
4539 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set
4540 };
4541
4542 void tlp_pnic_nway_statchg __P((struct device *));
4543 void tlp_pnic_nway_tick __P((void *));
4544 int tlp_pnic_nway_service __P((struct tulip_softc *, int));
4545 void tlp_pnic_nway_reset __P((struct tulip_softc *));
4546 int tlp_pnic_nway_auto __P((struct tulip_softc *, int));
4547 void tlp_pnic_nway_auto_timeout __P((void *));
4548 void tlp_pnic_nway_status __P((struct tulip_softc *));
4549 void tlp_pnic_nway_acomp __P((struct tulip_softc *));
4550
4551 void
4552 tlp_pnic_tmsw_init(sc)
4553 struct tulip_softc *sc;
4554 {
4555 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4556 const char *sep = "";
4557
4558 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL)
4559 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
4560
4561 sc->sc_mii.mii_ifp = ifp;
4562 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg;
4563 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg;
4564 sc->sc_mii.mii_statchg = sc->sc_statchg;
4565 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4566 tlp_mediastatus);
4567 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
4568 MII_OFFSET_ANY);
4569 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
4570 /* XXX What about AUI/BNC support? */
4571 printf("%s: ", sc->sc_dev.dv_xname);
4572
4573 tlp_pnic_nway_reset(sc);
4574
4575 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0),
4576 PNIC_NWAY_TW|PNIC_NWAY_CAP10T);
4577 PRINT("10baseT");
4578
4579 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0),
4580 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX);
4581 PRINT("10baseT-FDX");
4582
4583 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
4584 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX);
4585 PRINT("100baseTX");
4586
4587 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0),
4588 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD|
4589 PNIC_NWAY_CAP100TXFDX);
4590 PRINT("100baseTX-FDX");
4591
4592 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0),
4593 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW|
4594 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX|
4595 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX);
4596 PRINT("auto");
4597
4598 printf("\n");
4599
4600 sc->sc_statchg = tlp_pnic_nway_statchg;
4601 sc->sc_tick = tlp_pnic_nway_tick;
4602 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
4603 } else {
4604 sc->sc_flags |= TULIPF_HAS_MII;
4605 sc->sc_tick = tlp_mii_tick;
4606 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
4607 }
4608
4609 #undef ADD
4610 #undef PRINT
4611 }
4612
4613 void
4614 tlp_pnic_tmsw_get(sc, ifmr)
4615 struct tulip_softc *sc;
4616 struct ifmediareq *ifmr;
4617 {
4618 struct mii_data *mii = &sc->sc_mii;
4619
4620 if (sc->sc_flags & TULIPF_HAS_MII)
4621 tlp_mii_getmedia(sc, ifmr);
4622 else {
4623 mii->mii_media_status = 0;
4624 mii->mii_media_active = IFM_NONE;
4625 tlp_pnic_nway_service(sc, MII_POLLSTAT);
4626 ifmr->ifm_status = sc->sc_mii.mii_media_status;
4627 ifmr->ifm_active = sc->sc_mii.mii_media_active;
4628 }
4629 }
4630
4631 int
4632 tlp_pnic_tmsw_set(sc)
4633 struct tulip_softc *sc;
4634 {
4635 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4636 struct mii_data *mii = &sc->sc_mii;
4637
4638 if (sc->sc_flags & TULIPF_HAS_MII) {
4639 /*
4640 * Make sure the built-in Tx jabber timer is disabled.
4641 */
4642 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS);
4643
4644 return (tlp_mii_setmedia(sc));
4645 }
4646
4647 if (ifp->if_flags & IFF_UP) {
4648 mii->mii_media_status = 0;
4649 mii->mii_media_active = IFM_NONE;
4650 return (tlp_pnic_nway_service(sc, MII_MEDIACHG));
4651 }
4652
4653 return (0);
4654 }
4655
4656 void
4657 tlp_pnic_nway_statchg(self)
4658 struct device *self;
4659 {
4660 struct tulip_softc *sc = (struct tulip_softc *)self;
4661
4662 /* Idle the transmit and receive processes. */
4663 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
4664
4665 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS|
4666 OPMODE_SCR|OPMODE_HBD);
4667
4668 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) {
4669 sc->sc_opmode |= OPMODE_TTM;
4670 TULIP_WRITE(sc, CSR_GPP,
4671 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) |
4672 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1));
4673 } else {
4674 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD;
4675 TULIP_WRITE(sc, CSR_GPP,
4676 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) |
4677 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1));
4678 }
4679
4680 if (sc->sc_mii.mii_media_active & IFM_FDX)
4681 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD;
4682
4683 /*
4684 * Write new OPMODE bits. This also restarts the transmit
4685 * and receive processes.
4686 */
4687 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
4688
4689 /* XXX Update ifp->if_baudrate */
4690 }
4691
4692 void
4693 tlp_pnic_nway_tick(arg)
4694 void *arg;
4695 {
4696 struct tulip_softc *sc = arg;
4697 int s;
4698
4699 s = splnet();
4700 tlp_pnic_nway_service(sc, MII_TICK);
4701 splx(s);
4702
4703 timeout(tlp_pnic_nway_tick, sc, hz);
4704 }
4705
4706 /*
4707 * Support for the Lite-On PNIC internal NWay block. This is constructed
4708 * somewhat like a PHY driver for simplicity.
4709 */
4710
4711 int
4712 tlp_pnic_nway_service(sc, cmd)
4713 struct tulip_softc *sc;
4714 int cmd;
4715 {
4716 struct mii_data *mii = &sc->sc_mii;
4717 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
4718
4719 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
4720 return (0);
4721
4722 switch (cmd) {
4723 case MII_POLLSTAT:
4724 /* Nothing special to do here. */
4725 break;
4726
4727 case MII_MEDIACHG:
4728 switch (IFM_SUBTYPE(ife->ifm_media)) {
4729 case IFM_AUTO:
4730 (void) tlp_pnic_nway_auto(sc, 1);
4731 break;
4732 case IFM_100_T4:
4733 /*
4734 * XXX Not supported as a manual setting right now.
4735 */
4736 return (EINVAL);
4737 default:
4738 /*
4739 * NWAY register data is stored in the ifmedia entry.
4740 */
4741 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
4742 }
4743 break;
4744
4745 case MII_TICK:
4746 /*
4747 * Only used for autonegotiation.
4748 */
4749 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
4750 return (0);
4751
4752 /*
4753 * Check to see if we have link. If we do, we don't
4754 * need to restart the autonegotiation process.
4755 */
4756 if (sc->sc_flags & TULIPF_LINK_UP)
4757 return (0);
4758
4759 /*
4760 * Only retry autonegotiation every 5 seconds.
4761 */
4762 if (++sc->sc_nway_ticks != 5)
4763 return (0);
4764
4765 sc->sc_nway_ticks = 0;
4766 tlp_pnic_nway_reset(sc);
4767 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN)
4768 return (0);
4769 break;
4770 }
4771
4772 /* Update the media status. */
4773 tlp_pnic_nway_status(sc);
4774
4775 /* Callback if something changed. */
4776 if ((sc->sc_nway_active == NULL ||
4777 sc->sc_nway_active->ifm_media != mii->mii_media_active) ||
4778 cmd == MII_MEDIACHG) {
4779 (*sc->sc_statchg)(&sc->sc_dev);
4780 tlp_nway_activate(sc, mii->mii_media_active);
4781 }
4782 return (0);
4783 }
4784
4785 void
4786 tlp_pnic_nway_reset(sc)
4787 struct tulip_softc *sc;
4788 {
4789
4790 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS);
4791 delay(100);
4792 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0);
4793 }
4794
4795 int
4796 tlp_pnic_nway_auto(sc, waitfor)
4797 struct tulip_softc *sc;
4798 int waitfor;
4799 {
4800 struct mii_data *mii = &sc->sc_mii;
4801 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
4802 u_int32_t reg;
4803 int i;
4804
4805 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0)
4806 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
4807
4808 if (waitfor) {
4809 /* Wait 500ms for it to complete. */
4810 for (i = 0; i < 500; i++) {
4811 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
4812 if (reg & PNIC_NWAY_LPAR_MASK) {
4813 tlp_pnic_nway_acomp(sc);
4814 return (0);
4815 }
4816 delay(1000);
4817 }
4818 #if 0
4819 if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
4820 printf("%s: autonegotiation failed to complete\n",
4821 sc->sc_dev.dv_xname);
4822 #endif
4823
4824 /*
4825 * Don't need to worry about clearing DOINGAUTO.
4826 * If that's set, a timeout is pending, and it will
4827 * clear the flag.
4828 */
4829 return (EIO);
4830 }
4831
4832 /*
4833 * Just let it finish asynchronously. This is for the benefit of
4834 * the tick handler driving autonegotiation. Don't want 500ms
4835 * delays all the time while the system is running!
4836 */
4837 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) {
4838 sc->sc_flags |= TULIPF_DOINGAUTO;
4839 timeout(tlp_pnic_nway_auto_timeout, sc, hz >> 1);
4840 }
4841 return (EJUSTRETURN);
4842 }
4843
4844 void
4845 tlp_pnic_nway_auto_timeout(arg)
4846 void *arg;
4847 {
4848 struct tulip_softc *sc = arg;
4849 u_int32_t reg;
4850 int s;
4851
4852 s = splnet();
4853 sc->sc_flags &= ~TULIPF_DOINGAUTO;
4854 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
4855 #if 0
4856 if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
4857 printf("%s: autonegotiation failed to complete\n",
4858 sc->sc_dev.dv_xname);
4859 #endif
4860
4861 tlp_pnic_nway_acomp(sc);
4862
4863 /* Update the media status. */
4864 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT);
4865 splx(s);
4866 }
4867
4868 void
4869 tlp_pnic_nway_status(sc)
4870 struct tulip_softc *sc;
4871 {
4872 struct mii_data *mii = &sc->sc_mii;
4873 u_int32_t reg;
4874
4875 mii->mii_media_status = IFM_AVALID;
4876 mii->mii_media_active = IFM_ETHER;
4877
4878 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
4879
4880 if (sc->sc_flags & TULIPF_LINK_UP)
4881 mii->mii_media_status |= IFM_ACTIVE;
4882
4883 if (reg & PNIC_NWAY_NW) {
4884 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) {
4885 /* Erg, still trying, I guess... */
4886 mii->mii_media_active |= IFM_NONE;
4887 return;
4888 }
4889
4890 #if 0
4891 if (reg & PNIC_NWAY_LPAR100T4)
4892 mii->mii_media_active |= IFM_100_T4;
4893 else
4894 #endif
4895 if (reg & PNIC_NWAY_LPAR100TXFDX)
4896 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
4897 else if (reg & PNIC_NWAY_LPAR100TX)
4898 mii->mii_media_active |= IFM_100_TX;
4899 else if (reg & PNIC_NWAY_LPAR10TFDX)
4900 mii->mii_media_active |= IFM_10_T|IFM_FDX;
4901 else if (reg & PNIC_NWAY_LPAR10T)
4902 mii->mii_media_active |= IFM_10_T;
4903 else
4904 mii->mii_media_active |= IFM_NONE;
4905 } else {
4906 if (reg & PNIC_NWAY_100)
4907 mii->mii_media_active |= IFM_100_TX;
4908 else
4909 mii->mii_media_active |= IFM_10_T;
4910 if (reg & PNIC_NWAY_FD)
4911 mii->mii_media_active |= IFM_FDX;
4912 }
4913 }
4914
4915 void
4916 tlp_pnic_nway_acomp(sc)
4917 struct tulip_softc *sc;
4918 {
4919 u_int32_t reg;
4920
4921 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
4922 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN);
4923
4924 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX))
4925 reg |= PNIC_NWAY_100;
4926 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX))
4927 reg |= PNIC_NWAY_FD;
4928
4929 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg);
4930 }
4931
4932 /*
4933 * Macronix PMAC and Lite-On PNIC-II media switch:
4934 *
4935 * MX98713 and MX98713A 21140-like MII or GPIO media.
4936 *
4937 * MX98713A 21143-like MII or SIA/SYM media.
4938 *
4939 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media.
4940 * 82C115
4941 *
4942 * So, what we do here is fake MII-on-SIO or ISV media info, and
4943 * use the ISV media switch get/set functions to handle the rest.
4944 */
4945
4946 void tlp_pmac_tmsw_init __P((struct tulip_softc *));
4947
4948 const struct tulip_mediasw tlp_pmac_mediasw = {
4949 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set
4950 };
4951
4952 const struct tulip_mediasw tlp_pmac_mii_mediasw = {
4953 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
4954 };
4955
4956 void
4957 tlp_pmac_tmsw_init(sc)
4958 struct tulip_softc *sc;
4959 {
4960 static const u_int8_t media[] = {
4961 TULIP_ROM_MB_MEDIA_TP,
4962 TULIP_ROM_MB_MEDIA_TP_FDX,
4963 TULIP_ROM_MB_MEDIA_100TX,
4964 TULIP_ROM_MB_MEDIA_100TX_FDX,
4965 };
4966 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4967
4968 sc->sc_mii.mii_ifp = ifp;
4969 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
4970 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
4971 sc->sc_mii.mii_statchg = sc->sc_statchg;
4972 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4973 tlp_mediastatus);
4974 if (sc->sc_chip == TULIP_CHIP_MX98713 ||
4975 sc->sc_chip == TULIP_CHIP_MX98713A) {
4976 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4977 MII_PHY_ANY, MII_OFFSET_ANY);
4978 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) {
4979 sc->sc_flags |= TULIPF_HAS_MII;
4980 sc->sc_tick = tlp_mii_tick;
4981 sc->sc_preinit = tlp_2114x_mii_preinit;
4982 sc->sc_mediasw = &tlp_pmac_mii_mediasw;
4983 ifmedia_set(&sc->sc_mii.mii_media,
4984 IFM_ETHER|IFM_AUTO);
4985 return;
4986 }
4987 }
4988
4989 switch (sc->sc_chip) {
4990 case TULIP_CHIP_MX98713:
4991 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR,
4992 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4);
4993
4994 /*
4995 * XXX Should implement auto-sense for this someday,
4996 * XXX when we do the same for the 21140.
4997 */
4998 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4999 break;
5000
5001 default:
5002 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA,
5003 tlp_sia_get, tlp_sia_set, media, 2);
5004 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM,
5005 tlp_sia_get, tlp_sia_set, media + 2, 2);
5006
5007 /*
5008 * XXX Autonegotiation not yet supported.
5009 */
5010 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
5011 break;
5012 }
5013
5014 tlp_print_media(sc);
5015 tlp_sia_fixup(sc);
5016
5017 /* Set the LED modes. */
5018 tlp_pmac_reset(sc);
5019
5020 sc->sc_reset = tlp_pmac_reset;
5021 }
5022
5023 /*
5024 * ADMtek AL981 media switch. Only has internal PHY.
5025 */
5026 void tlp_al981_tmsw_init __P((struct tulip_softc *));
5027
5028 const struct tulip_mediasw tlp_al981_mediasw = {
5029 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5030 };
5031
5032 void
5033 tlp_al981_tmsw_init(sc)
5034 struct tulip_softc *sc;
5035 {
5036 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5037
5038 sc->sc_mii.mii_ifp = ifp;
5039 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg;
5040 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg;
5041 sc->sc_mii.mii_statchg = sc->sc_statchg;
5042 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5043 tlp_mediastatus);
5044 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5045 MII_OFFSET_ANY);
5046 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5047 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5048 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5049 } else {
5050 sc->sc_flags |= TULIPF_HAS_MII;
5051 sc->sc_tick = tlp_mii_tick;
5052 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5053 }
5054 }
5055