Home | History | Annotate | Line # | Download | only in ic
tulip.c revision 1.5
      1 /*	$NetBSD: tulip.c,v 1.5 1999/09/02 23:25:28 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Device driver for the Digital Semiconductor ``Tulip'' (21x4x)
     42  * Ethernet controller family, and a variety of clone chips.
     43  */
     44 
     45 #include "opt_inet.h"
     46 #include "opt_ns.h"
     47 #include "bpfilter.h"
     48 
     49 #include <sys/param.h>
     50 #include <sys/systm.h>
     51 #include <sys/mbuf.h>
     52 #include <sys/malloc.h>
     53 #include <sys/kernel.h>
     54 #include <sys/socket.h>
     55 #include <sys/ioctl.h>
     56 #include <sys/errno.h>
     57 #include <sys/device.h>
     58 
     59 #include <vm/vm.h>		/* for PAGE_SIZE */
     60 
     61 #include <net/if.h>
     62 #include <net/if_dl.h>
     63 #include <net/if_media.h>
     64 #include <net/if_ether.h>
     65 
     66 #if NBPFILTER > 0
     67 #include <net/bpf.h>
     68 #endif
     69 
     70 #ifdef INET
     71 #include <netinet/in.h>
     72 #include <netinet/if_inarp.h>
     73 #endif
     74 
     75 #ifdef NS
     76 #include <netns/ns.h>
     77 #include <netns/ns_if.h>
     78 #endif
     79 
     80 #include <machine/bus.h>
     81 #include <machine/intr.h>
     82 
     83 #include <dev/mii/mii.h>
     84 #include <dev/mii/miivar.h>
     85 
     86 #include <dev/ic/tulipreg.h>
     87 #include <dev/ic/tulipvar.h>
     88 
     89 /*
     90  * The following tables compute the transmit threshold mode.  We start
     91  * at index 0.  When ever we get a transmit underrun, we increment our
     92  * index, falling back if we encounter the NULL terminator.
     93  *
     94  * Note: Store and forward mode is only available on the 100mbps chips
     95  * (21140 and higher).
     96  */
     97 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = {
     98 	{ OPMODE_TR_72,		"72 bytes" },
     99 	{ OPMODE_TR_96,		"96 bytes" },
    100 	{ OPMODE_TR_128,	"128 bytes" },
    101 	{ OPMODE_TR_160,	"160 bytes" },
    102 	{ 0,			NULL },
    103 };
    104 
    105 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = {
    106 	{ OPMODE_TR_72,		"72/128 bytes" },
    107 	{ OPMODE_TR_96,		"96/256 bytes" },
    108 	{ OPMODE_TR_128,	"128/512 bytes" },
    109 	{ OPMODE_TR_160,	"160/1024 bytes" },
    110 	{ OPMODE_SF,		"store and forward mode" },
    111 	{ 0,			NULL },
    112 };
    113 
    114 #define	TXTH_72		0
    115 #define	TXTH_96		1
    116 #define	TXTH_128	2
    117 #define	TXTH_160	3
    118 #define	TXTH_SF		4
    119 
    120 /*
    121  * The Winbond 89C840F does transmit threshold control totally
    122  * differently.  It simply has a 7-bit field which indicates
    123  * the threshold:
    124  *
    125  *	txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16;
    126  *
    127  * However, we just do Store-and-Forward mode on these chips, since
    128  * the DMA engines seem to be flaky.
    129  */
    130 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = {
    131 	{ 0,			"store and forward mode" },
    132 	{ 0,			NULL },
    133 };
    134 
    135 #define	TXTH_WINB_SF	0
    136 
    137 void	tlp_start __P((struct ifnet *));
    138 void	tlp_watchdog __P((struct ifnet *));
    139 int	tlp_ioctl __P((struct ifnet *, u_long, caddr_t));
    140 
    141 void	tlp_shutdown __P((void *));
    142 
    143 void	tlp_reset __P((struct tulip_softc *));
    144 int	tlp_init __P((struct tulip_softc *));
    145 void	tlp_rxdrain __P((struct tulip_softc *));
    146 void	tlp_stop __P((struct tulip_softc *, int));
    147 int	tlp_add_rxbuf __P((struct tulip_softc *, int));
    148 void	tlp_idle __P((struct tulip_softc *, u_int32_t));
    149 void	tlp_srom_idle __P((struct tulip_softc *));
    150 
    151 void	tlp_filter_setup __P((struct tulip_softc *));
    152 void	tlp_winb_filter_setup __P((struct tulip_softc *));
    153 
    154 void	tlp_rxintr __P((struct tulip_softc *));
    155 void	tlp_txintr __P((struct tulip_softc *));
    156 
    157 void	tlp_mii_tick __P((void *));
    158 void	tlp_mii_statchg __P((struct device *));
    159 void	tlp_winb_mii_statchg __P((struct device *));
    160 
    161 void	tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *));
    162 int	tlp_mii_setmedia __P((struct tulip_softc *));
    163 
    164 void	tlp_sio_mii_sync __P((struct tulip_softc *));
    165 void	tlp_sio_mii_sendbits __P((struct tulip_softc *, u_int32_t, int));
    166 int	tlp_sio_mii_readreg __P((struct device *, int, int));
    167 void	tlp_sio_mii_writereg __P((struct device *, int, int, int));
    168 
    169 int	tlp_pnic_mii_readreg __P((struct device *, int, int));
    170 void	tlp_pnic_mii_writereg __P((struct device *, int, int, int));
    171 
    172 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t));
    173 #define	tlp_mchash(addr)	(tlp_crc32((addr), ETHER_ADDR_LEN) &	\
    174 				 (TULIP_MCHASHSIZE - 1))
    175 
    176 #ifdef TLP_DEBUG
    177 #define	DPRINTF(sc, x)	if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \
    178 				printf x
    179 #else
    180 #define	DPRINTF(sc, x)	/* nothing */
    181 #endif
    182 
    183 /*
    184  * tlp_attach:
    185  *
    186  *	Attach a Tulip interface to the system.
    187  */
    188 void
    189 tlp_attach(sc, name, enaddr)
    190 	struct tulip_softc *sc;
    191 	const char *name;
    192 	const u_int8_t *enaddr;
    193 {
    194 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
    195 	int i, rseg, error;
    196 	bus_dma_segment_t seg;
    197 
    198 	/*
    199 	 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift!
    200 	 */
    201 
    202 	/*
    203 	 * Setup the transmit threshold table.
    204 	 */
    205 	switch (sc->sc_chip) {
    206 	case TULIP_CHIP_DE425:
    207 	case TULIP_CHIP_21040:
    208 	case TULIP_CHIP_21041:
    209 		sc->sc_txth = tlp_10_txthresh_tab;
    210 		break;
    211 
    212 	default:
    213 		sc->sc_txth = tlp_10_100_txthresh_tab;
    214 		break;
    215 	}
    216 
    217 	/*
    218 	 * Setup the filter setup function.
    219 	 */
    220 	switch (sc->sc_chip) {
    221 	case TULIP_CHIP_WB89C840F:
    222 		sc->sc_filter_setup = tlp_winb_filter_setup;
    223 		break;
    224 
    225 	default:
    226 		sc->sc_filter_setup = tlp_filter_setup;
    227 		break;
    228 	}
    229 
    230 	/*
    231 	 * Set up the media status change function.
    232 	 */
    233 	switch (sc->sc_chip) {
    234 	case TULIP_CHIP_WB89C840F:
    235 		sc->sc_statchg = tlp_winb_mii_statchg;
    236 		break;
    237 
    238 	default:
    239 		sc->sc_statchg = tlp_mii_statchg;
    240 		break;
    241 	}
    242 
    243 	/*
    244 	 * Set up various chip-specific quirks.
    245 	 */
    246 	switch (sc->sc_chip) {
    247 	case TULIP_CHIP_82C168:
    248 	case TULIP_CHIP_82C169:
    249 		/*
    250 		 * These chips seem to have busted DMA engines; just put them
    251 		 * in Store-and-Forward mode from the get-go.
    252 		 */
    253 		sc->sc_txthresh = TXTH_SF;
    254 		break;
    255 
    256 	case TULIP_CHIP_WB89C840F:
    257 		sc->sc_flags |= TULIPF_IC_FS;
    258 		break;
    259 
    260 	default:
    261 		/* Nothing. */
    262 	}
    263 
    264 	SIMPLEQ_INIT(&sc->sc_txfreeq);
    265 	SIMPLEQ_INIT(&sc->sc_txdirtyq);
    266 
    267 	/*
    268 	 * Allocate the control data structures, and create and load the
    269 	 * DMA map for it.
    270 	 */
    271 	if ((error = bus_dmamem_alloc(sc->sc_dmat,
    272 	    sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg,
    273 	    0)) != 0) {
    274 		printf("%s: unable to allocate control data, error = %d\n",
    275 		    sc->sc_dev.dv_xname, error);
    276 		goto fail_0;
    277 	}
    278 
    279 	if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
    280 	    sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data,
    281 	    BUS_DMA_COHERENT)) != 0) {
    282 		printf("%s: unable to map control data, error = %d\n",
    283 		    sc->sc_dev.dv_xname, error);
    284 		goto fail_1;
    285 	}
    286 
    287 	if ((error = bus_dmamap_create(sc->sc_dmat,
    288 	    sizeof(struct tulip_control_data), 1,
    289 	    sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
    290 		printf("%s: unable to create control data DMA map, "
    291 		    "error = %d\n", sc->sc_dev.dv_xname, error);
    292 		goto fail_2;
    293 	}
    294 
    295 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
    296 	    sc->sc_control_data, sizeof(struct tulip_control_data), NULL,
    297 	    0)) != 0) {
    298 		printf("%s: unable to load control data DMA map, error = %d\n",
    299 		    sc->sc_dev.dv_xname, error);
    300 		goto fail_3;
    301 	}
    302 
    303 	/*
    304 	 * Create the transmit buffer DMA maps.
    305 	 */
    306 	for (i = 0; i < TULIP_TXQUEUELEN; i++) {
    307 		if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
    308 		    TULIP_NTXSEGS, MCLBYTES, 0, 0,
    309 		    &sc->sc_txsoft[i].txs_dmamap)) != 0) {
    310 			printf("%s: unable to create tx DMA map %d, "
    311 			    "error = %d\n", sc->sc_dev.dv_xname, i, error);
    312 			goto fail_4;
    313 		}
    314 	}
    315 
    316 	/*
    317 	 * Create the recieve buffer DMA maps.
    318 	 */
    319 	for (i = 0; i < TULIP_NRXDESC; i++) {
    320 		if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
    321 		    MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
    322 			printf("%s: unable to create rx DMA map %d, "
    323 			    "error = %d\n", sc->sc_dev.dv_xname, i, error);
    324 			goto fail_5;
    325 		}
    326 		sc->sc_rxsoft[i].rxs_mbuf = NULL;
    327 	}
    328 
    329 	/*
    330 	 * Reset the chip to a known state.
    331 	 */
    332 	tlp_reset(sc);
    333 
    334 	/* Announce ourselves. */
    335 	printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname,
    336 	    name != NULL ? name : "", name != NULL ? ", " : "",
    337 	    ether_sprintf(enaddr));
    338 
    339 	/*
    340 	 * Initialize our media structures.  This may probe the MII, if
    341 	 * present.
    342 	 */
    343 	(*sc->sc_mediasw->tmsw_init)(sc);
    344 
    345 	ifp = &sc->sc_ethercom.ec_if;
    346 	strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
    347 	ifp->if_softc = sc;
    348 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
    349 	ifp->if_ioctl = tlp_ioctl;
    350 	ifp->if_start = tlp_start;
    351 	ifp->if_watchdog = tlp_watchdog;
    352 
    353 	/*
    354 	 * Attach the interface.
    355 	 */
    356 	if_attach(ifp);
    357 	ether_ifattach(ifp, enaddr);
    358 #if NBPFILTER > 0
    359 	bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
    360 	    sizeof(struct ether_header));
    361 #endif
    362 
    363 	/*
    364 	 * Make sure the interface is shutdown during reboot.
    365 	 */
    366 	sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc);
    367 	if (sc->sc_sdhook == NULL)
    368 		printf("%s: WARNING: unable to establish shutdown hook\n",
    369 		    sc->sc_dev.dv_xname);
    370 	return;
    371 
    372 	/*
    373 	 * Free any resources we've allocated during the failed attach
    374 	 * attempt.  Do this in reverse order and fall through.
    375 	 */
    376  fail_5:
    377 	for (i = 0; i < TULIP_NRXDESC; i++) {
    378 		if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
    379 			bus_dmamap_destroy(sc->sc_dmat,
    380 			    sc->sc_rxsoft[i].rxs_dmamap);
    381 	}
    382  fail_4:
    383 	for (i = 0; i < TULIP_TXQUEUELEN; i++) {
    384 		if (sc->sc_txsoft[i].txs_dmamap != NULL)
    385 			bus_dmamap_destroy(sc->sc_dmat,
    386 			    sc->sc_txsoft[i].txs_dmamap);
    387 	}
    388 	bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
    389  fail_3:
    390 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
    391  fail_2:
    392 	bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
    393 	    sizeof(struct tulip_control_data));
    394  fail_1:
    395 	bus_dmamem_free(sc->sc_dmat, &seg, rseg);
    396  fail_0:
    397 	return;
    398 }
    399 
    400 /*
    401  * tlp_shutdown:
    402  *
    403  *	Make sure the interface is stopped at reboot time.
    404  */
    405 void
    406 tlp_shutdown(arg)
    407 	void *arg;
    408 {
    409 	struct tulip_softc *sc = arg;
    410 
    411 	tlp_stop(sc, 1);
    412 }
    413 
    414 /*
    415  * tlp_start:		[ifnet interface function]
    416  *
    417  *	Start packet transmission on the interface.
    418  */
    419 void
    420 tlp_start(ifp)
    421 	struct ifnet *ifp;
    422 {
    423 	struct tulip_softc *sc = ifp->if_softc;
    424 	struct mbuf *m0, *m;
    425 	struct tulip_txsoft *txs, *last_txs;
    426 	bus_dmamap_t dmamap;
    427 	int error, firsttx, nexttx, lasttx, ofree, seg;
    428 
    429 	DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n",
    430 	    sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags));
    431 
    432 	/*
    433 	 * If we want a filter setup, it means no more descriptors were
    434 	 * available for the setup routine.  Let it get a chance to wedge
    435 	 * itself into the ring.
    436 	 */
    437 	if (sc->sc_flags & TULIPF_WANT_SETUP)
    438 		ifp->if_flags |= IFF_OACTIVE;
    439 
    440 	if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
    441 		return;
    442 
    443 	/*
    444 	 * Remember the previous number of free descriptors and
    445 	 * the first descriptor we'll use.
    446 	 */
    447 	ofree = sc->sc_txfree;
    448 	firsttx = sc->sc_txnext;
    449 
    450 	DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n",
    451 	    sc->sc_dev.dv_xname, ofree, firsttx));
    452 
    453 	/*
    454 	 * Loop through the send queue, setting up transmit descriptors
    455 	 * until we drain the queue, or use up all available transmit
    456 	 * descriptors.
    457 	 */
    458 	while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL &&
    459 	       sc->sc_txfree != 0) {
    460 		/*
    461 		 * Grab a packet off the queue.
    462 		 */
    463 		IF_DEQUEUE(&ifp->if_snd, m0);
    464 		if (m0 == NULL)
    465 			break;
    466 
    467 		dmamap = txs->txs_dmamap;
    468 
    469 		/*
    470 		 * Load the DMA map.  If this fails, the packet either
    471 		 * didn't fit in the alloted number of segments, or we were
    472 		 * short on resources.  In this case, we'll copy and try
    473 		 * again.
    474 		 */
    475 		if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
    476 		    BUS_DMA_NOWAIT) != 0) {
    477 			MGETHDR(m, M_DONTWAIT, MT_DATA);
    478 			if (m == NULL) {
    479 				printf("%s: unable to allocate Tx mbuf\n",
    480 				    sc->sc_dev.dv_xname);
    481 				IF_PREPEND(&ifp->if_snd, m0);
    482 				break;
    483 			}
    484 			if (m0->m_pkthdr.len > MHLEN) {
    485 				MCLGET(m, M_DONTWAIT);
    486 				if ((m->m_flags & M_EXT) == 0) {
    487 					printf("%s: unable to allocate Tx "
    488 					    "cluster\n", sc->sc_dev.dv_xname);
    489 					m_freem(m);
    490 					IF_PREPEND(&ifp->if_snd, m0);
    491 					break;
    492 				}
    493 			}
    494 			m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
    495 			m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
    496 			m_freem(m0);
    497 			m0 = m;
    498 			error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
    499 			    m0, BUS_DMA_NOWAIT);
    500 			if (error) {
    501 				printf("%s: unable to load Tx buffer, "
    502 				    "error = %d\n", sc->sc_dev.dv_xname, error);
    503 				IF_PREPEND(&ifp->if_snd, m0);
    504 				break;
    505 			}
    506 		}
    507 
    508 		/*
    509 		 * Ensure we have enough descriptors free to describe
    510 		 * the packet.
    511 		 */
    512 		if (dmamap->dm_nsegs > sc->sc_txfree) {
    513 			/*
    514 			 * Not enough free descriptors to transmit this
    515 			 * packet.  We haven't committed to anything yet,
    516 			 * so just unload the DMA map, put the packet
    517 			 * back on the queue, and punt.  Notify the upper
    518 			 * layer that there are no more slots left.
    519 			 *
    520 			 * XXX We could allocate an mbuf and copy, but
    521 			 * XXX it is worth it?
    522 			 */
    523 			ifp->if_flags |= IFF_OACTIVE;
    524 			bus_dmamap_unload(sc->sc_dmat, dmamap);
    525 			IF_PREPEND(&ifp->if_snd, m0);
    526 			break;
    527 		}
    528 
    529 		/*
    530 		 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET.
    531 		 */
    532 
    533 		/* Sync the DMA map. */
    534 		bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
    535 		    BUS_DMASYNC_PREWRITE);
    536 
    537 		/*
    538 		 * Initialize the transmit descriptors.
    539 		 */
    540 		for (nexttx = sc->sc_txnext, seg = 0;
    541 		     seg < dmamap->dm_nsegs;
    542 		     seg++, nexttx = TULIP_NEXTTX(nexttx)) {
    543 			/*
    544 			 * If this is the first descriptor we're
    545 			 * enqueueing, don't set the OWN bit just
    546 			 * yet.  That could cause a race condition.
    547 			 * We'll do it below.
    548 			 */
    549 			sc->sc_txdescs[nexttx].td_status =
    550 			    (nexttx == firsttx) ? 0 : TDSTAT_OWN;
    551 			sc->sc_txdescs[nexttx].td_bufaddr1 =
    552 			    dmamap->dm_segs[seg].ds_addr;
    553 			sc->sc_txdescs[nexttx].td_ctl =
    554 			    (dmamap->dm_segs[seg].ds_len << TDCTL_SIZE1_SHIFT) |
    555 			    TDCTL_CH;
    556 			lasttx = nexttx;
    557 		}
    558 
    559 		/* Set `first segment' and `last segment' appropriately. */
    560 		sc->sc_txdescs[sc->sc_txnext].td_ctl |= TDCTL_Tx_FS;
    561 		sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_LS;
    562 
    563 #ifdef TLP_DEBUG
    564 		if (ifp->if_flags & IFF_DEBUG) {
    565 			printf("     txsoft %p trainsmit chain:\n", txs);
    566 			for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) {
    567 				printf("     descriptor %d:\n", seg);
    568 				printf("       td_status:   0x%08x\n",
    569 				    sc->sc_txdescs[seg].td_status);
    570 				printf("       td_ctl:      0x%08x\n",
    571 				    sc->sc_txdescs[seg].td_ctl);
    572 				printf("       td_bufaddr1: 0x%08x\n",
    573 				    sc->sc_txdescs[seg].td_bufaddr1);
    574 				printf("       td_bufaddr2: 0x%08x\n",
    575 				    sc->sc_txdescs[seg].td_bufaddr2);
    576 				if (seg == lasttx)
    577 					break;
    578 			}
    579 		}
    580 #endif
    581 
    582 		/* Sync the descriptors we're using. */
    583 		TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
    584 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    585 
    586 		/*
    587 		 * Store a pointer to the packet so we can free it later,
    588 		 * and remember what txdirty will be once the packet is
    589 		 * done.
    590 		 */
    591 		txs->txs_mbuf = m0;
    592 		txs->txs_firstdesc = sc->sc_txnext;
    593 		txs->txs_lastdesc = lasttx;
    594 
    595 		/* Advance the tx pointer. */
    596 		sc->sc_txfree -= dmamap->dm_nsegs;
    597 		sc->sc_txnext = nexttx;
    598 
    599 		SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q);
    600 		SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
    601 
    602 		last_txs = txs;
    603 
    604 #if NBPFILTER > 0
    605 		/*
    606 		 * Pass the packet to any BPF listeners.
    607 		 */
    608 		if (ifp->if_bpf)
    609 			bpf_mtap(ifp->if_bpf, m0);
    610 #endif /* NBPFILTER > 0 */
    611 	}
    612 
    613 	if (txs == NULL || sc->sc_txfree == 0) {
    614 		/* No more slots left; notify upper layer. */
    615 		ifp->if_flags |= IFF_OACTIVE;
    616 	}
    617 
    618 	if (sc->sc_txfree != ofree) {
    619 		DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n",
    620 		    sc->sc_dev.dv_xname, lasttx, firsttx));
    621 		/*
    622 		 * Cause a transmit interrupt to happen on the
    623 		 * last packet we enqueued.
    624 		 */
    625 		sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_IC;
    626 		TULIP_CDTXSYNC(sc, lasttx, 1,
    627 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    628 
    629 		/*
    630 		 * Some clone chips want IC on the *first* segment in
    631 		 * the packet.  Appease them.
    632 		 */
    633 		if ((sc->sc_flags & TULIPF_IC_FS) != 0 &&
    634 		    last_txs->txs_firstdesc != lasttx) {
    635 			sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |=
    636 			    TDCTL_Tx_IC;
    637 			TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1,
    638 			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    639 		}
    640 
    641 		/*
    642 		 * The entire packet chain is set up.  Give the
    643 		 * first descriptor to the chip now.
    644 		 */
    645 		sc->sc_txdescs[firsttx].td_status |= TDSTAT_OWN;
    646 		TULIP_CDTXSYNC(sc, firsttx, 1,
    647 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    648 
    649 		/* Wake up the transmitter. */
    650 		/* XXX USE AUTOPOLLING? */
    651 		TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
    652 
    653 		/* Set a watchdog timer in case the chip flakes out. */
    654 		ifp->if_timer = 5;
    655 	}
    656 }
    657 
    658 /*
    659  * tlp_watchdog:	[ifnet interface function]
    660  *
    661  *	Watchdog timer handler.
    662  */
    663 void
    664 tlp_watchdog(ifp)
    665 	struct ifnet *ifp;
    666 {
    667 	struct tulip_softc *sc = ifp->if_softc;
    668 	int doing_setup, doing_transmit;
    669 
    670 	doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP);
    671 	doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL);
    672 
    673 	if (doing_setup && doing_transmit) {
    674 		printf("%s: filter setup and transmit timeout\n",
    675 		    sc->sc_dev.dv_xname);
    676 		ifp->if_oerrors++;
    677 	} else if (doing_transmit) {
    678 		printf("%s: transmit timeout\n", sc->sc_dev.dv_xname);
    679 		ifp->if_oerrors++;
    680 	} else if (doing_setup)
    681 		printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname);
    682 	else
    683 		printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname);
    684 
    685 	(void) tlp_init(sc);
    686 
    687 	/* Try to get more packets going. */
    688 	tlp_start(ifp);
    689 }
    690 
    691 /*
    692  * tlp_ioctl:		[ifnet interface function]
    693  *
    694  *	Handle control requests from the operator.
    695  */
    696 int
    697 tlp_ioctl(ifp, cmd, data)
    698 	struct ifnet *ifp;
    699 	u_long cmd;
    700 	caddr_t data;
    701 {
    702 	struct tulip_softc *sc = ifp->if_softc;
    703 	struct ifreq *ifr = (struct ifreq *)data;
    704 	struct ifaddr *ifa = (struct ifaddr *)data;
    705 	int s, error = 0;
    706 
    707 	s = splnet();
    708 
    709 	switch (cmd) {
    710 	case SIOCSIFADDR:
    711 		ifp->if_flags |= IFF_UP;
    712 
    713 		switch (ifa->ifa_addr->sa_family) {
    714 #ifdef INET
    715 		case AF_INET:
    716 			if ((error = tlp_init(sc)) != 0)
    717 				break;
    718 			arp_ifinit(ifp, ifa);
    719 			break;
    720 #endif /* INET */
    721 #ifdef NS
    722 		case AF_NS:
    723 		    {
    724 			struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
    725 
    726 			if (ns_nullhost(*ina))
    727 				ina->x_host = *(union ns_host *)
    728 				    LLADDR(ifp->if_sadl);
    729 			else
    730 				bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
    731 				    ifp->if_addrlen);
    732 			/* Set new address. */
    733 			error = tlp_init(sc);
    734 			break;
    735 		    }
    736 #endif /* NS */
    737 		default:
    738 			error = tlp_init(sc);
    739 			break;
    740 		}
    741 		break;
    742 
    743 	case SIOCSIFMTU:
    744 		if (ifr->ifr_mtu > ETHERMTU)
    745 			error = EINVAL;
    746 		else
    747 			ifp->if_mtu = ifr->ifr_mtu;
    748 		break;
    749 
    750 	case SIOCSIFFLAGS:
    751 		if ((ifp->if_flags & IFF_UP) == 0 &&
    752 		    (ifp->if_flags & IFF_RUNNING) != 0) {
    753 			/*
    754 			 * If interface is marked down and it is running, then
    755 			 * stop it.
    756 			 */
    757 			tlp_stop(sc, 1);
    758 		} else if ((ifp->if_flags & IFF_UP) != 0 &&
    759 			   (ifp->if_flags & IFF_RUNNING) == 0) {
    760 			/*
    761 			 * If interfase it marked up and it is stopped, then
    762 			 * start it.
    763 			 */
    764 			error = tlp_init(sc);
    765 		} else if ((ifp->if_flags & IFF_UP) != 0) {
    766 			/*
    767 			 * Reset the interface to pick up changes in any other
    768 			 * flags that affect the hardware state.
    769 			 */
    770 			error = tlp_init(sc);
    771 		}
    772 		break;
    773 
    774 	case SIOCADDMULTI:
    775 	case SIOCDELMULTI:
    776 		error = (cmd == SIOCADDMULTI) ?
    777 		    ether_addmulti(ifr, &sc->sc_ethercom) :
    778 		    ether_delmulti(ifr, &sc->sc_ethercom);
    779 
    780 		if (error == ENETRESET) {
    781 			/*
    782 			 * Multicast list has changed.  Set the filter
    783 			 * accordingly.
    784 			 */
    785 			(*sc->sc_filter_setup)(sc);
    786 			error = 0;
    787 		}
    788 		break;
    789 
    790 	case SIOCSIFMEDIA:
    791 	case SIOCGIFMEDIA:
    792 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
    793 		break;
    794 
    795 	default:
    796 		error = EINVAL;
    797 		break;
    798 	}
    799 
    800 	/* Try to get more packets going. */
    801 	tlp_start(ifp);
    802 
    803 	splx(s);
    804 	return (error);
    805 }
    806 
    807 /*
    808  * tlp_intr:
    809  *
    810  *	Interrupt service routine.
    811  */
    812 int
    813 tlp_intr(arg)
    814 	void *arg;
    815 {
    816 	struct tulip_softc *sc = arg;
    817 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
    818 	u_int32_t status, rxstatus, txstatus;
    819 	int handled = 0, txthresh;
    820 
    821 	DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname));
    822 
    823 	for (;;) {
    824 		status = TULIP_READ(sc, CSR_STATUS);
    825 		if (status)
    826 			TULIP_WRITE(sc, CSR_STATUS, status);
    827 
    828 		if ((status & sc->sc_inten) == 0)
    829 			break;
    830 
    831 		handled = 1;
    832 
    833 		rxstatus = status & sc->sc_rxint_mask;
    834 		txstatus = status & sc->sc_txint_mask;
    835 
    836 		if (rxstatus) {
    837 			/* Grab new any new packets. */
    838 			tlp_rxintr(sc);
    839 
    840 			if (rxstatus & STATUS_RWT)
    841 				printf("%s: receive watchdog timeout\n",
    842 				    sc->sc_dev.dv_xname);
    843 
    844 			if (rxstatus & STATUS_RU) {
    845 				printf("%s: receive ring overrun\n",
    846 				    sc->sc_dev.dv_xname);
    847 				/* Get the receive process going again. */
    848 				tlp_idle(sc, OPMODE_SR);
    849 				TULIP_WRITE(sc, CSR_RXLIST,
    850 				    TULIP_CDRXADDR(sc, sc->sc_rxptr));
    851 				TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
    852 				TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
    853 				break;
    854 			}
    855 		}
    856 
    857 		if (txstatus) {
    858 			/* Sweep up transmit descriptors. */
    859 			tlp_txintr(sc);
    860 
    861 			if (txstatus & STATUS_TJT)
    862 				printf("%s: transmit jabber timeout\n",
    863 				    sc->sc_dev.dv_xname);
    864 
    865 			if (txstatus & STATUS_UNF) {
    866 				/*
    867 				 * Increase our transmit threshold if
    868 				 * another is available.
    869 				 */
    870 				txthresh = sc->sc_txthresh + 1;
    871 				if (sc->sc_txth[txthresh].txth_name != NULL) {
    872 					/* Idle the transmit process. */
    873 					tlp_idle(sc, OPMODE_ST);
    874 
    875 					sc->sc_txthresh = txthresh;
    876 					sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF);
    877 					sc->sc_opmode |=
    878 					    sc->sc_txth[txthresh].txth_opmode;
    879 					printf("%s: transmit underrun; new "
    880 					    "threshold: %s\n",
    881 					    sc->sc_dev.dv_xname,
    882 					    sc->sc_txth[txthresh].txth_name);
    883 
    884 					/*
    885 					 * Set the new threshold and restart
    886 					 * the transmit process.
    887 					 */
    888 					TULIP_WRITE(sc, CSR_OPMODE,
    889 					    sc->sc_opmode);
    890 				}
    891 					/*
    892 					 * XXX Log every Nth underrun from
    893 					 * XXX now on?
    894 					 */
    895 			}
    896 		}
    897 
    898 		if (status & (STATUS_TPS|STATUS_RPS)) {
    899 			if (status & STATUS_TPS)
    900 				printf("%s: transmit process stopped\n",
    901 				    sc->sc_dev.dv_xname);
    902 			if (status & STATUS_RPS)
    903 				printf("%s: receive process stopped\n",
    904 				    sc->sc_dev.dv_xname);
    905 			(void) tlp_init(sc);
    906 			break;
    907 		}
    908 
    909 		if (status & STATUS_SE) {
    910 			const char *str;
    911 			switch (status & STATUS_EB) {
    912 			case STATUS_EB_PARITY:
    913 				str = "parity error";
    914 				break;
    915 
    916 			case STATUS_EB_MABT:
    917 				str = "master abort";
    918 				break;
    919 
    920 			case STATUS_EB_TABT:
    921 				str = "target abort";
    922 				break;
    923 
    924 			default:
    925 				str = "unknown error";
    926 				break;
    927 			}
    928 			printf("%s: fatal system error: %s\n",
    929 			    sc->sc_dev.dv_xname, str);
    930 			(void) tlp_init(sc);
    931 			break;
    932 		}
    933 
    934 		/*
    935 		 * Not handled:
    936 		 *
    937 		 *	Transmit buffer unavailable -- normal
    938 		 *	condition, nothing to do, really.
    939 		 *
    940 		 *	General purpose timer experied -- we don't
    941 		 *	use the general purpose timer.
    942 		 *
    943 		 *	Early receive interrupt -- not available on
    944 		 *	all chips, we just use RI.  We also only
    945 		 *	use single-segment receive DMA, so this
    946 		 *	is mostly useless.
    947 		 */
    948 	}
    949 
    950 	/* Try to get more packets going. */
    951 	tlp_start(ifp);
    952 
    953 	return (handled);
    954 }
    955 
    956 /*
    957  * tlp_rxintr:
    958  *
    959  *	Helper; handle receive interrupts.
    960  */
    961 void
    962 tlp_rxintr(sc)
    963 	struct tulip_softc *sc;
    964 {
    965 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
    966 	struct ether_header *eh;
    967 	struct tulip_rxsoft *rxs;
    968 	struct mbuf *m;
    969 	u_int32_t rxstat;
    970 	int i, len;
    971 
    972 	for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) {
    973 		rxs = &sc->sc_rxsoft[i];
    974 
    975 		TULIP_CDRXSYNC(sc, i,
    976 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
    977 
    978 		rxstat = sc->sc_rxdescs[i].td_status;
    979 
    980 		if (rxstat & TDSTAT_OWN) {
    981 			/*
    982 			 * We have processed all of the receive buffers.
    983 			 */
    984 			break;
    985 		}
    986 
    987 		/*
    988 		 * Make sure the packet fit in one buffer.  This should
    989 		 * always be the case.  But the Lite-On PNIC, rev 33
    990 		 * has an awful receive engine bug, which may require
    991 		 * a very icky work-around.
    992 		 */
    993 		if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) !=
    994 		    (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) {
    995 			printf("%s: incoming packet spilled, resetting\n",
    996 			    sc->sc_dev.dv_xname);
    997 			(void) tlp_init(sc);
    998 			return;
    999 		}
   1000 
   1001 		/*
   1002 		 * If any collisions were seen on the wire, count one.
   1003 		 */
   1004 		if (rxstat & TDSTAT_Rx_CS)
   1005 			ifp->if_collisions++;
   1006 
   1007 		/*
   1008 		 * If an error occured, update stats, clear the status
   1009 		 * word, and leave the packet buffer in place.  It will
   1010 		 * simply be reused the next time the ring comes around.
   1011 		 */
   1012 		if (rxstat & TDSTAT_ES) {
   1013 #define	PRINTERR(bit, str)						\
   1014 			if (rxstat & (bit))				\
   1015 				printf("%s: receive error: %s\n",	\
   1016 				    sc->sc_dev.dv_xname, str)
   1017 			ifp->if_ierrors++;
   1018 			PRINTERR(TDSTAT_Rx_DE, "descriptor error");
   1019 			PRINTERR(TDSTAT_Rx_RF, "runt frame");
   1020 			PRINTERR(TDSTAT_Rx_TL, "frame too long");
   1021 			PRINTERR(TDSTAT_Rx_RE, "MII error");
   1022 			PRINTERR(TDSTAT_Rx_DB, "dribbling bit");
   1023 			PRINTERR(TDSTAT_Rx_CE, "CRC error");
   1024 #undef PRINTERR
   1025 			TULIP_INIT_RXDESC(sc, i);
   1026 			continue;
   1027 		}
   1028 
   1029 		bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
   1030 		    rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
   1031 
   1032 		/*
   1033 		 * No errors; receive the packet.  Note the Tulip
   1034 		 * includes the CRC with every packet; trim it.
   1035 		 */
   1036 		len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN;
   1037 
   1038 #ifdef __NO_STRICT_ALIGNMENT
   1039 		/*
   1040 		 * Allocate a new mbuf cluster.  If that fails, we are
   1041 		 * out of memory, and must drop the packet and recycle
   1042 		 * the buffer that's already attached to this descriptor.
   1043 		 */
   1044 		m = rxs->rxs_mbuf;
   1045 		if (tlp_add_rxbuf(sc, i) != 0) {
   1046 			ifp->if_ierrors++;
   1047 			TULIP_INIT_RXDESC(sc, i);
   1048 			bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
   1049 			    rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
   1050 			continue;
   1051 		}
   1052 #else
   1053 		/*
   1054 		 * The Tulip's receive buffers must be 4-byte aligned.
   1055 		 * But this means that the data after the Ethernet header
   1056 		 * is misaligned.  We must allocate a new buffer and
   1057 		 * copy the data, shifted forward 2 bytes.
   1058 		 */
   1059 		MGETHDR(m, M_DONTWAIT, MT_DATA);
   1060 		if (m == NULL) {
   1061  dropit:
   1062 			ifp->if_ierrors++;
   1063 			TULIP_INIT_RXDESC(sc, i);
   1064 			bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
   1065 			    rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
   1066 			continue;
   1067 		}
   1068 		if (len > (MHLEN - 2)) {
   1069 			MCLGET(m, M_DONTWAIT);
   1070 			if ((m->m_flags & M_EXT) == 0) {
   1071 				m_freem(m);
   1072 				goto dropit;
   1073 			}
   1074 		}
   1075 		m->m_data += 2;
   1076 
   1077 		/*
   1078 		 * Note that we use clusters for incoming frames, so the
   1079 		 * buffer is virtually contiguous.
   1080 		 */
   1081 		memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len);
   1082 
   1083 		/* Allow the receive descriptor to continue using its mbuf. */
   1084 		TULIP_INIT_RXDESC(sc, i);
   1085 		bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
   1086 		    rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
   1087 #endif /* __NO_STRICT_ALIGNMENT */
   1088 
   1089 		ifp->if_ipackets++;
   1090 		eh = mtod(m, struct ether_header *);
   1091 		m->m_pkthdr.rcvif = ifp;
   1092 		m->m_pkthdr.len = m->m_len = len;
   1093 
   1094 #if NBPFILTER > 0
   1095 		/*
   1096 		 * Pass this up to any BPF listeners, but only
   1097 		 * pass it up the stack if its for us.
   1098 		 */
   1099 		if (ifp->if_bpf)
   1100 			bpf_mtap(ifp->if_bpf, m);
   1101 #endif /* NPBFILTER > 0 */
   1102 
   1103 		/*
   1104 		 * This test is outside the NBPFILTER block because
   1105 		 * on the 21140 we have to use Hash-Only mode due to
   1106 		 * a bug in the filter logic.
   1107 		 */
   1108 		if ((ifp->if_flags & IFF_PROMISC) != 0 ||
   1109 		    sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) {
   1110 			if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost,
   1111 				 ETHER_ADDR_LEN) != 0 &&
   1112 			    ETHER_IS_MULTICAST(eh->ether_dhost) == 0) {
   1113 				m_freem(m);
   1114 				continue;
   1115 			}
   1116 		}
   1117 
   1118 		/* Pass it on. */
   1119 		(*ifp->if_input)(ifp, m);
   1120 	}
   1121 
   1122 	/* Update the recieve pointer. */
   1123 	sc->sc_rxptr = i;
   1124 }
   1125 
   1126 /*
   1127  * tlp_txintr:
   1128  *
   1129  *	Helper; handle transmit interrupts.
   1130  */
   1131 void
   1132 tlp_txintr(sc)
   1133 	struct tulip_softc *sc;
   1134 {
   1135 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   1136 	struct tulip_txsoft *txs;
   1137 	u_int32_t txstat;
   1138 
   1139 	DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n",
   1140 	    sc->sc_dev.dv_xname, sc->sc_flags));
   1141 
   1142 	ifp->if_flags &= ~IFF_OACTIVE;
   1143 
   1144 	/*
   1145 	 * If we were doing a filter setup, check to see if it completed.
   1146 	 */
   1147 	if (sc->sc_flags & TULIPF_DOING_SETUP) {
   1148 		TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1149 		if ((sc->sc_setup_desc.td_status & TDSTAT_OWN) == 0)
   1150 			sc->sc_flags &= ~TULIPF_DOING_SETUP;
   1151 	}
   1152 
   1153 	/*
   1154 	 * Go through our Tx list and free mbufs for those
   1155 	 * frames that have been transmitted.
   1156 	 */
   1157 	while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
   1158 		TULIP_CDTXSYNC(sc, txs->txs_firstdesc,
   1159 		    txs->txs_dmamap->dm_nsegs,
   1160 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1161 
   1162 #ifdef TLP_DEBUG
   1163 		if (ifp->if_flags & IFF_DEBUG) {
   1164 			int i;
   1165 			printf("    txsoft %p trainsmit chain:\n", txs);
   1166 			for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) {
   1167 				printf("     descriptor %d:\n", i);
   1168 				printf("       td_status:   0x%08x\n",
   1169 				    sc->sc_txdescs[i].td_status);
   1170 				printf("       td_ctl:      0x%08x\n",
   1171 				    sc->sc_txdescs[i].td_ctl);
   1172 				printf("       td_bufaddr1: 0x%08x\n",
   1173 				    sc->sc_txdescs[i].td_bufaddr1);
   1174 				printf("       td_bufaddr2: 0x%08x\n",
   1175 				    sc->sc_txdescs[i].td_bufaddr2);
   1176 				if (i == txs->txs_lastdesc)
   1177 					break;
   1178 			}
   1179 		}
   1180 #endif
   1181 
   1182 		txstat = sc->sc_txdescs[txs->txs_firstdesc].td_status;
   1183 		if (txstat & TDSTAT_OWN)
   1184 			break;
   1185 
   1186 		SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
   1187 
   1188 		sc->sc_txfree += txs->txs_dmamap->dm_nsegs;
   1189 
   1190 		bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap,
   1191 		    0, txs->txs_dmamap->dm_mapsize,
   1192 		    BUS_DMASYNC_POSTWRITE);
   1193 		bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
   1194 		m_freem(txs->txs_mbuf);
   1195 		txs->txs_mbuf = NULL;
   1196 
   1197 		SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
   1198 
   1199 		/*
   1200 		 * Check for errors and collisions.
   1201 		 */
   1202 		if (txstat & TDSTAT_ES) {
   1203 			ifp->if_oerrors++;
   1204 			if (txstat & TDSTAT_Tx_EC)
   1205 				ifp->if_collisions += 16;
   1206 			if (txstat & TDSTAT_Tx_LC)
   1207 				ifp->if_collisions++;
   1208 		} else {
   1209 			/* Packet was transmitted successfully. */
   1210 			ifp->if_opackets++;
   1211 			ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat);
   1212 		}
   1213 	}
   1214 
   1215 	/*
   1216 	 * If there are no more pending transmissions, cancel the watchdog
   1217 	 * timer.
   1218 	 */
   1219 	if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0)
   1220 		ifp->if_timer = 0;
   1221 
   1222 	/*
   1223 	 * If we have a receive filter setup pending, do it now.
   1224 	 */
   1225 	if (sc->sc_flags & TULIPF_WANT_SETUP)
   1226 		(*sc->sc_filter_setup)(sc);
   1227 }
   1228 
   1229 /*
   1230  * tlp_reset:
   1231  *
   1232  *	Perform a soft reset on the Tulip.
   1233  */
   1234 void
   1235 tlp_reset(sc)
   1236 	struct tulip_softc *sc;
   1237 {
   1238 	int i;
   1239 
   1240 	TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR);
   1241 
   1242 	for (i = 0; i < 1000; i++) {
   1243 		if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0)
   1244 			break;
   1245 		delay(10);
   1246 	}
   1247 
   1248 	if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR))
   1249 		printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname);
   1250 
   1251 	delay(1000);
   1252 }
   1253 
   1254 /*
   1255  * tlp_init:
   1256  *
   1257  *	Initialize the interface.  Must be called at splnet().
   1258  */
   1259 int
   1260 tlp_init(sc)
   1261 	struct tulip_softc *sc;
   1262 {
   1263 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   1264 	struct tulip_txsoft *txs;
   1265 	struct tulip_rxsoft *rxs;
   1266 	int i, error = 0;
   1267 
   1268 	/*
   1269 	 * Cancel any pending I/O.
   1270 	 */
   1271 	tlp_stop(sc, 0);
   1272 
   1273 	/*
   1274 	 * Reset the Tulip to a known state.
   1275 	 */
   1276 	tlp_reset(sc);
   1277 
   1278 	/*
   1279 	 * Initialize the BUSMODE register.
   1280 	 *
   1281 	 * XXX What about read-multiple/read-line/write-line on
   1282 	 * XXX the 21140 and up?
   1283 	 */
   1284 	sc->sc_busmode = BUSMODE_BAR | BUSMODE_PBL_DEFAULT;
   1285 	switch (sc->sc_cacheline) {
   1286 	default:
   1287 		/*
   1288 		 * Note: We must *always* set these bits; a cache
   1289 		 * alignment of 0 is RESERVED.
   1290 		 */
   1291 	case 8:
   1292 		sc->sc_busmode |= BUSMODE_CAL_8LW;
   1293 		break;
   1294 	case 16:
   1295 		sc->sc_busmode |= BUSMODE_CAL_16LW;
   1296 		break;
   1297 	case 32:
   1298 		sc->sc_busmode |= BUSMODE_CAL_32LW;
   1299 		break;
   1300 	}
   1301 	switch (sc->sc_chip) {
   1302 	case TULIP_CHIP_82C168:
   1303 	case TULIP_CHIP_82C169:
   1304 		sc->sc_busmode |= BUSMODE_PNIC_MBO;
   1305 		break;
   1306 	default:
   1307 		/* Nothing. */
   1308 		break;
   1309 	}
   1310 #if BYTE_ORDER == BIG_ENDIAN
   1311 	/*
   1312 	 * XXX There are reports that this doesn't work properly
   1313 	 * in the old Tulip driver, but BUSMODE_DBO does.  However,
   1314 	 * BUSMODE_DBO is not available on the 21040, and requires
   1315 	 * us to byte-swap the setup packet.  What to do?
   1316 	 */
   1317 	sc->sc_busmode |= BUSMODE_BLE;
   1318 #endif
   1319 	TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode);
   1320 
   1321 	/*
   1322 	 * Initialize the OPMODE register.  We don't write it until
   1323 	 * we're ready to begin the transmit and receive processes.
   1324 	 *
   1325 	 * Media-related OPMODE bits are set in the media callbacks
   1326 	 * for each specific chip/board.
   1327 	 */
   1328 	sc->sc_opmode = OPMODE_SR | OPMODE_ST |
   1329 	    sc->sc_txth[sc->sc_txthresh].txth_opmode;
   1330 	switch (sc->sc_chip) {
   1331 	case TULIP_CHIP_21140:
   1332 	case TULIP_CHIP_21140A:
   1333 	case TULIP_CHIP_21142:
   1334 	case TULIP_CHIP_21143:
   1335 		sc->sc_opmode |= OPMODE_MBO;
   1336 		break;
   1337 
   1338 	default:
   1339 		/* Nothing. */
   1340 	}
   1341 
   1342 	if (sc->sc_flags & TULIPF_HAS_MII) {
   1343 		switch (sc->sc_chip) {
   1344 		case TULIP_CHIP_82C168:
   1345 		case TULIP_CHIP_82C169:
   1346 			/* Enable the MII port. */
   1347 			sc->sc_opmode |= OPMODE_PS;
   1348 
   1349 			TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JABBERDIS);
   1350 			break;
   1351 
   1352 		case TULIP_CHIP_WB89C840F:
   1353 			/* Nothing. */
   1354 			break;
   1355 
   1356 		default:
   1357 			/* Enable the MII port. */
   1358 			sc->sc_opmode |= OPMODE_PS;
   1359 			break;
   1360 		}
   1361 	}
   1362 
   1363 	/*
   1364 	 * Magical mystery initialization on the Macronix chips.
   1365 	 * The MX98713 uses its own magic value, the rest share
   1366 	 * a common one.
   1367 	 */
   1368 	switch (sc->sc_chip) {
   1369 	case TULIP_CHIP_MX98713:
   1370 		TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713);
   1371 		break;
   1372 
   1373 	case TULIP_CHIP_MX98713A:
   1374 	case TULIP_CHIP_MX98715:
   1375 	case TULIP_CHIP_MX98725:
   1376 		TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715);
   1377 		break;
   1378 
   1379 	default:
   1380 		/* Nothing. */
   1381 	}
   1382 
   1383 	/*
   1384 	 * Initialize the transmit descriptor ring.
   1385 	 */
   1386 	memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
   1387 	for (i = 0; i < TULIP_NTXDESC; i++) {
   1388 		sc->sc_txdescs[i].td_ctl = TDCTL_CH;
   1389 		sc->sc_txdescs[i].td_bufaddr2 =
   1390 		    TULIP_CDTXADDR(sc, TULIP_NEXTTX(i));
   1391 	}
   1392 	TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC,
   1393 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1394 	sc->sc_txfree = TULIP_NTXDESC;
   1395 	sc->sc_txnext = 0;
   1396 
   1397 	/*
   1398 	 * Initialize the transmit job descriptors.
   1399 	 */
   1400 	SIMPLEQ_INIT(&sc->sc_txfreeq);
   1401 	SIMPLEQ_INIT(&sc->sc_txdirtyq);
   1402 	for (i = 0; i < TULIP_TXQUEUELEN; i++) {
   1403 		txs = &sc->sc_txsoft[i];
   1404 		txs->txs_mbuf = NULL;
   1405 		SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
   1406 	}
   1407 
   1408 	/*
   1409 	 * Initialize the receive descriptor and receive job
   1410 	 * descriptor rings.
   1411 	 */
   1412 	for (i = 0; i < TULIP_NRXDESC; i++) {
   1413 		rxs = &sc->sc_rxsoft[i];
   1414 		if (rxs->rxs_mbuf == NULL) {
   1415 			if ((error = tlp_add_rxbuf(sc, i)) != 0) {
   1416 				printf("%s: unable to allocate or map rx "
   1417 				    "buffer %d, error = %d\n",
   1418 				    sc->sc_dev.dv_xname, i, error);
   1419 				/*
   1420 				 * XXX Should attempt to run with fewer receive
   1421 				 * XXX buffers instead of just failing.
   1422 				 */
   1423 				tlp_rxdrain(sc);
   1424 				goto out;
   1425 			}
   1426 		}
   1427 	}
   1428 	sc->sc_rxptr = 0;
   1429 
   1430 	/*
   1431 	 * Initialize the interrupt mask and enable interrupts.
   1432 	 */
   1433 	/* normal interrupts */
   1434 	sc->sc_inten =  STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS;
   1435 
   1436 	/* abnormal interrupts */
   1437 	sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF |
   1438 	    STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS;
   1439 
   1440 	sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT;
   1441 	sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT;
   1442 
   1443 	switch (sc->sc_chip) {
   1444 	case TULIP_CHIP_WB89C840F:
   1445 		/*
   1446 		 * Clear bits that we don't want that happen to
   1447 		 * overlap or don't exist.
   1448 		 */
   1449 		sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT);
   1450 		break;
   1451 
   1452 	default:
   1453 		/* Nothing. */
   1454 	}
   1455 
   1456 	sc->sc_rxint_mask &= sc->sc_inten;
   1457 	sc->sc_txint_mask &= sc->sc_inten;
   1458 
   1459 	TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten);
   1460 	TULIP_WRITE(sc, CSR_STATUS, 0xffffffff);
   1461 
   1462 	/*
   1463 	 * Give the transmit and receive rings to the Tulip.
   1464 	 */
   1465 	TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext));
   1466 	TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr));
   1467 
   1468 	/*
   1469 	 * On chips that do this differently, set the station address.
   1470 	 */
   1471 	switch (sc->sc_chip) {
   1472 	case TULIP_CHIP_WB89C840F:
   1473 		/* XXX Do this with stream writes? */
   1474 		for (i = 0; i < ETHER_ADDR_LEN; i++) {
   1475 			bus_space_write_1(sc->sc_st, sc->sc_sh,
   1476 			    (CSR_WINB_CPA0 >> sc->sc_regshift) + i,
   1477 			    LLADDR(ifp->if_sadl)[i]);
   1478 		}
   1479 		break;
   1480 
   1481 	default:
   1482 		/* Nothing. */
   1483 	}
   1484 
   1485 	/*
   1486 	 * Set the receive filter.  This will start the transmit and
   1487 	 * receive processes.
   1488 	 */
   1489 	(*sc->sc_filter_setup)(sc);
   1490 
   1491 	/*
   1492 	 * Start the receive process.
   1493 	 */
   1494 	TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
   1495 
   1496 	if (sc->sc_flags & TULIPF_HAS_MII) {
   1497 		/* Start the one second clock. */
   1498 		timeout(tlp_mii_tick, sc, hz);
   1499 	}
   1500 
   1501 	/*
   1502 	 * Note that the interface is now running.
   1503 	 */
   1504 	ifp->if_flags |= IFF_RUNNING;
   1505 	ifp->if_flags &= ~IFF_OACTIVE;
   1506 
   1507 	/*
   1508 	 * Set the media.  We must do this after the transmit process is
   1509 	 * running, since we may actually have to transmit packets on
   1510 	 * our board to test link integrity.
   1511 	 */
   1512 	(void) (*sc->sc_mediasw->tmsw_set)(sc);
   1513 
   1514  out:
   1515 	if (error)
   1516 		printf("%s: interface not running\n", sc->sc_dev.dv_xname);
   1517 	return (error);
   1518 }
   1519 
   1520 /*
   1521  * tlp_rxdrain:
   1522  *
   1523  *	Drain the receive queue.
   1524  */
   1525 void
   1526 tlp_rxdrain(sc)
   1527 	struct tulip_softc *sc;
   1528 {
   1529 	struct tulip_rxsoft *rxs;
   1530 	int i;
   1531 
   1532 	for (i = 0; i < TULIP_NRXDESC; i++) {
   1533 		rxs = &sc->sc_rxsoft[i];
   1534 		if (rxs->rxs_mbuf != NULL) {
   1535 			bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
   1536 			m_freem(rxs->rxs_mbuf);
   1537 			rxs->rxs_mbuf = NULL;
   1538 		}
   1539 	}
   1540 }
   1541 
   1542 /*
   1543  * tlp_stop:
   1544  *
   1545  *	Stop transmission on the interface.
   1546  */
   1547 void
   1548 tlp_stop(sc, drain)
   1549 	struct tulip_softc *sc;
   1550 	int drain;
   1551 {
   1552 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   1553 	struct tulip_txsoft *txs;
   1554 
   1555 	if (sc->sc_flags & TULIPF_HAS_MII) {
   1556 		/* Stop the one second clock. */
   1557 		untimeout(tlp_mii_tick, sc);
   1558 	}
   1559 
   1560 	/* Disable interrupts. */
   1561 	TULIP_WRITE(sc, CSR_INTEN, 0);
   1562 
   1563 	/* Stop the transmit and receive processes. */
   1564 	TULIP_WRITE(sc, CSR_OPMODE, 0);
   1565 	TULIP_WRITE(sc, CSR_RXLIST, 0);
   1566 	TULIP_WRITE(sc, CSR_TXLIST, 0);
   1567 
   1568 	/*
   1569 	 * Release any queued transmit buffers.
   1570 	 */
   1571 	while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
   1572 		SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
   1573 		if (txs->txs_mbuf != NULL) {
   1574 			bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
   1575 			m_freem(txs->txs_mbuf);
   1576 			txs->txs_mbuf = NULL;
   1577 		}
   1578 		SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
   1579 	}
   1580 
   1581 	if (drain) {
   1582 		/*
   1583 		 * Release the receive buffers.
   1584 		 */
   1585 		tlp_rxdrain(sc);
   1586 	}
   1587 
   1588 	sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP);
   1589 
   1590 	/*
   1591 	 * Mark the interface down and cancel the watchdog timer.
   1592 	 */
   1593 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1594 	ifp->if_timer = 0;
   1595 }
   1596 
   1597 #define	SROM_EMIT(sc, x)						\
   1598 do {									\
   1599 	TULIP_WRITE((sc), CSR_MIIROM, (x));				\
   1600 	delay(1);							\
   1601 } while (0)
   1602 
   1603 /*
   1604  * tlp_srom_idle:
   1605  *
   1606  *	Put the SROM in idle state.
   1607  */
   1608 void
   1609 tlp_srom_idle(sc)
   1610 	struct tulip_softc *sc;
   1611 {
   1612 	u_int32_t miirom;
   1613 	int i;
   1614 
   1615 	miirom = MIIROM_SR;
   1616 	SROM_EMIT(sc, miirom);
   1617 
   1618 	miirom |= MIIROM_RD;
   1619 	SROM_EMIT(sc, miirom);
   1620 
   1621 	miirom |= MIIROM_SROMCS;
   1622 	SROM_EMIT(sc, miirom);
   1623 
   1624 	SROM_EMIT(sc, miirom|MIIROM_SROMSK);
   1625 
   1626 	/* Strobe the clock 25 times. */
   1627 	for (i = 0; i < 25; i++) {
   1628 		SROM_EMIT(sc, miirom);
   1629 		SROM_EMIT(sc, miirom|MIIROM_SROMSK);
   1630 	}
   1631 
   1632 	SROM_EMIT(sc, miirom);
   1633 
   1634 	miirom &= ~MIIROM_SROMCS;
   1635 	SROM_EMIT(sc, miirom);
   1636 
   1637 	SROM_EMIT(sc, 0);
   1638 }
   1639 
   1640 /*
   1641  * tlp_read_srom:
   1642  *
   1643  *	Read the Tulip SROM.
   1644  */
   1645 void
   1646 tlp_read_srom(sc, word, wordcnt, data)
   1647 	struct tulip_softc *sc;
   1648 	int word, wordcnt;
   1649 	u_int16_t *data;
   1650 {
   1651 	u_int32_t miirom;
   1652 	int i, x;
   1653 
   1654 	tlp_srom_idle(sc);
   1655 
   1656 	/* Select the SROM. */
   1657 	miirom = MIIROM_SR;
   1658 	SROM_EMIT(sc, miirom);
   1659 
   1660 	miirom |= MIIROM_RD;
   1661 	SROM_EMIT(sc, miirom);
   1662 
   1663 	for (i = 0; i < wordcnt; i++) {
   1664 		/* Send CHIP SELECT for one clock tick. */
   1665 		miirom |= MIIROM_SROMCS;
   1666 		SROM_EMIT(sc, miirom);
   1667 
   1668 		/* Shift in the READ opcode. */
   1669 		for (x = 3; x > 0; x--) {
   1670 			if (TULIP_SROM_OPC_READ & (1 << (x - 1)))
   1671 				miirom |= MIIROM_SROMDI;
   1672 			else
   1673 				miirom &= ~MIIROM_SROMDI;
   1674 			SROM_EMIT(sc, miirom);
   1675 			SROM_EMIT(sc, miirom|MIIROM_SROMSK);
   1676 			SROM_EMIT(sc, miirom);
   1677 		}
   1678 
   1679 		/* Shift in address. */
   1680 		for (x = 6; x > 0; x--) {
   1681 			if ((word + i) & (1 << (x - 1)))
   1682 				miirom |= MIIROM_SROMDI;
   1683 			else
   1684 				miirom &= ~MIIROM_SROMDI;
   1685 			SROM_EMIT(sc, miirom);
   1686 			SROM_EMIT(sc, miirom|MIIROM_SROMSK);
   1687 			SROM_EMIT(sc, miirom);
   1688 		}
   1689 
   1690 		/* Shift out data. */
   1691 		miirom &= ~MIIROM_SROMDI;
   1692 		data[i] = 0;
   1693 		for (x = 16; x > 0; x--) {
   1694 			SROM_EMIT(sc, miirom|MIIROM_SROMSK);
   1695 			if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO))
   1696 				data[i] |= (1 << (x - 1));
   1697 			SROM_EMIT(sc, miirom);
   1698 		}
   1699 
   1700 		/* Clear CHIP SELECT. */
   1701 		miirom &= ~MIIROM_SROMCS;
   1702 		SROM_EMIT(sc, miirom);
   1703 	}
   1704 
   1705 	/* Deselect the SROM. */
   1706 	SROM_EMIT(sc, 0);
   1707 
   1708 	/* ...and idle it. */
   1709 	tlp_srom_idle(sc);
   1710 }
   1711 
   1712 #undef SROM_EMIT
   1713 
   1714 /*
   1715  * tlp_add_rxbuf:
   1716  *
   1717  *	Add a receive buffer to the indicated descriptor.
   1718  */
   1719 int
   1720 tlp_add_rxbuf(sc, idx)
   1721 	struct tulip_softc *sc;
   1722 	int idx;
   1723 {
   1724 	struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx];
   1725 	struct mbuf *m;
   1726 	int error;
   1727 
   1728 	MGETHDR(m, M_DONTWAIT, MT_DATA);
   1729 	if (m == NULL)
   1730 		return (ENOBUFS);
   1731 
   1732 	MCLGET(m, M_DONTWAIT);
   1733 	if ((m->m_flags & M_EXT) == 0) {
   1734 		m_freem(m);
   1735 		return (ENOBUFS);
   1736 	}
   1737 
   1738 	if (rxs->rxs_mbuf != NULL)
   1739 		bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
   1740 
   1741 	rxs->rxs_mbuf = m;
   1742 
   1743 	error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap,
   1744 	    m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT);
   1745 	if (error) {
   1746 		printf("%s: can't load rx DMA map %d, error = %d\n",
   1747 		    sc->sc_dev.dv_xname, idx, error);
   1748 		panic("tlp_add_rxbuf");	/* XXX */
   1749 	}
   1750 
   1751 	bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
   1752 	    rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
   1753 
   1754 	TULIP_INIT_RXDESC(sc, idx);
   1755 
   1756 	return (0);
   1757 }
   1758 
   1759 /*
   1760  * tlp_crc32:
   1761  *
   1762  *	Compute the 32-bit CRC of the provided buffer.
   1763  */
   1764 u_int32_t
   1765 tlp_crc32(buf, len)
   1766 	const u_int8_t *buf;
   1767 	size_t len;
   1768 {
   1769 	static const u_int32_t crctab[] = {
   1770 		0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac,
   1771 		0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c,
   1772 		0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c,
   1773 		0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c
   1774 	};
   1775 	u_int32_t crc;
   1776 	int i;
   1777 
   1778 	crc = 0xffffffff;
   1779 	for (i = 0; i < len; i++) {
   1780 		crc ^= buf[i];
   1781 		crc = (crc >> 4) ^ crctab[crc & 0xf];
   1782 		crc = (crc >> 4) ^ crctab[crc & 0xf];
   1783 	}
   1784 	return (crc);
   1785 }
   1786 
   1787 /*
   1788  * tlp_srom_crcok:
   1789  *
   1790  *	Check the CRC of the Tulip SROM.
   1791  */
   1792 int
   1793 tlp_srom_crcok(romdata)
   1794 	u_int8_t *romdata;
   1795 {
   1796 	u_int32_t crc;
   1797 
   1798 	crc = tlp_crc32(romdata, 126);
   1799 	if ((crc ^ 0xffff) == (romdata[126] | (romdata[127] << 8)))
   1800 		return (1);
   1801 	return (0);
   1802 }
   1803 
   1804 /*
   1805  * tlp_filter_setup:
   1806  *
   1807  *	Set the Tulip's receive filter.
   1808  */
   1809 void
   1810 tlp_filter_setup(sc)
   1811 	struct tulip_softc *sc;
   1812 {
   1813 	struct ethercom *ec = &sc->sc_ethercom;
   1814 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   1815 	struct ether_multi *enm;
   1816 	struct ether_multistep step;
   1817 	__volatile u_int32_t *sp;
   1818 	u_int8_t enaddr[ETHER_ADDR_LEN];
   1819 	u_int32_t hash;
   1820 	int cnt;
   1821 
   1822 	DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n",
   1823 	    sc->sc_dev.dv_xname, sc->sc_flags));
   1824 
   1825 	memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN);
   1826 
   1827 	/*
   1828 	 * If there are transmissions pending, wait until they have
   1829 	 * completed.
   1830 	 */
   1831 	if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL ||
   1832 	    (sc->sc_flags & TULIPF_DOING_SETUP) != 0) {
   1833 		sc->sc_flags |= TULIPF_WANT_SETUP;
   1834 		DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n",
   1835 		    sc->sc_dev.dv_xname));
   1836 		return;
   1837 	}
   1838 	sc->sc_flags &= ~TULIPF_WANT_SETUP;
   1839 
   1840 	/*
   1841 	 * If we're running, idle the transmit and receive engines.  If
   1842 	 * we're NOT running, we're being called from tlp_init(), and our
   1843 	 * writing OPMODE will start the transmit and receive processes
   1844 	 * in motion.
   1845 	 */
   1846 	if (ifp->if_flags & IFF_RUNNING)
   1847 		tlp_idle(sc, OPMODE_ST|OPMODE_SR);
   1848 
   1849 	sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
   1850 
   1851 	if (ifp->if_flags & IFF_PROMISC) {
   1852 		sc->sc_opmode |= OPMODE_PR;
   1853 		goto allmulti;
   1854 	}
   1855 
   1856 	/*
   1857 	 * Try Perfect filtering first.
   1858 	 */
   1859 
   1860 	sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
   1861 	sp = TULIP_CDSP(sc);
   1862 	memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
   1863 	cnt = 0;
   1864 	ETHER_FIRST_MULTI(step, ec, enm);
   1865 	while (enm != NULL) {
   1866 		if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
   1867 			/*
   1868 			 * We must listen to a range of multicast addresses.
   1869 			 * For now, just accept all multicasts, rather than
   1870 			 * trying to set only those filter bits needed to match
   1871 			 * the range.  (At this time, the only use of address
   1872 			 * ranges is for IP multicast routing, for which the
   1873 			 * range is big enough to require all bits set.)
   1874 			 */
   1875 			goto allmulti;
   1876 		}
   1877 		if (cnt == (TULIP_MAXADDRS - 2)) {
   1878 			/*
   1879 			 * We already have our multicast limit (still need
   1880 			 * our station address and broadcast).  Go to
   1881 			 * Hash-Perfect mode.
   1882 			 */
   1883 			goto hashperfect;
   1884 		}
   1885 		*sp++ = ((u_int16_t *) enm->enm_addrlo)[0];
   1886 		*sp++ = ((u_int16_t *) enm->enm_addrlo)[1];
   1887 		*sp++ = ((u_int16_t *) enm->enm_addrlo)[2];
   1888 		ETHER_NEXT_MULTI(step, enm);
   1889 	}
   1890 
   1891 	if (ifp->if_flags & IFF_BROADCAST) {
   1892 		/* ...and the broadcast address. */
   1893 		cnt++;
   1894 		*sp++ = 0xffff;
   1895 		*sp++ = 0xffff;
   1896 		*sp++ = 0xffff;
   1897 	}
   1898 
   1899 	/* Pad the rest with our station address. */
   1900 	for (; cnt < TULIP_MAXADDRS; cnt++) {
   1901 		*sp++ = ((u_int16_t *) enaddr)[0];
   1902 		*sp++ = ((u_int16_t *) enaddr)[1];
   1903 		*sp++ = ((u_int16_t *) enaddr)[2];
   1904 	}
   1905 	ifp->if_flags &= ~IFF_ALLMULTI;
   1906 	goto setit;
   1907 
   1908  hashperfect:
   1909 	/*
   1910 	 * Try Hash-Perfect mode.
   1911 	 */
   1912 
   1913 	/*
   1914 	 * Some 21140 chips have broken Hash-Perfect modes.  On these
   1915 	 * chips, we simply use Hash-Only mode, and put our station
   1916 	 * address into the filter.
   1917 	 */
   1918 	if (sc->sc_chip == TULIP_CHIP_21140)
   1919 		sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY;
   1920 	else
   1921 		sc->sc_filtmode = TDCTL_Tx_FT_HASH;
   1922 	sp = TULIP_CDSP(sc);
   1923 	memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
   1924 	ETHER_FIRST_MULTI(step, ec, enm);
   1925 	while (enm != NULL) {
   1926 		if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
   1927 			/*
   1928 			 * We must listen to a range of multicast addresses.
   1929 			 * For now, just accept all multicasts, rather than
   1930 			 * trying to set only those filter bits needed to match
   1931 			 * the range.  (At this time, the only use of address
   1932 			 * ranges is for IP multicast routing, for which the
   1933 			 * range is big enough to require all bits set.)
   1934 			 */
   1935 			goto allmulti;
   1936 		}
   1937 		hash = tlp_mchash(enm->enm_addrlo);
   1938 		sp[hash >> 4] |= 1 << (hash & 0xf);
   1939 		ETHER_NEXT_MULTI(step, enm);
   1940 	}
   1941 
   1942 	if (ifp->if_flags & IFF_BROADCAST) {
   1943 		/* ...and the broadcast address. */
   1944 		hash = tlp_mchash(etherbroadcastaddr);
   1945 		sp[hash >> 4] |= 1 << (hash & 0xf);
   1946 	}
   1947 
   1948 	if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) {
   1949 		/* ...and our station address. */
   1950 		hash = tlp_mchash(enaddr);
   1951 		sp[hash >> 4] |= 1 << (hash & 0xf);
   1952 	} else {
   1953 		/*
   1954 		 * Hash-Perfect mode; put our station address after
   1955 		 * the hash table.
   1956 		 */
   1957 		sp[39] = ((u_int16_t *) enaddr)[0];
   1958 		sp[40] = ((u_int16_t *) enaddr)[1];
   1959 		sp[41] = ((u_int16_t *) enaddr)[2];
   1960 	}
   1961 	ifp->if_flags &= ~IFF_ALLMULTI;
   1962 	goto setit;
   1963 
   1964  allmulti:
   1965 	/*
   1966 	 * Use Perfect filter mode.  First address is the broadcast address,
   1967 	 * and pad the rest with our station address.  We'll set Pass-all-
   1968 	 * multicast in OPMODE below.
   1969 	 */
   1970 	sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
   1971 	sp = TULIP_CDSP(sc);
   1972 	memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
   1973 	cnt = 0;
   1974 	if (ifp->if_flags & IFF_BROADCAST) {
   1975 		cnt++;
   1976 		*sp++ = 0xffff;
   1977 		*sp++ = 0xffff;
   1978 		*sp++ = 0xffff;
   1979 	}
   1980 	for (; cnt < TULIP_MAXADDRS; cnt++) {
   1981 		*sp++ = ((u_int16_t *) enaddr)[0];
   1982 		*sp++ = ((u_int16_t *) enaddr)[1];
   1983 		*sp++ = ((u_int16_t *) enaddr)[2];
   1984 	}
   1985 	ifp->if_flags |= IFF_ALLMULTI;
   1986 
   1987  setit:
   1988 	if (ifp->if_flags & IFF_ALLMULTI)
   1989 		sc->sc_opmode |= OPMODE_PM;
   1990 
   1991 	/* Sync the setup packet buffer. */
   1992 	TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE);
   1993 
   1994 	/*
   1995 	 * Fill in the setup packet descriptor.
   1996 	 */
   1997 	sc->sc_setup_desc.td_bufaddr1 = TULIP_CDSPADDR(sc);
   1998 	sc->sc_setup_desc.td_bufaddr2 = TULIP_CDTXADDR(sc, sc->sc_txnext);
   1999 	sc->sc_setup_desc.td_ctl =
   2000 	    (TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) |
   2001 	    sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS |
   2002 	    TDCTL_Tx_IC | TDCTL_CH;
   2003 	sc->sc_setup_desc.td_status = TDSTAT_OWN;
   2004 	TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2005 
   2006 	/*
   2007 	 * Write the address of the setup descriptor.  This also has
   2008 	 * the side effect of giving the transmit ring to the chip,
   2009 	 * since the setup descriptor points to the next available
   2010 	 * descriptor in the ring.
   2011 	 */
   2012 	TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc));
   2013 
   2014 	/*
   2015 	 * Set the OPMODE register.  This will also resume the
   2016 	 * transmit transmit process we idled above.
   2017 	 */
   2018 	TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
   2019 
   2020 	sc->sc_flags |= TULIPF_DOING_SETUP;
   2021 
   2022 	/*
   2023 	 * Kick the transmitter; this will cause the Tulip to
   2024 	 * read the setup descriptor.
   2025 	 */
   2026 	/* XXX USE AUTOPOLLING? */
   2027 	TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
   2028 
   2029 	/* Set up a watchdog timer in case the chip flakes out. */
   2030 	ifp->if_timer = 5;
   2031 
   2032 	DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname));
   2033 }
   2034 
   2035 /*
   2036  * tlp_winb_filter_setup:
   2037  *
   2038  *	Set the Winbond 89C840F's receive filter.
   2039  */
   2040 void
   2041 tlp_winb_filter_setup(sc)
   2042 	struct tulip_softc *sc;
   2043 {
   2044 	struct ethercom *ec = &sc->sc_ethercom;
   2045 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   2046 	struct ether_multi *enm;
   2047 	struct ether_multistep step;
   2048 	u_int32_t hash, mchash[2];
   2049 
   2050 	DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n",
   2051 	    sc->sc_dev.dv_xname, sc->sc_flags));
   2052 
   2053 	sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP);
   2054 
   2055 	if (ifp->if_flags & IFF_MULTICAST)
   2056 		sc->sc_opmode |= OPMODE_WINB_AMP;
   2057 
   2058 	if (ifp->if_flags & IFF_BROADCAST)
   2059 		sc->sc_opmode |= OPMODE_WINB_ABP;
   2060 
   2061 	if (ifp->if_flags & IFF_PROMISC) {
   2062 		sc->sc_opmode |= OPMODE_WINB_APP;
   2063 		goto allmulti;
   2064 	}
   2065 
   2066 	mchash[0] = mchash[1] = 0;
   2067 
   2068 	ETHER_FIRST_MULTI(step, ec, enm);
   2069 	while (enm != NULL) {
   2070 		if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
   2071 			/*
   2072 			 * We must listen to a range of multicast addresses.
   2073 			 * For now, just accept all multicasts, rather than
   2074 			 * trying to set only those filter bits needed to match
   2075 			 * the range.  (At this time, the only use of address
   2076 			 * ranges is for IP multicast routing, for which the
   2077 			 * range is big enough to require all bits set.)
   2078 			 */
   2079 			goto allmulti;
   2080 		}
   2081 
   2082 		/*
   2083 		 * According to the FreeBSD `wb' driver, yes, you
   2084 		 * really do invert the hash.
   2085 		 */
   2086 		hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26))
   2087 		    & 0x3f;
   2088 		mchash[hash >> 5] |= 1 << (hash & 0x1f);
   2089 		ETHER_NEXT_MULTI(step, enm);
   2090 	}
   2091 	ifp->if_flags &= ~IFF_ALLMULTI;
   2092 	goto setit;
   2093 
   2094  allmulti:
   2095 	ifp->if_flags |= IFF_ALLMULTI;
   2096 	mchash[0] = mchash[1] = 0xffffffff;
   2097 
   2098  setit:
   2099 	TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]);
   2100 	TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]);
   2101 	TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
   2102 	DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n",
   2103 	    sc->sc_dev.dv_xname));
   2104 }
   2105 
   2106 /*
   2107  * tlp_idle:
   2108  *
   2109  *	Cause the transmit and/or receive processes to go idle.
   2110  */
   2111 void
   2112 tlp_idle(sc, bits)
   2113 	struct tulip_softc *sc;
   2114 	u_int32_t bits;
   2115 {
   2116 	static const char *tx_state_names[] = {
   2117 		"STOPPED",
   2118 		"RUNNING - FETCH",
   2119 		"RUNNING - WAIT",
   2120 		"RUNNING - READING",
   2121 		"-- RESERVED --",
   2122 		"RUNNING - SETUP",
   2123 		"SUSPENDED",
   2124 		"RUNNING - CLOSE",
   2125 	};
   2126 	static const char *rx_state_names[] = {
   2127 		"STOPPED",
   2128 		"RUNNING - FETCH",
   2129 		"RUNNING - CHECK",
   2130 		"RUNNING - WAIT",
   2131 		"SUSPENDED",
   2132 		"RUNNING - CLOSE",
   2133 		"RUNNING - FLUSH",
   2134 		"RUNNING - QUEUE",
   2135 	};
   2136 	u_int32_t csr, ackmask = 0;
   2137 	int i;
   2138 
   2139 	if (bits & OPMODE_ST)
   2140 		ackmask |= STATUS_TPS;
   2141 
   2142 	if (bits & OPMODE_SR)
   2143 		ackmask |= STATUS_RPS;
   2144 
   2145 	TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits);
   2146 
   2147 	for (i = 0; i < 1000; i++) {
   2148 		if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask)
   2149 			break;
   2150 		delay(10);
   2151 	}
   2152 
   2153 	csr = TULIP_READ(sc, CSR_STATUS);
   2154 	if ((csr & ackmask) != ackmask) {
   2155 		if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 &&
   2156 		    (csr & STATUS_TS) != STATUS_TS_STOPPED)
   2157 			printf("%s: transmit process failed to idle: "
   2158 			    "state %s\n", sc->sc_dev.dv_xname,
   2159 			    tx_state_names[(csr & STATUS_TS) >> 20]);
   2160 		if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 &&
   2161 		    (csr & STATUS_RS) != STATUS_RS_STOPPED)
   2162 			printf("%s: receive process failed to idle: "
   2163 			    "state %s\n", sc->sc_dev.dv_xname,
   2164 			    rx_state_names[(csr & STATUS_RS) >> 17]);
   2165 	}
   2166 	TULIP_WRITE(sc, CSR_STATUS, ackmask);
   2167 }
   2168 
   2169 /*****************************************************************************
   2170  * Generic media support functions.
   2171  *****************************************************************************/
   2172 
   2173 /*
   2174  * tlp_mediastatus:	[ifmedia interface function]
   2175  *
   2176  *	Query the current media.
   2177  */
   2178 void
   2179 tlp_mediastatus(ifp, ifmr)
   2180 	struct ifnet *ifp;
   2181 	struct ifmediareq *ifmr;
   2182 {
   2183 	struct tulip_softc *sc = ifp->if_softc;
   2184 
   2185 	(*sc->sc_mediasw->tmsw_get)(sc, ifmr);
   2186 }
   2187 
   2188 /*
   2189  * tlp_mediachange:	[ifmedia interface function]
   2190  *
   2191  *	Update the current media.
   2192  */
   2193 int
   2194 tlp_mediachange(ifp)
   2195 	struct ifnet *ifp;
   2196 {
   2197 	struct tulip_softc *sc = ifp->if_softc;
   2198 
   2199 	return ((*sc->sc_mediasw->tmsw_set)(sc));
   2200 }
   2201 
   2202 /*****************************************************************************
   2203  * Support functions for MII-attached media.
   2204  *****************************************************************************/
   2205 
   2206 /*
   2207  * tlp_mii_tick:
   2208  *
   2209  *	One second timer, used to tick the MII.
   2210  */
   2211 void
   2212 tlp_mii_tick(arg)
   2213 	void *arg;
   2214 {
   2215 	struct tulip_softc *sc = arg;
   2216 	int s;
   2217 
   2218 	s = splnet();
   2219 	mii_tick(&sc->sc_mii);
   2220 	splx(s);
   2221 
   2222 	timeout(tlp_mii_tick, sc, hz);
   2223 }
   2224 
   2225 /*
   2226  * tlp_mii_statchg:	[mii interface function]
   2227  *
   2228  *	Callback from PHY when media changes.
   2229  */
   2230 void
   2231 tlp_mii_statchg(self)
   2232 	struct device *self;
   2233 {
   2234 	struct tulip_softc *sc = (struct tulip_softc *)self;
   2235 
   2236 	/* Idle the transmit and receive processes. */
   2237 	tlp_idle(sc, OPMODE_ST|OPMODE_SR);
   2238 
   2239 	/*
   2240 	 * XXX What about Heartbeat Disable?  Is it magically frobbed
   2241 	 * XXX by the PHY?  I hope so...
   2242 	 */
   2243 
   2244 	if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T)
   2245 		sc->sc_opmode |= OPMODE_TTM;
   2246 	else
   2247 		sc->sc_opmode &= ~OPMODE_TTM;
   2248 
   2249 	if (sc->sc_mii.mii_media_active & IFM_FDX)
   2250 		sc->sc_opmode |= OPMODE_FD;
   2251 	else
   2252 		sc->sc_opmode &= ~OPMODE_FD;
   2253 
   2254 	/*
   2255 	 * Write new OPMODE bits.  This also restarts the transmit
   2256 	 * and receive processes.
   2257 	 */
   2258 	TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
   2259 
   2260 	/* XXX Update ifp->if_baudrate */
   2261 }
   2262 
   2263 /*
   2264  * tlp_winb_mii_statchg: [mii interface function]
   2265  *
   2266  *	Callback from PHY when media changes.  This version is
   2267  *	for the Winbond 89C840F, which has different OPMODE bits.
   2268  */
   2269 void
   2270 tlp_winb_mii_statchg(self)
   2271 	struct device *self;
   2272 {
   2273 	struct tulip_softc *sc = (struct tulip_softc *)self;
   2274 
   2275 	/* Idle the transmit and receive processes. */
   2276 	tlp_idle(sc, OPMODE_ST|OPMODE_SR);
   2277 
   2278 	/*
   2279 	 * XXX What about Heartbeat Disable?  Is it magically frobbed
   2280 	 * XXX by the PHY?  I hope so...
   2281 	 */
   2282 
   2283 	if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX)
   2284 		sc->sc_opmode |= OPMODE_WINB_FES;
   2285 	else
   2286 		sc->sc_opmode &= ~OPMODE_WINB_FES;
   2287 
   2288 	if (sc->sc_mii.mii_media_active & IFM_FDX)
   2289 		sc->sc_opmode |= OPMODE_FD;
   2290 	else
   2291 		sc->sc_opmode &= ~OPMODE_FD;
   2292 
   2293 	/*
   2294 	 * Write new OPMODE bits.  This also restarts the transmit
   2295 	 * and receive processes.
   2296 	 */
   2297 	TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
   2298 
   2299 	/* XXX Update ifp->if_baudrate */
   2300 }
   2301 
   2302 /*
   2303  * tlp_mii_getmedia:
   2304  *
   2305  *	Callback from ifmedia to request current media status.
   2306  */
   2307 void
   2308 tlp_mii_getmedia(sc, ifmr)
   2309 	struct tulip_softc *sc;
   2310 	struct ifmediareq *ifmr;
   2311 {
   2312 
   2313 	mii_pollstat(&sc->sc_mii);
   2314 	ifmr->ifm_status = sc->sc_mii.mii_media_status;
   2315 	ifmr->ifm_active = sc->sc_mii.mii_media_active;
   2316 }
   2317 
   2318 /*
   2319  * tlp_mii_setmedia:
   2320  *
   2321  *	Callback from ifmedia to request new media setting.
   2322  */
   2323 int
   2324 tlp_mii_setmedia(sc)
   2325 	struct tulip_softc *sc;
   2326 {
   2327 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   2328 
   2329 	if (ifp->if_flags & IFF_UP)
   2330 		mii_mediachg(&sc->sc_mii);
   2331 	return (0);
   2332 }
   2333 
   2334 #define	MII_EMIT(sc, x)							\
   2335 do {									\
   2336 	TULIP_WRITE((sc), CSR_MIIROM, (x));				\
   2337 	delay(1);							\
   2338 } while (0)
   2339 
   2340 /*
   2341  * tlp_sio_mii_sync:
   2342  *
   2343  *	Synchronize the SIO-attached MII.
   2344  */
   2345 void
   2346 tlp_sio_mii_sync(sc)
   2347 	struct tulip_softc *sc;
   2348 {
   2349 	u_int32_t miirom;
   2350 	int i;
   2351 
   2352 	miirom = MIIROM_MIIDIR|MIIROM_MDO;
   2353 
   2354 	MII_EMIT(sc, miirom);
   2355 	for (i = 0; i < 32; i++) {
   2356 		MII_EMIT(sc, miirom | MIIROM_MDC);
   2357 		MII_EMIT(sc, miirom);
   2358 	}
   2359 }
   2360 
   2361 /*
   2362  * tlp_sio_mii_sendbits:
   2363  *
   2364  *	Send a series of bits out the SIO to the MII.
   2365  */
   2366 void
   2367 tlp_sio_mii_sendbits(sc, data, nbits)
   2368 	struct tulip_softc *sc;
   2369 	u_int32_t data;
   2370 	int nbits;
   2371 {
   2372 	u_int32_t miirom, i;
   2373 
   2374 	miirom = MIIROM_MIIDIR;
   2375 	MII_EMIT(sc, miirom);
   2376 
   2377 	for (i = 1 << (nbits - 1); i != 0; i >>= 1) {
   2378 		if (data & i)
   2379 			miirom |= MIIROM_MDO;
   2380 		else
   2381 			miirom &= ~MIIROM_MDO;
   2382 		MII_EMIT(sc, miirom);
   2383 		MII_EMIT(sc, miirom|MIIROM_MDC);
   2384 		MII_EMIT(sc, miirom);
   2385 	}
   2386 }
   2387 
   2388 /*
   2389  * tlp_sio_mii_readreg:
   2390  *
   2391  *	Read a PHY register via SIO-attached MII.
   2392  */
   2393 int
   2394 tlp_sio_mii_readreg(self, phy, reg)
   2395 	struct device *self;
   2396 	int phy, reg;
   2397 {
   2398 	struct tulip_softc *sc = (void *) self;
   2399 	int val = 0, err = 0, i;
   2400 
   2401 	tlp_sio_mii_sync(sc);
   2402 
   2403 	tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2);
   2404 	tlp_sio_mii_sendbits(sc, MII_COMMAND_READ, 2);
   2405 	tlp_sio_mii_sendbits(sc, phy, 5);
   2406 	tlp_sio_mii_sendbits(sc, reg, 5);
   2407 
   2408 	MII_EMIT(sc, MIIROM_MIIDIR);
   2409 	MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC);
   2410 
   2411 	MII_EMIT(sc, 0);
   2412 	MII_EMIT(sc, MIIROM_MDC);
   2413 
   2414 	err = TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI);
   2415 
   2416 	MII_EMIT(sc, 0);
   2417 	MII_EMIT(sc, MIIROM_MDC);
   2418 
   2419 	for (i = 0; i < 16; i++) {
   2420 		val <<= 1;
   2421 		MII_EMIT(sc, 0);
   2422 		if (err == 0 && TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI))
   2423 			val |= 1;
   2424 		MII_EMIT(sc, MIIROM_MDC);
   2425 	}
   2426 
   2427 	MII_EMIT(sc, 0);
   2428 
   2429 	return (err ? 0 : val);
   2430 }
   2431 
   2432 /*
   2433  * tlp_sio_mii_writereg:
   2434  *
   2435  *	Write a PHY register via SIO-attached MII.
   2436  */
   2437 void
   2438 tlp_sio_mii_writereg(self, phy, reg, val)
   2439 	struct device *self;
   2440 	int phy, reg, val;
   2441 {
   2442 	struct tulip_softc *sc = (void *) self;
   2443 
   2444 	tlp_sio_mii_sync(sc);
   2445 
   2446 	tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2);
   2447 	tlp_sio_mii_sendbits(sc, MII_COMMAND_WRITE, 2);
   2448 	tlp_sio_mii_sendbits(sc, phy, 5);
   2449 	tlp_sio_mii_sendbits(sc, reg, 5);
   2450 	tlp_sio_mii_sendbits(sc, MII_COMMAND_ACK, 2);
   2451 	tlp_sio_mii_sendbits(sc, val, 16);
   2452 
   2453 	MII_EMIT(sc, 0);
   2454 }
   2455 
   2456 #undef MII_EMIT
   2457 
   2458 /*
   2459  * tlp_pnic_mii_readreg:
   2460  *
   2461  *	Read a PHY register on the Lite-On PNIC.
   2462  */
   2463 int
   2464 tlp_pnic_mii_readreg(self, phy, reg)
   2465 	struct device *self;
   2466 	int phy, reg;
   2467 {
   2468 	struct tulip_softc *sc = (void *) self;
   2469 	u_int32_t val;
   2470 	int i;
   2471 
   2472 	TULIP_WRITE(sc, CSR_PNIC_MII,
   2473 	    PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) |
   2474 	    (reg << PNIC_MII_REGSHIFT));
   2475 
   2476 	for (i = 0; i < 1000; i++) {
   2477 		delay(10);
   2478 		val = TULIP_READ(sc, CSR_PNIC_MII);
   2479 		if ((val & PNIC_MII_BUSY) == 0) {
   2480 			if ((val & PNIC_MII_DATA) == PNIC_MII_DATA)
   2481 				return (0);
   2482 			else
   2483 				return (val & PNIC_MII_DATA);
   2484 		}
   2485 	}
   2486 	printf("%s: MII read timed out\n", sc->sc_dev.dv_xname);
   2487 	return (0);
   2488 }
   2489 
   2490 /*
   2491  * tlp_pnic_mii_writereg:
   2492  *
   2493  *	Write a PHY register on the Lite-On PNIC.
   2494  */
   2495 void
   2496 tlp_pnic_mii_writereg(self, phy, reg, val)
   2497 	struct device *self;
   2498 	int phy, reg, val;
   2499 {
   2500 	struct tulip_softc *sc = (void *) self;
   2501 	int i;
   2502 
   2503 	TULIP_WRITE(sc, CSR_PNIC_MII,
   2504 	    PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) |
   2505 	    (reg << PNIC_MII_REGSHIFT) | val);
   2506 
   2507 	for (i = 0; i < 1000; i++) {
   2508 		delay(10);
   2509 		if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0)
   2510 			return;
   2511 	}
   2512 	printf("%s: MII write timed out\n", sc->sc_dev.dv_xname);
   2513 }
   2514 
   2515 /*****************************************************************************
   2516  * Chip/board-specific media switches.  The ones here are ones that
   2517  * are potentially common to multiple front-ends.
   2518  *****************************************************************************/
   2519 
   2520 /*
   2521  * MII-on-SIO media switch.  Handles only MII attached to the SIO.
   2522  */
   2523 void	tlp_sio_mii_tmsw_init __P((struct tulip_softc *));
   2524 
   2525 const struct tulip_mediasw tlp_sio_mii_mediasw = {
   2526 	tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
   2527 };
   2528 
   2529 void
   2530 tlp_sio_mii_tmsw_init(sc)
   2531 	struct tulip_softc *sc;
   2532 {
   2533 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   2534 
   2535 	sc->sc_mii.mii_ifp = ifp;
   2536 	sc->sc_mii.mii_readreg = tlp_sio_mii_readreg;
   2537 	sc->sc_mii.mii_writereg = tlp_sio_mii_writereg;
   2538 	sc->sc_mii.mii_statchg = sc->sc_statchg;
   2539 	ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
   2540 	    tlp_mediastatus);
   2541 	mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff);
   2542 	if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
   2543 		ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
   2544 		ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
   2545 	} else {
   2546 		sc->sc_flags |= TULIPF_HAS_MII;
   2547 		ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
   2548 	}
   2549 }
   2550 
   2551 /*
   2552  * Lite-On PNIC media switch.  Must handle MII or internal NWAY.
   2553  */
   2554 void	tlp_pnic_tmsw_init __P((struct tulip_softc *));
   2555 void	tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
   2556 int	tlp_pnic_tmsw_set __P((struct tulip_softc *));
   2557 
   2558 const struct tulip_mediasw tlp_pnic_mediasw = {
   2559 	tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set
   2560 };
   2561 
   2562 void
   2563 tlp_pnic_tmsw_init(sc)
   2564 	struct tulip_softc *sc;
   2565 {
   2566 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
   2567 
   2568 	sc->sc_mii.mii_ifp = ifp;
   2569 	sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg;
   2570 	sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg;
   2571 	sc->sc_mii.mii_statchg = sc->sc_statchg;
   2572 	ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
   2573 	    tlp_mediastatus);
   2574 	mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff);
   2575 	if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
   2576 		/* XXX USE INTERNAL NWAY! */
   2577 		printf("%s: no support for PNIC NWAY yet\n",
   2578 		    sc->sc_dev.dv_xname);
   2579 		ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
   2580 		ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
   2581 	} else {
   2582 		sc->sc_flags |= TULIPF_HAS_MII;
   2583 		ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
   2584 	}
   2585 }
   2586 
   2587 void
   2588 tlp_pnic_tmsw_get(sc, ifmr)
   2589 	struct tulip_softc *sc;
   2590 	struct ifmediareq *ifmr;
   2591 {
   2592 
   2593 	if (sc->sc_flags & TULIPF_HAS_MII)
   2594 		tlp_mii_getmedia(sc, ifmr);
   2595 	else {
   2596 		/* XXX CHECK INTERNAL NWAY! */
   2597 		ifmr->ifm_status = 0;
   2598 		ifmr->ifm_active = IFM_ETHER|IFM_NONE;
   2599 	}
   2600 }
   2601 
   2602 int
   2603 tlp_pnic_tmsw_set(sc)
   2604 	struct tulip_softc *sc;
   2605 {
   2606 
   2607 	if (sc->sc_flags & TULIPF_HAS_MII)
   2608 		return (tlp_mii_setmedia(sc));
   2609 
   2610 	/* XXX USE INTERNAL NWAY! */
   2611 	return (EIO);
   2612 }
   2613