tulip.c revision 1.7
1 /* $NetBSD: tulip.c,v 1.7 1999/09/14 00:55:38 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <vm/vm.h> /* for PAGE_SIZE */ 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #endif 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/if_inarp.h> 73 #endif 74 75 #ifdef NS 76 #include <netns/ns.h> 77 #include <netns/ns_if.h> 78 #endif 79 80 #include <machine/bus.h> 81 #include <machine/intr.h> 82 83 #include <dev/mii/mii.h> 84 #include <dev/mii/miivar.h> 85 86 #include <dev/ic/tulipreg.h> 87 #include <dev/ic/tulipvar.h> 88 89 /* 90 * The following tables compute the transmit threshold mode. We start 91 * at index 0. When ever we get a transmit underrun, we increment our 92 * index, falling back if we encounter the NULL terminator. 93 * 94 * Note: Store and forward mode is only available on the 100mbps chips 95 * (21140 and higher). 96 */ 97 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = { 98 { OPMODE_TR_72, "72 bytes" }, 99 { OPMODE_TR_96, "96 bytes" }, 100 { OPMODE_TR_128, "128 bytes" }, 101 { OPMODE_TR_160, "160 bytes" }, 102 { 0, NULL }, 103 }; 104 105 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = { 106 { OPMODE_TR_72, "72/128 bytes" }, 107 { OPMODE_TR_96, "96/256 bytes" }, 108 { OPMODE_TR_128, "128/512 bytes" }, 109 { OPMODE_TR_160, "160/1024 bytes" }, 110 { OPMODE_SF, "store and forward mode" }, 111 { 0, NULL }, 112 }; 113 114 #define TXTH_72 0 115 #define TXTH_96 1 116 #define TXTH_128 2 117 #define TXTH_160 3 118 #define TXTH_SF 4 119 120 /* 121 * The Winbond 89C840F does transmit threshold control totally 122 * differently. It simply has a 7-bit field which indicates 123 * the threshold: 124 * 125 * txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16; 126 * 127 * However, we just do Store-and-Forward mode on these chips, since 128 * the DMA engines seem to be flaky. 129 */ 130 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = { 131 { 0, "store and forward mode" }, 132 { 0, NULL }, 133 }; 134 135 #define TXTH_WINB_SF 0 136 137 void tlp_start __P((struct ifnet *)); 138 void tlp_watchdog __P((struct ifnet *)); 139 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 140 141 void tlp_shutdown __P((void *)); 142 143 void tlp_reset __P((struct tulip_softc *)); 144 int tlp_init __P((struct tulip_softc *)); 145 void tlp_rxdrain __P((struct tulip_softc *)); 146 void tlp_stop __P((struct tulip_softc *, int)); 147 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 148 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 149 void tlp_srom_idle __P((struct tulip_softc *)); 150 151 void tlp_filter_setup __P((struct tulip_softc *)); 152 void tlp_winb_filter_setup __P((struct tulip_softc *)); 153 154 void tlp_rxintr __P((struct tulip_softc *)); 155 void tlp_txintr __P((struct tulip_softc *)); 156 157 void tlp_mii_tick __P((void *)); 158 void tlp_mii_statchg __P((struct device *)); 159 void tlp_winb_mii_statchg __P((struct device *)); 160 161 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 162 int tlp_mii_setmedia __P((struct tulip_softc *)); 163 164 void tlp_sio_mii_sync __P((struct tulip_softc *)); 165 void tlp_sio_mii_sendbits __P((struct tulip_softc *, u_int32_t, int)); 166 int tlp_sio_mii_readreg __P((struct device *, int, int)); 167 void tlp_sio_mii_writereg __P((struct device *, int, int, int)); 168 169 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 170 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 171 172 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t)); 173 #define tlp_mchash(addr) (tlp_crc32((addr), ETHER_ADDR_LEN) & \ 174 (TULIP_MCHASHSIZE - 1)) 175 176 #ifdef TLP_DEBUG 177 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 178 printf x 179 #else 180 #define DPRINTF(sc, x) /* nothing */ 181 #endif 182 183 /* 184 * tlp_attach: 185 * 186 * Attach a Tulip interface to the system. 187 */ 188 void 189 tlp_attach(sc, name, enaddr) 190 struct tulip_softc *sc; 191 const char *name; 192 const u_int8_t *enaddr; 193 { 194 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 195 int i, rseg, error; 196 bus_dma_segment_t seg; 197 198 /* 199 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 200 */ 201 202 /* 203 * Setup the transmit threshold table. 204 */ 205 switch (sc->sc_chip) { 206 case TULIP_CHIP_DE425: 207 case TULIP_CHIP_21040: 208 case TULIP_CHIP_21041: 209 sc->sc_txth = tlp_10_txthresh_tab; 210 break; 211 212 default: 213 sc->sc_txth = tlp_10_100_txthresh_tab; 214 break; 215 } 216 217 /* 218 * Setup the filter setup function. 219 */ 220 switch (sc->sc_chip) { 221 case TULIP_CHIP_WB89C840F: 222 sc->sc_filter_setup = tlp_winb_filter_setup; 223 break; 224 225 default: 226 sc->sc_filter_setup = tlp_filter_setup; 227 break; 228 } 229 230 /* 231 * Set up the media status change function. 232 */ 233 switch (sc->sc_chip) { 234 case TULIP_CHIP_WB89C840F: 235 sc->sc_statchg = tlp_winb_mii_statchg; 236 break; 237 238 default: 239 /* 240 * We may override this if we have special media 241 * handling requirements (e.g. flipping GPIO pins). 242 * 243 * The pure-MII statchg function covers the basics. 244 */ 245 sc->sc_statchg = tlp_mii_statchg; 246 break; 247 } 248 249 /* 250 * Set up various chip-specific quirks. 251 */ 252 switch (sc->sc_chip) { 253 case TULIP_CHIP_82C168: 254 case TULIP_CHIP_82C169: 255 /* 256 * These chips seem to have busted DMA engines; just put them 257 * in Store-and-Forward mode from the get-go. 258 */ 259 sc->sc_txthresh = TXTH_SF; 260 break; 261 262 case TULIP_CHIP_WB89C840F: 263 sc->sc_flags |= TULIPF_IC_FS; 264 break; 265 266 default: 267 /* Nothing. */ 268 } 269 270 SIMPLEQ_INIT(&sc->sc_txfreeq); 271 SIMPLEQ_INIT(&sc->sc_txdirtyq); 272 273 /* 274 * Allocate the control data structures, and create and load the 275 * DMA map for it. 276 */ 277 if ((error = bus_dmamem_alloc(sc->sc_dmat, 278 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg, 279 0)) != 0) { 280 printf("%s: unable to allocate control data, error = %d\n", 281 sc->sc_dev.dv_xname, error); 282 goto fail_0; 283 } 284 285 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 286 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 287 BUS_DMA_COHERENT)) != 0) { 288 printf("%s: unable to map control data, error = %d\n", 289 sc->sc_dev.dv_xname, error); 290 goto fail_1; 291 } 292 293 if ((error = bus_dmamap_create(sc->sc_dmat, 294 sizeof(struct tulip_control_data), 1, 295 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 296 printf("%s: unable to create control data DMA map, " 297 "error = %d\n", sc->sc_dev.dv_xname, error); 298 goto fail_2; 299 } 300 301 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 302 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 303 0)) != 0) { 304 printf("%s: unable to load control data DMA map, error = %d\n", 305 sc->sc_dev.dv_xname, error); 306 goto fail_3; 307 } 308 309 /* 310 * Create the transmit buffer DMA maps. 311 */ 312 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 313 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 314 TULIP_NTXSEGS, MCLBYTES, 0, 0, 315 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 316 printf("%s: unable to create tx DMA map %d, " 317 "error = %d\n", sc->sc_dev.dv_xname, i, error); 318 goto fail_4; 319 } 320 } 321 322 /* 323 * Create the recieve buffer DMA maps. 324 */ 325 for (i = 0; i < TULIP_NRXDESC; i++) { 326 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 327 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 328 printf("%s: unable to create rx DMA map %d, " 329 "error = %d\n", sc->sc_dev.dv_xname, i, error); 330 goto fail_5; 331 } 332 sc->sc_rxsoft[i].rxs_mbuf = NULL; 333 } 334 335 /* 336 * Reset the chip to a known state. 337 */ 338 tlp_reset(sc); 339 340 /* Announce ourselves. */ 341 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 342 name != NULL ? name : "", name != NULL ? ", " : "", 343 ether_sprintf(enaddr)); 344 345 /* 346 * Initialize our media structures. This may probe the MII, if 347 * present. 348 */ 349 (*sc->sc_mediasw->tmsw_init)(sc); 350 351 ifp = &sc->sc_ethercom.ec_if; 352 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 353 ifp->if_softc = sc; 354 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 355 ifp->if_ioctl = tlp_ioctl; 356 ifp->if_start = tlp_start; 357 ifp->if_watchdog = tlp_watchdog; 358 359 /* 360 * Attach the interface. 361 */ 362 if_attach(ifp); 363 ether_ifattach(ifp, enaddr); 364 #if NBPFILTER > 0 365 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 366 sizeof(struct ether_header)); 367 #endif 368 369 /* 370 * Make sure the interface is shutdown during reboot. 371 */ 372 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 373 if (sc->sc_sdhook == NULL) 374 printf("%s: WARNING: unable to establish shutdown hook\n", 375 sc->sc_dev.dv_xname); 376 return; 377 378 /* 379 * Free any resources we've allocated during the failed attach 380 * attempt. Do this in reverse order and fall through. 381 */ 382 fail_5: 383 for (i = 0; i < TULIP_NRXDESC; i++) { 384 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 385 bus_dmamap_destroy(sc->sc_dmat, 386 sc->sc_rxsoft[i].rxs_dmamap); 387 } 388 fail_4: 389 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 390 if (sc->sc_txsoft[i].txs_dmamap != NULL) 391 bus_dmamap_destroy(sc->sc_dmat, 392 sc->sc_txsoft[i].txs_dmamap); 393 } 394 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 395 fail_3: 396 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 397 fail_2: 398 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 399 sizeof(struct tulip_control_data)); 400 fail_1: 401 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 402 fail_0: 403 return; 404 } 405 406 /* 407 * tlp_shutdown: 408 * 409 * Make sure the interface is stopped at reboot time. 410 */ 411 void 412 tlp_shutdown(arg) 413 void *arg; 414 { 415 struct tulip_softc *sc = arg; 416 417 tlp_stop(sc, 1); 418 } 419 420 /* 421 * tlp_start: [ifnet interface function] 422 * 423 * Start packet transmission on the interface. 424 */ 425 void 426 tlp_start(ifp) 427 struct ifnet *ifp; 428 { 429 struct tulip_softc *sc = ifp->if_softc; 430 struct mbuf *m0, *m; 431 struct tulip_txsoft *txs, *last_txs; 432 bus_dmamap_t dmamap; 433 int error, firsttx, nexttx, lasttx, ofree, seg; 434 435 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 436 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 437 438 /* 439 * If we want a filter setup, it means no more descriptors were 440 * available for the setup routine. Let it get a chance to wedge 441 * itself into the ring. 442 */ 443 if (sc->sc_flags & TULIPF_WANT_SETUP) 444 ifp->if_flags |= IFF_OACTIVE; 445 446 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 447 return; 448 449 /* 450 * Remember the previous number of free descriptors and 451 * the first descriptor we'll use. 452 */ 453 ofree = sc->sc_txfree; 454 firsttx = sc->sc_txnext; 455 456 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 457 sc->sc_dev.dv_xname, ofree, firsttx)); 458 459 /* 460 * Loop through the send queue, setting up transmit descriptors 461 * until we drain the queue, or use up all available transmit 462 * descriptors. 463 */ 464 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 465 sc->sc_txfree != 0) { 466 /* 467 * Grab a packet off the queue. 468 */ 469 IF_DEQUEUE(&ifp->if_snd, m0); 470 if (m0 == NULL) 471 break; 472 473 dmamap = txs->txs_dmamap; 474 475 /* 476 * Load the DMA map. If this fails, the packet either 477 * didn't fit in the alloted number of segments, or we were 478 * short on resources. In this case, we'll copy and try 479 * again. 480 */ 481 if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 482 BUS_DMA_NOWAIT) != 0) { 483 MGETHDR(m, M_DONTWAIT, MT_DATA); 484 if (m == NULL) { 485 printf("%s: unable to allocate Tx mbuf\n", 486 sc->sc_dev.dv_xname); 487 IF_PREPEND(&ifp->if_snd, m0); 488 break; 489 } 490 if (m0->m_pkthdr.len > MHLEN) { 491 MCLGET(m, M_DONTWAIT); 492 if ((m->m_flags & M_EXT) == 0) { 493 printf("%s: unable to allocate Tx " 494 "cluster\n", sc->sc_dev.dv_xname); 495 m_freem(m); 496 IF_PREPEND(&ifp->if_snd, m0); 497 break; 498 } 499 } 500 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 501 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 502 m_freem(m0); 503 m0 = m; 504 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 505 m0, BUS_DMA_NOWAIT); 506 if (error) { 507 printf("%s: unable to load Tx buffer, " 508 "error = %d\n", sc->sc_dev.dv_xname, error); 509 IF_PREPEND(&ifp->if_snd, m0); 510 break; 511 } 512 } 513 514 /* 515 * Ensure we have enough descriptors free to describe 516 * the packet. 517 */ 518 if (dmamap->dm_nsegs > sc->sc_txfree) { 519 /* 520 * Not enough free descriptors to transmit this 521 * packet. We haven't committed to anything yet, 522 * so just unload the DMA map, put the packet 523 * back on the queue, and punt. Notify the upper 524 * layer that there are no more slots left. 525 * 526 * XXX We could allocate an mbuf and copy, but 527 * XXX it is worth it? 528 */ 529 ifp->if_flags |= IFF_OACTIVE; 530 bus_dmamap_unload(sc->sc_dmat, dmamap); 531 IF_PREPEND(&ifp->if_snd, m0); 532 break; 533 } 534 535 /* 536 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 537 */ 538 539 /* Sync the DMA map. */ 540 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 541 BUS_DMASYNC_PREWRITE); 542 543 /* 544 * Initialize the transmit descriptors. 545 */ 546 for (nexttx = sc->sc_txnext, seg = 0; 547 seg < dmamap->dm_nsegs; 548 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 549 /* 550 * If this is the first descriptor we're 551 * enqueueing, don't set the OWN bit just 552 * yet. That could cause a race condition. 553 * We'll do it below. 554 */ 555 sc->sc_txdescs[nexttx].td_status = 556 (nexttx == firsttx) ? 0 : TDSTAT_OWN; 557 sc->sc_txdescs[nexttx].td_bufaddr1 = 558 dmamap->dm_segs[seg].ds_addr; 559 sc->sc_txdescs[nexttx].td_ctl = 560 (dmamap->dm_segs[seg].ds_len << TDCTL_SIZE1_SHIFT) | 561 TDCTL_CH; 562 lasttx = nexttx; 563 } 564 565 /* Set `first segment' and `last segment' appropriately. */ 566 sc->sc_txdescs[sc->sc_txnext].td_ctl |= TDCTL_Tx_FS; 567 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_LS; 568 569 #ifdef TLP_DEBUG 570 if (ifp->if_flags & IFF_DEBUG) { 571 printf(" txsoft %p trainsmit chain:\n", txs); 572 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 573 printf(" descriptor %d:\n", seg); 574 printf(" td_status: 0x%08x\n", 575 sc->sc_txdescs[seg].td_status); 576 printf(" td_ctl: 0x%08x\n", 577 sc->sc_txdescs[seg].td_ctl); 578 printf(" td_bufaddr1: 0x%08x\n", 579 sc->sc_txdescs[seg].td_bufaddr1); 580 printf(" td_bufaddr2: 0x%08x\n", 581 sc->sc_txdescs[seg].td_bufaddr2); 582 if (seg == lasttx) 583 break; 584 } 585 } 586 #endif 587 588 /* Sync the descriptors we're using. */ 589 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 590 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 591 592 /* 593 * Store a pointer to the packet so we can free it later, 594 * and remember what txdirty will be once the packet is 595 * done. 596 */ 597 txs->txs_mbuf = m0; 598 txs->txs_firstdesc = sc->sc_txnext; 599 txs->txs_lastdesc = lasttx; 600 601 /* Advance the tx pointer. */ 602 sc->sc_txfree -= dmamap->dm_nsegs; 603 sc->sc_txnext = nexttx; 604 605 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 606 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 607 608 last_txs = txs; 609 610 #if NBPFILTER > 0 611 /* 612 * Pass the packet to any BPF listeners. 613 */ 614 if (ifp->if_bpf) 615 bpf_mtap(ifp->if_bpf, m0); 616 #endif /* NBPFILTER > 0 */ 617 } 618 619 if (txs == NULL || sc->sc_txfree == 0) { 620 /* No more slots left; notify upper layer. */ 621 ifp->if_flags |= IFF_OACTIVE; 622 } 623 624 if (sc->sc_txfree != ofree) { 625 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 626 sc->sc_dev.dv_xname, lasttx, firsttx)); 627 /* 628 * Cause a transmit interrupt to happen on the 629 * last packet we enqueued. 630 */ 631 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_IC; 632 TULIP_CDTXSYNC(sc, lasttx, 1, 633 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 634 635 /* 636 * Some clone chips want IC on the *first* segment in 637 * the packet. Appease them. 638 */ 639 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 640 last_txs->txs_firstdesc != lasttx) { 641 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 642 TDCTL_Tx_IC; 643 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 644 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 645 } 646 647 /* 648 * The entire packet chain is set up. Give the 649 * first descriptor to the chip now. 650 */ 651 sc->sc_txdescs[firsttx].td_status |= TDSTAT_OWN; 652 TULIP_CDTXSYNC(sc, firsttx, 1, 653 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 654 655 /* Wake up the transmitter. */ 656 /* XXX USE AUTOPOLLING? */ 657 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 658 659 /* Set a watchdog timer in case the chip flakes out. */ 660 ifp->if_timer = 5; 661 } 662 } 663 664 /* 665 * tlp_watchdog: [ifnet interface function] 666 * 667 * Watchdog timer handler. 668 */ 669 void 670 tlp_watchdog(ifp) 671 struct ifnet *ifp; 672 { 673 struct tulip_softc *sc = ifp->if_softc; 674 int doing_setup, doing_transmit; 675 676 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 677 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 678 679 if (doing_setup && doing_transmit) { 680 printf("%s: filter setup and transmit timeout\n", 681 sc->sc_dev.dv_xname); 682 ifp->if_oerrors++; 683 } else if (doing_transmit) { 684 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 685 ifp->if_oerrors++; 686 } else if (doing_setup) 687 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 688 else 689 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 690 691 (void) tlp_init(sc); 692 693 /* Try to get more packets going. */ 694 tlp_start(ifp); 695 } 696 697 /* 698 * tlp_ioctl: [ifnet interface function] 699 * 700 * Handle control requests from the operator. 701 */ 702 int 703 tlp_ioctl(ifp, cmd, data) 704 struct ifnet *ifp; 705 u_long cmd; 706 caddr_t data; 707 { 708 struct tulip_softc *sc = ifp->if_softc; 709 struct ifreq *ifr = (struct ifreq *)data; 710 struct ifaddr *ifa = (struct ifaddr *)data; 711 int s, error = 0; 712 713 s = splnet(); 714 715 switch (cmd) { 716 case SIOCSIFADDR: 717 ifp->if_flags |= IFF_UP; 718 719 switch (ifa->ifa_addr->sa_family) { 720 #ifdef INET 721 case AF_INET: 722 if ((error = tlp_init(sc)) != 0) 723 break; 724 arp_ifinit(ifp, ifa); 725 break; 726 #endif /* INET */ 727 #ifdef NS 728 case AF_NS: 729 { 730 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 731 732 if (ns_nullhost(*ina)) 733 ina->x_host = *(union ns_host *) 734 LLADDR(ifp->if_sadl); 735 else 736 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 737 ifp->if_addrlen); 738 /* Set new address. */ 739 error = tlp_init(sc); 740 break; 741 } 742 #endif /* NS */ 743 default: 744 error = tlp_init(sc); 745 break; 746 } 747 break; 748 749 case SIOCSIFMTU: 750 if (ifr->ifr_mtu > ETHERMTU) 751 error = EINVAL; 752 else 753 ifp->if_mtu = ifr->ifr_mtu; 754 break; 755 756 case SIOCSIFFLAGS: 757 if ((ifp->if_flags & IFF_UP) == 0 && 758 (ifp->if_flags & IFF_RUNNING) != 0) { 759 /* 760 * If interface is marked down and it is running, then 761 * stop it. 762 */ 763 tlp_stop(sc, 1); 764 } else if ((ifp->if_flags & IFF_UP) != 0 && 765 (ifp->if_flags & IFF_RUNNING) == 0) { 766 /* 767 * If interfase it marked up and it is stopped, then 768 * start it. 769 */ 770 error = tlp_init(sc); 771 } else if ((ifp->if_flags & IFF_UP) != 0) { 772 /* 773 * Reset the interface to pick up changes in any other 774 * flags that affect the hardware state. 775 */ 776 error = tlp_init(sc); 777 } 778 break; 779 780 case SIOCADDMULTI: 781 case SIOCDELMULTI: 782 error = (cmd == SIOCADDMULTI) ? 783 ether_addmulti(ifr, &sc->sc_ethercom) : 784 ether_delmulti(ifr, &sc->sc_ethercom); 785 786 if (error == ENETRESET) { 787 /* 788 * Multicast list has changed. Set the filter 789 * accordingly. 790 */ 791 (*sc->sc_filter_setup)(sc); 792 error = 0; 793 } 794 break; 795 796 case SIOCSIFMEDIA: 797 case SIOCGIFMEDIA: 798 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 799 break; 800 801 default: 802 error = EINVAL; 803 break; 804 } 805 806 /* Try to get more packets going. */ 807 tlp_start(ifp); 808 809 splx(s); 810 return (error); 811 } 812 813 /* 814 * tlp_intr: 815 * 816 * Interrupt service routine. 817 */ 818 int 819 tlp_intr(arg) 820 void *arg; 821 { 822 struct tulip_softc *sc = arg; 823 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 824 u_int32_t status, rxstatus, txstatus; 825 int handled = 0, txthresh; 826 827 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 828 829 for (;;) { 830 status = TULIP_READ(sc, CSR_STATUS); 831 if (status) 832 TULIP_WRITE(sc, CSR_STATUS, status); 833 834 if ((status & sc->sc_inten) == 0) 835 break; 836 837 handled = 1; 838 839 rxstatus = status & sc->sc_rxint_mask; 840 txstatus = status & sc->sc_txint_mask; 841 842 if (rxstatus) { 843 /* Grab new any new packets. */ 844 tlp_rxintr(sc); 845 846 if (rxstatus & STATUS_RWT) 847 printf("%s: receive watchdog timeout\n", 848 sc->sc_dev.dv_xname); 849 850 if (rxstatus & STATUS_RU) { 851 printf("%s: receive ring overrun\n", 852 sc->sc_dev.dv_xname); 853 /* Get the receive process going again. */ 854 tlp_idle(sc, OPMODE_SR); 855 TULIP_WRITE(sc, CSR_RXLIST, 856 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 857 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 858 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 859 break; 860 } 861 } 862 863 if (txstatus) { 864 /* Sweep up transmit descriptors. */ 865 tlp_txintr(sc); 866 867 if (txstatus & STATUS_TJT) 868 printf("%s: transmit jabber timeout\n", 869 sc->sc_dev.dv_xname); 870 871 if (txstatus & STATUS_UNF) { 872 /* 873 * Increase our transmit threshold if 874 * another is available. 875 */ 876 txthresh = sc->sc_txthresh + 1; 877 if (sc->sc_txth[txthresh].txth_name != NULL) { 878 /* Idle the transmit process. */ 879 tlp_idle(sc, OPMODE_ST); 880 881 sc->sc_txthresh = txthresh; 882 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 883 sc->sc_opmode |= 884 sc->sc_txth[txthresh].txth_opmode; 885 printf("%s: transmit underrun; new " 886 "threshold: %s\n", 887 sc->sc_dev.dv_xname, 888 sc->sc_txth[txthresh].txth_name); 889 890 /* 891 * Set the new threshold and restart 892 * the transmit process. 893 */ 894 TULIP_WRITE(sc, CSR_OPMODE, 895 sc->sc_opmode); 896 } 897 /* 898 * XXX Log every Nth underrun from 899 * XXX now on? 900 */ 901 } 902 } 903 904 if (status & (STATUS_TPS|STATUS_RPS)) { 905 if (status & STATUS_TPS) 906 printf("%s: transmit process stopped\n", 907 sc->sc_dev.dv_xname); 908 if (status & STATUS_RPS) 909 printf("%s: receive process stopped\n", 910 sc->sc_dev.dv_xname); 911 (void) tlp_init(sc); 912 break; 913 } 914 915 if (status & STATUS_SE) { 916 const char *str; 917 switch (status & STATUS_EB) { 918 case STATUS_EB_PARITY: 919 str = "parity error"; 920 break; 921 922 case STATUS_EB_MABT: 923 str = "master abort"; 924 break; 925 926 case STATUS_EB_TABT: 927 str = "target abort"; 928 break; 929 930 default: 931 str = "unknown error"; 932 break; 933 } 934 printf("%s: fatal system error: %s\n", 935 sc->sc_dev.dv_xname, str); 936 (void) tlp_init(sc); 937 break; 938 } 939 940 /* 941 * Not handled: 942 * 943 * Transmit buffer unavailable -- normal 944 * condition, nothing to do, really. 945 * 946 * General purpose timer experied -- we don't 947 * use the general purpose timer. 948 * 949 * Early receive interrupt -- not available on 950 * all chips, we just use RI. We also only 951 * use single-segment receive DMA, so this 952 * is mostly useless. 953 */ 954 } 955 956 /* Try to get more packets going. */ 957 tlp_start(ifp); 958 959 return (handled); 960 } 961 962 /* 963 * tlp_rxintr: 964 * 965 * Helper; handle receive interrupts. 966 */ 967 void 968 tlp_rxintr(sc) 969 struct tulip_softc *sc; 970 { 971 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 972 struct ether_header *eh; 973 struct tulip_rxsoft *rxs; 974 struct mbuf *m; 975 u_int32_t rxstat; 976 int i, len; 977 978 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 979 rxs = &sc->sc_rxsoft[i]; 980 981 TULIP_CDRXSYNC(sc, i, 982 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 983 984 rxstat = sc->sc_rxdescs[i].td_status; 985 986 if (rxstat & TDSTAT_OWN) { 987 /* 988 * We have processed all of the receive buffers. 989 */ 990 break; 991 } 992 993 /* 994 * Make sure the packet fit in one buffer. This should 995 * always be the case. But the Lite-On PNIC, rev 33 996 * has an awful receive engine bug, which may require 997 * a very icky work-around. 998 */ 999 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1000 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1001 printf("%s: incoming packet spilled, resetting\n", 1002 sc->sc_dev.dv_xname); 1003 (void) tlp_init(sc); 1004 return; 1005 } 1006 1007 /* 1008 * If any collisions were seen on the wire, count one. 1009 */ 1010 if (rxstat & TDSTAT_Rx_CS) 1011 ifp->if_collisions++; 1012 1013 /* 1014 * If an error occured, update stats, clear the status 1015 * word, and leave the packet buffer in place. It will 1016 * simply be reused the next time the ring comes around. 1017 */ 1018 if (rxstat & TDSTAT_ES) { 1019 #define PRINTERR(bit, str) \ 1020 if (rxstat & (bit)) \ 1021 printf("%s: receive error: %s\n", \ 1022 sc->sc_dev.dv_xname, str) 1023 ifp->if_ierrors++; 1024 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1025 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1026 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1027 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1028 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1029 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1030 #undef PRINTERR 1031 TULIP_INIT_RXDESC(sc, i); 1032 continue; 1033 } 1034 1035 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1036 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1037 1038 /* 1039 * No errors; receive the packet. Note the Tulip 1040 * includes the CRC with every packet; trim it. 1041 */ 1042 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; 1043 1044 #ifdef __NO_STRICT_ALIGNMENT 1045 /* 1046 * Allocate a new mbuf cluster. If that fails, we are 1047 * out of memory, and must drop the packet and recycle 1048 * the buffer that's already attached to this descriptor. 1049 */ 1050 m = rxs->rxs_mbuf; 1051 if (tlp_add_rxbuf(sc, i) != 0) { 1052 ifp->if_ierrors++; 1053 TULIP_INIT_RXDESC(sc, i); 1054 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1055 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1056 continue; 1057 } 1058 #else 1059 /* 1060 * The Tulip's receive buffers must be 4-byte aligned. 1061 * But this means that the data after the Ethernet header 1062 * is misaligned. We must allocate a new buffer and 1063 * copy the data, shifted forward 2 bytes. 1064 */ 1065 MGETHDR(m, M_DONTWAIT, MT_DATA); 1066 if (m == NULL) { 1067 dropit: 1068 ifp->if_ierrors++; 1069 TULIP_INIT_RXDESC(sc, i); 1070 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1071 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1072 continue; 1073 } 1074 if (len > (MHLEN - 2)) { 1075 MCLGET(m, M_DONTWAIT); 1076 if ((m->m_flags & M_EXT) == 0) { 1077 m_freem(m); 1078 goto dropit; 1079 } 1080 } 1081 m->m_data += 2; 1082 1083 /* 1084 * Note that we use clusters for incoming frames, so the 1085 * buffer is virtually contiguous. 1086 */ 1087 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1088 1089 /* Allow the receive descriptor to continue using its mbuf. */ 1090 TULIP_INIT_RXDESC(sc, i); 1091 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1092 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1093 #endif /* __NO_STRICT_ALIGNMENT */ 1094 1095 ifp->if_ipackets++; 1096 eh = mtod(m, struct ether_header *); 1097 m->m_pkthdr.rcvif = ifp; 1098 m->m_pkthdr.len = m->m_len = len; 1099 1100 #if NBPFILTER > 0 1101 /* 1102 * Pass this up to any BPF listeners, but only 1103 * pass it up the stack if its for us. 1104 */ 1105 if (ifp->if_bpf) 1106 bpf_mtap(ifp->if_bpf, m); 1107 #endif /* NPBFILTER > 0 */ 1108 1109 /* 1110 * This test is outside the NBPFILTER block because 1111 * on the 21140 we have to use Hash-Only mode due to 1112 * a bug in the filter logic. 1113 */ 1114 if ((ifp->if_flags & IFF_PROMISC) != 0 || 1115 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 1116 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1117 ETHER_ADDR_LEN) != 0 && 1118 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) { 1119 m_freem(m); 1120 continue; 1121 } 1122 } 1123 1124 /* Pass it on. */ 1125 (*ifp->if_input)(ifp, m); 1126 } 1127 1128 /* Update the recieve pointer. */ 1129 sc->sc_rxptr = i; 1130 } 1131 1132 /* 1133 * tlp_txintr: 1134 * 1135 * Helper; handle transmit interrupts. 1136 */ 1137 void 1138 tlp_txintr(sc) 1139 struct tulip_softc *sc; 1140 { 1141 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1142 struct tulip_txsoft *txs; 1143 u_int32_t txstat; 1144 1145 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1146 sc->sc_dev.dv_xname, sc->sc_flags)); 1147 1148 ifp->if_flags &= ~IFF_OACTIVE; 1149 1150 /* 1151 * If we were doing a filter setup, check to see if it completed. 1152 */ 1153 if (sc->sc_flags & TULIPF_DOING_SETUP) { 1154 TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1155 if ((sc->sc_setup_desc.td_status & TDSTAT_OWN) == 0) 1156 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1157 } 1158 1159 /* 1160 * Go through our Tx list and free mbufs for those 1161 * frames that have been transmitted. 1162 */ 1163 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1164 TULIP_CDTXSYNC(sc, txs->txs_firstdesc, 1165 txs->txs_dmamap->dm_nsegs, 1166 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1167 1168 #ifdef TLP_DEBUG 1169 if (ifp->if_flags & IFF_DEBUG) { 1170 int i; 1171 printf(" txsoft %p trainsmit chain:\n", txs); 1172 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1173 printf(" descriptor %d:\n", i); 1174 printf(" td_status: 0x%08x\n", 1175 sc->sc_txdescs[i].td_status); 1176 printf(" td_ctl: 0x%08x\n", 1177 sc->sc_txdescs[i].td_ctl); 1178 printf(" td_bufaddr1: 0x%08x\n", 1179 sc->sc_txdescs[i].td_bufaddr1); 1180 printf(" td_bufaddr2: 0x%08x\n", 1181 sc->sc_txdescs[i].td_bufaddr2); 1182 if (i == txs->txs_lastdesc) 1183 break; 1184 } 1185 } 1186 #endif 1187 1188 txstat = sc->sc_txdescs[txs->txs_firstdesc].td_status; 1189 if (txstat & TDSTAT_OWN) 1190 break; 1191 1192 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1193 1194 sc->sc_txfree += txs->txs_dmamap->dm_nsegs; 1195 1196 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1197 0, txs->txs_dmamap->dm_mapsize, 1198 BUS_DMASYNC_POSTWRITE); 1199 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1200 m_freem(txs->txs_mbuf); 1201 txs->txs_mbuf = NULL; 1202 1203 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1204 1205 /* 1206 * Check for errors and collisions. 1207 */ 1208 if (txstat & TDSTAT_ES) { 1209 ifp->if_oerrors++; 1210 if (txstat & TDSTAT_Tx_EC) 1211 ifp->if_collisions += 16; 1212 if (txstat & TDSTAT_Tx_LC) 1213 ifp->if_collisions++; 1214 } else { 1215 /* Packet was transmitted successfully. */ 1216 ifp->if_opackets++; 1217 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1218 } 1219 } 1220 1221 /* 1222 * If there are no more pending transmissions, cancel the watchdog 1223 * timer. 1224 */ 1225 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1226 ifp->if_timer = 0; 1227 1228 /* 1229 * If we have a receive filter setup pending, do it now. 1230 */ 1231 if (sc->sc_flags & TULIPF_WANT_SETUP) 1232 (*sc->sc_filter_setup)(sc); 1233 } 1234 1235 /* 1236 * tlp_reset: 1237 * 1238 * Perform a soft reset on the Tulip. 1239 */ 1240 void 1241 tlp_reset(sc) 1242 struct tulip_softc *sc; 1243 { 1244 int i; 1245 1246 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1247 1248 for (i = 0; i < 1000; i++) { 1249 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1250 break; 1251 delay(10); 1252 } 1253 1254 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1255 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1256 1257 delay(1000); 1258 } 1259 1260 /* 1261 * tlp_init: 1262 * 1263 * Initialize the interface. Must be called at splnet(). 1264 */ 1265 int 1266 tlp_init(sc) 1267 struct tulip_softc *sc; 1268 { 1269 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1270 struct tulip_txsoft *txs; 1271 struct tulip_rxsoft *rxs; 1272 int i, error = 0; 1273 1274 /* 1275 * Cancel any pending I/O. 1276 */ 1277 tlp_stop(sc, 0); 1278 1279 /* 1280 * Reset the Tulip to a known state. 1281 */ 1282 tlp_reset(sc); 1283 1284 /* 1285 * Initialize the BUSMODE register. 1286 * 1287 * XXX What about read-multiple/read-line/write-line on 1288 * XXX the 21140 and up? 1289 */ 1290 sc->sc_busmode = BUSMODE_BAR | BUSMODE_PBL_DEFAULT; 1291 switch (sc->sc_cacheline) { 1292 default: 1293 /* 1294 * Note: We must *always* set these bits; a cache 1295 * alignment of 0 is RESERVED. 1296 */ 1297 case 8: 1298 sc->sc_busmode |= BUSMODE_CAL_8LW; 1299 break; 1300 case 16: 1301 sc->sc_busmode |= BUSMODE_CAL_16LW; 1302 break; 1303 case 32: 1304 sc->sc_busmode |= BUSMODE_CAL_32LW; 1305 break; 1306 } 1307 switch (sc->sc_chip) { 1308 case TULIP_CHIP_82C168: 1309 case TULIP_CHIP_82C169: 1310 sc->sc_busmode |= BUSMODE_PNIC_MBO; 1311 break; 1312 default: 1313 /* Nothing. */ 1314 break; 1315 } 1316 #if BYTE_ORDER == BIG_ENDIAN 1317 /* 1318 * XXX There are reports that this doesn't work properly 1319 * in the old Tulip driver, but BUSMODE_DBO does. However, 1320 * BUSMODE_DBO is not available on the 21040, and requires 1321 * us to byte-swap the setup packet. What to do? 1322 */ 1323 sc->sc_busmode |= BUSMODE_BLE; 1324 #endif 1325 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1326 1327 /* 1328 * Initialize the OPMODE register. We don't write it until 1329 * we're ready to begin the transmit and receive processes. 1330 * 1331 * Media-related OPMODE bits are set in the media callbacks 1332 * for each specific chip/board. 1333 */ 1334 sc->sc_opmode = OPMODE_SR | OPMODE_ST | 1335 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1336 switch (sc->sc_chip) { 1337 case TULIP_CHIP_21140: 1338 case TULIP_CHIP_21140A: 1339 case TULIP_CHIP_21142: 1340 case TULIP_CHIP_21143: 1341 sc->sc_opmode |= OPMODE_MBO; 1342 break; 1343 1344 default: 1345 /* Nothing. */ 1346 } 1347 1348 if (sc->sc_flags & TULIPF_HAS_MII) { 1349 switch (sc->sc_chip) { 1350 case TULIP_CHIP_82C168: 1351 case TULIP_CHIP_82C169: 1352 /* Enable the MII port. */ 1353 sc->sc_opmode |= OPMODE_PS; 1354 1355 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 1356 break; 1357 1358 case TULIP_CHIP_WB89C840F: 1359 /* Nothing. */ 1360 break; 1361 1362 default: 1363 /* Enable the MII port. */ 1364 sc->sc_opmode |= OPMODE_PS; 1365 break; 1366 } 1367 } else { 1368 switch (sc->sc_chip) { 1369 case TULIP_CHIP_82C168: 1370 case TULIP_CHIP_82C169: 1371 sc->sc_opmode |= OPMODE_PNIC_TBEN; 1372 break; 1373 1374 default: 1375 /* Nothing. */ 1376 } 1377 } 1378 1379 /* 1380 * Magical mystery initialization on the Macronix chips. 1381 * The MX98713 uses its own magic value, the rest share 1382 * a common one. 1383 */ 1384 switch (sc->sc_chip) { 1385 case TULIP_CHIP_MX98713: 1386 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1387 break; 1388 1389 case TULIP_CHIP_MX98713A: 1390 case TULIP_CHIP_MX98715: 1391 case TULIP_CHIP_MX98725: 1392 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1393 break; 1394 1395 default: 1396 /* Nothing. */ 1397 } 1398 1399 /* 1400 * Initialize the transmit descriptor ring. 1401 */ 1402 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1403 for (i = 0; i < TULIP_NTXDESC; i++) { 1404 sc->sc_txdescs[i].td_ctl = TDCTL_CH; 1405 sc->sc_txdescs[i].td_bufaddr2 = 1406 TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)); 1407 } 1408 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1409 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1410 sc->sc_txfree = TULIP_NTXDESC; 1411 sc->sc_txnext = 0; 1412 1413 /* 1414 * Initialize the transmit job descriptors. 1415 */ 1416 SIMPLEQ_INIT(&sc->sc_txfreeq); 1417 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1418 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1419 txs = &sc->sc_txsoft[i]; 1420 txs->txs_mbuf = NULL; 1421 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1422 } 1423 1424 /* 1425 * Initialize the receive descriptor and receive job 1426 * descriptor rings. 1427 */ 1428 for (i = 0; i < TULIP_NRXDESC; i++) { 1429 rxs = &sc->sc_rxsoft[i]; 1430 if (rxs->rxs_mbuf == NULL) { 1431 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1432 printf("%s: unable to allocate or map rx " 1433 "buffer %d, error = %d\n", 1434 sc->sc_dev.dv_xname, i, error); 1435 /* 1436 * XXX Should attempt to run with fewer receive 1437 * XXX buffers instead of just failing. 1438 */ 1439 tlp_rxdrain(sc); 1440 goto out; 1441 } 1442 } 1443 } 1444 sc->sc_rxptr = 0; 1445 1446 /* 1447 * Initialize the interrupt mask and enable interrupts. 1448 */ 1449 /* normal interrupts */ 1450 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1451 1452 /* abnormal interrupts */ 1453 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1454 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1455 1456 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1457 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1458 1459 switch (sc->sc_chip) { 1460 case TULIP_CHIP_WB89C840F: 1461 /* 1462 * Clear bits that we don't want that happen to 1463 * overlap or don't exist. 1464 */ 1465 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1466 break; 1467 1468 default: 1469 /* Nothing. */ 1470 } 1471 1472 sc->sc_rxint_mask &= sc->sc_inten; 1473 sc->sc_txint_mask &= sc->sc_inten; 1474 1475 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1476 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1477 1478 /* 1479 * Give the transmit and receive rings to the Tulip. 1480 */ 1481 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1482 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1483 1484 /* 1485 * On chips that do this differently, set the station address. 1486 */ 1487 switch (sc->sc_chip) { 1488 case TULIP_CHIP_WB89C840F: 1489 /* XXX Do this with stream writes? */ 1490 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1491 bus_space_write_1(sc->sc_st, sc->sc_sh, 1492 (CSR_WINB_CPA0 >> sc->sc_regshift) + i, 1493 LLADDR(ifp->if_sadl)[i]); 1494 } 1495 break; 1496 1497 default: 1498 /* Nothing. */ 1499 } 1500 1501 /* 1502 * Set the receive filter. This will start the transmit and 1503 * receive processes. 1504 */ 1505 (*sc->sc_filter_setup)(sc); 1506 1507 /* 1508 * Start the receive process. 1509 */ 1510 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1511 1512 if (sc->sc_tick != NULL) { 1513 /* Start the one second clock. */ 1514 timeout(sc->sc_tick, sc, hz); 1515 } 1516 1517 /* 1518 * Note that the interface is now running. 1519 */ 1520 ifp->if_flags |= IFF_RUNNING; 1521 ifp->if_flags &= ~IFF_OACTIVE; 1522 1523 /* 1524 * Set the media. We must do this after the transmit process is 1525 * running, since we may actually have to transmit packets on 1526 * our board to test link integrity. 1527 */ 1528 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1529 1530 out: 1531 if (error) 1532 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1533 return (error); 1534 } 1535 1536 /* 1537 * tlp_rxdrain: 1538 * 1539 * Drain the receive queue. 1540 */ 1541 void 1542 tlp_rxdrain(sc) 1543 struct tulip_softc *sc; 1544 { 1545 struct tulip_rxsoft *rxs; 1546 int i; 1547 1548 for (i = 0; i < TULIP_NRXDESC; i++) { 1549 rxs = &sc->sc_rxsoft[i]; 1550 if (rxs->rxs_mbuf != NULL) { 1551 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1552 m_freem(rxs->rxs_mbuf); 1553 rxs->rxs_mbuf = NULL; 1554 } 1555 } 1556 } 1557 1558 /* 1559 * tlp_stop: 1560 * 1561 * Stop transmission on the interface. 1562 */ 1563 void 1564 tlp_stop(sc, drain) 1565 struct tulip_softc *sc; 1566 int drain; 1567 { 1568 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1569 struct tulip_txsoft *txs; 1570 1571 if (sc->sc_tick != NULL) { 1572 /* Stop the one second clock. */ 1573 untimeout(sc->sc_tick, sc); 1574 } 1575 1576 /* Disable interrupts. */ 1577 TULIP_WRITE(sc, CSR_INTEN, 0); 1578 1579 /* Stop the transmit and receive processes. */ 1580 TULIP_WRITE(sc, CSR_OPMODE, 0); 1581 TULIP_WRITE(sc, CSR_RXLIST, 0); 1582 TULIP_WRITE(sc, CSR_TXLIST, 0); 1583 1584 /* 1585 * Release any queued transmit buffers. 1586 */ 1587 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1588 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1589 if (txs->txs_mbuf != NULL) { 1590 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1591 m_freem(txs->txs_mbuf); 1592 txs->txs_mbuf = NULL; 1593 } 1594 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1595 } 1596 1597 if (drain) { 1598 /* 1599 * Release the receive buffers. 1600 */ 1601 tlp_rxdrain(sc); 1602 } 1603 1604 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 1605 1606 /* 1607 * Mark the interface down and cancel the watchdog timer. 1608 */ 1609 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1610 ifp->if_timer = 0; 1611 } 1612 1613 #define SROM_EMIT(sc, x) \ 1614 do { \ 1615 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 1616 delay(1); \ 1617 } while (0) 1618 1619 /* 1620 * tlp_srom_idle: 1621 * 1622 * Put the SROM in idle state. 1623 */ 1624 void 1625 tlp_srom_idle(sc) 1626 struct tulip_softc *sc; 1627 { 1628 u_int32_t miirom; 1629 int i; 1630 1631 miirom = MIIROM_SR; 1632 SROM_EMIT(sc, miirom); 1633 1634 miirom |= MIIROM_RD; 1635 SROM_EMIT(sc, miirom); 1636 1637 miirom |= MIIROM_SROMCS; 1638 SROM_EMIT(sc, miirom); 1639 1640 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1641 1642 /* Strobe the clock 25 times. */ 1643 for (i = 0; i < 25; i++) { 1644 SROM_EMIT(sc, miirom); 1645 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1646 } 1647 1648 SROM_EMIT(sc, miirom); 1649 1650 miirom &= ~MIIROM_SROMCS; 1651 SROM_EMIT(sc, miirom); 1652 1653 SROM_EMIT(sc, 0); 1654 } 1655 1656 /* 1657 * tlp_read_srom: 1658 * 1659 * Read the Tulip SROM. 1660 */ 1661 void 1662 tlp_read_srom(sc, word, wordcnt, data) 1663 struct tulip_softc *sc; 1664 int word, wordcnt; 1665 u_int16_t *data; 1666 { 1667 u_int32_t miirom; 1668 int i, x; 1669 1670 tlp_srom_idle(sc); 1671 1672 /* Select the SROM. */ 1673 miirom = MIIROM_SR; 1674 SROM_EMIT(sc, miirom); 1675 1676 miirom |= MIIROM_RD; 1677 SROM_EMIT(sc, miirom); 1678 1679 for (i = 0; i < wordcnt; i++) { 1680 /* Send CHIP SELECT for one clock tick. */ 1681 miirom |= MIIROM_SROMCS; 1682 SROM_EMIT(sc, miirom); 1683 1684 /* Shift in the READ opcode. */ 1685 for (x = 3; x > 0; x--) { 1686 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 1687 miirom |= MIIROM_SROMDI; 1688 else 1689 miirom &= ~MIIROM_SROMDI; 1690 SROM_EMIT(sc, miirom); 1691 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1692 SROM_EMIT(sc, miirom); 1693 } 1694 1695 /* Shift in address. */ 1696 for (x = 6; x > 0; x--) { 1697 if ((word + i) & (1 << (x - 1))) 1698 miirom |= MIIROM_SROMDI; 1699 else 1700 miirom &= ~MIIROM_SROMDI; 1701 SROM_EMIT(sc, miirom); 1702 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1703 SROM_EMIT(sc, miirom); 1704 } 1705 1706 /* Shift out data. */ 1707 miirom &= ~MIIROM_SROMDI; 1708 data[i] = 0; 1709 for (x = 16; x > 0; x--) { 1710 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1711 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 1712 data[i] |= (1 << (x - 1)); 1713 SROM_EMIT(sc, miirom); 1714 } 1715 1716 /* Clear CHIP SELECT. */ 1717 miirom &= ~MIIROM_SROMCS; 1718 SROM_EMIT(sc, miirom); 1719 } 1720 1721 /* Deselect the SROM. */ 1722 SROM_EMIT(sc, 0); 1723 1724 /* ...and idle it. */ 1725 tlp_srom_idle(sc); 1726 } 1727 1728 #undef SROM_EMIT 1729 1730 /* 1731 * tlp_add_rxbuf: 1732 * 1733 * Add a receive buffer to the indicated descriptor. 1734 */ 1735 int 1736 tlp_add_rxbuf(sc, idx) 1737 struct tulip_softc *sc; 1738 int idx; 1739 { 1740 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 1741 struct mbuf *m; 1742 int error; 1743 1744 MGETHDR(m, M_DONTWAIT, MT_DATA); 1745 if (m == NULL) 1746 return (ENOBUFS); 1747 1748 MCLGET(m, M_DONTWAIT); 1749 if ((m->m_flags & M_EXT) == 0) { 1750 m_freem(m); 1751 return (ENOBUFS); 1752 } 1753 1754 if (rxs->rxs_mbuf != NULL) 1755 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1756 1757 rxs->rxs_mbuf = m; 1758 1759 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 1760 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 1761 if (error) { 1762 printf("%s: can't load rx DMA map %d, error = %d\n", 1763 sc->sc_dev.dv_xname, idx, error); 1764 panic("tlp_add_rxbuf"); /* XXX */ 1765 } 1766 1767 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1768 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1769 1770 TULIP_INIT_RXDESC(sc, idx); 1771 1772 return (0); 1773 } 1774 1775 /* 1776 * tlp_crc32: 1777 * 1778 * Compute the 32-bit CRC of the provided buffer. 1779 */ 1780 u_int32_t 1781 tlp_crc32(buf, len) 1782 const u_int8_t *buf; 1783 size_t len; 1784 { 1785 static const u_int32_t crctab[] = { 1786 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 1787 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, 1788 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 1789 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c 1790 }; 1791 u_int32_t crc; 1792 int i; 1793 1794 crc = 0xffffffff; 1795 for (i = 0; i < len; i++) { 1796 crc ^= buf[i]; 1797 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1798 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1799 } 1800 return (crc); 1801 } 1802 1803 /* 1804 * tlp_srom_crcok: 1805 * 1806 * Check the CRC of the Tulip SROM. 1807 */ 1808 int 1809 tlp_srom_crcok(romdata) 1810 u_int8_t *romdata; 1811 { 1812 u_int32_t crc; 1813 1814 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM); 1815 crc = (crc & 0xffff) ^ 0xffff; 1816 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 1817 return (1); 1818 return (0); 1819 } 1820 1821 /* 1822 * tlp_parse_old_srom: 1823 * 1824 * Parse old-format SROMs. 1825 * 1826 * This routine is largely lifted from Matt Thomas's `de' driver. 1827 */ 1828 int 1829 tlp_parse_old_srom(sc, enaddr) 1830 struct tulip_softc *sc; 1831 u_int8_t *enaddr; 1832 { 1833 static const u_int8_t testpat[] = 1834 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 1835 int i; 1836 u_int32_t cksum; 1837 1838 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 1839 /* 1840 * Some vendors (e.g. ZNYX) don't use the standard 1841 * DEC Address ROM format, but rather just have an 1842 * Ethernet address in the first 6 bytes, maybe a 1843 * 2 byte checksum, and then all 0xff's. 1844 */ 1845 for (i = 8; i < 32; i++) { 1846 if (sc->sc_srom[i] != 0xff) 1847 return (0); 1848 } 1849 1850 /* 1851 * Sanity check the Ethernet address: 1852 * 1853 * - Make sure it's not multicast or locally 1854 * assigned 1855 * - Make sure it has a non-0 OUI 1856 */ 1857 if (sc->sc_srom[0] & 3) 1858 return (0); 1859 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 1860 sc->sc_srom[2] == 0) 1861 return (0); 1862 1863 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1864 return (1); 1865 } 1866 1867 /* 1868 * Standard DEC Address ROM test. 1869 */ 1870 1871 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 1872 return (0); 1873 1874 for (i = 0; i < 8; i++) { 1875 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 1876 return (0); 1877 } 1878 1879 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1880 1881 cksum = *(u_int16_t *) &enaddr[0]; 1882 1883 cksum <<= 1; 1884 if (cksum > 0xffff) 1885 cksum -= 0xffff; 1886 1887 cksum += *(u_int16_t *) &enaddr[2]; 1888 if (cksum > 0xffff) 1889 cksum -= 0xffff; 1890 1891 cksum <<= 1; 1892 if (cksum > 0xffff) 1893 cksum -= 0xffff; 1894 1895 cksum += *(u_int16_t *) &enaddr[4]; 1896 if (cksum >= 0xffff) 1897 cksum -= 0xffff; 1898 1899 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 1900 return (0); 1901 1902 return (1); 1903 } 1904 1905 /* 1906 * tlp_filter_setup: 1907 * 1908 * Set the Tulip's receive filter. 1909 */ 1910 void 1911 tlp_filter_setup(sc) 1912 struct tulip_softc *sc; 1913 { 1914 struct ethercom *ec = &sc->sc_ethercom; 1915 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1916 struct ether_multi *enm; 1917 struct ether_multistep step; 1918 __volatile u_int32_t *sp; 1919 u_int8_t enaddr[ETHER_ADDR_LEN]; 1920 u_int32_t hash; 1921 int cnt; 1922 1923 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 1924 sc->sc_dev.dv_xname, sc->sc_flags)); 1925 1926 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 1927 1928 /* 1929 * If there are transmissions pending, wait until they have 1930 * completed. 1931 */ 1932 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 1933 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 1934 sc->sc_flags |= TULIPF_WANT_SETUP; 1935 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 1936 sc->sc_dev.dv_xname)); 1937 return; 1938 } 1939 sc->sc_flags &= ~TULIPF_WANT_SETUP; 1940 1941 /* 1942 * If we're running, idle the transmit and receive engines. If 1943 * we're NOT running, we're being called from tlp_init(), and our 1944 * writing OPMODE will start the transmit and receive processes 1945 * in motion. 1946 */ 1947 if (ifp->if_flags & IFF_RUNNING) 1948 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 1949 1950 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 1951 1952 if (ifp->if_flags & IFF_PROMISC) { 1953 sc->sc_opmode |= OPMODE_PR; 1954 goto allmulti; 1955 } 1956 1957 /* 1958 * Try Perfect filtering first. 1959 */ 1960 1961 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 1962 sp = TULIP_CDSP(sc); 1963 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 1964 cnt = 0; 1965 ETHER_FIRST_MULTI(step, ec, enm); 1966 while (enm != NULL) { 1967 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 1968 /* 1969 * We must listen to a range of multicast addresses. 1970 * For now, just accept all multicasts, rather than 1971 * trying to set only those filter bits needed to match 1972 * the range. (At this time, the only use of address 1973 * ranges is for IP multicast routing, for which the 1974 * range is big enough to require all bits set.) 1975 */ 1976 goto allmulti; 1977 } 1978 if (cnt == (TULIP_MAXADDRS - 2)) { 1979 /* 1980 * We already have our multicast limit (still need 1981 * our station address and broadcast). Go to 1982 * Hash-Perfect mode. 1983 */ 1984 goto hashperfect; 1985 } 1986 *sp++ = ((u_int16_t *) enm->enm_addrlo)[0]; 1987 *sp++ = ((u_int16_t *) enm->enm_addrlo)[1]; 1988 *sp++ = ((u_int16_t *) enm->enm_addrlo)[2]; 1989 ETHER_NEXT_MULTI(step, enm); 1990 } 1991 1992 if (ifp->if_flags & IFF_BROADCAST) { 1993 /* ...and the broadcast address. */ 1994 cnt++; 1995 *sp++ = 0xffff; 1996 *sp++ = 0xffff; 1997 *sp++ = 0xffff; 1998 } 1999 2000 /* Pad the rest with our station address. */ 2001 for (; cnt < TULIP_MAXADDRS; cnt++) { 2002 *sp++ = ((u_int16_t *) enaddr)[0]; 2003 *sp++ = ((u_int16_t *) enaddr)[1]; 2004 *sp++ = ((u_int16_t *) enaddr)[2]; 2005 } 2006 ifp->if_flags &= ~IFF_ALLMULTI; 2007 goto setit; 2008 2009 hashperfect: 2010 /* 2011 * Try Hash-Perfect mode. 2012 */ 2013 2014 /* 2015 * Some 21140 chips have broken Hash-Perfect modes. On these 2016 * chips, we simply use Hash-Only mode, and put our station 2017 * address into the filter. 2018 */ 2019 if (sc->sc_chip == TULIP_CHIP_21140) 2020 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2021 else 2022 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2023 sp = TULIP_CDSP(sc); 2024 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2025 ETHER_FIRST_MULTI(step, ec, enm); 2026 while (enm != NULL) { 2027 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2028 /* 2029 * We must listen to a range of multicast addresses. 2030 * For now, just accept all multicasts, rather than 2031 * trying to set only those filter bits needed to match 2032 * the range. (At this time, the only use of address 2033 * ranges is for IP multicast routing, for which the 2034 * range is big enough to require all bits set.) 2035 */ 2036 goto allmulti; 2037 } 2038 hash = tlp_mchash(enm->enm_addrlo); 2039 sp[hash >> 4] |= 1 << (hash & 0xf); 2040 ETHER_NEXT_MULTI(step, enm); 2041 } 2042 2043 if (ifp->if_flags & IFF_BROADCAST) { 2044 /* ...and the broadcast address. */ 2045 hash = tlp_mchash(etherbroadcastaddr); 2046 sp[hash >> 4] |= 1 << (hash & 0xf); 2047 } 2048 2049 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2050 /* ...and our station address. */ 2051 hash = tlp_mchash(enaddr); 2052 sp[hash >> 4] |= 1 << (hash & 0xf); 2053 } else { 2054 /* 2055 * Hash-Perfect mode; put our station address after 2056 * the hash table. 2057 */ 2058 sp[39] = ((u_int16_t *) enaddr)[0]; 2059 sp[40] = ((u_int16_t *) enaddr)[1]; 2060 sp[41] = ((u_int16_t *) enaddr)[2]; 2061 } 2062 ifp->if_flags &= ~IFF_ALLMULTI; 2063 goto setit; 2064 2065 allmulti: 2066 /* 2067 * Use Perfect filter mode. First address is the broadcast address, 2068 * and pad the rest with our station address. We'll set Pass-all- 2069 * multicast in OPMODE below. 2070 */ 2071 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2072 sp = TULIP_CDSP(sc); 2073 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2074 cnt = 0; 2075 if (ifp->if_flags & IFF_BROADCAST) { 2076 cnt++; 2077 *sp++ = 0xffff; 2078 *sp++ = 0xffff; 2079 *sp++ = 0xffff; 2080 } 2081 for (; cnt < TULIP_MAXADDRS; cnt++) { 2082 *sp++ = ((u_int16_t *) enaddr)[0]; 2083 *sp++ = ((u_int16_t *) enaddr)[1]; 2084 *sp++ = ((u_int16_t *) enaddr)[2]; 2085 } 2086 ifp->if_flags |= IFF_ALLMULTI; 2087 2088 setit: 2089 if (ifp->if_flags & IFF_ALLMULTI) 2090 sc->sc_opmode |= OPMODE_PM; 2091 2092 /* Sync the setup packet buffer. */ 2093 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2094 2095 /* 2096 * Fill in the setup packet descriptor. 2097 */ 2098 sc->sc_setup_desc.td_bufaddr1 = TULIP_CDSPADDR(sc); 2099 sc->sc_setup_desc.td_bufaddr2 = TULIP_CDTXADDR(sc, sc->sc_txnext); 2100 sc->sc_setup_desc.td_ctl = 2101 (TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2102 sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS | 2103 TDCTL_Tx_IC | TDCTL_CH; 2104 sc->sc_setup_desc.td_status = TDSTAT_OWN; 2105 TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2106 2107 /* 2108 * Write the address of the setup descriptor. This also has 2109 * the side effect of giving the transmit ring to the chip, 2110 * since the setup descriptor points to the next available 2111 * descriptor in the ring. 2112 */ 2113 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc)); 2114 2115 /* 2116 * Set the OPMODE register. This will also resume the 2117 * transmit transmit process we idled above. 2118 */ 2119 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2120 2121 sc->sc_flags |= TULIPF_DOING_SETUP; 2122 2123 /* 2124 * Kick the transmitter; this will cause the Tulip to 2125 * read the setup descriptor. 2126 */ 2127 /* XXX USE AUTOPOLLING? */ 2128 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2129 2130 /* Set up a watchdog timer in case the chip flakes out. */ 2131 ifp->if_timer = 5; 2132 2133 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2134 } 2135 2136 /* 2137 * tlp_winb_filter_setup: 2138 * 2139 * Set the Winbond 89C840F's receive filter. 2140 */ 2141 void 2142 tlp_winb_filter_setup(sc) 2143 struct tulip_softc *sc; 2144 { 2145 struct ethercom *ec = &sc->sc_ethercom; 2146 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2147 struct ether_multi *enm; 2148 struct ether_multistep step; 2149 u_int32_t hash, mchash[2]; 2150 2151 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2152 sc->sc_dev.dv_xname, sc->sc_flags)); 2153 2154 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2155 2156 if (ifp->if_flags & IFF_MULTICAST) 2157 sc->sc_opmode |= OPMODE_WINB_AMP; 2158 2159 if (ifp->if_flags & IFF_BROADCAST) 2160 sc->sc_opmode |= OPMODE_WINB_ABP; 2161 2162 if (ifp->if_flags & IFF_PROMISC) { 2163 sc->sc_opmode |= OPMODE_WINB_APP; 2164 goto allmulti; 2165 } 2166 2167 mchash[0] = mchash[1] = 0; 2168 2169 ETHER_FIRST_MULTI(step, ec, enm); 2170 while (enm != NULL) { 2171 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2172 /* 2173 * We must listen to a range of multicast addresses. 2174 * For now, just accept all multicasts, rather than 2175 * trying to set only those filter bits needed to match 2176 * the range. (At this time, the only use of address 2177 * ranges is for IP multicast routing, for which the 2178 * range is big enough to require all bits set.) 2179 */ 2180 goto allmulti; 2181 } 2182 2183 /* 2184 * According to the FreeBSD `wb' driver, yes, you 2185 * really do invert the hash. 2186 */ 2187 hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2188 & 0x3f; 2189 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2190 ETHER_NEXT_MULTI(step, enm); 2191 } 2192 ifp->if_flags &= ~IFF_ALLMULTI; 2193 goto setit; 2194 2195 allmulti: 2196 ifp->if_flags |= IFF_ALLMULTI; 2197 mchash[0] = mchash[1] = 0xffffffff; 2198 2199 setit: 2200 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2201 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2202 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2203 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2204 sc->sc_dev.dv_xname)); 2205 } 2206 2207 /* 2208 * tlp_idle: 2209 * 2210 * Cause the transmit and/or receive processes to go idle. 2211 */ 2212 void 2213 tlp_idle(sc, bits) 2214 struct tulip_softc *sc; 2215 u_int32_t bits; 2216 { 2217 static const char *tx_state_names[] = { 2218 "STOPPED", 2219 "RUNNING - FETCH", 2220 "RUNNING - WAIT", 2221 "RUNNING - READING", 2222 "-- RESERVED --", 2223 "RUNNING - SETUP", 2224 "SUSPENDED", 2225 "RUNNING - CLOSE", 2226 }; 2227 static const char *rx_state_names[] = { 2228 "STOPPED", 2229 "RUNNING - FETCH", 2230 "RUNNING - CHECK", 2231 "RUNNING - WAIT", 2232 "SUSPENDED", 2233 "RUNNING - CLOSE", 2234 "RUNNING - FLUSH", 2235 "RUNNING - QUEUE", 2236 }; 2237 u_int32_t csr, ackmask = 0; 2238 int i; 2239 2240 if (bits & OPMODE_ST) 2241 ackmask |= STATUS_TPS; 2242 2243 if (bits & OPMODE_SR) 2244 ackmask |= STATUS_RPS; 2245 2246 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2247 2248 for (i = 0; i < 1000; i++) { 2249 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2250 break; 2251 delay(10); 2252 } 2253 2254 csr = TULIP_READ(sc, CSR_STATUS); 2255 if ((csr & ackmask) != ackmask) { 2256 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2257 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2258 printf("%s: transmit process failed to idle: " 2259 "state %s\n", sc->sc_dev.dv_xname, 2260 tx_state_names[(csr & STATUS_TS) >> 20]); 2261 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2262 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2263 printf("%s: receive process failed to idle: " 2264 "state %s\n", sc->sc_dev.dv_xname, 2265 rx_state_names[(csr & STATUS_RS) >> 17]); 2266 } 2267 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2268 } 2269 2270 /***************************************************************************** 2271 * Generic media support functions. 2272 *****************************************************************************/ 2273 2274 /* 2275 * tlp_mediastatus: [ifmedia interface function] 2276 * 2277 * Query the current media. 2278 */ 2279 void 2280 tlp_mediastatus(ifp, ifmr) 2281 struct ifnet *ifp; 2282 struct ifmediareq *ifmr; 2283 { 2284 struct tulip_softc *sc = ifp->if_softc; 2285 2286 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2287 } 2288 2289 /* 2290 * tlp_mediachange: [ifmedia interface function] 2291 * 2292 * Update the current media. 2293 */ 2294 int 2295 tlp_mediachange(ifp) 2296 struct ifnet *ifp; 2297 { 2298 struct tulip_softc *sc = ifp->if_softc; 2299 2300 return ((*sc->sc_mediasw->tmsw_set)(sc)); 2301 } 2302 2303 /***************************************************************************** 2304 * Support functions for MII-attached media. 2305 *****************************************************************************/ 2306 2307 /* 2308 * tlp_mii_tick: 2309 * 2310 * One second timer, used to tick the MII. 2311 */ 2312 void 2313 tlp_mii_tick(arg) 2314 void *arg; 2315 { 2316 struct tulip_softc *sc = arg; 2317 int s; 2318 2319 s = splnet(); 2320 mii_tick(&sc->sc_mii); 2321 splx(s); 2322 2323 timeout(sc->sc_tick, sc, hz); 2324 } 2325 2326 /* 2327 * tlp_mii_statchg: [mii interface function] 2328 * 2329 * Callback from PHY when media changes. 2330 */ 2331 void 2332 tlp_mii_statchg(self) 2333 struct device *self; 2334 { 2335 struct tulip_softc *sc = (struct tulip_softc *)self; 2336 2337 /* Idle the transmit and receive processes. */ 2338 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2339 2340 /* 2341 * XXX What about Heartbeat Disable? Is it magically frobbed 2342 * XXX by the PHY? I hope so... 2343 */ 2344 2345 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 2346 2347 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 2348 sc->sc_opmode |= OPMODE_TTM; 2349 2350 if (sc->sc_mii.mii_media_active & IFM_FDX) 2351 sc->sc_opmode |= OPMODE_FD; 2352 2353 /* 2354 * Write new OPMODE bits. This also restarts the transmit 2355 * and receive processes. 2356 */ 2357 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2358 2359 /* XXX Update ifp->if_baudrate */ 2360 } 2361 2362 /* 2363 * tlp_winb_mii_statchg: [mii interface function] 2364 * 2365 * Callback from PHY when media changes. This version is 2366 * for the Winbond 89C840F, which has different OPMODE bits. 2367 */ 2368 void 2369 tlp_winb_mii_statchg(self) 2370 struct device *self; 2371 { 2372 struct tulip_softc *sc = (struct tulip_softc *)self; 2373 2374 /* Idle the transmit and receive processes. */ 2375 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2376 2377 /* 2378 * XXX What about Heartbeat Disable? Is it magically frobbed 2379 * XXX by the PHY? I hope so... 2380 */ 2381 2382 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 2383 2384 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 2385 sc->sc_opmode |= OPMODE_WINB_FES; 2386 2387 if (sc->sc_mii.mii_media_active & IFM_FDX) 2388 sc->sc_opmode |= OPMODE_FD; 2389 2390 /* 2391 * Write new OPMODE bits. This also restarts the transmit 2392 * and receive processes. 2393 */ 2394 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2395 2396 /* XXX Update ifp->if_baudrate */ 2397 } 2398 2399 /* 2400 * tlp_mii_getmedia: 2401 * 2402 * Callback from ifmedia to request current media status. 2403 */ 2404 void 2405 tlp_mii_getmedia(sc, ifmr) 2406 struct tulip_softc *sc; 2407 struct ifmediareq *ifmr; 2408 { 2409 2410 mii_pollstat(&sc->sc_mii); 2411 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2412 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2413 } 2414 2415 /* 2416 * tlp_mii_setmedia: 2417 * 2418 * Callback from ifmedia to request new media setting. 2419 */ 2420 int 2421 tlp_mii_setmedia(sc) 2422 struct tulip_softc *sc; 2423 { 2424 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2425 2426 if (ifp->if_flags & IFF_UP) 2427 mii_mediachg(&sc->sc_mii); 2428 return (0); 2429 } 2430 2431 #define MII_EMIT(sc, x) \ 2432 do { \ 2433 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2434 delay(1); \ 2435 } while (0) 2436 2437 /* 2438 * tlp_sio_mii_sync: 2439 * 2440 * Synchronize the SIO-attached MII. 2441 */ 2442 void 2443 tlp_sio_mii_sync(sc) 2444 struct tulip_softc *sc; 2445 { 2446 u_int32_t miirom; 2447 int i; 2448 2449 miirom = MIIROM_MIIDIR|MIIROM_MDO; 2450 2451 MII_EMIT(sc, miirom); 2452 for (i = 0; i < 32; i++) { 2453 MII_EMIT(sc, miirom | MIIROM_MDC); 2454 MII_EMIT(sc, miirom); 2455 } 2456 } 2457 2458 /* 2459 * tlp_sio_mii_sendbits: 2460 * 2461 * Send a series of bits out the SIO to the MII. 2462 */ 2463 void 2464 tlp_sio_mii_sendbits(sc, data, nbits) 2465 struct tulip_softc *sc; 2466 u_int32_t data; 2467 int nbits; 2468 { 2469 u_int32_t miirom, i; 2470 2471 miirom = MIIROM_MIIDIR; 2472 MII_EMIT(sc, miirom); 2473 2474 for (i = 1 << (nbits - 1); i != 0; i >>= 1) { 2475 if (data & i) 2476 miirom |= MIIROM_MDO; 2477 else 2478 miirom &= ~MIIROM_MDO; 2479 MII_EMIT(sc, miirom); 2480 MII_EMIT(sc, miirom|MIIROM_MDC); 2481 MII_EMIT(sc, miirom); 2482 } 2483 } 2484 2485 /* 2486 * tlp_sio_mii_readreg: 2487 * 2488 * Read a PHY register via SIO-attached MII. 2489 */ 2490 int 2491 tlp_sio_mii_readreg(self, phy, reg) 2492 struct device *self; 2493 int phy, reg; 2494 { 2495 struct tulip_softc *sc = (void *) self; 2496 int val = 0, err = 0, i; 2497 2498 tlp_sio_mii_sync(sc); 2499 2500 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2501 tlp_sio_mii_sendbits(sc, MII_COMMAND_READ, 2); 2502 tlp_sio_mii_sendbits(sc, phy, 5); 2503 tlp_sio_mii_sendbits(sc, reg, 5); 2504 2505 MII_EMIT(sc, MIIROM_MIIDIR); 2506 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2507 2508 MII_EMIT(sc, 0); 2509 MII_EMIT(sc, MIIROM_MDC); 2510 2511 err = TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI); 2512 2513 MII_EMIT(sc, 0); 2514 MII_EMIT(sc, MIIROM_MDC); 2515 2516 for (i = 0; i < 16; i++) { 2517 val <<= 1; 2518 MII_EMIT(sc, 0); 2519 if (err == 0 && TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI)) 2520 val |= 1; 2521 MII_EMIT(sc, MIIROM_MDC); 2522 } 2523 2524 MII_EMIT(sc, 0); 2525 2526 return (err ? 0 : val); 2527 } 2528 2529 /* 2530 * tlp_sio_mii_writereg: 2531 * 2532 * Write a PHY register via SIO-attached MII. 2533 */ 2534 void 2535 tlp_sio_mii_writereg(self, phy, reg, val) 2536 struct device *self; 2537 int phy, reg, val; 2538 { 2539 struct tulip_softc *sc = (void *) self; 2540 2541 tlp_sio_mii_sync(sc); 2542 2543 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2544 tlp_sio_mii_sendbits(sc, MII_COMMAND_WRITE, 2); 2545 tlp_sio_mii_sendbits(sc, phy, 5); 2546 tlp_sio_mii_sendbits(sc, reg, 5); 2547 tlp_sio_mii_sendbits(sc, MII_COMMAND_ACK, 2); 2548 tlp_sio_mii_sendbits(sc, val, 16); 2549 2550 MII_EMIT(sc, 0); 2551 } 2552 2553 #undef MII_EMIT 2554 2555 /* 2556 * tlp_pnic_mii_readreg: 2557 * 2558 * Read a PHY register on the Lite-On PNIC. 2559 */ 2560 int 2561 tlp_pnic_mii_readreg(self, phy, reg) 2562 struct device *self; 2563 int phy, reg; 2564 { 2565 struct tulip_softc *sc = (void *) self; 2566 u_int32_t val; 2567 int i; 2568 2569 TULIP_WRITE(sc, CSR_PNIC_MII, 2570 PNIC_MII_MBO | PNIC_MII_RESERVED | 2571 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 2572 (reg << PNIC_MII_REGSHIFT)); 2573 2574 for (i = 0; i < 1000; i++) { 2575 delay(10); 2576 val = TULIP_READ(sc, CSR_PNIC_MII); 2577 if ((val & PNIC_MII_BUSY) == 0) { 2578 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 2579 return (0); 2580 else 2581 return (val & PNIC_MII_DATA); 2582 } 2583 } 2584 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 2585 return (0); 2586 } 2587 2588 /* 2589 * tlp_pnic_mii_writereg: 2590 * 2591 * Write a PHY register on the Lite-On PNIC. 2592 */ 2593 void 2594 tlp_pnic_mii_writereg(self, phy, reg, val) 2595 struct device *self; 2596 int phy, reg, val; 2597 { 2598 struct tulip_softc *sc = (void *) self; 2599 int i; 2600 2601 TULIP_WRITE(sc, CSR_PNIC_MII, 2602 PNIC_MII_MBO | PNIC_MII_RESERVED | 2603 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 2604 (reg << PNIC_MII_REGSHIFT) | val); 2605 2606 for (i = 0; i < 1000; i++) { 2607 delay(10); 2608 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 2609 return; 2610 } 2611 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 2612 } 2613 2614 /***************************************************************************** 2615 * Chip/board-specific media switches. The ones here are ones that 2616 * are potentially common to multiple front-ends. 2617 *****************************************************************************/ 2618 2619 /* 2620 * 21040 and 21041 media switches. 2621 */ 2622 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 2623 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 2624 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 2625 void tlp_21040_21041_tmsw_get __P((struct tulip_softc *, 2626 struct ifmediareq *)); 2627 int tlp_21040_21041_tmsw_set __P((struct tulip_softc *)); 2628 2629 const struct tulip_mediasw tlp_21040_mediasw = { 2630 tlp_21040_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2631 }; 2632 2633 const struct tulip_mediasw tlp_21040_tp_mediasw = { 2634 tlp_21040_tp_tmsw_init, tlp_21040_21041_tmsw_get, 2635 tlp_21040_21041_tmsw_set 2636 }; 2637 2638 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 2639 tlp_21040_auibnc_tmsw_init, tlp_21040_21041_tmsw_get, 2640 tlp_21040_21041_tmsw_set 2641 }; 2642 2643 #define ADD(m, t) ifmedia_add(&sc->sc_mii.mii_media, (m), 0, (t)) 2644 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 2645 2646 void 2647 tlp_21040_tmsw_init(sc) 2648 struct tulip_softc *sc; 2649 { 2650 struct tulip_21040_21041_sia_media *tsm; 2651 const char *sep = ""; 2652 2653 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2654 tlp_mediastatus); 2655 2656 printf("%s: ", sc->sc_dev.dv_xname); 2657 2658 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2659 M_WAITOK); 2660 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2661 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2662 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2663 ADD(IFM_ETHER|IFM_10_T, tsm); 2664 PRINT("10baseT"); 2665 2666 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2667 M_WAITOK); 2668 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2669 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2670 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2671 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2672 PRINT("10baseT-FDX"); 2673 2674 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2675 M_WAITOK); 2676 tsm->tsm_siaconn = SIACONN_21040_AUI; 2677 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2678 tsm->tsm_siagen = SIAGEN_21040_AUI; 2679 ADD(IFM_ETHER|IFM_10_5, tsm); 2680 PRINT("10base5"); 2681 2682 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2683 M_WAITOK); 2684 tsm->tsm_siaconn = SIACONN_21040_EXTSIA; 2685 tsm->tsm_siatxrx = SIATXRX_21040_EXTSIA; 2686 tsm->tsm_siagen = SIAGEN_21040_EXTSIA; 2687 ADD(IFM_ETHER|IFM_MANUAL, tsm); 2688 PRINT("manual"); 2689 2690 /* 2691 * XXX Autosense not yet supported. 2692 */ 2693 2694 /* XXX This should be auto-sense. */ 2695 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2696 printf(", default 10baseT"); 2697 2698 printf("\n"); 2699 } 2700 2701 void 2702 tlp_21040_tp_tmsw_init(sc) 2703 struct tulip_softc *sc; 2704 { 2705 struct tulip_21040_21041_sia_media *tsm; 2706 const char *sep = ""; 2707 2708 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2709 tlp_mediastatus); 2710 2711 printf("%s: ", sc->sc_dev.dv_xname); 2712 2713 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2714 M_WAITOK); 2715 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2716 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2717 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2718 ADD(IFM_ETHER|IFM_10_T, tsm); 2719 PRINT("10baseT"); 2720 2721 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2722 M_WAITOK); 2723 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2724 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2725 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2726 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2727 PRINT("10baseT-FDX"); 2728 2729 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2730 printf(", default 10baseT"); 2731 2732 printf("\n"); 2733 } 2734 2735 void 2736 tlp_21040_auibnc_tmsw_init(sc) 2737 struct tulip_softc *sc; 2738 { 2739 struct tulip_21040_21041_sia_media *tsm; 2740 const char *sep = ""; 2741 2742 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2743 tlp_mediastatus); 2744 2745 printf("%s: ", sc->sc_dev.dv_xname); 2746 2747 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2748 M_WAITOK); 2749 tsm->tsm_siaconn = SIACONN_21040_AUI; 2750 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2751 tsm->tsm_siagen = SIAGEN_21040_AUI; 2752 ADD(IFM_ETHER|IFM_10_5, tsm); 2753 PRINT("10base5"); 2754 2755 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 2756 2757 printf("\n"); 2758 } 2759 2760 #undef ADD 2761 #undef PRINT 2762 2763 void 2764 tlp_21040_21041_tmsw_get(sc, ifmr) 2765 struct tulip_softc *sc; 2766 struct ifmediareq *ifmr; 2767 { 2768 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2769 2770 ifmr->ifm_status = 0; 2771 2772 switch (IFM_SUBTYPE(ife->ifm_media)) { 2773 case IFM_AUTO: 2774 /* 2775 * XXX Implement autosensing case. 2776 */ 2777 break; 2778 2779 case IFM_10_T: 2780 /* 2781 * We're able to detect link directly on twisted pair. 2782 */ 2783 ifmr->ifm_status = IFM_AVALID; 2784 if (TULIP_ISSET(sc, CSR_SIASTAT, SIASTAT_LKF) == 0) 2785 ifmr->ifm_status |= IFM_ACTIVE; 2786 /* FALLTHROUGH */ 2787 default: 2788 /* 2789 * If not autosensing, active media is the currently 2790 * selected media. 2791 */ 2792 ifmr->ifm_active = ife->ifm_media; 2793 } 2794 } 2795 2796 int 2797 tlp_21040_21041_tmsw_set(sc) 2798 struct tulip_softc *sc; 2799 { 2800 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2801 struct tulip_21040_21041_sia_media *tsm; 2802 2803 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 2804 /* 2805 * If not autosensing, just pull the SIA settings out 2806 * of the media entry. 2807 */ 2808 tsm = ife->ifm_aux; 2809 TULIP_WRITE(sc, CSR_SIACONN, SIACONN_SRL); 2810 TULIP_WRITE(sc, CSR_SIATXRX, tsm->tsm_siatxrx); 2811 TULIP_WRITE(sc, CSR_SIAGEN, tsm->tsm_siagen); 2812 TULIP_WRITE(sc, CSR_SIACONN, tsm->tsm_siaconn); 2813 2814 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2815 sc->sc_opmode &= ~OPMODE_FD; 2816 if (ife->ifm_media & IFM_FDX) 2817 sc->sc_opmode |= OPMODE_FD; 2818 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2819 } else { 2820 /* 2821 * XXX Implement autosensing case. 2822 */ 2823 } 2824 2825 return (0); 2826 } 2827 2828 /* 2829 * MII-on-SIO media switch. Handles only MII attached to the SIO. 2830 */ 2831 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 2832 2833 const struct tulip_mediasw tlp_sio_mii_mediasw = { 2834 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 2835 }; 2836 2837 void 2838 tlp_sio_mii_tmsw_init(sc) 2839 struct tulip_softc *sc; 2840 { 2841 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2842 2843 sc->sc_mii.mii_ifp = ifp; 2844 sc->sc_mii.mii_readreg = tlp_sio_mii_readreg; 2845 sc->sc_mii.mii_writereg = tlp_sio_mii_writereg; 2846 sc->sc_mii.mii_statchg = sc->sc_statchg; 2847 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2848 tlp_mediastatus); 2849 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 2850 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 2851 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 2852 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 2853 } else { 2854 sc->sc_flags |= TULIPF_HAS_MII; 2855 sc->sc_tick = tlp_mii_tick; 2856 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2857 } 2858 } 2859 2860 /* 2861 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 2862 */ 2863 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 2864 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 2865 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 2866 2867 const struct tulip_mediasw tlp_pnic_mediasw = { 2868 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 2869 }; 2870 2871 void tlp_pnic_nway_statchg __P((struct device *)); 2872 void tlp_pnic_nway_tick __P((void *)); 2873 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 2874 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 2875 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 2876 void tlp_pnic_nway_auto_timeout __P((void *)); 2877 void tlp_pnic_nway_status __P((struct tulip_softc *)); 2878 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 2879 2880 void 2881 tlp_pnic_tmsw_init(sc) 2882 struct tulip_softc *sc; 2883 { 2884 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2885 const char *sep = ""; 2886 2887 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 2888 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 2889 2890 sc->sc_mii.mii_ifp = ifp; 2891 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 2892 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 2893 sc->sc_mii.mii_statchg = sc->sc_statchg; 2894 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2895 tlp_mediastatus); 2896 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 2897 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 2898 /* XXX What about AUI/BNC support? */ 2899 printf("%s: ", sc->sc_dev.dv_xname); 2900 2901 tlp_pnic_nway_reset(sc); 2902 2903 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 2904 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 2905 PRINT("10baseT"); 2906 2907 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 2908 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 2909 PRINT("10baseT-FDX"); 2910 2911 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 2912 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 2913 PRINT("100baseTX"); 2914 2915 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 2916 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 2917 PNIC_NWAY_CAP100TXFDX); 2918 PRINT("100baseTX-FDX"); 2919 2920 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 2921 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 2922 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 2923 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 2924 PRINT("auto"); 2925 2926 printf("\n"); 2927 2928 sc->sc_statchg = tlp_pnic_nway_statchg; 2929 sc->sc_tick = tlp_pnic_nway_tick; 2930 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2931 } else { 2932 sc->sc_flags |= TULIPF_HAS_MII; 2933 sc->sc_tick = tlp_mii_tick; 2934 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2935 } 2936 2937 #undef ADD 2938 #undef PRINT 2939 } 2940 2941 void 2942 tlp_pnic_tmsw_get(sc, ifmr) 2943 struct tulip_softc *sc; 2944 struct ifmediareq *ifmr; 2945 { 2946 struct mii_data *mii = &sc->sc_mii; 2947 2948 if (sc->sc_flags & TULIPF_HAS_MII) 2949 tlp_mii_getmedia(sc, ifmr); 2950 else { 2951 mii->mii_media_status = 0; 2952 mii->mii_media_active = IFM_NONE; 2953 tlp_pnic_nway_service(sc, MII_POLLSTAT); 2954 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2955 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2956 } 2957 } 2958 2959 int 2960 tlp_pnic_tmsw_set(sc) 2961 struct tulip_softc *sc; 2962 { 2963 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2964 struct mii_data *mii = &sc->sc_mii; 2965 2966 if (sc->sc_flags & TULIPF_HAS_MII) 2967 return (tlp_mii_setmedia(sc)); 2968 2969 if (ifp->if_flags & IFF_UP) { 2970 mii->mii_media_status = 0; 2971 mii->mii_media_active = IFM_NONE; 2972 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 2973 } 2974 2975 return (0); 2976 } 2977 2978 void 2979 tlp_pnic_nway_statchg(self) 2980 struct device *self; 2981 { 2982 struct tulip_softc *sc = (struct tulip_softc *)self; 2983 2984 /* Idle the transmit and receive processes. */ 2985 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2986 2987 /* 2988 * XXX What about Heartbeat Disable? Is it magically frobbed 2989 * XXX by the PHY? I hope so... 2990 */ 2991 2992 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 2993 OPMODE_SCR); 2994 2995 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 2996 sc->sc_opmode |= OPMODE_TTM; 2997 TULIP_WRITE(sc, CSR_GPP, 2998 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 2999 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3000 } else { 3001 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR; 3002 TULIP_WRITE(sc, CSR_GPP, 3003 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 3004 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3005 } 3006 3007 if (sc->sc_mii.mii_media_active & IFM_FDX) 3008 sc->sc_opmode |= OPMODE_FD; 3009 3010 /* 3011 * Write new OPMODE bits. This also restarts the transmit 3012 * and receive processes. 3013 */ 3014 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3015 3016 /* XXX Update ifp->if_baudrate */ 3017 } 3018 3019 void 3020 tlp_pnic_nway_tick(arg) 3021 void *arg; 3022 { 3023 struct tulip_softc *sc = arg; 3024 int s; 3025 3026 s = splnet(); 3027 tlp_pnic_nway_service(sc, MII_TICK); 3028 splx(s); 3029 3030 timeout(tlp_pnic_nway_tick, sc, hz); 3031 } 3032 3033 /* 3034 * Support for the Lite-On PNIC internal NWay block. This is constructed 3035 * somewhat like a PHY driver for simplicity. 3036 */ 3037 3038 int 3039 tlp_pnic_nway_service(sc, cmd) 3040 struct tulip_softc *sc; 3041 int cmd; 3042 { 3043 struct mii_data *mii = &sc->sc_mii; 3044 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3045 3046 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 3047 return (0); 3048 3049 switch (cmd) { 3050 case MII_POLLSTAT: 3051 /* Nothing special to do here. */ 3052 break; 3053 3054 case MII_MEDIACHG: 3055 switch (IFM_SUBTYPE(ife->ifm_media)) { 3056 case IFM_AUTO: 3057 (void) tlp_pnic_nway_auto(sc, 1); 3058 break; 3059 case IFM_100_T4: 3060 /* 3061 * XXX Not supported as a manual setting right now. 3062 */ 3063 return (EINVAL); 3064 default: 3065 /* 3066 * NWAY register data is stored in the ifmedia entry. 3067 */ 3068 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3069 } 3070 break; 3071 3072 case MII_TICK: 3073 /* 3074 * Only used for autonegotiation. 3075 */ 3076 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3077 return (0); 3078 3079 /* 3080 * Check to see if we have link. If we do, we don't 3081 * need to restart the autonegotiation process. 3082 */ 3083 if (sc->sc_flags & TULIPF_LINK_UP) 3084 return (0); 3085 3086 /* 3087 * Only retry autonegotiation every 5 seconds. 3088 */ 3089 if (++sc->sc_nway_ticks != 5) 3090 return (0); 3091 3092 sc->sc_nway_ticks = 0; 3093 tlp_pnic_nway_reset(sc); 3094 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 3095 return (0); 3096 break; 3097 } 3098 3099 /* Update the media status. */ 3100 tlp_pnic_nway_status(sc); 3101 3102 /* Callback if something changed. */ 3103 if (sc->sc_nway_active != mii->mii_media_active || 3104 cmd == MII_MEDIACHG) { 3105 (*sc->sc_statchg)(&sc->sc_dev); 3106 sc->sc_nway_active = mii->mii_media_active; 3107 } 3108 return (0); 3109 } 3110 3111 void 3112 tlp_pnic_nway_reset(sc) 3113 struct tulip_softc *sc; 3114 { 3115 3116 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 3117 delay(100); 3118 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 3119 } 3120 3121 int 3122 tlp_pnic_nway_auto(sc, waitfor) 3123 struct tulip_softc *sc; 3124 int waitfor; 3125 { 3126 struct mii_data *mii = &sc->sc_mii; 3127 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3128 u_int32_t reg; 3129 int i; 3130 3131 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 3132 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3133 3134 if (waitfor) { 3135 /* Wait 500ms for it to complete. */ 3136 for (i = 0; i < 500; i++) { 3137 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3138 if (reg & PNIC_NWAY_LPAR_MASK) { 3139 tlp_pnic_nway_acomp(sc); 3140 return (0); 3141 } 3142 delay(1000); 3143 } 3144 #if 0 3145 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3146 printf("%s: autonegotiation failed to complete\n", 3147 sc->sc_dev.dv_xname); 3148 #endif 3149 3150 /* 3151 * Don't need to worry about clearing DOINGAUTO. 3152 * If that's set, a timeout is pending, and it will 3153 * clear the flag. 3154 */ 3155 return (EIO); 3156 } 3157 3158 /* 3159 * Just let it finish asynchronously. This is for the benefit of 3160 * the tick handler driving autonegotiation. Don't want 500ms 3161 * delays all the time while the system is running! 3162 */ 3163 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 3164 sc->sc_flags |= TULIPF_DOINGAUTO; 3165 timeout(tlp_pnic_nway_auto_timeout, sc, hz >> 1); 3166 } 3167 return (EJUSTRETURN); 3168 } 3169 3170 void 3171 tlp_pnic_nway_auto_timeout(arg) 3172 void *arg; 3173 { 3174 struct tulip_softc *sc = arg; 3175 u_int32_t reg; 3176 int s; 3177 3178 s = splnet(); 3179 sc->sc_flags &= ~TULIPF_DOINGAUTO; 3180 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3181 #if 0 3182 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3183 printf("%s: autonegotiation failed to complete\n", 3184 sc->sc_dev.dv_xname); 3185 #endif 3186 3187 tlp_pnic_nway_acomp(sc); 3188 3189 /* Update the media status. */ 3190 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 3191 splx(s); 3192 } 3193 3194 void 3195 tlp_pnic_nway_status(sc) 3196 struct tulip_softc *sc; 3197 { 3198 struct mii_data *mii = &sc->sc_mii; 3199 u_int32_t reg; 3200 3201 mii->mii_media_status = IFM_AVALID; 3202 mii->mii_media_active = IFM_ETHER; 3203 3204 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3205 3206 if (sc->sc_flags & TULIPF_LINK_UP) 3207 mii->mii_media_status |= IFM_ACTIVE; 3208 3209 if (reg & PNIC_NWAY_NW) { 3210 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 3211 /* Erg, still trying, I guess... */ 3212 mii->mii_media_active |= IFM_NONE; 3213 return; 3214 } 3215 3216 #if 0 3217 if (reg & PNIC_NWAY_LPAR100T4) 3218 mii->mii_media_active |= IFM_100_T4; 3219 else 3220 #endif 3221 if (reg & PNIC_NWAY_LPAR100TXFDX) 3222 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 3223 else if (reg & PNIC_NWAY_LPAR100TX) 3224 mii->mii_media_active |= IFM_100_TX; 3225 else if (reg & PNIC_NWAY_LPAR10TFDX) 3226 mii->mii_media_active |= IFM_10_T|IFM_FDX; 3227 else if (reg & PNIC_NWAY_LPAR10T) 3228 mii->mii_media_active |= IFM_10_T; 3229 else 3230 mii->mii_media_active |= IFM_NONE; 3231 } else { 3232 if (reg & PNIC_NWAY_100) 3233 mii->mii_media_active |= IFM_100_TX; 3234 else 3235 mii->mii_media_active |= IFM_10_T; 3236 if (reg & PNIC_NWAY_FD) 3237 mii->mii_media_active |= IFM_FDX; 3238 } 3239 } 3240 3241 void 3242 tlp_pnic_nway_acomp(sc) 3243 struct tulip_softc *sc; 3244 { 3245 u_int32_t reg; 3246 3247 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3248 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 3249 3250 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 3251 reg |= PNIC_NWAY_100; 3252 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 3253 reg |= PNIC_NWAY_FD; 3254 3255 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 3256 } 3257
Indexes created Tue Sep 23 07:09:52 GMT 2025