tulip.c revision 1.70 1 /* $NetBSD: tulip.c,v 1.70 2000/07/04 04:18:17 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family, and a variety of clone chips.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/callout.h>
52 #include <sys/mbuf.h>
53 #include <sys/malloc.h>
54 #include <sys/kernel.h>
55 #include <sys/socket.h>
56 #include <sys/ioctl.h>
57 #include <sys/errno.h>
58 #include <sys/device.h>
59
60 #include <machine/endian.h>
61
62 #include <uvm/uvm_extern.h>
63
64 #include <net/if.h>
65 #include <net/if_dl.h>
66 #include <net/if_media.h>
67 #include <net/if_ether.h>
68
69 #if NBPFILTER > 0
70 #include <net/bpf.h>
71 #endif
72
73 #ifdef INET
74 #include <netinet/in.h>
75 #include <netinet/if_inarp.h>
76 #endif
77
78 #ifdef NS
79 #include <netns/ns.h>
80 #include <netns/ns_if.h>
81 #endif
82
83 #include <machine/bus.h>
84 #include <machine/intr.h>
85
86 #include <dev/mii/mii.h>
87 #include <dev/mii/miivar.h>
88 #include <dev/mii/mii_bitbang.h>
89
90 #include <dev/ic/tulipreg.h>
91 #include <dev/ic/tulipvar.h>
92
93 const char *tlp_chip_names[] = TULIP_CHIP_NAMES;
94
95 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] =
96 TLP_TXTHRESH_TAB_10;
97
98 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] =
99 TLP_TXTHRESH_TAB_10_100;
100
101 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] =
102 TLP_TXTHRESH_TAB_WINB;
103
104 const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] =
105 TLP_TXTHRESH_TAB_DM9102;
106
107 void tlp_start __P((struct ifnet *));
108 void tlp_watchdog __P((struct ifnet *));
109 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t));
110
111 void tlp_shutdown __P((void *));
112
113 void tlp_reset __P((struct tulip_softc *));
114 int tlp_init __P((struct tulip_softc *));
115 void tlp_rxdrain __P((struct tulip_softc *));
116 void tlp_stop __P((struct tulip_softc *, int));
117 int tlp_add_rxbuf __P((struct tulip_softc *, int));
118 void tlp_idle __P((struct tulip_softc *, u_int32_t));
119 void tlp_srom_idle __P((struct tulip_softc *));
120 int tlp_srom_size __P((struct tulip_softc *));
121
122 int tlp_enable __P((struct tulip_softc *));
123 void tlp_disable __P((struct tulip_softc *));
124 void tlp_power __P((int, void *));
125
126 void tlp_filter_setup __P((struct tulip_softc *));
127 void tlp_winb_filter_setup __P((struct tulip_softc *));
128 void tlp_al981_filter_setup __P((struct tulip_softc *));
129
130 void tlp_rxintr __P((struct tulip_softc *));
131 void tlp_txintr __P((struct tulip_softc *));
132
133 void tlp_mii_tick __P((void *));
134 void tlp_mii_statchg __P((struct device *));
135 void tlp_winb_mii_statchg __P((struct device *));
136 void tlp_dm9102_mii_statchg __P((struct device *));
137
138 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *));
139 int tlp_mii_setmedia __P((struct tulip_softc *));
140
141 int tlp_bitbang_mii_readreg __P((struct device *, int, int));
142 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int));
143
144 int tlp_pnic_mii_readreg __P((struct device *, int, int));
145 void tlp_pnic_mii_writereg __P((struct device *, int, int, int));
146
147 int tlp_al981_mii_readreg __P((struct device *, int, int));
148 void tlp_al981_mii_writereg __P((struct device *, int, int, int));
149
150 void tlp_2114x_preinit __P((struct tulip_softc *));
151 void tlp_2114x_mii_preinit __P((struct tulip_softc *));
152 void tlp_pnic_preinit __P((struct tulip_softc *));
153 void tlp_dm9102_preinit __P((struct tulip_softc *));
154
155 void tlp_21140_reset __P((struct tulip_softc *));
156 void tlp_21142_reset __P((struct tulip_softc *));
157 void tlp_pmac_reset __P((struct tulip_softc *));
158 void tlp_dm9102_reset __P((struct tulip_softc *));
159
160 #define tlp_mchash(addr, sz) \
161 (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1))
162
163 /*
164 * MII bit-bang glue.
165 */
166 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *));
167 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t));
168
169 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = {
170 tlp_sio_mii_bitbang_read,
171 tlp_sio_mii_bitbang_write,
172 {
173 MIIROM_MDO, /* MII_BIT_MDO */
174 MIIROM_MDI, /* MII_BIT_MDI */
175 MIIROM_MDC, /* MII_BIT_MDC */
176 0, /* MII_BIT_DIR_HOST_PHY */
177 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */
178 }
179 };
180
181 #ifdef TLP_DEBUG
182 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \
183 printf x
184 #else
185 #define DPRINTF(sc, x) /* nothing */
186 #endif
187
188 #ifdef TLP_STATS
189 void tlp_print_stats __P((struct tulip_softc *));
190 #endif
191
192 /*
193 * Can be used to debug the SROM-related things, including contents.
194 * Initialized so that it's patchable.
195 */
196 int tlp_srom_debug = 0;
197
198 /*
199 * tlp_attach:
200 *
201 * Attach a Tulip interface to the system.
202 */
203 void
204 tlp_attach(sc, enaddr)
205 struct tulip_softc *sc;
206 const u_int8_t *enaddr;
207 {
208 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
209 int i, error;
210
211 callout_init(&sc->sc_nway_callout);
212 callout_init(&sc->sc_tick_callout);
213
214 /*
215 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift!
216 */
217
218 /*
219 * Setup the transmit threshold table.
220 */
221 switch (sc->sc_chip) {
222 case TULIP_CHIP_DE425:
223 case TULIP_CHIP_21040:
224 case TULIP_CHIP_21041:
225 sc->sc_txth = tlp_10_txthresh_tab;
226 break;
227
228 case TULIP_CHIP_DM9102:
229 case TULIP_CHIP_DM9102A:
230 sc->sc_txth = tlp_dm9102_txthresh_tab;
231 break;
232
233 default:
234 sc->sc_txth = tlp_10_100_txthresh_tab;
235 break;
236 }
237
238 /*
239 * Setup the filter setup function.
240 */
241 switch (sc->sc_chip) {
242 case TULIP_CHIP_WB89C840F:
243 sc->sc_filter_setup = tlp_winb_filter_setup;
244 break;
245
246 case TULIP_CHIP_AL981:
247 sc->sc_filter_setup = tlp_al981_filter_setup;
248 break;
249
250 default:
251 sc->sc_filter_setup = tlp_filter_setup;
252 break;
253 }
254
255 /*
256 * Set up the media status change function.
257 */
258 switch (sc->sc_chip) {
259 case TULIP_CHIP_WB89C840F:
260 sc->sc_statchg = tlp_winb_mii_statchg;
261 break;
262
263 case TULIP_CHIP_DM9102:
264 case TULIP_CHIP_DM9102A:
265 sc->sc_statchg = tlp_dm9102_mii_statchg;
266 break;
267
268 default:
269 /*
270 * We may override this if we have special media
271 * handling requirements (e.g. flipping GPIO pins).
272 *
273 * The pure-MII statchg function covers the basics.
274 */
275 sc->sc_statchg = tlp_mii_statchg;
276 break;
277 }
278
279 /*
280 * Default to no FS|LS in setup packet descriptors. They're
281 * supposed to be zero according to the 21040 and 21143
282 * manuals, and some chips fall over badly if they're
283 * included. Yet, other chips seem to require them. Sigh.
284 */
285 switch (sc->sc_chip) {
286 case TULIP_CHIP_X3201_3:
287 sc->sc_setup_fsls = TDCTL_Tx_FS|TDCTL_Tx_LS;
288 break;
289
290 default:
291 sc->sc_setup_fsls = 0;
292 }
293
294 /*
295 * Set up various chip-specific quirks.
296 *
297 * Note that wherever we can, we use the "ring" option for
298 * transmit and receive descriptors. This is because some
299 * clone chips apparently have problems when using chaining,
300 * although some *only* support chaining.
301 *
302 * What we do is always program the "next" pointer, and then
303 * conditionally set the TDCTL_CH and TDCTL_ER bits in the
304 * appropriate places.
305 */
306 switch (sc->sc_chip) {
307 case TULIP_CHIP_21140:
308 case TULIP_CHIP_21140A:
309 case TULIP_CHIP_21142:
310 case TULIP_CHIP_21143:
311 case TULIP_CHIP_82C115: /* 21143-like */
312 case TULIP_CHIP_MX98713: /* 21140-like */
313 case TULIP_CHIP_MX98713A: /* 21143-like */
314 case TULIP_CHIP_MX98715: /* 21143-like */
315 case TULIP_CHIP_MX98715A: /* 21143-like */
316 case TULIP_CHIP_MX98725: /* 21143-like */
317 /*
318 * Run these chips in ring mode.
319 */
320 sc->sc_tdctl_ch = 0;
321 sc->sc_tdctl_er = TDCTL_ER;
322 sc->sc_preinit = tlp_2114x_preinit;
323 break;
324
325 case TULIP_CHIP_82C168:
326 case TULIP_CHIP_82C169:
327 /*
328 * Run these chips in ring mode.
329 */
330 sc->sc_tdctl_ch = 0;
331 sc->sc_tdctl_er = TDCTL_ER;
332 sc->sc_preinit = tlp_pnic_preinit;
333
334 /*
335 * These chips seem to have busted DMA engines; just put them
336 * in Store-and-Forward mode from the get-go.
337 */
338 sc->sc_txthresh = TXTH_SF;
339 break;
340
341 case TULIP_CHIP_WB89C840F:
342 /*
343 * Run this chip in chained mode.
344 */
345 sc->sc_tdctl_ch = TDCTL_CH;
346 sc->sc_tdctl_er = 0;
347 sc->sc_flags |= TULIPF_IC_FS;
348 break;
349
350 case TULIP_CHIP_DM9102:
351 case TULIP_CHIP_DM9102A:
352 /*
353 * Run these chips in chained mode.
354 */
355 sc->sc_tdctl_ch = TDCTL_CH;
356 sc->sc_tdctl_er = 0;
357 sc->sc_preinit = tlp_dm9102_preinit;
358
359 /*
360 * These chips have a broken bus interface, so we
361 * can't use any optimized bus commands. For this
362 * reason, we tend to underrun pretty quickly, so
363 * just to Store-and-Forward mode from the get-go.
364 */
365 sc->sc_txthresh = TXTH_DM9102_SF;
366 break;
367
368 default:
369 /*
370 * Default to running in ring mode.
371 */
372 sc->sc_tdctl_ch = 0;
373 sc->sc_tdctl_er = TDCTL_ER;
374 }
375
376 /*
377 * Set up the MII bit-bang operations.
378 */
379 switch (sc->sc_chip) {
380 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */
381 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
382 break;
383
384 default:
385 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
386 }
387
388 SIMPLEQ_INIT(&sc->sc_txfreeq);
389 SIMPLEQ_INIT(&sc->sc_txdirtyq);
390
391 /*
392 * Allocate the control data structures, and create and load the
393 * DMA map for it.
394 */
395 if ((error = bus_dmamem_alloc(sc->sc_dmat,
396 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg,
397 1, &sc->sc_cdnseg, 0)) != 0) {
398 printf("%s: unable to allocate control data, error = %d\n",
399 sc->sc_dev.dv_xname, error);
400 goto fail_0;
401 }
402
403 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg,
404 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data,
405 BUS_DMA_COHERENT)) != 0) {
406 printf("%s: unable to map control data, error = %d\n",
407 sc->sc_dev.dv_xname, error);
408 goto fail_1;
409 }
410
411 if ((error = bus_dmamap_create(sc->sc_dmat,
412 sizeof(struct tulip_control_data), 1,
413 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
414 printf("%s: unable to create control data DMA map, "
415 "error = %d\n", sc->sc_dev.dv_xname, error);
416 goto fail_2;
417 }
418
419 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
420 sc->sc_control_data, sizeof(struct tulip_control_data), NULL,
421 0)) != 0) {
422 printf("%s: unable to load control data DMA map, error = %d\n",
423 sc->sc_dev.dv_xname, error);
424 goto fail_3;
425 }
426
427 /*
428 * Create the transmit buffer DMA maps.
429 *
430 * Note that on the Xircom clone, transmit buffers must be
431 * 4-byte aligned. We're almost guaranteed to have to copy
432 * the packet in that case, so we just limit ourselves to
433 * one segment.
434 *
435 * On the DM9102, the transmit logic can only handle one
436 * DMA segment.
437 */
438 switch (sc->sc_chip) {
439 case TULIP_CHIP_X3201_3:
440 case TULIP_CHIP_DM9102:
441 case TULIP_CHIP_DM9102A:
442 sc->sc_ntxsegs = 1;
443 break;
444
445 default:
446 sc->sc_ntxsegs = TULIP_NTXSEGS;
447 }
448 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
449 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
450 sc->sc_ntxsegs, MCLBYTES, 0, 0,
451 &sc->sc_txsoft[i].txs_dmamap)) != 0) {
452 printf("%s: unable to create tx DMA map %d, "
453 "error = %d\n", sc->sc_dev.dv_xname, i, error);
454 goto fail_4;
455 }
456 }
457
458 /*
459 * Create the recieve buffer DMA maps.
460 */
461 for (i = 0; i < TULIP_NRXDESC; i++) {
462 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
463 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
464 printf("%s: unable to create rx DMA map %d, "
465 "error = %d\n", sc->sc_dev.dv_xname, i, error);
466 goto fail_5;
467 }
468 sc->sc_rxsoft[i].rxs_mbuf = NULL;
469 }
470
471 /*
472 * From this point forward, the attachment cannot fail. A failure
473 * before this point releases all resources that may have been
474 * allocated.
475 */
476 sc->sc_flags |= TULIPF_ATTACHED;
477
478 /*
479 * Reset the chip to a known state.
480 */
481 tlp_reset(sc);
482
483 /* Announce ourselves. */
484 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname,
485 sc->sc_name[0] != '\0' ? sc->sc_name : "",
486 sc->sc_name[0] != '\0' ? ", " : "",
487 ether_sprintf(enaddr));
488
489 /*
490 * Initialize our media structures. This may probe the MII, if
491 * present.
492 */
493 (*sc->sc_mediasw->tmsw_init)(sc);
494
495 strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
496 ifp->if_softc = sc;
497 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
498 ifp->if_ioctl = tlp_ioctl;
499 ifp->if_start = tlp_start;
500 ifp->if_watchdog = tlp_watchdog;
501
502 /*
503 * Attach the interface.
504 */
505 if_attach(ifp);
506 ether_ifattach(ifp, enaddr);
507 #if NBPFILTER > 0
508 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
509 sizeof(struct ether_header));
510 #endif
511
512 /*
513 * Make sure the interface is shutdown during reboot.
514 */
515 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc);
516 if (sc->sc_sdhook == NULL)
517 printf("%s: WARNING: unable to establish shutdown hook\n",
518 sc->sc_dev.dv_xname);
519
520 /*
521 * Add a suspend hook to make sure we come back up after a
522 * resume.
523 */
524 sc->sc_powerhook = powerhook_establish(tlp_power, sc);
525 if (sc->sc_powerhook == NULL)
526 printf("%s: WARNING: unable to establish power hook\n",
527 sc->sc_dev.dv_xname);
528 return;
529
530 /*
531 * Free any resources we've allocated during the failed attach
532 * attempt. Do this in reverse order and fall through.
533 */
534 fail_5:
535 for (i = 0; i < TULIP_NRXDESC; i++) {
536 if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
537 bus_dmamap_destroy(sc->sc_dmat,
538 sc->sc_rxsoft[i].rxs_dmamap);
539 }
540 fail_4:
541 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
542 if (sc->sc_txsoft[i].txs_dmamap != NULL)
543 bus_dmamap_destroy(sc->sc_dmat,
544 sc->sc_txsoft[i].txs_dmamap);
545 }
546 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
547 fail_3:
548 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
549 fail_2:
550 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
551 sizeof(struct tulip_control_data));
552 fail_1:
553 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg);
554 fail_0:
555 return;
556 }
557
558 /*
559 * tlp_activate:
560 *
561 * Handle device activation/deactivation requests.
562 */
563 int
564 tlp_activate(self, act)
565 struct device *self;
566 enum devact act;
567 {
568 struct tulip_softc *sc = (void *) self;
569 int s, error = 0;
570
571 s = splnet();
572 switch (act) {
573 case DVACT_ACTIVATE:
574 error = EOPNOTSUPP;
575 break;
576
577 case DVACT_DEACTIVATE:
578 if (sc->sc_flags & TULIPF_HAS_MII)
579 mii_activate(&sc->sc_mii, act, MII_PHY_ANY,
580 MII_OFFSET_ANY);
581 if_deactivate(&sc->sc_ethercom.ec_if);
582 break;
583 }
584 splx(s);
585
586 return (error);
587 }
588
589 /*
590 * tlp_detach:
591 *
592 * Detach a Tulip interface.
593 */
594 int
595 tlp_detach(sc)
596 struct tulip_softc *sc;
597 {
598 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
599 struct tulip_rxsoft *rxs;
600 struct tulip_txsoft *txs;
601 int i;
602
603 /*
604 * Suceed now if there isn't any work to do.
605 */
606 if ((sc->sc_flags & TULIPF_ATTACHED) == 0)
607 return (0);
608
609 /* Unhook our tick handler. */
610 if (sc->sc_tick)
611 callout_stop(&sc->sc_tick_callout);
612
613 if (sc->sc_flags & TULIPF_HAS_MII) {
614 /* Detach all PHYs */
615 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
616 }
617
618 /* Delete all remaining media. */
619 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
620
621 #if NBPFILTER > 0
622 bpfdetach(ifp);
623 #endif
624 ether_ifdetach(ifp);
625 if_detach(ifp);
626
627 for (i = 0; i < TULIP_NRXDESC; i++) {
628 rxs = &sc->sc_rxsoft[i];
629 if (rxs->rxs_mbuf != NULL) {
630 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
631 m_freem(rxs->rxs_mbuf);
632 rxs->rxs_mbuf = NULL;
633 }
634 bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap);
635 }
636 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
637 txs = &sc->sc_txsoft[i];
638 if (txs->txs_mbuf != NULL) {
639 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
640 m_freem(txs->txs_mbuf);
641 txs->txs_mbuf = NULL;
642 }
643 bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap);
644 }
645 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
646 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
647 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
648 sizeof(struct tulip_control_data));
649 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg);
650
651 shutdownhook_disestablish(sc->sc_sdhook);
652 powerhook_disestablish(sc->sc_powerhook);
653
654 if (sc->sc_srom)
655 free(sc->sc_srom, M_DEVBUF);
656
657 return (0);
658 }
659
660 /*
661 * tlp_shutdown:
662 *
663 * Make sure the interface is stopped at reboot time.
664 */
665 void
666 tlp_shutdown(arg)
667 void *arg;
668 {
669 struct tulip_softc *sc = arg;
670
671 tlp_stop(sc, 1);
672 }
673
674 /*
675 * tlp_start: [ifnet interface function]
676 *
677 * Start packet transmission on the interface.
678 */
679 void
680 tlp_start(ifp)
681 struct ifnet *ifp;
682 {
683 struct tulip_softc *sc = ifp->if_softc;
684 struct mbuf *m0, *m;
685 struct tulip_txsoft *txs, *last_txs;
686 bus_dmamap_t dmamap;
687 int error, firsttx, nexttx, lasttx, ofree, seg;
688
689 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n",
690 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags));
691
692 /*
693 * If we want a filter setup, it means no more descriptors were
694 * available for the setup routine. Let it get a chance to wedge
695 * itself into the ring.
696 */
697 if (sc->sc_flags & TULIPF_WANT_SETUP)
698 ifp->if_flags |= IFF_OACTIVE;
699
700 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
701 return;
702
703 /*
704 * Remember the previous number of free descriptors and
705 * the first descriptor we'll use.
706 */
707 ofree = sc->sc_txfree;
708 firsttx = sc->sc_txnext;
709
710 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n",
711 sc->sc_dev.dv_xname, ofree, firsttx));
712
713 /*
714 * Loop through the send queue, setting up transmit descriptors
715 * until we drain the queue, or use up all available transmit
716 * descriptors.
717 */
718 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL &&
719 sc->sc_txfree != 0) {
720 /*
721 * Grab a packet off the queue.
722 */
723 IF_DEQUEUE(&ifp->if_snd, m0);
724 if (m0 == NULL)
725 break;
726
727 dmamap = txs->txs_dmamap;
728
729 /*
730 * Load the DMA map. If this fails, the packet either
731 * didn't fit in the alloted number of segments, or we were
732 * short on resources. In this case, we'll copy and try
733 * again.
734 *
735 * Note that if we're only allowed 1 Tx segment, we
736 * have an alignment restriction. Do this test before
737 * attempting to load the DMA map, because it's more
738 * likely we'll trip the alignment test than the
739 * more-than-one-segment test.
740 */
741 if ((sc->sc_ntxsegs == 1 && (mtod(m0, bus_addr_t) & 3) != 0) ||
742 bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
743 BUS_DMA_NOWAIT) != 0) {
744 MGETHDR(m, M_DONTWAIT, MT_DATA);
745 if (m == NULL) {
746 printf("%s: unable to allocate Tx mbuf\n",
747 sc->sc_dev.dv_xname);
748 IF_PREPEND(&ifp->if_snd, m0);
749 break;
750 }
751 if (m0->m_pkthdr.len > MHLEN) {
752 MCLGET(m, M_DONTWAIT);
753 if ((m->m_flags & M_EXT) == 0) {
754 printf("%s: unable to allocate Tx "
755 "cluster\n", sc->sc_dev.dv_xname);
756 m_freem(m);
757 IF_PREPEND(&ifp->if_snd, m0);
758 break;
759 }
760 }
761 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
762 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
763 m_freem(m0);
764 m0 = m;
765 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
766 m0, BUS_DMA_NOWAIT);
767 if (error) {
768 printf("%s: unable to load Tx buffer, "
769 "error = %d\n", sc->sc_dev.dv_xname, error);
770 IF_PREPEND(&ifp->if_snd, m0);
771 break;
772 }
773 }
774
775 /*
776 * Ensure we have enough descriptors free to describe
777 * the packet.
778 */
779 if (dmamap->dm_nsegs > sc->sc_txfree) {
780 /*
781 * Not enough free descriptors to transmit this
782 * packet. We haven't committed to anything yet,
783 * so just unload the DMA map, put the packet
784 * back on the queue, and punt. Notify the upper
785 * layer that there are no more slots left.
786 *
787 * XXX We could allocate an mbuf and copy, but
788 * XXX it is worth it?
789 */
790 ifp->if_flags |= IFF_OACTIVE;
791 bus_dmamap_unload(sc->sc_dmat, dmamap);
792 IF_PREPEND(&ifp->if_snd, m0);
793 break;
794 }
795
796 /*
797 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET.
798 */
799
800 /* Sync the DMA map. */
801 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
802 BUS_DMASYNC_PREWRITE);
803
804 /*
805 * Initialize the transmit descriptors.
806 */
807 for (nexttx = sc->sc_txnext, seg = 0;
808 seg < dmamap->dm_nsegs;
809 seg++, nexttx = TULIP_NEXTTX(nexttx)) {
810 /*
811 * If this is the first descriptor we're
812 * enqueueing, don't set the OWN bit just
813 * yet. That could cause a race condition.
814 * We'll do it below.
815 */
816 sc->sc_txdescs[nexttx].td_status =
817 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN);
818 sc->sc_txdescs[nexttx].td_bufaddr1 =
819 htole32(dmamap->dm_segs[seg].ds_addr);
820 sc->sc_txdescs[nexttx].td_ctl =
821 htole32((dmamap->dm_segs[seg].ds_len <<
822 TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch |
823 (nexttx == (TULIP_NTXDESC - 1) ?
824 sc->sc_tdctl_er : 0));
825 lasttx = nexttx;
826 }
827
828 /* Set `first segment' and `last segment' appropriately. */
829 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS);
830 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS);
831
832 #ifdef TLP_DEBUG
833 if (ifp->if_flags & IFF_DEBUG) {
834 printf(" txsoft %p transmit chain:\n", txs);
835 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) {
836 printf(" descriptor %d:\n", seg);
837 printf(" td_status: 0x%08x\n",
838 le32toh(sc->sc_txdescs[seg].td_status));
839 printf(" td_ctl: 0x%08x\n",
840 le32toh(sc->sc_txdescs[seg].td_ctl));
841 printf(" td_bufaddr1: 0x%08x\n",
842 le32toh(sc->sc_txdescs[seg].td_bufaddr1));
843 printf(" td_bufaddr2: 0x%08x\n",
844 le32toh(sc->sc_txdescs[seg].td_bufaddr2));
845 if (seg == lasttx)
846 break;
847 }
848 }
849 #endif
850
851 /* Sync the descriptors we're using. */
852 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
853 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
854
855 /*
856 * Store a pointer to the packet so we can free it later,
857 * and remember what txdirty will be once the packet is
858 * done.
859 */
860 txs->txs_mbuf = m0;
861 txs->txs_firstdesc = sc->sc_txnext;
862 txs->txs_lastdesc = lasttx;
863 txs->txs_ndescs = dmamap->dm_nsegs;
864
865 /* Advance the tx pointer. */
866 sc->sc_txfree -= dmamap->dm_nsegs;
867 sc->sc_txnext = nexttx;
868
869 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q);
870 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
871
872 last_txs = txs;
873
874 #if NBPFILTER > 0
875 /*
876 * Pass the packet to any BPF listeners.
877 */
878 if (ifp->if_bpf)
879 bpf_mtap(ifp->if_bpf, m0);
880 #endif /* NBPFILTER > 0 */
881 }
882
883 if (txs == NULL || sc->sc_txfree == 0) {
884 /* No more slots left; notify upper layer. */
885 ifp->if_flags |= IFF_OACTIVE;
886 }
887
888 if (sc->sc_txfree != ofree) {
889 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n",
890 sc->sc_dev.dv_xname, lasttx, firsttx));
891 /*
892 * Cause a transmit interrupt to happen on the
893 * last packet we enqueued.
894 */
895 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC);
896 TULIP_CDTXSYNC(sc, lasttx, 1,
897 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
898
899 /*
900 * Some clone chips want IC on the *first* segment in
901 * the packet. Appease them.
902 */
903 if ((sc->sc_flags & TULIPF_IC_FS) != 0 &&
904 last_txs->txs_firstdesc != lasttx) {
905 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |=
906 htole32(TDCTL_Tx_IC);
907 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1,
908 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
909 }
910
911 /*
912 * The entire packet chain is set up. Give the
913 * first descriptor to the chip now.
914 */
915 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN);
916 TULIP_CDTXSYNC(sc, firsttx, 1,
917 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
918
919 /* Wake up the transmitter. */
920 /* XXX USE AUTOPOLLING? */
921 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
922
923 /* Set a watchdog timer in case the chip flakes out. */
924 ifp->if_timer = 5;
925 }
926 }
927
928 /*
929 * tlp_watchdog: [ifnet interface function]
930 *
931 * Watchdog timer handler.
932 */
933 void
934 tlp_watchdog(ifp)
935 struct ifnet *ifp;
936 {
937 struct tulip_softc *sc = ifp->if_softc;
938 int doing_setup, doing_transmit;
939
940 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP);
941 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL);
942
943 if (doing_setup && doing_transmit) {
944 printf("%s: filter setup and transmit timeout\n",
945 sc->sc_dev.dv_xname);
946 ifp->if_oerrors++;
947 } else if (doing_transmit) {
948 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname);
949 ifp->if_oerrors++;
950 } else if (doing_setup)
951 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname);
952 else
953 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname);
954
955 (void) tlp_init(sc);
956
957 /* Try to get more packets going. */
958 tlp_start(ifp);
959 }
960
961 /*
962 * tlp_ioctl: [ifnet interface function]
963 *
964 * Handle control requests from the operator.
965 */
966 int
967 tlp_ioctl(ifp, cmd, data)
968 struct ifnet *ifp;
969 u_long cmd;
970 caddr_t data;
971 {
972 struct tulip_softc *sc = ifp->if_softc;
973 struct ifreq *ifr = (struct ifreq *)data;
974 struct ifaddr *ifa = (struct ifaddr *)data;
975 int s, error = 0;
976
977 s = splnet();
978
979 switch (cmd) {
980 case SIOCSIFADDR:
981 if ((error = tlp_enable(sc)) != 0)
982 break;
983 ifp->if_flags |= IFF_UP;
984
985 switch (ifa->ifa_addr->sa_family) {
986 #ifdef INET
987 case AF_INET:
988 if ((error = tlp_init(sc)) != 0)
989 break;
990 arp_ifinit(ifp, ifa);
991 break;
992 #endif /* INET */
993 #ifdef NS
994 case AF_NS:
995 {
996 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
997
998 if (ns_nullhost(*ina))
999 ina->x_host = *(union ns_host *)
1000 LLADDR(ifp->if_sadl);
1001 else
1002 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1003 ifp->if_addrlen);
1004 /* Set new address. */
1005 error = tlp_init(sc);
1006 break;
1007 }
1008 #endif /* NS */
1009 default:
1010 error = tlp_init(sc);
1011 break;
1012 }
1013 break;
1014
1015 case SIOCSIFMTU:
1016 if (ifr->ifr_mtu > ETHERMTU)
1017 error = EINVAL;
1018 else
1019 ifp->if_mtu = ifr->ifr_mtu;
1020 break;
1021
1022 case SIOCSIFFLAGS:
1023 #ifdef TLP_STATS
1024 if (ifp->if_flags & IFF_DEBUG)
1025 tlp_print_stats(sc);
1026 #endif
1027 if ((ifp->if_flags & IFF_UP) == 0 &&
1028 (ifp->if_flags & IFF_RUNNING) != 0) {
1029 /*
1030 * If interface is marked down and it is running, then
1031 * stop it.
1032 */
1033 tlp_stop(sc, 1);
1034 tlp_disable(sc);
1035 } else if ((ifp->if_flags & IFF_UP) != 0 &&
1036 (ifp->if_flags & IFF_RUNNING) == 0) {
1037 /*
1038 * If interfase it marked up and it is stopped, then
1039 * start it.
1040 */
1041 if ((error = tlp_enable(sc)) != 0)
1042 break;
1043 error = tlp_init(sc);
1044 } else if ((ifp->if_flags & IFF_UP) != 0) {
1045 /*
1046 * Reset the interface to pick up changes in any other
1047 * flags that affect the hardware state.
1048 */
1049 if ((error = tlp_enable(sc)) != 0)
1050 break;
1051 error = tlp_init(sc);
1052 }
1053 break;
1054
1055 case SIOCADDMULTI:
1056 case SIOCDELMULTI:
1057 error = (cmd == SIOCADDMULTI) ?
1058 ether_addmulti(ifr, &sc->sc_ethercom) :
1059 ether_delmulti(ifr, &sc->sc_ethercom);
1060
1061 if (TULIP_IS_ENABLED(sc) && error == ENETRESET) {
1062 /*
1063 * Multicast list has changed. Set the filter
1064 * accordingly.
1065 */
1066 (*sc->sc_filter_setup)(sc);
1067 error = 0;
1068 }
1069 break;
1070
1071 case SIOCSIFMEDIA:
1072 case SIOCGIFMEDIA:
1073 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
1074 break;
1075
1076 default:
1077 error = EINVAL;
1078 break;
1079 }
1080
1081 /* Try to get more packets going. */
1082 if (TULIP_IS_ENABLED(sc))
1083 tlp_start(ifp);
1084
1085 splx(s);
1086 return (error);
1087 }
1088
1089 /*
1090 * tlp_intr:
1091 *
1092 * Interrupt service routine.
1093 */
1094 int
1095 tlp_intr(arg)
1096 void *arg;
1097 {
1098 struct tulip_softc *sc = arg;
1099 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1100 u_int32_t status, rxstatus, txstatus;
1101 int handled = 0, txthresh;
1102
1103 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname));
1104
1105 #ifdef DEBUG
1106 if (TULIP_IS_ENABLED(sc) == 0)
1107 panic("%s: tlp_intr: not enabled\n", sc->sc_dev.dv_xname);
1108 #endif
1109
1110 /*
1111 * If the interface isn't running, the interrupt couldn't
1112 * possibly have come from us.
1113 */
1114 if ((ifp->if_flags & IFF_RUNNING) == 0 ||
1115 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1116 return (0);
1117
1118 /* Disable interrupts on the DM9102 (interrupt edge bug). */
1119 switch (sc->sc_chip) {
1120 case TULIP_CHIP_DM9102:
1121 case TULIP_CHIP_DM9102A:
1122 TULIP_WRITE(sc, CSR_INTEN, 0);
1123 break;
1124
1125 default:
1126 /* Nothing. */
1127 }
1128
1129 for (;;) {
1130 status = TULIP_READ(sc, CSR_STATUS);
1131 if (status)
1132 TULIP_WRITE(sc, CSR_STATUS, status);
1133
1134 if ((status & sc->sc_inten) == 0)
1135 break;
1136
1137 handled = 1;
1138
1139 rxstatus = status & sc->sc_rxint_mask;
1140 txstatus = status & sc->sc_txint_mask;
1141
1142 if (rxstatus) {
1143 /* Grab new any new packets. */
1144 tlp_rxintr(sc);
1145
1146 if (rxstatus & STATUS_RWT)
1147 printf("%s: receive watchdog timeout\n",
1148 sc->sc_dev.dv_xname);
1149
1150 if (rxstatus & STATUS_RU) {
1151 printf("%s: receive ring overrun\n",
1152 sc->sc_dev.dv_xname);
1153 /* Get the receive process going again. */
1154 if (sc->sc_tdctl_er != TDCTL_ER) {
1155 tlp_idle(sc, OPMODE_SR);
1156 TULIP_WRITE(sc, CSR_RXLIST,
1157 TULIP_CDRXADDR(sc, sc->sc_rxptr));
1158 TULIP_WRITE(sc, CSR_OPMODE,
1159 sc->sc_opmode);
1160 }
1161 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
1162 break;
1163 }
1164 }
1165
1166 if (txstatus) {
1167 /* Sweep up transmit descriptors. */
1168 tlp_txintr(sc);
1169
1170 if (txstatus & STATUS_TJT)
1171 printf("%s: transmit jabber timeout\n",
1172 sc->sc_dev.dv_xname);
1173
1174 if (txstatus & STATUS_UNF) {
1175 /*
1176 * Increase our transmit threshold if
1177 * another is available.
1178 */
1179 txthresh = sc->sc_txthresh + 1;
1180 if (sc->sc_txth[txthresh].txth_name != NULL) {
1181 /* Idle the transmit process. */
1182 tlp_idle(sc, OPMODE_ST);
1183
1184 sc->sc_txthresh = txthresh;
1185 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF);
1186 sc->sc_opmode |=
1187 sc->sc_txth[txthresh].txth_opmode;
1188 printf("%s: transmit underrun; new "
1189 "threshold: %s\n",
1190 sc->sc_dev.dv_xname,
1191 sc->sc_txth[txthresh].txth_name);
1192
1193 /*
1194 * Set the new threshold and restart
1195 * the transmit process.
1196 */
1197 TULIP_WRITE(sc, CSR_OPMODE,
1198 sc->sc_opmode);
1199 }
1200 /*
1201 * XXX Log every Nth underrun from
1202 * XXX now on?
1203 */
1204 }
1205 }
1206
1207 if (status & (STATUS_TPS|STATUS_RPS)) {
1208 if (status & STATUS_TPS)
1209 printf("%s: transmit process stopped\n",
1210 sc->sc_dev.dv_xname);
1211 if (status & STATUS_RPS)
1212 printf("%s: receive process stopped\n",
1213 sc->sc_dev.dv_xname);
1214 (void) tlp_init(sc);
1215 break;
1216 }
1217
1218 if (status & STATUS_SE) {
1219 const char *str;
1220 switch (status & STATUS_EB) {
1221 case STATUS_EB_PARITY:
1222 str = "parity error";
1223 break;
1224
1225 case STATUS_EB_MABT:
1226 str = "master abort";
1227 break;
1228
1229 case STATUS_EB_TABT:
1230 str = "target abort";
1231 break;
1232
1233 default:
1234 str = "unknown error";
1235 break;
1236 }
1237 printf("%s: fatal system error: %s\n",
1238 sc->sc_dev.dv_xname, str);
1239 (void) tlp_init(sc);
1240 break;
1241 }
1242
1243 /*
1244 * Not handled:
1245 *
1246 * Transmit buffer unavailable -- normal
1247 * condition, nothing to do, really.
1248 *
1249 * General purpose timer experied -- we don't
1250 * use the general purpose timer.
1251 *
1252 * Early receive interrupt -- not available on
1253 * all chips, we just use RI. We also only
1254 * use single-segment receive DMA, so this
1255 * is mostly useless.
1256 */
1257 }
1258
1259 /* Bring interrupts back up on the DM9102. */
1260 switch (sc->sc_chip) {
1261 case TULIP_CHIP_DM9102:
1262 case TULIP_CHIP_DM9102A:
1263 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten);
1264 break;
1265
1266 default:
1267 /* Nothing. */
1268 }
1269
1270 /* Try to get more packets going. */
1271 tlp_start(ifp);
1272
1273 return (handled);
1274 }
1275
1276 /*
1277 * tlp_rxintr:
1278 *
1279 * Helper; handle receive interrupts.
1280 */
1281 void
1282 tlp_rxintr(sc)
1283 struct tulip_softc *sc;
1284 {
1285 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1286 struct ether_header *eh;
1287 struct tulip_rxsoft *rxs;
1288 struct mbuf *m;
1289 u_int32_t rxstat;
1290 int i, len;
1291
1292 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) {
1293 rxs = &sc->sc_rxsoft[i];
1294
1295 TULIP_CDRXSYNC(sc, i,
1296 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1297
1298 rxstat = le32toh(sc->sc_rxdescs[i].td_status);
1299
1300 if (rxstat & TDSTAT_OWN) {
1301 /*
1302 * We have processed all of the receive buffers.
1303 */
1304 break;
1305 }
1306
1307 /*
1308 * Make sure the packet fit in one buffer. This should
1309 * always be the case. But the Lite-On PNIC, rev 33
1310 * has an awful receive engine bug, which may require
1311 * a very icky work-around.
1312 */
1313 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) !=
1314 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) {
1315 printf("%s: incoming packet spilled, resetting\n",
1316 sc->sc_dev.dv_xname);
1317 (void) tlp_init(sc);
1318 return;
1319 }
1320
1321 /*
1322 * If any collisions were seen on the wire, count one.
1323 */
1324 if (rxstat & TDSTAT_Rx_CS)
1325 ifp->if_collisions++;
1326
1327 /*
1328 * If an error occured, update stats, clear the status
1329 * word, and leave the packet buffer in place. It will
1330 * simply be reused the next time the ring comes around.
1331 */
1332 if (rxstat & TDSTAT_ES) {
1333 #define PRINTERR(bit, str) \
1334 if (rxstat & (bit)) \
1335 printf("%s: receive error: %s\n", \
1336 sc->sc_dev.dv_xname, str)
1337 ifp->if_ierrors++;
1338 PRINTERR(TDSTAT_Rx_DE, "descriptor error");
1339 PRINTERR(TDSTAT_Rx_RF, "runt frame");
1340 PRINTERR(TDSTAT_Rx_TL, "frame too long");
1341 PRINTERR(TDSTAT_Rx_RE, "MII error");
1342 PRINTERR(TDSTAT_Rx_DB, "dribbling bit");
1343 PRINTERR(TDSTAT_Rx_CE, "CRC error");
1344 #undef PRINTERR
1345 TULIP_INIT_RXDESC(sc, i);
1346 continue;
1347 }
1348
1349 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1350 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1351
1352 /*
1353 * No errors; receive the packet. Note the Tulip
1354 * includes the CRC with every packet; trim it.
1355 */
1356 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN;
1357
1358 #ifdef __NO_STRICT_ALIGNMENT
1359 /*
1360 * Allocate a new mbuf cluster. If that fails, we are
1361 * out of memory, and must drop the packet and recycle
1362 * the buffer that's already attached to this descriptor.
1363 */
1364 m = rxs->rxs_mbuf;
1365 if (tlp_add_rxbuf(sc, i) != 0) {
1366 ifp->if_ierrors++;
1367 TULIP_INIT_RXDESC(sc, i);
1368 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1369 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1370 continue;
1371 }
1372 #else
1373 /*
1374 * The Tulip's receive buffers must be 4-byte aligned.
1375 * But this means that the data after the Ethernet header
1376 * is misaligned. We must allocate a new buffer and
1377 * copy the data, shifted forward 2 bytes.
1378 */
1379 MGETHDR(m, M_DONTWAIT, MT_DATA);
1380 if (m == NULL) {
1381 dropit:
1382 ifp->if_ierrors++;
1383 TULIP_INIT_RXDESC(sc, i);
1384 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1385 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1386 continue;
1387 }
1388 if (len > (MHLEN - 2)) {
1389 MCLGET(m, M_DONTWAIT);
1390 if ((m->m_flags & M_EXT) == 0) {
1391 m_freem(m);
1392 goto dropit;
1393 }
1394 }
1395 m->m_data += 2;
1396
1397 /*
1398 * Note that we use clusters for incoming frames, so the
1399 * buffer is virtually contiguous.
1400 */
1401 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len);
1402
1403 /* Allow the receive descriptor to continue using its mbuf. */
1404 TULIP_INIT_RXDESC(sc, i);
1405 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1406 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1407 #endif /* __NO_STRICT_ALIGNMENT */
1408
1409 ifp->if_ipackets++;
1410 eh = mtod(m, struct ether_header *);
1411 m->m_pkthdr.rcvif = ifp;
1412 m->m_pkthdr.len = m->m_len = len;
1413
1414 #if NBPFILTER > 0
1415 /*
1416 * Pass this up to any BPF listeners, but only
1417 * pass it up the stack if its for us.
1418 */
1419 if (ifp->if_bpf)
1420 bpf_mtap(ifp->if_bpf, m);
1421 #endif /* NPBFILTER > 0 */
1422
1423 /*
1424 * This test is outside the NBPFILTER block because
1425 * on the 21140 we have to use Hash-Only mode due to
1426 * a bug in the filter logic.
1427 */
1428 if ((ifp->if_flags & IFF_PROMISC) != 0 ||
1429 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) {
1430 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost,
1431 ETHER_ADDR_LEN) != 0 &&
1432 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) {
1433 m_freem(m);
1434 continue;
1435 }
1436 }
1437
1438 /* Pass it on. */
1439 (*ifp->if_input)(ifp, m);
1440 }
1441
1442 /* Update the recieve pointer. */
1443 sc->sc_rxptr = i;
1444 }
1445
1446 /*
1447 * tlp_txintr:
1448 *
1449 * Helper; handle transmit interrupts.
1450 */
1451 void
1452 tlp_txintr(sc)
1453 struct tulip_softc *sc;
1454 {
1455 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1456 struct tulip_txsoft *txs;
1457 u_int32_t txstat;
1458
1459 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n",
1460 sc->sc_dev.dv_xname, sc->sc_flags));
1461
1462 ifp->if_flags &= ~IFF_OACTIVE;
1463
1464 /*
1465 * Go through our Tx list and free mbufs for those
1466 * frames that have been transmitted.
1467 */
1468 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
1469 TULIP_CDTXSYNC(sc, txs->txs_lastdesc,
1470 txs->txs_ndescs,
1471 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1472
1473 #ifdef TLP_DEBUG
1474 if (ifp->if_flags & IFF_DEBUG) {
1475 int i;
1476 printf(" txsoft %p transmit chain:\n", txs);
1477 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) {
1478 printf(" descriptor %d:\n", i);
1479 printf(" td_status: 0x%08x\n",
1480 le32toh(sc->sc_txdescs[i].td_status));
1481 printf(" td_ctl: 0x%08x\n",
1482 le32toh(sc->sc_txdescs[i].td_ctl));
1483 printf(" td_bufaddr1: 0x%08x\n",
1484 le32toh(sc->sc_txdescs[i].td_bufaddr1));
1485 printf(" td_bufaddr2: 0x%08x\n",
1486 le32toh(sc->sc_txdescs[i].td_bufaddr2));
1487 if (i == txs->txs_lastdesc)
1488 break;
1489 }
1490 }
1491 #endif
1492
1493 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status);
1494 if (txstat & TDSTAT_OWN)
1495 break;
1496
1497 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
1498
1499 sc->sc_txfree += txs->txs_ndescs;
1500
1501 if (txs->txs_mbuf == NULL) {
1502 /*
1503 * If we didn't have an mbuf, it was the setup
1504 * packet.
1505 */
1506 #ifdef DIAGNOSTIC
1507 if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0)
1508 panic("tlp_txintr: null mbuf, not doing setup");
1509 #endif
1510 TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE);
1511 sc->sc_flags &= ~TULIPF_DOING_SETUP;
1512 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1513 continue;
1514 }
1515
1516 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap,
1517 0, txs->txs_dmamap->dm_mapsize,
1518 BUS_DMASYNC_POSTWRITE);
1519 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
1520 m_freem(txs->txs_mbuf);
1521 txs->txs_mbuf = NULL;
1522
1523 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1524
1525 /*
1526 * Check for errors and collisions.
1527 */
1528 #ifdef TLP_STATS
1529 if (txstat & TDSTAT_Tx_UF)
1530 sc->sc_stats.ts_tx_uf++;
1531 if (txstat & TDSTAT_Tx_TO)
1532 sc->sc_stats.ts_tx_to++;
1533 if (txstat & TDSTAT_Tx_EC)
1534 sc->sc_stats.ts_tx_ec++;
1535 if (txstat & TDSTAT_Tx_LC)
1536 sc->sc_stats.ts_tx_lc++;
1537 #endif
1538
1539 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO))
1540 ifp->if_oerrors++;
1541
1542 if (txstat & TDSTAT_Tx_EC)
1543 ifp->if_collisions += 16;
1544 else
1545 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat);
1546 if (txstat & TDSTAT_Tx_LC)
1547 ifp->if_collisions++;
1548
1549 ifp->if_opackets++;
1550 }
1551
1552 /*
1553 * If there are no more pending transmissions, cancel the watchdog
1554 * timer.
1555 */
1556 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0)
1557 ifp->if_timer = 0;
1558
1559 /*
1560 * If we have a receive filter setup pending, do it now.
1561 */
1562 if (sc->sc_flags & TULIPF_WANT_SETUP)
1563 (*sc->sc_filter_setup)(sc);
1564 }
1565
1566 #ifdef TLP_STATS
1567 void
1568 tlp_print_stats(sc)
1569 struct tulip_softc *sc;
1570 {
1571
1572 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n",
1573 sc->sc_dev.dv_xname,
1574 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to,
1575 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc);
1576 }
1577 #endif
1578
1579 /*
1580 * tlp_reset:
1581 *
1582 * Perform a soft reset on the Tulip.
1583 */
1584 void
1585 tlp_reset(sc)
1586 struct tulip_softc *sc;
1587 {
1588 int i;
1589
1590 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR);
1591
1592 /*
1593 * Xircom clone doesn't bring itself out of reset automatically.
1594 * Instead, we have to wait at least 50 PCI cycles, and then
1595 * clear SWR.
1596 */
1597 if (sc->sc_chip == TULIP_CHIP_X3201_3) {
1598 delay(10);
1599 TULIP_WRITE(sc, CSR_BUSMODE, 0);
1600 }
1601
1602 for (i = 0; i < 1000; i++) {
1603 /*
1604 * Wait at least 50 PCI cycles for the reset to
1605 * complete before peeking at the Tulip again.
1606 * 10 uSec is a bit longer than 50 PCI cycles
1607 * (at 33MHz), but it doesn't hurt have the extra
1608 * wait.
1609 */
1610 delay(10);
1611 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0)
1612 break;
1613 }
1614
1615 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR))
1616 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname);
1617
1618 delay(1000);
1619
1620 /*
1621 * If the board has any GPIO reset sequences to issue, do them now.
1622 */
1623 if (sc->sc_reset != NULL)
1624 (*sc->sc_reset)(sc);
1625 }
1626
1627 /*
1628 * tlp_init:
1629 *
1630 * Initialize the interface. Must be called at splnet().
1631 */
1632 int
1633 tlp_init(sc)
1634 struct tulip_softc *sc;
1635 {
1636 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1637 struct tulip_txsoft *txs;
1638 struct tulip_rxsoft *rxs;
1639 int i, error = 0;
1640
1641 /*
1642 * Cancel any pending I/O.
1643 */
1644 tlp_stop(sc, 0);
1645
1646 /*
1647 * Initialize `opmode' to 0, and call the pre-init routine, if
1648 * any. This is required because the 2114x and some of the
1649 * clones require that the media-related bits in `opmode' be
1650 * set before performing a soft-reset in order to get internal
1651 * chip pathways are correct. Yay!
1652 */
1653 sc->sc_opmode = 0;
1654 if (sc->sc_preinit != NULL)
1655 (*sc->sc_preinit)(sc);
1656
1657 /*
1658 * Reset the Tulip to a known state.
1659 */
1660 tlp_reset(sc);
1661
1662 /*
1663 * Initialize the BUSMODE register.
1664 */
1665 sc->sc_busmode = BUSMODE_BAR;
1666 switch (sc->sc_chip) {
1667 case TULIP_CHIP_21140:
1668 case TULIP_CHIP_21140A:
1669 case TULIP_CHIP_21142:
1670 case TULIP_CHIP_21143:
1671 case TULIP_CHIP_82C115:
1672 case TULIP_CHIP_MX98725:
1673 /*
1674 * If we're allowed to do so, use Memory Read Line
1675 * and Memory Read Multiple.
1676 *
1677 * XXX Should we use Memory Write and Invalidate?
1678 */
1679 if (sc->sc_flags & TULIPF_MRL)
1680 sc->sc_busmode |= BUSMODE_RLE;
1681 if (sc->sc_flags & TULIPF_MRM)
1682 sc->sc_busmode |= BUSMODE_RME;
1683 #if 0
1684 if (sc->sc_flags & TULIPF_MWI)
1685 sc->sc_busmode |= BUSMODE_WLE;
1686 #endif
1687
1688 default:
1689 /* Nothing. */
1690 }
1691 switch (sc->sc_cacheline) {
1692 default:
1693 /*
1694 * Note: We must *always* set these bits; a cache
1695 * alignment of 0 is RESERVED.
1696 */
1697 case 8:
1698 sc->sc_busmode |= BUSMODE_CAL_8LW;
1699 break;
1700 case 16:
1701 sc->sc_busmode |= BUSMODE_CAL_16LW;
1702 break;
1703 case 32:
1704 sc->sc_busmode |= BUSMODE_CAL_32LW;
1705 break;
1706 }
1707 switch (sc->sc_chip) {
1708 case TULIP_CHIP_82C168:
1709 case TULIP_CHIP_82C169:
1710 sc->sc_busmode |= BUSMODE_PBL_16LW | BUSMODE_PNIC_MBO;
1711 break;
1712 default:
1713 sc->sc_busmode |= BUSMODE_PBL_DEFAULT;
1714 break;
1715 }
1716 #if BYTE_ORDER == BIG_ENDIAN
1717 /*
1718 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips
1719 * support them, and even on ones that do, it doesn't
1720 * always work.
1721 */
1722 #endif
1723
1724 /*
1725 * Some chips have a broken bus interface.
1726 */
1727 switch (sc->sc_chip) {
1728 case TULIP_CHIP_DM9102:
1729 case TULIP_CHIP_DM9102A:
1730 sc->sc_busmode = 0;
1731 break;
1732
1733 default:
1734 /* Nothing. */
1735 }
1736
1737 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode);
1738
1739 /*
1740 * Initialize the OPMODE register. We don't write it until
1741 * we're ready to begin the transmit and receive processes.
1742 *
1743 * Media-related OPMODE bits are set in the media callbacks
1744 * for each specific chip/board.
1745 */
1746 sc->sc_opmode |= OPMODE_SR | OPMODE_ST |
1747 sc->sc_txth[sc->sc_txthresh].txth_opmode;
1748
1749 /*
1750 * Magical mystery initialization on the Macronix chips.
1751 * The MX98713 uses its own magic value, the rest share
1752 * a common one.
1753 */
1754 switch (sc->sc_chip) {
1755 case TULIP_CHIP_MX98713:
1756 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713);
1757 break;
1758
1759 case TULIP_CHIP_MX98713A:
1760 case TULIP_CHIP_MX98715:
1761 case TULIP_CHIP_MX98715A:
1762 case TULIP_CHIP_MX98725:
1763 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715);
1764 break;
1765
1766 default:
1767 /* Nothing. */
1768 }
1769
1770 /*
1771 * Initialize the transmit descriptor ring.
1772 */
1773 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
1774 for (i = 0; i < TULIP_NTXDESC; i++) {
1775 sc->sc_txdescs[i].td_ctl = htole32(sc->sc_tdctl_ch);
1776 sc->sc_txdescs[i].td_bufaddr2 =
1777 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)));
1778 }
1779 sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er);
1780 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC,
1781 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1782 sc->sc_txfree = TULIP_NTXDESC;
1783 sc->sc_txnext = 0;
1784
1785 /*
1786 * Initialize the transmit job descriptors.
1787 */
1788 SIMPLEQ_INIT(&sc->sc_txfreeq);
1789 SIMPLEQ_INIT(&sc->sc_txdirtyq);
1790 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
1791 txs = &sc->sc_txsoft[i];
1792 txs->txs_mbuf = NULL;
1793 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1794 }
1795
1796 /*
1797 * Initialize the receive descriptor and receive job
1798 * descriptor rings.
1799 */
1800 for (i = 0; i < TULIP_NRXDESC; i++) {
1801 rxs = &sc->sc_rxsoft[i];
1802 if (rxs->rxs_mbuf == NULL) {
1803 if ((error = tlp_add_rxbuf(sc, i)) != 0) {
1804 printf("%s: unable to allocate or map rx "
1805 "buffer %d, error = %d\n",
1806 sc->sc_dev.dv_xname, i, error);
1807 /*
1808 * XXX Should attempt to run with fewer receive
1809 * XXX buffers instead of just failing.
1810 */
1811 tlp_rxdrain(sc);
1812 goto out;
1813 }
1814 }
1815 }
1816 sc->sc_rxptr = 0;
1817
1818 /*
1819 * Initialize the interrupt mask and enable interrupts.
1820 */
1821 /* normal interrupts */
1822 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS;
1823
1824 /* abnormal interrupts */
1825 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF |
1826 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS;
1827
1828 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT;
1829 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT;
1830
1831 switch (sc->sc_chip) {
1832 case TULIP_CHIP_WB89C840F:
1833 /*
1834 * Clear bits that we don't want that happen to
1835 * overlap or don't exist.
1836 */
1837 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT);
1838 break;
1839
1840 default:
1841 /* Nothing. */
1842 }
1843
1844 sc->sc_rxint_mask &= sc->sc_inten;
1845 sc->sc_txint_mask &= sc->sc_inten;
1846
1847 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten);
1848 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff);
1849
1850 /*
1851 * Give the transmit and receive rings to the Tulip.
1852 */
1853 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext));
1854 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr));
1855
1856 /*
1857 * On chips that do this differently, set the station address.
1858 */
1859 switch (sc->sc_chip) {
1860 case TULIP_CHIP_WB89C840F:
1861 {
1862 /* XXX Do this with stream writes? */
1863 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0);
1864
1865 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1866 bus_space_write_1(sc->sc_st, sc->sc_sh,
1867 cpa + i, LLADDR(ifp->if_sadl)[i]);
1868 }
1869 break;
1870 }
1871
1872 case TULIP_CHIP_AL981:
1873 {
1874 u_int32_t reg;
1875 u_int8_t *enaddr = LLADDR(ifp->if_sadl);
1876
1877 reg = enaddr[0] |
1878 (enaddr[1] << 8) |
1879 (enaddr[2] << 16) |
1880 (enaddr[3] << 24);
1881 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg);
1882
1883 reg = enaddr[4] |
1884 (enaddr[5] << 8);
1885 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg);
1886 }
1887
1888 default:
1889 /* Nothing. */
1890 }
1891
1892 /*
1893 * Set the receive filter. This will start the transmit and
1894 * receive processes.
1895 */
1896 (*sc->sc_filter_setup)(sc);
1897
1898 /*
1899 * Set the current media.
1900 */
1901 (void) (*sc->sc_mediasw->tmsw_set)(sc);
1902
1903 /*
1904 * Start the receive process.
1905 */
1906 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
1907
1908 if (sc->sc_tick != NULL) {
1909 /* Start the one second clock. */
1910 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc);
1911 }
1912
1913 /*
1914 * Note that the interface is now running.
1915 */
1916 ifp->if_flags |= IFF_RUNNING;
1917 ifp->if_flags &= ~IFF_OACTIVE;
1918
1919 out:
1920 if (error)
1921 printf("%s: interface not running\n", sc->sc_dev.dv_xname);
1922 return (error);
1923 }
1924
1925 /*
1926 * tlp_enable:
1927 *
1928 * Enable the Tulip chip.
1929 */
1930 int
1931 tlp_enable(sc)
1932 struct tulip_softc *sc;
1933 {
1934
1935 if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) {
1936 if ((*sc->sc_enable)(sc) != 0) {
1937 printf("%s: device enable failed\n",
1938 sc->sc_dev.dv_xname);
1939 return (EIO);
1940 }
1941 sc->sc_flags |= TULIPF_ENABLED;
1942 }
1943 return (0);
1944 }
1945
1946 /*
1947 * tlp_disable:
1948 *
1949 * Disable the Tulip chip.
1950 */
1951 void
1952 tlp_disable(sc)
1953 struct tulip_softc *sc;
1954 {
1955
1956 if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) {
1957 (*sc->sc_disable)(sc);
1958 sc->sc_flags &= ~TULIPF_ENABLED;
1959 }
1960 }
1961
1962 /*
1963 * tlp_power:
1964 *
1965 * Power management (suspend/resume) hook.
1966 */
1967 void
1968 tlp_power(why, arg)
1969 int why;
1970 void *arg;
1971 {
1972 struct tulip_softc *sc = arg;
1973 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1974 int s;
1975
1976 s = splnet();
1977 if (why != PWR_RESUME) {
1978 tlp_stop(sc, 0);
1979 if (sc->sc_power != NULL)
1980 (*sc->sc_power)(sc, why);
1981 } else if (ifp->if_flags & IFF_UP) {
1982 if (sc->sc_power != NULL)
1983 (*sc->sc_power)(sc, why);
1984 tlp_init(sc);
1985 }
1986 splx(s);
1987 }
1988
1989 /*
1990 * tlp_rxdrain:
1991 *
1992 * Drain the receive queue.
1993 */
1994 void
1995 tlp_rxdrain(sc)
1996 struct tulip_softc *sc;
1997 {
1998 struct tulip_rxsoft *rxs;
1999 int i;
2000
2001 for (i = 0; i < TULIP_NRXDESC; i++) {
2002 rxs = &sc->sc_rxsoft[i];
2003 if (rxs->rxs_mbuf != NULL) {
2004 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
2005 m_freem(rxs->rxs_mbuf);
2006 rxs->rxs_mbuf = NULL;
2007 }
2008 }
2009 }
2010
2011 /*
2012 * tlp_stop:
2013 *
2014 * Stop transmission on the interface.
2015 */
2016 void
2017 tlp_stop(sc, drain)
2018 struct tulip_softc *sc;
2019 int drain;
2020 {
2021 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2022 struct tulip_txsoft *txs;
2023
2024 if (sc->sc_tick != NULL) {
2025 /* Stop the one second clock. */
2026 callout_stop(&sc->sc_tick_callout);
2027 }
2028
2029 if (sc->sc_flags & TULIPF_HAS_MII) {
2030 /* Down the MII. */
2031 mii_down(&sc->sc_mii);
2032 }
2033
2034 /* Disable interrupts. */
2035 TULIP_WRITE(sc, CSR_INTEN, 0);
2036
2037 /* Stop the transmit and receive processes. */
2038 TULIP_WRITE(sc, CSR_OPMODE, 0);
2039 TULIP_WRITE(sc, CSR_RXLIST, 0);
2040 TULIP_WRITE(sc, CSR_TXLIST, 0);
2041
2042 /*
2043 * Release any queued transmit buffers.
2044 */
2045 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
2046 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
2047 if (txs->txs_mbuf != NULL) {
2048 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
2049 m_freem(txs->txs_mbuf);
2050 txs->txs_mbuf = NULL;
2051 }
2052 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
2053 }
2054
2055 if (drain) {
2056 /*
2057 * Release the receive buffers.
2058 */
2059 tlp_rxdrain(sc);
2060 }
2061
2062 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP);
2063
2064 /*
2065 * Mark the interface down and cancel the watchdog timer.
2066 */
2067 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2068 ifp->if_timer = 0;
2069 }
2070
2071 #define SROM_EMIT(sc, x) \
2072 do { \
2073 TULIP_WRITE((sc), CSR_MIIROM, (x)); \
2074 delay(2); \
2075 } while (0)
2076
2077 /*
2078 * tlp_srom_idle:
2079 *
2080 * Put the SROM in idle state.
2081 */
2082 void
2083 tlp_srom_idle(sc)
2084 struct tulip_softc *sc;
2085 {
2086 u_int32_t miirom;
2087 int i;
2088
2089 miirom = MIIROM_SR;
2090 SROM_EMIT(sc, miirom);
2091
2092 miirom |= MIIROM_RD;
2093 SROM_EMIT(sc, miirom);
2094
2095 miirom |= MIIROM_SROMCS;
2096 SROM_EMIT(sc, miirom);
2097
2098 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2099
2100 /* Strobe the clock 32 times. */
2101 for (i = 0; i < 32; i++) {
2102 SROM_EMIT(sc, miirom);
2103 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2104 }
2105
2106 SROM_EMIT(sc, miirom);
2107
2108 miirom &= ~MIIROM_SROMCS;
2109 SROM_EMIT(sc, miirom);
2110
2111 SROM_EMIT(sc, 0);
2112 }
2113
2114 /*
2115 * tlp_srom_size:
2116 *
2117 * Determine the number of address bits in the SROM.
2118 */
2119 int
2120 tlp_srom_size(sc)
2121 struct tulip_softc *sc;
2122 {
2123 u_int32_t miirom;
2124 int x;
2125
2126 /* Select the SROM. */
2127 miirom = MIIROM_SR;
2128 SROM_EMIT(sc, miirom);
2129
2130 miirom |= MIIROM_RD;
2131 SROM_EMIT(sc, miirom);
2132
2133 /* Send CHIP SELECT for one clock tick. */
2134 miirom |= MIIROM_SROMCS;
2135 SROM_EMIT(sc, miirom);
2136
2137 /* Shift in the READ opcode. */
2138 for (x = 3; x > 0; x--) {
2139 if (TULIP_SROM_OPC_READ & (1 << (x - 1)))
2140 miirom |= MIIROM_SROMDI;
2141 else
2142 miirom &= ~MIIROM_SROMDI;
2143 SROM_EMIT(sc, miirom);
2144 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2145 SROM_EMIT(sc, miirom);
2146 }
2147
2148 /* Shift in address and look for dummy 0 bit. */
2149 for (x = 1; x <= 12; x++) {
2150 miirom &= ~MIIROM_SROMDI;
2151 SROM_EMIT(sc, miirom);
2152 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2153 if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO))
2154 break;
2155 SROM_EMIT(sc, miirom);
2156 }
2157
2158 /* Clear CHIP SELECT. */
2159 miirom &= ~MIIROM_SROMCS;
2160 SROM_EMIT(sc, miirom);
2161
2162 /* Deselect the SROM. */
2163 SROM_EMIT(sc, 0);
2164
2165 if (x < 4 || x > 12) {
2166 printf("%s: broken MicroWire interface detected; "
2167 "setting SROM size to 1Kb\n", sc->sc_dev.dv_xname);
2168 return (6);
2169 } else {
2170 if (tlp_srom_debug)
2171 printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n",
2172 sc->sc_dev.dv_xname, x, (1 << (x + 4)) >> 3);
2173 return (x);
2174 }
2175 }
2176
2177 /*
2178 * tlp_read_srom:
2179 *
2180 * Read the Tulip SROM.
2181 */
2182 int
2183 tlp_read_srom(sc)
2184 struct tulip_softc *sc;
2185 {
2186 int size;
2187 u_int32_t miirom;
2188 u_int16_t datain;
2189 int i, x;
2190
2191 tlp_srom_idle(sc);
2192
2193 sc->sc_srom_addrbits = tlp_srom_size(sc);
2194 if (sc->sc_srom_addrbits == 0)
2195 return (0);
2196 size = TULIP_ROM_SIZE(sc->sc_srom_addrbits);
2197 sc->sc_srom = malloc(size, M_DEVBUF, M_NOWAIT);
2198
2199 /* Select the SROM. */
2200 miirom = MIIROM_SR;
2201 SROM_EMIT(sc, miirom);
2202
2203 miirom |= MIIROM_RD;
2204 SROM_EMIT(sc, miirom);
2205
2206 for (i = 0; i < size; i += 2) {
2207 /* Send CHIP SELECT for one clock tick. */
2208 miirom |= MIIROM_SROMCS;
2209 SROM_EMIT(sc, miirom);
2210
2211 /* Shift in the READ opcode. */
2212 for (x = 3; x > 0; x--) {
2213 if (TULIP_SROM_OPC_READ & (1 << (x - 1)))
2214 miirom |= MIIROM_SROMDI;
2215 else
2216 miirom &= ~MIIROM_SROMDI;
2217 SROM_EMIT(sc, miirom);
2218 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2219 SROM_EMIT(sc, miirom);
2220 }
2221
2222 /* Shift in address. */
2223 for (x = sc->sc_srom_addrbits; x > 0; x--) {
2224 if (i & (1 << x))
2225 miirom |= MIIROM_SROMDI;
2226 else
2227 miirom &= ~MIIROM_SROMDI;
2228 SROM_EMIT(sc, miirom);
2229 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2230 SROM_EMIT(sc, miirom);
2231 }
2232
2233 /* Shift out data. */
2234 miirom &= ~MIIROM_SROMDI;
2235 datain = 0;
2236 for (x = 16; x > 0; x--) {
2237 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2238 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO))
2239 datain |= (1 << (x - 1));
2240 SROM_EMIT(sc, miirom);
2241 }
2242 sc->sc_srom[i] = datain & 0xff;
2243 sc->sc_srom[i + 1] = datain >> 8;
2244
2245 /* Clear CHIP SELECT. */
2246 miirom &= ~MIIROM_SROMCS;
2247 SROM_EMIT(sc, miirom);
2248 }
2249
2250 /* Deselect the SROM. */
2251 SROM_EMIT(sc, 0);
2252
2253 /* ...and idle it. */
2254 tlp_srom_idle(sc);
2255
2256 if (tlp_srom_debug) {
2257 printf("SROM CONTENTS:");
2258 for (i = 0; i < size; i++) {
2259 if ((i % 8) == 0)
2260 printf("\n\t");
2261 printf("0x%02x ", sc->sc_srom[i]);
2262 }
2263 printf("\n");
2264 }
2265
2266 return (1);
2267 }
2268
2269 #undef SROM_EMIT
2270
2271 /*
2272 * tlp_add_rxbuf:
2273 *
2274 * Add a receive buffer to the indicated descriptor.
2275 */
2276 int
2277 tlp_add_rxbuf(sc, idx)
2278 struct tulip_softc *sc;
2279 int idx;
2280 {
2281 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx];
2282 struct mbuf *m;
2283 int error;
2284
2285 MGETHDR(m, M_DONTWAIT, MT_DATA);
2286 if (m == NULL)
2287 return (ENOBUFS);
2288
2289 MCLGET(m, M_DONTWAIT);
2290 if ((m->m_flags & M_EXT) == 0) {
2291 m_freem(m);
2292 return (ENOBUFS);
2293 }
2294
2295 if (rxs->rxs_mbuf != NULL)
2296 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
2297
2298 rxs->rxs_mbuf = m;
2299
2300 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap,
2301 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT);
2302 if (error) {
2303 printf("%s: can't load rx DMA map %d, error = %d\n",
2304 sc->sc_dev.dv_xname, idx, error);
2305 panic("tlp_add_rxbuf"); /* XXX */
2306 }
2307
2308 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
2309 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
2310
2311 TULIP_INIT_RXDESC(sc, idx);
2312
2313 return (0);
2314 }
2315
2316 /*
2317 * tlp_srom_crcok:
2318 *
2319 * Check the CRC of the Tulip SROM.
2320 */
2321 int
2322 tlp_srom_crcok(romdata)
2323 const u_int8_t *romdata;
2324 {
2325 u_int32_t crc;
2326
2327 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM);
2328 crc = (crc & 0xffff) ^ 0xffff;
2329 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM))
2330 return (1);
2331
2332 /*
2333 * Try an alternate checksum.
2334 */
2335 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1);
2336 crc = (crc & 0xffff) ^ 0xffff;
2337 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1))
2338 return (1);
2339
2340 return (0);
2341 }
2342
2343 /*
2344 * tlp_isv_srom:
2345 *
2346 * Check to see if the SROM is in the new standardized format.
2347 */
2348 int
2349 tlp_isv_srom(romdata)
2350 const u_int8_t *romdata;
2351 {
2352 int i;
2353 u_int16_t cksum;
2354
2355 if (tlp_srom_crcok(romdata)) {
2356 /*
2357 * SROM CRC checks out; must be in the new format.
2358 */
2359 return (1);
2360 }
2361
2362 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM);
2363 if (cksum == 0xffff || cksum == 0) {
2364 /*
2365 * No checksum present. Check the SROM ID; 18 bytes of 0
2366 * followed by 1 (version) followed by the number of
2367 * adapters which use this SROM (should be non-zero).
2368 */
2369 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) {
2370 if (romdata[i] != 0)
2371 return (0);
2372 }
2373 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1)
2374 return (0);
2375 if (romdata[TULIP_ROM_CHIP_COUNT] == 0)
2376 return (0);
2377 return (1);
2378 }
2379
2380 return (0);
2381 }
2382
2383 /*
2384 * tlp_isv_srom_enaddr:
2385 *
2386 * Get the Ethernet address from an ISV SROM.
2387 */
2388 int
2389 tlp_isv_srom_enaddr(sc, enaddr)
2390 struct tulip_softc *sc;
2391 u_int8_t *enaddr;
2392 {
2393 int i, devcnt;
2394
2395 if (tlp_isv_srom(sc->sc_srom) == 0)
2396 return (0);
2397
2398 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
2399 for (i = 0; i < devcnt; i++) {
2400 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
2401 break;
2402 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
2403 sc->sc_devno)
2404 break;
2405 }
2406
2407 if (i == devcnt)
2408 return (0);
2409
2410 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS],
2411 ETHER_ADDR_LEN);
2412 enaddr[5] += i;
2413
2414 return (1);
2415 }
2416
2417 /*
2418 * tlp_parse_old_srom:
2419 *
2420 * Parse old-format SROMs.
2421 *
2422 * This routine is largely lifted from Matt Thomas's `de' driver.
2423 */
2424 int
2425 tlp_parse_old_srom(sc, enaddr)
2426 struct tulip_softc *sc;
2427 u_int8_t *enaddr;
2428 {
2429 static const u_int8_t testpat[] =
2430 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa };
2431 int i;
2432 u_int32_t cksum;
2433
2434 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) {
2435 /*
2436 * Some vendors (e.g. ZNYX) don't use the standard
2437 * DEC Address ROM format, but rather just have an
2438 * Ethernet address in the first 6 bytes, maybe a
2439 * 2 byte checksum, and then all 0xff's.
2440 *
2441 * On the other hand, Cobalt Networks interfaces
2442 * simply have the address in the first six bytes
2443 * with the rest zeroed out.
2444 */
2445 for (i = 8; i < 32; i++) {
2446 if (sc->sc_srom[i] != 0xff &&
2447 sc->sc_srom[i] != 0)
2448 return (0);
2449 }
2450
2451 /*
2452 * Sanity check the Ethernet address:
2453 *
2454 * - Make sure it's not multicast or locally
2455 * assigned
2456 * - Make sure it has a non-0 OUI
2457 */
2458 if (sc->sc_srom[0] & 3)
2459 return (0);
2460 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 &&
2461 sc->sc_srom[2] == 0)
2462 return (0);
2463
2464 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
2465 return (1);
2466 }
2467
2468 /*
2469 * Standard DEC Address ROM test.
2470 */
2471
2472 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0)
2473 return (0);
2474
2475 for (i = 0; i < 8; i++) {
2476 if (sc->sc_srom[i] != sc->sc_srom[15 - i])
2477 return (0);
2478 }
2479
2480 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
2481
2482 cksum = *(u_int16_t *) &enaddr[0];
2483
2484 cksum <<= 1;
2485 if (cksum > 0xffff)
2486 cksum -= 0xffff;
2487
2488 cksum += *(u_int16_t *) &enaddr[2];
2489 if (cksum > 0xffff)
2490 cksum -= 0xffff;
2491
2492 cksum <<= 1;
2493 if (cksum > 0xffff)
2494 cksum -= 0xffff;
2495
2496 cksum += *(u_int16_t *) &enaddr[4];
2497 if (cksum >= 0xffff)
2498 cksum -= 0xffff;
2499
2500 if (cksum != *(u_int16_t *) &sc->sc_srom[6])
2501 return (0);
2502
2503 return (1);
2504 }
2505
2506 /*
2507 * tlp_filter_setup:
2508 *
2509 * Set the Tulip's receive filter.
2510 */
2511 void
2512 tlp_filter_setup(sc)
2513 struct tulip_softc *sc;
2514 {
2515 struct ethercom *ec = &sc->sc_ethercom;
2516 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2517 struct ether_multi *enm;
2518 struct ether_multistep step;
2519 __volatile u_int32_t *sp;
2520 struct tulip_txsoft *txs;
2521 u_int8_t enaddr[ETHER_ADDR_LEN];
2522 u_int32_t hash, hashsize;
2523 int cnt;
2524
2525 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n",
2526 sc->sc_dev.dv_xname, sc->sc_flags));
2527
2528 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN);
2529
2530 /*
2531 * If there are transmissions pending, wait until they have
2532 * completed.
2533 */
2534 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL ||
2535 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) {
2536 sc->sc_flags |= TULIPF_WANT_SETUP;
2537 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n",
2538 sc->sc_dev.dv_xname));
2539 return;
2540 }
2541 sc->sc_flags &= ~TULIPF_WANT_SETUP;
2542
2543 switch (sc->sc_chip) {
2544 case TULIP_CHIP_82C115:
2545 hashsize = TULIP_PNICII_HASHSIZE;
2546 break;
2547
2548 default:
2549 hashsize = TULIP_MCHASHSIZE;
2550 }
2551
2552 /*
2553 * If we're running, idle the transmit and receive engines. If
2554 * we're NOT running, we're being called from tlp_init(), and our
2555 * writing OPMODE will start the transmit and receive processes
2556 * in motion.
2557 */
2558 if (ifp->if_flags & IFF_RUNNING)
2559 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2560
2561 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
2562
2563 if (ifp->if_flags & IFF_PROMISC) {
2564 sc->sc_opmode |= OPMODE_PR;
2565 goto allmulti;
2566 }
2567
2568 /*
2569 * Try Perfect filtering first.
2570 */
2571
2572 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
2573 sp = TULIP_CDSP(sc);
2574 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2575 cnt = 0;
2576 ETHER_FIRST_MULTI(step, ec, enm);
2577 while (enm != NULL) {
2578 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2579 /*
2580 * We must listen to a range of multicast addresses.
2581 * For now, just accept all multicasts, rather than
2582 * trying to set only those filter bits needed to match
2583 * the range. (At this time, the only use of address
2584 * ranges is for IP multicast routing, for which the
2585 * range is big enough to require all bits set.)
2586 */
2587 goto allmulti;
2588 }
2589 if (cnt == (TULIP_MAXADDRS - 2)) {
2590 /*
2591 * We already have our multicast limit (still need
2592 * our station address and broadcast). Go to
2593 * Hash-Perfect mode.
2594 */
2595 goto hashperfect;
2596 }
2597 cnt++;
2598 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0);
2599 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1);
2600 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2);
2601 ETHER_NEXT_MULTI(step, enm);
2602 }
2603
2604 if (ifp->if_flags & IFF_BROADCAST) {
2605 /* ...and the broadcast address. */
2606 cnt++;
2607 *sp++ = TULIP_SP_FIELD_C(0xffff);
2608 *sp++ = TULIP_SP_FIELD_C(0xffff);
2609 *sp++ = TULIP_SP_FIELD_C(0xffff);
2610 }
2611
2612 /* Pad the rest with our station address. */
2613 for (; cnt < TULIP_MAXADDRS; cnt++) {
2614 *sp++ = TULIP_SP_FIELD(enaddr, 0);
2615 *sp++ = TULIP_SP_FIELD(enaddr, 1);
2616 *sp++ = TULIP_SP_FIELD(enaddr, 2);
2617 }
2618 ifp->if_flags &= ~IFF_ALLMULTI;
2619 goto setit;
2620
2621 hashperfect:
2622 /*
2623 * Try Hash-Perfect mode.
2624 */
2625
2626 /*
2627 * Some 21140 chips have broken Hash-Perfect modes. On these
2628 * chips, we simply use Hash-Only mode, and put our station
2629 * address into the filter.
2630 */
2631 if (sc->sc_chip == TULIP_CHIP_21140)
2632 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY;
2633 else
2634 sc->sc_filtmode = TDCTL_Tx_FT_HASH;
2635 sp = TULIP_CDSP(sc);
2636 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2637 ETHER_FIRST_MULTI(step, ec, enm);
2638 while (enm != NULL) {
2639 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2640 /*
2641 * We must listen to a range of multicast addresses.
2642 * For now, just accept all multicasts, rather than
2643 * trying to set only those filter bits needed to match
2644 * the range. (At this time, the only use of address
2645 * ranges is for IP multicast routing, for which the
2646 * range is big enough to require all bits set.)
2647 */
2648 goto allmulti;
2649 }
2650 hash = tlp_mchash(enm->enm_addrlo, hashsize);
2651 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2652 ETHER_NEXT_MULTI(step, enm);
2653 }
2654
2655 if (ifp->if_flags & IFF_BROADCAST) {
2656 /* ...and the broadcast address. */
2657 hash = tlp_mchash(etherbroadcastaddr, hashsize);
2658 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2659 }
2660
2661 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) {
2662 /* ...and our station address. */
2663 hash = tlp_mchash(enaddr, hashsize);
2664 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2665 } else {
2666 /*
2667 * Hash-Perfect mode; put our station address after
2668 * the hash table.
2669 */
2670 sp[39] = TULIP_SP_FIELD(enaddr, 0);
2671 sp[40] = TULIP_SP_FIELD(enaddr, 1);
2672 sp[41] = TULIP_SP_FIELD(enaddr, 2);
2673 }
2674 ifp->if_flags &= ~IFF_ALLMULTI;
2675 goto setit;
2676
2677 allmulti:
2678 /*
2679 * Use Perfect filter mode. First address is the broadcast address,
2680 * and pad the rest with our station address. We'll set Pass-all-
2681 * multicast in OPMODE below.
2682 */
2683 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
2684 sp = TULIP_CDSP(sc);
2685 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2686 cnt = 0;
2687 if (ifp->if_flags & IFF_BROADCAST) {
2688 cnt++;
2689 *sp++ = TULIP_SP_FIELD_C(0xffff);
2690 *sp++ = TULIP_SP_FIELD_C(0xffff);
2691 *sp++ = TULIP_SP_FIELD_C(0xffff);
2692 }
2693 for (; cnt < TULIP_MAXADDRS; cnt++) {
2694 *sp++ = TULIP_SP_FIELD(enaddr, 0);
2695 *sp++ = TULIP_SP_FIELD(enaddr, 1);
2696 *sp++ = TULIP_SP_FIELD(enaddr, 2);
2697 }
2698 ifp->if_flags |= IFF_ALLMULTI;
2699
2700 setit:
2701 if (ifp->if_flags & IFF_ALLMULTI)
2702 sc->sc_opmode |= OPMODE_PM;
2703
2704 /* Sync the setup packet buffer. */
2705 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE);
2706
2707 /*
2708 * Fill in the setup packet descriptor.
2709 */
2710 txs = SIMPLEQ_FIRST(&sc->sc_txfreeq);
2711
2712 txs->txs_firstdesc = sc->sc_txnext;
2713 txs->txs_lastdesc = sc->sc_txnext;
2714 txs->txs_ndescs = 1;
2715 txs->txs_mbuf = NULL;
2716
2717 sc->sc_txdescs[sc->sc_txnext].td_bufaddr1 =
2718 htole32(TULIP_CDSPADDR(sc));
2719 sc->sc_txdescs[sc->sc_txnext].td_ctl =
2720 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) |
2721 sc->sc_filtmode | TDCTL_Tx_SET | sc->sc_setup_fsls |
2722 TDCTL_Tx_IC | sc->sc_tdctl_ch |
2723 (sc->sc_txnext == (TULIP_NTXDESC - 1) ? sc->sc_tdctl_er : 0));
2724 sc->sc_txdescs[sc->sc_txnext].td_status = htole32(TDSTAT_OWN);
2725 TULIP_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndescs,
2726 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2727
2728 /* Advance the tx pointer. */
2729 sc->sc_txfree -= 1;
2730 sc->sc_txnext = TULIP_NEXTTX(sc->sc_txnext);
2731
2732 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q);
2733 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
2734
2735 /*
2736 * Set the OPMODE register. This will also resume the
2737 * transmit transmit process we idled above.
2738 */
2739 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2740
2741 sc->sc_flags |= TULIPF_DOING_SETUP;
2742
2743 /*
2744 * Kick the transmitter; this will cause the Tulip to
2745 * read the setup descriptor.
2746 */
2747 /* XXX USE AUTOPOLLING? */
2748 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
2749
2750 /* Set up a watchdog timer in case the chip flakes out. */
2751 ifp->if_timer = 5;
2752
2753 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname));
2754 }
2755
2756 /*
2757 * tlp_winb_filter_setup:
2758 *
2759 * Set the Winbond 89C840F's receive filter.
2760 */
2761 void
2762 tlp_winb_filter_setup(sc)
2763 struct tulip_softc *sc;
2764 {
2765 struct ethercom *ec = &sc->sc_ethercom;
2766 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2767 struct ether_multi *enm;
2768 struct ether_multistep step;
2769 u_int32_t hash, mchash[2];
2770
2771 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n",
2772 sc->sc_dev.dv_xname, sc->sc_flags));
2773
2774 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP);
2775
2776 if (ifp->if_flags & IFF_MULTICAST)
2777 sc->sc_opmode |= OPMODE_WINB_AMP;
2778
2779 if (ifp->if_flags & IFF_BROADCAST)
2780 sc->sc_opmode |= OPMODE_WINB_ABP;
2781
2782 if (ifp->if_flags & IFF_PROMISC) {
2783 sc->sc_opmode |= OPMODE_WINB_APP;
2784 goto allmulti;
2785 }
2786
2787 mchash[0] = mchash[1] = 0;
2788
2789 ETHER_FIRST_MULTI(step, ec, enm);
2790 while (enm != NULL) {
2791 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2792 /*
2793 * We must listen to a range of multicast addresses.
2794 * For now, just accept all multicasts, rather than
2795 * trying to set only those filter bits needed to match
2796 * the range. (At this time, the only use of address
2797 * ranges is for IP multicast routing, for which the
2798 * range is big enough to require all bits set.)
2799 */
2800 goto allmulti;
2801 }
2802
2803 /*
2804 * According to the FreeBSD `wb' driver, yes, you
2805 * really do invert the hash.
2806 */
2807 hash =
2808 (~(ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26))
2809 & 0x3f;
2810 mchash[hash >> 5] |= 1 << (hash & 0x1f);
2811 ETHER_NEXT_MULTI(step, enm);
2812 }
2813 ifp->if_flags &= ~IFF_ALLMULTI;
2814 goto setit;
2815
2816 allmulti:
2817 ifp->if_flags |= IFF_ALLMULTI;
2818 mchash[0] = mchash[1] = 0xffffffff;
2819
2820 setit:
2821 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]);
2822 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]);
2823 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2824 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n",
2825 sc->sc_dev.dv_xname));
2826 }
2827
2828 /*
2829 * tlp_al981_filter_setup:
2830 *
2831 * Set the ADMtek AL981's receive filter.
2832 */
2833 void
2834 tlp_al981_filter_setup(sc)
2835 struct tulip_softc *sc;
2836 {
2837 struct ethercom *ec = &sc->sc_ethercom;
2838 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2839 struct ether_multi *enm;
2840 struct ether_multistep step;
2841 u_int32_t hash, mchash[2];
2842
2843 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n",
2844 sc->sc_dev.dv_xname, sc->sc_flags));
2845
2846 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2847
2848 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
2849
2850 if (ifp->if_flags & IFF_PROMISC) {
2851 sc->sc_opmode |= OPMODE_PR;
2852 goto allmulti;
2853 }
2854
2855 mchash[0] = mchash[1] = 0;
2856
2857 ETHER_FIRST_MULTI(step, ec, enm);
2858 while (enm != NULL) {
2859 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2860 /*
2861 * We must listen to a range of multicast addresses.
2862 * For now, just accept all multicasts, rather than
2863 * trying to set only those filter bits needed to match
2864 * the range. (At this time, the only use of address
2865 * ranges is for IP multicast routing, for which the
2866 * range is big enough to require all bits set.)
2867 */
2868 goto allmulti;
2869 }
2870
2871 hash = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26;
2872 mchash[hash >> 5] |= 1 << (hash & 0x1f);
2873 ETHER_NEXT_MULTI(step, enm);
2874 }
2875 ifp->if_flags &= ~IFF_ALLMULTI;
2876 goto setit;
2877
2878 allmulti:
2879 ifp->if_flags |= IFF_ALLMULTI;
2880 mchash[0] = mchash[1] = 0xffffffff;
2881
2882 setit:
2883 TULIP_WRITE(sc, CSR_ADM_MAR0, mchash[0]);
2884 TULIP_WRITE(sc, CSR_ADM_MAR1, mchash[1]);
2885 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2886 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n",
2887 sc->sc_dev.dv_xname));
2888 }
2889
2890 /*
2891 * tlp_idle:
2892 *
2893 * Cause the transmit and/or receive processes to go idle.
2894 */
2895 void
2896 tlp_idle(sc, bits)
2897 struct tulip_softc *sc;
2898 u_int32_t bits;
2899 {
2900 static const char *tlp_tx_state_names[] = {
2901 "STOPPED",
2902 "RUNNING - FETCH",
2903 "RUNNING - WAIT",
2904 "RUNNING - READING",
2905 "-- RESERVED --",
2906 "RUNNING - SETUP",
2907 "SUSPENDED",
2908 "RUNNING - CLOSE",
2909 };
2910 static const char *tlp_rx_state_names[] = {
2911 "STOPPED",
2912 "RUNNING - FETCH",
2913 "RUNNING - CHECK",
2914 "RUNNING - WAIT",
2915 "SUSPENDED",
2916 "RUNNING - CLOSE",
2917 "RUNNING - FLUSH",
2918 "RUNNING - QUEUE",
2919 };
2920 static const char *dm9102_tx_state_names[] = {
2921 "STOPPED",
2922 "RUNNING - FETCH",
2923 "RUNNING - SETUP",
2924 "RUNNING - READING",
2925 "RUNNING - CLOSE - CLEAR OWNER",
2926 "RUNNING - WAIT",
2927 "RUNNING - CLOSE - WRITE STATUS",
2928 "SUSPENDED",
2929 };
2930 static const char *dm9102_rx_state_names[] = {
2931 "STOPPED",
2932 "RUNNING - FETCH",
2933 "RUNNING - WAIT",
2934 "RUNNING - QUEUE",
2935 "RUNNING - CLOSE - CLEAR OWNER",
2936 "RUNNING - CLOSE - WRITE STATUS",
2937 "SUSPENDED",
2938 "RUNNING - FLUSH",
2939 };
2940
2941 const char **tx_state_names, **rx_state_names;
2942 u_int32_t csr, ackmask = 0;
2943 int i;
2944
2945 switch (sc->sc_chip) {
2946 case TULIP_CHIP_DM9102:
2947 case TULIP_CHIP_DM9102A:
2948 tx_state_names = dm9102_tx_state_names;
2949 rx_state_names = dm9102_rx_state_names;
2950 break;
2951
2952 default:
2953 tx_state_names = tlp_tx_state_names;
2954 rx_state_names = tlp_rx_state_names;
2955 break;
2956 }
2957
2958 if (bits & OPMODE_ST)
2959 ackmask |= STATUS_TPS;
2960
2961 if (bits & OPMODE_SR)
2962 ackmask |= STATUS_RPS;
2963
2964 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits);
2965
2966 for (i = 0; i < 1000; i++) {
2967 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask)
2968 break;
2969 delay(10);
2970 }
2971
2972 csr = TULIP_READ(sc, CSR_STATUS);
2973 if ((csr & ackmask) != ackmask) {
2974 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 &&
2975 (csr & STATUS_TS) != STATUS_TS_STOPPED)
2976 printf("%s: transmit process failed to idle: "
2977 "state %s\n", sc->sc_dev.dv_xname,
2978 tx_state_names[(csr & STATUS_TS) >> 20]);
2979 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 &&
2980 (csr & STATUS_RS) != STATUS_RS_STOPPED)
2981 printf("%s: receive process failed to idle: "
2982 "state %s\n", sc->sc_dev.dv_xname,
2983 rx_state_names[(csr & STATUS_RS) >> 17]);
2984 }
2985 TULIP_WRITE(sc, CSR_STATUS, ackmask);
2986 }
2987
2988 /*****************************************************************************
2989 * Generic media support functions.
2990 *****************************************************************************/
2991
2992 /*
2993 * tlp_mediastatus: [ifmedia interface function]
2994 *
2995 * Query the current media.
2996 */
2997 void
2998 tlp_mediastatus(ifp, ifmr)
2999 struct ifnet *ifp;
3000 struct ifmediareq *ifmr;
3001 {
3002 struct tulip_softc *sc = ifp->if_softc;
3003
3004 if (TULIP_IS_ENABLED(sc) == 0) {
3005 ifmr->ifm_active = IFM_ETHER | IFM_NONE;
3006 ifmr->ifm_status = 0;
3007 return;
3008 }
3009
3010 (*sc->sc_mediasw->tmsw_get)(sc, ifmr);
3011 }
3012
3013 /*
3014 * tlp_mediachange: [ifmedia interface function]
3015 *
3016 * Update the current media.
3017 */
3018 int
3019 tlp_mediachange(ifp)
3020 struct ifnet *ifp;
3021 {
3022 struct tulip_softc *sc = ifp->if_softc;
3023
3024 return ((*sc->sc_mediasw->tmsw_set)(sc));
3025 }
3026
3027 /*****************************************************************************
3028 * Support functions for MII-attached media.
3029 *****************************************************************************/
3030
3031 /*
3032 * tlp_mii_tick:
3033 *
3034 * One second timer, used to tick the MII.
3035 */
3036 void
3037 tlp_mii_tick(arg)
3038 void *arg;
3039 {
3040 struct tulip_softc *sc = arg;
3041 int s;
3042
3043 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
3044 return;
3045
3046 s = splnet();
3047 mii_tick(&sc->sc_mii);
3048 splx(s);
3049
3050 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc);
3051 }
3052
3053 /*
3054 * tlp_mii_statchg: [mii interface function]
3055 *
3056 * Callback from PHY when media changes.
3057 */
3058 void
3059 tlp_mii_statchg(self)
3060 struct device *self;
3061 {
3062 struct tulip_softc *sc = (struct tulip_softc *)self;
3063
3064 /* Idle the transmit and receive processes. */
3065 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
3066
3067 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD);
3068
3069 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T)
3070 sc->sc_opmode |= OPMODE_TTM;
3071 else
3072 sc->sc_opmode |= OPMODE_HBD;
3073
3074 if (sc->sc_mii.mii_media_active & IFM_FDX)
3075 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD;
3076
3077 /*
3078 * Write new OPMODE bits. This also restarts the transmit
3079 * and receive processes.
3080 */
3081 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3082 }
3083
3084 /*
3085 * tlp_winb_mii_statchg: [mii interface function]
3086 *
3087 * Callback from PHY when media changes. This version is
3088 * for the Winbond 89C840F, which has different OPMODE bits.
3089 */
3090 void
3091 tlp_winb_mii_statchg(self)
3092 struct device *self;
3093 {
3094 struct tulip_softc *sc = (struct tulip_softc *)self;
3095
3096 /* Idle the transmit and receive processes. */
3097 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
3098
3099 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD);
3100
3101 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX)
3102 sc->sc_opmode |= OPMODE_WINB_FES;
3103
3104 if (sc->sc_mii.mii_media_active & IFM_FDX)
3105 sc->sc_opmode |= OPMODE_FD;
3106
3107 /*
3108 * Write new OPMODE bits. This also restarts the transmit
3109 * and receive processes.
3110 */
3111 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3112 }
3113
3114 /*
3115 * tlp_dm9102_mii_statchg: [mii interface function]
3116 *
3117 * Callback from PHY when media changes. This version is
3118 * for the DM9102.
3119 */
3120 void
3121 tlp_dm9102_mii_statchg(self)
3122 struct device *self;
3123 {
3124 struct tulip_softc *sc = (struct tulip_softc *)self;
3125
3126 /*
3127 * Don't idle the transmit and receive processes, here. It
3128 * seems to fail, and just causes excess noise.
3129 */
3130 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD);
3131
3132 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) != IFM_100_TX)
3133 sc->sc_opmode |= OPMODE_TTM;
3134
3135 if (sc->sc_mii.mii_media_active & IFM_FDX)
3136 sc->sc_opmode |= OPMODE_FD;
3137
3138 /*
3139 * Write new OPMODE bits.
3140 */
3141 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3142 }
3143
3144 /*
3145 * tlp_mii_getmedia:
3146 *
3147 * Callback from ifmedia to request current media status.
3148 */
3149 void
3150 tlp_mii_getmedia(sc, ifmr)
3151 struct tulip_softc *sc;
3152 struct ifmediareq *ifmr;
3153 {
3154
3155 mii_pollstat(&sc->sc_mii);
3156 ifmr->ifm_status = sc->sc_mii.mii_media_status;
3157 ifmr->ifm_active = sc->sc_mii.mii_media_active;
3158 }
3159
3160 /*
3161 * tlp_mii_setmedia:
3162 *
3163 * Callback from ifmedia to request new media setting.
3164 */
3165 int
3166 tlp_mii_setmedia(sc)
3167 struct tulip_softc *sc;
3168 {
3169 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
3170
3171 if (ifp->if_flags & IFF_UP) {
3172 switch (sc->sc_chip) {
3173 case TULIP_CHIP_21142:
3174 case TULIP_CHIP_21143:
3175 /* Disable the internal Nway engine. */
3176 TULIP_WRITE(sc, CSR_SIATXRX, 0);
3177 break;
3178
3179 default:
3180 /* Nothing. */
3181 }
3182 mii_mediachg(&sc->sc_mii);
3183 }
3184 return (0);
3185 }
3186
3187 /*
3188 * tlp_bitbang_mii_readreg:
3189 *
3190 * Read a PHY register via bit-bang'ing the MII.
3191 */
3192 int
3193 tlp_bitbang_mii_readreg(self, phy, reg)
3194 struct device *self;
3195 int phy, reg;
3196 {
3197 struct tulip_softc *sc = (void *) self;
3198
3199 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg));
3200 }
3201
3202 /*
3203 * tlp_bitbang_mii_writereg:
3204 *
3205 * Write a PHY register via bit-bang'ing the MII.
3206 */
3207 void
3208 tlp_bitbang_mii_writereg(self, phy, reg, val)
3209 struct device *self;
3210 int phy, reg, val;
3211 {
3212 struct tulip_softc *sc = (void *) self;
3213
3214 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val);
3215 }
3216
3217 /*
3218 * tlp_sio_mii_bitbang_read:
3219 *
3220 * Read the MII serial port for the MII bit-bang module.
3221 */
3222 u_int32_t
3223 tlp_sio_mii_bitbang_read(self)
3224 struct device *self;
3225 {
3226 struct tulip_softc *sc = (void *) self;
3227
3228 return (TULIP_READ(sc, CSR_MIIROM));
3229 }
3230
3231 /*
3232 * tlp_sio_mii_bitbang_write:
3233 *
3234 * Write the MII serial port for the MII bit-bang module.
3235 */
3236 void
3237 tlp_sio_mii_bitbang_write(self, val)
3238 struct device *self;
3239 u_int32_t val;
3240 {
3241 struct tulip_softc *sc = (void *) self;
3242
3243 TULIP_WRITE(sc, CSR_MIIROM, val);
3244 }
3245
3246 /*
3247 * tlp_pnic_mii_readreg:
3248 *
3249 * Read a PHY register on the Lite-On PNIC.
3250 */
3251 int
3252 tlp_pnic_mii_readreg(self, phy, reg)
3253 struct device *self;
3254 int phy, reg;
3255 {
3256 struct tulip_softc *sc = (void *) self;
3257 u_int32_t val;
3258 int i;
3259
3260 TULIP_WRITE(sc, CSR_PNIC_MII,
3261 PNIC_MII_MBO | PNIC_MII_RESERVED |
3262 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) |
3263 (reg << PNIC_MII_REGSHIFT));
3264
3265 for (i = 0; i < 1000; i++) {
3266 delay(10);
3267 val = TULIP_READ(sc, CSR_PNIC_MII);
3268 if ((val & PNIC_MII_BUSY) == 0) {
3269 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA)
3270 return (0);
3271 else
3272 return (val & PNIC_MII_DATA);
3273 }
3274 }
3275 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname);
3276 return (0);
3277 }
3278
3279 /*
3280 * tlp_pnic_mii_writereg:
3281 *
3282 * Write a PHY register on the Lite-On PNIC.
3283 */
3284 void
3285 tlp_pnic_mii_writereg(self, phy, reg, val)
3286 struct device *self;
3287 int phy, reg, val;
3288 {
3289 struct tulip_softc *sc = (void *) self;
3290 int i;
3291
3292 TULIP_WRITE(sc, CSR_PNIC_MII,
3293 PNIC_MII_MBO | PNIC_MII_RESERVED |
3294 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) |
3295 (reg << PNIC_MII_REGSHIFT) | val);
3296
3297 for (i = 0; i < 1000; i++) {
3298 delay(10);
3299 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0)
3300 return;
3301 }
3302 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname);
3303 }
3304
3305 const bus_addr_t tlp_al981_phy_regmap[] = {
3306 CSR_ADM_BMCR,
3307 CSR_ADM_BMSR,
3308 CSR_ADM_PHYIDR1,
3309 CSR_ADM_PHYIDR2,
3310 CSR_ADM_ANAR,
3311 CSR_ADM_ANLPAR,
3312 CSR_ADM_ANER,
3313
3314 CSR_ADM_XMC,
3315 CSR_ADM_XCIIS,
3316 CSR_ADM_XIE,
3317 CSR_ADM_100CTR,
3318 };
3319 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) /
3320 sizeof(tlp_al981_phy_regmap[0]);
3321
3322 /*
3323 * tlp_al981_mii_readreg:
3324 *
3325 * Read a PHY register on the ADMtek AL981.
3326 */
3327 int
3328 tlp_al981_mii_readreg(self, phy, reg)
3329 struct device *self;
3330 int phy, reg;
3331 {
3332 struct tulip_softc *sc = (struct tulip_softc *)self;
3333
3334 /* AL981 only has an internal PHY. */
3335 if (phy != 0)
3336 return (0);
3337
3338 if (reg >= tlp_al981_phy_regmap_size)
3339 return (0);
3340
3341 return (bus_space_read_4(sc->sc_st, sc->sc_sh,
3342 tlp_al981_phy_regmap[reg]) & 0xffff);
3343 }
3344
3345 /*
3346 * tlp_al981_mii_writereg:
3347 *
3348 * Write a PHY register on the ADMtek AL981.
3349 */
3350 void
3351 tlp_al981_mii_writereg(self, phy, reg, val)
3352 struct device *self;
3353 int phy, reg, val;
3354 {
3355 struct tulip_softc *sc = (struct tulip_softc *)self;
3356
3357 /* AL981 only has an internal PHY. */
3358 if (phy != 0)
3359 return;
3360
3361 if (reg >= tlp_al981_phy_regmap_size)
3362 return;
3363
3364 bus_space_write_4(sc->sc_st, sc->sc_sh,
3365 tlp_al981_phy_regmap[reg], val);
3366 }
3367
3368 /*****************************************************************************
3369 * Chip-specific pre-init and reset functions.
3370 *****************************************************************************/
3371
3372 /*
3373 * tlp_2114x_preinit:
3374 *
3375 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
3376 */
3377 void
3378 tlp_2114x_preinit(sc)
3379 struct tulip_softc *sc;
3380 {
3381 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3382 struct tulip_21x4x_media *tm = ife->ifm_aux;
3383
3384 /*
3385 * Whether or not we're in MII or SIA/SYM mode, the media info
3386 * contains the appropriate OPMODE bits.
3387 *
3388 * Note that if we have no media info, we are are doing
3389 * non-MII `auto'.
3390 *
3391 * Also, we always set the Must-Be-One bit.
3392 */
3393 if (tm == NULL) {
3394 #ifdef DIAGNOSTIC
3395 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
3396 panic("tlp_2114x_preinit: not IFM_AUTO");
3397 if (sc->sc_nway_active == NULL)
3398 panic("tlp_2114x_preinit: nway_active NULL");
3399 #endif
3400 tm = sc->sc_nway_active->ifm_aux;
3401 }
3402 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode;
3403
3404 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3405 }
3406
3407 /*
3408 * tlp_2114x_mii_preinit:
3409 *
3410 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
3411 * This version is used by boards which only have MII and don't have
3412 * an ISV SROM.
3413 */
3414 void
3415 tlp_2114x_mii_preinit(sc)
3416 struct tulip_softc *sc;
3417 {
3418
3419 /*
3420 * Always set the Must-Be-One bit, and Port Select (to select MII).
3421 * We'll never be called during a media change.
3422 */
3423 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS;
3424 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3425 }
3426
3427 /*
3428 * tlp_pnic_preinit:
3429 *
3430 * Pre-init function for the Lite-On 82c168 and 82c169.
3431 */
3432 void
3433 tlp_pnic_preinit(sc)
3434 struct tulip_softc *sc;
3435 {
3436
3437 if (sc->sc_flags & TULIPF_HAS_MII) {
3438 /*
3439 * MII case: just set the port-select bit; we will never
3440 * be called during a media change.
3441 */
3442 sc->sc_opmode |= OPMODE_PS;
3443 } else {
3444 /*
3445 * ENDEC/PCS/Nway mode; enable the Tx backoff counter.
3446 */
3447 sc->sc_opmode |= OPMODE_PNIC_TBEN;
3448 }
3449 }
3450
3451 /*
3452 * tlp_dm9102_preinit:
3453 *
3454 * Pre-init function for the Davicom DM9102.
3455 */
3456 void
3457 tlp_dm9102_preinit(sc)
3458 struct tulip_softc *sc;
3459 {
3460
3461 switch (sc->sc_chip) {
3462 case TULIP_CHIP_DM9102:
3463 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD|OPMODE_PS;
3464 break;
3465
3466 case TULIP_CHIP_DM9102A:
3467 /*
3468 * XXX Figure out how to actually deal with the HomePNA
3469 * XXX portion of the DM9102A.
3470 */
3471 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD;
3472 break;
3473
3474 default:
3475 /* Nothing. */
3476 }
3477
3478 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3479 }
3480
3481 /*
3482 * tlp_21140_reset:
3483 *
3484 * Issue a reset sequence on the 21140 via the GPIO facility.
3485 */
3486 void
3487 tlp_21140_reset(sc)
3488 struct tulip_softc *sc;
3489 {
3490 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3491 struct tulip_21x4x_media *tm = ife->ifm_aux;
3492 int i;
3493
3494 /* First, set the direction on the GPIO pins. */
3495 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
3496
3497 /* Now, issue the reset sequence. */
3498 for (i = 0; i < tm->tm_reset_length; i++) {
3499 delay(10);
3500 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]);
3501 }
3502
3503 /* Now, issue the selection sequence. */
3504 for (i = 0; i < tm->tm_gp_length; i++) {
3505 delay(10);
3506 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]);
3507 }
3508
3509 /* If there were no sequences, just lower the pins. */
3510 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0)
3511 TULIP_WRITE(sc, CSR_GPP, 0);
3512 }
3513
3514 /*
3515 * tlp_21142_reset:
3516 *
3517 * Issue a reset sequence on the 21142 via the GPIO facility.
3518 */
3519 void
3520 tlp_21142_reset(sc)
3521 struct tulip_softc *sc;
3522 {
3523 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3524 struct tulip_21x4x_media *tm = ife->ifm_aux;
3525 const u_int8_t *ncp;
3526 int i;
3527
3528 ncp = &sc->sc_srom[tm->tm_reset_offset];
3529 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) {
3530 delay(10);
3531 TULIP_WRITE(sc, CSR_SIAGEN,
3532 TULIP_ROM_GETW(ncp, 0) << 16);
3533 }
3534
3535 ncp = &sc->sc_srom[tm->tm_gp_offset];
3536 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) {
3537 delay(10);
3538 TULIP_WRITE(sc, CSR_SIAGEN,
3539 TULIP_ROM_GETW(ncp, 0) << 16);
3540 }
3541
3542 /* If there were no sequences, just lower the pins. */
3543 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
3544 delay(10);
3545 TULIP_WRITE(sc, CSR_SIAGEN, 0);
3546 }
3547 }
3548
3549 /*
3550 * tlp_pmac_reset:
3551 *
3552 * Reset routine for Macronix chips.
3553 */
3554 void
3555 tlp_pmac_reset(sc)
3556 struct tulip_softc *sc;
3557 {
3558
3559 switch (sc->sc_chip) {
3560 case TULIP_CHIP_82C115:
3561 case TULIP_CHIP_MX98715:
3562 case TULIP_CHIP_MX98715A:
3563 case TULIP_CHIP_MX98725:
3564 /*
3565 * Set the LED operating mode. This information is located
3566 * in the EEPROM at byte offset 0x77, per the MX98715A and
3567 * MX98725 application notes.
3568 */
3569 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24);
3570 break;
3571
3572 default:
3573 /* Nothing. */
3574 }
3575 }
3576
3577 /*
3578 * tlp_dm9102_reset:
3579 *
3580 * Reset routine for the Davicom DM9102.
3581 */
3582 void
3583 tlp_dm9102_reset(sc)
3584 struct tulip_softc *sc;
3585 {
3586
3587 TULIP_WRITE(sc, CSR_DM_PHYSTAT, DM_PHYSTAT_GEPC|DM_PHYSTAT_GPED);
3588 delay(100);
3589 TULIP_WRITE(sc, CSR_DM_PHYSTAT, 0);
3590 }
3591
3592 /*****************************************************************************
3593 * Chip/board-specific media switches. The ones here are ones that
3594 * are potentially common to multiple front-ends.
3595 *****************************************************************************/
3596
3597 /*
3598 * This table is a common place for all sorts of media information,
3599 * keyed off of the SROM media code for that media.
3600 *
3601 * Note that we explicitly configure the 21142/21143 to always advertise
3602 * NWay capabilities when using the UTP port.
3603 * XXX Actually, we don't yet.
3604 */
3605 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = {
3606 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0,
3607 "10baseT",
3608 0,
3609 { SIACONN_21040_10BASET,
3610 SIATXRX_21040_10BASET,
3611 SIAGEN_21040_10BASET },
3612
3613 { SIACONN_21041_10BASET,
3614 SIATXRX_21041_10BASET,
3615 SIAGEN_21041_10BASET },
3616
3617 { SIACONN_21142_10BASET,
3618 SIATXRX_21142_10BASET,
3619 SIAGEN_21142_10BASET } },
3620
3621 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0,
3622 "10base2",
3623 0,
3624 { 0,
3625 0,
3626 0 },
3627
3628 { SIACONN_21041_BNC,
3629 SIATXRX_21041_BNC,
3630 SIAGEN_21041_BNC },
3631
3632 { SIACONN_21142_BNC,
3633 SIATXRX_21142_BNC,
3634 SIAGEN_21142_BNC } },
3635
3636 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0,
3637 "10base5",
3638 0,
3639 { SIACONN_21040_AUI,
3640 SIATXRX_21040_AUI,
3641 SIAGEN_21040_AUI },
3642
3643 { SIACONN_21041_AUI,
3644 SIATXRX_21041_AUI,
3645 SIAGEN_21041_AUI },
3646
3647 { SIACONN_21142_AUI,
3648 SIATXRX_21142_AUI,
3649 SIAGEN_21142_AUI } },
3650
3651 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0,
3652 "100baseTX",
3653 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD,
3654 { 0,
3655 0,
3656 0 },
3657
3658 { 0,
3659 0,
3660 0 },
3661
3662 { 0,
3663 0,
3664 SIAGEN_ABM } },
3665
3666 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX,
3667 "10baseT-FDX",
3668 OPMODE_FD|OPMODE_HBD,
3669 { SIACONN_21040_10BASET_FDX,
3670 SIATXRX_21040_10BASET_FDX,
3671 SIAGEN_21040_10BASET_FDX },
3672
3673 { SIACONN_21041_10BASET_FDX,
3674 SIATXRX_21041_10BASET_FDX,
3675 SIAGEN_21041_10BASET_FDX },
3676
3677 { SIACONN_21142_10BASET_FDX,
3678 SIATXRX_21142_10BASET_FDX,
3679 SIAGEN_21142_10BASET_FDX } },
3680
3681 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX,
3682 "100baseTX-FDX",
3683 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD,
3684 { 0,
3685 0,
3686 0 },
3687
3688 { 0,
3689 0,
3690 0 },
3691
3692 { 0,
3693 0,
3694 SIAGEN_ABM } },
3695
3696 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0,
3697 "100baseT4",
3698 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD,
3699 { 0,
3700 0,
3701 0 },
3702
3703 { 0,
3704 0,
3705 0 },
3706
3707 { 0,
3708 0,
3709 SIAGEN_ABM } },
3710
3711 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0,
3712 "100baseFX",
3713 OPMODE_PS|OPMODE_PCS|OPMODE_HBD,
3714 { 0,
3715 0,
3716 0 },
3717
3718 { 0,
3719 0,
3720 0 },
3721
3722 { 0,
3723 0,
3724 SIAGEN_ABM } },
3725
3726 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX,
3727 "100baseFX-FDX",
3728 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD,
3729 { 0,
3730 0,
3731 0 },
3732
3733 { 0,
3734 0,
3735 0 },
3736
3737 { 0,
3738 0,
3739 SIAGEN_ABM } },
3740
3741 { 0, 0, 0,
3742 NULL,
3743 0,
3744 { 0,
3745 0,
3746 0 },
3747
3748 { 0,
3749 0,
3750 0 },
3751
3752 { 0,
3753 0,
3754 0 } },
3755 };
3756
3757 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t));
3758 void tlp_srom_media_info __P((struct tulip_softc *,
3759 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *));
3760 void tlp_add_srom_media __P((struct tulip_softc *, int,
3761 void (*)(struct tulip_softc *, struct ifmediareq *),
3762 int (*)(struct tulip_softc *), const u_int8_t *, int));
3763 void tlp_print_media __P((struct tulip_softc *));
3764 void tlp_nway_activate __P((struct tulip_softc *, int));
3765 void tlp_get_minst __P((struct tulip_softc *));
3766
3767 const struct tulip_srom_to_ifmedia *
3768 tlp_srom_to_ifmedia(sm)
3769 u_int8_t sm;
3770 {
3771 const struct tulip_srom_to_ifmedia *tsti;
3772
3773 for (tsti = tulip_srom_to_ifmedia_table;
3774 tsti->tsti_name != NULL; tsti++) {
3775 if (tsti->tsti_srom == sm)
3776 return (tsti);
3777 }
3778
3779 return (NULL);
3780 }
3781
3782 void
3783 tlp_srom_media_info(sc, tsti, tm)
3784 struct tulip_softc *sc;
3785 const struct tulip_srom_to_ifmedia *tsti;
3786 struct tulip_21x4x_media *tm;
3787 {
3788
3789 tm->tm_name = tsti->tsti_name;
3790 tm->tm_opmode = tsti->tsti_opmode;
3791
3792 switch (sc->sc_chip) {
3793 case TULIP_CHIP_DE425:
3794 case TULIP_CHIP_21040:
3795 tm->tm_sia = tsti->tsti_21040; /* struct assignment */
3796 break;
3797
3798 case TULIP_CHIP_21041:
3799 tm->tm_sia = tsti->tsti_21041; /* struct assignment */
3800 break;
3801
3802 case TULIP_CHIP_21142:
3803 case TULIP_CHIP_21143:
3804 case TULIP_CHIP_82C115:
3805 case TULIP_CHIP_MX98715:
3806 case TULIP_CHIP_MX98715A:
3807 case TULIP_CHIP_MX98725:
3808 tm->tm_sia = tsti->tsti_21142; /* struct assignment */
3809 break;
3810
3811 default:
3812 /* Nothing. */
3813 }
3814 }
3815
3816 void
3817 tlp_add_srom_media(sc, type, get, set, list, cnt)
3818 struct tulip_softc *sc;
3819 int type;
3820 void (*get) __P((struct tulip_softc *, struct ifmediareq *));
3821 int (*set) __P((struct tulip_softc *));
3822 const u_int8_t *list;
3823 int cnt;
3824 {
3825 struct tulip_21x4x_media *tm;
3826 const struct tulip_srom_to_ifmedia *tsti;
3827 int i;
3828
3829 for (i = 0; i < cnt; i++) {
3830 tsti = tlp_srom_to_ifmedia(list[i]);
3831 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
3832 memset(tm, 0, sizeof(*tm));
3833 tlp_srom_media_info(sc, tsti, tm);
3834 tm->tm_type = type;
3835 tm->tm_get = get;
3836 tm->tm_set = set;
3837
3838 ifmedia_add(&sc->sc_mii.mii_media,
3839 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
3840 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
3841 }
3842 }
3843
3844 void
3845 tlp_print_media(sc)
3846 struct tulip_softc *sc;
3847 {
3848 struct ifmedia_entry *ife;
3849 struct tulip_21x4x_media *tm;
3850 const char *sep = "";
3851
3852 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
3853
3854 printf("%s: ", sc->sc_dev.dv_xname);
3855 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
3856 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) {
3857 tm = ife->ifm_aux;
3858 if (tm == NULL) {
3859 #ifdef DIAGNOSTIC
3860 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
3861 panic("tlp_print_media");
3862 #endif
3863 PRINT("auto");
3864 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII &&
3865 tm->tm_type != TULIP_ROM_MB_21142_MII) {
3866 PRINT(tm->tm_name);
3867 }
3868 }
3869 printf("\n");
3870
3871 #undef PRINT
3872 }
3873
3874 void
3875 tlp_nway_activate(sc, media)
3876 struct tulip_softc *sc;
3877 int media;
3878 {
3879 struct ifmedia_entry *ife;
3880
3881 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0);
3882 #ifdef DIAGNOSTIC
3883 if (ife == NULL)
3884 panic("tlp_nway_activate");
3885 #endif
3886 sc->sc_nway_active = ife;
3887 }
3888
3889 void
3890 tlp_get_minst(sc)
3891 struct tulip_softc *sc;
3892 {
3893
3894 if ((sc->sc_media_seen &
3895 ~((1 << TULIP_ROM_MB_21140_MII) |
3896 (1 << TULIP_ROM_MB_21142_MII))) == 0) {
3897 /*
3898 * We have not yet seen any SIA/SYM media (but are
3899 * about to; that's why we're called!), so assign
3900 * the current media instance to be the `internal media'
3901 * instance, and advance it so any MII media gets a
3902 * fresh one (used to selecting/isolating a PHY).
3903 */
3904 sc->sc_tlp_minst = sc->sc_mii.mii_instance++;
3905 }
3906 }
3907
3908 /*
3909 * SIA Utility functions.
3910 */
3911 void tlp_sia_update_link __P((struct tulip_softc *));
3912 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *));
3913 int tlp_sia_set __P((struct tulip_softc *));
3914 void tlp_sia_fixup __P((struct tulip_softc *));
3915
3916 void
3917 tlp_sia_update_link(sc)
3918 struct tulip_softc *sc;
3919 {
3920 struct ifmedia_entry *ife;
3921 struct tulip_21x4x_media *tm;
3922 u_int32_t siastat;
3923
3924 ife = TULIP_CURRENT_MEDIA(sc);
3925 tm = ife->ifm_aux;
3926
3927 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID);
3928
3929 siastat = TULIP_READ(sc, CSR_SIASTAT);
3930
3931 /*
3932 * Note that when we do SIA link tests, we are assuming that
3933 * the chip is really in the mode that the current media setting
3934 * reflects. If we're not, then the link tests will not be
3935 * accurate!
3936 */
3937 switch (IFM_SUBTYPE(ife->ifm_media)) {
3938 case IFM_10_T:
3939 sc->sc_flags |= TULIPF_LINK_VALID;
3940 if ((siastat & SIASTAT_LS10) == 0)
3941 sc->sc_flags |= TULIPF_LINK_UP;
3942 break;
3943
3944 case IFM_100_TX:
3945 case IFM_100_T4:
3946 sc->sc_flags |= TULIPF_LINK_VALID;
3947 if ((siastat & SIASTAT_LS100) == 0)
3948 sc->sc_flags |= TULIPF_LINK_UP;
3949 break;
3950 }
3951
3952 switch (sc->sc_chip) {
3953 case TULIP_CHIP_21142:
3954 case TULIP_CHIP_21143:
3955 /*
3956 * On these chips, we can tell more information about
3957 * AUI/BNC. Note that the AUI/BNC selection is made
3958 * in a different register; for our purpose, it's all
3959 * AUI.
3960 */
3961 switch (IFM_SUBTYPE(ife->ifm_media)) {
3962 case IFM_10_2:
3963 case IFM_10_5:
3964 sc->sc_flags |= TULIPF_LINK_VALID;
3965 if (siastat & SIASTAT_ARA) {
3966 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA);
3967 sc->sc_flags |= TULIPF_LINK_UP;
3968 }
3969 break;
3970
3971 default:
3972 /*
3973 * If we're SYM media and can detect the link
3974 * via the GPIO facility, prefer that status
3975 * over LS100.
3976 */
3977 if (tm->tm_type == TULIP_ROM_MB_21143_SYM &&
3978 tm->tm_actmask != 0) {
3979 sc->sc_flags = (sc->sc_flags &
3980 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID;
3981 if (TULIP_ISSET(sc, CSR_SIAGEN,
3982 tm->tm_actmask) == tm->tm_actdata)
3983 sc->sc_flags |= TULIPF_LINK_UP;
3984 }
3985 }
3986 break;
3987
3988 default:
3989 /* Nothing. */
3990 }
3991 }
3992
3993 void
3994 tlp_sia_get(sc, ifmr)
3995 struct tulip_softc *sc;
3996 struct ifmediareq *ifmr;
3997 {
3998 struct ifmedia_entry *ife;
3999
4000 ifmr->ifm_status = 0;
4001
4002 tlp_sia_update_link(sc);
4003
4004 ife = TULIP_CURRENT_MEDIA(sc);
4005
4006 if (sc->sc_flags & TULIPF_LINK_VALID)
4007 ifmr->ifm_status |= IFM_AVALID;
4008 if (sc->sc_flags & TULIPF_LINK_UP)
4009 ifmr->ifm_status |= IFM_ACTIVE;
4010 ifmr->ifm_active = ife->ifm_media;
4011 }
4012
4013 void
4014 tlp_sia_fixup(sc)
4015 struct tulip_softc *sc;
4016 {
4017 struct ifmedia_entry *ife;
4018 struct tulip_21x4x_media *tm;
4019 u_int32_t siaconn, siatxrx, siagen;
4020
4021 switch (sc->sc_chip) {
4022 case TULIP_CHIP_82C115:
4023 case TULIP_CHIP_MX98713A:
4024 case TULIP_CHIP_MX98715:
4025 case TULIP_CHIP_MX98715A:
4026 case TULIP_CHIP_MX98725:
4027 siaconn = PMAC_SIACONN_MASK;
4028 siatxrx = PMAC_SIATXRX_MASK;
4029 siagen = PMAC_SIAGEN_MASK;
4030 break;
4031
4032 default:
4033 /* No fixups required on any other chips. */
4034 return;
4035 }
4036
4037 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4038 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) {
4039 tm = ife->ifm_aux;
4040 if (tm == NULL)
4041 continue;
4042
4043 tm->tm_siaconn &= siaconn;
4044 tm->tm_siatxrx &= siatxrx;
4045 tm->tm_siagen &= siagen;
4046 }
4047 }
4048
4049 int
4050 tlp_sia_set(sc)
4051 struct tulip_softc *sc;
4052 {
4053 struct ifmedia_entry *ife;
4054 struct tulip_21x4x_media *tm;
4055
4056 ife = TULIP_CURRENT_MEDIA(sc);
4057 tm = ife->ifm_aux;
4058
4059 /*
4060 * XXX This appears to be necessary on a bunch of the clone chips.
4061 */
4062 delay(20000);
4063
4064 /*
4065 * Idle the chip.
4066 */
4067 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
4068
4069 /*
4070 * Program the SIA. It's important to write in this order,
4071 * resetting the SIA first.
4072 */
4073 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */
4074 delay(1000);
4075
4076 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx);
4077
4078 switch (sc->sc_chip) {
4079 case TULIP_CHIP_21142:
4080 case TULIP_CHIP_21143:
4081 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl);
4082 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata);
4083 break;
4084 default:
4085 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen);
4086 }
4087
4088 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn);
4089
4090 /*
4091 * Set the OPMODE bits for this media and write OPMODE.
4092 * This will resume the transmit and receive processes.
4093 */
4094 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
4095 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
4096
4097 return (0);
4098 }
4099
4100 /*
4101 * 21140 GPIO utility functions.
4102 */
4103 void tlp_21140_gpio_update_link __P((struct tulip_softc *));
4104 void tlp_21140_gpio_get __P((struct tulip_softc *sc,
4105 struct ifmediareq *ifmr));
4106 int tlp_21140_gpio_set __P((struct tulip_softc *sc));
4107
4108 void
4109 tlp_21140_gpio_update_link(sc)
4110 struct tulip_softc *sc;
4111 {
4112 struct ifmedia_entry *ife;
4113 struct tulip_21x4x_media *tm;
4114
4115 ife = TULIP_CURRENT_MEDIA(sc);
4116 tm = ife->ifm_aux;
4117
4118 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID);
4119
4120 if (tm->tm_actmask != 0) {
4121 sc->sc_flags |= TULIPF_LINK_VALID;
4122 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) ==
4123 tm->tm_actdata)
4124 sc->sc_flags |= TULIPF_LINK_UP;
4125 }
4126 }
4127
4128 void
4129 tlp_21140_gpio_get(sc, ifmr)
4130 struct tulip_softc *sc;
4131 struct ifmediareq *ifmr;
4132 {
4133 struct ifmedia_entry *ife;
4134
4135 ifmr->ifm_status = 0;
4136
4137 tlp_21140_gpio_update_link(sc);
4138
4139 ife = TULIP_CURRENT_MEDIA(sc);
4140
4141 if (sc->sc_flags & TULIPF_LINK_VALID)
4142 ifmr->ifm_status |= IFM_AVALID;
4143 if (sc->sc_flags & TULIPF_LINK_UP)
4144 ifmr->ifm_status |= IFM_ACTIVE;
4145 ifmr->ifm_active = ife->ifm_media;
4146 }
4147
4148 int
4149 tlp_21140_gpio_set(sc)
4150 struct tulip_softc *sc;
4151 {
4152 struct ifmedia_entry *ife;
4153 struct tulip_21x4x_media *tm;
4154
4155 ife = TULIP_CURRENT_MEDIA(sc);
4156 tm = ife->ifm_aux;
4157
4158 /*
4159 * Idle the chip.
4160 */
4161 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
4162
4163 /*
4164 * Set the GPIO pins for this media, to flip any
4165 * relays, etc.
4166 */
4167 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
4168 delay(10);
4169 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata);
4170
4171 /*
4172 * Set the OPMODE bits for this media and write OPMODE.
4173 * This will resume the transmit and receive processes.
4174 */
4175 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
4176 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
4177
4178 return (0);
4179 }
4180
4181 /*
4182 * 21040 and 21041 media switches.
4183 */
4184 void tlp_21040_tmsw_init __P((struct tulip_softc *));
4185 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *));
4186 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *));
4187 void tlp_21041_tmsw_init __P((struct tulip_softc *));
4188
4189 const struct tulip_mediasw tlp_21040_mediasw = {
4190 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set
4191 };
4192
4193 const struct tulip_mediasw tlp_21040_tp_mediasw = {
4194 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set
4195 };
4196
4197 const struct tulip_mediasw tlp_21040_auibnc_mediasw = {
4198 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set
4199 };
4200
4201 const struct tulip_mediasw tlp_21041_mediasw = {
4202 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set
4203 };
4204
4205
4206 void
4207 tlp_21040_tmsw_init(sc)
4208 struct tulip_softc *sc;
4209 {
4210 static const u_int8_t media[] = {
4211 TULIP_ROM_MB_MEDIA_TP,
4212 TULIP_ROM_MB_MEDIA_TP_FDX,
4213 TULIP_ROM_MB_MEDIA_AUI,
4214 };
4215 struct tulip_21x4x_media *tm;
4216
4217 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4218 tlp_mediastatus);
4219
4220 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3);
4221
4222 /*
4223 * No SROM type for External SIA.
4224 */
4225 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4226 memset(tm, 0, sizeof(*tm));
4227 tm->tm_name = "manual";
4228 tm->tm_opmode = 0;
4229 tm->tm_siaconn = SIACONN_21040_EXTSIA;
4230 tm->tm_siatxrx = SIATXRX_21040_EXTSIA;
4231 tm->tm_siagen = SIAGEN_21040_EXTSIA;
4232 ifmedia_add(&sc->sc_mii.mii_media,
4233 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm);
4234
4235 /*
4236 * XXX Autosense not yet supported.
4237 */
4238
4239 /* XXX This should be auto-sense. */
4240 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4241
4242 tlp_print_media(sc);
4243 }
4244
4245 void
4246 tlp_21040_tp_tmsw_init(sc)
4247 struct tulip_softc *sc;
4248 {
4249 static const u_int8_t media[] = {
4250 TULIP_ROM_MB_MEDIA_TP,
4251 TULIP_ROM_MB_MEDIA_TP_FDX,
4252 };
4253
4254 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4255 tlp_mediastatus);
4256
4257 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2);
4258
4259 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4260
4261 tlp_print_media(sc);
4262 }
4263
4264 void
4265 tlp_21040_auibnc_tmsw_init(sc)
4266 struct tulip_softc *sc;
4267 {
4268 static const u_int8_t media[] = {
4269 TULIP_ROM_MB_MEDIA_AUI,
4270 };
4271
4272 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4273 tlp_mediastatus);
4274
4275 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1);
4276
4277 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5);
4278
4279 tlp_print_media(sc);
4280 }
4281
4282 void
4283 tlp_21041_tmsw_init(sc)
4284 struct tulip_softc *sc;
4285 {
4286 static const u_int8_t media[] = {
4287 TULIP_ROM_MB_MEDIA_TP,
4288 TULIP_ROM_MB_MEDIA_TP_FDX,
4289 TULIP_ROM_MB_MEDIA_BNC,
4290 TULIP_ROM_MB_MEDIA_AUI,
4291 };
4292 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt;
4293 const struct tulip_srom_to_ifmedia *tsti;
4294 struct tulip_21x4x_media *tm;
4295 u_int16_t romdef;
4296 u_int8_t mb;
4297
4298 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4299 tlp_mediastatus);
4300
4301 if (tlp_isv_srom(sc->sc_srom) == 0) {
4302 not_isv_srom:
4303 /*
4304 * If we have a board without the standard 21041 SROM format,
4305 * we just assume all media are present and try and pick a
4306 * reasonable default.
4307 */
4308 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4);
4309
4310 /*
4311 * XXX Autosense not yet supported.
4312 */
4313
4314 /* XXX This should be auto-sense. */
4315 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4316
4317 tlp_print_media(sc);
4318 return;
4319 }
4320
4321 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
4322 for (i = 0; i < devcnt; i++) {
4323 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
4324 break;
4325 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
4326 sc->sc_devno)
4327 break;
4328 }
4329
4330 if (i == devcnt)
4331 goto not_isv_srom;
4332
4333 leaf_offset = TULIP_ROM_GETW(sc->sc_srom,
4334 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i));
4335 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE;
4336 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT];
4337
4338 for (; m_cnt != 0;
4339 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) {
4340 mb = sc->sc_srom[mb_offset];
4341 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4342 memset(tm, 0, sizeof(*tm));
4343 switch (mb & TULIP_ROM_MB_MEDIA_CODE) {
4344 case TULIP_ROM_MB_MEDIA_TP_FDX:
4345 case TULIP_ROM_MB_MEDIA_TP:
4346 case TULIP_ROM_MB_MEDIA_BNC:
4347 case TULIP_ROM_MB_MEDIA_AUI:
4348 tsti = tlp_srom_to_ifmedia(mb &
4349 TULIP_ROM_MB_MEDIA_CODE);
4350
4351 tlp_srom_media_info(sc, tsti, tm);
4352
4353 /*
4354 * Override our default SIA settings if the
4355 * SROM contains its own.
4356 */
4357 if (mb & TULIP_ROM_MB_EXT) {
4358 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom,
4359 mb_offset + TULIP_ROM_MB_CSR13);
4360 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom,
4361 mb_offset + TULIP_ROM_MB_CSR14);
4362 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom,
4363 mb_offset + TULIP_ROM_MB_CSR15);
4364 }
4365
4366 ifmedia_add(&sc->sc_mii.mii_media,
4367 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4368 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4369 break;
4370
4371 default:
4372 printf("%s: unknown media code 0x%02x\n",
4373 sc->sc_dev.dv_xname,
4374 mb & TULIP_ROM_MB_MEDIA_CODE);
4375 free(tm, M_DEVBUF);
4376 }
4377 }
4378
4379 /*
4380 * XXX Autosense not yet supported.
4381 */
4382
4383 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset +
4384 TULIP_ROM_IL_SELECT_CONN_TYPE);
4385 switch (romdef) {
4386 case SELECT_CONN_TYPE_TP:
4387 case SELECT_CONN_TYPE_TP_AUTONEG:
4388 case SELECT_CONN_TYPE_TP_NOLINKPASS:
4389 defmedia = IFM_ETHER|IFM_10_T;
4390 break;
4391
4392 case SELECT_CONN_TYPE_TP_FDX:
4393 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX;
4394 break;
4395
4396 case SELECT_CONN_TYPE_BNC:
4397 defmedia = IFM_ETHER|IFM_10_2;
4398 break;
4399
4400 case SELECT_CONN_TYPE_AUI:
4401 defmedia = IFM_ETHER|IFM_10_5;
4402 break;
4403 #if 0 /* XXX */
4404 case SELECT_CONN_TYPE_ASENSE:
4405 case SELECT_CONN_TYPE_ASENSE_AUTONEG:
4406 defmedia = IFM_ETHER|IFM_AUTO;
4407 break;
4408 #endif
4409 default:
4410 defmedia = 0;
4411 }
4412
4413 if (defmedia == 0) {
4414 /*
4415 * XXX We should default to auto-sense.
4416 */
4417 defmedia = IFM_ETHER|IFM_10_T;
4418 }
4419
4420 ifmedia_set(&sc->sc_mii.mii_media, defmedia);
4421
4422 tlp_print_media(sc);
4423 }
4424
4425 /*
4426 * DECchip 2114x ISV media switch.
4427 */
4428 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *));
4429 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
4430 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *));
4431
4432 const struct tulip_mediasw tlp_2114x_isv_mediasw = {
4433 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set
4434 };
4435
4436 void
4437 tlp_2114x_isv_tmsw_init(sc)
4438 struct tulip_softc *sc;
4439 {
4440 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4441 struct ifmedia_entry *ife;
4442 struct mii_softc *phy;
4443 struct tulip_21x4x_media *tm;
4444 const struct tulip_srom_to_ifmedia *tsti;
4445 int i, devcnt, leaf_offset, m_cnt, type, length;
4446 int defmedia, miidef;
4447 u_int16_t word;
4448 u_int8_t *cp, *ncp;
4449
4450 defmedia = miidef = 0;
4451
4452 sc->sc_mii.mii_ifp = ifp;
4453 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
4454 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
4455 sc->sc_mii.mii_statchg = sc->sc_statchg;
4456
4457 /*
4458 * Ignore `instance'; we may get a mixture of SIA and MII
4459 * media, and `instance' is used to isolate or select the
4460 * PHY on the MII as appropriate. Note that duplicate media
4461 * are disallowed, so ignoring `instance' is safe.
4462 */
4463 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange,
4464 tlp_mediastatus);
4465
4466 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
4467 for (i = 0; i < devcnt; i++) {
4468 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
4469 break;
4470 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
4471 sc->sc_devno)
4472 break;
4473 }
4474
4475 if (i == devcnt) {
4476 printf("%s: unable to locate info leaf in SROM\n",
4477 sc->sc_dev.dv_xname);
4478 return;
4479 }
4480
4481 leaf_offset = TULIP_ROM_GETW(sc->sc_srom,
4482 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i));
4483
4484 /* XXX SELECT CONN TYPE */
4485
4486 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT];
4487
4488 /*
4489 * On some chips, the first thing in the Info Leaf is the
4490 * GPIO pin direction data.
4491 */
4492 switch (sc->sc_chip) {
4493 case TULIP_CHIP_21140:
4494 case TULIP_CHIP_21140A:
4495 case TULIP_CHIP_MX98713:
4496 case TULIP_CHIP_AX88140:
4497 case TULIP_CHIP_AX88141:
4498 sc->sc_gp_dir = *cp++;
4499 break;
4500
4501 default:
4502 /* Nothing. */
4503 }
4504
4505 /* Get the media count. */
4506 m_cnt = *cp++;
4507
4508 for (; m_cnt != 0; cp = ncp, m_cnt--) {
4509 /*
4510 * Determine the type and length of this media block.
4511 */
4512 if ((*cp & 0x80) == 0) {
4513 length = 4;
4514 type = TULIP_ROM_MB_21140_GPR;
4515 } else {
4516 length = (*cp++ & 0x7f) - 1;
4517 type = *cp++ & 0x3f;
4518 }
4519
4520 /* Compute the start of the next block. */
4521 ncp = cp + length;
4522
4523 /* Now, parse the block. */
4524 switch (type) {
4525 case TULIP_ROM_MB_21140_GPR:
4526 tlp_get_minst(sc);
4527 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR;
4528
4529 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4530 memset(tm, 0, sizeof(*tm));
4531
4532 tm->tm_type = TULIP_ROM_MB_21140_GPR;
4533 tm->tm_get = tlp_21140_gpio_get;
4534 tm->tm_set = tlp_21140_gpio_set;
4535
4536 /* First is the media type code. */
4537 tsti = tlp_srom_to_ifmedia(cp[0] &
4538 TULIP_ROM_MB_MEDIA_CODE);
4539 if (tsti == NULL) {
4540 /* Invalid media code. */
4541 free(tm, M_DEVBUF);
4542 break;
4543 }
4544
4545 /* Get defaults. */
4546 tlp_srom_media_info(sc, tsti, tm);
4547
4548 /* Next is any GPIO info for this media. */
4549 tm->tm_gpdata = cp[1];
4550
4551 /*
4552 * Next is a word containing OPMODE information
4553 * and info on how to detect if this media is
4554 * active.
4555 */
4556 word = TULIP_ROM_GETW(cp, 2);
4557 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word);
4558 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
4559 tm->tm_actmask =
4560 TULIP_ROM_MB_BITPOS(word);
4561 tm->tm_actdata =
4562 (word & TULIP_ROM_MB_POLARITY) ?
4563 0 : tm->tm_actmask;
4564 }
4565
4566 ifmedia_add(&sc->sc_mii.mii_media,
4567 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4568 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4569 break;
4570
4571 case TULIP_ROM_MB_21140_MII:
4572 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII;
4573
4574 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4575 memset(tm, 0, sizeof(*tm));
4576
4577 tm->tm_type = TULIP_ROM_MB_21140_MII;
4578 tm->tm_get = tlp_mii_getmedia;
4579 tm->tm_set = tlp_mii_setmedia;
4580 tm->tm_opmode = OPMODE_PS;
4581
4582 if (sc->sc_reset == NULL)
4583 sc->sc_reset = tlp_21140_reset;
4584
4585 /* First is the PHY number. */
4586 tm->tm_phyno = *cp++;
4587
4588 /* Next is the MII select sequence length and offset. */
4589 tm->tm_gp_length = *cp++;
4590 tm->tm_gp_offset = cp - &sc->sc_srom[0];
4591 cp += tm->tm_gp_length;
4592
4593 /* Next is the MII reset sequence length and offset. */
4594 tm->tm_reset_length = *cp++;
4595 tm->tm_reset_offset = cp - &sc->sc_srom[0];
4596 cp += tm->tm_reset_length;
4597
4598 /*
4599 * The following items are left in the media block
4600 * that we don't particularly care about:
4601 *
4602 * capabilities W
4603 * advertisement W
4604 * full duplex W
4605 * tx threshold W
4606 *
4607 * These appear to be bits in the PHY registers,
4608 * which our MII code handles on its own.
4609 */
4610
4611 /*
4612 * Before we probe the MII bus, we need to reset
4613 * it and issue the selection sequence.
4614 */
4615
4616 /* Set the direction of the pins... */
4617 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
4618
4619 for (i = 0; i < tm->tm_reset_length; i++) {
4620 delay(10);
4621 TULIP_WRITE(sc, CSR_GPP,
4622 sc->sc_srom[tm->tm_reset_offset + i]);
4623 }
4624
4625 for (i = 0; i < tm->tm_gp_length; i++) {
4626 delay(10);
4627 TULIP_WRITE(sc, CSR_GPP,
4628 sc->sc_srom[tm->tm_gp_offset + i]);
4629 }
4630
4631 /* If there were no sequences, just lower the pins. */
4632 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
4633 delay(10);
4634 TULIP_WRITE(sc, CSR_GPP, 0);
4635 }
4636
4637 /*
4638 * Now, probe the MII for the PHY. Note, we know
4639 * the location of the PHY on the bus, but we don't
4640 * particularly care; the MII code just likes to
4641 * search the whole thing anyhow.
4642 */
4643 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4644 MII_PHY_ANY, tm->tm_phyno, 0);
4645
4646 /*
4647 * Now, search for the PHY we hopefully just
4648 * configured. If it's not configured into the
4649 * kernel, we lose. The PHY's default media always
4650 * takes priority.
4651 */
4652 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys);
4653 phy != NULL;
4654 phy = LIST_NEXT(phy, mii_list))
4655 if (phy->mii_offset == tm->tm_phyno)
4656 break;
4657 if (phy == NULL) {
4658 printf("%s: unable to configure MII\n",
4659 sc->sc_dev.dv_xname);
4660 break;
4661 }
4662
4663 sc->sc_flags |= TULIPF_HAS_MII;
4664 sc->sc_tick = tlp_mii_tick;
4665 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0,
4666 phy->mii_inst);
4667
4668 /*
4669 * Okay, now that we've found the PHY and the MII
4670 * layer has added all of the media associated
4671 * with that PHY, we need to traverse the media
4672 * list, and add our `tm' to each entry's `aux'
4673 * pointer.
4674 *
4675 * We do this by looking for media with our
4676 * PHY's `instance'.
4677 */
4678 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4679 ife != NULL;
4680 ife = TAILQ_NEXT(ife, ifm_list)) {
4681 if (IFM_INST(ife->ifm_media) != phy->mii_inst)
4682 continue;
4683 ife->ifm_aux = tm;
4684 }
4685 break;
4686
4687 case TULIP_ROM_MB_21142_SIA:
4688 tlp_get_minst(sc);
4689 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA;
4690
4691 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4692 memset(tm, 0, sizeof(*tm));
4693
4694 tm->tm_type = TULIP_ROM_MB_21142_SIA;
4695 tm->tm_get = tlp_sia_get;
4696 tm->tm_set = tlp_sia_set;
4697
4698 /* First is the media type code. */
4699 tsti = tlp_srom_to_ifmedia(cp[0] &
4700 TULIP_ROM_MB_MEDIA_CODE);
4701 if (tsti == NULL) {
4702 /* Invalid media code. */
4703 free(tm, M_DEVBUF);
4704 break;
4705 }
4706
4707 /* Get defaults. */
4708 tlp_srom_media_info(sc, tsti, tm);
4709
4710 /*
4711 * Override our default SIA settings if the
4712 * SROM contains its own.
4713 */
4714 if (cp[0] & 0x40) {
4715 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1);
4716 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3);
4717 tm->tm_siagen = TULIP_ROM_GETW(cp, 5);
4718 cp += 7;
4719 } else
4720 cp++;
4721
4722 /* Next is GPIO control/data. */
4723 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0);
4724 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2);
4725
4726 ifmedia_add(&sc->sc_mii.mii_media,
4727 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4728 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4729 break;
4730
4731 case TULIP_ROM_MB_21142_MII:
4732 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII;
4733
4734 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4735 memset(tm, 0, sizeof(*tm));
4736
4737 tm->tm_type = TULIP_ROM_MB_21142_MII;
4738 tm->tm_get = tlp_mii_getmedia;
4739 tm->tm_set = tlp_mii_setmedia;
4740 tm->tm_opmode = OPMODE_PS;
4741
4742 if (sc->sc_reset == NULL)
4743 sc->sc_reset = tlp_21142_reset;
4744
4745 /* First is the PHY number. */
4746 tm->tm_phyno = *cp++;
4747
4748 /* Next is the MII select sequence length and offset. */
4749 tm->tm_gp_length = *cp++;
4750 tm->tm_gp_offset = cp - &sc->sc_srom[0];
4751 cp += tm->tm_gp_length * 2;
4752
4753 /* Next is the MII reset sequence length and offset. */
4754 tm->tm_reset_length = *cp++;
4755 tm->tm_reset_offset = cp - &sc->sc_srom[0];
4756 cp += tm->tm_reset_length * 2;
4757
4758 /*
4759 * The following items are left in the media block
4760 * that we don't particularly care about:
4761 *
4762 * capabilities W
4763 * advertisement W
4764 * full duplex W
4765 * tx threshold W
4766 * MII interrupt W
4767 *
4768 * These appear to be bits in the PHY registers,
4769 * which our MII code handles on its own.
4770 */
4771
4772 /*
4773 * Before we probe the MII bus, we need to reset
4774 * it and issue the selection sequence.
4775 */
4776
4777 ncp = &sc->sc_srom[tm->tm_reset_offset];
4778 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) {
4779 delay(10);
4780 TULIP_WRITE(sc, CSR_SIAGEN,
4781 TULIP_ROM_GETW(ncp, 0) << 16);
4782 }
4783
4784 ncp = &sc->sc_srom[tm->tm_gp_offset];
4785 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) {
4786 delay(10);
4787 TULIP_WRITE(sc, CSR_SIAGEN,
4788 TULIP_ROM_GETW(ncp, 0) << 16);
4789 }
4790
4791 /* If there were no sequences, just lower the pins. */
4792 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
4793 delay(10);
4794 TULIP_WRITE(sc, CSR_SIAGEN, 0);
4795 }
4796
4797 /*
4798 * Now, probe the MII for the PHY. Note, we know
4799 * the location of the PHY on the bus, but we don't
4800 * particularly care; the MII code just likes to
4801 * search the whole thing anyhow.
4802 */
4803 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4804 MII_PHY_ANY, tm->tm_phyno, 0);
4805
4806 /*
4807 * Now, search for the PHY we hopefully just
4808 * configured. If it's not configured into the
4809 * kernel, we lose. The PHY's default media always
4810 * takes priority.
4811 */
4812 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys);
4813 phy != NULL;
4814 phy = LIST_NEXT(phy, mii_list))
4815 if (phy->mii_offset == tm->tm_phyno)
4816 break;
4817 if (phy == NULL) {
4818 printf("%s: unable to configure MII\n",
4819 sc->sc_dev.dv_xname);
4820 break;
4821 }
4822
4823 sc->sc_flags |= TULIPF_HAS_MII;
4824 sc->sc_tick = tlp_mii_tick;
4825 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0,
4826 phy->mii_inst);
4827
4828 /*
4829 * Okay, now that we've found the PHY and the MII
4830 * layer has added all of the media associated
4831 * with that PHY, we need to traverse the media
4832 * list, and add our `tm' to each entry's `aux'
4833 * pointer.
4834 *
4835 * We do this by looking for media with our
4836 * PHY's `instance'.
4837 */
4838 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4839 ife != NULL;
4840 ife = TAILQ_NEXT(ife, ifm_list)) {
4841 if (IFM_INST(ife->ifm_media) != phy->mii_inst)
4842 continue;
4843 ife->ifm_aux = tm;
4844 }
4845 break;
4846
4847 case TULIP_ROM_MB_21143_SYM:
4848 tlp_get_minst(sc);
4849 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM;
4850
4851 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4852 memset(tm, 0, sizeof(*tm));
4853
4854 tm->tm_type = TULIP_ROM_MB_21143_SYM;
4855 tm->tm_get = tlp_sia_get;
4856 tm->tm_set = tlp_sia_set;
4857
4858 /* First is the media type code. */
4859 tsti = tlp_srom_to_ifmedia(cp[0] &
4860 TULIP_ROM_MB_MEDIA_CODE);
4861 if (tsti == NULL) {
4862 /* Invalid media code. */
4863 free(tm, M_DEVBUF);
4864 break;
4865 }
4866
4867 /* Get defaults. */
4868 tlp_srom_media_info(sc, tsti, tm);
4869
4870 /* Next is GPIO control/data. */
4871 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1);
4872 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3);
4873
4874 /*
4875 * Next is a word containing OPMODE information
4876 * and info on how to detect if this media is
4877 * active.
4878 */
4879 word = TULIP_ROM_GETW(cp, 5);
4880 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word);
4881 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
4882 tm->tm_actmask =
4883 TULIP_ROM_MB_BITPOS(word);
4884 tm->tm_actdata =
4885 (word & TULIP_ROM_MB_POLARITY) ?
4886 0 : tm->tm_actmask;
4887 }
4888
4889 ifmedia_add(&sc->sc_mii.mii_media,
4890 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4891 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4892 break;
4893
4894 case TULIP_ROM_MB_21143_RESET:
4895 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname);
4896 break;
4897
4898 default:
4899 printf("%s: unknown ISV media block type 0x%02x\n",
4900 sc->sc_dev.dv_xname, type);
4901 }
4902 }
4903
4904 /*
4905 * Deal with the case where no media is configured.
4906 */
4907 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) {
4908 printf("%s: no media found!\n", sc->sc_dev.dv_xname);
4909 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
4910 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
4911 return;
4912 }
4913
4914 /*
4915 * Pick the default media.
4916 */
4917 if (miidef != 0)
4918 defmedia = miidef;
4919 else {
4920 /*
4921 * XXX Pick a better default. Should come from SROM
4922 * XXX on 21140[A], and should be "auto" on 21142,
4923 * XXX 21143, and Macronix chips.
4924 */
4925 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0);
4926 }
4927
4928 ifmedia_set(&sc->sc_mii.mii_media, defmedia);
4929
4930 /*
4931 * Display any non-MII media we've located.
4932 */
4933 if (sc->sc_media_seen &
4934 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII)))
4935 tlp_print_media(sc);
4936
4937 tlp_sia_fixup(sc);
4938 }
4939
4940 void
4941 tlp_2114x_isv_tmsw_get(sc, ifmr)
4942 struct tulip_softc *sc;
4943 struct ifmediareq *ifmr;
4944 {
4945 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
4946 struct tulip_21x4x_media *tm = ife->ifm_aux;
4947
4948 /*
4949 * We might be polling a non-MII autosense; check for that.
4950 */
4951 if (tm == NULL) {
4952 #ifdef DIAGNOSTIC
4953 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
4954 panic("tlp_2114x_isv_tmsw_get");
4955 #endif
4956 tm = sc->sc_nway_active->ifm_aux;
4957 }
4958
4959 (*tm->tm_get)(sc, ifmr);
4960 }
4961
4962 int
4963 tlp_2114x_isv_tmsw_set(sc)
4964 struct tulip_softc *sc;
4965 {
4966 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
4967 struct tulip_21x4x_media *tm = ife->ifm_aux;
4968
4969 /*
4970 * We might be setting a non-MII autosense; check for that.
4971 */
4972 if (tm == NULL) {
4973 #ifdef DIAGNOSTIC
4974 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
4975 panic("tlp_2114x_isv_tmsw_set");
4976 #endif
4977 /* XXX XXX XXX */
4978 }
4979
4980 /*
4981 * Check to see if we need to reset the chip, and do it. The
4982 * reset path will get the OPMODE register right the next
4983 * time through.
4984 */
4985 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode))
4986 return (tlp_init(sc));
4987
4988 return ((*tm->tm_set)(sc));
4989 }
4990
4991 /*
4992 * MII-on-SIO media switch. Handles only MII attached to the SIO.
4993 */
4994 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *));
4995
4996 const struct tulip_mediasw tlp_sio_mii_mediasw = {
4997 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
4998 };
4999
5000 void
5001 tlp_sio_mii_tmsw_init(sc)
5002 struct tulip_softc *sc;
5003 {
5004 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5005
5006 /*
5007 * We don't attach any media info structures to the ifmedia
5008 * entries, so if we're using a pre-init function that needs
5009 * that info, override it to one that doesn't.
5010 */
5011 if (sc->sc_preinit == tlp_2114x_preinit)
5012 sc->sc_preinit = tlp_2114x_mii_preinit;
5013
5014 sc->sc_mii.mii_ifp = ifp;
5015 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5016 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5017 sc->sc_mii.mii_statchg = sc->sc_statchg;
5018 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5019 tlp_mediastatus);
5020 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5021 MII_OFFSET_ANY, 0);
5022 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5023 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5024 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5025 } else {
5026 sc->sc_flags |= TULIPF_HAS_MII;
5027 sc->sc_tick = tlp_mii_tick;
5028 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5029 }
5030 }
5031
5032 /*
5033 * Lite-On PNIC media switch. Must handle MII or internal NWAY.
5034 */
5035 void tlp_pnic_tmsw_init __P((struct tulip_softc *));
5036 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
5037 int tlp_pnic_tmsw_set __P((struct tulip_softc *));
5038
5039 const struct tulip_mediasw tlp_pnic_mediasw = {
5040 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set
5041 };
5042
5043 void tlp_pnic_nway_statchg __P((struct device *));
5044 void tlp_pnic_nway_tick __P((void *));
5045 int tlp_pnic_nway_service __P((struct tulip_softc *, int));
5046 void tlp_pnic_nway_reset __P((struct tulip_softc *));
5047 int tlp_pnic_nway_auto __P((struct tulip_softc *, int));
5048 void tlp_pnic_nway_auto_timeout __P((void *));
5049 void tlp_pnic_nway_status __P((struct tulip_softc *));
5050 void tlp_pnic_nway_acomp __P((struct tulip_softc *));
5051
5052 void
5053 tlp_pnic_tmsw_init(sc)
5054 struct tulip_softc *sc;
5055 {
5056 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5057 const char *sep = "";
5058
5059 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL)
5060 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
5061
5062 sc->sc_mii.mii_ifp = ifp;
5063 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg;
5064 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg;
5065 sc->sc_mii.mii_statchg = sc->sc_statchg;
5066 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5067 tlp_mediastatus);
5068 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5069 MII_OFFSET_ANY, 0);
5070 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5071 /* XXX What about AUI/BNC support? */
5072 printf("%s: ", sc->sc_dev.dv_xname);
5073
5074 tlp_pnic_nway_reset(sc);
5075
5076 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0),
5077 PNIC_NWAY_TW|PNIC_NWAY_CAP10T);
5078 PRINT("10baseT");
5079
5080 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0),
5081 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX);
5082 PRINT("10baseT-FDX");
5083
5084 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
5085 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX);
5086 PRINT("100baseTX");
5087
5088 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0),
5089 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD|
5090 PNIC_NWAY_CAP100TXFDX);
5091 PRINT("100baseTX-FDX");
5092
5093 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0),
5094 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW|
5095 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX|
5096 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX);
5097 PRINT("auto");
5098
5099 printf("\n");
5100
5101 sc->sc_statchg = tlp_pnic_nway_statchg;
5102 sc->sc_tick = tlp_pnic_nway_tick;
5103 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5104 } else {
5105 sc->sc_flags |= TULIPF_HAS_MII;
5106 sc->sc_tick = tlp_mii_tick;
5107 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5108 }
5109
5110 #undef ADD
5111 #undef PRINT
5112 }
5113
5114 void
5115 tlp_pnic_tmsw_get(sc, ifmr)
5116 struct tulip_softc *sc;
5117 struct ifmediareq *ifmr;
5118 {
5119 struct mii_data *mii = &sc->sc_mii;
5120
5121 if (sc->sc_flags & TULIPF_HAS_MII)
5122 tlp_mii_getmedia(sc, ifmr);
5123 else {
5124 mii->mii_media_status = 0;
5125 mii->mii_media_active = IFM_NONE;
5126 tlp_pnic_nway_service(sc, MII_POLLSTAT);
5127 ifmr->ifm_status = sc->sc_mii.mii_media_status;
5128 ifmr->ifm_active = sc->sc_mii.mii_media_active;
5129 }
5130 }
5131
5132 int
5133 tlp_pnic_tmsw_set(sc)
5134 struct tulip_softc *sc;
5135 {
5136 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5137 struct mii_data *mii = &sc->sc_mii;
5138
5139 if (sc->sc_flags & TULIPF_HAS_MII) {
5140 /*
5141 * Make sure the built-in Tx jabber timer is disabled.
5142 */
5143 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS);
5144
5145 return (tlp_mii_setmedia(sc));
5146 }
5147
5148 if (ifp->if_flags & IFF_UP) {
5149 mii->mii_media_status = 0;
5150 mii->mii_media_active = IFM_NONE;
5151 return (tlp_pnic_nway_service(sc, MII_MEDIACHG));
5152 }
5153
5154 return (0);
5155 }
5156
5157 void
5158 tlp_pnic_nway_statchg(self)
5159 struct device *self;
5160 {
5161 struct tulip_softc *sc = (struct tulip_softc *)self;
5162
5163 /* Idle the transmit and receive processes. */
5164 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
5165
5166 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS|
5167 OPMODE_SCR|OPMODE_HBD);
5168
5169 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) {
5170 sc->sc_opmode |= OPMODE_TTM;
5171 TULIP_WRITE(sc, CSR_GPP,
5172 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) |
5173 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1));
5174 } else {
5175 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD;
5176 TULIP_WRITE(sc, CSR_GPP,
5177 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) |
5178 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1));
5179 }
5180
5181 if (sc->sc_mii.mii_media_active & IFM_FDX)
5182 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD;
5183
5184 /*
5185 * Write new OPMODE bits. This also restarts the transmit
5186 * and receive processes.
5187 */
5188 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
5189 }
5190
5191 void
5192 tlp_pnic_nway_tick(arg)
5193 void *arg;
5194 {
5195 struct tulip_softc *sc = arg;
5196 int s;
5197
5198 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
5199 return;
5200
5201 s = splnet();
5202 tlp_pnic_nway_service(sc, MII_TICK);
5203 splx(s);
5204
5205 callout_reset(&sc->sc_tick_callout, hz, tlp_pnic_nway_tick, sc);
5206 }
5207
5208 /*
5209 * Support for the Lite-On PNIC internal NWay block. This is constructed
5210 * somewhat like a PHY driver for simplicity.
5211 */
5212
5213 int
5214 tlp_pnic_nway_service(sc, cmd)
5215 struct tulip_softc *sc;
5216 int cmd;
5217 {
5218 struct mii_data *mii = &sc->sc_mii;
5219 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
5220
5221 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
5222 return (0);
5223
5224 switch (cmd) {
5225 case MII_POLLSTAT:
5226 /* Nothing special to do here. */
5227 break;
5228
5229 case MII_MEDIACHG:
5230 switch (IFM_SUBTYPE(ife->ifm_media)) {
5231 case IFM_AUTO:
5232 (void) tlp_pnic_nway_auto(sc, 1);
5233 break;
5234 case IFM_100_T4:
5235 /*
5236 * XXX Not supported as a manual setting right now.
5237 */
5238 return (EINVAL);
5239 default:
5240 /*
5241 * NWAY register data is stored in the ifmedia entry.
5242 */
5243 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
5244 }
5245 break;
5246
5247 case MII_TICK:
5248 /*
5249 * Only used for autonegotiation.
5250 */
5251 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
5252 return (0);
5253
5254 /*
5255 * Check to see if we have link. If we do, we don't
5256 * need to restart the autonegotiation process.
5257 */
5258 if (sc->sc_flags & TULIPF_LINK_UP)
5259 return (0);
5260
5261 /*
5262 * Only retry autonegotiation every 5 seconds.
5263 */
5264 if (++sc->sc_nway_ticks != 5)
5265 return (0);
5266
5267 sc->sc_nway_ticks = 0;
5268 tlp_pnic_nway_reset(sc);
5269 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN)
5270 return (0);
5271 break;
5272 }
5273
5274 /* Update the media status. */
5275 tlp_pnic_nway_status(sc);
5276
5277 /* Callback if something changed. */
5278 if ((sc->sc_nway_active == NULL ||
5279 sc->sc_nway_active->ifm_media != mii->mii_media_active) ||
5280 cmd == MII_MEDIACHG) {
5281 (*sc->sc_statchg)(&sc->sc_dev);
5282 tlp_nway_activate(sc, mii->mii_media_active);
5283 }
5284 return (0);
5285 }
5286
5287 void
5288 tlp_pnic_nway_reset(sc)
5289 struct tulip_softc *sc;
5290 {
5291
5292 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS);
5293 delay(100);
5294 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0);
5295 }
5296
5297 int
5298 tlp_pnic_nway_auto(sc, waitfor)
5299 struct tulip_softc *sc;
5300 int waitfor;
5301 {
5302 struct mii_data *mii = &sc->sc_mii;
5303 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
5304 u_int32_t reg;
5305 int i;
5306
5307 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0)
5308 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
5309
5310 if (waitfor) {
5311 /* Wait 500ms for it to complete. */
5312 for (i = 0; i < 500; i++) {
5313 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5314 if (reg & PNIC_NWAY_LPAR_MASK) {
5315 tlp_pnic_nway_acomp(sc);
5316 return (0);
5317 }
5318 delay(1000);
5319 }
5320 #if 0
5321 if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
5322 printf("%s: autonegotiation failed to complete\n",
5323 sc->sc_dev.dv_xname);
5324 #endif
5325
5326 /*
5327 * Don't need to worry about clearing DOINGAUTO.
5328 * If that's set, a timeout is pending, and it will
5329 * clear the flag.
5330 */
5331 return (EIO);
5332 }
5333
5334 /*
5335 * Just let it finish asynchronously. This is for the benefit of
5336 * the tick handler driving autonegotiation. Don't want 500ms
5337 * delays all the time while the system is running!
5338 */
5339 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) {
5340 sc->sc_flags |= TULIPF_DOINGAUTO;
5341 callout_reset(&sc->sc_nway_callout, hz >> 1,
5342 tlp_pnic_nway_auto_timeout, sc);
5343 }
5344 return (EJUSTRETURN);
5345 }
5346
5347 void
5348 tlp_pnic_nway_auto_timeout(arg)
5349 void *arg;
5350 {
5351 struct tulip_softc *sc = arg;
5352 u_int32_t reg;
5353 int s;
5354
5355 s = splnet();
5356 sc->sc_flags &= ~TULIPF_DOINGAUTO;
5357 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5358 #if 0
5359 if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
5360 printf("%s: autonegotiation failed to complete\n",
5361 sc->sc_dev.dv_xname);
5362 #endif
5363
5364 tlp_pnic_nway_acomp(sc);
5365
5366 /* Update the media status. */
5367 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT);
5368 splx(s);
5369 }
5370
5371 void
5372 tlp_pnic_nway_status(sc)
5373 struct tulip_softc *sc;
5374 {
5375 struct mii_data *mii = &sc->sc_mii;
5376 u_int32_t reg;
5377
5378 mii->mii_media_status = IFM_AVALID;
5379 mii->mii_media_active = IFM_ETHER;
5380
5381 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5382
5383 if (sc->sc_flags & TULIPF_LINK_UP)
5384 mii->mii_media_status |= IFM_ACTIVE;
5385
5386 if (reg & PNIC_NWAY_NW) {
5387 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) {
5388 /* Erg, still trying, I guess... */
5389 mii->mii_media_active |= IFM_NONE;
5390 return;
5391 }
5392
5393 #if 0
5394 if (reg & PNIC_NWAY_LPAR100T4)
5395 mii->mii_media_active |= IFM_100_T4;
5396 else
5397 #endif
5398 if (reg & PNIC_NWAY_LPAR100TXFDX)
5399 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
5400 else if (reg & PNIC_NWAY_LPAR100TX)
5401 mii->mii_media_active |= IFM_100_TX;
5402 else if (reg & PNIC_NWAY_LPAR10TFDX)
5403 mii->mii_media_active |= IFM_10_T|IFM_FDX;
5404 else if (reg & PNIC_NWAY_LPAR10T)
5405 mii->mii_media_active |= IFM_10_T;
5406 else
5407 mii->mii_media_active |= IFM_NONE;
5408 } else {
5409 if (reg & PNIC_NWAY_100)
5410 mii->mii_media_active |= IFM_100_TX;
5411 else
5412 mii->mii_media_active |= IFM_10_T;
5413 if (reg & PNIC_NWAY_FD)
5414 mii->mii_media_active |= IFM_FDX;
5415 }
5416 }
5417
5418 void
5419 tlp_pnic_nway_acomp(sc)
5420 struct tulip_softc *sc;
5421 {
5422 u_int32_t reg;
5423
5424 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5425 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN);
5426
5427 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX))
5428 reg |= PNIC_NWAY_100;
5429 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX))
5430 reg |= PNIC_NWAY_FD;
5431
5432 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg);
5433 }
5434
5435 /*
5436 * Macronix PMAC and Lite-On PNIC-II media switch:
5437 *
5438 * MX98713 and MX98713A 21140-like MII or GPIO media.
5439 *
5440 * MX98713A 21143-like MII or SIA/SYM media.
5441 *
5442 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media.
5443 * 82C115
5444 *
5445 * So, what we do here is fake MII-on-SIO or ISV media info, and
5446 * use the ISV media switch get/set functions to handle the rest.
5447 */
5448
5449 void tlp_pmac_tmsw_init __P((struct tulip_softc *));
5450
5451 const struct tulip_mediasw tlp_pmac_mediasw = {
5452 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set
5453 };
5454
5455 const struct tulip_mediasw tlp_pmac_mii_mediasw = {
5456 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5457 };
5458
5459 void
5460 tlp_pmac_tmsw_init(sc)
5461 struct tulip_softc *sc;
5462 {
5463 static const u_int8_t media[] = {
5464 TULIP_ROM_MB_MEDIA_TP,
5465 TULIP_ROM_MB_MEDIA_TP_FDX,
5466 TULIP_ROM_MB_MEDIA_100TX,
5467 TULIP_ROM_MB_MEDIA_100TX_FDX,
5468 };
5469 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5470
5471 sc->sc_mii.mii_ifp = ifp;
5472 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5473 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5474 sc->sc_mii.mii_statchg = sc->sc_statchg;
5475 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5476 tlp_mediastatus);
5477 if (sc->sc_chip == TULIP_CHIP_MX98713 ||
5478 sc->sc_chip == TULIP_CHIP_MX98713A) {
5479 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
5480 MII_PHY_ANY, MII_OFFSET_ANY, 0);
5481 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) {
5482 sc->sc_flags |= TULIPF_HAS_MII;
5483 sc->sc_tick = tlp_mii_tick;
5484 sc->sc_preinit = tlp_2114x_mii_preinit;
5485 sc->sc_mediasw = &tlp_pmac_mii_mediasw;
5486 ifmedia_set(&sc->sc_mii.mii_media,
5487 IFM_ETHER|IFM_AUTO);
5488 return;
5489 }
5490 }
5491
5492 switch (sc->sc_chip) {
5493 case TULIP_CHIP_MX98713:
5494 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR,
5495 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4);
5496
5497 /*
5498 * XXX Should implement auto-sense for this someday,
5499 * XXX when we do the same for the 21140.
5500 */
5501 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
5502 break;
5503
5504 default:
5505 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA,
5506 tlp_sia_get, tlp_sia_set, media, 2);
5507 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM,
5508 tlp_sia_get, tlp_sia_set, media + 2, 2);
5509
5510 /*
5511 * XXX Autonegotiation not yet supported.
5512 */
5513 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
5514 break;
5515 }
5516
5517 tlp_print_media(sc);
5518 tlp_sia_fixup(sc);
5519
5520 /* Set the LED modes. */
5521 tlp_pmac_reset(sc);
5522
5523 sc->sc_reset = tlp_pmac_reset;
5524 }
5525
5526 /*
5527 * ADMtek AL981 media switch. Only has internal PHY.
5528 */
5529 void tlp_al981_tmsw_init __P((struct tulip_softc *));
5530
5531 const struct tulip_mediasw tlp_al981_mediasw = {
5532 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5533 };
5534
5535 void
5536 tlp_al981_tmsw_init(sc)
5537 struct tulip_softc *sc;
5538 {
5539 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5540
5541 sc->sc_mii.mii_ifp = ifp;
5542 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg;
5543 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg;
5544 sc->sc_mii.mii_statchg = sc->sc_statchg;
5545 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5546 tlp_mediastatus);
5547 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5548 MII_OFFSET_ANY, 0);
5549 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5550 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5551 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5552 } else {
5553 sc->sc_flags |= TULIPF_HAS_MII;
5554 sc->sc_tick = tlp_mii_tick;
5555 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5556 }
5557 }
5558
5559 /*
5560 * Davicom DM9102 media switch. Internal PHY and possibly HomePNA.
5561 */
5562 void tlp_dm9102_tmsw_init __P((struct tulip_softc *));
5563 void tlp_dm9102_tmsw_getmedia __P((struct tulip_softc *,
5564 struct ifmediareq *));
5565 int tlp_dm9102_tmsw_setmedia __P((struct tulip_softc *));
5566
5567 const struct tulip_mediasw tlp_dm9102_mediasw = {
5568 tlp_dm9102_tmsw_init, tlp_dm9102_tmsw_getmedia,
5569 tlp_dm9102_tmsw_setmedia
5570 };
5571
5572 void
5573 tlp_dm9102_tmsw_init(sc)
5574 struct tulip_softc *sc;
5575 {
5576 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5577 u_int32_t opmode;
5578
5579 sc->sc_mii.mii_ifp = ifp;
5580 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5581 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5582 sc->sc_mii.mii_statchg = sc->sc_statchg;
5583 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5584 tlp_mediastatus);
5585
5586 /* PHY block already reset via tlp_reset(). */
5587
5588 /*
5589 * Configure OPMODE properly for the internal MII interface.
5590 */
5591 switch (sc->sc_chip) {
5592 case TULIP_CHIP_DM9102:
5593 opmode = OPMODE_MBO|OPMODE_HBD|OPMODE_PS;
5594 break;
5595
5596 case TULIP_CHIP_DM9102A:
5597 opmode = OPMODE_MBO|OPMODE_HBD;
5598 break;
5599
5600 default:
5601 /* Nothing. */
5602 }
5603
5604 TULIP_WRITE(sc, CSR_OPMODE, opmode);
5605
5606 /* Now, probe the internal MII for the internal PHY. */
5607 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5608 MII_OFFSET_ANY, 0);
5609
5610 /*
5611 * XXX Figure out what to do about the HomePNA portion
5612 * XXX of the DM9102A.
5613 */
5614
5615 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5616 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5617 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5618 } else {
5619 sc->sc_flags |= TULIPF_HAS_MII;
5620 sc->sc_tick = tlp_mii_tick;
5621 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5622 }
5623 }
5624
5625 void
5626 tlp_dm9102_tmsw_getmedia(sc, ifmr)
5627 struct tulip_softc *sc;
5628 struct ifmediareq *ifmr;
5629 {
5630
5631 /* XXX HomePNA on DM9102A. */
5632 tlp_mii_getmedia(sc, ifmr);
5633 }
5634
5635 int
5636 tlp_dm9102_tmsw_setmedia(sc)
5637 struct tulip_softc *sc;
5638 {
5639
5640 /* XXX HomePNA on DM9102A. */
5641 return (tlp_mii_setmedia(sc));
5642 }
5643