tulip.c revision 1.72
1 /* $NetBSD: tulip.c,v 1.72 2000/10/01 23:32:43 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/callout.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <machine/endian.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <net/if.h> 65 #include <net/if_dl.h> 66 #include <net/if_media.h> 67 #include <net/if_ether.h> 68 69 #if NBPFILTER > 0 70 #include <net/bpf.h> 71 #endif 72 73 #ifdef INET 74 #include <netinet/in.h> 75 #include <netinet/if_inarp.h> 76 #endif 77 78 #ifdef NS 79 #include <netns/ns.h> 80 #include <netns/ns_if.h> 81 #endif 82 83 #include <machine/bus.h> 84 #include <machine/intr.h> 85 86 #include <dev/mii/mii.h> 87 #include <dev/mii/miivar.h> 88 #include <dev/mii/mii_bitbang.h> 89 90 #include <dev/ic/tulipreg.h> 91 #include <dev/ic/tulipvar.h> 92 93 const char *tlp_chip_names[] = TULIP_CHIP_NAMES; 94 95 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = 96 TLP_TXTHRESH_TAB_10; 97 98 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = 99 TLP_TXTHRESH_TAB_10_100; 100 101 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = 102 TLP_TXTHRESH_TAB_WINB; 103 104 const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] = 105 TLP_TXTHRESH_TAB_DM9102; 106 107 void tlp_start __P((struct ifnet *)); 108 void tlp_watchdog __P((struct ifnet *)); 109 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 110 111 void tlp_shutdown __P((void *)); 112 113 void tlp_reset __P((struct tulip_softc *)); 114 int tlp_init __P((struct tulip_softc *)); 115 void tlp_rxdrain __P((struct tulip_softc *)); 116 void tlp_stop __P((struct tulip_softc *, int)); 117 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 118 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 119 void tlp_srom_idle __P((struct tulip_softc *)); 120 int tlp_srom_size __P((struct tulip_softc *)); 121 122 int tlp_enable __P((struct tulip_softc *)); 123 void tlp_disable __P((struct tulip_softc *)); 124 void tlp_power __P((int, void *)); 125 126 void tlp_filter_setup __P((struct tulip_softc *)); 127 void tlp_winb_filter_setup __P((struct tulip_softc *)); 128 void tlp_al981_filter_setup __P((struct tulip_softc *)); 129 130 void tlp_rxintr __P((struct tulip_softc *)); 131 void tlp_txintr __P((struct tulip_softc *)); 132 133 void tlp_mii_tick __P((void *)); 134 void tlp_mii_statchg __P((struct device *)); 135 void tlp_winb_mii_statchg __P((struct device *)); 136 void tlp_dm9102_mii_statchg __P((struct device *)); 137 138 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 139 int tlp_mii_setmedia __P((struct tulip_softc *)); 140 141 int tlp_bitbang_mii_readreg __P((struct device *, int, int)); 142 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int)); 143 144 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 145 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 146 147 int tlp_al981_mii_readreg __P((struct device *, int, int)); 148 void tlp_al981_mii_writereg __P((struct device *, int, int, int)); 149 150 void tlp_2114x_preinit __P((struct tulip_softc *)); 151 void tlp_2114x_mii_preinit __P((struct tulip_softc *)); 152 void tlp_pnic_preinit __P((struct tulip_softc *)); 153 void tlp_dm9102_preinit __P((struct tulip_softc *)); 154 155 void tlp_21140_reset __P((struct tulip_softc *)); 156 void tlp_21142_reset __P((struct tulip_softc *)); 157 void tlp_pmac_reset __P((struct tulip_softc *)); 158 void tlp_dm9102_reset __P((struct tulip_softc *)); 159 160 #define tlp_mchash(addr, sz) \ 161 (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1)) 162 163 /* 164 * MII bit-bang glue. 165 */ 166 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *)); 167 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t)); 168 169 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = { 170 tlp_sio_mii_bitbang_read, 171 tlp_sio_mii_bitbang_write, 172 { 173 MIIROM_MDO, /* MII_BIT_MDO */ 174 MIIROM_MDI, /* MII_BIT_MDI */ 175 MIIROM_MDC, /* MII_BIT_MDC */ 176 0, /* MII_BIT_DIR_HOST_PHY */ 177 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */ 178 } 179 }; 180 181 #ifdef TLP_DEBUG 182 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 183 printf x 184 #else 185 #define DPRINTF(sc, x) /* nothing */ 186 #endif 187 188 #ifdef TLP_STATS 189 void tlp_print_stats __P((struct tulip_softc *)); 190 #endif 191 192 /* 193 * Can be used to debug the SROM-related things, including contents. 194 * Initialized so that it's patchable. 195 */ 196 int tlp_srom_debug = 0; 197 198 /* 199 * tlp_attach: 200 * 201 * Attach a Tulip interface to the system. 202 */ 203 void 204 tlp_attach(sc, enaddr) 205 struct tulip_softc *sc; 206 const u_int8_t *enaddr; 207 { 208 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 209 int i, error; 210 211 callout_init(&sc->sc_nway_callout); 212 callout_init(&sc->sc_tick_callout); 213 214 /* 215 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 216 */ 217 218 /* 219 * Setup the transmit threshold table. 220 */ 221 switch (sc->sc_chip) { 222 case TULIP_CHIP_DE425: 223 case TULIP_CHIP_21040: 224 case TULIP_CHIP_21041: 225 sc->sc_txth = tlp_10_txthresh_tab; 226 break; 227 228 case TULIP_CHIP_DM9102: 229 case TULIP_CHIP_DM9102A: 230 sc->sc_txth = tlp_dm9102_txthresh_tab; 231 break; 232 233 default: 234 sc->sc_txth = tlp_10_100_txthresh_tab; 235 break; 236 } 237 238 /* 239 * Setup the filter setup function. 240 */ 241 switch (sc->sc_chip) { 242 case TULIP_CHIP_WB89C840F: 243 sc->sc_filter_setup = tlp_winb_filter_setup; 244 break; 245 246 case TULIP_CHIP_AL981: 247 sc->sc_filter_setup = tlp_al981_filter_setup; 248 break; 249 250 default: 251 sc->sc_filter_setup = tlp_filter_setup; 252 break; 253 } 254 255 /* 256 * Set up the media status change function. 257 */ 258 switch (sc->sc_chip) { 259 case TULIP_CHIP_WB89C840F: 260 sc->sc_statchg = tlp_winb_mii_statchg; 261 break; 262 263 case TULIP_CHIP_DM9102: 264 case TULIP_CHIP_DM9102A: 265 sc->sc_statchg = tlp_dm9102_mii_statchg; 266 break; 267 268 default: 269 /* 270 * We may override this if we have special media 271 * handling requirements (e.g. flipping GPIO pins). 272 * 273 * The pure-MII statchg function covers the basics. 274 */ 275 sc->sc_statchg = tlp_mii_statchg; 276 break; 277 } 278 279 /* 280 * Default to no FS|LS in setup packet descriptors. They're 281 * supposed to be zero according to the 21040 and 21143 282 * manuals, and some chips fall over badly if they're 283 * included. Yet, other chips seem to require them. Sigh. 284 */ 285 switch (sc->sc_chip) { 286 case TULIP_CHIP_X3201_3: 287 sc->sc_setup_fsls = TDCTL_Tx_FS|TDCTL_Tx_LS; 288 break; 289 290 default: 291 sc->sc_setup_fsls = 0; 292 } 293 294 /* 295 * Set up various chip-specific quirks. 296 * 297 * Note that wherever we can, we use the "ring" option for 298 * transmit and receive descriptors. This is because some 299 * clone chips apparently have problems when using chaining, 300 * although some *only* support chaining. 301 * 302 * What we do is always program the "next" pointer, and then 303 * conditionally set the TDCTL_CH and TDCTL_ER bits in the 304 * appropriate places. 305 */ 306 switch (sc->sc_chip) { 307 case TULIP_CHIP_21140: 308 case TULIP_CHIP_21140A: 309 case TULIP_CHIP_21142: 310 case TULIP_CHIP_21143: 311 case TULIP_CHIP_82C115: /* 21143-like */ 312 case TULIP_CHIP_MX98713: /* 21140-like */ 313 case TULIP_CHIP_MX98713A: /* 21143-like */ 314 case TULIP_CHIP_MX98715: /* 21143-like */ 315 case TULIP_CHIP_MX98715A: /* 21143-like */ 316 case TULIP_CHIP_MX98715AEC_X: /* 21143-like */ 317 case TULIP_CHIP_MX98725: /* 21143-like */ 318 /* 319 * Run these chips in ring mode. 320 */ 321 sc->sc_tdctl_ch = 0; 322 sc->sc_tdctl_er = TDCTL_ER; 323 sc->sc_preinit = tlp_2114x_preinit; 324 break; 325 326 case TULIP_CHIP_82C168: 327 case TULIP_CHIP_82C169: 328 /* 329 * Run these chips in ring mode. 330 */ 331 sc->sc_tdctl_ch = 0; 332 sc->sc_tdctl_er = TDCTL_ER; 333 sc->sc_preinit = tlp_pnic_preinit; 334 335 /* 336 * These chips seem to have busted DMA engines; just put them 337 * in Store-and-Forward mode from the get-go. 338 */ 339 sc->sc_txthresh = TXTH_SF; 340 break; 341 342 case TULIP_CHIP_WB89C840F: 343 /* 344 * Run this chip in chained mode. 345 */ 346 sc->sc_tdctl_ch = TDCTL_CH; 347 sc->sc_tdctl_er = 0; 348 sc->sc_flags |= TULIPF_IC_FS; 349 break; 350 351 case TULIP_CHIP_DM9102: 352 case TULIP_CHIP_DM9102A: 353 /* 354 * Run these chips in chained mode. 355 */ 356 sc->sc_tdctl_ch = TDCTL_CH; 357 sc->sc_tdctl_er = 0; 358 sc->sc_preinit = tlp_dm9102_preinit; 359 360 /* 361 * These chips have a broken bus interface, so we 362 * can't use any optimized bus commands. For this 363 * reason, we tend to underrun pretty quickly, so 364 * just to Store-and-Forward mode from the get-go. 365 */ 366 sc->sc_txthresh = TXTH_DM9102_SF; 367 break; 368 369 default: 370 /* 371 * Default to running in ring mode. 372 */ 373 sc->sc_tdctl_ch = 0; 374 sc->sc_tdctl_er = TDCTL_ER; 375 } 376 377 /* 378 * Set up the MII bit-bang operations. 379 */ 380 switch (sc->sc_chip) { 381 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */ 382 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 383 break; 384 385 default: 386 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 387 } 388 389 SIMPLEQ_INIT(&sc->sc_txfreeq); 390 SIMPLEQ_INIT(&sc->sc_txdirtyq); 391 392 /* 393 * Allocate the control data structures, and create and load the 394 * DMA map for it. 395 */ 396 if ((error = bus_dmamem_alloc(sc->sc_dmat, 397 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg, 398 1, &sc->sc_cdnseg, 0)) != 0) { 399 printf("%s: unable to allocate control data, error = %d\n", 400 sc->sc_dev.dv_xname, error); 401 goto fail_0; 402 } 403 404 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg, 405 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 406 BUS_DMA_COHERENT)) != 0) { 407 printf("%s: unable to map control data, error = %d\n", 408 sc->sc_dev.dv_xname, error); 409 goto fail_1; 410 } 411 412 if ((error = bus_dmamap_create(sc->sc_dmat, 413 sizeof(struct tulip_control_data), 1, 414 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 415 printf("%s: unable to create control data DMA map, " 416 "error = %d\n", sc->sc_dev.dv_xname, error); 417 goto fail_2; 418 } 419 420 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 421 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 422 0)) != 0) { 423 printf("%s: unable to load control data DMA map, error = %d\n", 424 sc->sc_dev.dv_xname, error); 425 goto fail_3; 426 } 427 428 /* 429 * Create the transmit buffer DMA maps. 430 * 431 * Note that on the Xircom clone, transmit buffers must be 432 * 4-byte aligned. We're almost guaranteed to have to copy 433 * the packet in that case, so we just limit ourselves to 434 * one segment. 435 * 436 * On the DM9102, the transmit logic can only handle one 437 * DMA segment. 438 */ 439 switch (sc->sc_chip) { 440 case TULIP_CHIP_X3201_3: 441 case TULIP_CHIP_DM9102: 442 case TULIP_CHIP_DM9102A: 443 sc->sc_ntxsegs = 1; 444 break; 445 446 default: 447 sc->sc_ntxsegs = TULIP_NTXSEGS; 448 } 449 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 450 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 451 sc->sc_ntxsegs, MCLBYTES, 0, 0, 452 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 453 printf("%s: unable to create tx DMA map %d, " 454 "error = %d\n", sc->sc_dev.dv_xname, i, error); 455 goto fail_4; 456 } 457 } 458 459 /* 460 * Create the recieve buffer DMA maps. 461 */ 462 for (i = 0; i < TULIP_NRXDESC; i++) { 463 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 464 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 465 printf("%s: unable to create rx DMA map %d, " 466 "error = %d\n", sc->sc_dev.dv_xname, i, error); 467 goto fail_5; 468 } 469 sc->sc_rxsoft[i].rxs_mbuf = NULL; 470 } 471 472 /* 473 * From this point forward, the attachment cannot fail. A failure 474 * before this point releases all resources that may have been 475 * allocated. 476 */ 477 sc->sc_flags |= TULIPF_ATTACHED; 478 479 /* 480 * Reset the chip to a known state. 481 */ 482 tlp_reset(sc); 483 484 /* Announce ourselves. */ 485 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 486 sc->sc_name[0] != '\0' ? sc->sc_name : "", 487 sc->sc_name[0] != '\0' ? ", " : "", 488 ether_sprintf(enaddr)); 489 490 /* 491 * Initialize our media structures. This may probe the MII, if 492 * present. 493 */ 494 (*sc->sc_mediasw->tmsw_init)(sc); 495 496 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 497 ifp->if_softc = sc; 498 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 499 ifp->if_ioctl = tlp_ioctl; 500 ifp->if_start = tlp_start; 501 ifp->if_watchdog = tlp_watchdog; 502 503 /* 504 * Attach the interface. 505 */ 506 if_attach(ifp); 507 ether_ifattach(ifp, enaddr); 508 #if NBPFILTER > 0 509 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 510 sizeof(struct ether_header)); 511 #endif 512 513 /* 514 * Make sure the interface is shutdown during reboot. 515 */ 516 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 517 if (sc->sc_sdhook == NULL) 518 printf("%s: WARNING: unable to establish shutdown hook\n", 519 sc->sc_dev.dv_xname); 520 521 /* 522 * Add a suspend hook to make sure we come back up after a 523 * resume. 524 */ 525 sc->sc_powerhook = powerhook_establish(tlp_power, sc); 526 if (sc->sc_powerhook == NULL) 527 printf("%s: WARNING: unable to establish power hook\n", 528 sc->sc_dev.dv_xname); 529 return; 530 531 /* 532 * Free any resources we've allocated during the failed attach 533 * attempt. Do this in reverse order and fall through. 534 */ 535 fail_5: 536 for (i = 0; i < TULIP_NRXDESC; i++) { 537 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 538 bus_dmamap_destroy(sc->sc_dmat, 539 sc->sc_rxsoft[i].rxs_dmamap); 540 } 541 fail_4: 542 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 543 if (sc->sc_txsoft[i].txs_dmamap != NULL) 544 bus_dmamap_destroy(sc->sc_dmat, 545 sc->sc_txsoft[i].txs_dmamap); 546 } 547 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 548 fail_3: 549 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 550 fail_2: 551 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 552 sizeof(struct tulip_control_data)); 553 fail_1: 554 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 555 fail_0: 556 return; 557 } 558 559 /* 560 * tlp_activate: 561 * 562 * Handle device activation/deactivation requests. 563 */ 564 int 565 tlp_activate(self, act) 566 struct device *self; 567 enum devact act; 568 { 569 struct tulip_softc *sc = (void *) self; 570 int s, error = 0; 571 572 s = splnet(); 573 switch (act) { 574 case DVACT_ACTIVATE: 575 error = EOPNOTSUPP; 576 break; 577 578 case DVACT_DEACTIVATE: 579 if (sc->sc_flags & TULIPF_HAS_MII) 580 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 581 MII_OFFSET_ANY); 582 if_deactivate(&sc->sc_ethercom.ec_if); 583 break; 584 } 585 splx(s); 586 587 return (error); 588 } 589 590 /* 591 * tlp_detach: 592 * 593 * Detach a Tulip interface. 594 */ 595 int 596 tlp_detach(sc) 597 struct tulip_softc *sc; 598 { 599 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 600 struct tulip_rxsoft *rxs; 601 struct tulip_txsoft *txs; 602 int i; 603 604 /* 605 * Suceed now if there isn't any work to do. 606 */ 607 if ((sc->sc_flags & TULIPF_ATTACHED) == 0) 608 return (0); 609 610 /* Unhook our tick handler. */ 611 if (sc->sc_tick) 612 callout_stop(&sc->sc_tick_callout); 613 614 if (sc->sc_flags & TULIPF_HAS_MII) { 615 /* Detach all PHYs */ 616 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 617 } 618 619 /* Delete all remaining media. */ 620 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 621 622 #if NBPFILTER > 0 623 bpfdetach(ifp); 624 #endif 625 ether_ifdetach(ifp); 626 if_detach(ifp); 627 628 for (i = 0; i < TULIP_NRXDESC; i++) { 629 rxs = &sc->sc_rxsoft[i]; 630 if (rxs->rxs_mbuf != NULL) { 631 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 632 m_freem(rxs->rxs_mbuf); 633 rxs->rxs_mbuf = NULL; 634 } 635 bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap); 636 } 637 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 638 txs = &sc->sc_txsoft[i]; 639 if (txs->txs_mbuf != NULL) { 640 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 641 m_freem(txs->txs_mbuf); 642 txs->txs_mbuf = NULL; 643 } 644 bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap); 645 } 646 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 647 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 648 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 649 sizeof(struct tulip_control_data)); 650 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 651 652 shutdownhook_disestablish(sc->sc_sdhook); 653 powerhook_disestablish(sc->sc_powerhook); 654 655 if (sc->sc_srom) 656 free(sc->sc_srom, M_DEVBUF); 657 658 return (0); 659 } 660 661 /* 662 * tlp_shutdown: 663 * 664 * Make sure the interface is stopped at reboot time. 665 */ 666 void 667 tlp_shutdown(arg) 668 void *arg; 669 { 670 struct tulip_softc *sc = arg; 671 672 tlp_stop(sc, 1); 673 } 674 675 /* 676 * tlp_start: [ifnet interface function] 677 * 678 * Start packet transmission on the interface. 679 */ 680 void 681 tlp_start(ifp) 682 struct ifnet *ifp; 683 { 684 struct tulip_softc *sc = ifp->if_softc; 685 struct mbuf *m0, *m; 686 struct tulip_txsoft *txs, *last_txs; 687 bus_dmamap_t dmamap; 688 int error, firsttx, nexttx, lasttx, ofree, seg; 689 690 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 691 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 692 693 /* 694 * If we want a filter setup, it means no more descriptors were 695 * available for the setup routine. Let it get a chance to wedge 696 * itself into the ring. 697 */ 698 if (sc->sc_flags & TULIPF_WANT_SETUP) 699 ifp->if_flags |= IFF_OACTIVE; 700 701 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 702 return; 703 704 /* 705 * Remember the previous number of free descriptors and 706 * the first descriptor we'll use. 707 */ 708 ofree = sc->sc_txfree; 709 firsttx = sc->sc_txnext; 710 711 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 712 sc->sc_dev.dv_xname, ofree, firsttx)); 713 714 /* 715 * Loop through the send queue, setting up transmit descriptors 716 * until we drain the queue, or use up all available transmit 717 * descriptors. 718 */ 719 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 720 sc->sc_txfree != 0) { 721 /* 722 * Grab a packet off the queue. 723 */ 724 IF_DEQUEUE(&ifp->if_snd, m0); 725 if (m0 == NULL) 726 break; 727 728 dmamap = txs->txs_dmamap; 729 730 /* 731 * Load the DMA map. If this fails, the packet either 732 * didn't fit in the alloted number of segments, or we were 733 * short on resources. In this case, we'll copy and try 734 * again. 735 * 736 * Note that if we're only allowed 1 Tx segment, we 737 * have an alignment restriction. Do this test before 738 * attempting to load the DMA map, because it's more 739 * likely we'll trip the alignment test than the 740 * more-than-one-segment test. 741 */ 742 if ((sc->sc_ntxsegs == 1 && (mtod(m0, bus_addr_t) & 3) != 0) || 743 bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 744 BUS_DMA_NOWAIT) != 0) { 745 MGETHDR(m, M_DONTWAIT, MT_DATA); 746 if (m == NULL) { 747 printf("%s: unable to allocate Tx mbuf\n", 748 sc->sc_dev.dv_xname); 749 IF_PREPEND(&ifp->if_snd, m0); 750 break; 751 } 752 if (m0->m_pkthdr.len > MHLEN) { 753 MCLGET(m, M_DONTWAIT); 754 if ((m->m_flags & M_EXT) == 0) { 755 printf("%s: unable to allocate Tx " 756 "cluster\n", sc->sc_dev.dv_xname); 757 m_freem(m); 758 IF_PREPEND(&ifp->if_snd, m0); 759 break; 760 } 761 } 762 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 763 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 764 m_freem(m0); 765 m0 = m; 766 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 767 m0, BUS_DMA_NOWAIT); 768 if (error) { 769 printf("%s: unable to load Tx buffer, " 770 "error = %d\n", sc->sc_dev.dv_xname, error); 771 IF_PREPEND(&ifp->if_snd, m0); 772 break; 773 } 774 } 775 776 /* 777 * Ensure we have enough descriptors free to describe 778 * the packet. 779 */ 780 if (dmamap->dm_nsegs > sc->sc_txfree) { 781 /* 782 * Not enough free descriptors to transmit this 783 * packet. We haven't committed to anything yet, 784 * so just unload the DMA map, put the packet 785 * back on the queue, and punt. Notify the upper 786 * layer that there are no more slots left. 787 * 788 * XXX We could allocate an mbuf and copy, but 789 * XXX it is worth it? 790 */ 791 ifp->if_flags |= IFF_OACTIVE; 792 bus_dmamap_unload(sc->sc_dmat, dmamap); 793 IF_PREPEND(&ifp->if_snd, m0); 794 break; 795 } 796 797 /* 798 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 799 */ 800 801 /* Sync the DMA map. */ 802 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 803 BUS_DMASYNC_PREWRITE); 804 805 /* 806 * Initialize the transmit descriptors. 807 */ 808 for (nexttx = sc->sc_txnext, seg = 0; 809 seg < dmamap->dm_nsegs; 810 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 811 /* 812 * If this is the first descriptor we're 813 * enqueueing, don't set the OWN bit just 814 * yet. That could cause a race condition. 815 * We'll do it below. 816 */ 817 sc->sc_txdescs[nexttx].td_status = 818 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN); 819 sc->sc_txdescs[nexttx].td_bufaddr1 = 820 htole32(dmamap->dm_segs[seg].ds_addr); 821 sc->sc_txdescs[nexttx].td_ctl = 822 htole32((dmamap->dm_segs[seg].ds_len << 823 TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch | 824 (nexttx == (TULIP_NTXDESC - 1) ? 825 sc->sc_tdctl_er : 0)); 826 lasttx = nexttx; 827 } 828 829 /* Set `first segment' and `last segment' appropriately. */ 830 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS); 831 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS); 832 833 #ifdef TLP_DEBUG 834 if (ifp->if_flags & IFF_DEBUG) { 835 printf(" txsoft %p transmit chain:\n", txs); 836 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 837 printf(" descriptor %d:\n", seg); 838 printf(" td_status: 0x%08x\n", 839 le32toh(sc->sc_txdescs[seg].td_status)); 840 printf(" td_ctl: 0x%08x\n", 841 le32toh(sc->sc_txdescs[seg].td_ctl)); 842 printf(" td_bufaddr1: 0x%08x\n", 843 le32toh(sc->sc_txdescs[seg].td_bufaddr1)); 844 printf(" td_bufaddr2: 0x%08x\n", 845 le32toh(sc->sc_txdescs[seg].td_bufaddr2)); 846 if (seg == lasttx) 847 break; 848 } 849 } 850 #endif 851 852 /* Sync the descriptors we're using. */ 853 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 854 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 855 856 /* 857 * Store a pointer to the packet so we can free it later, 858 * and remember what txdirty will be once the packet is 859 * done. 860 */ 861 txs->txs_mbuf = m0; 862 txs->txs_firstdesc = sc->sc_txnext; 863 txs->txs_lastdesc = lasttx; 864 txs->txs_ndescs = dmamap->dm_nsegs; 865 866 /* Advance the tx pointer. */ 867 sc->sc_txfree -= dmamap->dm_nsegs; 868 sc->sc_txnext = nexttx; 869 870 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 871 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 872 873 last_txs = txs; 874 875 #if NBPFILTER > 0 876 /* 877 * Pass the packet to any BPF listeners. 878 */ 879 if (ifp->if_bpf) 880 bpf_mtap(ifp->if_bpf, m0); 881 #endif /* NBPFILTER > 0 */ 882 } 883 884 if (txs == NULL || sc->sc_txfree == 0) { 885 /* No more slots left; notify upper layer. */ 886 ifp->if_flags |= IFF_OACTIVE; 887 } 888 889 if (sc->sc_txfree != ofree) { 890 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 891 sc->sc_dev.dv_xname, lasttx, firsttx)); 892 /* 893 * Cause a transmit interrupt to happen on the 894 * last packet we enqueued. 895 */ 896 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC); 897 TULIP_CDTXSYNC(sc, lasttx, 1, 898 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 899 900 /* 901 * Some clone chips want IC on the *first* segment in 902 * the packet. Appease them. 903 */ 904 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 905 last_txs->txs_firstdesc != lasttx) { 906 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 907 htole32(TDCTL_Tx_IC); 908 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 909 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 910 } 911 912 /* 913 * The entire packet chain is set up. Give the 914 * first descriptor to the chip now. 915 */ 916 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN); 917 TULIP_CDTXSYNC(sc, firsttx, 1, 918 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 919 920 /* Wake up the transmitter. */ 921 /* XXX USE AUTOPOLLING? */ 922 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 923 924 /* Set a watchdog timer in case the chip flakes out. */ 925 ifp->if_timer = 5; 926 } 927 } 928 929 /* 930 * tlp_watchdog: [ifnet interface function] 931 * 932 * Watchdog timer handler. 933 */ 934 void 935 tlp_watchdog(ifp) 936 struct ifnet *ifp; 937 { 938 struct tulip_softc *sc = ifp->if_softc; 939 int doing_setup, doing_transmit; 940 941 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 942 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 943 944 if (doing_setup && doing_transmit) { 945 printf("%s: filter setup and transmit timeout\n", 946 sc->sc_dev.dv_xname); 947 ifp->if_oerrors++; 948 } else if (doing_transmit) { 949 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 950 ifp->if_oerrors++; 951 } else if (doing_setup) 952 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 953 else 954 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 955 956 (void) tlp_init(sc); 957 958 /* Try to get more packets going. */ 959 tlp_start(ifp); 960 } 961 962 /* 963 * tlp_ioctl: [ifnet interface function] 964 * 965 * Handle control requests from the operator. 966 */ 967 int 968 tlp_ioctl(ifp, cmd, data) 969 struct ifnet *ifp; 970 u_long cmd; 971 caddr_t data; 972 { 973 struct tulip_softc *sc = ifp->if_softc; 974 struct ifreq *ifr = (struct ifreq *)data; 975 struct ifaddr *ifa = (struct ifaddr *)data; 976 int s, error = 0; 977 978 s = splnet(); 979 980 switch (cmd) { 981 case SIOCSIFADDR: 982 if ((error = tlp_enable(sc)) != 0) 983 break; 984 ifp->if_flags |= IFF_UP; 985 986 switch (ifa->ifa_addr->sa_family) { 987 #ifdef INET 988 case AF_INET: 989 if ((error = tlp_init(sc)) != 0) 990 break; 991 arp_ifinit(ifp, ifa); 992 break; 993 #endif /* INET */ 994 #ifdef NS 995 case AF_NS: 996 { 997 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 998 999 if (ns_nullhost(*ina)) 1000 ina->x_host = *(union ns_host *) 1001 LLADDR(ifp->if_sadl); 1002 else 1003 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1004 ifp->if_addrlen); 1005 /* Set new address. */ 1006 error = tlp_init(sc); 1007 break; 1008 } 1009 #endif /* NS */ 1010 default: 1011 error = tlp_init(sc); 1012 break; 1013 } 1014 break; 1015 1016 case SIOCSIFMTU: 1017 if (ifr->ifr_mtu > ETHERMTU) 1018 error = EINVAL; 1019 else 1020 ifp->if_mtu = ifr->ifr_mtu; 1021 break; 1022 1023 case SIOCSIFFLAGS: 1024 #ifdef TLP_STATS 1025 if (ifp->if_flags & IFF_DEBUG) 1026 tlp_print_stats(sc); 1027 #endif 1028 if ((ifp->if_flags & IFF_UP) == 0 && 1029 (ifp->if_flags & IFF_RUNNING) != 0) { 1030 /* 1031 * If interface is marked down and it is running, then 1032 * stop it. 1033 */ 1034 tlp_stop(sc, 1); 1035 tlp_disable(sc); 1036 } else if ((ifp->if_flags & IFF_UP) != 0 && 1037 (ifp->if_flags & IFF_RUNNING) == 0) { 1038 /* 1039 * If interfase it marked up and it is stopped, then 1040 * start it. 1041 */ 1042 if ((error = tlp_enable(sc)) != 0) 1043 break; 1044 error = tlp_init(sc); 1045 } else if ((ifp->if_flags & IFF_UP) != 0) { 1046 /* 1047 * Reset the interface to pick up changes in any other 1048 * flags that affect the hardware state. 1049 */ 1050 if ((error = tlp_enable(sc)) != 0) 1051 break; 1052 error = tlp_init(sc); 1053 } 1054 break; 1055 1056 case SIOCADDMULTI: 1057 case SIOCDELMULTI: 1058 error = (cmd == SIOCADDMULTI) ? 1059 ether_addmulti(ifr, &sc->sc_ethercom) : 1060 ether_delmulti(ifr, &sc->sc_ethercom); 1061 1062 if (TULIP_IS_ENABLED(sc) && error == ENETRESET) { 1063 /* 1064 * Multicast list has changed. Set the filter 1065 * accordingly. 1066 */ 1067 (*sc->sc_filter_setup)(sc); 1068 error = 0; 1069 } 1070 break; 1071 1072 case SIOCSIFMEDIA: 1073 case SIOCGIFMEDIA: 1074 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1075 break; 1076 1077 default: 1078 error = EINVAL; 1079 break; 1080 } 1081 1082 /* Try to get more packets going. */ 1083 if (TULIP_IS_ENABLED(sc)) 1084 tlp_start(ifp); 1085 1086 splx(s); 1087 return (error); 1088 } 1089 1090 /* 1091 * tlp_intr: 1092 * 1093 * Interrupt service routine. 1094 */ 1095 int 1096 tlp_intr(arg) 1097 void *arg; 1098 { 1099 struct tulip_softc *sc = arg; 1100 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1101 u_int32_t status, rxstatus, txstatus; 1102 int handled = 0, txthresh; 1103 1104 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 1105 1106 #ifdef DEBUG 1107 if (TULIP_IS_ENABLED(sc) == 0) 1108 panic("%s: tlp_intr: not enabled\n", sc->sc_dev.dv_xname); 1109 #endif 1110 1111 /* 1112 * If the interface isn't running, the interrupt couldn't 1113 * possibly have come from us. 1114 */ 1115 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1116 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1117 return (0); 1118 1119 /* Disable interrupts on the DM9102 (interrupt edge bug). */ 1120 switch (sc->sc_chip) { 1121 case TULIP_CHIP_DM9102: 1122 case TULIP_CHIP_DM9102A: 1123 TULIP_WRITE(sc, CSR_INTEN, 0); 1124 break; 1125 1126 default: 1127 /* Nothing. */ 1128 } 1129 1130 for (;;) { 1131 status = TULIP_READ(sc, CSR_STATUS); 1132 if (status) 1133 TULIP_WRITE(sc, CSR_STATUS, status); 1134 1135 if ((status & sc->sc_inten) == 0) 1136 break; 1137 1138 handled = 1; 1139 1140 rxstatus = status & sc->sc_rxint_mask; 1141 txstatus = status & sc->sc_txint_mask; 1142 1143 if (rxstatus) { 1144 /* Grab new any new packets. */ 1145 tlp_rxintr(sc); 1146 1147 if (rxstatus & STATUS_RWT) 1148 printf("%s: receive watchdog timeout\n", 1149 sc->sc_dev.dv_xname); 1150 1151 if (rxstatus & STATUS_RU) { 1152 printf("%s: receive ring overrun\n", 1153 sc->sc_dev.dv_xname); 1154 /* Get the receive process going again. */ 1155 if (sc->sc_tdctl_er != TDCTL_ER) { 1156 tlp_idle(sc, OPMODE_SR); 1157 TULIP_WRITE(sc, CSR_RXLIST, 1158 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1159 TULIP_WRITE(sc, CSR_OPMODE, 1160 sc->sc_opmode); 1161 } 1162 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1163 break; 1164 } 1165 } 1166 1167 if (txstatus) { 1168 /* Sweep up transmit descriptors. */ 1169 tlp_txintr(sc); 1170 1171 if (txstatus & STATUS_TJT) 1172 printf("%s: transmit jabber timeout\n", 1173 sc->sc_dev.dv_xname); 1174 1175 if (txstatus & STATUS_UNF) { 1176 /* 1177 * Increase our transmit threshold if 1178 * another is available. 1179 */ 1180 txthresh = sc->sc_txthresh + 1; 1181 if (sc->sc_txth[txthresh].txth_name != NULL) { 1182 /* Idle the transmit process. */ 1183 tlp_idle(sc, OPMODE_ST); 1184 1185 sc->sc_txthresh = txthresh; 1186 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 1187 sc->sc_opmode |= 1188 sc->sc_txth[txthresh].txth_opmode; 1189 printf("%s: transmit underrun; new " 1190 "threshold: %s\n", 1191 sc->sc_dev.dv_xname, 1192 sc->sc_txth[txthresh].txth_name); 1193 1194 /* 1195 * Set the new threshold and restart 1196 * the transmit process. 1197 */ 1198 TULIP_WRITE(sc, CSR_OPMODE, 1199 sc->sc_opmode); 1200 } 1201 /* 1202 * XXX Log every Nth underrun from 1203 * XXX now on? 1204 */ 1205 } 1206 } 1207 1208 if (status & (STATUS_TPS|STATUS_RPS)) { 1209 if (status & STATUS_TPS) 1210 printf("%s: transmit process stopped\n", 1211 sc->sc_dev.dv_xname); 1212 if (status & STATUS_RPS) 1213 printf("%s: receive process stopped\n", 1214 sc->sc_dev.dv_xname); 1215 (void) tlp_init(sc); 1216 break; 1217 } 1218 1219 if (status & STATUS_SE) { 1220 const char *str; 1221 switch (status & STATUS_EB) { 1222 case STATUS_EB_PARITY: 1223 str = "parity error"; 1224 break; 1225 1226 case STATUS_EB_MABT: 1227 str = "master abort"; 1228 break; 1229 1230 case STATUS_EB_TABT: 1231 str = "target abort"; 1232 break; 1233 1234 default: 1235 str = "unknown error"; 1236 break; 1237 } 1238 printf("%s: fatal system error: %s\n", 1239 sc->sc_dev.dv_xname, str); 1240 (void) tlp_init(sc); 1241 break; 1242 } 1243 1244 /* 1245 * Not handled: 1246 * 1247 * Transmit buffer unavailable -- normal 1248 * condition, nothing to do, really. 1249 * 1250 * General purpose timer experied -- we don't 1251 * use the general purpose timer. 1252 * 1253 * Early receive interrupt -- not available on 1254 * all chips, we just use RI. We also only 1255 * use single-segment receive DMA, so this 1256 * is mostly useless. 1257 */ 1258 } 1259 1260 /* Bring interrupts back up on the DM9102. */ 1261 switch (sc->sc_chip) { 1262 case TULIP_CHIP_DM9102: 1263 case TULIP_CHIP_DM9102A: 1264 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1265 break; 1266 1267 default: 1268 /* Nothing. */ 1269 } 1270 1271 /* Try to get more packets going. */ 1272 tlp_start(ifp); 1273 1274 return (handled); 1275 } 1276 1277 /* 1278 * tlp_rxintr: 1279 * 1280 * Helper; handle receive interrupts. 1281 */ 1282 void 1283 tlp_rxintr(sc) 1284 struct tulip_softc *sc; 1285 { 1286 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1287 struct ether_header *eh; 1288 struct tulip_rxsoft *rxs; 1289 struct mbuf *m; 1290 u_int32_t rxstat; 1291 int i, len; 1292 1293 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 1294 rxs = &sc->sc_rxsoft[i]; 1295 1296 TULIP_CDRXSYNC(sc, i, 1297 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1298 1299 rxstat = le32toh(sc->sc_rxdescs[i].td_status); 1300 1301 if (rxstat & TDSTAT_OWN) { 1302 /* 1303 * We have processed all of the receive buffers. 1304 */ 1305 break; 1306 } 1307 1308 /* 1309 * Make sure the packet fit in one buffer. This should 1310 * always be the case. But the Lite-On PNIC, rev 33 1311 * has an awful receive engine bug, which may require 1312 * a very icky work-around. 1313 */ 1314 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1315 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1316 printf("%s: incoming packet spilled, resetting\n", 1317 sc->sc_dev.dv_xname); 1318 (void) tlp_init(sc); 1319 return; 1320 } 1321 1322 /* 1323 * If any collisions were seen on the wire, count one. 1324 */ 1325 if (rxstat & TDSTAT_Rx_CS) 1326 ifp->if_collisions++; 1327 1328 /* 1329 * If an error occured, update stats, clear the status 1330 * word, and leave the packet buffer in place. It will 1331 * simply be reused the next time the ring comes around. 1332 */ 1333 if (rxstat & TDSTAT_ES) { 1334 #define PRINTERR(bit, str) \ 1335 if (rxstat & (bit)) \ 1336 printf("%s: receive error: %s\n", \ 1337 sc->sc_dev.dv_xname, str) 1338 ifp->if_ierrors++; 1339 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1340 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1341 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1342 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1343 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1344 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1345 #undef PRINTERR 1346 TULIP_INIT_RXDESC(sc, i); 1347 continue; 1348 } 1349 1350 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1351 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1352 1353 /* 1354 * No errors; receive the packet. Note the Tulip 1355 * includes the CRC with every packet; trim it. 1356 */ 1357 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; 1358 1359 #ifdef __NO_STRICT_ALIGNMENT 1360 /* 1361 * Allocate a new mbuf cluster. If that fails, we are 1362 * out of memory, and must drop the packet and recycle 1363 * the buffer that's already attached to this descriptor. 1364 */ 1365 m = rxs->rxs_mbuf; 1366 if (tlp_add_rxbuf(sc, i) != 0) { 1367 ifp->if_ierrors++; 1368 TULIP_INIT_RXDESC(sc, i); 1369 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1370 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1371 continue; 1372 } 1373 #else 1374 /* 1375 * The Tulip's receive buffers must be 4-byte aligned. 1376 * But this means that the data after the Ethernet header 1377 * is misaligned. We must allocate a new buffer and 1378 * copy the data, shifted forward 2 bytes. 1379 */ 1380 MGETHDR(m, M_DONTWAIT, MT_DATA); 1381 if (m == NULL) { 1382 dropit: 1383 ifp->if_ierrors++; 1384 TULIP_INIT_RXDESC(sc, i); 1385 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1386 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1387 continue; 1388 } 1389 if (len > (MHLEN - 2)) { 1390 MCLGET(m, M_DONTWAIT); 1391 if ((m->m_flags & M_EXT) == 0) { 1392 m_freem(m); 1393 goto dropit; 1394 } 1395 } 1396 m->m_data += 2; 1397 1398 /* 1399 * Note that we use clusters for incoming frames, so the 1400 * buffer is virtually contiguous. 1401 */ 1402 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1403 1404 /* Allow the receive descriptor to continue using its mbuf. */ 1405 TULIP_INIT_RXDESC(sc, i); 1406 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1407 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1408 #endif /* __NO_STRICT_ALIGNMENT */ 1409 1410 ifp->if_ipackets++; 1411 eh = mtod(m, struct ether_header *); 1412 m->m_pkthdr.rcvif = ifp; 1413 m->m_pkthdr.len = m->m_len = len; 1414 1415 #if NBPFILTER > 0 1416 /* 1417 * Pass this up to any BPF listeners, but only 1418 * pass it up the stack if its for us. 1419 */ 1420 if (ifp->if_bpf) 1421 bpf_mtap(ifp->if_bpf, m); 1422 #endif /* NPBFILTER > 0 */ 1423 1424 /* 1425 * We sometimes have to run the 21140 in Hash-Only 1426 * mode. If we're in that mode, and not in promiscuous 1427 * mode, and we have a unicast packet that isn't for 1428 * us, then drop it. 1429 */ 1430 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY && 1431 (ifp->if_flags & IFF_PROMISC) == 0 && 1432 ETHER_IS_MULTICAST(eh->ether_dhost) == 0 && 1433 memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1434 ETHER_ADDR_LEN) != 0) { 1435 m_freem(m); 1436 continue; 1437 } 1438 1439 /* Pass it on. */ 1440 (*ifp->if_input)(ifp, m); 1441 } 1442 1443 /* Update the recieve pointer. */ 1444 sc->sc_rxptr = i; 1445 } 1446 1447 /* 1448 * tlp_txintr: 1449 * 1450 * Helper; handle transmit interrupts. 1451 */ 1452 void 1453 tlp_txintr(sc) 1454 struct tulip_softc *sc; 1455 { 1456 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1457 struct tulip_txsoft *txs; 1458 u_int32_t txstat; 1459 1460 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1461 sc->sc_dev.dv_xname, sc->sc_flags)); 1462 1463 ifp->if_flags &= ~IFF_OACTIVE; 1464 1465 /* 1466 * Go through our Tx list and free mbufs for those 1467 * frames that have been transmitted. 1468 */ 1469 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1470 TULIP_CDTXSYNC(sc, txs->txs_lastdesc, 1471 txs->txs_ndescs, 1472 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1473 1474 #ifdef TLP_DEBUG 1475 if (ifp->if_flags & IFF_DEBUG) { 1476 int i; 1477 printf(" txsoft %p transmit chain:\n", txs); 1478 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1479 printf(" descriptor %d:\n", i); 1480 printf(" td_status: 0x%08x\n", 1481 le32toh(sc->sc_txdescs[i].td_status)); 1482 printf(" td_ctl: 0x%08x\n", 1483 le32toh(sc->sc_txdescs[i].td_ctl)); 1484 printf(" td_bufaddr1: 0x%08x\n", 1485 le32toh(sc->sc_txdescs[i].td_bufaddr1)); 1486 printf(" td_bufaddr2: 0x%08x\n", 1487 le32toh(sc->sc_txdescs[i].td_bufaddr2)); 1488 if (i == txs->txs_lastdesc) 1489 break; 1490 } 1491 } 1492 #endif 1493 1494 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status); 1495 if (txstat & TDSTAT_OWN) 1496 break; 1497 1498 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1499 1500 sc->sc_txfree += txs->txs_ndescs; 1501 1502 if (txs->txs_mbuf == NULL) { 1503 /* 1504 * If we didn't have an mbuf, it was the setup 1505 * packet. 1506 */ 1507 #ifdef DIAGNOSTIC 1508 if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1509 panic("tlp_txintr: null mbuf, not doing setup"); 1510 #endif 1511 TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE); 1512 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1513 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1514 continue; 1515 } 1516 1517 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1518 0, txs->txs_dmamap->dm_mapsize, 1519 BUS_DMASYNC_POSTWRITE); 1520 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1521 m_freem(txs->txs_mbuf); 1522 txs->txs_mbuf = NULL; 1523 1524 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1525 1526 /* 1527 * Check for errors and collisions. 1528 */ 1529 #ifdef TLP_STATS 1530 if (txstat & TDSTAT_Tx_UF) 1531 sc->sc_stats.ts_tx_uf++; 1532 if (txstat & TDSTAT_Tx_TO) 1533 sc->sc_stats.ts_tx_to++; 1534 if (txstat & TDSTAT_Tx_EC) 1535 sc->sc_stats.ts_tx_ec++; 1536 if (txstat & TDSTAT_Tx_LC) 1537 sc->sc_stats.ts_tx_lc++; 1538 #endif 1539 1540 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO)) 1541 ifp->if_oerrors++; 1542 1543 if (txstat & TDSTAT_Tx_EC) 1544 ifp->if_collisions += 16; 1545 else 1546 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1547 if (txstat & TDSTAT_Tx_LC) 1548 ifp->if_collisions++; 1549 1550 ifp->if_opackets++; 1551 } 1552 1553 /* 1554 * If there are no more pending transmissions, cancel the watchdog 1555 * timer. 1556 */ 1557 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1558 ifp->if_timer = 0; 1559 1560 /* 1561 * If we have a receive filter setup pending, do it now. 1562 */ 1563 if (sc->sc_flags & TULIPF_WANT_SETUP) 1564 (*sc->sc_filter_setup)(sc); 1565 } 1566 1567 #ifdef TLP_STATS 1568 void 1569 tlp_print_stats(sc) 1570 struct tulip_softc *sc; 1571 { 1572 1573 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n", 1574 sc->sc_dev.dv_xname, 1575 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to, 1576 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc); 1577 } 1578 #endif 1579 1580 /* 1581 * tlp_reset: 1582 * 1583 * Perform a soft reset on the Tulip. 1584 */ 1585 void 1586 tlp_reset(sc) 1587 struct tulip_softc *sc; 1588 { 1589 int i; 1590 1591 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1592 1593 /* 1594 * Xircom clone doesn't bring itself out of reset automatically. 1595 * Instead, we have to wait at least 50 PCI cycles, and then 1596 * clear SWR. 1597 */ 1598 if (sc->sc_chip == TULIP_CHIP_X3201_3) { 1599 delay(10); 1600 TULIP_WRITE(sc, CSR_BUSMODE, 0); 1601 } 1602 1603 for (i = 0; i < 1000; i++) { 1604 /* 1605 * Wait at least 50 PCI cycles for the reset to 1606 * complete before peeking at the Tulip again. 1607 * 10 uSec is a bit longer than 50 PCI cycles 1608 * (at 33MHz), but it doesn't hurt have the extra 1609 * wait. 1610 */ 1611 delay(10); 1612 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1613 break; 1614 } 1615 1616 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1617 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1618 1619 delay(1000); 1620 1621 /* 1622 * If the board has any GPIO reset sequences to issue, do them now. 1623 */ 1624 if (sc->sc_reset != NULL) 1625 (*sc->sc_reset)(sc); 1626 } 1627 1628 /* 1629 * tlp_init: 1630 * 1631 * Initialize the interface. Must be called at splnet(). 1632 */ 1633 int 1634 tlp_init(sc) 1635 struct tulip_softc *sc; 1636 { 1637 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1638 struct tulip_txsoft *txs; 1639 struct tulip_rxsoft *rxs; 1640 int i, error = 0; 1641 1642 /* 1643 * Cancel any pending I/O. 1644 */ 1645 tlp_stop(sc, 0); 1646 1647 /* 1648 * Initialize `opmode' to 0, and call the pre-init routine, if 1649 * any. This is required because the 2114x and some of the 1650 * clones require that the media-related bits in `opmode' be 1651 * set before performing a soft-reset in order to get internal 1652 * chip pathways are correct. Yay! 1653 */ 1654 sc->sc_opmode = 0; 1655 if (sc->sc_preinit != NULL) 1656 (*sc->sc_preinit)(sc); 1657 1658 /* 1659 * Reset the Tulip to a known state. 1660 */ 1661 tlp_reset(sc); 1662 1663 /* 1664 * Initialize the BUSMODE register. 1665 */ 1666 sc->sc_busmode = BUSMODE_BAR; 1667 switch (sc->sc_chip) { 1668 case TULIP_CHIP_21140: 1669 case TULIP_CHIP_21140A: 1670 case TULIP_CHIP_21142: 1671 case TULIP_CHIP_21143: 1672 case TULIP_CHIP_82C115: 1673 case TULIP_CHIP_MX98725: 1674 /* 1675 * If we're allowed to do so, use Memory Read Line 1676 * and Memory Read Multiple. 1677 * 1678 * XXX Should we use Memory Write and Invalidate? 1679 */ 1680 if (sc->sc_flags & TULIPF_MRL) 1681 sc->sc_busmode |= BUSMODE_RLE; 1682 if (sc->sc_flags & TULIPF_MRM) 1683 sc->sc_busmode |= BUSMODE_RME; 1684 #if 0 1685 if (sc->sc_flags & TULIPF_MWI) 1686 sc->sc_busmode |= BUSMODE_WLE; 1687 #endif 1688 1689 default: 1690 /* Nothing. */ 1691 } 1692 switch (sc->sc_cacheline) { 1693 default: 1694 /* 1695 * Note: We must *always* set these bits; a cache 1696 * alignment of 0 is RESERVED. 1697 */ 1698 case 8: 1699 sc->sc_busmode |= BUSMODE_CAL_8LW; 1700 break; 1701 case 16: 1702 sc->sc_busmode |= BUSMODE_CAL_16LW; 1703 break; 1704 case 32: 1705 sc->sc_busmode |= BUSMODE_CAL_32LW; 1706 break; 1707 } 1708 switch (sc->sc_chip) { 1709 case TULIP_CHIP_82C168: 1710 case TULIP_CHIP_82C169: 1711 sc->sc_busmode |= BUSMODE_PBL_16LW | BUSMODE_PNIC_MBO; 1712 break; 1713 default: 1714 sc->sc_busmode |= BUSMODE_PBL_DEFAULT; 1715 break; 1716 } 1717 #if BYTE_ORDER == BIG_ENDIAN 1718 /* 1719 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips 1720 * support them, and even on ones that do, it doesn't 1721 * always work. 1722 */ 1723 #endif 1724 1725 /* 1726 * Some chips have a broken bus interface. 1727 */ 1728 switch (sc->sc_chip) { 1729 case TULIP_CHIP_DM9102: 1730 case TULIP_CHIP_DM9102A: 1731 sc->sc_busmode = 0; 1732 break; 1733 1734 default: 1735 /* Nothing. */ 1736 } 1737 1738 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1739 1740 /* 1741 * Initialize the OPMODE register. We don't write it until 1742 * we're ready to begin the transmit and receive processes. 1743 * 1744 * Media-related OPMODE bits are set in the media callbacks 1745 * for each specific chip/board. 1746 */ 1747 sc->sc_opmode |= OPMODE_SR | OPMODE_ST | 1748 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1749 1750 /* 1751 * Magical mystery initialization on the Macronix chips. 1752 * The MX98713 uses its own magic value, the rest share 1753 * a common one. 1754 */ 1755 switch (sc->sc_chip) { 1756 case TULIP_CHIP_MX98713: 1757 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1758 break; 1759 1760 case TULIP_CHIP_MX98713A: 1761 case TULIP_CHIP_MX98715: 1762 case TULIP_CHIP_MX98715A: 1763 case TULIP_CHIP_MX98715AEC_X: 1764 case TULIP_CHIP_MX98725: 1765 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1766 break; 1767 1768 default: 1769 /* Nothing. */ 1770 } 1771 1772 /* 1773 * Initialize the transmit descriptor ring. 1774 */ 1775 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1776 for (i = 0; i < TULIP_NTXDESC; i++) { 1777 sc->sc_txdescs[i].td_ctl = htole32(sc->sc_tdctl_ch); 1778 sc->sc_txdescs[i].td_bufaddr2 = 1779 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i))); 1780 } 1781 sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er); 1782 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1783 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1784 sc->sc_txfree = TULIP_NTXDESC; 1785 sc->sc_txnext = 0; 1786 1787 /* 1788 * Initialize the transmit job descriptors. 1789 */ 1790 SIMPLEQ_INIT(&sc->sc_txfreeq); 1791 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1792 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1793 txs = &sc->sc_txsoft[i]; 1794 txs->txs_mbuf = NULL; 1795 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1796 } 1797 1798 /* 1799 * Initialize the receive descriptor and receive job 1800 * descriptor rings. 1801 */ 1802 for (i = 0; i < TULIP_NRXDESC; i++) { 1803 rxs = &sc->sc_rxsoft[i]; 1804 if (rxs->rxs_mbuf == NULL) { 1805 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1806 printf("%s: unable to allocate or map rx " 1807 "buffer %d, error = %d\n", 1808 sc->sc_dev.dv_xname, i, error); 1809 /* 1810 * XXX Should attempt to run with fewer receive 1811 * XXX buffers instead of just failing. 1812 */ 1813 tlp_rxdrain(sc); 1814 goto out; 1815 } 1816 } 1817 } 1818 sc->sc_rxptr = 0; 1819 1820 /* 1821 * Initialize the interrupt mask and enable interrupts. 1822 */ 1823 /* normal interrupts */ 1824 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1825 1826 /* abnormal interrupts */ 1827 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1828 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1829 1830 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1831 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1832 1833 switch (sc->sc_chip) { 1834 case TULIP_CHIP_WB89C840F: 1835 /* 1836 * Clear bits that we don't want that happen to 1837 * overlap or don't exist. 1838 */ 1839 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1840 break; 1841 1842 default: 1843 /* Nothing. */ 1844 } 1845 1846 sc->sc_rxint_mask &= sc->sc_inten; 1847 sc->sc_txint_mask &= sc->sc_inten; 1848 1849 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1850 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1851 1852 /* 1853 * Give the transmit and receive rings to the Tulip. 1854 */ 1855 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1856 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1857 1858 /* 1859 * On chips that do this differently, set the station address. 1860 */ 1861 switch (sc->sc_chip) { 1862 case TULIP_CHIP_WB89C840F: 1863 { 1864 /* XXX Do this with stream writes? */ 1865 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1866 1867 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1868 bus_space_write_1(sc->sc_st, sc->sc_sh, 1869 cpa + i, LLADDR(ifp->if_sadl)[i]); 1870 } 1871 break; 1872 } 1873 1874 case TULIP_CHIP_AL981: 1875 { 1876 u_int32_t reg; 1877 u_int8_t *enaddr = LLADDR(ifp->if_sadl); 1878 1879 reg = enaddr[0] | 1880 (enaddr[1] << 8) | 1881 (enaddr[2] << 16) | 1882 (enaddr[3] << 24); 1883 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg); 1884 1885 reg = enaddr[4] | 1886 (enaddr[5] << 8); 1887 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg); 1888 } 1889 1890 default: 1891 /* Nothing. */ 1892 } 1893 1894 /* 1895 * Set the receive filter. This will start the transmit and 1896 * receive processes. 1897 */ 1898 (*sc->sc_filter_setup)(sc); 1899 1900 /* 1901 * Set the current media. 1902 */ 1903 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1904 1905 /* 1906 * Start the receive process. 1907 */ 1908 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1909 1910 if (sc->sc_tick != NULL) { 1911 /* Start the one second clock. */ 1912 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 1913 } 1914 1915 /* 1916 * Note that the interface is now running. 1917 */ 1918 ifp->if_flags |= IFF_RUNNING; 1919 ifp->if_flags &= ~IFF_OACTIVE; 1920 1921 out: 1922 if (error) 1923 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1924 return (error); 1925 } 1926 1927 /* 1928 * tlp_enable: 1929 * 1930 * Enable the Tulip chip. 1931 */ 1932 int 1933 tlp_enable(sc) 1934 struct tulip_softc *sc; 1935 { 1936 1937 if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) { 1938 if ((*sc->sc_enable)(sc) != 0) { 1939 printf("%s: device enable failed\n", 1940 sc->sc_dev.dv_xname); 1941 return (EIO); 1942 } 1943 sc->sc_flags |= TULIPF_ENABLED; 1944 } 1945 return (0); 1946 } 1947 1948 /* 1949 * tlp_disable: 1950 * 1951 * Disable the Tulip chip. 1952 */ 1953 void 1954 tlp_disable(sc) 1955 struct tulip_softc *sc; 1956 { 1957 1958 if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) { 1959 (*sc->sc_disable)(sc); 1960 sc->sc_flags &= ~TULIPF_ENABLED; 1961 } 1962 } 1963 1964 /* 1965 * tlp_power: 1966 * 1967 * Power management (suspend/resume) hook. 1968 */ 1969 void 1970 tlp_power(why, arg) 1971 int why; 1972 void *arg; 1973 { 1974 struct tulip_softc *sc = arg; 1975 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1976 int s; 1977 1978 s = splnet(); 1979 if (why != PWR_RESUME) { 1980 tlp_stop(sc, 0); 1981 if (sc->sc_power != NULL) 1982 (*sc->sc_power)(sc, why); 1983 } else if (ifp->if_flags & IFF_UP) { 1984 if (sc->sc_power != NULL) 1985 (*sc->sc_power)(sc, why); 1986 tlp_init(sc); 1987 } 1988 splx(s); 1989 } 1990 1991 /* 1992 * tlp_rxdrain: 1993 * 1994 * Drain the receive queue. 1995 */ 1996 void 1997 tlp_rxdrain(sc) 1998 struct tulip_softc *sc; 1999 { 2000 struct tulip_rxsoft *rxs; 2001 int i; 2002 2003 for (i = 0; i < TULIP_NRXDESC; i++) { 2004 rxs = &sc->sc_rxsoft[i]; 2005 if (rxs->rxs_mbuf != NULL) { 2006 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 2007 m_freem(rxs->rxs_mbuf); 2008 rxs->rxs_mbuf = NULL; 2009 } 2010 } 2011 } 2012 2013 /* 2014 * tlp_stop: 2015 * 2016 * Stop transmission on the interface. 2017 */ 2018 void 2019 tlp_stop(sc, drain) 2020 struct tulip_softc *sc; 2021 int drain; 2022 { 2023 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2024 struct tulip_txsoft *txs; 2025 2026 if (sc->sc_tick != NULL) { 2027 /* Stop the one second clock. */ 2028 callout_stop(&sc->sc_tick_callout); 2029 } 2030 2031 if (sc->sc_flags & TULIPF_HAS_MII) { 2032 /* Down the MII. */ 2033 mii_down(&sc->sc_mii); 2034 } 2035 2036 /* Disable interrupts. */ 2037 TULIP_WRITE(sc, CSR_INTEN, 0); 2038 2039 /* Stop the transmit and receive processes. */ 2040 sc->sc_opmode = 0; 2041 TULIP_WRITE(sc, CSR_OPMODE, 0); 2042 TULIP_WRITE(sc, CSR_RXLIST, 0); 2043 TULIP_WRITE(sc, CSR_TXLIST, 0); 2044 2045 /* 2046 * Release any queued transmit buffers. 2047 */ 2048 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 2049 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 2050 if (txs->txs_mbuf != NULL) { 2051 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 2052 m_freem(txs->txs_mbuf); 2053 txs->txs_mbuf = NULL; 2054 } 2055 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 2056 } 2057 2058 if (drain) { 2059 /* 2060 * Release the receive buffers. 2061 */ 2062 tlp_rxdrain(sc); 2063 } 2064 2065 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 2066 2067 /* 2068 * Mark the interface down and cancel the watchdog timer. 2069 */ 2070 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2071 ifp->if_timer = 0; 2072 } 2073 2074 #define SROM_EMIT(sc, x) \ 2075 do { \ 2076 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2077 delay(2); \ 2078 } while (0) 2079 2080 /* 2081 * tlp_srom_idle: 2082 * 2083 * Put the SROM in idle state. 2084 */ 2085 void 2086 tlp_srom_idle(sc) 2087 struct tulip_softc *sc; 2088 { 2089 u_int32_t miirom; 2090 int i; 2091 2092 miirom = MIIROM_SR; 2093 SROM_EMIT(sc, miirom); 2094 2095 miirom |= MIIROM_RD; 2096 SROM_EMIT(sc, miirom); 2097 2098 miirom |= MIIROM_SROMCS; 2099 SROM_EMIT(sc, miirom); 2100 2101 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2102 2103 /* Strobe the clock 32 times. */ 2104 for (i = 0; i < 32; i++) { 2105 SROM_EMIT(sc, miirom); 2106 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2107 } 2108 2109 SROM_EMIT(sc, miirom); 2110 2111 miirom &= ~MIIROM_SROMCS; 2112 SROM_EMIT(sc, miirom); 2113 2114 SROM_EMIT(sc, 0); 2115 } 2116 2117 /* 2118 * tlp_srom_size: 2119 * 2120 * Determine the number of address bits in the SROM. 2121 */ 2122 int 2123 tlp_srom_size(sc) 2124 struct tulip_softc *sc; 2125 { 2126 u_int32_t miirom; 2127 int x; 2128 2129 /* Select the SROM. */ 2130 miirom = MIIROM_SR; 2131 SROM_EMIT(sc, miirom); 2132 2133 miirom |= MIIROM_RD; 2134 SROM_EMIT(sc, miirom); 2135 2136 /* Send CHIP SELECT for one clock tick. */ 2137 miirom |= MIIROM_SROMCS; 2138 SROM_EMIT(sc, miirom); 2139 2140 /* Shift in the READ opcode. */ 2141 for (x = 3; x > 0; x--) { 2142 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2143 miirom |= MIIROM_SROMDI; 2144 else 2145 miirom &= ~MIIROM_SROMDI; 2146 SROM_EMIT(sc, miirom); 2147 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2148 SROM_EMIT(sc, miirom); 2149 } 2150 2151 /* Shift in address and look for dummy 0 bit. */ 2152 for (x = 1; x <= 12; x++) { 2153 miirom &= ~MIIROM_SROMDI; 2154 SROM_EMIT(sc, miirom); 2155 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2156 if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2157 break; 2158 SROM_EMIT(sc, miirom); 2159 } 2160 2161 /* Clear CHIP SELECT. */ 2162 miirom &= ~MIIROM_SROMCS; 2163 SROM_EMIT(sc, miirom); 2164 2165 /* Deselect the SROM. */ 2166 SROM_EMIT(sc, 0); 2167 2168 if (x < 4 || x > 12) { 2169 printf("%s: broken MicroWire interface detected; " 2170 "setting SROM size to 1Kb\n", sc->sc_dev.dv_xname); 2171 return (6); 2172 } else { 2173 if (tlp_srom_debug) 2174 printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n", 2175 sc->sc_dev.dv_xname, x, (1 << (x + 4)) >> 3); 2176 return (x); 2177 } 2178 } 2179 2180 /* 2181 * tlp_read_srom: 2182 * 2183 * Read the Tulip SROM. 2184 */ 2185 int 2186 tlp_read_srom(sc) 2187 struct tulip_softc *sc; 2188 { 2189 int size; 2190 u_int32_t miirom; 2191 u_int16_t datain; 2192 int i, x; 2193 2194 tlp_srom_idle(sc); 2195 2196 sc->sc_srom_addrbits = tlp_srom_size(sc); 2197 if (sc->sc_srom_addrbits == 0) 2198 return (0); 2199 size = TULIP_ROM_SIZE(sc->sc_srom_addrbits); 2200 sc->sc_srom = malloc(size, M_DEVBUF, M_NOWAIT); 2201 2202 /* Select the SROM. */ 2203 miirom = MIIROM_SR; 2204 SROM_EMIT(sc, miirom); 2205 2206 miirom |= MIIROM_RD; 2207 SROM_EMIT(sc, miirom); 2208 2209 for (i = 0; i < size; i += 2) { 2210 /* Send CHIP SELECT for one clock tick. */ 2211 miirom |= MIIROM_SROMCS; 2212 SROM_EMIT(sc, miirom); 2213 2214 /* Shift in the READ opcode. */ 2215 for (x = 3; x > 0; x--) { 2216 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2217 miirom |= MIIROM_SROMDI; 2218 else 2219 miirom &= ~MIIROM_SROMDI; 2220 SROM_EMIT(sc, miirom); 2221 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2222 SROM_EMIT(sc, miirom); 2223 } 2224 2225 /* Shift in address. */ 2226 for (x = sc->sc_srom_addrbits; x > 0; x--) { 2227 if (i & (1 << x)) 2228 miirom |= MIIROM_SROMDI; 2229 else 2230 miirom &= ~MIIROM_SROMDI; 2231 SROM_EMIT(sc, miirom); 2232 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2233 SROM_EMIT(sc, miirom); 2234 } 2235 2236 /* Shift out data. */ 2237 miirom &= ~MIIROM_SROMDI; 2238 datain = 0; 2239 for (x = 16; x > 0; x--) { 2240 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2241 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2242 datain |= (1 << (x - 1)); 2243 SROM_EMIT(sc, miirom); 2244 } 2245 sc->sc_srom[i] = datain & 0xff; 2246 sc->sc_srom[i + 1] = datain >> 8; 2247 2248 /* Clear CHIP SELECT. */ 2249 miirom &= ~MIIROM_SROMCS; 2250 SROM_EMIT(sc, miirom); 2251 } 2252 2253 /* Deselect the SROM. */ 2254 SROM_EMIT(sc, 0); 2255 2256 /* ...and idle it. */ 2257 tlp_srom_idle(sc); 2258 2259 if (tlp_srom_debug) { 2260 printf("SROM CONTENTS:"); 2261 for (i = 0; i < size; i++) { 2262 if ((i % 8) == 0) 2263 printf("\n\t"); 2264 printf("0x%02x ", sc->sc_srom[i]); 2265 } 2266 printf("\n"); 2267 } 2268 2269 return (1); 2270 } 2271 2272 #undef SROM_EMIT 2273 2274 /* 2275 * tlp_add_rxbuf: 2276 * 2277 * Add a receive buffer to the indicated descriptor. 2278 */ 2279 int 2280 tlp_add_rxbuf(sc, idx) 2281 struct tulip_softc *sc; 2282 int idx; 2283 { 2284 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 2285 struct mbuf *m; 2286 int error; 2287 2288 MGETHDR(m, M_DONTWAIT, MT_DATA); 2289 if (m == NULL) 2290 return (ENOBUFS); 2291 2292 MCLGET(m, M_DONTWAIT); 2293 if ((m->m_flags & M_EXT) == 0) { 2294 m_freem(m); 2295 return (ENOBUFS); 2296 } 2297 2298 if (rxs->rxs_mbuf != NULL) 2299 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 2300 2301 rxs->rxs_mbuf = m; 2302 2303 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 2304 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 2305 if (error) { 2306 printf("%s: can't load rx DMA map %d, error = %d\n", 2307 sc->sc_dev.dv_xname, idx, error); 2308 panic("tlp_add_rxbuf"); /* XXX */ 2309 } 2310 2311 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 2312 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 2313 2314 TULIP_INIT_RXDESC(sc, idx); 2315 2316 return (0); 2317 } 2318 2319 /* 2320 * tlp_srom_crcok: 2321 * 2322 * Check the CRC of the Tulip SROM. 2323 */ 2324 int 2325 tlp_srom_crcok(romdata) 2326 const u_int8_t *romdata; 2327 { 2328 u_int32_t crc; 2329 2330 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM); 2331 crc = (crc & 0xffff) ^ 0xffff; 2332 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 2333 return (1); 2334 2335 /* 2336 * Try an alternate checksum. 2337 */ 2338 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1); 2339 crc = (crc & 0xffff) ^ 0xffff; 2340 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1)) 2341 return (1); 2342 2343 return (0); 2344 } 2345 2346 /* 2347 * tlp_isv_srom: 2348 * 2349 * Check to see if the SROM is in the new standardized format. 2350 */ 2351 int 2352 tlp_isv_srom(romdata) 2353 const u_int8_t *romdata; 2354 { 2355 int i; 2356 u_int16_t cksum; 2357 2358 if (tlp_srom_crcok(romdata)) { 2359 /* 2360 * SROM CRC checks out; must be in the new format. 2361 */ 2362 return (1); 2363 } 2364 2365 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); 2366 if (cksum == 0xffff || cksum == 0) { 2367 /* 2368 * No checksum present. Check the SROM ID; 18 bytes of 0 2369 * followed by 1 (version) followed by the number of 2370 * adapters which use this SROM (should be non-zero). 2371 */ 2372 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { 2373 if (romdata[i] != 0) 2374 return (0); 2375 } 2376 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) 2377 return (0); 2378 if (romdata[TULIP_ROM_CHIP_COUNT] == 0) 2379 return (0); 2380 return (1); 2381 } 2382 2383 return (0); 2384 } 2385 2386 /* 2387 * tlp_isv_srom_enaddr: 2388 * 2389 * Get the Ethernet address from an ISV SROM. 2390 */ 2391 int 2392 tlp_isv_srom_enaddr(sc, enaddr) 2393 struct tulip_softc *sc; 2394 u_int8_t *enaddr; 2395 { 2396 int i, devcnt; 2397 2398 if (tlp_isv_srom(sc->sc_srom) == 0) 2399 return (0); 2400 2401 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 2402 for (i = 0; i < devcnt; i++) { 2403 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 2404 break; 2405 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 2406 sc->sc_devno) 2407 break; 2408 } 2409 2410 if (i == devcnt) 2411 return (0); 2412 2413 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], 2414 ETHER_ADDR_LEN); 2415 enaddr[5] += i; 2416 2417 return (1); 2418 } 2419 2420 /* 2421 * tlp_parse_old_srom: 2422 * 2423 * Parse old-format SROMs. 2424 * 2425 * This routine is largely lifted from Matt Thomas's `de' driver. 2426 */ 2427 int 2428 tlp_parse_old_srom(sc, enaddr) 2429 struct tulip_softc *sc; 2430 u_int8_t *enaddr; 2431 { 2432 static const u_int8_t testpat[] = 2433 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 2434 int i; 2435 u_int32_t cksum; 2436 2437 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 2438 /* 2439 * Some vendors (e.g. ZNYX) don't use the standard 2440 * DEC Address ROM format, but rather just have an 2441 * Ethernet address in the first 6 bytes, maybe a 2442 * 2 byte checksum, and then all 0xff's. 2443 * 2444 * On the other hand, Cobalt Networks interfaces 2445 * simply have the address in the first six bytes 2446 * with the rest zeroed out. 2447 */ 2448 for (i = 8; i < 32; i++) { 2449 if (sc->sc_srom[i] != 0xff && 2450 sc->sc_srom[i] != 0) 2451 return (0); 2452 } 2453 2454 /* 2455 * Sanity check the Ethernet address: 2456 * 2457 * - Make sure it's not multicast or locally 2458 * assigned 2459 * - Make sure it has a non-0 OUI 2460 */ 2461 if (sc->sc_srom[0] & 3) 2462 return (0); 2463 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 2464 sc->sc_srom[2] == 0) 2465 return (0); 2466 2467 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2468 return (1); 2469 } 2470 2471 /* 2472 * Standard DEC Address ROM test. 2473 */ 2474 2475 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 2476 return (0); 2477 2478 for (i = 0; i < 8; i++) { 2479 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 2480 return (0); 2481 } 2482 2483 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2484 2485 cksum = *(u_int16_t *) &enaddr[0]; 2486 2487 cksum <<= 1; 2488 if (cksum > 0xffff) 2489 cksum -= 0xffff; 2490 2491 cksum += *(u_int16_t *) &enaddr[2]; 2492 if (cksum > 0xffff) 2493 cksum -= 0xffff; 2494 2495 cksum <<= 1; 2496 if (cksum > 0xffff) 2497 cksum -= 0xffff; 2498 2499 cksum += *(u_int16_t *) &enaddr[4]; 2500 if (cksum >= 0xffff) 2501 cksum -= 0xffff; 2502 2503 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 2504 return (0); 2505 2506 return (1); 2507 } 2508 2509 /* 2510 * tlp_filter_setup: 2511 * 2512 * Set the Tulip's receive filter. 2513 */ 2514 void 2515 tlp_filter_setup(sc) 2516 struct tulip_softc *sc; 2517 { 2518 struct ethercom *ec = &sc->sc_ethercom; 2519 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2520 struct ether_multi *enm; 2521 struct ether_multistep step; 2522 __volatile u_int32_t *sp; 2523 struct tulip_txsoft *txs; 2524 u_int8_t enaddr[ETHER_ADDR_LEN]; 2525 u_int32_t hash, hashsize; 2526 int cnt; 2527 2528 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 2529 sc->sc_dev.dv_xname, sc->sc_flags)); 2530 2531 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 2532 2533 /* 2534 * If there are transmissions pending, wait until they have 2535 * completed. 2536 */ 2537 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 2538 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 2539 sc->sc_flags |= TULIPF_WANT_SETUP; 2540 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 2541 sc->sc_dev.dv_xname)); 2542 return; 2543 } 2544 sc->sc_flags &= ~TULIPF_WANT_SETUP; 2545 2546 switch (sc->sc_chip) { 2547 case TULIP_CHIP_82C115: 2548 hashsize = TULIP_PNICII_HASHSIZE; 2549 break; 2550 2551 default: 2552 hashsize = TULIP_MCHASHSIZE; 2553 } 2554 2555 /* 2556 * If we're running, idle the transmit and receive engines. If 2557 * we're NOT running, we're being called from tlp_init(), and our 2558 * writing OPMODE will start the transmit and receive processes 2559 * in motion. 2560 */ 2561 if (ifp->if_flags & IFF_RUNNING) 2562 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2563 2564 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2565 2566 if (ifp->if_flags & IFF_PROMISC) { 2567 sc->sc_opmode |= OPMODE_PR; 2568 goto allmulti; 2569 } 2570 2571 /* 2572 * Try Perfect filtering first. 2573 */ 2574 2575 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2576 sp = TULIP_CDSP(sc); 2577 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2578 cnt = 0; 2579 ETHER_FIRST_MULTI(step, ec, enm); 2580 while (enm != NULL) { 2581 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2582 /* 2583 * We must listen to a range of multicast addresses. 2584 * For now, just accept all multicasts, rather than 2585 * trying to set only those filter bits needed to match 2586 * the range. (At this time, the only use of address 2587 * ranges is for IP multicast routing, for which the 2588 * range is big enough to require all bits set.) 2589 */ 2590 goto allmulti; 2591 } 2592 if (cnt == (TULIP_MAXADDRS - 2)) { 2593 /* 2594 * We already have our multicast limit (still need 2595 * our station address and broadcast). Go to 2596 * Hash-Perfect mode. 2597 */ 2598 goto hashperfect; 2599 } 2600 cnt++; 2601 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0); 2602 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1); 2603 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2); 2604 ETHER_NEXT_MULTI(step, enm); 2605 } 2606 2607 if (ifp->if_flags & IFF_BROADCAST) { 2608 /* ...and the broadcast address. */ 2609 cnt++; 2610 *sp++ = TULIP_SP_FIELD_C(0xffff); 2611 *sp++ = TULIP_SP_FIELD_C(0xffff); 2612 *sp++ = TULIP_SP_FIELD_C(0xffff); 2613 } 2614 2615 /* Pad the rest with our station address. */ 2616 for (; cnt < TULIP_MAXADDRS; cnt++) { 2617 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2618 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2619 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2620 } 2621 ifp->if_flags &= ~IFF_ALLMULTI; 2622 goto setit; 2623 2624 hashperfect: 2625 /* 2626 * Try Hash-Perfect mode. 2627 */ 2628 2629 /* 2630 * Some 21140 chips have broken Hash-Perfect modes. On these 2631 * chips, we simply use Hash-Only mode, and put our station 2632 * address into the filter. 2633 */ 2634 if (sc->sc_chip == TULIP_CHIP_21140) 2635 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2636 else 2637 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2638 sp = TULIP_CDSP(sc); 2639 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2640 ETHER_FIRST_MULTI(step, ec, enm); 2641 while (enm != NULL) { 2642 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2643 /* 2644 * We must listen to a range of multicast addresses. 2645 * For now, just accept all multicasts, rather than 2646 * trying to set only those filter bits needed to match 2647 * the range. (At this time, the only use of address 2648 * ranges is for IP multicast routing, for which the 2649 * range is big enough to require all bits set.) 2650 */ 2651 goto allmulti; 2652 } 2653 hash = tlp_mchash(enm->enm_addrlo, hashsize); 2654 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2655 ETHER_NEXT_MULTI(step, enm); 2656 } 2657 2658 if (ifp->if_flags & IFF_BROADCAST) { 2659 /* ...and the broadcast address. */ 2660 hash = tlp_mchash(etherbroadcastaddr, hashsize); 2661 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2662 } 2663 2664 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2665 /* ...and our station address. */ 2666 hash = tlp_mchash(enaddr, hashsize); 2667 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2668 } else { 2669 /* 2670 * Hash-Perfect mode; put our station address after 2671 * the hash table. 2672 */ 2673 sp[39] = TULIP_SP_FIELD(enaddr, 0); 2674 sp[40] = TULIP_SP_FIELD(enaddr, 1); 2675 sp[41] = TULIP_SP_FIELD(enaddr, 2); 2676 } 2677 ifp->if_flags &= ~IFF_ALLMULTI; 2678 goto setit; 2679 2680 allmulti: 2681 /* 2682 * Use Perfect filter mode. First address is the broadcast address, 2683 * and pad the rest with our station address. We'll set Pass-all- 2684 * multicast in OPMODE below. 2685 */ 2686 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2687 sp = TULIP_CDSP(sc); 2688 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2689 cnt = 0; 2690 if (ifp->if_flags & IFF_BROADCAST) { 2691 cnt++; 2692 *sp++ = TULIP_SP_FIELD_C(0xffff); 2693 *sp++ = TULIP_SP_FIELD_C(0xffff); 2694 *sp++ = TULIP_SP_FIELD_C(0xffff); 2695 } 2696 for (; cnt < TULIP_MAXADDRS; cnt++) { 2697 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2698 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2699 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2700 } 2701 ifp->if_flags |= IFF_ALLMULTI; 2702 2703 setit: 2704 if (ifp->if_flags & IFF_ALLMULTI) 2705 sc->sc_opmode |= OPMODE_PM; 2706 2707 /* Sync the setup packet buffer. */ 2708 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2709 2710 /* 2711 * Fill in the setup packet descriptor. 2712 */ 2713 txs = SIMPLEQ_FIRST(&sc->sc_txfreeq); 2714 2715 txs->txs_firstdesc = sc->sc_txnext; 2716 txs->txs_lastdesc = sc->sc_txnext; 2717 txs->txs_ndescs = 1; 2718 txs->txs_mbuf = NULL; 2719 2720 sc->sc_txdescs[sc->sc_txnext].td_bufaddr1 = 2721 htole32(TULIP_CDSPADDR(sc)); 2722 sc->sc_txdescs[sc->sc_txnext].td_ctl = 2723 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2724 sc->sc_filtmode | TDCTL_Tx_SET | sc->sc_setup_fsls | 2725 TDCTL_Tx_IC | sc->sc_tdctl_ch | 2726 (sc->sc_txnext == (TULIP_NTXDESC - 1) ? sc->sc_tdctl_er : 0)); 2727 sc->sc_txdescs[sc->sc_txnext].td_status = htole32(TDSTAT_OWN); 2728 TULIP_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndescs, 2729 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2730 2731 /* Advance the tx pointer. */ 2732 sc->sc_txfree -= 1; 2733 sc->sc_txnext = TULIP_NEXTTX(sc->sc_txnext); 2734 2735 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 2736 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 2737 2738 /* 2739 * Set the OPMODE register. This will also resume the 2740 * transmit transmit process we idled above. 2741 */ 2742 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2743 2744 sc->sc_flags |= TULIPF_DOING_SETUP; 2745 2746 /* 2747 * Kick the transmitter; this will cause the Tulip to 2748 * read the setup descriptor. 2749 */ 2750 /* XXX USE AUTOPOLLING? */ 2751 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2752 2753 /* Set up a watchdog timer in case the chip flakes out. */ 2754 ifp->if_timer = 5; 2755 2756 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2757 } 2758 2759 /* 2760 * tlp_winb_filter_setup: 2761 * 2762 * Set the Winbond 89C840F's receive filter. 2763 */ 2764 void 2765 tlp_winb_filter_setup(sc) 2766 struct tulip_softc *sc; 2767 { 2768 struct ethercom *ec = &sc->sc_ethercom; 2769 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2770 struct ether_multi *enm; 2771 struct ether_multistep step; 2772 u_int32_t hash, mchash[2]; 2773 2774 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2775 sc->sc_dev.dv_xname, sc->sc_flags)); 2776 2777 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2778 2779 if (ifp->if_flags & IFF_MULTICAST) 2780 sc->sc_opmode |= OPMODE_WINB_AMP; 2781 2782 if (ifp->if_flags & IFF_BROADCAST) 2783 sc->sc_opmode |= OPMODE_WINB_ABP; 2784 2785 if (ifp->if_flags & IFF_PROMISC) { 2786 sc->sc_opmode |= OPMODE_WINB_APP; 2787 goto allmulti; 2788 } 2789 2790 mchash[0] = mchash[1] = 0; 2791 2792 ETHER_FIRST_MULTI(step, ec, enm); 2793 while (enm != NULL) { 2794 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2795 /* 2796 * We must listen to a range of multicast addresses. 2797 * For now, just accept all multicasts, rather than 2798 * trying to set only those filter bits needed to match 2799 * the range. (At this time, the only use of address 2800 * ranges is for IP multicast routing, for which the 2801 * range is big enough to require all bits set.) 2802 */ 2803 goto allmulti; 2804 } 2805 2806 /* 2807 * According to the FreeBSD `wb' driver, yes, you 2808 * really do invert the hash. 2809 */ 2810 hash = 2811 (~(ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2812 & 0x3f; 2813 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2814 ETHER_NEXT_MULTI(step, enm); 2815 } 2816 ifp->if_flags &= ~IFF_ALLMULTI; 2817 goto setit; 2818 2819 allmulti: 2820 ifp->if_flags |= IFF_ALLMULTI; 2821 mchash[0] = mchash[1] = 0xffffffff; 2822 2823 setit: 2824 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2825 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2826 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2827 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2828 sc->sc_dev.dv_xname)); 2829 } 2830 2831 /* 2832 * tlp_al981_filter_setup: 2833 * 2834 * Set the ADMtek AL981's receive filter. 2835 */ 2836 void 2837 tlp_al981_filter_setup(sc) 2838 struct tulip_softc *sc; 2839 { 2840 struct ethercom *ec = &sc->sc_ethercom; 2841 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2842 struct ether_multi *enm; 2843 struct ether_multistep step; 2844 u_int32_t hash, mchash[2]; 2845 2846 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n", 2847 sc->sc_dev.dv_xname, sc->sc_flags)); 2848 2849 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2850 2851 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2852 2853 if (ifp->if_flags & IFF_PROMISC) { 2854 sc->sc_opmode |= OPMODE_PR; 2855 goto allmulti; 2856 } 2857 2858 mchash[0] = mchash[1] = 0; 2859 2860 ETHER_FIRST_MULTI(step, ec, enm); 2861 while (enm != NULL) { 2862 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2863 /* 2864 * We must listen to a range of multicast addresses. 2865 * For now, just accept all multicasts, rather than 2866 * trying to set only those filter bits needed to match 2867 * the range. (At this time, the only use of address 2868 * ranges is for IP multicast routing, for which the 2869 * range is big enough to require all bits set.) 2870 */ 2871 goto allmulti; 2872 } 2873 2874 hash = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26; 2875 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2876 ETHER_NEXT_MULTI(step, enm); 2877 } 2878 ifp->if_flags &= ~IFF_ALLMULTI; 2879 goto setit; 2880 2881 allmulti: 2882 ifp->if_flags |= IFF_ALLMULTI; 2883 mchash[0] = mchash[1] = 0xffffffff; 2884 2885 setit: 2886 TULIP_WRITE(sc, CSR_ADM_MAR0, mchash[0]); 2887 TULIP_WRITE(sc, CSR_ADM_MAR1, mchash[1]); 2888 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2889 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n", 2890 sc->sc_dev.dv_xname)); 2891 } 2892 2893 /* 2894 * tlp_idle: 2895 * 2896 * Cause the transmit and/or receive processes to go idle. 2897 */ 2898 void 2899 tlp_idle(sc, bits) 2900 struct tulip_softc *sc; 2901 u_int32_t bits; 2902 { 2903 static const char *tlp_tx_state_names[] = { 2904 "STOPPED", 2905 "RUNNING - FETCH", 2906 "RUNNING - WAIT", 2907 "RUNNING - READING", 2908 "-- RESERVED --", 2909 "RUNNING - SETUP", 2910 "SUSPENDED", 2911 "RUNNING - CLOSE", 2912 }; 2913 static const char *tlp_rx_state_names[] = { 2914 "STOPPED", 2915 "RUNNING - FETCH", 2916 "RUNNING - CHECK", 2917 "RUNNING - WAIT", 2918 "SUSPENDED", 2919 "RUNNING - CLOSE", 2920 "RUNNING - FLUSH", 2921 "RUNNING - QUEUE", 2922 }; 2923 static const char *dm9102_tx_state_names[] = { 2924 "STOPPED", 2925 "RUNNING - FETCH", 2926 "RUNNING - SETUP", 2927 "RUNNING - READING", 2928 "RUNNING - CLOSE - CLEAR OWNER", 2929 "RUNNING - WAIT", 2930 "RUNNING - CLOSE - WRITE STATUS", 2931 "SUSPENDED", 2932 }; 2933 static const char *dm9102_rx_state_names[] = { 2934 "STOPPED", 2935 "RUNNING - FETCH", 2936 "RUNNING - WAIT", 2937 "RUNNING - QUEUE", 2938 "RUNNING - CLOSE - CLEAR OWNER", 2939 "RUNNING - CLOSE - WRITE STATUS", 2940 "SUSPENDED", 2941 "RUNNING - FLUSH", 2942 }; 2943 2944 const char **tx_state_names, **rx_state_names; 2945 u_int32_t csr, ackmask = 0; 2946 int i; 2947 2948 switch (sc->sc_chip) { 2949 case TULIP_CHIP_DM9102: 2950 case TULIP_CHIP_DM9102A: 2951 tx_state_names = dm9102_tx_state_names; 2952 rx_state_names = dm9102_rx_state_names; 2953 break; 2954 2955 default: 2956 tx_state_names = tlp_tx_state_names; 2957 rx_state_names = tlp_rx_state_names; 2958 break; 2959 } 2960 2961 if (bits & OPMODE_ST) 2962 ackmask |= STATUS_TPS; 2963 2964 if (bits & OPMODE_SR) 2965 ackmask |= STATUS_RPS; 2966 2967 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2968 2969 for (i = 0; i < 1000; i++) { 2970 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2971 break; 2972 delay(10); 2973 } 2974 2975 csr = TULIP_READ(sc, CSR_STATUS); 2976 if ((csr & ackmask) != ackmask) { 2977 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2978 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2979 printf("%s: transmit process failed to idle: " 2980 "state %s\n", sc->sc_dev.dv_xname, 2981 tx_state_names[(csr & STATUS_TS) >> 20]); 2982 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2983 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2984 printf("%s: receive process failed to idle: " 2985 "state %s\n", sc->sc_dev.dv_xname, 2986 rx_state_names[(csr & STATUS_RS) >> 17]); 2987 } 2988 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2989 } 2990 2991 /***************************************************************************** 2992 * Generic media support functions. 2993 *****************************************************************************/ 2994 2995 /* 2996 * tlp_mediastatus: [ifmedia interface function] 2997 * 2998 * Query the current media. 2999 */ 3000 void 3001 tlp_mediastatus(ifp, ifmr) 3002 struct ifnet *ifp; 3003 struct ifmediareq *ifmr; 3004 { 3005 struct tulip_softc *sc = ifp->if_softc; 3006 3007 if (TULIP_IS_ENABLED(sc) == 0) { 3008 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 3009 ifmr->ifm_status = 0; 3010 return; 3011 } 3012 3013 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 3014 } 3015 3016 /* 3017 * tlp_mediachange: [ifmedia interface function] 3018 * 3019 * Update the current media. 3020 */ 3021 int 3022 tlp_mediachange(ifp) 3023 struct ifnet *ifp; 3024 { 3025 struct tulip_softc *sc = ifp->if_softc; 3026 3027 if ((ifp->if_flags & IFF_UP) == 0) 3028 return (0); 3029 return ((*sc->sc_mediasw->tmsw_set)(sc)); 3030 } 3031 3032 /***************************************************************************** 3033 * Support functions for MII-attached media. 3034 *****************************************************************************/ 3035 3036 /* 3037 * tlp_mii_tick: 3038 * 3039 * One second timer, used to tick the MII. 3040 */ 3041 void 3042 tlp_mii_tick(arg) 3043 void *arg; 3044 { 3045 struct tulip_softc *sc = arg; 3046 int s; 3047 3048 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 3049 return; 3050 3051 s = splnet(); 3052 mii_tick(&sc->sc_mii); 3053 splx(s); 3054 3055 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 3056 } 3057 3058 /* 3059 * tlp_mii_statchg: [mii interface function] 3060 * 3061 * Callback from PHY when media changes. 3062 */ 3063 void 3064 tlp_mii_statchg(self) 3065 struct device *self; 3066 { 3067 struct tulip_softc *sc = (struct tulip_softc *)self; 3068 3069 /* Idle the transmit and receive processes. */ 3070 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3071 3072 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD); 3073 3074 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 3075 sc->sc_opmode |= OPMODE_TTM; 3076 else 3077 sc->sc_opmode |= OPMODE_HBD; 3078 3079 if (sc->sc_mii.mii_media_active & IFM_FDX) 3080 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 3081 3082 /* 3083 * Write new OPMODE bits. This also restarts the transmit 3084 * and receive processes. 3085 */ 3086 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3087 } 3088 3089 /* 3090 * tlp_winb_mii_statchg: [mii interface function] 3091 * 3092 * Callback from PHY when media changes. This version is 3093 * for the Winbond 89C840F, which has different OPMODE bits. 3094 */ 3095 void 3096 tlp_winb_mii_statchg(self) 3097 struct device *self; 3098 { 3099 struct tulip_softc *sc = (struct tulip_softc *)self; 3100 3101 /* Idle the transmit and receive processes. */ 3102 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3103 3104 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 3105 3106 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 3107 sc->sc_opmode |= OPMODE_WINB_FES; 3108 3109 if (sc->sc_mii.mii_media_active & IFM_FDX) 3110 sc->sc_opmode |= OPMODE_FD; 3111 3112 /* 3113 * Write new OPMODE bits. This also restarts the transmit 3114 * and receive processes. 3115 */ 3116 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3117 } 3118 3119 /* 3120 * tlp_dm9102_mii_statchg: [mii interface function] 3121 * 3122 * Callback from PHY when media changes. This version is 3123 * for the DM9102. 3124 */ 3125 void 3126 tlp_dm9102_mii_statchg(self) 3127 struct device *self; 3128 { 3129 struct tulip_softc *sc = (struct tulip_softc *)self; 3130 3131 /* 3132 * Don't idle the transmit and receive processes, here. It 3133 * seems to fail, and just causes excess noise. 3134 */ 3135 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 3136 3137 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) != IFM_100_TX) 3138 sc->sc_opmode |= OPMODE_TTM; 3139 3140 if (sc->sc_mii.mii_media_active & IFM_FDX) 3141 sc->sc_opmode |= OPMODE_FD; 3142 3143 /* 3144 * Write new OPMODE bits. 3145 */ 3146 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3147 } 3148 3149 /* 3150 * tlp_mii_getmedia: 3151 * 3152 * Callback from ifmedia to request current media status. 3153 */ 3154 void 3155 tlp_mii_getmedia(sc, ifmr) 3156 struct tulip_softc *sc; 3157 struct ifmediareq *ifmr; 3158 { 3159 3160 mii_pollstat(&sc->sc_mii); 3161 ifmr->ifm_status = sc->sc_mii.mii_media_status; 3162 ifmr->ifm_active = sc->sc_mii.mii_media_active; 3163 } 3164 3165 /* 3166 * tlp_mii_setmedia: 3167 * 3168 * Callback from ifmedia to request new media setting. 3169 */ 3170 int 3171 tlp_mii_setmedia(sc) 3172 struct tulip_softc *sc; 3173 { 3174 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3175 3176 if (ifp->if_flags & IFF_UP) { 3177 switch (sc->sc_chip) { 3178 case TULIP_CHIP_21142: 3179 case TULIP_CHIP_21143: 3180 /* Disable the internal Nway engine. */ 3181 TULIP_WRITE(sc, CSR_SIATXRX, 0); 3182 break; 3183 3184 default: 3185 /* Nothing. */ 3186 } 3187 mii_mediachg(&sc->sc_mii); 3188 } 3189 return (0); 3190 } 3191 3192 /* 3193 * tlp_bitbang_mii_readreg: 3194 * 3195 * Read a PHY register via bit-bang'ing the MII. 3196 */ 3197 int 3198 tlp_bitbang_mii_readreg(self, phy, reg) 3199 struct device *self; 3200 int phy, reg; 3201 { 3202 struct tulip_softc *sc = (void *) self; 3203 3204 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg)); 3205 } 3206 3207 /* 3208 * tlp_bitbang_mii_writereg: 3209 * 3210 * Write a PHY register via bit-bang'ing the MII. 3211 */ 3212 void 3213 tlp_bitbang_mii_writereg(self, phy, reg, val) 3214 struct device *self; 3215 int phy, reg, val; 3216 { 3217 struct tulip_softc *sc = (void *) self; 3218 3219 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val); 3220 } 3221 3222 /* 3223 * tlp_sio_mii_bitbang_read: 3224 * 3225 * Read the MII serial port for the MII bit-bang module. 3226 */ 3227 u_int32_t 3228 tlp_sio_mii_bitbang_read(self) 3229 struct device *self; 3230 { 3231 struct tulip_softc *sc = (void *) self; 3232 3233 return (TULIP_READ(sc, CSR_MIIROM)); 3234 } 3235 3236 /* 3237 * tlp_sio_mii_bitbang_write: 3238 * 3239 * Write the MII serial port for the MII bit-bang module. 3240 */ 3241 void 3242 tlp_sio_mii_bitbang_write(self, val) 3243 struct device *self; 3244 u_int32_t val; 3245 { 3246 struct tulip_softc *sc = (void *) self; 3247 3248 TULIP_WRITE(sc, CSR_MIIROM, val); 3249 } 3250 3251 /* 3252 * tlp_pnic_mii_readreg: 3253 * 3254 * Read a PHY register on the Lite-On PNIC. 3255 */ 3256 int 3257 tlp_pnic_mii_readreg(self, phy, reg) 3258 struct device *self; 3259 int phy, reg; 3260 { 3261 struct tulip_softc *sc = (void *) self; 3262 u_int32_t val; 3263 int i; 3264 3265 TULIP_WRITE(sc, CSR_PNIC_MII, 3266 PNIC_MII_MBO | PNIC_MII_RESERVED | 3267 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 3268 (reg << PNIC_MII_REGSHIFT)); 3269 3270 for (i = 0; i < 1000; i++) { 3271 delay(10); 3272 val = TULIP_READ(sc, CSR_PNIC_MII); 3273 if ((val & PNIC_MII_BUSY) == 0) { 3274 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 3275 return (0); 3276 else 3277 return (val & PNIC_MII_DATA); 3278 } 3279 } 3280 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 3281 return (0); 3282 } 3283 3284 /* 3285 * tlp_pnic_mii_writereg: 3286 * 3287 * Write a PHY register on the Lite-On PNIC. 3288 */ 3289 void 3290 tlp_pnic_mii_writereg(self, phy, reg, val) 3291 struct device *self; 3292 int phy, reg, val; 3293 { 3294 struct tulip_softc *sc = (void *) self; 3295 int i; 3296 3297 TULIP_WRITE(sc, CSR_PNIC_MII, 3298 PNIC_MII_MBO | PNIC_MII_RESERVED | 3299 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 3300 (reg << PNIC_MII_REGSHIFT) | val); 3301 3302 for (i = 0; i < 1000; i++) { 3303 delay(10); 3304 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 3305 return; 3306 } 3307 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 3308 } 3309 3310 const bus_addr_t tlp_al981_phy_regmap[] = { 3311 CSR_ADM_BMCR, 3312 CSR_ADM_BMSR, 3313 CSR_ADM_PHYIDR1, 3314 CSR_ADM_PHYIDR2, 3315 CSR_ADM_ANAR, 3316 CSR_ADM_ANLPAR, 3317 CSR_ADM_ANER, 3318 3319 CSR_ADM_XMC, 3320 CSR_ADM_XCIIS, 3321 CSR_ADM_XIE, 3322 CSR_ADM_100CTR, 3323 }; 3324 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) / 3325 sizeof(tlp_al981_phy_regmap[0]); 3326 3327 /* 3328 * tlp_al981_mii_readreg: 3329 * 3330 * Read a PHY register on the ADMtek AL981. 3331 */ 3332 int 3333 tlp_al981_mii_readreg(self, phy, reg) 3334 struct device *self; 3335 int phy, reg; 3336 { 3337 struct tulip_softc *sc = (struct tulip_softc *)self; 3338 3339 /* AL981 only has an internal PHY. */ 3340 if (phy != 0) 3341 return (0); 3342 3343 if (reg >= tlp_al981_phy_regmap_size) 3344 return (0); 3345 3346 return (bus_space_read_4(sc->sc_st, sc->sc_sh, 3347 tlp_al981_phy_regmap[reg]) & 0xffff); 3348 } 3349 3350 /* 3351 * tlp_al981_mii_writereg: 3352 * 3353 * Write a PHY register on the ADMtek AL981. 3354 */ 3355 void 3356 tlp_al981_mii_writereg(self, phy, reg, val) 3357 struct device *self; 3358 int phy, reg, val; 3359 { 3360 struct tulip_softc *sc = (struct tulip_softc *)self; 3361 3362 /* AL981 only has an internal PHY. */ 3363 if (phy != 0) 3364 return; 3365 3366 if (reg >= tlp_al981_phy_regmap_size) 3367 return; 3368 3369 bus_space_write_4(sc->sc_st, sc->sc_sh, 3370 tlp_al981_phy_regmap[reg], val); 3371 } 3372 3373 /***************************************************************************** 3374 * Chip-specific pre-init and reset functions. 3375 *****************************************************************************/ 3376 3377 /* 3378 * tlp_2114x_preinit: 3379 * 3380 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3381 */ 3382 void 3383 tlp_2114x_preinit(sc) 3384 struct tulip_softc *sc; 3385 { 3386 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3387 struct tulip_21x4x_media *tm = ife->ifm_aux; 3388 3389 /* 3390 * Whether or not we're in MII or SIA/SYM mode, the media info 3391 * contains the appropriate OPMODE bits. 3392 * 3393 * Note that if we have no media info, we are are doing 3394 * non-MII `auto'. 3395 * 3396 * Also, we always set the Must-Be-One bit. 3397 */ 3398 if (tm == NULL) { 3399 #ifdef DIAGNOSTIC 3400 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3401 panic("tlp_2114x_preinit: not IFM_AUTO"); 3402 if (sc->sc_nway_active == NULL) 3403 panic("tlp_2114x_preinit: nway_active NULL"); 3404 #endif 3405 tm = sc->sc_nway_active->ifm_aux; 3406 } 3407 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode; 3408 3409 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3410 } 3411 3412 /* 3413 * tlp_2114x_mii_preinit: 3414 * 3415 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3416 * This version is used by boards which only have MII and don't have 3417 * an ISV SROM. 3418 */ 3419 void 3420 tlp_2114x_mii_preinit(sc) 3421 struct tulip_softc *sc; 3422 { 3423 3424 /* 3425 * Always set the Must-Be-One bit, and Port Select (to select MII). 3426 * We'll never be called during a media change. 3427 */ 3428 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS; 3429 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3430 } 3431 3432 /* 3433 * tlp_pnic_preinit: 3434 * 3435 * Pre-init function for the Lite-On 82c168 and 82c169. 3436 */ 3437 void 3438 tlp_pnic_preinit(sc) 3439 struct tulip_softc *sc; 3440 { 3441 3442 if (sc->sc_flags & TULIPF_HAS_MII) { 3443 /* 3444 * MII case: just set the port-select bit; we will never 3445 * be called during a media change. 3446 */ 3447 sc->sc_opmode |= OPMODE_PS; 3448 } else { 3449 /* 3450 * ENDEC/PCS/Nway mode; enable the Tx backoff counter. 3451 */ 3452 sc->sc_opmode |= OPMODE_PNIC_TBEN; 3453 } 3454 } 3455 3456 /* 3457 * tlp_dm9102_preinit: 3458 * 3459 * Pre-init function for the Davicom DM9102. 3460 */ 3461 void 3462 tlp_dm9102_preinit(sc) 3463 struct tulip_softc *sc; 3464 { 3465 3466 switch (sc->sc_chip) { 3467 case TULIP_CHIP_DM9102: 3468 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 3469 break; 3470 3471 case TULIP_CHIP_DM9102A: 3472 /* 3473 * XXX Figure out how to actually deal with the HomePNA 3474 * XXX portion of the DM9102A. 3475 */ 3476 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD; 3477 break; 3478 3479 default: 3480 /* Nothing. */ 3481 } 3482 3483 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3484 } 3485 3486 /* 3487 * tlp_21140_reset: 3488 * 3489 * Issue a reset sequence on the 21140 via the GPIO facility. 3490 */ 3491 void 3492 tlp_21140_reset(sc) 3493 struct tulip_softc *sc; 3494 { 3495 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3496 struct tulip_21x4x_media *tm = ife->ifm_aux; 3497 int i; 3498 3499 /* First, set the direction on the GPIO pins. */ 3500 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 3501 3502 /* Now, issue the reset sequence. */ 3503 for (i = 0; i < tm->tm_reset_length; i++) { 3504 delay(10); 3505 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]); 3506 } 3507 3508 /* Now, issue the selection sequence. */ 3509 for (i = 0; i < tm->tm_gp_length; i++) { 3510 delay(10); 3511 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]); 3512 } 3513 3514 /* If there were no sequences, just lower the pins. */ 3515 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) 3516 TULIP_WRITE(sc, CSR_GPP, 0); 3517 } 3518 3519 /* 3520 * tlp_21142_reset: 3521 * 3522 * Issue a reset sequence on the 21142 via the GPIO facility. 3523 */ 3524 void 3525 tlp_21142_reset(sc) 3526 struct tulip_softc *sc; 3527 { 3528 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3529 struct tulip_21x4x_media *tm = ife->ifm_aux; 3530 const u_int8_t *ncp; 3531 int i; 3532 3533 ncp = &sc->sc_srom[tm->tm_reset_offset]; 3534 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 3535 delay(10); 3536 TULIP_WRITE(sc, CSR_SIAGEN, 3537 TULIP_ROM_GETW(ncp, 0) << 16); 3538 } 3539 3540 ncp = &sc->sc_srom[tm->tm_gp_offset]; 3541 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 3542 delay(10); 3543 TULIP_WRITE(sc, CSR_SIAGEN, 3544 TULIP_ROM_GETW(ncp, 0) << 16); 3545 } 3546 3547 /* If there were no sequences, just lower the pins. */ 3548 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 3549 delay(10); 3550 TULIP_WRITE(sc, CSR_SIAGEN, 0); 3551 } 3552 } 3553 3554 /* 3555 * tlp_pmac_reset: 3556 * 3557 * Reset routine for Macronix chips. 3558 */ 3559 void 3560 tlp_pmac_reset(sc) 3561 struct tulip_softc *sc; 3562 { 3563 3564 switch (sc->sc_chip) { 3565 case TULIP_CHIP_82C115: 3566 case TULIP_CHIP_MX98715: 3567 case TULIP_CHIP_MX98715A: 3568 case TULIP_CHIP_MX98725: 3569 /* 3570 * Set the LED operating mode. This information is located 3571 * in the EEPROM at byte offset 0x77, per the MX98715A and 3572 * MX98725 application notes. 3573 */ 3574 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24); 3575 break; 3576 case TULIP_CHIP_MX98715AEC_X: 3577 /* 3578 * Set the LED operating mode. This information is located 3579 * in the EEPROM at byte offset 0x76, per the MX98715AEC 3580 * application note. 3581 */ 3582 TULIP_WRITE(sc, CSR_MIIROM, ((0xf & sc->sc_srom[0x76]) << 28) 3583 | ((0xf0 & sc->sc_srom[0x76]) << 20)); 3584 break; 3585 3586 default: 3587 /* Nothing. */ 3588 } 3589 } 3590 3591 /* 3592 * tlp_dm9102_reset: 3593 * 3594 * Reset routine for the Davicom DM9102. 3595 */ 3596 void 3597 tlp_dm9102_reset(sc) 3598 struct tulip_softc *sc; 3599 { 3600 3601 TULIP_WRITE(sc, CSR_DM_PHYSTAT, DM_PHYSTAT_GEPC|DM_PHYSTAT_GPED); 3602 delay(100); 3603 TULIP_WRITE(sc, CSR_DM_PHYSTAT, 0); 3604 } 3605 3606 /***************************************************************************** 3607 * Chip/board-specific media switches. The ones here are ones that 3608 * are potentially common to multiple front-ends. 3609 *****************************************************************************/ 3610 3611 /* 3612 * This table is a common place for all sorts of media information, 3613 * keyed off of the SROM media code for that media. 3614 * 3615 * Note that we explicitly configure the 21142/21143 to always advertise 3616 * NWay capabilities when using the UTP port. 3617 * XXX Actually, we don't yet. 3618 */ 3619 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = { 3620 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0, 3621 "10baseT", 3622 0, 3623 { SIACONN_21040_10BASET, 3624 SIATXRX_21040_10BASET, 3625 SIAGEN_21040_10BASET }, 3626 3627 { SIACONN_21041_10BASET, 3628 SIATXRX_21041_10BASET, 3629 SIAGEN_21041_10BASET }, 3630 3631 { SIACONN_21142_10BASET, 3632 SIATXRX_21142_10BASET, 3633 SIAGEN_21142_10BASET } }, 3634 3635 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0, 3636 "10base2", 3637 0, 3638 { 0, 3639 0, 3640 0 }, 3641 3642 { SIACONN_21041_BNC, 3643 SIATXRX_21041_BNC, 3644 SIAGEN_21041_BNC }, 3645 3646 { SIACONN_21142_BNC, 3647 SIATXRX_21142_BNC, 3648 SIAGEN_21142_BNC } }, 3649 3650 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0, 3651 "10base5", 3652 0, 3653 { SIACONN_21040_AUI, 3654 SIATXRX_21040_AUI, 3655 SIAGEN_21040_AUI }, 3656 3657 { SIACONN_21041_AUI, 3658 SIATXRX_21041_AUI, 3659 SIAGEN_21041_AUI }, 3660 3661 { SIACONN_21142_AUI, 3662 SIATXRX_21142_AUI, 3663 SIAGEN_21142_AUI } }, 3664 3665 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0, 3666 "100baseTX", 3667 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3668 { 0, 3669 0, 3670 0 }, 3671 3672 { 0, 3673 0, 3674 0 }, 3675 3676 { 0, 3677 0, 3678 SIAGEN_ABM } }, 3679 3680 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX, 3681 "10baseT-FDX", 3682 OPMODE_FD|OPMODE_HBD, 3683 { SIACONN_21040_10BASET_FDX, 3684 SIATXRX_21040_10BASET_FDX, 3685 SIAGEN_21040_10BASET_FDX }, 3686 3687 { SIACONN_21041_10BASET_FDX, 3688 SIATXRX_21041_10BASET_FDX, 3689 SIAGEN_21041_10BASET_FDX }, 3690 3691 { SIACONN_21142_10BASET_FDX, 3692 SIATXRX_21142_10BASET_FDX, 3693 SIAGEN_21142_10BASET_FDX } }, 3694 3695 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX, 3696 "100baseTX-FDX", 3697 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD, 3698 { 0, 3699 0, 3700 0 }, 3701 3702 { 0, 3703 0, 3704 0 }, 3705 3706 { 0, 3707 0, 3708 SIAGEN_ABM } }, 3709 3710 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0, 3711 "100baseT4", 3712 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3713 { 0, 3714 0, 3715 0 }, 3716 3717 { 0, 3718 0, 3719 0 }, 3720 3721 { 0, 3722 0, 3723 SIAGEN_ABM } }, 3724 3725 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0, 3726 "100baseFX", 3727 OPMODE_PS|OPMODE_PCS|OPMODE_HBD, 3728 { 0, 3729 0, 3730 0 }, 3731 3732 { 0, 3733 0, 3734 0 }, 3735 3736 { 0, 3737 0, 3738 SIAGEN_ABM } }, 3739 3740 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX, 3741 "100baseFX-FDX", 3742 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD, 3743 { 0, 3744 0, 3745 0 }, 3746 3747 { 0, 3748 0, 3749 0 }, 3750 3751 { 0, 3752 0, 3753 SIAGEN_ABM } }, 3754 3755 { 0, 0, 0, 3756 NULL, 3757 0, 3758 { 0, 3759 0, 3760 0 }, 3761 3762 { 0, 3763 0, 3764 0 }, 3765 3766 { 0, 3767 0, 3768 0 } }, 3769 }; 3770 3771 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t)); 3772 void tlp_srom_media_info __P((struct tulip_softc *, 3773 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *)); 3774 void tlp_add_srom_media __P((struct tulip_softc *, int, 3775 void (*)(struct tulip_softc *, struct ifmediareq *), 3776 int (*)(struct tulip_softc *), const u_int8_t *, int)); 3777 void tlp_print_media __P((struct tulip_softc *)); 3778 void tlp_nway_activate __P((struct tulip_softc *, int)); 3779 void tlp_get_minst __P((struct tulip_softc *)); 3780 3781 const struct tulip_srom_to_ifmedia * 3782 tlp_srom_to_ifmedia(sm) 3783 u_int8_t sm; 3784 { 3785 const struct tulip_srom_to_ifmedia *tsti; 3786 3787 for (tsti = tulip_srom_to_ifmedia_table; 3788 tsti->tsti_name != NULL; tsti++) { 3789 if (tsti->tsti_srom == sm) 3790 return (tsti); 3791 } 3792 3793 return (NULL); 3794 } 3795 3796 void 3797 tlp_srom_media_info(sc, tsti, tm) 3798 struct tulip_softc *sc; 3799 const struct tulip_srom_to_ifmedia *tsti; 3800 struct tulip_21x4x_media *tm; 3801 { 3802 3803 tm->tm_name = tsti->tsti_name; 3804 tm->tm_opmode = tsti->tsti_opmode; 3805 3806 switch (sc->sc_chip) { 3807 case TULIP_CHIP_DE425: 3808 case TULIP_CHIP_21040: 3809 tm->tm_sia = tsti->tsti_21040; /* struct assignment */ 3810 break; 3811 3812 case TULIP_CHIP_21041: 3813 tm->tm_sia = tsti->tsti_21041; /* struct assignment */ 3814 break; 3815 3816 case TULIP_CHIP_21142: 3817 case TULIP_CHIP_21143: 3818 case TULIP_CHIP_82C115: 3819 case TULIP_CHIP_MX98715: 3820 case TULIP_CHIP_MX98715A: 3821 case TULIP_CHIP_MX98715AEC_X: 3822 case TULIP_CHIP_MX98725: 3823 tm->tm_sia = tsti->tsti_21142; /* struct assignment */ 3824 break; 3825 3826 default: 3827 /* Nothing. */ 3828 } 3829 } 3830 3831 void 3832 tlp_add_srom_media(sc, type, get, set, list, cnt) 3833 struct tulip_softc *sc; 3834 int type; 3835 void (*get) __P((struct tulip_softc *, struct ifmediareq *)); 3836 int (*set) __P((struct tulip_softc *)); 3837 const u_int8_t *list; 3838 int cnt; 3839 { 3840 struct tulip_21x4x_media *tm; 3841 const struct tulip_srom_to_ifmedia *tsti; 3842 int i; 3843 3844 for (i = 0; i < cnt; i++) { 3845 tsti = tlp_srom_to_ifmedia(list[i]); 3846 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 3847 memset(tm, 0, sizeof(*tm)); 3848 tlp_srom_media_info(sc, tsti, tm); 3849 tm->tm_type = type; 3850 tm->tm_get = get; 3851 tm->tm_set = set; 3852 3853 ifmedia_add(&sc->sc_mii.mii_media, 3854 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 3855 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 3856 } 3857 } 3858 3859 void 3860 tlp_print_media(sc) 3861 struct tulip_softc *sc; 3862 { 3863 struct ifmedia_entry *ife; 3864 struct tulip_21x4x_media *tm; 3865 const char *sep = ""; 3866 3867 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3868 3869 printf("%s: ", sc->sc_dev.dv_xname); 3870 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 3871 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 3872 tm = ife->ifm_aux; 3873 if (tm == NULL) { 3874 #ifdef DIAGNOSTIC 3875 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3876 panic("tlp_print_media"); 3877 #endif 3878 PRINT("auto"); 3879 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII && 3880 tm->tm_type != TULIP_ROM_MB_21142_MII) { 3881 PRINT(tm->tm_name); 3882 } 3883 } 3884 printf("\n"); 3885 3886 #undef PRINT 3887 } 3888 3889 void 3890 tlp_nway_activate(sc, media) 3891 struct tulip_softc *sc; 3892 int media; 3893 { 3894 struct ifmedia_entry *ife; 3895 3896 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0); 3897 #ifdef DIAGNOSTIC 3898 if (ife == NULL) 3899 panic("tlp_nway_activate"); 3900 #endif 3901 sc->sc_nway_active = ife; 3902 } 3903 3904 void 3905 tlp_get_minst(sc) 3906 struct tulip_softc *sc; 3907 { 3908 3909 if ((sc->sc_media_seen & 3910 ~((1 << TULIP_ROM_MB_21140_MII) | 3911 (1 << TULIP_ROM_MB_21142_MII))) == 0) { 3912 /* 3913 * We have not yet seen any SIA/SYM media (but are 3914 * about to; that's why we're called!), so assign 3915 * the current media instance to be the `internal media' 3916 * instance, and advance it so any MII media gets a 3917 * fresh one (used to selecting/isolating a PHY). 3918 */ 3919 sc->sc_tlp_minst = sc->sc_mii.mii_instance++; 3920 } 3921 } 3922 3923 /* 3924 * SIA Utility functions. 3925 */ 3926 void tlp_sia_update_link __P((struct tulip_softc *)); 3927 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *)); 3928 int tlp_sia_set __P((struct tulip_softc *)); 3929 void tlp_sia_fixup __P((struct tulip_softc *)); 3930 3931 void 3932 tlp_sia_update_link(sc) 3933 struct tulip_softc *sc; 3934 { 3935 struct ifmedia_entry *ife; 3936 struct tulip_21x4x_media *tm; 3937 u_int32_t siastat; 3938 3939 ife = TULIP_CURRENT_MEDIA(sc); 3940 tm = ife->ifm_aux; 3941 3942 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 3943 3944 siastat = TULIP_READ(sc, CSR_SIASTAT); 3945 3946 /* 3947 * Note that when we do SIA link tests, we are assuming that 3948 * the chip is really in the mode that the current media setting 3949 * reflects. If we're not, then the link tests will not be 3950 * accurate! 3951 */ 3952 switch (IFM_SUBTYPE(ife->ifm_media)) { 3953 case IFM_10_T: 3954 sc->sc_flags |= TULIPF_LINK_VALID; 3955 if ((siastat & SIASTAT_LS10) == 0) 3956 sc->sc_flags |= TULIPF_LINK_UP; 3957 break; 3958 3959 case IFM_100_TX: 3960 case IFM_100_T4: 3961 sc->sc_flags |= TULIPF_LINK_VALID; 3962 if ((siastat & SIASTAT_LS100) == 0) 3963 sc->sc_flags |= TULIPF_LINK_UP; 3964 break; 3965 } 3966 3967 switch (sc->sc_chip) { 3968 case TULIP_CHIP_21142: 3969 case TULIP_CHIP_21143: 3970 /* 3971 * On these chips, we can tell more information about 3972 * AUI/BNC. Note that the AUI/BNC selection is made 3973 * in a different register; for our purpose, it's all 3974 * AUI. 3975 */ 3976 switch (IFM_SUBTYPE(ife->ifm_media)) { 3977 case IFM_10_2: 3978 case IFM_10_5: 3979 sc->sc_flags |= TULIPF_LINK_VALID; 3980 if (siastat & SIASTAT_ARA) { 3981 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA); 3982 sc->sc_flags |= TULIPF_LINK_UP; 3983 } 3984 break; 3985 3986 default: 3987 /* 3988 * If we're SYM media and can detect the link 3989 * via the GPIO facility, prefer that status 3990 * over LS100. 3991 */ 3992 if (tm->tm_type == TULIP_ROM_MB_21143_SYM && 3993 tm->tm_actmask != 0) { 3994 sc->sc_flags = (sc->sc_flags & 3995 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID; 3996 if (TULIP_ISSET(sc, CSR_SIAGEN, 3997 tm->tm_actmask) == tm->tm_actdata) 3998 sc->sc_flags |= TULIPF_LINK_UP; 3999 } 4000 } 4001 break; 4002 4003 default: 4004 /* Nothing. */ 4005 } 4006 } 4007 4008 void 4009 tlp_sia_get(sc, ifmr) 4010 struct tulip_softc *sc; 4011 struct ifmediareq *ifmr; 4012 { 4013 struct ifmedia_entry *ife; 4014 4015 ifmr->ifm_status = 0; 4016 4017 tlp_sia_update_link(sc); 4018 4019 ife = TULIP_CURRENT_MEDIA(sc); 4020 4021 if (sc->sc_flags & TULIPF_LINK_VALID) 4022 ifmr->ifm_status |= IFM_AVALID; 4023 if (sc->sc_flags & TULIPF_LINK_UP) 4024 ifmr->ifm_status |= IFM_ACTIVE; 4025 ifmr->ifm_active = ife->ifm_media; 4026 } 4027 4028 void 4029 tlp_sia_fixup(sc) 4030 struct tulip_softc *sc; 4031 { 4032 struct ifmedia_entry *ife; 4033 struct tulip_21x4x_media *tm; 4034 u_int32_t siaconn, siatxrx, siagen; 4035 4036 switch (sc->sc_chip) { 4037 case TULIP_CHIP_82C115: 4038 case TULIP_CHIP_MX98713A: 4039 case TULIP_CHIP_MX98715: 4040 case TULIP_CHIP_MX98715A: 4041 case TULIP_CHIP_MX98715AEC_X: 4042 case TULIP_CHIP_MX98725: 4043 siaconn = PMAC_SIACONN_MASK; 4044 siatxrx = PMAC_SIATXRX_MASK; 4045 siagen = PMAC_SIAGEN_MASK; 4046 break; 4047 4048 default: 4049 /* No fixups required on any other chips. */ 4050 return; 4051 } 4052 4053 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4054 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 4055 tm = ife->ifm_aux; 4056 if (tm == NULL) 4057 continue; 4058 4059 tm->tm_siaconn &= siaconn; 4060 tm->tm_siatxrx &= siatxrx; 4061 tm->tm_siagen &= siagen; 4062 } 4063 } 4064 4065 int 4066 tlp_sia_set(sc) 4067 struct tulip_softc *sc; 4068 { 4069 struct ifmedia_entry *ife; 4070 struct tulip_21x4x_media *tm; 4071 4072 ife = TULIP_CURRENT_MEDIA(sc); 4073 tm = ife->ifm_aux; 4074 4075 /* 4076 * XXX This appears to be necessary on a bunch of the clone chips. 4077 */ 4078 delay(20000); 4079 4080 /* 4081 * Idle the chip. 4082 */ 4083 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4084 4085 /* 4086 * Program the SIA. It's important to write in this order, 4087 * resetting the SIA first. 4088 */ 4089 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */ 4090 delay(1000); 4091 4092 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx); 4093 4094 switch (sc->sc_chip) { 4095 case TULIP_CHIP_21142: 4096 case TULIP_CHIP_21143: 4097 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl); 4098 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata); 4099 break; 4100 default: 4101 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen); 4102 } 4103 4104 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn); 4105 4106 /* 4107 * Set the OPMODE bits for this media and write OPMODE. 4108 * This will resume the transmit and receive processes. 4109 */ 4110 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4111 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4112 4113 return (0); 4114 } 4115 4116 /* 4117 * 21140 GPIO utility functions. 4118 */ 4119 void tlp_21140_gpio_update_link __P((struct tulip_softc *)); 4120 void tlp_21140_gpio_get __P((struct tulip_softc *sc, 4121 struct ifmediareq *ifmr)); 4122 int tlp_21140_gpio_set __P((struct tulip_softc *sc)); 4123 4124 void 4125 tlp_21140_gpio_update_link(sc) 4126 struct tulip_softc *sc; 4127 { 4128 struct ifmedia_entry *ife; 4129 struct tulip_21x4x_media *tm; 4130 4131 ife = TULIP_CURRENT_MEDIA(sc); 4132 tm = ife->ifm_aux; 4133 4134 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 4135 4136 if (tm->tm_actmask != 0) { 4137 sc->sc_flags |= TULIPF_LINK_VALID; 4138 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) == 4139 tm->tm_actdata) 4140 sc->sc_flags |= TULIPF_LINK_UP; 4141 } 4142 } 4143 4144 void 4145 tlp_21140_gpio_get(sc, ifmr) 4146 struct tulip_softc *sc; 4147 struct ifmediareq *ifmr; 4148 { 4149 struct ifmedia_entry *ife; 4150 4151 ifmr->ifm_status = 0; 4152 4153 tlp_21140_gpio_update_link(sc); 4154 4155 ife = TULIP_CURRENT_MEDIA(sc); 4156 4157 if (sc->sc_flags & TULIPF_LINK_VALID) 4158 ifmr->ifm_status |= IFM_AVALID; 4159 if (sc->sc_flags & TULIPF_LINK_UP) 4160 ifmr->ifm_status |= IFM_ACTIVE; 4161 ifmr->ifm_active = ife->ifm_media; 4162 } 4163 4164 int 4165 tlp_21140_gpio_set(sc) 4166 struct tulip_softc *sc; 4167 { 4168 struct ifmedia_entry *ife; 4169 struct tulip_21x4x_media *tm; 4170 4171 ife = TULIP_CURRENT_MEDIA(sc); 4172 tm = ife->ifm_aux; 4173 4174 /* 4175 * Idle the chip. 4176 */ 4177 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4178 4179 /* 4180 * Set the GPIO pins for this media, to flip any 4181 * relays, etc. 4182 */ 4183 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4184 delay(10); 4185 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata); 4186 4187 /* 4188 * Set the OPMODE bits for this media and write OPMODE. 4189 * This will resume the transmit and receive processes. 4190 */ 4191 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4192 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4193 4194 return (0); 4195 } 4196 4197 /* 4198 * 21040 and 21041 media switches. 4199 */ 4200 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 4201 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 4202 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 4203 void tlp_21041_tmsw_init __P((struct tulip_softc *)); 4204 4205 const struct tulip_mediasw tlp_21040_mediasw = { 4206 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set 4207 }; 4208 4209 const struct tulip_mediasw tlp_21040_tp_mediasw = { 4210 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set 4211 }; 4212 4213 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 4214 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set 4215 }; 4216 4217 const struct tulip_mediasw tlp_21041_mediasw = { 4218 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set 4219 }; 4220 4221 4222 void 4223 tlp_21040_tmsw_init(sc) 4224 struct tulip_softc *sc; 4225 { 4226 static const u_int8_t media[] = { 4227 TULIP_ROM_MB_MEDIA_TP, 4228 TULIP_ROM_MB_MEDIA_TP_FDX, 4229 TULIP_ROM_MB_MEDIA_AUI, 4230 }; 4231 struct tulip_21x4x_media *tm; 4232 4233 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4234 tlp_mediastatus); 4235 4236 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3); 4237 4238 /* 4239 * No SROM type for External SIA. 4240 */ 4241 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4242 memset(tm, 0, sizeof(*tm)); 4243 tm->tm_name = "manual"; 4244 tm->tm_opmode = 0; 4245 tm->tm_siaconn = SIACONN_21040_EXTSIA; 4246 tm->tm_siatxrx = SIATXRX_21040_EXTSIA; 4247 tm->tm_siagen = SIAGEN_21040_EXTSIA; 4248 ifmedia_add(&sc->sc_mii.mii_media, 4249 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm); 4250 4251 /* 4252 * XXX Autosense not yet supported. 4253 */ 4254 4255 /* XXX This should be auto-sense. */ 4256 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4257 4258 tlp_print_media(sc); 4259 } 4260 4261 void 4262 tlp_21040_tp_tmsw_init(sc) 4263 struct tulip_softc *sc; 4264 { 4265 static const u_int8_t media[] = { 4266 TULIP_ROM_MB_MEDIA_TP, 4267 TULIP_ROM_MB_MEDIA_TP_FDX, 4268 }; 4269 4270 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4271 tlp_mediastatus); 4272 4273 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2); 4274 4275 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4276 4277 tlp_print_media(sc); 4278 } 4279 4280 void 4281 tlp_21040_auibnc_tmsw_init(sc) 4282 struct tulip_softc *sc; 4283 { 4284 static const u_int8_t media[] = { 4285 TULIP_ROM_MB_MEDIA_AUI, 4286 }; 4287 4288 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4289 tlp_mediastatus); 4290 4291 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1); 4292 4293 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 4294 4295 tlp_print_media(sc); 4296 } 4297 4298 void 4299 tlp_21041_tmsw_init(sc) 4300 struct tulip_softc *sc; 4301 { 4302 static const u_int8_t media[] = { 4303 TULIP_ROM_MB_MEDIA_TP, 4304 TULIP_ROM_MB_MEDIA_TP_FDX, 4305 TULIP_ROM_MB_MEDIA_BNC, 4306 TULIP_ROM_MB_MEDIA_AUI, 4307 }; 4308 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt; 4309 const struct tulip_srom_to_ifmedia *tsti; 4310 struct tulip_21x4x_media *tm; 4311 u_int16_t romdef; 4312 u_int8_t mb; 4313 4314 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4315 tlp_mediastatus); 4316 4317 if (tlp_isv_srom(sc->sc_srom) == 0) { 4318 not_isv_srom: 4319 /* 4320 * If we have a board without the standard 21041 SROM format, 4321 * we just assume all media are present and try and pick a 4322 * reasonable default. 4323 */ 4324 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4); 4325 4326 /* 4327 * XXX Autosense not yet supported. 4328 */ 4329 4330 /* XXX This should be auto-sense. */ 4331 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4332 4333 tlp_print_media(sc); 4334 return; 4335 } 4336 4337 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4338 for (i = 0; i < devcnt; i++) { 4339 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4340 break; 4341 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4342 sc->sc_devno) 4343 break; 4344 } 4345 4346 if (i == devcnt) 4347 goto not_isv_srom; 4348 4349 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4350 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4351 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE; 4352 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4353 4354 for (; m_cnt != 0; 4355 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) { 4356 mb = sc->sc_srom[mb_offset]; 4357 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4358 memset(tm, 0, sizeof(*tm)); 4359 switch (mb & TULIP_ROM_MB_MEDIA_CODE) { 4360 case TULIP_ROM_MB_MEDIA_TP_FDX: 4361 case TULIP_ROM_MB_MEDIA_TP: 4362 case TULIP_ROM_MB_MEDIA_BNC: 4363 case TULIP_ROM_MB_MEDIA_AUI: 4364 tsti = tlp_srom_to_ifmedia(mb & 4365 TULIP_ROM_MB_MEDIA_CODE); 4366 4367 tlp_srom_media_info(sc, tsti, tm); 4368 4369 /* 4370 * Override our default SIA settings if the 4371 * SROM contains its own. 4372 */ 4373 if (mb & TULIP_ROM_MB_EXT) { 4374 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom, 4375 mb_offset + TULIP_ROM_MB_CSR13); 4376 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom, 4377 mb_offset + TULIP_ROM_MB_CSR14); 4378 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom, 4379 mb_offset + TULIP_ROM_MB_CSR15); 4380 } 4381 4382 ifmedia_add(&sc->sc_mii.mii_media, 4383 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4384 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4385 break; 4386 4387 default: 4388 printf("%s: unknown media code 0x%02x\n", 4389 sc->sc_dev.dv_xname, 4390 mb & TULIP_ROM_MB_MEDIA_CODE); 4391 free(tm, M_DEVBUF); 4392 } 4393 } 4394 4395 /* 4396 * XXX Autosense not yet supported. 4397 */ 4398 4399 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset + 4400 TULIP_ROM_IL_SELECT_CONN_TYPE); 4401 switch (romdef) { 4402 case SELECT_CONN_TYPE_TP: 4403 case SELECT_CONN_TYPE_TP_AUTONEG: 4404 case SELECT_CONN_TYPE_TP_NOLINKPASS: 4405 defmedia = IFM_ETHER|IFM_10_T; 4406 break; 4407 4408 case SELECT_CONN_TYPE_TP_FDX: 4409 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX; 4410 break; 4411 4412 case SELECT_CONN_TYPE_BNC: 4413 defmedia = IFM_ETHER|IFM_10_2; 4414 break; 4415 4416 case SELECT_CONN_TYPE_AUI: 4417 defmedia = IFM_ETHER|IFM_10_5; 4418 break; 4419 #if 0 /* XXX */ 4420 case SELECT_CONN_TYPE_ASENSE: 4421 case SELECT_CONN_TYPE_ASENSE_AUTONEG: 4422 defmedia = IFM_ETHER|IFM_AUTO; 4423 break; 4424 #endif 4425 default: 4426 defmedia = 0; 4427 } 4428 4429 if (defmedia == 0) { 4430 /* 4431 * XXX We should default to auto-sense. 4432 */ 4433 defmedia = IFM_ETHER|IFM_10_T; 4434 } 4435 4436 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4437 4438 tlp_print_media(sc); 4439 } 4440 4441 /* 4442 * DECchip 2114x ISV media switch. 4443 */ 4444 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *)); 4445 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 4446 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *)); 4447 4448 const struct tulip_mediasw tlp_2114x_isv_mediasw = { 4449 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 4450 }; 4451 4452 void 4453 tlp_2114x_isv_tmsw_init(sc) 4454 struct tulip_softc *sc; 4455 { 4456 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 4457 struct ifmedia_entry *ife; 4458 struct mii_softc *phy; 4459 struct tulip_21x4x_media *tm; 4460 const struct tulip_srom_to_ifmedia *tsti; 4461 int i, devcnt, leaf_offset, m_cnt, type, length; 4462 int defmedia, miidef; 4463 u_int16_t word; 4464 u_int8_t *cp, *ncp; 4465 4466 defmedia = miidef = 0; 4467 4468 sc->sc_mii.mii_ifp = ifp; 4469 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 4470 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 4471 sc->sc_mii.mii_statchg = sc->sc_statchg; 4472 4473 /* 4474 * Ignore `instance'; we may get a mixture of SIA and MII 4475 * media, and `instance' is used to isolate or select the 4476 * PHY on the MII as appropriate. Note that duplicate media 4477 * are disallowed, so ignoring `instance' is safe. 4478 */ 4479 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange, 4480 tlp_mediastatus); 4481 4482 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4483 for (i = 0; i < devcnt; i++) { 4484 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4485 break; 4486 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4487 sc->sc_devno) 4488 break; 4489 } 4490 4491 if (i == devcnt) { 4492 printf("%s: unable to locate info leaf in SROM\n", 4493 sc->sc_dev.dv_xname); 4494 return; 4495 } 4496 4497 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4498 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4499 4500 /* XXX SELECT CONN TYPE */ 4501 4502 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4503 4504 /* 4505 * On some chips, the first thing in the Info Leaf is the 4506 * GPIO pin direction data. 4507 */ 4508 switch (sc->sc_chip) { 4509 case TULIP_CHIP_21140: 4510 case TULIP_CHIP_21140A: 4511 case TULIP_CHIP_MX98713: 4512 case TULIP_CHIP_AX88140: 4513 case TULIP_CHIP_AX88141: 4514 sc->sc_gp_dir = *cp++; 4515 break; 4516 4517 default: 4518 /* Nothing. */ 4519 } 4520 4521 /* Get the media count. */ 4522 m_cnt = *cp++; 4523 4524 for (; m_cnt != 0; cp = ncp, m_cnt--) { 4525 /* 4526 * Determine the type and length of this media block. 4527 */ 4528 if ((*cp & 0x80) == 0) { 4529 length = 4; 4530 type = TULIP_ROM_MB_21140_GPR; 4531 } else { 4532 length = (*cp++ & 0x7f) - 1; 4533 type = *cp++ & 0x3f; 4534 } 4535 4536 /* Compute the start of the next block. */ 4537 ncp = cp + length; 4538 4539 /* Now, parse the block. */ 4540 switch (type) { 4541 case TULIP_ROM_MB_21140_GPR: 4542 tlp_get_minst(sc); 4543 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR; 4544 4545 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4546 memset(tm, 0, sizeof(*tm)); 4547 4548 tm->tm_type = TULIP_ROM_MB_21140_GPR; 4549 tm->tm_get = tlp_21140_gpio_get; 4550 tm->tm_set = tlp_21140_gpio_set; 4551 4552 /* First is the media type code. */ 4553 tsti = tlp_srom_to_ifmedia(cp[0] & 4554 TULIP_ROM_MB_MEDIA_CODE); 4555 if (tsti == NULL) { 4556 /* Invalid media code. */ 4557 free(tm, M_DEVBUF); 4558 break; 4559 } 4560 4561 /* Get defaults. */ 4562 tlp_srom_media_info(sc, tsti, tm); 4563 4564 /* Next is any GPIO info for this media. */ 4565 tm->tm_gpdata = cp[1]; 4566 4567 /* 4568 * Next is a word containing OPMODE information 4569 * and info on how to detect if this media is 4570 * active. 4571 */ 4572 word = TULIP_ROM_GETW(cp, 2); 4573 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4574 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4575 tm->tm_actmask = 4576 TULIP_ROM_MB_BITPOS(word); 4577 tm->tm_actdata = 4578 (word & TULIP_ROM_MB_POLARITY) ? 4579 0 : tm->tm_actmask; 4580 } 4581 4582 ifmedia_add(&sc->sc_mii.mii_media, 4583 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4584 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4585 break; 4586 4587 case TULIP_ROM_MB_21140_MII: 4588 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII; 4589 4590 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4591 memset(tm, 0, sizeof(*tm)); 4592 4593 tm->tm_type = TULIP_ROM_MB_21140_MII; 4594 tm->tm_get = tlp_mii_getmedia; 4595 tm->tm_set = tlp_mii_setmedia; 4596 tm->tm_opmode = OPMODE_PS; 4597 4598 if (sc->sc_reset == NULL) 4599 sc->sc_reset = tlp_21140_reset; 4600 4601 /* First is the PHY number. */ 4602 tm->tm_phyno = *cp++; 4603 4604 /* Next is the MII select sequence length and offset. */ 4605 tm->tm_gp_length = *cp++; 4606 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4607 cp += tm->tm_gp_length; 4608 4609 /* Next is the MII reset sequence length and offset. */ 4610 tm->tm_reset_length = *cp++; 4611 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4612 cp += tm->tm_reset_length; 4613 4614 /* 4615 * The following items are left in the media block 4616 * that we don't particularly care about: 4617 * 4618 * capabilities W 4619 * advertisement W 4620 * full duplex W 4621 * tx threshold W 4622 * 4623 * These appear to be bits in the PHY registers, 4624 * which our MII code handles on its own. 4625 */ 4626 4627 /* 4628 * Before we probe the MII bus, we need to reset 4629 * it and issue the selection sequence. 4630 */ 4631 4632 /* Set the direction of the pins... */ 4633 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4634 4635 for (i = 0; i < tm->tm_reset_length; i++) { 4636 delay(10); 4637 TULIP_WRITE(sc, CSR_GPP, 4638 sc->sc_srom[tm->tm_reset_offset + i]); 4639 } 4640 4641 for (i = 0; i < tm->tm_gp_length; i++) { 4642 delay(10); 4643 TULIP_WRITE(sc, CSR_GPP, 4644 sc->sc_srom[tm->tm_gp_offset + i]); 4645 } 4646 4647 /* If there were no sequences, just lower the pins. */ 4648 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4649 delay(10); 4650 TULIP_WRITE(sc, CSR_GPP, 0); 4651 } 4652 4653 /* 4654 * Now, probe the MII for the PHY. Note, we know 4655 * the location of the PHY on the bus, but we don't 4656 * particularly care; the MII code just likes to 4657 * search the whole thing anyhow. 4658 */ 4659 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4660 MII_PHY_ANY, tm->tm_phyno, 0); 4661 4662 /* 4663 * Now, search for the PHY we hopefully just 4664 * configured. If it's not configured into the 4665 * kernel, we lose. The PHY's default media always 4666 * takes priority. 4667 */ 4668 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4669 phy != NULL; 4670 phy = LIST_NEXT(phy, mii_list)) 4671 if (phy->mii_offset == tm->tm_phyno) 4672 break; 4673 if (phy == NULL) { 4674 printf("%s: unable to configure MII\n", 4675 sc->sc_dev.dv_xname); 4676 break; 4677 } 4678 4679 sc->sc_flags |= TULIPF_HAS_MII; 4680 sc->sc_tick = tlp_mii_tick; 4681 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4682 phy->mii_inst); 4683 4684 /* 4685 * Okay, now that we've found the PHY and the MII 4686 * layer has added all of the media associated 4687 * with that PHY, we need to traverse the media 4688 * list, and add our `tm' to each entry's `aux' 4689 * pointer. 4690 * 4691 * We do this by looking for media with our 4692 * PHY's `instance'. 4693 */ 4694 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4695 ife != NULL; 4696 ife = TAILQ_NEXT(ife, ifm_list)) { 4697 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4698 continue; 4699 ife->ifm_aux = tm; 4700 } 4701 break; 4702 4703 case TULIP_ROM_MB_21142_SIA: 4704 tlp_get_minst(sc); 4705 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA; 4706 4707 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4708 memset(tm, 0, sizeof(*tm)); 4709 4710 tm->tm_type = TULIP_ROM_MB_21142_SIA; 4711 tm->tm_get = tlp_sia_get; 4712 tm->tm_set = tlp_sia_set; 4713 4714 /* First is the media type code. */ 4715 tsti = tlp_srom_to_ifmedia(cp[0] & 4716 TULIP_ROM_MB_MEDIA_CODE); 4717 if (tsti == NULL) { 4718 /* Invalid media code. */ 4719 free(tm, M_DEVBUF); 4720 break; 4721 } 4722 4723 /* Get defaults. */ 4724 tlp_srom_media_info(sc, tsti, tm); 4725 4726 /* 4727 * Override our default SIA settings if the 4728 * SROM contains its own. 4729 */ 4730 if (cp[0] & 0x40) { 4731 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1); 4732 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3); 4733 tm->tm_siagen = TULIP_ROM_GETW(cp, 5); 4734 cp += 7; 4735 } else 4736 cp++; 4737 4738 /* Next is GPIO control/data. */ 4739 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0); 4740 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2); 4741 4742 ifmedia_add(&sc->sc_mii.mii_media, 4743 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4744 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4745 break; 4746 4747 case TULIP_ROM_MB_21142_MII: 4748 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII; 4749 4750 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4751 memset(tm, 0, sizeof(*tm)); 4752 4753 tm->tm_type = TULIP_ROM_MB_21142_MII; 4754 tm->tm_get = tlp_mii_getmedia; 4755 tm->tm_set = tlp_mii_setmedia; 4756 tm->tm_opmode = OPMODE_PS; 4757 4758 if (sc->sc_reset == NULL) 4759 sc->sc_reset = tlp_21142_reset; 4760 4761 /* First is the PHY number. */ 4762 tm->tm_phyno = *cp++; 4763 4764 /* Next is the MII select sequence length and offset. */ 4765 tm->tm_gp_length = *cp++; 4766 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4767 cp += tm->tm_gp_length * 2; 4768 4769 /* Next is the MII reset sequence length and offset. */ 4770 tm->tm_reset_length = *cp++; 4771 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4772 cp += tm->tm_reset_length * 2; 4773 4774 /* 4775 * The following items are left in the media block 4776 * that we don't particularly care about: 4777 * 4778 * capabilities W 4779 * advertisement W 4780 * full duplex W 4781 * tx threshold W 4782 * MII interrupt W 4783 * 4784 * These appear to be bits in the PHY registers, 4785 * which our MII code handles on its own. 4786 */ 4787 4788 /* 4789 * Before we probe the MII bus, we need to reset 4790 * it and issue the selection sequence. 4791 */ 4792 4793 ncp = &sc->sc_srom[tm->tm_reset_offset]; 4794 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 4795 delay(10); 4796 TULIP_WRITE(sc, CSR_SIAGEN, 4797 TULIP_ROM_GETW(ncp, 0) << 16); 4798 } 4799 4800 ncp = &sc->sc_srom[tm->tm_gp_offset]; 4801 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 4802 delay(10); 4803 TULIP_WRITE(sc, CSR_SIAGEN, 4804 TULIP_ROM_GETW(ncp, 0) << 16); 4805 } 4806 4807 /* If there were no sequences, just lower the pins. */ 4808 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4809 delay(10); 4810 TULIP_WRITE(sc, CSR_SIAGEN, 0); 4811 } 4812 4813 /* 4814 * Now, probe the MII for the PHY. Note, we know 4815 * the location of the PHY on the bus, but we don't 4816 * particularly care; the MII code just likes to 4817 * search the whole thing anyhow. 4818 */ 4819 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4820 MII_PHY_ANY, tm->tm_phyno, 0); 4821 4822 /* 4823 * Now, search for the PHY we hopefully just 4824 * configured. If it's not configured into the 4825 * kernel, we lose. The PHY's default media always 4826 * takes priority. 4827 */ 4828 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4829 phy != NULL; 4830 phy = LIST_NEXT(phy, mii_list)) 4831 if (phy->mii_offset == tm->tm_phyno) 4832 break; 4833 if (phy == NULL) { 4834 printf("%s: unable to configure MII\n", 4835 sc->sc_dev.dv_xname); 4836 break; 4837 } 4838 4839 sc->sc_flags |= TULIPF_HAS_MII; 4840 sc->sc_tick = tlp_mii_tick; 4841 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4842 phy->mii_inst); 4843 4844 /* 4845 * Okay, now that we've found the PHY and the MII 4846 * layer has added all of the media associated 4847 * with that PHY, we need to traverse the media 4848 * list, and add our `tm' to each entry's `aux' 4849 * pointer. 4850 * 4851 * We do this by looking for media with our 4852 * PHY's `instance'. 4853 */ 4854 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4855 ife != NULL; 4856 ife = TAILQ_NEXT(ife, ifm_list)) { 4857 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4858 continue; 4859 ife->ifm_aux = tm; 4860 } 4861 break; 4862 4863 case TULIP_ROM_MB_21143_SYM: 4864 tlp_get_minst(sc); 4865 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM; 4866 4867 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4868 memset(tm, 0, sizeof(*tm)); 4869 4870 tm->tm_type = TULIP_ROM_MB_21143_SYM; 4871 tm->tm_get = tlp_sia_get; 4872 tm->tm_set = tlp_sia_set; 4873 4874 /* First is the media type code. */ 4875 tsti = tlp_srom_to_ifmedia(cp[0] & 4876 TULIP_ROM_MB_MEDIA_CODE); 4877 if (tsti == NULL) { 4878 /* Invalid media code. */ 4879 free(tm, M_DEVBUF); 4880 break; 4881 } 4882 4883 /* Get defaults. */ 4884 tlp_srom_media_info(sc, tsti, tm); 4885 4886 /* Next is GPIO control/data. */ 4887 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1); 4888 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3); 4889 4890 /* 4891 * Next is a word containing OPMODE information 4892 * and info on how to detect if this media is 4893 * active. 4894 */ 4895 word = TULIP_ROM_GETW(cp, 5); 4896 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4897 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4898 tm->tm_actmask = 4899 TULIP_ROM_MB_BITPOS(word); 4900 tm->tm_actdata = 4901 (word & TULIP_ROM_MB_POLARITY) ? 4902 0 : tm->tm_actmask; 4903 } 4904 4905 ifmedia_add(&sc->sc_mii.mii_media, 4906 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4907 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4908 break; 4909 4910 case TULIP_ROM_MB_21143_RESET: 4911 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname); 4912 break; 4913 4914 default: 4915 printf("%s: unknown ISV media block type 0x%02x\n", 4916 sc->sc_dev.dv_xname, type); 4917 } 4918 } 4919 4920 /* 4921 * Deal with the case where no media is configured. 4922 */ 4923 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) { 4924 printf("%s: no media found!\n", sc->sc_dev.dv_xname); 4925 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 4926 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 4927 return; 4928 } 4929 4930 /* 4931 * Pick the default media. 4932 */ 4933 if (miidef != 0) 4934 defmedia = miidef; 4935 else { 4936 /* 4937 * XXX Pick a better default. Should come from SROM 4938 * XXX on 21140[A], and should be "auto" on 21142, 4939 * XXX 21143, and Macronix chips. 4940 */ 4941 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0); 4942 } 4943 4944 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4945 4946 /* 4947 * Display any non-MII media we've located. 4948 */ 4949 if (sc->sc_media_seen & 4950 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII))) 4951 tlp_print_media(sc); 4952 4953 tlp_sia_fixup(sc); 4954 } 4955 4956 void 4957 tlp_2114x_isv_tmsw_get(sc, ifmr) 4958 struct tulip_softc *sc; 4959 struct ifmediareq *ifmr; 4960 { 4961 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4962 struct tulip_21x4x_media *tm = ife->ifm_aux; 4963 4964 /* 4965 * We might be polling a non-MII autosense; check for that. 4966 */ 4967 if (tm == NULL) { 4968 #ifdef DIAGNOSTIC 4969 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4970 panic("tlp_2114x_isv_tmsw_get"); 4971 #endif 4972 tm = sc->sc_nway_active->ifm_aux; 4973 } 4974 4975 (*tm->tm_get)(sc, ifmr); 4976 } 4977 4978 int 4979 tlp_2114x_isv_tmsw_set(sc) 4980 struct tulip_softc *sc; 4981 { 4982 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4983 struct tulip_21x4x_media *tm = ife->ifm_aux; 4984 4985 /* 4986 * We might be setting a non-MII autosense; check for that. 4987 */ 4988 if (tm == NULL) { 4989 #ifdef DIAGNOSTIC 4990 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4991 panic("tlp_2114x_isv_tmsw_set"); 4992 #endif 4993 /* XXX XXX XXX */ 4994 } 4995 4996 /* 4997 * Check to see if we need to reset the chip, and do it. The 4998 * reset path will get the OPMODE register right the next 4999 * time through. 5000 */ 5001 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode)) 5002 return (tlp_init(sc)); 5003 5004 return ((*tm->tm_set)(sc)); 5005 } 5006 5007 /* 5008 * MII-on-SIO media switch. Handles only MII attached to the SIO. 5009 */ 5010 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 5011 5012 const struct tulip_mediasw tlp_sio_mii_mediasw = { 5013 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5014 }; 5015 5016 void 5017 tlp_sio_mii_tmsw_init(sc) 5018 struct tulip_softc *sc; 5019 { 5020 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5021 5022 /* 5023 * We don't attach any media info structures to the ifmedia 5024 * entries, so if we're using a pre-init function that needs 5025 * that info, override it to one that doesn't. 5026 */ 5027 if (sc->sc_preinit == tlp_2114x_preinit) 5028 sc->sc_preinit = tlp_2114x_mii_preinit; 5029 5030 sc->sc_mii.mii_ifp = ifp; 5031 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5032 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5033 sc->sc_mii.mii_statchg = sc->sc_statchg; 5034 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5035 tlp_mediastatus); 5036 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5037 MII_OFFSET_ANY, 0); 5038 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5039 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5040 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5041 } else { 5042 sc->sc_flags |= TULIPF_HAS_MII; 5043 sc->sc_tick = tlp_mii_tick; 5044 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5045 } 5046 } 5047 5048 /* 5049 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 5050 */ 5051 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 5052 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 5053 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 5054 5055 const struct tulip_mediasw tlp_pnic_mediasw = { 5056 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 5057 }; 5058 5059 void tlp_pnic_nway_statchg __P((struct device *)); 5060 void tlp_pnic_nway_tick __P((void *)); 5061 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 5062 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 5063 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 5064 void tlp_pnic_nway_auto_timeout __P((void *)); 5065 void tlp_pnic_nway_status __P((struct tulip_softc *)); 5066 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 5067 5068 void 5069 tlp_pnic_tmsw_init(sc) 5070 struct tulip_softc *sc; 5071 { 5072 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5073 const char *sep = ""; 5074 5075 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 5076 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 5077 5078 sc->sc_mii.mii_ifp = ifp; 5079 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 5080 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 5081 sc->sc_mii.mii_statchg = sc->sc_statchg; 5082 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5083 tlp_mediastatus); 5084 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5085 MII_OFFSET_ANY, 0); 5086 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5087 /* XXX What about AUI/BNC support? */ 5088 printf("%s: ", sc->sc_dev.dv_xname); 5089 5090 tlp_pnic_nway_reset(sc); 5091 5092 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 5093 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 5094 PRINT("10baseT"); 5095 5096 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 5097 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 5098 PRINT("10baseT-FDX"); 5099 5100 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 5101 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 5102 PRINT("100baseTX"); 5103 5104 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 5105 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 5106 PNIC_NWAY_CAP100TXFDX); 5107 PRINT("100baseTX-FDX"); 5108 5109 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 5110 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 5111 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 5112 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 5113 PRINT("auto"); 5114 5115 printf("\n"); 5116 5117 sc->sc_statchg = tlp_pnic_nway_statchg; 5118 sc->sc_tick = tlp_pnic_nway_tick; 5119 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5120 } else { 5121 sc->sc_flags |= TULIPF_HAS_MII; 5122 sc->sc_tick = tlp_mii_tick; 5123 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5124 } 5125 5126 #undef ADD 5127 #undef PRINT 5128 } 5129 5130 void 5131 tlp_pnic_tmsw_get(sc, ifmr) 5132 struct tulip_softc *sc; 5133 struct ifmediareq *ifmr; 5134 { 5135 struct mii_data *mii = &sc->sc_mii; 5136 5137 if (sc->sc_flags & TULIPF_HAS_MII) 5138 tlp_mii_getmedia(sc, ifmr); 5139 else { 5140 mii->mii_media_status = 0; 5141 mii->mii_media_active = IFM_NONE; 5142 tlp_pnic_nway_service(sc, MII_POLLSTAT); 5143 ifmr->ifm_status = sc->sc_mii.mii_media_status; 5144 ifmr->ifm_active = sc->sc_mii.mii_media_active; 5145 } 5146 } 5147 5148 int 5149 tlp_pnic_tmsw_set(sc) 5150 struct tulip_softc *sc; 5151 { 5152 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5153 struct mii_data *mii = &sc->sc_mii; 5154 5155 if (sc->sc_flags & TULIPF_HAS_MII) { 5156 /* 5157 * Make sure the built-in Tx jabber timer is disabled. 5158 */ 5159 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 5160 5161 return (tlp_mii_setmedia(sc)); 5162 } 5163 5164 if (ifp->if_flags & IFF_UP) { 5165 mii->mii_media_status = 0; 5166 mii->mii_media_active = IFM_NONE; 5167 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 5168 } 5169 5170 return (0); 5171 } 5172 5173 void 5174 tlp_pnic_nway_statchg(self) 5175 struct device *self; 5176 { 5177 struct tulip_softc *sc = (struct tulip_softc *)self; 5178 5179 /* Idle the transmit and receive processes. */ 5180 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 5181 5182 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 5183 OPMODE_SCR|OPMODE_HBD); 5184 5185 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 5186 sc->sc_opmode |= OPMODE_TTM; 5187 TULIP_WRITE(sc, CSR_GPP, 5188 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 5189 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5190 } else { 5191 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD; 5192 TULIP_WRITE(sc, CSR_GPP, 5193 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 5194 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5195 } 5196 5197 if (sc->sc_mii.mii_media_active & IFM_FDX) 5198 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 5199 5200 /* 5201 * Write new OPMODE bits. This also restarts the transmit 5202 * and receive processes. 5203 */ 5204 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 5205 } 5206 5207 void 5208 tlp_pnic_nway_tick(arg) 5209 void *arg; 5210 { 5211 struct tulip_softc *sc = arg; 5212 int s; 5213 5214 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 5215 return; 5216 5217 s = splnet(); 5218 tlp_pnic_nway_service(sc, MII_TICK); 5219 splx(s); 5220 5221 callout_reset(&sc->sc_tick_callout, hz, tlp_pnic_nway_tick, sc); 5222 } 5223 5224 /* 5225 * Support for the Lite-On PNIC internal NWay block. This is constructed 5226 * somewhat like a PHY driver for simplicity. 5227 */ 5228 5229 int 5230 tlp_pnic_nway_service(sc, cmd) 5231 struct tulip_softc *sc; 5232 int cmd; 5233 { 5234 struct mii_data *mii = &sc->sc_mii; 5235 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5236 5237 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 5238 return (0); 5239 5240 switch (cmd) { 5241 case MII_POLLSTAT: 5242 /* Nothing special to do here. */ 5243 break; 5244 5245 case MII_MEDIACHG: 5246 switch (IFM_SUBTYPE(ife->ifm_media)) { 5247 case IFM_AUTO: 5248 (void) tlp_pnic_nway_auto(sc, 1); 5249 break; 5250 case IFM_100_T4: 5251 /* 5252 * XXX Not supported as a manual setting right now. 5253 */ 5254 return (EINVAL); 5255 default: 5256 /* 5257 * NWAY register data is stored in the ifmedia entry. 5258 */ 5259 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5260 } 5261 break; 5262 5263 case MII_TICK: 5264 /* 5265 * Only used for autonegotiation. 5266 */ 5267 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 5268 return (0); 5269 5270 /* 5271 * Check to see if we have link. If we do, we don't 5272 * need to restart the autonegotiation process. 5273 */ 5274 if (sc->sc_flags & TULIPF_LINK_UP) 5275 return (0); 5276 5277 /* 5278 * Only retry autonegotiation every 5 seconds. 5279 */ 5280 if (++sc->sc_nway_ticks != 5) 5281 return (0); 5282 5283 sc->sc_nway_ticks = 0; 5284 tlp_pnic_nway_reset(sc); 5285 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 5286 return (0); 5287 break; 5288 } 5289 5290 /* Update the media status. */ 5291 tlp_pnic_nway_status(sc); 5292 5293 /* Callback if something changed. */ 5294 if ((sc->sc_nway_active == NULL || 5295 sc->sc_nway_active->ifm_media != mii->mii_media_active) || 5296 cmd == MII_MEDIACHG) { 5297 (*sc->sc_statchg)(&sc->sc_dev); 5298 tlp_nway_activate(sc, mii->mii_media_active); 5299 } 5300 return (0); 5301 } 5302 5303 void 5304 tlp_pnic_nway_reset(sc) 5305 struct tulip_softc *sc; 5306 { 5307 5308 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 5309 delay(100); 5310 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 5311 } 5312 5313 int 5314 tlp_pnic_nway_auto(sc, waitfor) 5315 struct tulip_softc *sc; 5316 int waitfor; 5317 { 5318 struct mii_data *mii = &sc->sc_mii; 5319 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5320 u_int32_t reg; 5321 int i; 5322 5323 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 5324 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5325 5326 if (waitfor) { 5327 /* Wait 500ms for it to complete. */ 5328 for (i = 0; i < 500; i++) { 5329 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5330 if (reg & PNIC_NWAY_LPAR_MASK) { 5331 tlp_pnic_nway_acomp(sc); 5332 return (0); 5333 } 5334 delay(1000); 5335 } 5336 #if 0 5337 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5338 printf("%s: autonegotiation failed to complete\n", 5339 sc->sc_dev.dv_xname); 5340 #endif 5341 5342 /* 5343 * Don't need to worry about clearing DOINGAUTO. 5344 * If that's set, a timeout is pending, and it will 5345 * clear the flag. 5346 */ 5347 return (EIO); 5348 } 5349 5350 /* 5351 * Just let it finish asynchronously. This is for the benefit of 5352 * the tick handler driving autonegotiation. Don't want 500ms 5353 * delays all the time while the system is running! 5354 */ 5355 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 5356 sc->sc_flags |= TULIPF_DOINGAUTO; 5357 callout_reset(&sc->sc_nway_callout, hz >> 1, 5358 tlp_pnic_nway_auto_timeout, sc); 5359 } 5360 return (EJUSTRETURN); 5361 } 5362 5363 void 5364 tlp_pnic_nway_auto_timeout(arg) 5365 void *arg; 5366 { 5367 struct tulip_softc *sc = arg; 5368 u_int32_t reg; 5369 int s; 5370 5371 s = splnet(); 5372 sc->sc_flags &= ~TULIPF_DOINGAUTO; 5373 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5374 #if 0 5375 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5376 printf("%s: autonegotiation failed to complete\n", 5377 sc->sc_dev.dv_xname); 5378 #endif 5379 5380 tlp_pnic_nway_acomp(sc); 5381 5382 /* Update the media status. */ 5383 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 5384 splx(s); 5385 } 5386 5387 void 5388 tlp_pnic_nway_status(sc) 5389 struct tulip_softc *sc; 5390 { 5391 struct mii_data *mii = &sc->sc_mii; 5392 u_int32_t reg; 5393 5394 mii->mii_media_status = IFM_AVALID; 5395 mii->mii_media_active = IFM_ETHER; 5396 5397 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5398 5399 if (sc->sc_flags & TULIPF_LINK_UP) 5400 mii->mii_media_status |= IFM_ACTIVE; 5401 5402 if (reg & PNIC_NWAY_NW) { 5403 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 5404 /* Erg, still trying, I guess... */ 5405 mii->mii_media_active |= IFM_NONE; 5406 return; 5407 } 5408 5409 #if 0 5410 if (reg & PNIC_NWAY_LPAR100T4) 5411 mii->mii_media_active |= IFM_100_T4; 5412 else 5413 #endif 5414 if (reg & PNIC_NWAY_LPAR100TXFDX) 5415 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 5416 else if (reg & PNIC_NWAY_LPAR100TX) 5417 mii->mii_media_active |= IFM_100_TX; 5418 else if (reg & PNIC_NWAY_LPAR10TFDX) 5419 mii->mii_media_active |= IFM_10_T|IFM_FDX; 5420 else if (reg & PNIC_NWAY_LPAR10T) 5421 mii->mii_media_active |= IFM_10_T; 5422 else 5423 mii->mii_media_active |= IFM_NONE; 5424 } else { 5425 if (reg & PNIC_NWAY_100) 5426 mii->mii_media_active |= IFM_100_TX; 5427 else 5428 mii->mii_media_active |= IFM_10_T; 5429 if (reg & PNIC_NWAY_FD) 5430 mii->mii_media_active |= IFM_FDX; 5431 } 5432 } 5433 5434 void 5435 tlp_pnic_nway_acomp(sc) 5436 struct tulip_softc *sc; 5437 { 5438 u_int32_t reg; 5439 5440 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5441 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 5442 5443 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 5444 reg |= PNIC_NWAY_100; 5445 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 5446 reg |= PNIC_NWAY_FD; 5447 5448 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 5449 } 5450 5451 /* 5452 * Macronix PMAC and Lite-On PNIC-II media switch: 5453 * 5454 * MX98713 and MX98713A 21140-like MII or GPIO media. 5455 * 5456 * MX98713A 21143-like MII or SIA/SYM media. 5457 * 5458 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media. 5459 * 82C115, MX98715AEC-C, -E 5460 * 5461 * So, what we do here is fake MII-on-SIO or ISV media info, and 5462 * use the ISV media switch get/set functions to handle the rest. 5463 */ 5464 5465 void tlp_pmac_tmsw_init __P((struct tulip_softc *)); 5466 5467 const struct tulip_mediasw tlp_pmac_mediasw = { 5468 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 5469 }; 5470 5471 const struct tulip_mediasw tlp_pmac_mii_mediasw = { 5472 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5473 }; 5474 5475 void 5476 tlp_pmac_tmsw_init(sc) 5477 struct tulip_softc *sc; 5478 { 5479 static const u_int8_t media[] = { 5480 TULIP_ROM_MB_MEDIA_TP, 5481 TULIP_ROM_MB_MEDIA_TP_FDX, 5482 TULIP_ROM_MB_MEDIA_100TX, 5483 TULIP_ROM_MB_MEDIA_100TX_FDX, 5484 }; 5485 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5486 5487 sc->sc_mii.mii_ifp = ifp; 5488 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5489 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5490 sc->sc_mii.mii_statchg = sc->sc_statchg; 5491 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5492 tlp_mediastatus); 5493 if (sc->sc_chip == TULIP_CHIP_MX98713 || 5494 sc->sc_chip == TULIP_CHIP_MX98713A) { 5495 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 5496 MII_PHY_ANY, MII_OFFSET_ANY, 0); 5497 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) { 5498 sc->sc_flags |= TULIPF_HAS_MII; 5499 sc->sc_tick = tlp_mii_tick; 5500 sc->sc_preinit = tlp_2114x_mii_preinit; 5501 sc->sc_mediasw = &tlp_pmac_mii_mediasw; 5502 ifmedia_set(&sc->sc_mii.mii_media, 5503 IFM_ETHER|IFM_AUTO); 5504 return; 5505 } 5506 } 5507 5508 switch (sc->sc_chip) { 5509 case TULIP_CHIP_MX98713: 5510 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR, 5511 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4); 5512 5513 /* 5514 * XXX Should implement auto-sense for this someday, 5515 * XXX when we do the same for the 21140. 5516 */ 5517 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5518 break; 5519 5520 default: 5521 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA, 5522 tlp_sia_get, tlp_sia_set, media, 2); 5523 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM, 5524 tlp_sia_get, tlp_sia_set, media + 2, 2); 5525 5526 /* 5527 * XXX Autonegotiation not yet supported. 5528 */ 5529 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5530 break; 5531 } 5532 5533 tlp_print_media(sc); 5534 tlp_sia_fixup(sc); 5535 5536 /* Set the LED modes. */ 5537 tlp_pmac_reset(sc); 5538 5539 sc->sc_reset = tlp_pmac_reset; 5540 } 5541 5542 /* 5543 * ADMtek AL981 media switch. Only has internal PHY. 5544 */ 5545 void tlp_al981_tmsw_init __P((struct tulip_softc *)); 5546 5547 const struct tulip_mediasw tlp_al981_mediasw = { 5548 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5549 }; 5550 5551 void 5552 tlp_al981_tmsw_init(sc) 5553 struct tulip_softc *sc; 5554 { 5555 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5556 5557 sc->sc_mii.mii_ifp = ifp; 5558 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg; 5559 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg; 5560 sc->sc_mii.mii_statchg = sc->sc_statchg; 5561 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5562 tlp_mediastatus); 5563 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5564 MII_OFFSET_ANY, 0); 5565 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5566 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5567 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5568 } else { 5569 sc->sc_flags |= TULIPF_HAS_MII; 5570 sc->sc_tick = tlp_mii_tick; 5571 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5572 } 5573 } 5574 5575 /* 5576 * Davicom DM9102 media switch. Internal PHY and possibly HomePNA. 5577 */ 5578 void tlp_dm9102_tmsw_init __P((struct tulip_softc *)); 5579 void tlp_dm9102_tmsw_getmedia __P((struct tulip_softc *, 5580 struct ifmediareq *)); 5581 int tlp_dm9102_tmsw_setmedia __P((struct tulip_softc *)); 5582 5583 const struct tulip_mediasw tlp_dm9102_mediasw = { 5584 tlp_dm9102_tmsw_init, tlp_dm9102_tmsw_getmedia, 5585 tlp_dm9102_tmsw_setmedia 5586 }; 5587 5588 void 5589 tlp_dm9102_tmsw_init(sc) 5590 struct tulip_softc *sc; 5591 { 5592 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5593 u_int32_t opmode; 5594 5595 sc->sc_mii.mii_ifp = ifp; 5596 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5597 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5598 sc->sc_mii.mii_statchg = sc->sc_statchg; 5599 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5600 tlp_mediastatus); 5601 5602 /* PHY block already reset via tlp_reset(). */ 5603 5604 /* 5605 * Configure OPMODE properly for the internal MII interface. 5606 */ 5607 switch (sc->sc_chip) { 5608 case TULIP_CHIP_DM9102: 5609 opmode = OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 5610 break; 5611 5612 case TULIP_CHIP_DM9102A: 5613 opmode = OPMODE_MBO|OPMODE_HBD; 5614 break; 5615 5616 default: 5617 /* Nothing. */ 5618 } 5619 5620 TULIP_WRITE(sc, CSR_OPMODE, opmode); 5621 5622 /* Now, probe the internal MII for the internal PHY. */ 5623 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5624 MII_OFFSET_ANY, 0); 5625 5626 /* 5627 * XXX Figure out what to do about the HomePNA portion 5628 * XXX of the DM9102A. 5629 */ 5630 5631 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5632 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5633 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5634 } else { 5635 sc->sc_flags |= TULIPF_HAS_MII; 5636 sc->sc_tick = tlp_mii_tick; 5637 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5638 } 5639 } 5640 5641 void 5642 tlp_dm9102_tmsw_getmedia(sc, ifmr) 5643 struct tulip_softc *sc; 5644 struct ifmediareq *ifmr; 5645 { 5646 5647 /* XXX HomePNA on DM9102A. */ 5648 tlp_mii_getmedia(sc, ifmr); 5649 } 5650 5651 int 5652 tlp_dm9102_tmsw_setmedia(sc) 5653 struct tulip_softc *sc; 5654 { 5655 5656 /* XXX HomePNA on DM9102A. */ 5657 return (tlp_mii_setmedia(sc)); 5658 } 5659
Indexes created Fri Sep 26 08:10:20 GMT 2025