tulip.c revision 1.79
1 /* $NetBSD: tulip.c,v 1.79 2000/10/11 16:57:46 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/callout.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <machine/endian.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <net/if.h> 65 #include <net/if_dl.h> 66 #include <net/if_media.h> 67 #include <net/if_ether.h> 68 69 #if NBPFILTER > 0 70 #include <net/bpf.h> 71 #endif 72 73 #ifdef INET 74 #include <netinet/in.h> 75 #include <netinet/if_inarp.h> 76 #endif 77 78 #ifdef NS 79 #include <netns/ns.h> 80 #include <netns/ns_if.h> 81 #endif 82 83 #include <machine/bus.h> 84 #include <machine/intr.h> 85 86 #include <dev/mii/mii.h> 87 #include <dev/mii/miivar.h> 88 #include <dev/mii/mii_bitbang.h> 89 90 #include <dev/ic/tulipreg.h> 91 #include <dev/ic/tulipvar.h> 92 93 const char *tlp_chip_names[] = TULIP_CHIP_NAMES; 94 95 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = 96 TLP_TXTHRESH_TAB_10; 97 98 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = 99 TLP_TXTHRESH_TAB_10_100; 100 101 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = 102 TLP_TXTHRESH_TAB_WINB; 103 104 const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] = 105 TLP_TXTHRESH_TAB_DM9102; 106 107 void tlp_start __P((struct ifnet *)); 108 void tlp_watchdog __P((struct ifnet *)); 109 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 110 int tlp_init __P((struct ifnet *)); 111 void tlp_stop __P((struct ifnet *, int)); 112 113 void tlp_shutdown __P((void *)); 114 115 void tlp_reset __P((struct tulip_softc *)); 116 void tlp_rxdrain __P((struct tulip_softc *)); 117 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 118 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 119 void tlp_srom_idle __P((struct tulip_softc *)); 120 int tlp_srom_size __P((struct tulip_softc *)); 121 122 int tlp_enable __P((struct tulip_softc *)); 123 void tlp_disable __P((struct tulip_softc *)); 124 void tlp_power __P((int, void *)); 125 126 void tlp_filter_setup __P((struct tulip_softc *)); 127 void tlp_winb_filter_setup __P((struct tulip_softc *)); 128 void tlp_al981_filter_setup __P((struct tulip_softc *)); 129 130 void tlp_rxintr __P((struct tulip_softc *)); 131 void tlp_txintr __P((struct tulip_softc *)); 132 133 void tlp_mii_tick __P((void *)); 134 void tlp_mii_statchg __P((struct device *)); 135 void tlp_winb_mii_statchg __P((struct device *)); 136 void tlp_dm9102_mii_statchg __P((struct device *)); 137 138 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 139 int tlp_mii_setmedia __P((struct tulip_softc *)); 140 141 int tlp_bitbang_mii_readreg __P((struct device *, int, int)); 142 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int)); 143 144 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 145 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 146 147 int tlp_al981_mii_readreg __P((struct device *, int, int)); 148 void tlp_al981_mii_writereg __P((struct device *, int, int, int)); 149 150 void tlp_2114x_preinit __P((struct tulip_softc *)); 151 void tlp_2114x_mii_preinit __P((struct tulip_softc *)); 152 void tlp_pnic_preinit __P((struct tulip_softc *)); 153 void tlp_dm9102_preinit __P((struct tulip_softc *)); 154 155 void tlp_21140_reset __P((struct tulip_softc *)); 156 void tlp_21142_reset __P((struct tulip_softc *)); 157 void tlp_pmac_reset __P((struct tulip_softc *)); 158 void tlp_dm9102_reset __P((struct tulip_softc *)); 159 160 #define tlp_mchash(addr, sz) \ 161 (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1)) 162 163 /* 164 * MII bit-bang glue. 165 */ 166 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *)); 167 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t)); 168 169 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = { 170 tlp_sio_mii_bitbang_read, 171 tlp_sio_mii_bitbang_write, 172 { 173 MIIROM_MDO, /* MII_BIT_MDO */ 174 MIIROM_MDI, /* MII_BIT_MDI */ 175 MIIROM_MDC, /* MII_BIT_MDC */ 176 0, /* MII_BIT_DIR_HOST_PHY */ 177 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */ 178 } 179 }; 180 181 #ifdef TLP_DEBUG 182 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 183 printf x 184 #else 185 #define DPRINTF(sc, x) /* nothing */ 186 #endif 187 188 #ifdef TLP_STATS 189 void tlp_print_stats __P((struct tulip_softc *)); 190 #endif 191 192 /* 193 * Can be used to debug the SROM-related things, including contents. 194 * Initialized so that it's patchable. 195 */ 196 int tlp_srom_debug = 0; 197 198 /* 199 * tlp_attach: 200 * 201 * Attach a Tulip interface to the system. 202 */ 203 void 204 tlp_attach(sc, enaddr) 205 struct tulip_softc *sc; 206 const u_int8_t *enaddr; 207 { 208 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 209 int i, error; 210 211 callout_init(&sc->sc_nway_callout); 212 callout_init(&sc->sc_tick_callout); 213 214 /* 215 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 216 */ 217 218 /* 219 * Setup the transmit threshold table. 220 */ 221 switch (sc->sc_chip) { 222 case TULIP_CHIP_DE425: 223 case TULIP_CHIP_21040: 224 case TULIP_CHIP_21041: 225 sc->sc_txth = tlp_10_txthresh_tab; 226 break; 227 228 case TULIP_CHIP_DM9102: 229 case TULIP_CHIP_DM9102A: 230 sc->sc_txth = tlp_dm9102_txthresh_tab; 231 break; 232 233 default: 234 sc->sc_txth = tlp_10_100_txthresh_tab; 235 break; 236 } 237 238 /* 239 * Setup the filter setup function. 240 */ 241 switch (sc->sc_chip) { 242 case TULIP_CHIP_WB89C840F: 243 sc->sc_filter_setup = tlp_winb_filter_setup; 244 break; 245 246 case TULIP_CHIP_AL981: 247 case TULIP_CHIP_AN983: 248 case TULIP_CHIP_AN985: 249 sc->sc_filter_setup = tlp_al981_filter_setup; 250 break; 251 252 default: 253 sc->sc_filter_setup = tlp_filter_setup; 254 break; 255 } 256 257 /* 258 * Set up the media status change function. 259 */ 260 switch (sc->sc_chip) { 261 case TULIP_CHIP_WB89C840F: 262 sc->sc_statchg = tlp_winb_mii_statchg; 263 break; 264 265 case TULIP_CHIP_DM9102: 266 case TULIP_CHIP_DM9102A: 267 sc->sc_statchg = tlp_dm9102_mii_statchg; 268 break; 269 270 default: 271 /* 272 * We may override this if we have special media 273 * handling requirements (e.g. flipping GPIO pins). 274 * 275 * The pure-MII statchg function covers the basics. 276 */ 277 sc->sc_statchg = tlp_mii_statchg; 278 break; 279 } 280 281 /* 282 * Default to no FS|LS in setup packet descriptors. They're 283 * supposed to be zero according to the 21040 and 21143 284 * manuals, and some chips fall over badly if they're 285 * included. Yet, other chips seem to require them. Sigh. 286 */ 287 switch (sc->sc_chip) { 288 case TULIP_CHIP_X3201_3: 289 sc->sc_setup_fsls = TDCTL_Tx_FS|TDCTL_Tx_LS; 290 break; 291 292 default: 293 sc->sc_setup_fsls = 0; 294 } 295 296 /* 297 * Set up various chip-specific quirks. 298 * 299 * Note that wherever we can, we use the "ring" option for 300 * transmit and receive descriptors. This is because some 301 * clone chips apparently have problems when using chaining, 302 * although some *only* support chaining. 303 * 304 * What we do is always program the "next" pointer, and then 305 * conditionally set the TDCTL_CH and TDCTL_ER bits in the 306 * appropriate places. 307 */ 308 switch (sc->sc_chip) { 309 case TULIP_CHIP_21140: 310 case TULIP_CHIP_21140A: 311 case TULIP_CHIP_21142: 312 case TULIP_CHIP_21143: 313 case TULIP_CHIP_82C115: /* 21143-like */ 314 case TULIP_CHIP_MX98713: /* 21140-like */ 315 case TULIP_CHIP_MX98713A: /* 21143-like */ 316 case TULIP_CHIP_MX98715: /* 21143-like */ 317 case TULIP_CHIP_MX98715A: /* 21143-like */ 318 case TULIP_CHIP_MX98715AEC_X: /* 21143-like */ 319 case TULIP_CHIP_MX98725: /* 21143-like */ 320 /* 321 * Run these chips in ring mode. 322 */ 323 sc->sc_tdctl_ch = 0; 324 sc->sc_tdctl_er = TDCTL_ER; 325 sc->sc_preinit = tlp_2114x_preinit; 326 break; 327 328 case TULIP_CHIP_82C168: 329 case TULIP_CHIP_82C169: 330 /* 331 * Run these chips in ring mode. 332 */ 333 sc->sc_tdctl_ch = 0; 334 sc->sc_tdctl_er = TDCTL_ER; 335 sc->sc_preinit = tlp_pnic_preinit; 336 337 /* 338 * These chips seem to have busted DMA engines; just put them 339 * in Store-and-Forward mode from the get-go. 340 */ 341 sc->sc_txthresh = TXTH_SF; 342 break; 343 344 case TULIP_CHIP_WB89C840F: 345 /* 346 * Run this chip in chained mode. 347 */ 348 sc->sc_tdctl_ch = TDCTL_CH; 349 sc->sc_tdctl_er = 0; 350 sc->sc_flags |= TULIPF_IC_FS; 351 break; 352 353 case TULIP_CHIP_DM9102: 354 case TULIP_CHIP_DM9102A: 355 /* 356 * Run these chips in chained mode. 357 */ 358 sc->sc_tdctl_ch = TDCTL_CH; 359 sc->sc_tdctl_er = 0; 360 sc->sc_preinit = tlp_dm9102_preinit; 361 362 /* 363 * These chips have a broken bus interface, so we 364 * can't use any optimized bus commands. For this 365 * reason, we tend to underrun pretty quickly, so 366 * just to Store-and-Forward mode from the get-go. 367 */ 368 sc->sc_txthresh = TXTH_DM9102_SF; 369 break; 370 371 default: 372 /* 373 * Default to running in ring mode. 374 */ 375 sc->sc_tdctl_ch = 0; 376 sc->sc_tdctl_er = TDCTL_ER; 377 } 378 379 /* 380 * Set up the MII bit-bang operations. 381 */ 382 switch (sc->sc_chip) { 383 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */ 384 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 385 break; 386 387 default: 388 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 389 } 390 391 SIMPLEQ_INIT(&sc->sc_txfreeq); 392 SIMPLEQ_INIT(&sc->sc_txdirtyq); 393 394 /* 395 * Allocate the control data structures, and create and load the 396 * DMA map for it. 397 */ 398 if ((error = bus_dmamem_alloc(sc->sc_dmat, 399 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg, 400 1, &sc->sc_cdnseg, 0)) != 0) { 401 printf("%s: unable to allocate control data, error = %d\n", 402 sc->sc_dev.dv_xname, error); 403 goto fail_0; 404 } 405 406 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg, 407 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 408 BUS_DMA_COHERENT)) != 0) { 409 printf("%s: unable to map control data, error = %d\n", 410 sc->sc_dev.dv_xname, error); 411 goto fail_1; 412 } 413 414 if ((error = bus_dmamap_create(sc->sc_dmat, 415 sizeof(struct tulip_control_data), 1, 416 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 417 printf("%s: unable to create control data DMA map, " 418 "error = %d\n", sc->sc_dev.dv_xname, error); 419 goto fail_2; 420 } 421 422 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 423 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 424 0)) != 0) { 425 printf("%s: unable to load control data DMA map, error = %d\n", 426 sc->sc_dev.dv_xname, error); 427 goto fail_3; 428 } 429 430 /* 431 * Create the transmit buffer DMA maps. 432 * 433 * Note that on the Xircom clone, transmit buffers must be 434 * 4-byte aligned. We're almost guaranteed to have to copy 435 * the packet in that case, so we just limit ourselves to 436 * one segment. 437 * 438 * On the DM9102, the transmit logic can only handle one 439 * DMA segment. 440 */ 441 switch (sc->sc_chip) { 442 case TULIP_CHIP_X3201_3: 443 case TULIP_CHIP_DM9102: 444 case TULIP_CHIP_DM9102A: 445 sc->sc_ntxsegs = 1; 446 break; 447 448 default: 449 sc->sc_ntxsegs = TULIP_NTXSEGS; 450 } 451 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 452 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 453 sc->sc_ntxsegs, MCLBYTES, 0, 0, 454 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 455 printf("%s: unable to create tx DMA map %d, " 456 "error = %d\n", sc->sc_dev.dv_xname, i, error); 457 goto fail_4; 458 } 459 } 460 461 /* 462 * Create the recieve buffer DMA maps. 463 */ 464 for (i = 0; i < TULIP_NRXDESC; i++) { 465 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 466 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 467 printf("%s: unable to create rx DMA map %d, " 468 "error = %d\n", sc->sc_dev.dv_xname, i, error); 469 goto fail_5; 470 } 471 sc->sc_rxsoft[i].rxs_mbuf = NULL; 472 } 473 474 /* 475 * From this point forward, the attachment cannot fail. A failure 476 * before this point releases all resources that may have been 477 * allocated. 478 */ 479 sc->sc_flags |= TULIPF_ATTACHED; 480 481 /* 482 * Reset the chip to a known state. 483 */ 484 tlp_reset(sc); 485 486 /* Announce ourselves. */ 487 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 488 sc->sc_name[0] != '\0' ? sc->sc_name : "", 489 sc->sc_name[0] != '\0' ? ", " : "", 490 ether_sprintf(enaddr)); 491 492 /* 493 * Initialize our media structures. This may probe the MII, if 494 * present. 495 */ 496 (*sc->sc_mediasw->tmsw_init)(sc); 497 498 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 499 ifp->if_softc = sc; 500 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 501 ifp->if_ioctl = tlp_ioctl; 502 ifp->if_start = tlp_start; 503 ifp->if_watchdog = tlp_watchdog; 504 ifp->if_init = tlp_init; 505 ifp->if_stop = tlp_stop; 506 507 /* 508 * We can support 802.1Q VLAN-sized frames. 509 */ 510 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 511 512 /* 513 * Attach the interface. 514 */ 515 if_attach(ifp); 516 ether_ifattach(ifp, enaddr); 517 #if NBPFILTER > 0 518 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 519 sizeof(struct ether_header)); 520 #endif 521 #if NRND > 0 522 rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname, 523 RND_TYPE_NET, 0); 524 #endif 525 526 /* 527 * Make sure the interface is shutdown during reboot. 528 */ 529 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 530 if (sc->sc_sdhook == NULL) 531 printf("%s: WARNING: unable to establish shutdown hook\n", 532 sc->sc_dev.dv_xname); 533 534 /* 535 * Add a suspend hook to make sure we come back up after a 536 * resume. 537 */ 538 sc->sc_powerhook = powerhook_establish(tlp_power, sc); 539 if (sc->sc_powerhook == NULL) 540 printf("%s: WARNING: unable to establish power hook\n", 541 sc->sc_dev.dv_xname); 542 return; 543 544 /* 545 * Free any resources we've allocated during the failed attach 546 * attempt. Do this in reverse order and fall through. 547 */ 548 fail_5: 549 for (i = 0; i < TULIP_NRXDESC; i++) { 550 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 551 bus_dmamap_destroy(sc->sc_dmat, 552 sc->sc_rxsoft[i].rxs_dmamap); 553 } 554 fail_4: 555 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 556 if (sc->sc_txsoft[i].txs_dmamap != NULL) 557 bus_dmamap_destroy(sc->sc_dmat, 558 sc->sc_txsoft[i].txs_dmamap); 559 } 560 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 561 fail_3: 562 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 563 fail_2: 564 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 565 sizeof(struct tulip_control_data)); 566 fail_1: 567 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 568 fail_0: 569 return; 570 } 571 572 /* 573 * tlp_activate: 574 * 575 * Handle device activation/deactivation requests. 576 */ 577 int 578 tlp_activate(self, act) 579 struct device *self; 580 enum devact act; 581 { 582 struct tulip_softc *sc = (void *) self; 583 int s, error = 0; 584 585 s = splnet(); 586 switch (act) { 587 case DVACT_ACTIVATE: 588 error = EOPNOTSUPP; 589 break; 590 591 case DVACT_DEACTIVATE: 592 if (sc->sc_flags & TULIPF_HAS_MII) 593 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 594 MII_OFFSET_ANY); 595 if_deactivate(&sc->sc_ethercom.ec_if); 596 break; 597 } 598 splx(s); 599 600 return (error); 601 } 602 603 /* 604 * tlp_detach: 605 * 606 * Detach a Tulip interface. 607 */ 608 int 609 tlp_detach(sc) 610 struct tulip_softc *sc; 611 { 612 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 613 struct tulip_rxsoft *rxs; 614 struct tulip_txsoft *txs; 615 int i; 616 617 /* 618 * Suceed now if there isn't any work to do. 619 */ 620 if ((sc->sc_flags & TULIPF_ATTACHED) == 0) 621 return (0); 622 623 /* Unhook our tick handler. */ 624 if (sc->sc_tick) 625 callout_stop(&sc->sc_tick_callout); 626 627 if (sc->sc_flags & TULIPF_HAS_MII) { 628 /* Detach all PHYs */ 629 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 630 } 631 632 /* Delete all remaining media. */ 633 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 634 635 #if NRND > 0 636 rnd_detach_source(&sc->sc_rnd_source); 637 #endif 638 #if NBPFILTER > 0 639 bpfdetach(ifp); 640 #endif 641 ether_ifdetach(ifp); 642 if_detach(ifp); 643 644 for (i = 0; i < TULIP_NRXDESC; i++) { 645 rxs = &sc->sc_rxsoft[i]; 646 if (rxs->rxs_mbuf != NULL) { 647 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 648 m_freem(rxs->rxs_mbuf); 649 rxs->rxs_mbuf = NULL; 650 } 651 bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap); 652 } 653 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 654 txs = &sc->sc_txsoft[i]; 655 if (txs->txs_mbuf != NULL) { 656 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 657 m_freem(txs->txs_mbuf); 658 txs->txs_mbuf = NULL; 659 } 660 bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap); 661 } 662 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 663 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 664 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 665 sizeof(struct tulip_control_data)); 666 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 667 668 shutdownhook_disestablish(sc->sc_sdhook); 669 powerhook_disestablish(sc->sc_powerhook); 670 671 if (sc->sc_srom) 672 free(sc->sc_srom, M_DEVBUF); 673 674 return (0); 675 } 676 677 /* 678 * tlp_shutdown: 679 * 680 * Make sure the interface is stopped at reboot time. 681 */ 682 void 683 tlp_shutdown(arg) 684 void *arg; 685 { 686 struct tulip_softc *sc = arg; 687 688 tlp_stop(&sc->sc_ethercom.ec_if, 1); 689 } 690 691 /* 692 * tlp_start: [ifnet interface function] 693 * 694 * Start packet transmission on the interface. 695 */ 696 void 697 tlp_start(ifp) 698 struct ifnet *ifp; 699 { 700 struct tulip_softc *sc = ifp->if_softc; 701 struct mbuf *m0, *m; 702 struct tulip_txsoft *txs, *last_txs; 703 bus_dmamap_t dmamap; 704 int error, firsttx, nexttx, lasttx, ofree, seg; 705 706 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 707 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 708 709 /* 710 * If we want a filter setup, it means no more descriptors were 711 * available for the setup routine. Let it get a chance to wedge 712 * itself into the ring. 713 */ 714 if (sc->sc_flags & TULIPF_WANT_SETUP) 715 ifp->if_flags |= IFF_OACTIVE; 716 717 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 718 return; 719 720 /* 721 * Remember the previous number of free descriptors and 722 * the first descriptor we'll use. 723 */ 724 ofree = sc->sc_txfree; 725 firsttx = sc->sc_txnext; 726 727 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 728 sc->sc_dev.dv_xname, ofree, firsttx)); 729 730 /* 731 * Loop through the send queue, setting up transmit descriptors 732 * until we drain the queue, or use up all available transmit 733 * descriptors. 734 */ 735 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 736 sc->sc_txfree != 0) { 737 /* 738 * Grab a packet off the queue. 739 */ 740 IF_DEQUEUE(&ifp->if_snd, m0); 741 if (m0 == NULL) 742 break; 743 744 dmamap = txs->txs_dmamap; 745 746 /* 747 * Load the DMA map. If this fails, the packet either 748 * didn't fit in the alloted number of segments, or we were 749 * short on resources. In this case, we'll copy and try 750 * again. 751 * 752 * Note that if we're only allowed 1 Tx segment, we 753 * have an alignment restriction. Do this test before 754 * attempting to load the DMA map, because it's more 755 * likely we'll trip the alignment test than the 756 * more-than-one-segment test. 757 */ 758 if ((sc->sc_ntxsegs == 1 && (mtod(m0, bus_addr_t) & 3) != 0) || 759 bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 760 BUS_DMA_NOWAIT) != 0) { 761 MGETHDR(m, M_DONTWAIT, MT_DATA); 762 if (m == NULL) { 763 printf("%s: unable to allocate Tx mbuf\n", 764 sc->sc_dev.dv_xname); 765 IF_PREPEND(&ifp->if_snd, m0); 766 break; 767 } 768 if (m0->m_pkthdr.len > MHLEN) { 769 MCLGET(m, M_DONTWAIT); 770 if ((m->m_flags & M_EXT) == 0) { 771 printf("%s: unable to allocate Tx " 772 "cluster\n", sc->sc_dev.dv_xname); 773 m_freem(m); 774 IF_PREPEND(&ifp->if_snd, m0); 775 break; 776 } 777 } 778 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 779 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 780 m_freem(m0); 781 m0 = m; 782 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 783 m0, BUS_DMA_NOWAIT); 784 if (error) { 785 printf("%s: unable to load Tx buffer, " 786 "error = %d\n", sc->sc_dev.dv_xname, error); 787 IF_PREPEND(&ifp->if_snd, m0); 788 break; 789 } 790 } 791 792 /* 793 * Ensure we have enough descriptors free to describe 794 * the packet. 795 */ 796 if (dmamap->dm_nsegs > sc->sc_txfree) { 797 /* 798 * Not enough free descriptors to transmit this 799 * packet. We haven't committed to anything yet, 800 * so just unload the DMA map, put the packet 801 * back on the queue, and punt. Notify the upper 802 * layer that there are no more slots left. 803 * 804 * XXX We could allocate an mbuf and copy, but 805 * XXX it is worth it? 806 */ 807 ifp->if_flags |= IFF_OACTIVE; 808 bus_dmamap_unload(sc->sc_dmat, dmamap); 809 IF_PREPEND(&ifp->if_snd, m0); 810 break; 811 } 812 813 /* 814 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 815 */ 816 817 /* Sync the DMA map. */ 818 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 819 BUS_DMASYNC_PREWRITE); 820 821 /* 822 * Initialize the transmit descriptors. 823 */ 824 for (nexttx = sc->sc_txnext, seg = 0; 825 seg < dmamap->dm_nsegs; 826 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 827 /* 828 * If this is the first descriptor we're 829 * enqueueing, don't set the OWN bit just 830 * yet. That could cause a race condition. 831 * We'll do it below. 832 */ 833 sc->sc_txdescs[nexttx].td_status = 834 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN); 835 sc->sc_txdescs[nexttx].td_bufaddr1 = 836 htole32(dmamap->dm_segs[seg].ds_addr); 837 sc->sc_txdescs[nexttx].td_ctl = 838 htole32((dmamap->dm_segs[seg].ds_len << 839 TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch | 840 (nexttx == (TULIP_NTXDESC - 1) ? 841 sc->sc_tdctl_er : 0)); 842 lasttx = nexttx; 843 } 844 845 /* Set `first segment' and `last segment' appropriately. */ 846 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS); 847 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS); 848 849 #ifdef TLP_DEBUG 850 if (ifp->if_flags & IFF_DEBUG) { 851 printf(" txsoft %p transmit chain:\n", txs); 852 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 853 printf(" descriptor %d:\n", seg); 854 printf(" td_status: 0x%08x\n", 855 le32toh(sc->sc_txdescs[seg].td_status)); 856 printf(" td_ctl: 0x%08x\n", 857 le32toh(sc->sc_txdescs[seg].td_ctl)); 858 printf(" td_bufaddr1: 0x%08x\n", 859 le32toh(sc->sc_txdescs[seg].td_bufaddr1)); 860 printf(" td_bufaddr2: 0x%08x\n", 861 le32toh(sc->sc_txdescs[seg].td_bufaddr2)); 862 if (seg == lasttx) 863 break; 864 } 865 } 866 #endif 867 868 /* Sync the descriptors we're using. */ 869 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 870 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 871 872 /* 873 * Store a pointer to the packet so we can free it later, 874 * and remember what txdirty will be once the packet is 875 * done. 876 */ 877 txs->txs_mbuf = m0; 878 txs->txs_firstdesc = sc->sc_txnext; 879 txs->txs_lastdesc = lasttx; 880 txs->txs_ndescs = dmamap->dm_nsegs; 881 882 /* Advance the tx pointer. */ 883 sc->sc_txfree -= dmamap->dm_nsegs; 884 sc->sc_txnext = nexttx; 885 886 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 887 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 888 889 last_txs = txs; 890 891 #if NBPFILTER > 0 892 /* 893 * Pass the packet to any BPF listeners. 894 */ 895 if (ifp->if_bpf) 896 bpf_mtap(ifp->if_bpf, m0); 897 #endif /* NBPFILTER > 0 */ 898 } 899 900 if (txs == NULL || sc->sc_txfree == 0) { 901 /* No more slots left; notify upper layer. */ 902 ifp->if_flags |= IFF_OACTIVE; 903 } 904 905 if (sc->sc_txfree != ofree) { 906 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 907 sc->sc_dev.dv_xname, lasttx, firsttx)); 908 /* 909 * Cause a transmit interrupt to happen on the 910 * last packet we enqueued. 911 */ 912 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC); 913 TULIP_CDTXSYNC(sc, lasttx, 1, 914 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 915 916 /* 917 * Some clone chips want IC on the *first* segment in 918 * the packet. Appease them. 919 */ 920 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 921 last_txs->txs_firstdesc != lasttx) { 922 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 923 htole32(TDCTL_Tx_IC); 924 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 925 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 926 } 927 928 /* 929 * The entire packet chain is set up. Give the 930 * first descriptor to the chip now. 931 */ 932 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN); 933 TULIP_CDTXSYNC(sc, firsttx, 1, 934 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 935 936 /* Wake up the transmitter. */ 937 /* XXX USE AUTOPOLLING? */ 938 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 939 940 /* Set a watchdog timer in case the chip flakes out. */ 941 ifp->if_timer = 5; 942 } 943 } 944 945 /* 946 * tlp_watchdog: [ifnet interface function] 947 * 948 * Watchdog timer handler. 949 */ 950 void 951 tlp_watchdog(ifp) 952 struct ifnet *ifp; 953 { 954 struct tulip_softc *sc = ifp->if_softc; 955 int doing_setup, doing_transmit; 956 957 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 958 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 959 960 if (doing_setup && doing_transmit) { 961 printf("%s: filter setup and transmit timeout\n", 962 sc->sc_dev.dv_xname); 963 ifp->if_oerrors++; 964 } else if (doing_transmit) { 965 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 966 ifp->if_oerrors++; 967 } else if (doing_setup) 968 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 969 else 970 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 971 972 (void) tlp_init(ifp); 973 974 /* Try to get more packets going. */ 975 tlp_start(ifp); 976 } 977 978 /* 979 * tlp_ioctl: [ifnet interface function] 980 * 981 * Handle control requests from the operator. 982 */ 983 int 984 tlp_ioctl(ifp, cmd, data) 985 struct ifnet *ifp; 986 u_long cmd; 987 caddr_t data; 988 { 989 struct tulip_softc *sc = ifp->if_softc; 990 struct ifreq *ifr = (struct ifreq *)data; 991 int s, error; 992 993 s = splnet(); 994 995 switch (cmd) { 996 case SIOCSIFMEDIA: 997 case SIOCGIFMEDIA: 998 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 999 break; 1000 1001 default: 1002 error = ether_ioctl(ifp, cmd, data); 1003 if (error == ENETRESET) { 1004 if (TULIP_IS_ENABLED(sc)) { 1005 /* 1006 * Multicast list has changed. Set the 1007 * hardware filter accordingly. 1008 */ 1009 (*sc->sc_filter_setup)(sc); 1010 } 1011 error = 0; 1012 } 1013 break; 1014 } 1015 1016 /* Try to get more packets going. */ 1017 if (TULIP_IS_ENABLED(sc)) 1018 tlp_start(ifp); 1019 1020 splx(s); 1021 return (error); 1022 } 1023 1024 /* 1025 * tlp_intr: 1026 * 1027 * Interrupt service routine. 1028 */ 1029 int 1030 tlp_intr(arg) 1031 void *arg; 1032 { 1033 struct tulip_softc *sc = arg; 1034 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1035 u_int32_t status, rxstatus, txstatus; 1036 int handled = 0, txthresh; 1037 1038 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 1039 1040 #ifdef DEBUG 1041 if (TULIP_IS_ENABLED(sc) == 0) 1042 panic("%s: tlp_intr: not enabled\n", sc->sc_dev.dv_xname); 1043 #endif 1044 1045 /* 1046 * If the interface isn't running, the interrupt couldn't 1047 * possibly have come from us. 1048 */ 1049 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1050 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1051 return (0); 1052 1053 /* Disable interrupts on the DM9102 (interrupt edge bug). */ 1054 switch (sc->sc_chip) { 1055 case TULIP_CHIP_DM9102: 1056 case TULIP_CHIP_DM9102A: 1057 TULIP_WRITE(sc, CSR_INTEN, 0); 1058 break; 1059 1060 default: 1061 /* Nothing. */ 1062 } 1063 1064 for (;;) { 1065 status = TULIP_READ(sc, CSR_STATUS); 1066 if (status) 1067 TULIP_WRITE(sc, CSR_STATUS, status); 1068 1069 if ((status & sc->sc_inten) == 0) 1070 break; 1071 1072 handled = 1; 1073 1074 rxstatus = status & sc->sc_rxint_mask; 1075 txstatus = status & sc->sc_txint_mask; 1076 1077 if (rxstatus) { 1078 /* Grab new any new packets. */ 1079 tlp_rxintr(sc); 1080 1081 if (rxstatus & STATUS_RWT) 1082 printf("%s: receive watchdog timeout\n", 1083 sc->sc_dev.dv_xname); 1084 1085 if (rxstatus & STATUS_RU) { 1086 printf("%s: receive ring overrun\n", 1087 sc->sc_dev.dv_xname); 1088 /* Get the receive process going again. */ 1089 if (sc->sc_tdctl_er != TDCTL_ER) { 1090 tlp_idle(sc, OPMODE_SR); 1091 TULIP_WRITE(sc, CSR_RXLIST, 1092 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1093 TULIP_WRITE(sc, CSR_OPMODE, 1094 sc->sc_opmode); 1095 } 1096 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1097 break; 1098 } 1099 } 1100 1101 if (txstatus) { 1102 /* Sweep up transmit descriptors. */ 1103 tlp_txintr(sc); 1104 1105 if (txstatus & STATUS_TJT) 1106 printf("%s: transmit jabber timeout\n", 1107 sc->sc_dev.dv_xname); 1108 1109 if (txstatus & STATUS_UNF) { 1110 /* 1111 * Increase our transmit threshold if 1112 * another is available. 1113 */ 1114 txthresh = sc->sc_txthresh + 1; 1115 if (sc->sc_txth[txthresh].txth_name != NULL) { 1116 /* Idle the transmit process. */ 1117 tlp_idle(sc, OPMODE_ST); 1118 1119 sc->sc_txthresh = txthresh; 1120 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 1121 sc->sc_opmode |= 1122 sc->sc_txth[txthresh].txth_opmode; 1123 printf("%s: transmit underrun; new " 1124 "threshold: %s\n", 1125 sc->sc_dev.dv_xname, 1126 sc->sc_txth[txthresh].txth_name); 1127 1128 /* 1129 * Set the new threshold and restart 1130 * the transmit process. 1131 */ 1132 TULIP_WRITE(sc, CSR_OPMODE, 1133 sc->sc_opmode); 1134 } 1135 /* 1136 * XXX Log every Nth underrun from 1137 * XXX now on? 1138 */ 1139 } 1140 } 1141 1142 if (status & (STATUS_TPS|STATUS_RPS)) { 1143 if (status & STATUS_TPS) 1144 printf("%s: transmit process stopped\n", 1145 sc->sc_dev.dv_xname); 1146 if (status & STATUS_RPS) 1147 printf("%s: receive process stopped\n", 1148 sc->sc_dev.dv_xname); 1149 (void) tlp_init(ifp); 1150 break; 1151 } 1152 1153 if (status & STATUS_SE) { 1154 const char *str; 1155 switch (status & STATUS_EB) { 1156 case STATUS_EB_PARITY: 1157 str = "parity error"; 1158 break; 1159 1160 case STATUS_EB_MABT: 1161 str = "master abort"; 1162 break; 1163 1164 case STATUS_EB_TABT: 1165 str = "target abort"; 1166 break; 1167 1168 default: 1169 str = "unknown error"; 1170 break; 1171 } 1172 printf("%s: fatal system error: %s\n", 1173 sc->sc_dev.dv_xname, str); 1174 (void) tlp_init(ifp); 1175 break; 1176 } 1177 1178 /* 1179 * Not handled: 1180 * 1181 * Transmit buffer unavailable -- normal 1182 * condition, nothing to do, really. 1183 * 1184 * General purpose timer experied -- we don't 1185 * use the general purpose timer. 1186 * 1187 * Early receive interrupt -- not available on 1188 * all chips, we just use RI. We also only 1189 * use single-segment receive DMA, so this 1190 * is mostly useless. 1191 */ 1192 } 1193 1194 /* Bring interrupts back up on the DM9102. */ 1195 switch (sc->sc_chip) { 1196 case TULIP_CHIP_DM9102: 1197 case TULIP_CHIP_DM9102A: 1198 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1199 break; 1200 1201 default: 1202 /* Nothing. */ 1203 } 1204 1205 /* Try to get more packets going. */ 1206 tlp_start(ifp); 1207 1208 #if NRND > 0 1209 if (handled) 1210 rnd_add_uint32(&sc->sc_rnd_source, status); 1211 #endif 1212 return (handled); 1213 } 1214 1215 /* 1216 * tlp_rxintr: 1217 * 1218 * Helper; handle receive interrupts. 1219 */ 1220 void 1221 tlp_rxintr(sc) 1222 struct tulip_softc *sc; 1223 { 1224 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1225 struct ether_header *eh; 1226 struct tulip_rxsoft *rxs; 1227 struct mbuf *m; 1228 u_int32_t rxstat; 1229 int i, len; 1230 1231 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 1232 rxs = &sc->sc_rxsoft[i]; 1233 1234 TULIP_CDRXSYNC(sc, i, 1235 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1236 1237 rxstat = le32toh(sc->sc_rxdescs[i].td_status); 1238 1239 if (rxstat & TDSTAT_OWN) { 1240 /* 1241 * We have processed all of the receive buffers. 1242 */ 1243 break; 1244 } 1245 1246 /* 1247 * Make sure the packet fit in one buffer. This should 1248 * always be the case. But the Lite-On PNIC, rev 33 1249 * has an awful receive engine bug, which may require 1250 * a very icky work-around. 1251 */ 1252 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1253 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1254 printf("%s: incoming packet spilled, resetting\n", 1255 sc->sc_dev.dv_xname); 1256 (void) tlp_init(ifp); 1257 return; 1258 } 1259 1260 /* 1261 * If any collisions were seen on the wire, count one. 1262 */ 1263 if (rxstat & TDSTAT_Rx_CS) 1264 ifp->if_collisions++; 1265 1266 /* 1267 * If an error occured, update stats, clear the status 1268 * word, and leave the packet buffer in place. It will 1269 * simply be reused the next time the ring comes around. 1270 * If 802.1Q VLAN MTU is enabled, ignore the Frame Too Long 1271 * error. 1272 */ 1273 if (rxstat & TDSTAT_ES && 1274 ((sc->sc_ethercom.ec_capenable & ETHERCAP_VLAN_MTU) == 0 || 1275 (rxstat & (TDSTAT_Rx_DE | TDSTAT_Rx_RF | TDSTAT_Rx_RE | 1276 TDSTAT_Rx_DB | TDSTAT_Rx_CE)) != 0)) { 1277 #define PRINTERR(bit, str) \ 1278 if (rxstat & (bit)) \ 1279 printf("%s: receive error: %s\n", \ 1280 sc->sc_dev.dv_xname, str) 1281 ifp->if_ierrors++; 1282 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1283 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1284 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1285 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1286 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1287 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1288 #undef PRINTERR 1289 TULIP_INIT_RXDESC(sc, i); 1290 continue; 1291 } 1292 1293 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1294 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1295 1296 /* 1297 * No errors; receive the packet. Note the Tulip 1298 * includes the CRC with every packet; trim it. 1299 */ 1300 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; 1301 1302 #ifdef __NO_STRICT_ALIGNMENT 1303 /* 1304 * Allocate a new mbuf cluster. If that fails, we are 1305 * out of memory, and must drop the packet and recycle 1306 * the buffer that's already attached to this descriptor. 1307 */ 1308 m = rxs->rxs_mbuf; 1309 if (tlp_add_rxbuf(sc, i) != 0) { 1310 ifp->if_ierrors++; 1311 TULIP_INIT_RXDESC(sc, i); 1312 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1313 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1314 continue; 1315 } 1316 #else 1317 /* 1318 * The Tulip's receive buffers must be 4-byte aligned. 1319 * But this means that the data after the Ethernet header 1320 * is misaligned. We must allocate a new buffer and 1321 * copy the data, shifted forward 2 bytes. 1322 */ 1323 MGETHDR(m, M_DONTWAIT, MT_DATA); 1324 if (m == NULL) { 1325 dropit: 1326 ifp->if_ierrors++; 1327 TULIP_INIT_RXDESC(sc, i); 1328 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1329 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1330 continue; 1331 } 1332 if (len > (MHLEN - 2)) { 1333 MCLGET(m, M_DONTWAIT); 1334 if ((m->m_flags & M_EXT) == 0) { 1335 m_freem(m); 1336 goto dropit; 1337 } 1338 } 1339 m->m_data += 2; 1340 1341 /* 1342 * Note that we use clusters for incoming frames, so the 1343 * buffer is virtually contiguous. 1344 */ 1345 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1346 1347 /* Allow the receive descriptor to continue using its mbuf. */ 1348 TULIP_INIT_RXDESC(sc, i); 1349 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1350 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1351 #endif /* __NO_STRICT_ALIGNMENT */ 1352 1353 ifp->if_ipackets++; 1354 eh = mtod(m, struct ether_header *); 1355 m->m_pkthdr.rcvif = ifp; 1356 m->m_pkthdr.len = m->m_len = len; 1357 1358 #if NBPFILTER > 0 1359 /* 1360 * Pass this up to any BPF listeners, but only 1361 * pass it up the stack if its for us. 1362 */ 1363 if (ifp->if_bpf) 1364 bpf_mtap(ifp->if_bpf, m); 1365 #endif /* NPBFILTER > 0 */ 1366 1367 /* 1368 * We sometimes have to run the 21140 in Hash-Only 1369 * mode. If we're in that mode, and not in promiscuous 1370 * mode, and we have a unicast packet that isn't for 1371 * us, then drop it. 1372 */ 1373 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY && 1374 (ifp->if_flags & IFF_PROMISC) == 0 && 1375 ETHER_IS_MULTICAST(eh->ether_dhost) == 0 && 1376 memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1377 ETHER_ADDR_LEN) != 0) { 1378 m_freem(m); 1379 continue; 1380 } 1381 1382 /* Pass it on. */ 1383 (*ifp->if_input)(ifp, m); 1384 } 1385 1386 /* Update the recieve pointer. */ 1387 sc->sc_rxptr = i; 1388 } 1389 1390 /* 1391 * tlp_txintr: 1392 * 1393 * Helper; handle transmit interrupts. 1394 */ 1395 void 1396 tlp_txintr(sc) 1397 struct tulip_softc *sc; 1398 { 1399 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1400 struct tulip_txsoft *txs; 1401 u_int32_t txstat; 1402 1403 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1404 sc->sc_dev.dv_xname, sc->sc_flags)); 1405 1406 ifp->if_flags &= ~IFF_OACTIVE; 1407 1408 /* 1409 * Go through our Tx list and free mbufs for those 1410 * frames that have been transmitted. 1411 */ 1412 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1413 TULIP_CDTXSYNC(sc, txs->txs_lastdesc, 1414 txs->txs_ndescs, 1415 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1416 1417 #ifdef TLP_DEBUG 1418 if (ifp->if_flags & IFF_DEBUG) { 1419 int i; 1420 printf(" txsoft %p transmit chain:\n", txs); 1421 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1422 printf(" descriptor %d:\n", i); 1423 printf(" td_status: 0x%08x\n", 1424 le32toh(sc->sc_txdescs[i].td_status)); 1425 printf(" td_ctl: 0x%08x\n", 1426 le32toh(sc->sc_txdescs[i].td_ctl)); 1427 printf(" td_bufaddr1: 0x%08x\n", 1428 le32toh(sc->sc_txdescs[i].td_bufaddr1)); 1429 printf(" td_bufaddr2: 0x%08x\n", 1430 le32toh(sc->sc_txdescs[i].td_bufaddr2)); 1431 if (i == txs->txs_lastdesc) 1432 break; 1433 } 1434 } 1435 #endif 1436 1437 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status); 1438 if (txstat & TDSTAT_OWN) 1439 break; 1440 1441 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1442 1443 sc->sc_txfree += txs->txs_ndescs; 1444 1445 if (txs->txs_mbuf == NULL) { 1446 /* 1447 * If we didn't have an mbuf, it was the setup 1448 * packet. 1449 */ 1450 #ifdef DIAGNOSTIC 1451 if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1452 panic("tlp_txintr: null mbuf, not doing setup"); 1453 #endif 1454 TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE); 1455 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1456 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1457 continue; 1458 } 1459 1460 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1461 0, txs->txs_dmamap->dm_mapsize, 1462 BUS_DMASYNC_POSTWRITE); 1463 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1464 m_freem(txs->txs_mbuf); 1465 txs->txs_mbuf = NULL; 1466 1467 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1468 1469 /* 1470 * Check for errors and collisions. 1471 */ 1472 #ifdef TLP_STATS 1473 if (txstat & TDSTAT_Tx_UF) 1474 sc->sc_stats.ts_tx_uf++; 1475 if (txstat & TDSTAT_Tx_TO) 1476 sc->sc_stats.ts_tx_to++; 1477 if (txstat & TDSTAT_Tx_EC) 1478 sc->sc_stats.ts_tx_ec++; 1479 if (txstat & TDSTAT_Tx_LC) 1480 sc->sc_stats.ts_tx_lc++; 1481 #endif 1482 1483 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO)) 1484 ifp->if_oerrors++; 1485 1486 if (txstat & TDSTAT_Tx_EC) 1487 ifp->if_collisions += 16; 1488 else 1489 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1490 if (txstat & TDSTAT_Tx_LC) 1491 ifp->if_collisions++; 1492 1493 ifp->if_opackets++; 1494 } 1495 1496 /* 1497 * If there are no more pending transmissions, cancel the watchdog 1498 * timer. 1499 */ 1500 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1501 ifp->if_timer = 0; 1502 1503 /* 1504 * If we have a receive filter setup pending, do it now. 1505 */ 1506 if (sc->sc_flags & TULIPF_WANT_SETUP) 1507 (*sc->sc_filter_setup)(sc); 1508 } 1509 1510 #ifdef TLP_STATS 1511 void 1512 tlp_print_stats(sc) 1513 struct tulip_softc *sc; 1514 { 1515 1516 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n", 1517 sc->sc_dev.dv_xname, 1518 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to, 1519 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc); 1520 } 1521 #endif 1522 1523 /* 1524 * tlp_reset: 1525 * 1526 * Perform a soft reset on the Tulip. 1527 */ 1528 void 1529 tlp_reset(sc) 1530 struct tulip_softc *sc; 1531 { 1532 int i; 1533 1534 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1535 1536 /* 1537 * Xircom clone doesn't bring itself out of reset automatically. 1538 * Instead, we have to wait at least 50 PCI cycles, and then 1539 * clear SWR. 1540 */ 1541 if (sc->sc_chip == TULIP_CHIP_X3201_3) { 1542 delay(10); 1543 TULIP_WRITE(sc, CSR_BUSMODE, 0); 1544 } 1545 1546 for (i = 0; i < 1000; i++) { 1547 /* 1548 * Wait at least 50 PCI cycles for the reset to 1549 * complete before peeking at the Tulip again. 1550 * 10 uSec is a bit longer than 50 PCI cycles 1551 * (at 33MHz), but it doesn't hurt have the extra 1552 * wait. 1553 */ 1554 delay(10); 1555 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1556 break; 1557 } 1558 1559 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1560 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1561 1562 delay(1000); 1563 1564 /* 1565 * If the board has any GPIO reset sequences to issue, do them now. 1566 */ 1567 if (sc->sc_reset != NULL) 1568 (*sc->sc_reset)(sc); 1569 } 1570 1571 /* 1572 * tlp_init: [ ifnet interface function ] 1573 * 1574 * Initialize the interface. Must be called at splnet(). 1575 */ 1576 int 1577 tlp_init(ifp) 1578 struct ifnet *ifp; 1579 { 1580 struct tulip_softc *sc = ifp->if_softc; 1581 struct tulip_txsoft *txs; 1582 struct tulip_rxsoft *rxs; 1583 int i, error = 0; 1584 1585 if ((error = tlp_enable(sc)) != 0) 1586 goto out; 1587 1588 /* 1589 * Cancel any pending I/O. 1590 */ 1591 tlp_stop(ifp, 0); 1592 1593 /* 1594 * Initialize `opmode' to 0, and call the pre-init routine, if 1595 * any. This is required because the 2114x and some of the 1596 * clones require that the media-related bits in `opmode' be 1597 * set before performing a soft-reset in order to get internal 1598 * chip pathways are correct. Yay! 1599 */ 1600 sc->sc_opmode = 0; 1601 if (sc->sc_preinit != NULL) 1602 (*sc->sc_preinit)(sc); 1603 1604 /* 1605 * Reset the Tulip to a known state. 1606 */ 1607 tlp_reset(sc); 1608 1609 /* 1610 * Initialize the BUSMODE register. 1611 */ 1612 sc->sc_busmode = BUSMODE_BAR; 1613 switch (sc->sc_chip) { 1614 case TULIP_CHIP_21140: 1615 case TULIP_CHIP_21140A: 1616 case TULIP_CHIP_21142: 1617 case TULIP_CHIP_21143: 1618 case TULIP_CHIP_82C115: 1619 case TULIP_CHIP_MX98725: 1620 /* 1621 * If we're allowed to do so, use Memory Read Line 1622 * and Memory Read Multiple. 1623 * 1624 * XXX Should we use Memory Write and Invalidate? 1625 */ 1626 if (sc->sc_flags & TULIPF_MRL) 1627 sc->sc_busmode |= BUSMODE_RLE; 1628 if (sc->sc_flags & TULIPF_MRM) 1629 sc->sc_busmode |= BUSMODE_RME; 1630 #if 0 1631 if (sc->sc_flags & TULIPF_MWI) 1632 sc->sc_busmode |= BUSMODE_WLE; 1633 #endif 1634 break; 1635 1636 case TULIP_CHIP_82C168: 1637 case TULIP_CHIP_82C169: 1638 sc->sc_busmode |= BUSMODE_PNIC_MBO; 1639 if (sc->sc_maxburst == 0) 1640 sc->sc_maxburst = 16; 1641 break; 1642 1643 default: 1644 /* Nothing. */ 1645 } 1646 switch (sc->sc_cacheline) { 1647 default: 1648 /* 1649 * Note: We must *always* set these bits; a cache 1650 * alignment of 0 is RESERVED. 1651 */ 1652 case 8: 1653 sc->sc_busmode |= BUSMODE_CAL_8LW; 1654 break; 1655 case 16: 1656 sc->sc_busmode |= BUSMODE_CAL_16LW; 1657 break; 1658 case 32: 1659 sc->sc_busmode |= BUSMODE_CAL_32LW; 1660 break; 1661 } 1662 switch (sc->sc_maxburst) { 1663 case 1: 1664 sc->sc_busmode |= BUSMODE_PBL_1LW; 1665 break; 1666 case 2: 1667 sc->sc_busmode |= BUSMODE_PBL_2LW; 1668 break; 1669 case 4: 1670 sc->sc_busmode |= BUSMODE_PBL_4LW; 1671 break; 1672 case 8: 1673 sc->sc_busmode |= BUSMODE_PBL_8LW; 1674 break; 1675 case 16: 1676 sc->sc_busmode |= BUSMODE_PBL_16LW; 1677 break; 1678 case 32: 1679 sc->sc_busmode |= BUSMODE_PBL_32LW; 1680 break; 1681 default: 1682 sc->sc_busmode |= BUSMODE_PBL_DEFAULT; 1683 break; 1684 } 1685 #if BYTE_ORDER == BIG_ENDIAN 1686 /* 1687 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips 1688 * support them, and even on ones that do, it doesn't 1689 * always work. So we always access descriptors with 1690 * little endian via htole32/le32toh. 1691 */ 1692 #endif 1693 /* 1694 * Big-endian bus requires BUSMODE_BLE anyway. 1695 * Also, BUSMODE_DBO is needed because we assume 1696 * descriptors are little endian. 1697 */ 1698 if (sc->sc_flags & TULIPF_BLE) 1699 sc->sc_busmode |= BUSMODE_BLE; 1700 if (sc->sc_flags & TULIPF_DBO) 1701 sc->sc_busmode |= BUSMODE_DBO; 1702 1703 /* 1704 * Some chips have a broken bus interface. 1705 */ 1706 switch (sc->sc_chip) { 1707 case TULIP_CHIP_DM9102: 1708 case TULIP_CHIP_DM9102A: 1709 sc->sc_busmode = 0; 1710 break; 1711 1712 default: 1713 /* Nothing. */ 1714 } 1715 1716 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1717 1718 /* 1719 * Initialize the OPMODE register. We don't write it until 1720 * we're ready to begin the transmit and receive processes. 1721 * 1722 * Media-related OPMODE bits are set in the media callbacks 1723 * for each specific chip/board. 1724 */ 1725 sc->sc_opmode |= OPMODE_SR | OPMODE_ST | 1726 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1727 1728 /* 1729 * Magical mystery initialization on the Macronix chips. 1730 * The MX98713 uses its own magic value, the rest share 1731 * a common one. 1732 */ 1733 switch (sc->sc_chip) { 1734 case TULIP_CHIP_MX98713: 1735 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1736 break; 1737 1738 case TULIP_CHIP_MX98713A: 1739 case TULIP_CHIP_MX98715: 1740 case TULIP_CHIP_MX98715A: 1741 case TULIP_CHIP_MX98715AEC_X: 1742 case TULIP_CHIP_MX98725: 1743 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1744 break; 1745 1746 default: 1747 /* Nothing. */ 1748 } 1749 1750 /* 1751 * Initialize the transmit descriptor ring. 1752 */ 1753 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1754 for (i = 0; i < TULIP_NTXDESC; i++) { 1755 sc->sc_txdescs[i].td_ctl = htole32(sc->sc_tdctl_ch); 1756 sc->sc_txdescs[i].td_bufaddr2 = 1757 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i))); 1758 } 1759 sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er); 1760 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1761 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1762 sc->sc_txfree = TULIP_NTXDESC; 1763 sc->sc_txnext = 0; 1764 1765 /* 1766 * Initialize the transmit job descriptors. 1767 */ 1768 SIMPLEQ_INIT(&sc->sc_txfreeq); 1769 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1770 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1771 txs = &sc->sc_txsoft[i]; 1772 txs->txs_mbuf = NULL; 1773 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1774 } 1775 1776 /* 1777 * Initialize the receive descriptor and receive job 1778 * descriptor rings. 1779 */ 1780 for (i = 0; i < TULIP_NRXDESC; i++) { 1781 rxs = &sc->sc_rxsoft[i]; 1782 if (rxs->rxs_mbuf == NULL) { 1783 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1784 printf("%s: unable to allocate or map rx " 1785 "buffer %d, error = %d\n", 1786 sc->sc_dev.dv_xname, i, error); 1787 /* 1788 * XXX Should attempt to run with fewer receive 1789 * XXX buffers instead of just failing. 1790 */ 1791 tlp_rxdrain(sc); 1792 goto out; 1793 } 1794 } 1795 } 1796 sc->sc_rxptr = 0; 1797 1798 /* 1799 * Initialize the interrupt mask and enable interrupts. 1800 */ 1801 /* normal interrupts */ 1802 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1803 1804 /* abnormal interrupts */ 1805 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1806 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1807 1808 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1809 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1810 1811 switch (sc->sc_chip) { 1812 case TULIP_CHIP_WB89C840F: 1813 /* 1814 * Clear bits that we don't want that happen to 1815 * overlap or don't exist. 1816 */ 1817 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1818 break; 1819 1820 default: 1821 /* Nothing. */ 1822 } 1823 1824 sc->sc_rxint_mask &= sc->sc_inten; 1825 sc->sc_txint_mask &= sc->sc_inten; 1826 1827 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1828 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1829 1830 /* 1831 * Give the transmit and receive rings to the Tulip. 1832 */ 1833 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1834 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1835 1836 /* 1837 * On chips that do this differently, set the station address. 1838 */ 1839 switch (sc->sc_chip) { 1840 case TULIP_CHIP_WB89C840F: 1841 { 1842 /* XXX Do this with stream writes? */ 1843 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1844 1845 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1846 bus_space_write_1(sc->sc_st, sc->sc_sh, 1847 cpa + i, LLADDR(ifp->if_sadl)[i]); 1848 } 1849 break; 1850 } 1851 1852 case TULIP_CHIP_AL981: 1853 case TULIP_CHIP_AN983: 1854 case TULIP_CHIP_AN985: 1855 { 1856 u_int32_t reg; 1857 u_int8_t *enaddr = LLADDR(ifp->if_sadl); 1858 1859 reg = enaddr[0] | 1860 (enaddr[1] << 8) | 1861 (enaddr[2] << 16) | 1862 (enaddr[3] << 24); 1863 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg); 1864 1865 reg = enaddr[4] | 1866 (enaddr[5] << 8); 1867 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg); 1868 } 1869 1870 default: 1871 /* Nothing. */ 1872 } 1873 1874 /* 1875 * Set the receive filter. This will start the transmit and 1876 * receive processes. 1877 */ 1878 (*sc->sc_filter_setup)(sc); 1879 1880 /* 1881 * Set the current media. 1882 */ 1883 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1884 1885 /* 1886 * Start the receive process. 1887 */ 1888 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1889 1890 if (sc->sc_tick != NULL) { 1891 /* Start the one second clock. */ 1892 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 1893 } 1894 1895 /* 1896 * Note that the interface is now running. 1897 */ 1898 ifp->if_flags |= IFF_RUNNING; 1899 ifp->if_flags &= ~IFF_OACTIVE; 1900 1901 out: 1902 if (error) { 1903 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1904 ifp->if_timer = 0; 1905 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1906 } 1907 return (error); 1908 } 1909 1910 /* 1911 * tlp_enable: 1912 * 1913 * Enable the Tulip chip. 1914 */ 1915 int 1916 tlp_enable(sc) 1917 struct tulip_softc *sc; 1918 { 1919 1920 if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) { 1921 if ((*sc->sc_enable)(sc) != 0) { 1922 printf("%s: device enable failed\n", 1923 sc->sc_dev.dv_xname); 1924 return (EIO); 1925 } 1926 sc->sc_flags |= TULIPF_ENABLED; 1927 } 1928 return (0); 1929 } 1930 1931 /* 1932 * tlp_disable: 1933 * 1934 * Disable the Tulip chip. 1935 */ 1936 void 1937 tlp_disable(sc) 1938 struct tulip_softc *sc; 1939 { 1940 1941 if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) { 1942 (*sc->sc_disable)(sc); 1943 sc->sc_flags &= ~TULIPF_ENABLED; 1944 } 1945 } 1946 1947 /* 1948 * tlp_power: 1949 * 1950 * Power management (suspend/resume) hook. 1951 */ 1952 void 1953 tlp_power(why, arg) 1954 int why; 1955 void *arg; 1956 { 1957 struct tulip_softc *sc = arg; 1958 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1959 int s; 1960 1961 s = splnet(); 1962 if (why != PWR_RESUME) { 1963 tlp_stop(ifp, 0); 1964 if (sc->sc_power != NULL) 1965 (*sc->sc_power)(sc, why); 1966 } else if (ifp->if_flags & IFF_UP) { 1967 if (sc->sc_power != NULL) 1968 (*sc->sc_power)(sc, why); 1969 tlp_init(ifp); 1970 } 1971 splx(s); 1972 } 1973 1974 /* 1975 * tlp_rxdrain: 1976 * 1977 * Drain the receive queue. 1978 */ 1979 void 1980 tlp_rxdrain(sc) 1981 struct tulip_softc *sc; 1982 { 1983 struct tulip_rxsoft *rxs; 1984 int i; 1985 1986 for (i = 0; i < TULIP_NRXDESC; i++) { 1987 rxs = &sc->sc_rxsoft[i]; 1988 if (rxs->rxs_mbuf != NULL) { 1989 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1990 m_freem(rxs->rxs_mbuf); 1991 rxs->rxs_mbuf = NULL; 1992 } 1993 } 1994 } 1995 1996 /* 1997 * tlp_stop: [ ifnet interface function ] 1998 * 1999 * Stop transmission on the interface. 2000 */ 2001 void 2002 tlp_stop(ifp, disable) 2003 struct ifnet *ifp; 2004 int disable; 2005 { 2006 struct tulip_softc *sc = ifp->if_softc; 2007 struct tulip_txsoft *txs; 2008 2009 if (sc->sc_tick != NULL) { 2010 /* Stop the one second clock. */ 2011 callout_stop(&sc->sc_tick_callout); 2012 } 2013 2014 if (sc->sc_flags & TULIPF_HAS_MII) { 2015 /* Down the MII. */ 2016 mii_down(&sc->sc_mii); 2017 } 2018 2019 /* Disable interrupts. */ 2020 TULIP_WRITE(sc, CSR_INTEN, 0); 2021 2022 /* Stop the transmit and receive processes. */ 2023 sc->sc_opmode = 0; 2024 TULIP_WRITE(sc, CSR_OPMODE, 0); 2025 TULIP_WRITE(sc, CSR_RXLIST, 0); 2026 TULIP_WRITE(sc, CSR_TXLIST, 0); 2027 2028 /* 2029 * Release any queued transmit buffers. 2030 */ 2031 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 2032 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 2033 if (txs->txs_mbuf != NULL) { 2034 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 2035 m_freem(txs->txs_mbuf); 2036 txs->txs_mbuf = NULL; 2037 } 2038 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 2039 } 2040 2041 if (disable) { 2042 tlp_rxdrain(sc); 2043 tlp_disable(sc); 2044 } 2045 2046 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 2047 2048 /* 2049 * Mark the interface down and cancel the watchdog timer. 2050 */ 2051 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2052 ifp->if_timer = 0; 2053 } 2054 2055 #define SROM_EMIT(sc, x) \ 2056 do { \ 2057 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2058 delay(2); \ 2059 } while (0) 2060 2061 /* 2062 * tlp_srom_idle: 2063 * 2064 * Put the SROM in idle state. 2065 */ 2066 void 2067 tlp_srom_idle(sc) 2068 struct tulip_softc *sc; 2069 { 2070 u_int32_t miirom; 2071 int i; 2072 2073 miirom = MIIROM_SR; 2074 SROM_EMIT(sc, miirom); 2075 2076 miirom |= MIIROM_RD; 2077 SROM_EMIT(sc, miirom); 2078 2079 miirom |= MIIROM_SROMCS; 2080 SROM_EMIT(sc, miirom); 2081 2082 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2083 2084 /* Strobe the clock 32 times. */ 2085 for (i = 0; i < 32; i++) { 2086 SROM_EMIT(sc, miirom); 2087 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2088 } 2089 2090 SROM_EMIT(sc, miirom); 2091 2092 miirom &= ~MIIROM_SROMCS; 2093 SROM_EMIT(sc, miirom); 2094 2095 SROM_EMIT(sc, 0); 2096 } 2097 2098 /* 2099 * tlp_srom_size: 2100 * 2101 * Determine the number of address bits in the SROM. 2102 */ 2103 int 2104 tlp_srom_size(sc) 2105 struct tulip_softc *sc; 2106 { 2107 u_int32_t miirom; 2108 int x; 2109 2110 /* Select the SROM. */ 2111 miirom = MIIROM_SR; 2112 SROM_EMIT(sc, miirom); 2113 2114 miirom |= MIIROM_RD; 2115 SROM_EMIT(sc, miirom); 2116 2117 /* Send CHIP SELECT for one clock tick. */ 2118 miirom |= MIIROM_SROMCS; 2119 SROM_EMIT(sc, miirom); 2120 2121 /* Shift in the READ opcode. */ 2122 for (x = 3; x > 0; x--) { 2123 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2124 miirom |= MIIROM_SROMDI; 2125 else 2126 miirom &= ~MIIROM_SROMDI; 2127 SROM_EMIT(sc, miirom); 2128 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2129 SROM_EMIT(sc, miirom); 2130 } 2131 2132 /* Shift in address and look for dummy 0 bit. */ 2133 for (x = 1; x <= 12; x++) { 2134 miirom &= ~MIIROM_SROMDI; 2135 SROM_EMIT(sc, miirom); 2136 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2137 if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2138 break; 2139 SROM_EMIT(sc, miirom); 2140 } 2141 2142 /* Clear CHIP SELECT. */ 2143 miirom &= ~MIIROM_SROMCS; 2144 SROM_EMIT(sc, miirom); 2145 2146 /* Deselect the SROM. */ 2147 SROM_EMIT(sc, 0); 2148 2149 if (x < 4 || x > 12) { 2150 printf("%s: broken MicroWire interface detected; " 2151 "setting SROM size to 1Kb\n", sc->sc_dev.dv_xname); 2152 return (6); 2153 } else { 2154 if (tlp_srom_debug) 2155 printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n", 2156 sc->sc_dev.dv_xname, x, (1 << (x + 4)) >> 3); 2157 return (x); 2158 } 2159 } 2160 2161 /* 2162 * tlp_read_srom: 2163 * 2164 * Read the Tulip SROM. 2165 */ 2166 int 2167 tlp_read_srom(sc) 2168 struct tulip_softc *sc; 2169 { 2170 int size; 2171 u_int32_t miirom; 2172 u_int16_t datain; 2173 int i, x; 2174 2175 tlp_srom_idle(sc); 2176 2177 sc->sc_srom_addrbits = tlp_srom_size(sc); 2178 if (sc->sc_srom_addrbits == 0) 2179 return (0); 2180 size = TULIP_ROM_SIZE(sc->sc_srom_addrbits); 2181 sc->sc_srom = malloc(size, M_DEVBUF, M_NOWAIT); 2182 2183 /* Select the SROM. */ 2184 miirom = MIIROM_SR; 2185 SROM_EMIT(sc, miirom); 2186 2187 miirom |= MIIROM_RD; 2188 SROM_EMIT(sc, miirom); 2189 2190 for (i = 0; i < size; i += 2) { 2191 /* Send CHIP SELECT for one clock tick. */ 2192 miirom |= MIIROM_SROMCS; 2193 SROM_EMIT(sc, miirom); 2194 2195 /* Shift in the READ opcode. */ 2196 for (x = 3; x > 0; x--) { 2197 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2198 miirom |= MIIROM_SROMDI; 2199 else 2200 miirom &= ~MIIROM_SROMDI; 2201 SROM_EMIT(sc, miirom); 2202 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2203 SROM_EMIT(sc, miirom); 2204 } 2205 2206 /* Shift in address. */ 2207 for (x = sc->sc_srom_addrbits; x > 0; x--) { 2208 if (i & (1 << x)) 2209 miirom |= MIIROM_SROMDI; 2210 else 2211 miirom &= ~MIIROM_SROMDI; 2212 SROM_EMIT(sc, miirom); 2213 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2214 SROM_EMIT(sc, miirom); 2215 } 2216 2217 /* Shift out data. */ 2218 miirom &= ~MIIROM_SROMDI; 2219 datain = 0; 2220 for (x = 16; x > 0; x--) { 2221 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2222 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2223 datain |= (1 << (x - 1)); 2224 SROM_EMIT(sc, miirom); 2225 } 2226 sc->sc_srom[i] = datain & 0xff; 2227 sc->sc_srom[i + 1] = datain >> 8; 2228 2229 /* Clear CHIP SELECT. */ 2230 miirom &= ~MIIROM_SROMCS; 2231 SROM_EMIT(sc, miirom); 2232 } 2233 2234 /* Deselect the SROM. */ 2235 SROM_EMIT(sc, 0); 2236 2237 /* ...and idle it. */ 2238 tlp_srom_idle(sc); 2239 2240 if (tlp_srom_debug) { 2241 printf("SROM CONTENTS:"); 2242 for (i = 0; i < size; i++) { 2243 if ((i % 8) == 0) 2244 printf("\n\t"); 2245 printf("0x%02x ", sc->sc_srom[i]); 2246 } 2247 printf("\n"); 2248 } 2249 2250 return (1); 2251 } 2252 2253 #undef SROM_EMIT 2254 2255 /* 2256 * tlp_add_rxbuf: 2257 * 2258 * Add a receive buffer to the indicated descriptor. 2259 */ 2260 int 2261 tlp_add_rxbuf(sc, idx) 2262 struct tulip_softc *sc; 2263 int idx; 2264 { 2265 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 2266 struct mbuf *m; 2267 int error; 2268 2269 MGETHDR(m, M_DONTWAIT, MT_DATA); 2270 if (m == NULL) 2271 return (ENOBUFS); 2272 2273 MCLGET(m, M_DONTWAIT); 2274 if ((m->m_flags & M_EXT) == 0) { 2275 m_freem(m); 2276 return (ENOBUFS); 2277 } 2278 2279 if (rxs->rxs_mbuf != NULL) 2280 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 2281 2282 rxs->rxs_mbuf = m; 2283 2284 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 2285 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 2286 if (error) { 2287 printf("%s: can't load rx DMA map %d, error = %d\n", 2288 sc->sc_dev.dv_xname, idx, error); 2289 panic("tlp_add_rxbuf"); /* XXX */ 2290 } 2291 2292 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 2293 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 2294 2295 TULIP_INIT_RXDESC(sc, idx); 2296 2297 return (0); 2298 } 2299 2300 /* 2301 * tlp_srom_crcok: 2302 * 2303 * Check the CRC of the Tulip SROM. 2304 */ 2305 int 2306 tlp_srom_crcok(romdata) 2307 const u_int8_t *romdata; 2308 { 2309 u_int32_t crc; 2310 2311 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM); 2312 crc = (crc & 0xffff) ^ 0xffff; 2313 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 2314 return (1); 2315 2316 /* 2317 * Try an alternate checksum. 2318 */ 2319 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1); 2320 crc = (crc & 0xffff) ^ 0xffff; 2321 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1)) 2322 return (1); 2323 2324 return (0); 2325 } 2326 2327 /* 2328 * tlp_isv_srom: 2329 * 2330 * Check to see if the SROM is in the new standardized format. 2331 */ 2332 int 2333 tlp_isv_srom(romdata) 2334 const u_int8_t *romdata; 2335 { 2336 int i; 2337 u_int16_t cksum; 2338 2339 if (tlp_srom_crcok(romdata)) { 2340 /* 2341 * SROM CRC checks out; must be in the new format. 2342 */ 2343 return (1); 2344 } 2345 2346 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); 2347 if (cksum == 0xffff || cksum == 0) { 2348 /* 2349 * No checksum present. Check the SROM ID; 18 bytes of 0 2350 * followed by 1 (version) followed by the number of 2351 * adapters which use this SROM (should be non-zero). 2352 */ 2353 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { 2354 if (romdata[i] != 0) 2355 return (0); 2356 } 2357 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) 2358 return (0); 2359 if (romdata[TULIP_ROM_CHIP_COUNT] == 0) 2360 return (0); 2361 return (1); 2362 } 2363 2364 return (0); 2365 } 2366 2367 /* 2368 * tlp_isv_srom_enaddr: 2369 * 2370 * Get the Ethernet address from an ISV SROM. 2371 */ 2372 int 2373 tlp_isv_srom_enaddr(sc, enaddr) 2374 struct tulip_softc *sc; 2375 u_int8_t *enaddr; 2376 { 2377 int i, devcnt; 2378 2379 if (tlp_isv_srom(sc->sc_srom) == 0) 2380 return (0); 2381 2382 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 2383 for (i = 0; i < devcnt; i++) { 2384 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 2385 break; 2386 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 2387 sc->sc_devno) 2388 break; 2389 } 2390 2391 if (i == devcnt) 2392 return (0); 2393 2394 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], 2395 ETHER_ADDR_LEN); 2396 enaddr[5] += i; 2397 2398 return (1); 2399 } 2400 2401 /* 2402 * tlp_parse_old_srom: 2403 * 2404 * Parse old-format SROMs. 2405 * 2406 * This routine is largely lifted from Matt Thomas's `de' driver. 2407 */ 2408 int 2409 tlp_parse_old_srom(sc, enaddr) 2410 struct tulip_softc *sc; 2411 u_int8_t *enaddr; 2412 { 2413 static const u_int8_t testpat[] = 2414 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 2415 int i; 2416 u_int32_t cksum; 2417 2418 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 2419 /* 2420 * Some vendors (e.g. ZNYX) don't use the standard 2421 * DEC Address ROM format, but rather just have an 2422 * Ethernet address in the first 6 bytes, maybe a 2423 * 2 byte checksum, and then all 0xff's. 2424 * 2425 * On the other hand, Cobalt Networks interfaces 2426 * simply have the address in the first six bytes 2427 * with the rest zeroed out. 2428 */ 2429 for (i = 8; i < 32; i++) { 2430 if (sc->sc_srom[i] != 0xff && 2431 sc->sc_srom[i] != 0) 2432 return (0); 2433 } 2434 2435 /* 2436 * Sanity check the Ethernet address: 2437 * 2438 * - Make sure it's not multicast or locally 2439 * assigned 2440 * - Make sure it has a non-0 OUI 2441 */ 2442 if (sc->sc_srom[0] & 3) 2443 return (0); 2444 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 2445 sc->sc_srom[2] == 0) 2446 return (0); 2447 2448 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2449 return (1); 2450 } 2451 2452 /* 2453 * Standard DEC Address ROM test. 2454 */ 2455 2456 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 2457 return (0); 2458 2459 for (i = 0; i < 8; i++) { 2460 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 2461 return (0); 2462 } 2463 2464 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2465 2466 cksum = *(u_int16_t *) &enaddr[0]; 2467 2468 cksum <<= 1; 2469 if (cksum > 0xffff) 2470 cksum -= 0xffff; 2471 2472 cksum += *(u_int16_t *) &enaddr[2]; 2473 if (cksum > 0xffff) 2474 cksum -= 0xffff; 2475 2476 cksum <<= 1; 2477 if (cksum > 0xffff) 2478 cksum -= 0xffff; 2479 2480 cksum += *(u_int16_t *) &enaddr[4]; 2481 if (cksum >= 0xffff) 2482 cksum -= 0xffff; 2483 2484 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 2485 return (0); 2486 2487 return (1); 2488 } 2489 2490 /* 2491 * tlp_filter_setup: 2492 * 2493 * Set the Tulip's receive filter. 2494 */ 2495 void 2496 tlp_filter_setup(sc) 2497 struct tulip_softc *sc; 2498 { 2499 struct ethercom *ec = &sc->sc_ethercom; 2500 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2501 struct ether_multi *enm; 2502 struct ether_multistep step; 2503 __volatile u_int32_t *sp; 2504 struct tulip_txsoft *txs; 2505 u_int8_t enaddr[ETHER_ADDR_LEN]; 2506 u_int32_t hash, hashsize; 2507 int cnt; 2508 2509 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 2510 sc->sc_dev.dv_xname, sc->sc_flags)); 2511 2512 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 2513 2514 /* 2515 * If there are transmissions pending, wait until they have 2516 * completed. 2517 */ 2518 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 2519 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 2520 sc->sc_flags |= TULIPF_WANT_SETUP; 2521 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 2522 sc->sc_dev.dv_xname)); 2523 return; 2524 } 2525 sc->sc_flags &= ~TULIPF_WANT_SETUP; 2526 2527 switch (sc->sc_chip) { 2528 case TULIP_CHIP_82C115: 2529 hashsize = TULIP_PNICII_HASHSIZE; 2530 break; 2531 2532 default: 2533 hashsize = TULIP_MCHASHSIZE; 2534 } 2535 2536 /* 2537 * If we're running, idle the transmit and receive engines. If 2538 * we're NOT running, we're being called from tlp_init(), and our 2539 * writing OPMODE will start the transmit and receive processes 2540 * in motion. 2541 */ 2542 if (ifp->if_flags & IFF_RUNNING) 2543 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2544 2545 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2546 2547 if (ifp->if_flags & IFF_PROMISC) { 2548 sc->sc_opmode |= OPMODE_PR; 2549 goto allmulti; 2550 } 2551 2552 /* 2553 * Try Perfect filtering first. 2554 */ 2555 2556 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2557 sp = TULIP_CDSP(sc); 2558 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2559 cnt = 0; 2560 ETHER_FIRST_MULTI(step, ec, enm); 2561 while (enm != NULL) { 2562 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2563 /* 2564 * We must listen to a range of multicast addresses. 2565 * For now, just accept all multicasts, rather than 2566 * trying to set only those filter bits needed to match 2567 * the range. (At this time, the only use of address 2568 * ranges is for IP multicast routing, for which the 2569 * range is big enough to require all bits set.) 2570 */ 2571 goto allmulti; 2572 } 2573 if (cnt == (TULIP_MAXADDRS - 2)) { 2574 /* 2575 * We already have our multicast limit (still need 2576 * our station address and broadcast). Go to 2577 * Hash-Perfect mode. 2578 */ 2579 goto hashperfect; 2580 } 2581 cnt++; 2582 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0); 2583 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1); 2584 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2); 2585 ETHER_NEXT_MULTI(step, enm); 2586 } 2587 2588 if (ifp->if_flags & IFF_BROADCAST) { 2589 /* ...and the broadcast address. */ 2590 cnt++; 2591 *sp++ = TULIP_SP_FIELD_C(0xffff); 2592 *sp++ = TULIP_SP_FIELD_C(0xffff); 2593 *sp++ = TULIP_SP_FIELD_C(0xffff); 2594 } 2595 2596 /* Pad the rest with our station address. */ 2597 for (; cnt < TULIP_MAXADDRS; cnt++) { 2598 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2599 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2600 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2601 } 2602 ifp->if_flags &= ~IFF_ALLMULTI; 2603 goto setit; 2604 2605 hashperfect: 2606 /* 2607 * Try Hash-Perfect mode. 2608 */ 2609 2610 /* 2611 * Some 21140 chips have broken Hash-Perfect modes. On these 2612 * chips, we simply use Hash-Only mode, and put our station 2613 * address into the filter. 2614 */ 2615 if (sc->sc_chip == TULIP_CHIP_21140) 2616 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2617 else 2618 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2619 sp = TULIP_CDSP(sc); 2620 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2621 ETHER_FIRST_MULTI(step, ec, enm); 2622 while (enm != NULL) { 2623 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2624 /* 2625 * We must listen to a range of multicast addresses. 2626 * For now, just accept all multicasts, rather than 2627 * trying to set only those filter bits needed to match 2628 * the range. (At this time, the only use of address 2629 * ranges is for IP multicast routing, for which the 2630 * range is big enough to require all bits set.) 2631 */ 2632 goto allmulti; 2633 } 2634 hash = tlp_mchash(enm->enm_addrlo, hashsize); 2635 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2636 ETHER_NEXT_MULTI(step, enm); 2637 } 2638 2639 if (ifp->if_flags & IFF_BROADCAST) { 2640 /* ...and the broadcast address. */ 2641 hash = tlp_mchash(etherbroadcastaddr, hashsize); 2642 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2643 } 2644 2645 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2646 /* ...and our station address. */ 2647 hash = tlp_mchash(enaddr, hashsize); 2648 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2649 } else { 2650 /* 2651 * Hash-Perfect mode; put our station address after 2652 * the hash table. 2653 */ 2654 sp[39] = TULIP_SP_FIELD(enaddr, 0); 2655 sp[40] = TULIP_SP_FIELD(enaddr, 1); 2656 sp[41] = TULIP_SP_FIELD(enaddr, 2); 2657 } 2658 ifp->if_flags &= ~IFF_ALLMULTI; 2659 goto setit; 2660 2661 allmulti: 2662 /* 2663 * Use Perfect filter mode. First address is the broadcast address, 2664 * and pad the rest with our station address. We'll set Pass-all- 2665 * multicast in OPMODE below. 2666 */ 2667 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2668 sp = TULIP_CDSP(sc); 2669 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2670 cnt = 0; 2671 if (ifp->if_flags & IFF_BROADCAST) { 2672 cnt++; 2673 *sp++ = TULIP_SP_FIELD_C(0xffff); 2674 *sp++ = TULIP_SP_FIELD_C(0xffff); 2675 *sp++ = TULIP_SP_FIELD_C(0xffff); 2676 } 2677 for (; cnt < TULIP_MAXADDRS; cnt++) { 2678 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2679 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2680 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2681 } 2682 ifp->if_flags |= IFF_ALLMULTI; 2683 2684 setit: 2685 if (ifp->if_flags & IFF_ALLMULTI) 2686 sc->sc_opmode |= OPMODE_PM; 2687 2688 /* Sync the setup packet buffer. */ 2689 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2690 2691 /* 2692 * Fill in the setup packet descriptor. 2693 */ 2694 txs = SIMPLEQ_FIRST(&sc->sc_txfreeq); 2695 2696 txs->txs_firstdesc = sc->sc_txnext; 2697 txs->txs_lastdesc = sc->sc_txnext; 2698 txs->txs_ndescs = 1; 2699 txs->txs_mbuf = NULL; 2700 2701 sc->sc_txdescs[sc->sc_txnext].td_bufaddr1 = 2702 htole32(TULIP_CDSPADDR(sc)); 2703 sc->sc_txdescs[sc->sc_txnext].td_ctl = 2704 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2705 sc->sc_filtmode | TDCTL_Tx_SET | sc->sc_setup_fsls | 2706 TDCTL_Tx_IC | sc->sc_tdctl_ch | 2707 (sc->sc_txnext == (TULIP_NTXDESC - 1) ? sc->sc_tdctl_er : 0)); 2708 sc->sc_txdescs[sc->sc_txnext].td_status = htole32(TDSTAT_OWN); 2709 TULIP_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndescs, 2710 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2711 2712 /* Advance the tx pointer. */ 2713 sc->sc_txfree -= 1; 2714 sc->sc_txnext = TULIP_NEXTTX(sc->sc_txnext); 2715 2716 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 2717 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 2718 2719 /* 2720 * Set the OPMODE register. This will also resume the 2721 * transmit transmit process we idled above. 2722 */ 2723 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2724 2725 sc->sc_flags |= TULIPF_DOING_SETUP; 2726 2727 /* 2728 * Kick the transmitter; this will cause the Tulip to 2729 * read the setup descriptor. 2730 */ 2731 /* XXX USE AUTOPOLLING? */ 2732 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2733 2734 /* Set up a watchdog timer in case the chip flakes out. */ 2735 ifp->if_timer = 5; 2736 2737 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2738 } 2739 2740 /* 2741 * tlp_winb_filter_setup: 2742 * 2743 * Set the Winbond 89C840F's receive filter. 2744 */ 2745 void 2746 tlp_winb_filter_setup(sc) 2747 struct tulip_softc *sc; 2748 { 2749 struct ethercom *ec = &sc->sc_ethercom; 2750 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2751 struct ether_multi *enm; 2752 struct ether_multistep step; 2753 u_int32_t hash, mchash[2]; 2754 2755 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2756 sc->sc_dev.dv_xname, sc->sc_flags)); 2757 2758 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2759 2760 if (ifp->if_flags & IFF_MULTICAST) 2761 sc->sc_opmode |= OPMODE_WINB_AMP; 2762 2763 if (ifp->if_flags & IFF_BROADCAST) 2764 sc->sc_opmode |= OPMODE_WINB_ABP; 2765 2766 if (ifp->if_flags & IFF_PROMISC) { 2767 sc->sc_opmode |= OPMODE_WINB_APP; 2768 goto allmulti; 2769 } 2770 2771 mchash[0] = mchash[1] = 0; 2772 2773 ETHER_FIRST_MULTI(step, ec, enm); 2774 while (enm != NULL) { 2775 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2776 /* 2777 * We must listen to a range of multicast addresses. 2778 * For now, just accept all multicasts, rather than 2779 * trying to set only those filter bits needed to match 2780 * the range. (At this time, the only use of address 2781 * ranges is for IP multicast routing, for which the 2782 * range is big enough to require all bits set.) 2783 */ 2784 goto allmulti; 2785 } 2786 2787 /* 2788 * According to the FreeBSD `wb' driver, yes, you 2789 * really do invert the hash. 2790 */ 2791 hash = 2792 (~(ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2793 & 0x3f; 2794 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2795 ETHER_NEXT_MULTI(step, enm); 2796 } 2797 ifp->if_flags &= ~IFF_ALLMULTI; 2798 goto setit; 2799 2800 allmulti: 2801 ifp->if_flags |= IFF_ALLMULTI; 2802 mchash[0] = mchash[1] = 0xffffffff; 2803 2804 setit: 2805 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2806 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2807 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2808 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2809 sc->sc_dev.dv_xname)); 2810 } 2811 2812 /* 2813 * tlp_al981_filter_setup: 2814 * 2815 * Set the ADMtek AL981's receive filter. 2816 */ 2817 void 2818 tlp_al981_filter_setup(sc) 2819 struct tulip_softc *sc; 2820 { 2821 struct ethercom *ec = &sc->sc_ethercom; 2822 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2823 struct ether_multi *enm; 2824 struct ether_multistep step; 2825 u_int32_t hash, mchash[2]; 2826 2827 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n", 2828 sc->sc_dev.dv_xname, sc->sc_flags)); 2829 2830 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2831 2832 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2833 2834 if (ifp->if_flags & IFF_PROMISC) { 2835 sc->sc_opmode |= OPMODE_PR; 2836 goto allmulti; 2837 } 2838 2839 mchash[0] = mchash[1] = 0; 2840 2841 ETHER_FIRST_MULTI(step, ec, enm); 2842 while (enm != NULL) { 2843 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2844 /* 2845 * We must listen to a range of multicast addresses. 2846 * For now, just accept all multicasts, rather than 2847 * trying to set only those filter bits needed to match 2848 * the range. (At this time, the only use of address 2849 * ranges is for IP multicast routing, for which the 2850 * range is big enough to require all bits set.) 2851 */ 2852 goto allmulti; 2853 } 2854 2855 hash = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26; 2856 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2857 ETHER_NEXT_MULTI(step, enm); 2858 } 2859 ifp->if_flags &= ~IFF_ALLMULTI; 2860 goto setit; 2861 2862 allmulti: 2863 ifp->if_flags |= IFF_ALLMULTI; 2864 mchash[0] = mchash[1] = 0xffffffff; 2865 2866 setit: 2867 TULIP_WRITE(sc, CSR_ADM_MAR0, mchash[0]); 2868 TULIP_WRITE(sc, CSR_ADM_MAR1, mchash[1]); 2869 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2870 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n", 2871 sc->sc_dev.dv_xname)); 2872 } 2873 2874 /* 2875 * tlp_idle: 2876 * 2877 * Cause the transmit and/or receive processes to go idle. 2878 */ 2879 void 2880 tlp_idle(sc, bits) 2881 struct tulip_softc *sc; 2882 u_int32_t bits; 2883 { 2884 static const char *tlp_tx_state_names[] = { 2885 "STOPPED", 2886 "RUNNING - FETCH", 2887 "RUNNING - WAIT", 2888 "RUNNING - READING", 2889 "-- RESERVED --", 2890 "RUNNING - SETUP", 2891 "SUSPENDED", 2892 "RUNNING - CLOSE", 2893 }; 2894 static const char *tlp_rx_state_names[] = { 2895 "STOPPED", 2896 "RUNNING - FETCH", 2897 "RUNNING - CHECK", 2898 "RUNNING - WAIT", 2899 "SUSPENDED", 2900 "RUNNING - CLOSE", 2901 "RUNNING - FLUSH", 2902 "RUNNING - QUEUE", 2903 }; 2904 static const char *dm9102_tx_state_names[] = { 2905 "STOPPED", 2906 "RUNNING - FETCH", 2907 "RUNNING - SETUP", 2908 "RUNNING - READING", 2909 "RUNNING - CLOSE - CLEAR OWNER", 2910 "RUNNING - WAIT", 2911 "RUNNING - CLOSE - WRITE STATUS", 2912 "SUSPENDED", 2913 }; 2914 static const char *dm9102_rx_state_names[] = { 2915 "STOPPED", 2916 "RUNNING - FETCH", 2917 "RUNNING - WAIT", 2918 "RUNNING - QUEUE", 2919 "RUNNING - CLOSE - CLEAR OWNER", 2920 "RUNNING - CLOSE - WRITE STATUS", 2921 "SUSPENDED", 2922 "RUNNING - FLUSH", 2923 }; 2924 2925 const char **tx_state_names, **rx_state_names; 2926 u_int32_t csr, ackmask = 0; 2927 int i; 2928 2929 switch (sc->sc_chip) { 2930 case TULIP_CHIP_DM9102: 2931 case TULIP_CHIP_DM9102A: 2932 tx_state_names = dm9102_tx_state_names; 2933 rx_state_names = dm9102_rx_state_names; 2934 break; 2935 2936 default: 2937 tx_state_names = tlp_tx_state_names; 2938 rx_state_names = tlp_rx_state_names; 2939 break; 2940 } 2941 2942 if (bits & OPMODE_ST) 2943 ackmask |= STATUS_TPS; 2944 2945 if (bits & OPMODE_SR) 2946 ackmask |= STATUS_RPS; 2947 2948 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2949 2950 for (i = 0; i < 1000; i++) { 2951 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2952 break; 2953 delay(10); 2954 } 2955 2956 csr = TULIP_READ(sc, CSR_STATUS); 2957 if ((csr & ackmask) != ackmask) { 2958 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2959 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2960 printf("%s: transmit process failed to idle: " 2961 "state %s\n", sc->sc_dev.dv_xname, 2962 tx_state_names[(csr & STATUS_TS) >> 20]); 2963 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2964 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2965 printf("%s: receive process failed to idle: " 2966 "state %s\n", sc->sc_dev.dv_xname, 2967 rx_state_names[(csr & STATUS_RS) >> 17]); 2968 } 2969 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2970 } 2971 2972 /***************************************************************************** 2973 * Generic media support functions. 2974 *****************************************************************************/ 2975 2976 /* 2977 * tlp_mediastatus: [ifmedia interface function] 2978 * 2979 * Query the current media. 2980 */ 2981 void 2982 tlp_mediastatus(ifp, ifmr) 2983 struct ifnet *ifp; 2984 struct ifmediareq *ifmr; 2985 { 2986 struct tulip_softc *sc = ifp->if_softc; 2987 2988 if (TULIP_IS_ENABLED(sc) == 0) { 2989 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 2990 ifmr->ifm_status = 0; 2991 return; 2992 } 2993 2994 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2995 } 2996 2997 /* 2998 * tlp_mediachange: [ifmedia interface function] 2999 * 3000 * Update the current media. 3001 */ 3002 int 3003 tlp_mediachange(ifp) 3004 struct ifnet *ifp; 3005 { 3006 struct tulip_softc *sc = ifp->if_softc; 3007 3008 if ((ifp->if_flags & IFF_UP) == 0) 3009 return (0); 3010 return ((*sc->sc_mediasw->tmsw_set)(sc)); 3011 } 3012 3013 /***************************************************************************** 3014 * Support functions for MII-attached media. 3015 *****************************************************************************/ 3016 3017 /* 3018 * tlp_mii_tick: 3019 * 3020 * One second timer, used to tick the MII. 3021 */ 3022 void 3023 tlp_mii_tick(arg) 3024 void *arg; 3025 { 3026 struct tulip_softc *sc = arg; 3027 int s; 3028 3029 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 3030 return; 3031 3032 s = splnet(); 3033 mii_tick(&sc->sc_mii); 3034 splx(s); 3035 3036 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 3037 } 3038 3039 /* 3040 * tlp_mii_statchg: [mii interface function] 3041 * 3042 * Callback from PHY when media changes. 3043 */ 3044 void 3045 tlp_mii_statchg(self) 3046 struct device *self; 3047 { 3048 struct tulip_softc *sc = (struct tulip_softc *)self; 3049 3050 /* Idle the transmit and receive processes. */ 3051 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3052 3053 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD); 3054 3055 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 3056 sc->sc_opmode |= OPMODE_TTM; 3057 else 3058 sc->sc_opmode |= OPMODE_HBD; 3059 3060 if (sc->sc_mii.mii_media_active & IFM_FDX) 3061 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 3062 3063 /* 3064 * Write new OPMODE bits. This also restarts the transmit 3065 * and receive processes. 3066 */ 3067 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3068 } 3069 3070 /* 3071 * tlp_winb_mii_statchg: [mii interface function] 3072 * 3073 * Callback from PHY when media changes. This version is 3074 * for the Winbond 89C840F, which has different OPMODE bits. 3075 */ 3076 void 3077 tlp_winb_mii_statchg(self) 3078 struct device *self; 3079 { 3080 struct tulip_softc *sc = (struct tulip_softc *)self; 3081 3082 /* Idle the transmit and receive processes. */ 3083 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3084 3085 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 3086 3087 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 3088 sc->sc_opmode |= OPMODE_WINB_FES; 3089 3090 if (sc->sc_mii.mii_media_active & IFM_FDX) 3091 sc->sc_opmode |= OPMODE_FD; 3092 3093 /* 3094 * Write new OPMODE bits. This also restarts the transmit 3095 * and receive processes. 3096 */ 3097 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3098 } 3099 3100 /* 3101 * tlp_dm9102_mii_statchg: [mii interface function] 3102 * 3103 * Callback from PHY when media changes. This version is 3104 * for the DM9102. 3105 */ 3106 void 3107 tlp_dm9102_mii_statchg(self) 3108 struct device *self; 3109 { 3110 struct tulip_softc *sc = (struct tulip_softc *)self; 3111 3112 /* 3113 * Don't idle the transmit and receive processes, here. It 3114 * seems to fail, and just causes excess noise. 3115 */ 3116 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 3117 3118 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) != IFM_100_TX) 3119 sc->sc_opmode |= OPMODE_TTM; 3120 3121 if (sc->sc_mii.mii_media_active & IFM_FDX) 3122 sc->sc_opmode |= OPMODE_FD; 3123 3124 /* 3125 * Write new OPMODE bits. 3126 */ 3127 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3128 } 3129 3130 /* 3131 * tlp_mii_getmedia: 3132 * 3133 * Callback from ifmedia to request current media status. 3134 */ 3135 void 3136 tlp_mii_getmedia(sc, ifmr) 3137 struct tulip_softc *sc; 3138 struct ifmediareq *ifmr; 3139 { 3140 3141 mii_pollstat(&sc->sc_mii); 3142 ifmr->ifm_status = sc->sc_mii.mii_media_status; 3143 ifmr->ifm_active = sc->sc_mii.mii_media_active; 3144 } 3145 3146 /* 3147 * tlp_mii_setmedia: 3148 * 3149 * Callback from ifmedia to request new media setting. 3150 */ 3151 int 3152 tlp_mii_setmedia(sc) 3153 struct tulip_softc *sc; 3154 { 3155 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3156 3157 if (ifp->if_flags & IFF_UP) { 3158 switch (sc->sc_chip) { 3159 case TULIP_CHIP_21142: 3160 case TULIP_CHIP_21143: 3161 /* Disable the internal Nway engine. */ 3162 TULIP_WRITE(sc, CSR_SIATXRX, 0); 3163 break; 3164 3165 default: 3166 /* Nothing. */ 3167 } 3168 mii_mediachg(&sc->sc_mii); 3169 } 3170 return (0); 3171 } 3172 3173 /* 3174 * tlp_bitbang_mii_readreg: 3175 * 3176 * Read a PHY register via bit-bang'ing the MII. 3177 */ 3178 int 3179 tlp_bitbang_mii_readreg(self, phy, reg) 3180 struct device *self; 3181 int phy, reg; 3182 { 3183 struct tulip_softc *sc = (void *) self; 3184 3185 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg)); 3186 } 3187 3188 /* 3189 * tlp_bitbang_mii_writereg: 3190 * 3191 * Write a PHY register via bit-bang'ing the MII. 3192 */ 3193 void 3194 tlp_bitbang_mii_writereg(self, phy, reg, val) 3195 struct device *self; 3196 int phy, reg, val; 3197 { 3198 struct tulip_softc *sc = (void *) self; 3199 3200 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val); 3201 } 3202 3203 /* 3204 * tlp_sio_mii_bitbang_read: 3205 * 3206 * Read the MII serial port for the MII bit-bang module. 3207 */ 3208 u_int32_t 3209 tlp_sio_mii_bitbang_read(self) 3210 struct device *self; 3211 { 3212 struct tulip_softc *sc = (void *) self; 3213 3214 return (TULIP_READ(sc, CSR_MIIROM)); 3215 } 3216 3217 /* 3218 * tlp_sio_mii_bitbang_write: 3219 * 3220 * Write the MII serial port for the MII bit-bang module. 3221 */ 3222 void 3223 tlp_sio_mii_bitbang_write(self, val) 3224 struct device *self; 3225 u_int32_t val; 3226 { 3227 struct tulip_softc *sc = (void *) self; 3228 3229 TULIP_WRITE(sc, CSR_MIIROM, val); 3230 } 3231 3232 /* 3233 * tlp_pnic_mii_readreg: 3234 * 3235 * Read a PHY register on the Lite-On PNIC. 3236 */ 3237 int 3238 tlp_pnic_mii_readreg(self, phy, reg) 3239 struct device *self; 3240 int phy, reg; 3241 { 3242 struct tulip_softc *sc = (void *) self; 3243 u_int32_t val; 3244 int i; 3245 3246 TULIP_WRITE(sc, CSR_PNIC_MII, 3247 PNIC_MII_MBO | PNIC_MII_RESERVED | 3248 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 3249 (reg << PNIC_MII_REGSHIFT)); 3250 3251 for (i = 0; i < 1000; i++) { 3252 delay(10); 3253 val = TULIP_READ(sc, CSR_PNIC_MII); 3254 if ((val & PNIC_MII_BUSY) == 0) { 3255 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 3256 return (0); 3257 else 3258 return (val & PNIC_MII_DATA); 3259 } 3260 } 3261 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 3262 return (0); 3263 } 3264 3265 /* 3266 * tlp_pnic_mii_writereg: 3267 * 3268 * Write a PHY register on the Lite-On PNIC. 3269 */ 3270 void 3271 tlp_pnic_mii_writereg(self, phy, reg, val) 3272 struct device *self; 3273 int phy, reg, val; 3274 { 3275 struct tulip_softc *sc = (void *) self; 3276 int i; 3277 3278 TULIP_WRITE(sc, CSR_PNIC_MII, 3279 PNIC_MII_MBO | PNIC_MII_RESERVED | 3280 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 3281 (reg << PNIC_MII_REGSHIFT) | val); 3282 3283 for (i = 0; i < 1000; i++) { 3284 delay(10); 3285 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 3286 return; 3287 } 3288 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 3289 } 3290 3291 const bus_addr_t tlp_al981_phy_regmap[] = { 3292 CSR_ADM_BMCR, 3293 CSR_ADM_BMSR, 3294 CSR_ADM_PHYIDR1, 3295 CSR_ADM_PHYIDR2, 3296 CSR_ADM_ANAR, 3297 CSR_ADM_ANLPAR, 3298 CSR_ADM_ANER, 3299 3300 CSR_ADM_XMC, 3301 CSR_ADM_XCIIS, 3302 CSR_ADM_XIE, 3303 CSR_ADM_100CTR, 3304 }; 3305 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) / 3306 sizeof(tlp_al981_phy_regmap[0]); 3307 3308 /* 3309 * tlp_al981_mii_readreg: 3310 * 3311 * Read a PHY register on the ADMtek AL981. 3312 */ 3313 int 3314 tlp_al981_mii_readreg(self, phy, reg) 3315 struct device *self; 3316 int phy, reg; 3317 { 3318 struct tulip_softc *sc = (struct tulip_softc *)self; 3319 3320 /* AL981 only has an internal PHY. */ 3321 if (phy != 0) 3322 return (0); 3323 3324 if (reg >= tlp_al981_phy_regmap_size) 3325 return (0); 3326 3327 return (bus_space_read_4(sc->sc_st, sc->sc_sh, 3328 tlp_al981_phy_regmap[reg]) & 0xffff); 3329 } 3330 3331 /* 3332 * tlp_al981_mii_writereg: 3333 * 3334 * Write a PHY register on the ADMtek AL981. 3335 */ 3336 void 3337 tlp_al981_mii_writereg(self, phy, reg, val) 3338 struct device *self; 3339 int phy, reg, val; 3340 { 3341 struct tulip_softc *sc = (struct tulip_softc *)self; 3342 3343 /* AL981 only has an internal PHY. */ 3344 if (phy != 0) 3345 return; 3346 3347 if (reg >= tlp_al981_phy_regmap_size) 3348 return; 3349 3350 bus_space_write_4(sc->sc_st, sc->sc_sh, 3351 tlp_al981_phy_regmap[reg], val); 3352 } 3353 3354 /***************************************************************************** 3355 * Chip-specific pre-init and reset functions. 3356 *****************************************************************************/ 3357 3358 /* 3359 * tlp_2114x_preinit: 3360 * 3361 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3362 */ 3363 void 3364 tlp_2114x_preinit(sc) 3365 struct tulip_softc *sc; 3366 { 3367 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3368 struct tulip_21x4x_media *tm = ife->ifm_aux; 3369 3370 /* 3371 * Whether or not we're in MII or SIA/SYM mode, the media info 3372 * contains the appropriate OPMODE bits. 3373 * 3374 * Note that if we have no media info, we are are doing 3375 * non-MII `auto'. 3376 * 3377 * Also, we always set the Must-Be-One bit. 3378 */ 3379 if (tm == NULL) { 3380 #ifdef DIAGNOSTIC 3381 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3382 panic("tlp_2114x_preinit: not IFM_AUTO"); 3383 if (sc->sc_nway_active == NULL) 3384 panic("tlp_2114x_preinit: nway_active NULL"); 3385 #endif 3386 tm = sc->sc_nway_active->ifm_aux; 3387 } 3388 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode; 3389 3390 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3391 } 3392 3393 /* 3394 * tlp_2114x_mii_preinit: 3395 * 3396 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3397 * This version is used by boards which only have MII and don't have 3398 * an ISV SROM. 3399 */ 3400 void 3401 tlp_2114x_mii_preinit(sc) 3402 struct tulip_softc *sc; 3403 { 3404 3405 /* 3406 * Always set the Must-Be-One bit, and Port Select (to select MII). 3407 * We'll never be called during a media change. 3408 */ 3409 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS; 3410 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3411 } 3412 3413 /* 3414 * tlp_pnic_preinit: 3415 * 3416 * Pre-init function for the Lite-On 82c168 and 82c169. 3417 */ 3418 void 3419 tlp_pnic_preinit(sc) 3420 struct tulip_softc *sc; 3421 { 3422 3423 if (sc->sc_flags & TULIPF_HAS_MII) { 3424 /* 3425 * MII case: just set the port-select bit; we will never 3426 * be called during a media change. 3427 */ 3428 sc->sc_opmode |= OPMODE_PS; 3429 } else { 3430 /* 3431 * ENDEC/PCS/Nway mode; enable the Tx backoff counter. 3432 */ 3433 sc->sc_opmode |= OPMODE_PNIC_TBEN; 3434 } 3435 } 3436 3437 /* 3438 * tlp_dm9102_preinit: 3439 * 3440 * Pre-init function for the Davicom DM9102. 3441 */ 3442 void 3443 tlp_dm9102_preinit(sc) 3444 struct tulip_softc *sc; 3445 { 3446 3447 switch (sc->sc_chip) { 3448 case TULIP_CHIP_DM9102: 3449 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 3450 break; 3451 3452 case TULIP_CHIP_DM9102A: 3453 /* 3454 * XXX Figure out how to actually deal with the HomePNA 3455 * XXX portion of the DM9102A. 3456 */ 3457 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD; 3458 break; 3459 3460 default: 3461 /* Nothing. */ 3462 } 3463 3464 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3465 } 3466 3467 /* 3468 * tlp_21140_reset: 3469 * 3470 * Issue a reset sequence on the 21140 via the GPIO facility. 3471 */ 3472 void 3473 tlp_21140_reset(sc) 3474 struct tulip_softc *sc; 3475 { 3476 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3477 struct tulip_21x4x_media *tm = ife->ifm_aux; 3478 int i; 3479 3480 /* First, set the direction on the GPIO pins. */ 3481 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 3482 3483 /* Now, issue the reset sequence. */ 3484 for (i = 0; i < tm->tm_reset_length; i++) { 3485 delay(10); 3486 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]); 3487 } 3488 3489 /* Now, issue the selection sequence. */ 3490 for (i = 0; i < tm->tm_gp_length; i++) { 3491 delay(10); 3492 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]); 3493 } 3494 3495 /* If there were no sequences, just lower the pins. */ 3496 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) 3497 TULIP_WRITE(sc, CSR_GPP, 0); 3498 } 3499 3500 /* 3501 * tlp_21142_reset: 3502 * 3503 * Issue a reset sequence on the 21142 via the GPIO facility. 3504 */ 3505 void 3506 tlp_21142_reset(sc) 3507 struct tulip_softc *sc; 3508 { 3509 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3510 struct tulip_21x4x_media *tm = ife->ifm_aux; 3511 const u_int8_t *ncp; 3512 int i; 3513 3514 ncp = &sc->sc_srom[tm->tm_reset_offset]; 3515 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 3516 delay(10); 3517 TULIP_WRITE(sc, CSR_SIAGEN, 3518 TULIP_ROM_GETW(ncp, 0) << 16); 3519 } 3520 3521 ncp = &sc->sc_srom[tm->tm_gp_offset]; 3522 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 3523 delay(10); 3524 TULIP_WRITE(sc, CSR_SIAGEN, 3525 TULIP_ROM_GETW(ncp, 0) << 16); 3526 } 3527 3528 /* If there were no sequences, just lower the pins. */ 3529 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 3530 delay(10); 3531 TULIP_WRITE(sc, CSR_SIAGEN, 0); 3532 } 3533 } 3534 3535 /* 3536 * tlp_pmac_reset: 3537 * 3538 * Reset routine for Macronix chips. 3539 */ 3540 void 3541 tlp_pmac_reset(sc) 3542 struct tulip_softc *sc; 3543 { 3544 3545 switch (sc->sc_chip) { 3546 case TULIP_CHIP_82C115: 3547 case TULIP_CHIP_MX98715: 3548 case TULIP_CHIP_MX98715A: 3549 case TULIP_CHIP_MX98725: 3550 /* 3551 * Set the LED operating mode. This information is located 3552 * in the EEPROM at byte offset 0x77, per the MX98715A and 3553 * MX98725 application notes. 3554 */ 3555 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24); 3556 break; 3557 case TULIP_CHIP_MX98715AEC_X: 3558 /* 3559 * Set the LED operating mode. This information is located 3560 * in the EEPROM at byte offset 0x76, per the MX98715AEC 3561 * application note. 3562 */ 3563 TULIP_WRITE(sc, CSR_MIIROM, ((0xf & sc->sc_srom[0x76]) << 28) 3564 | ((0xf0 & sc->sc_srom[0x76]) << 20)); 3565 break; 3566 3567 default: 3568 /* Nothing. */ 3569 } 3570 } 3571 3572 /* 3573 * tlp_dm9102_reset: 3574 * 3575 * Reset routine for the Davicom DM9102. 3576 */ 3577 void 3578 tlp_dm9102_reset(sc) 3579 struct tulip_softc *sc; 3580 { 3581 3582 TULIP_WRITE(sc, CSR_DM_PHYSTAT, DM_PHYSTAT_GEPC|DM_PHYSTAT_GPED); 3583 delay(100); 3584 TULIP_WRITE(sc, CSR_DM_PHYSTAT, 0); 3585 } 3586 3587 /***************************************************************************** 3588 * Chip/board-specific media switches. The ones here are ones that 3589 * are potentially common to multiple front-ends. 3590 *****************************************************************************/ 3591 3592 /* 3593 * This table is a common place for all sorts of media information, 3594 * keyed off of the SROM media code for that media. 3595 * 3596 * Note that we explicitly configure the 21142/21143 to always advertise 3597 * NWay capabilities when using the UTP port. 3598 * XXX Actually, we don't yet. 3599 */ 3600 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = { 3601 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0, 3602 "10baseT", 3603 0, 3604 { SIACONN_21040_10BASET, 3605 SIATXRX_21040_10BASET, 3606 SIAGEN_21040_10BASET }, 3607 3608 { SIACONN_21041_10BASET, 3609 SIATXRX_21041_10BASET, 3610 SIAGEN_21041_10BASET }, 3611 3612 { SIACONN_21142_10BASET, 3613 SIATXRX_21142_10BASET, 3614 SIAGEN_21142_10BASET } }, 3615 3616 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0, 3617 "10base2", 3618 0, 3619 { 0, 3620 0, 3621 0 }, 3622 3623 { SIACONN_21041_BNC, 3624 SIATXRX_21041_BNC, 3625 SIAGEN_21041_BNC }, 3626 3627 { SIACONN_21142_BNC, 3628 SIATXRX_21142_BNC, 3629 SIAGEN_21142_BNC } }, 3630 3631 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0, 3632 "10base5", 3633 0, 3634 { SIACONN_21040_AUI, 3635 SIATXRX_21040_AUI, 3636 SIAGEN_21040_AUI }, 3637 3638 { SIACONN_21041_AUI, 3639 SIATXRX_21041_AUI, 3640 SIAGEN_21041_AUI }, 3641 3642 { SIACONN_21142_AUI, 3643 SIATXRX_21142_AUI, 3644 SIAGEN_21142_AUI } }, 3645 3646 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0, 3647 "100baseTX", 3648 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3649 { 0, 3650 0, 3651 0 }, 3652 3653 { 0, 3654 0, 3655 0 }, 3656 3657 { 0, 3658 0, 3659 SIAGEN_ABM } }, 3660 3661 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX, 3662 "10baseT-FDX", 3663 OPMODE_FD|OPMODE_HBD, 3664 { SIACONN_21040_10BASET_FDX, 3665 SIATXRX_21040_10BASET_FDX, 3666 SIAGEN_21040_10BASET_FDX }, 3667 3668 { SIACONN_21041_10BASET_FDX, 3669 SIATXRX_21041_10BASET_FDX, 3670 SIAGEN_21041_10BASET_FDX }, 3671 3672 { SIACONN_21142_10BASET_FDX, 3673 SIATXRX_21142_10BASET_FDX, 3674 SIAGEN_21142_10BASET_FDX } }, 3675 3676 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX, 3677 "100baseTX-FDX", 3678 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD, 3679 { 0, 3680 0, 3681 0 }, 3682 3683 { 0, 3684 0, 3685 0 }, 3686 3687 { 0, 3688 0, 3689 SIAGEN_ABM } }, 3690 3691 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0, 3692 "100baseT4", 3693 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3694 { 0, 3695 0, 3696 0 }, 3697 3698 { 0, 3699 0, 3700 0 }, 3701 3702 { 0, 3703 0, 3704 SIAGEN_ABM } }, 3705 3706 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0, 3707 "100baseFX", 3708 OPMODE_PS|OPMODE_PCS|OPMODE_HBD, 3709 { 0, 3710 0, 3711 0 }, 3712 3713 { 0, 3714 0, 3715 0 }, 3716 3717 { 0, 3718 0, 3719 SIAGEN_ABM } }, 3720 3721 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX, 3722 "100baseFX-FDX", 3723 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD, 3724 { 0, 3725 0, 3726 0 }, 3727 3728 { 0, 3729 0, 3730 0 }, 3731 3732 { 0, 3733 0, 3734 SIAGEN_ABM } }, 3735 3736 { 0, 0, 0, 3737 NULL, 3738 0, 3739 { 0, 3740 0, 3741 0 }, 3742 3743 { 0, 3744 0, 3745 0 }, 3746 3747 { 0, 3748 0, 3749 0 } }, 3750 }; 3751 3752 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t)); 3753 void tlp_srom_media_info __P((struct tulip_softc *, 3754 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *)); 3755 void tlp_add_srom_media __P((struct tulip_softc *, int, 3756 void (*)(struct tulip_softc *, struct ifmediareq *), 3757 int (*)(struct tulip_softc *), const u_int8_t *, int)); 3758 void tlp_print_media __P((struct tulip_softc *)); 3759 void tlp_nway_activate __P((struct tulip_softc *, int)); 3760 void tlp_get_minst __P((struct tulip_softc *)); 3761 3762 const struct tulip_srom_to_ifmedia * 3763 tlp_srom_to_ifmedia(sm) 3764 u_int8_t sm; 3765 { 3766 const struct tulip_srom_to_ifmedia *tsti; 3767 3768 for (tsti = tulip_srom_to_ifmedia_table; 3769 tsti->tsti_name != NULL; tsti++) { 3770 if (tsti->tsti_srom == sm) 3771 return (tsti); 3772 } 3773 3774 return (NULL); 3775 } 3776 3777 void 3778 tlp_srom_media_info(sc, tsti, tm) 3779 struct tulip_softc *sc; 3780 const struct tulip_srom_to_ifmedia *tsti; 3781 struct tulip_21x4x_media *tm; 3782 { 3783 3784 tm->tm_name = tsti->tsti_name; 3785 tm->tm_opmode = tsti->tsti_opmode; 3786 3787 switch (sc->sc_chip) { 3788 case TULIP_CHIP_DE425: 3789 case TULIP_CHIP_21040: 3790 tm->tm_sia = tsti->tsti_21040; /* struct assignment */ 3791 break; 3792 3793 case TULIP_CHIP_21041: 3794 tm->tm_sia = tsti->tsti_21041; /* struct assignment */ 3795 break; 3796 3797 case TULIP_CHIP_21142: 3798 case TULIP_CHIP_21143: 3799 case TULIP_CHIP_82C115: 3800 case TULIP_CHIP_MX98715: 3801 case TULIP_CHIP_MX98715A: 3802 case TULIP_CHIP_MX98715AEC_X: 3803 case TULIP_CHIP_MX98725: 3804 tm->tm_sia = tsti->tsti_21142; /* struct assignment */ 3805 break; 3806 3807 default: 3808 /* Nothing. */ 3809 } 3810 } 3811 3812 void 3813 tlp_add_srom_media(sc, type, get, set, list, cnt) 3814 struct tulip_softc *sc; 3815 int type; 3816 void (*get) __P((struct tulip_softc *, struct ifmediareq *)); 3817 int (*set) __P((struct tulip_softc *)); 3818 const u_int8_t *list; 3819 int cnt; 3820 { 3821 struct tulip_21x4x_media *tm; 3822 const struct tulip_srom_to_ifmedia *tsti; 3823 int i; 3824 3825 for (i = 0; i < cnt; i++) { 3826 tsti = tlp_srom_to_ifmedia(list[i]); 3827 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 3828 memset(tm, 0, sizeof(*tm)); 3829 tlp_srom_media_info(sc, tsti, tm); 3830 tm->tm_type = type; 3831 tm->tm_get = get; 3832 tm->tm_set = set; 3833 3834 ifmedia_add(&sc->sc_mii.mii_media, 3835 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 3836 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 3837 } 3838 } 3839 3840 void 3841 tlp_print_media(sc) 3842 struct tulip_softc *sc; 3843 { 3844 struct ifmedia_entry *ife; 3845 struct tulip_21x4x_media *tm; 3846 const char *sep = ""; 3847 3848 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3849 3850 printf("%s: ", sc->sc_dev.dv_xname); 3851 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 3852 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 3853 tm = ife->ifm_aux; 3854 if (tm == NULL) { 3855 #ifdef DIAGNOSTIC 3856 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3857 panic("tlp_print_media"); 3858 #endif 3859 PRINT("auto"); 3860 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII && 3861 tm->tm_type != TULIP_ROM_MB_21142_MII) { 3862 PRINT(tm->tm_name); 3863 } 3864 } 3865 printf("\n"); 3866 3867 #undef PRINT 3868 } 3869 3870 void 3871 tlp_nway_activate(sc, media) 3872 struct tulip_softc *sc; 3873 int media; 3874 { 3875 struct ifmedia_entry *ife; 3876 3877 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0); 3878 #ifdef DIAGNOSTIC 3879 if (ife == NULL) 3880 panic("tlp_nway_activate"); 3881 #endif 3882 sc->sc_nway_active = ife; 3883 } 3884 3885 void 3886 tlp_get_minst(sc) 3887 struct tulip_softc *sc; 3888 { 3889 3890 if ((sc->sc_media_seen & 3891 ~((1 << TULIP_ROM_MB_21140_MII) | 3892 (1 << TULIP_ROM_MB_21142_MII))) == 0) { 3893 /* 3894 * We have not yet seen any SIA/SYM media (but are 3895 * about to; that's why we're called!), so assign 3896 * the current media instance to be the `internal media' 3897 * instance, and advance it so any MII media gets a 3898 * fresh one (used to selecting/isolating a PHY). 3899 */ 3900 sc->sc_tlp_minst = sc->sc_mii.mii_instance++; 3901 } 3902 } 3903 3904 /* 3905 * SIA Utility functions. 3906 */ 3907 void tlp_sia_update_link __P((struct tulip_softc *)); 3908 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *)); 3909 int tlp_sia_set __P((struct tulip_softc *)); 3910 void tlp_sia_fixup __P((struct tulip_softc *)); 3911 3912 void 3913 tlp_sia_update_link(sc) 3914 struct tulip_softc *sc; 3915 { 3916 struct ifmedia_entry *ife; 3917 struct tulip_21x4x_media *tm; 3918 u_int32_t siastat; 3919 3920 ife = TULIP_CURRENT_MEDIA(sc); 3921 tm = ife->ifm_aux; 3922 3923 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 3924 3925 siastat = TULIP_READ(sc, CSR_SIASTAT); 3926 3927 /* 3928 * Note that when we do SIA link tests, we are assuming that 3929 * the chip is really in the mode that the current media setting 3930 * reflects. If we're not, then the link tests will not be 3931 * accurate! 3932 */ 3933 switch (IFM_SUBTYPE(ife->ifm_media)) { 3934 case IFM_10_T: 3935 sc->sc_flags |= TULIPF_LINK_VALID; 3936 if ((siastat & SIASTAT_LS10) == 0) 3937 sc->sc_flags |= TULIPF_LINK_UP; 3938 break; 3939 3940 case IFM_100_TX: 3941 case IFM_100_T4: 3942 sc->sc_flags |= TULIPF_LINK_VALID; 3943 if ((siastat & SIASTAT_LS100) == 0) 3944 sc->sc_flags |= TULIPF_LINK_UP; 3945 break; 3946 } 3947 3948 switch (sc->sc_chip) { 3949 case TULIP_CHIP_21142: 3950 case TULIP_CHIP_21143: 3951 /* 3952 * On these chips, we can tell more information about 3953 * AUI/BNC. Note that the AUI/BNC selection is made 3954 * in a different register; for our purpose, it's all 3955 * AUI. 3956 */ 3957 switch (IFM_SUBTYPE(ife->ifm_media)) { 3958 case IFM_10_2: 3959 case IFM_10_5: 3960 sc->sc_flags |= TULIPF_LINK_VALID; 3961 if (siastat & SIASTAT_ARA) { 3962 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA); 3963 sc->sc_flags |= TULIPF_LINK_UP; 3964 } 3965 break; 3966 3967 default: 3968 /* 3969 * If we're SYM media and can detect the link 3970 * via the GPIO facility, prefer that status 3971 * over LS100. 3972 */ 3973 if (tm->tm_type == TULIP_ROM_MB_21143_SYM && 3974 tm->tm_actmask != 0) { 3975 sc->sc_flags = (sc->sc_flags & 3976 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID; 3977 if (TULIP_ISSET(sc, CSR_SIAGEN, 3978 tm->tm_actmask) == tm->tm_actdata) 3979 sc->sc_flags |= TULIPF_LINK_UP; 3980 } 3981 } 3982 break; 3983 3984 default: 3985 /* Nothing. */ 3986 } 3987 } 3988 3989 void 3990 tlp_sia_get(sc, ifmr) 3991 struct tulip_softc *sc; 3992 struct ifmediareq *ifmr; 3993 { 3994 struct ifmedia_entry *ife; 3995 3996 ifmr->ifm_status = 0; 3997 3998 tlp_sia_update_link(sc); 3999 4000 ife = TULIP_CURRENT_MEDIA(sc); 4001 4002 if (sc->sc_flags & TULIPF_LINK_VALID) 4003 ifmr->ifm_status |= IFM_AVALID; 4004 if (sc->sc_flags & TULIPF_LINK_UP) 4005 ifmr->ifm_status |= IFM_ACTIVE; 4006 ifmr->ifm_active = ife->ifm_media; 4007 } 4008 4009 void 4010 tlp_sia_fixup(sc) 4011 struct tulip_softc *sc; 4012 { 4013 struct ifmedia_entry *ife; 4014 struct tulip_21x4x_media *tm; 4015 u_int32_t siaconn, siatxrx, siagen; 4016 4017 switch (sc->sc_chip) { 4018 case TULIP_CHIP_82C115: 4019 case TULIP_CHIP_MX98713A: 4020 case TULIP_CHIP_MX98715: 4021 case TULIP_CHIP_MX98715A: 4022 case TULIP_CHIP_MX98715AEC_X: 4023 case TULIP_CHIP_MX98725: 4024 siaconn = PMAC_SIACONN_MASK; 4025 siatxrx = PMAC_SIATXRX_MASK; 4026 siagen = PMAC_SIAGEN_MASK; 4027 break; 4028 4029 default: 4030 /* No fixups required on any other chips. */ 4031 return; 4032 } 4033 4034 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4035 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 4036 tm = ife->ifm_aux; 4037 if (tm == NULL) 4038 continue; 4039 4040 tm->tm_siaconn &= siaconn; 4041 tm->tm_siatxrx &= siatxrx; 4042 tm->tm_siagen &= siagen; 4043 } 4044 } 4045 4046 int 4047 tlp_sia_set(sc) 4048 struct tulip_softc *sc; 4049 { 4050 struct ifmedia_entry *ife; 4051 struct tulip_21x4x_media *tm; 4052 4053 ife = TULIP_CURRENT_MEDIA(sc); 4054 tm = ife->ifm_aux; 4055 4056 /* 4057 * XXX This appears to be necessary on a bunch of the clone chips. 4058 */ 4059 delay(20000); 4060 4061 /* 4062 * Idle the chip. 4063 */ 4064 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4065 4066 /* 4067 * Program the SIA. It's important to write in this order, 4068 * resetting the SIA first. 4069 */ 4070 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */ 4071 delay(1000); 4072 4073 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx); 4074 4075 switch (sc->sc_chip) { 4076 case TULIP_CHIP_21142: 4077 case TULIP_CHIP_21143: 4078 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl); 4079 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata); 4080 break; 4081 default: 4082 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen); 4083 } 4084 4085 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn); 4086 4087 /* 4088 * Set the OPMODE bits for this media and write OPMODE. 4089 * This will resume the transmit and receive processes. 4090 */ 4091 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4092 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4093 4094 return (0); 4095 } 4096 4097 /* 4098 * 21140 GPIO utility functions. 4099 */ 4100 void tlp_21140_gpio_update_link __P((struct tulip_softc *)); 4101 void tlp_21140_gpio_get __P((struct tulip_softc *sc, 4102 struct ifmediareq *ifmr)); 4103 int tlp_21140_gpio_set __P((struct tulip_softc *sc)); 4104 4105 void 4106 tlp_21140_gpio_update_link(sc) 4107 struct tulip_softc *sc; 4108 { 4109 struct ifmedia_entry *ife; 4110 struct tulip_21x4x_media *tm; 4111 4112 ife = TULIP_CURRENT_MEDIA(sc); 4113 tm = ife->ifm_aux; 4114 4115 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 4116 4117 if (tm->tm_actmask != 0) { 4118 sc->sc_flags |= TULIPF_LINK_VALID; 4119 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) == 4120 tm->tm_actdata) 4121 sc->sc_flags |= TULIPF_LINK_UP; 4122 } 4123 } 4124 4125 void 4126 tlp_21140_gpio_get(sc, ifmr) 4127 struct tulip_softc *sc; 4128 struct ifmediareq *ifmr; 4129 { 4130 struct ifmedia_entry *ife; 4131 4132 ifmr->ifm_status = 0; 4133 4134 tlp_21140_gpio_update_link(sc); 4135 4136 ife = TULIP_CURRENT_MEDIA(sc); 4137 4138 if (sc->sc_flags & TULIPF_LINK_VALID) 4139 ifmr->ifm_status |= IFM_AVALID; 4140 if (sc->sc_flags & TULIPF_LINK_UP) 4141 ifmr->ifm_status |= IFM_ACTIVE; 4142 ifmr->ifm_active = ife->ifm_media; 4143 } 4144 4145 int 4146 tlp_21140_gpio_set(sc) 4147 struct tulip_softc *sc; 4148 { 4149 struct ifmedia_entry *ife; 4150 struct tulip_21x4x_media *tm; 4151 4152 ife = TULIP_CURRENT_MEDIA(sc); 4153 tm = ife->ifm_aux; 4154 4155 /* 4156 * Idle the chip. 4157 */ 4158 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4159 4160 /* 4161 * Set the GPIO pins for this media, to flip any 4162 * relays, etc. 4163 */ 4164 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4165 delay(10); 4166 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata); 4167 4168 /* 4169 * Set the OPMODE bits for this media and write OPMODE. 4170 * This will resume the transmit and receive processes. 4171 */ 4172 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4173 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4174 4175 return (0); 4176 } 4177 4178 /* 4179 * 21040 and 21041 media switches. 4180 */ 4181 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 4182 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 4183 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 4184 void tlp_21041_tmsw_init __P((struct tulip_softc *)); 4185 4186 const struct tulip_mediasw tlp_21040_mediasw = { 4187 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set 4188 }; 4189 4190 const struct tulip_mediasw tlp_21040_tp_mediasw = { 4191 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set 4192 }; 4193 4194 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 4195 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set 4196 }; 4197 4198 const struct tulip_mediasw tlp_21041_mediasw = { 4199 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set 4200 }; 4201 4202 4203 void 4204 tlp_21040_tmsw_init(sc) 4205 struct tulip_softc *sc; 4206 { 4207 static const u_int8_t media[] = { 4208 TULIP_ROM_MB_MEDIA_TP, 4209 TULIP_ROM_MB_MEDIA_TP_FDX, 4210 TULIP_ROM_MB_MEDIA_AUI, 4211 }; 4212 struct tulip_21x4x_media *tm; 4213 4214 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4215 tlp_mediastatus); 4216 4217 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3); 4218 4219 /* 4220 * No SROM type for External SIA. 4221 */ 4222 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4223 memset(tm, 0, sizeof(*tm)); 4224 tm->tm_name = "manual"; 4225 tm->tm_opmode = 0; 4226 tm->tm_siaconn = SIACONN_21040_EXTSIA; 4227 tm->tm_siatxrx = SIATXRX_21040_EXTSIA; 4228 tm->tm_siagen = SIAGEN_21040_EXTSIA; 4229 ifmedia_add(&sc->sc_mii.mii_media, 4230 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm); 4231 4232 /* 4233 * XXX Autosense not yet supported. 4234 */ 4235 4236 /* XXX This should be auto-sense. */ 4237 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4238 4239 tlp_print_media(sc); 4240 } 4241 4242 void 4243 tlp_21040_tp_tmsw_init(sc) 4244 struct tulip_softc *sc; 4245 { 4246 static const u_int8_t media[] = { 4247 TULIP_ROM_MB_MEDIA_TP, 4248 TULIP_ROM_MB_MEDIA_TP_FDX, 4249 }; 4250 4251 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4252 tlp_mediastatus); 4253 4254 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2); 4255 4256 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4257 4258 tlp_print_media(sc); 4259 } 4260 4261 void 4262 tlp_21040_auibnc_tmsw_init(sc) 4263 struct tulip_softc *sc; 4264 { 4265 static const u_int8_t media[] = { 4266 TULIP_ROM_MB_MEDIA_AUI, 4267 }; 4268 4269 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4270 tlp_mediastatus); 4271 4272 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1); 4273 4274 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 4275 4276 tlp_print_media(sc); 4277 } 4278 4279 void 4280 tlp_21041_tmsw_init(sc) 4281 struct tulip_softc *sc; 4282 { 4283 static const u_int8_t media[] = { 4284 TULIP_ROM_MB_MEDIA_TP, 4285 TULIP_ROM_MB_MEDIA_TP_FDX, 4286 TULIP_ROM_MB_MEDIA_BNC, 4287 TULIP_ROM_MB_MEDIA_AUI, 4288 }; 4289 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt; 4290 const struct tulip_srom_to_ifmedia *tsti; 4291 struct tulip_21x4x_media *tm; 4292 u_int16_t romdef; 4293 u_int8_t mb; 4294 4295 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4296 tlp_mediastatus); 4297 4298 if (tlp_isv_srom(sc->sc_srom) == 0) { 4299 not_isv_srom: 4300 /* 4301 * If we have a board without the standard 21041 SROM format, 4302 * we just assume all media are present and try and pick a 4303 * reasonable default. 4304 */ 4305 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4); 4306 4307 /* 4308 * XXX Autosense not yet supported. 4309 */ 4310 4311 /* XXX This should be auto-sense. */ 4312 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4313 4314 tlp_print_media(sc); 4315 return; 4316 } 4317 4318 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4319 for (i = 0; i < devcnt; i++) { 4320 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4321 break; 4322 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4323 sc->sc_devno) 4324 break; 4325 } 4326 4327 if (i == devcnt) 4328 goto not_isv_srom; 4329 4330 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4331 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4332 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE; 4333 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4334 4335 for (; m_cnt != 0; 4336 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) { 4337 mb = sc->sc_srom[mb_offset]; 4338 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4339 memset(tm, 0, sizeof(*tm)); 4340 switch (mb & TULIP_ROM_MB_MEDIA_CODE) { 4341 case TULIP_ROM_MB_MEDIA_TP_FDX: 4342 case TULIP_ROM_MB_MEDIA_TP: 4343 case TULIP_ROM_MB_MEDIA_BNC: 4344 case TULIP_ROM_MB_MEDIA_AUI: 4345 tsti = tlp_srom_to_ifmedia(mb & 4346 TULIP_ROM_MB_MEDIA_CODE); 4347 4348 tlp_srom_media_info(sc, tsti, tm); 4349 4350 /* 4351 * Override our default SIA settings if the 4352 * SROM contains its own. 4353 */ 4354 if (mb & TULIP_ROM_MB_EXT) { 4355 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom, 4356 mb_offset + TULIP_ROM_MB_CSR13); 4357 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom, 4358 mb_offset + TULIP_ROM_MB_CSR14); 4359 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom, 4360 mb_offset + TULIP_ROM_MB_CSR15); 4361 } 4362 4363 ifmedia_add(&sc->sc_mii.mii_media, 4364 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4365 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4366 break; 4367 4368 default: 4369 printf("%s: unknown media code 0x%02x\n", 4370 sc->sc_dev.dv_xname, 4371 mb & TULIP_ROM_MB_MEDIA_CODE); 4372 free(tm, M_DEVBUF); 4373 } 4374 } 4375 4376 /* 4377 * XXX Autosense not yet supported. 4378 */ 4379 4380 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset + 4381 TULIP_ROM_IL_SELECT_CONN_TYPE); 4382 switch (romdef) { 4383 case SELECT_CONN_TYPE_TP: 4384 case SELECT_CONN_TYPE_TP_AUTONEG: 4385 case SELECT_CONN_TYPE_TP_NOLINKPASS: 4386 defmedia = IFM_ETHER|IFM_10_T; 4387 break; 4388 4389 case SELECT_CONN_TYPE_TP_FDX: 4390 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX; 4391 break; 4392 4393 case SELECT_CONN_TYPE_BNC: 4394 defmedia = IFM_ETHER|IFM_10_2; 4395 break; 4396 4397 case SELECT_CONN_TYPE_AUI: 4398 defmedia = IFM_ETHER|IFM_10_5; 4399 break; 4400 #if 0 /* XXX */ 4401 case SELECT_CONN_TYPE_ASENSE: 4402 case SELECT_CONN_TYPE_ASENSE_AUTONEG: 4403 defmedia = IFM_ETHER|IFM_AUTO; 4404 break; 4405 #endif 4406 default: 4407 defmedia = 0; 4408 } 4409 4410 if (defmedia == 0) { 4411 /* 4412 * XXX We should default to auto-sense. 4413 */ 4414 defmedia = IFM_ETHER|IFM_10_T; 4415 } 4416 4417 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4418 4419 tlp_print_media(sc); 4420 } 4421 4422 /* 4423 * DECchip 2114x ISV media switch. 4424 */ 4425 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *)); 4426 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 4427 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *)); 4428 4429 const struct tulip_mediasw tlp_2114x_isv_mediasw = { 4430 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 4431 }; 4432 4433 void 4434 tlp_2114x_isv_tmsw_init(sc) 4435 struct tulip_softc *sc; 4436 { 4437 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 4438 struct ifmedia_entry *ife; 4439 struct mii_softc *phy; 4440 struct tulip_21x4x_media *tm; 4441 const struct tulip_srom_to_ifmedia *tsti; 4442 int i, devcnt, leaf_offset, m_cnt, type, length; 4443 int defmedia, miidef; 4444 u_int16_t word; 4445 u_int8_t *cp, *ncp; 4446 4447 defmedia = miidef = 0; 4448 4449 sc->sc_mii.mii_ifp = ifp; 4450 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 4451 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 4452 sc->sc_mii.mii_statchg = sc->sc_statchg; 4453 4454 /* 4455 * Ignore `instance'; we may get a mixture of SIA and MII 4456 * media, and `instance' is used to isolate or select the 4457 * PHY on the MII as appropriate. Note that duplicate media 4458 * are disallowed, so ignoring `instance' is safe. 4459 */ 4460 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange, 4461 tlp_mediastatus); 4462 4463 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4464 for (i = 0; i < devcnt; i++) { 4465 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4466 break; 4467 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4468 sc->sc_devno) 4469 break; 4470 } 4471 4472 if (i == devcnt) { 4473 printf("%s: unable to locate info leaf in SROM\n", 4474 sc->sc_dev.dv_xname); 4475 return; 4476 } 4477 4478 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4479 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4480 4481 /* XXX SELECT CONN TYPE */ 4482 4483 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4484 4485 /* 4486 * On some chips, the first thing in the Info Leaf is the 4487 * GPIO pin direction data. 4488 */ 4489 switch (sc->sc_chip) { 4490 case TULIP_CHIP_21140: 4491 case TULIP_CHIP_21140A: 4492 case TULIP_CHIP_MX98713: 4493 case TULIP_CHIP_AX88140: 4494 case TULIP_CHIP_AX88141: 4495 sc->sc_gp_dir = *cp++; 4496 break; 4497 4498 default: 4499 /* Nothing. */ 4500 } 4501 4502 /* Get the media count. */ 4503 m_cnt = *cp++; 4504 4505 for (; m_cnt != 0; cp = ncp, m_cnt--) { 4506 /* 4507 * Determine the type and length of this media block. 4508 */ 4509 if ((*cp & 0x80) == 0) { 4510 length = 4; 4511 type = TULIP_ROM_MB_21140_GPR; 4512 } else { 4513 length = (*cp++ & 0x7f) - 1; 4514 type = *cp++ & 0x3f; 4515 } 4516 4517 /* Compute the start of the next block. */ 4518 ncp = cp + length; 4519 4520 /* Now, parse the block. */ 4521 switch (type) { 4522 case TULIP_ROM_MB_21140_GPR: 4523 tlp_get_minst(sc); 4524 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR; 4525 4526 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4527 memset(tm, 0, sizeof(*tm)); 4528 4529 tm->tm_type = TULIP_ROM_MB_21140_GPR; 4530 tm->tm_get = tlp_21140_gpio_get; 4531 tm->tm_set = tlp_21140_gpio_set; 4532 4533 /* First is the media type code. */ 4534 tsti = tlp_srom_to_ifmedia(cp[0] & 4535 TULIP_ROM_MB_MEDIA_CODE); 4536 if (tsti == NULL) { 4537 /* Invalid media code. */ 4538 free(tm, M_DEVBUF); 4539 break; 4540 } 4541 4542 /* Get defaults. */ 4543 tlp_srom_media_info(sc, tsti, tm); 4544 4545 /* Next is any GPIO info for this media. */ 4546 tm->tm_gpdata = cp[1]; 4547 4548 /* 4549 * Next is a word containing OPMODE information 4550 * and info on how to detect if this media is 4551 * active. 4552 */ 4553 word = TULIP_ROM_GETW(cp, 2); 4554 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4555 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4556 tm->tm_actmask = 4557 TULIP_ROM_MB_BITPOS(word); 4558 tm->tm_actdata = 4559 (word & TULIP_ROM_MB_POLARITY) ? 4560 0 : tm->tm_actmask; 4561 } 4562 4563 ifmedia_add(&sc->sc_mii.mii_media, 4564 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4565 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4566 break; 4567 4568 case TULIP_ROM_MB_21140_MII: 4569 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII; 4570 4571 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4572 memset(tm, 0, sizeof(*tm)); 4573 4574 tm->tm_type = TULIP_ROM_MB_21140_MII; 4575 tm->tm_get = tlp_mii_getmedia; 4576 tm->tm_set = tlp_mii_setmedia; 4577 tm->tm_opmode = OPMODE_PS; 4578 4579 if (sc->sc_reset == NULL) 4580 sc->sc_reset = tlp_21140_reset; 4581 4582 /* First is the PHY number. */ 4583 tm->tm_phyno = *cp++; 4584 4585 /* Next is the MII select sequence length and offset. */ 4586 tm->tm_gp_length = *cp++; 4587 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4588 cp += tm->tm_gp_length; 4589 4590 /* Next is the MII reset sequence length and offset. */ 4591 tm->tm_reset_length = *cp++; 4592 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4593 cp += tm->tm_reset_length; 4594 4595 /* 4596 * The following items are left in the media block 4597 * that we don't particularly care about: 4598 * 4599 * capabilities W 4600 * advertisement W 4601 * full duplex W 4602 * tx threshold W 4603 * 4604 * These appear to be bits in the PHY registers, 4605 * which our MII code handles on its own. 4606 */ 4607 4608 /* 4609 * Before we probe the MII bus, we need to reset 4610 * it and issue the selection sequence. 4611 */ 4612 4613 /* Set the direction of the pins... */ 4614 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4615 4616 for (i = 0; i < tm->tm_reset_length; i++) { 4617 delay(10); 4618 TULIP_WRITE(sc, CSR_GPP, 4619 sc->sc_srom[tm->tm_reset_offset + i]); 4620 } 4621 4622 for (i = 0; i < tm->tm_gp_length; i++) { 4623 delay(10); 4624 TULIP_WRITE(sc, CSR_GPP, 4625 sc->sc_srom[tm->tm_gp_offset + i]); 4626 } 4627 4628 /* If there were no sequences, just lower the pins. */ 4629 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4630 delay(10); 4631 TULIP_WRITE(sc, CSR_GPP, 0); 4632 } 4633 4634 /* 4635 * Now, probe the MII for the PHY. Note, we know 4636 * the location of the PHY on the bus, but we don't 4637 * particularly care; the MII code just likes to 4638 * search the whole thing anyhow. 4639 */ 4640 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4641 MII_PHY_ANY, tm->tm_phyno, 0); 4642 4643 /* 4644 * Now, search for the PHY we hopefully just 4645 * configured. If it's not configured into the 4646 * kernel, we lose. The PHY's default media always 4647 * takes priority. 4648 */ 4649 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4650 phy != NULL; 4651 phy = LIST_NEXT(phy, mii_list)) 4652 if (phy->mii_offset == tm->tm_phyno) 4653 break; 4654 if (phy == NULL) { 4655 printf("%s: unable to configure MII\n", 4656 sc->sc_dev.dv_xname); 4657 break; 4658 } 4659 4660 sc->sc_flags |= TULIPF_HAS_MII; 4661 sc->sc_tick = tlp_mii_tick; 4662 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4663 phy->mii_inst); 4664 4665 /* 4666 * Okay, now that we've found the PHY and the MII 4667 * layer has added all of the media associated 4668 * with that PHY, we need to traverse the media 4669 * list, and add our `tm' to each entry's `aux' 4670 * pointer. 4671 * 4672 * We do this by looking for media with our 4673 * PHY's `instance'. 4674 */ 4675 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4676 ife != NULL; 4677 ife = TAILQ_NEXT(ife, ifm_list)) { 4678 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4679 continue; 4680 ife->ifm_aux = tm; 4681 } 4682 break; 4683 4684 case TULIP_ROM_MB_21142_SIA: 4685 tlp_get_minst(sc); 4686 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA; 4687 4688 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4689 memset(tm, 0, sizeof(*tm)); 4690 4691 tm->tm_type = TULIP_ROM_MB_21142_SIA; 4692 tm->tm_get = tlp_sia_get; 4693 tm->tm_set = tlp_sia_set; 4694 4695 /* First is the media type code. */ 4696 tsti = tlp_srom_to_ifmedia(cp[0] & 4697 TULIP_ROM_MB_MEDIA_CODE); 4698 if (tsti == NULL) { 4699 /* Invalid media code. */ 4700 free(tm, M_DEVBUF); 4701 break; 4702 } 4703 4704 /* Get defaults. */ 4705 tlp_srom_media_info(sc, tsti, tm); 4706 4707 /* 4708 * Override our default SIA settings if the 4709 * SROM contains its own. 4710 */ 4711 if (cp[0] & 0x40) { 4712 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1); 4713 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3); 4714 tm->tm_siagen = TULIP_ROM_GETW(cp, 5); 4715 cp += 7; 4716 } else 4717 cp++; 4718 4719 /* Next is GPIO control/data. */ 4720 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0); 4721 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2); 4722 4723 ifmedia_add(&sc->sc_mii.mii_media, 4724 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4725 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4726 break; 4727 4728 case TULIP_ROM_MB_21142_MII: 4729 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII; 4730 4731 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4732 memset(tm, 0, sizeof(*tm)); 4733 4734 tm->tm_type = TULIP_ROM_MB_21142_MII; 4735 tm->tm_get = tlp_mii_getmedia; 4736 tm->tm_set = tlp_mii_setmedia; 4737 tm->tm_opmode = OPMODE_PS; 4738 4739 if (sc->sc_reset == NULL) 4740 sc->sc_reset = tlp_21142_reset; 4741 4742 /* First is the PHY number. */ 4743 tm->tm_phyno = *cp++; 4744 4745 /* Next is the MII select sequence length and offset. */ 4746 tm->tm_gp_length = *cp++; 4747 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4748 cp += tm->tm_gp_length * 2; 4749 4750 /* Next is the MII reset sequence length and offset. */ 4751 tm->tm_reset_length = *cp++; 4752 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4753 cp += tm->tm_reset_length * 2; 4754 4755 /* 4756 * The following items are left in the media block 4757 * that we don't particularly care about: 4758 * 4759 * capabilities W 4760 * advertisement W 4761 * full duplex W 4762 * tx threshold W 4763 * MII interrupt W 4764 * 4765 * These appear to be bits in the PHY registers, 4766 * which our MII code handles on its own. 4767 */ 4768 4769 /* 4770 * Before we probe the MII bus, we need to reset 4771 * it and issue the selection sequence. 4772 */ 4773 4774 ncp = &sc->sc_srom[tm->tm_reset_offset]; 4775 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 4776 delay(10); 4777 TULIP_WRITE(sc, CSR_SIAGEN, 4778 TULIP_ROM_GETW(ncp, 0) << 16); 4779 } 4780 4781 ncp = &sc->sc_srom[tm->tm_gp_offset]; 4782 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 4783 delay(10); 4784 TULIP_WRITE(sc, CSR_SIAGEN, 4785 TULIP_ROM_GETW(ncp, 0) << 16); 4786 } 4787 4788 /* If there were no sequences, just lower the pins. */ 4789 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4790 delay(10); 4791 TULIP_WRITE(sc, CSR_SIAGEN, 0); 4792 } 4793 4794 /* 4795 * Now, probe the MII for the PHY. Note, we know 4796 * the location of the PHY on the bus, but we don't 4797 * particularly care; the MII code just likes to 4798 * search the whole thing anyhow. 4799 */ 4800 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4801 MII_PHY_ANY, tm->tm_phyno, 0); 4802 4803 /* 4804 * Now, search for the PHY we hopefully just 4805 * configured. If it's not configured into the 4806 * kernel, we lose. The PHY's default media always 4807 * takes priority. 4808 */ 4809 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4810 phy != NULL; 4811 phy = LIST_NEXT(phy, mii_list)) 4812 if (phy->mii_offset == tm->tm_phyno) 4813 break; 4814 if (phy == NULL) { 4815 printf("%s: unable to configure MII\n", 4816 sc->sc_dev.dv_xname); 4817 break; 4818 } 4819 4820 sc->sc_flags |= TULIPF_HAS_MII; 4821 sc->sc_tick = tlp_mii_tick; 4822 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4823 phy->mii_inst); 4824 4825 /* 4826 * Okay, now that we've found the PHY and the MII 4827 * layer has added all of the media associated 4828 * with that PHY, we need to traverse the media 4829 * list, and add our `tm' to each entry's `aux' 4830 * pointer. 4831 * 4832 * We do this by looking for media with our 4833 * PHY's `instance'. 4834 */ 4835 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4836 ife != NULL; 4837 ife = TAILQ_NEXT(ife, ifm_list)) { 4838 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4839 continue; 4840 ife->ifm_aux = tm; 4841 } 4842 break; 4843 4844 case TULIP_ROM_MB_21143_SYM: 4845 tlp_get_minst(sc); 4846 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM; 4847 4848 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4849 memset(tm, 0, sizeof(*tm)); 4850 4851 tm->tm_type = TULIP_ROM_MB_21143_SYM; 4852 tm->tm_get = tlp_sia_get; 4853 tm->tm_set = tlp_sia_set; 4854 4855 /* First is the media type code. */ 4856 tsti = tlp_srom_to_ifmedia(cp[0] & 4857 TULIP_ROM_MB_MEDIA_CODE); 4858 if (tsti == NULL) { 4859 /* Invalid media code. */ 4860 free(tm, M_DEVBUF); 4861 break; 4862 } 4863 4864 /* Get defaults. */ 4865 tlp_srom_media_info(sc, tsti, tm); 4866 4867 /* Next is GPIO control/data. */ 4868 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1); 4869 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3); 4870 4871 /* 4872 * Next is a word containing OPMODE information 4873 * and info on how to detect if this media is 4874 * active. 4875 */ 4876 word = TULIP_ROM_GETW(cp, 5); 4877 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4878 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4879 tm->tm_actmask = 4880 TULIP_ROM_MB_BITPOS(word); 4881 tm->tm_actdata = 4882 (word & TULIP_ROM_MB_POLARITY) ? 4883 0 : tm->tm_actmask; 4884 } 4885 4886 ifmedia_add(&sc->sc_mii.mii_media, 4887 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4888 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4889 break; 4890 4891 case TULIP_ROM_MB_21143_RESET: 4892 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname); 4893 break; 4894 4895 default: 4896 printf("%s: unknown ISV media block type 0x%02x\n", 4897 sc->sc_dev.dv_xname, type); 4898 } 4899 } 4900 4901 /* 4902 * Deal with the case where no media is configured. 4903 */ 4904 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) { 4905 printf("%s: no media found!\n", sc->sc_dev.dv_xname); 4906 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 4907 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 4908 return; 4909 } 4910 4911 /* 4912 * Pick the default media. 4913 */ 4914 if (miidef != 0) 4915 defmedia = miidef; 4916 else { 4917 /* 4918 * XXX Pick a better default. Should come from SROM 4919 * XXX on 21140[A], and should be "auto" on 21142, 4920 * XXX 21143, and Macronix chips. 4921 */ 4922 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0); 4923 } 4924 4925 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4926 4927 /* 4928 * Display any non-MII media we've located. 4929 */ 4930 if (sc->sc_media_seen & 4931 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII))) 4932 tlp_print_media(sc); 4933 4934 tlp_sia_fixup(sc); 4935 } 4936 4937 void 4938 tlp_2114x_isv_tmsw_get(sc, ifmr) 4939 struct tulip_softc *sc; 4940 struct ifmediareq *ifmr; 4941 { 4942 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4943 struct tulip_21x4x_media *tm = ife->ifm_aux; 4944 4945 /* 4946 * We might be polling a non-MII autosense; check for that. 4947 */ 4948 if (tm == NULL) { 4949 #ifdef DIAGNOSTIC 4950 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4951 panic("tlp_2114x_isv_tmsw_get"); 4952 #endif 4953 tm = sc->sc_nway_active->ifm_aux; 4954 } 4955 4956 (*tm->tm_get)(sc, ifmr); 4957 } 4958 4959 int 4960 tlp_2114x_isv_tmsw_set(sc) 4961 struct tulip_softc *sc; 4962 { 4963 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4964 struct tulip_21x4x_media *tm = ife->ifm_aux; 4965 4966 /* 4967 * We might be setting a non-MII autosense; check for that. 4968 */ 4969 if (tm == NULL) { 4970 #ifdef DIAGNOSTIC 4971 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4972 panic("tlp_2114x_isv_tmsw_set"); 4973 #endif 4974 /* XXX XXX XXX */ 4975 } 4976 4977 /* 4978 * Check to see if we need to reset the chip, and do it. The 4979 * reset path will get the OPMODE register right the next 4980 * time through. 4981 */ 4982 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode)) 4983 return (tlp_init(&sc->sc_ethercom.ec_if)); 4984 4985 return ((*tm->tm_set)(sc)); 4986 } 4987 4988 /* 4989 * MII-on-SIO media switch. Handles only MII attached to the SIO. 4990 */ 4991 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 4992 4993 const struct tulip_mediasw tlp_sio_mii_mediasw = { 4994 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 4995 }; 4996 4997 void 4998 tlp_sio_mii_tmsw_init(sc) 4999 struct tulip_softc *sc; 5000 { 5001 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5002 5003 /* 5004 * We don't attach any media info structures to the ifmedia 5005 * entries, so if we're using a pre-init function that needs 5006 * that info, override it to one that doesn't. 5007 */ 5008 if (sc->sc_preinit == tlp_2114x_preinit) 5009 sc->sc_preinit = tlp_2114x_mii_preinit; 5010 5011 sc->sc_mii.mii_ifp = ifp; 5012 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5013 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5014 sc->sc_mii.mii_statchg = sc->sc_statchg; 5015 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5016 tlp_mediastatus); 5017 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5018 MII_OFFSET_ANY, 0); 5019 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5020 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5021 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5022 } else { 5023 sc->sc_flags |= TULIPF_HAS_MII; 5024 sc->sc_tick = tlp_mii_tick; 5025 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5026 } 5027 } 5028 5029 /* 5030 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 5031 */ 5032 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 5033 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 5034 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 5035 5036 const struct tulip_mediasw tlp_pnic_mediasw = { 5037 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 5038 }; 5039 5040 void tlp_pnic_nway_statchg __P((struct device *)); 5041 void tlp_pnic_nway_tick __P((void *)); 5042 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 5043 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 5044 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 5045 void tlp_pnic_nway_auto_timeout __P((void *)); 5046 void tlp_pnic_nway_status __P((struct tulip_softc *)); 5047 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 5048 5049 void 5050 tlp_pnic_tmsw_init(sc) 5051 struct tulip_softc *sc; 5052 { 5053 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5054 const char *sep = ""; 5055 5056 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 5057 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 5058 5059 sc->sc_mii.mii_ifp = ifp; 5060 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 5061 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 5062 sc->sc_mii.mii_statchg = sc->sc_statchg; 5063 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5064 tlp_mediastatus); 5065 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5066 MII_OFFSET_ANY, 0); 5067 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5068 /* XXX What about AUI/BNC support? */ 5069 printf("%s: ", sc->sc_dev.dv_xname); 5070 5071 tlp_pnic_nway_reset(sc); 5072 5073 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 5074 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 5075 PRINT("10baseT"); 5076 5077 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 5078 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 5079 PRINT("10baseT-FDX"); 5080 5081 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 5082 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 5083 PRINT("100baseTX"); 5084 5085 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 5086 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 5087 PNIC_NWAY_CAP100TXFDX); 5088 PRINT("100baseTX-FDX"); 5089 5090 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 5091 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 5092 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 5093 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 5094 PRINT("auto"); 5095 5096 printf("\n"); 5097 5098 sc->sc_statchg = tlp_pnic_nway_statchg; 5099 sc->sc_tick = tlp_pnic_nway_tick; 5100 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5101 } else { 5102 sc->sc_flags |= TULIPF_HAS_MII; 5103 sc->sc_tick = tlp_mii_tick; 5104 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5105 } 5106 5107 #undef ADD 5108 #undef PRINT 5109 } 5110 5111 void 5112 tlp_pnic_tmsw_get(sc, ifmr) 5113 struct tulip_softc *sc; 5114 struct ifmediareq *ifmr; 5115 { 5116 struct mii_data *mii = &sc->sc_mii; 5117 5118 if (sc->sc_flags & TULIPF_HAS_MII) 5119 tlp_mii_getmedia(sc, ifmr); 5120 else { 5121 mii->mii_media_status = 0; 5122 mii->mii_media_active = IFM_NONE; 5123 tlp_pnic_nway_service(sc, MII_POLLSTAT); 5124 ifmr->ifm_status = sc->sc_mii.mii_media_status; 5125 ifmr->ifm_active = sc->sc_mii.mii_media_active; 5126 } 5127 } 5128 5129 int 5130 tlp_pnic_tmsw_set(sc) 5131 struct tulip_softc *sc; 5132 { 5133 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5134 struct mii_data *mii = &sc->sc_mii; 5135 5136 if (sc->sc_flags & TULIPF_HAS_MII) { 5137 /* 5138 * Make sure the built-in Tx jabber timer is disabled. 5139 */ 5140 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 5141 5142 return (tlp_mii_setmedia(sc)); 5143 } 5144 5145 if (ifp->if_flags & IFF_UP) { 5146 mii->mii_media_status = 0; 5147 mii->mii_media_active = IFM_NONE; 5148 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 5149 } 5150 5151 return (0); 5152 } 5153 5154 void 5155 tlp_pnic_nway_statchg(self) 5156 struct device *self; 5157 { 5158 struct tulip_softc *sc = (struct tulip_softc *)self; 5159 5160 /* Idle the transmit and receive processes. */ 5161 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 5162 5163 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 5164 OPMODE_SCR|OPMODE_HBD); 5165 5166 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 5167 sc->sc_opmode |= OPMODE_TTM; 5168 TULIP_WRITE(sc, CSR_GPP, 5169 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 5170 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5171 } else { 5172 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD; 5173 TULIP_WRITE(sc, CSR_GPP, 5174 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 5175 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5176 } 5177 5178 if (sc->sc_mii.mii_media_active & IFM_FDX) 5179 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 5180 5181 /* 5182 * Write new OPMODE bits. This also restarts the transmit 5183 * and receive processes. 5184 */ 5185 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 5186 } 5187 5188 void 5189 tlp_pnic_nway_tick(arg) 5190 void *arg; 5191 { 5192 struct tulip_softc *sc = arg; 5193 int s; 5194 5195 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 5196 return; 5197 5198 s = splnet(); 5199 tlp_pnic_nway_service(sc, MII_TICK); 5200 splx(s); 5201 5202 callout_reset(&sc->sc_tick_callout, hz, tlp_pnic_nway_tick, sc); 5203 } 5204 5205 /* 5206 * Support for the Lite-On PNIC internal NWay block. This is constructed 5207 * somewhat like a PHY driver for simplicity. 5208 */ 5209 5210 int 5211 tlp_pnic_nway_service(sc, cmd) 5212 struct tulip_softc *sc; 5213 int cmd; 5214 { 5215 struct mii_data *mii = &sc->sc_mii; 5216 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5217 5218 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 5219 return (0); 5220 5221 switch (cmd) { 5222 case MII_POLLSTAT: 5223 /* Nothing special to do here. */ 5224 break; 5225 5226 case MII_MEDIACHG: 5227 switch (IFM_SUBTYPE(ife->ifm_media)) { 5228 case IFM_AUTO: 5229 (void) tlp_pnic_nway_auto(sc, 1); 5230 break; 5231 case IFM_100_T4: 5232 /* 5233 * XXX Not supported as a manual setting right now. 5234 */ 5235 return (EINVAL); 5236 default: 5237 /* 5238 * NWAY register data is stored in the ifmedia entry. 5239 */ 5240 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5241 } 5242 break; 5243 5244 case MII_TICK: 5245 /* 5246 * Only used for autonegotiation. 5247 */ 5248 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 5249 return (0); 5250 5251 /* 5252 * Check to see if we have link. If we do, we don't 5253 * need to restart the autonegotiation process. 5254 */ 5255 if (sc->sc_flags & TULIPF_LINK_UP) 5256 return (0); 5257 5258 /* 5259 * Only retry autonegotiation every 5 seconds. 5260 */ 5261 if (++sc->sc_nway_ticks != 5) 5262 return (0); 5263 5264 sc->sc_nway_ticks = 0; 5265 tlp_pnic_nway_reset(sc); 5266 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 5267 return (0); 5268 break; 5269 } 5270 5271 /* Update the media status. */ 5272 tlp_pnic_nway_status(sc); 5273 5274 /* Callback if something changed. */ 5275 if ((sc->sc_nway_active == NULL || 5276 sc->sc_nway_active->ifm_media != mii->mii_media_active) || 5277 cmd == MII_MEDIACHG) { 5278 (*sc->sc_statchg)(&sc->sc_dev); 5279 tlp_nway_activate(sc, mii->mii_media_active); 5280 } 5281 return (0); 5282 } 5283 5284 void 5285 tlp_pnic_nway_reset(sc) 5286 struct tulip_softc *sc; 5287 { 5288 5289 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 5290 delay(100); 5291 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 5292 } 5293 5294 int 5295 tlp_pnic_nway_auto(sc, waitfor) 5296 struct tulip_softc *sc; 5297 int waitfor; 5298 { 5299 struct mii_data *mii = &sc->sc_mii; 5300 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5301 u_int32_t reg; 5302 int i; 5303 5304 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 5305 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5306 5307 if (waitfor) { 5308 /* Wait 500ms for it to complete. */ 5309 for (i = 0; i < 500; i++) { 5310 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5311 if (reg & PNIC_NWAY_LPAR_MASK) { 5312 tlp_pnic_nway_acomp(sc); 5313 return (0); 5314 } 5315 delay(1000); 5316 } 5317 #if 0 5318 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5319 printf("%s: autonegotiation failed to complete\n", 5320 sc->sc_dev.dv_xname); 5321 #endif 5322 5323 /* 5324 * Don't need to worry about clearing DOINGAUTO. 5325 * If that's set, a timeout is pending, and it will 5326 * clear the flag. 5327 */ 5328 return (EIO); 5329 } 5330 5331 /* 5332 * Just let it finish asynchronously. This is for the benefit of 5333 * the tick handler driving autonegotiation. Don't want 500ms 5334 * delays all the time while the system is running! 5335 */ 5336 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 5337 sc->sc_flags |= TULIPF_DOINGAUTO; 5338 callout_reset(&sc->sc_nway_callout, hz >> 1, 5339 tlp_pnic_nway_auto_timeout, sc); 5340 } 5341 return (EJUSTRETURN); 5342 } 5343 5344 void 5345 tlp_pnic_nway_auto_timeout(arg) 5346 void *arg; 5347 { 5348 struct tulip_softc *sc = arg; 5349 u_int32_t reg; 5350 int s; 5351 5352 s = splnet(); 5353 sc->sc_flags &= ~TULIPF_DOINGAUTO; 5354 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5355 #if 0 5356 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5357 printf("%s: autonegotiation failed to complete\n", 5358 sc->sc_dev.dv_xname); 5359 #endif 5360 5361 tlp_pnic_nway_acomp(sc); 5362 5363 /* Update the media status. */ 5364 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 5365 splx(s); 5366 } 5367 5368 void 5369 tlp_pnic_nway_status(sc) 5370 struct tulip_softc *sc; 5371 { 5372 struct mii_data *mii = &sc->sc_mii; 5373 u_int32_t reg; 5374 5375 mii->mii_media_status = IFM_AVALID; 5376 mii->mii_media_active = IFM_ETHER; 5377 5378 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5379 5380 if (sc->sc_flags & TULIPF_LINK_UP) 5381 mii->mii_media_status |= IFM_ACTIVE; 5382 5383 if (reg & PNIC_NWAY_NW) { 5384 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 5385 /* Erg, still trying, I guess... */ 5386 mii->mii_media_active |= IFM_NONE; 5387 return; 5388 } 5389 5390 #if 0 5391 if (reg & PNIC_NWAY_LPAR100T4) 5392 mii->mii_media_active |= IFM_100_T4; 5393 else 5394 #endif 5395 if (reg & PNIC_NWAY_LPAR100TXFDX) 5396 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 5397 else if (reg & PNIC_NWAY_LPAR100TX) 5398 mii->mii_media_active |= IFM_100_TX; 5399 else if (reg & PNIC_NWAY_LPAR10TFDX) 5400 mii->mii_media_active |= IFM_10_T|IFM_FDX; 5401 else if (reg & PNIC_NWAY_LPAR10T) 5402 mii->mii_media_active |= IFM_10_T; 5403 else 5404 mii->mii_media_active |= IFM_NONE; 5405 } else { 5406 if (reg & PNIC_NWAY_100) 5407 mii->mii_media_active |= IFM_100_TX; 5408 else 5409 mii->mii_media_active |= IFM_10_T; 5410 if (reg & PNIC_NWAY_FD) 5411 mii->mii_media_active |= IFM_FDX; 5412 } 5413 } 5414 5415 void 5416 tlp_pnic_nway_acomp(sc) 5417 struct tulip_softc *sc; 5418 { 5419 u_int32_t reg; 5420 5421 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5422 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 5423 5424 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 5425 reg |= PNIC_NWAY_100; 5426 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 5427 reg |= PNIC_NWAY_FD; 5428 5429 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 5430 } 5431 5432 /* 5433 * Macronix PMAC and Lite-On PNIC-II media switch: 5434 * 5435 * MX98713 and MX98713A 21140-like MII or GPIO media. 5436 * 5437 * MX98713A 21143-like MII or SIA/SYM media. 5438 * 5439 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media. 5440 * 82C115, MX98715AEC-C, -E 5441 * 5442 * So, what we do here is fake MII-on-SIO or ISV media info, and 5443 * use the ISV media switch get/set functions to handle the rest. 5444 */ 5445 5446 void tlp_pmac_tmsw_init __P((struct tulip_softc *)); 5447 5448 const struct tulip_mediasw tlp_pmac_mediasw = { 5449 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 5450 }; 5451 5452 const struct tulip_mediasw tlp_pmac_mii_mediasw = { 5453 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5454 }; 5455 5456 void 5457 tlp_pmac_tmsw_init(sc) 5458 struct tulip_softc *sc; 5459 { 5460 static const u_int8_t media[] = { 5461 TULIP_ROM_MB_MEDIA_TP, 5462 TULIP_ROM_MB_MEDIA_TP_FDX, 5463 TULIP_ROM_MB_MEDIA_100TX, 5464 TULIP_ROM_MB_MEDIA_100TX_FDX, 5465 }; 5466 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5467 5468 sc->sc_mii.mii_ifp = ifp; 5469 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5470 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5471 sc->sc_mii.mii_statchg = sc->sc_statchg; 5472 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5473 tlp_mediastatus); 5474 if (sc->sc_chip == TULIP_CHIP_MX98713 || 5475 sc->sc_chip == TULIP_CHIP_MX98713A) { 5476 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 5477 MII_PHY_ANY, MII_OFFSET_ANY, 0); 5478 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) { 5479 sc->sc_flags |= TULIPF_HAS_MII; 5480 sc->sc_tick = tlp_mii_tick; 5481 sc->sc_preinit = tlp_2114x_mii_preinit; 5482 sc->sc_mediasw = &tlp_pmac_mii_mediasw; 5483 ifmedia_set(&sc->sc_mii.mii_media, 5484 IFM_ETHER|IFM_AUTO); 5485 return; 5486 } 5487 } 5488 5489 switch (sc->sc_chip) { 5490 case TULIP_CHIP_MX98713: 5491 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR, 5492 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4); 5493 5494 /* 5495 * XXX Should implement auto-sense for this someday, 5496 * XXX when we do the same for the 21140. 5497 */ 5498 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5499 break; 5500 5501 default: 5502 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA, 5503 tlp_sia_get, tlp_sia_set, media, 2); 5504 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM, 5505 tlp_sia_get, tlp_sia_set, media + 2, 2); 5506 5507 /* 5508 * XXX Autonegotiation not yet supported. 5509 */ 5510 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5511 break; 5512 } 5513 5514 tlp_print_media(sc); 5515 tlp_sia_fixup(sc); 5516 5517 /* Set the LED modes. */ 5518 tlp_pmac_reset(sc); 5519 5520 sc->sc_reset = tlp_pmac_reset; 5521 } 5522 5523 /* 5524 * ADMtek AL981 media switch. Only has internal PHY. 5525 */ 5526 void tlp_al981_tmsw_init __P((struct tulip_softc *)); 5527 5528 const struct tulip_mediasw tlp_al981_mediasw = { 5529 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5530 }; 5531 5532 void 5533 tlp_al981_tmsw_init(sc) 5534 struct tulip_softc *sc; 5535 { 5536 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5537 5538 sc->sc_mii.mii_ifp = ifp; 5539 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg; 5540 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg; 5541 sc->sc_mii.mii_statchg = sc->sc_statchg; 5542 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5543 tlp_mediastatus); 5544 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5545 MII_OFFSET_ANY, 0); 5546 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5547 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5548 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5549 } else { 5550 sc->sc_flags |= TULIPF_HAS_MII; 5551 sc->sc_tick = tlp_mii_tick; 5552 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5553 } 5554 } 5555 5556 /* 5557 * Davicom DM9102 media switch. Internal PHY and possibly HomePNA. 5558 */ 5559 void tlp_dm9102_tmsw_init __P((struct tulip_softc *)); 5560 void tlp_dm9102_tmsw_getmedia __P((struct tulip_softc *, 5561 struct ifmediareq *)); 5562 int tlp_dm9102_tmsw_setmedia __P((struct tulip_softc *)); 5563 5564 const struct tulip_mediasw tlp_dm9102_mediasw = { 5565 tlp_dm9102_tmsw_init, tlp_dm9102_tmsw_getmedia, 5566 tlp_dm9102_tmsw_setmedia 5567 }; 5568 5569 void 5570 tlp_dm9102_tmsw_init(sc) 5571 struct tulip_softc *sc; 5572 { 5573 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5574 u_int32_t opmode; 5575 5576 sc->sc_mii.mii_ifp = ifp; 5577 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5578 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5579 sc->sc_mii.mii_statchg = sc->sc_statchg; 5580 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5581 tlp_mediastatus); 5582 5583 /* PHY block already reset via tlp_reset(). */ 5584 5585 /* 5586 * Configure OPMODE properly for the internal MII interface. 5587 */ 5588 switch (sc->sc_chip) { 5589 case TULIP_CHIP_DM9102: 5590 opmode = OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 5591 break; 5592 5593 case TULIP_CHIP_DM9102A: 5594 opmode = OPMODE_MBO|OPMODE_HBD; 5595 break; 5596 5597 default: 5598 /* Nothing. */ 5599 } 5600 5601 TULIP_WRITE(sc, CSR_OPMODE, opmode); 5602 5603 /* Now, probe the internal MII for the internal PHY. */ 5604 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5605 MII_OFFSET_ANY, 0); 5606 5607 /* 5608 * XXX Figure out what to do about the HomePNA portion 5609 * XXX of the DM9102A. 5610 */ 5611 5612 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5613 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5614 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5615 } else { 5616 sc->sc_flags |= TULIPF_HAS_MII; 5617 sc->sc_tick = tlp_mii_tick; 5618 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5619 } 5620 } 5621 5622 void 5623 tlp_dm9102_tmsw_getmedia(sc, ifmr) 5624 struct tulip_softc *sc; 5625 struct ifmediareq *ifmr; 5626 { 5627 5628 /* XXX HomePNA on DM9102A. */ 5629 tlp_mii_getmedia(sc, ifmr); 5630 } 5631 5632 int 5633 tlp_dm9102_tmsw_setmedia(sc) 5634 struct tulip_softc *sc; 5635 { 5636 5637 /* XXX HomePNA on DM9102A. */ 5638 return (tlp_mii_setmedia(sc)); 5639 } 5640
Indexes created Fri Sep 26 08:10:20 GMT 2025