tulip.c revision 1.80
1 /* $NetBSD: tulip.c,v 1.80 2000/10/15 19:56:31 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/callout.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <machine/endian.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <net/if.h> 65 #include <net/if_dl.h> 66 #include <net/if_media.h> 67 #include <net/if_ether.h> 68 69 #if NBPFILTER > 0 70 #include <net/bpf.h> 71 #endif 72 73 #ifdef INET 74 #include <netinet/in.h> 75 #include <netinet/if_inarp.h> 76 #endif 77 78 #ifdef NS 79 #include <netns/ns.h> 80 #include <netns/ns_if.h> 81 #endif 82 83 #include <machine/bus.h> 84 #include <machine/intr.h> 85 86 #include <dev/mii/mii.h> 87 #include <dev/mii/miivar.h> 88 #include <dev/mii/mii_bitbang.h> 89 90 #include <dev/ic/tulipreg.h> 91 #include <dev/ic/tulipvar.h> 92 93 const char *tlp_chip_names[] = TULIP_CHIP_NAMES; 94 95 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = 96 TLP_TXTHRESH_TAB_10; 97 98 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = 99 TLP_TXTHRESH_TAB_10_100; 100 101 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = 102 TLP_TXTHRESH_TAB_WINB; 103 104 const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] = 105 TLP_TXTHRESH_TAB_DM9102; 106 107 void tlp_start __P((struct ifnet *)); 108 void tlp_watchdog __P((struct ifnet *)); 109 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 110 int tlp_init __P((struct ifnet *)); 111 void tlp_stop __P((struct ifnet *, int)); 112 113 void tlp_shutdown __P((void *)); 114 115 void tlp_reset __P((struct tulip_softc *)); 116 void tlp_rxdrain __P((struct tulip_softc *)); 117 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 118 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 119 void tlp_srom_idle __P((struct tulip_softc *)); 120 int tlp_srom_size __P((struct tulip_softc *)); 121 122 int tlp_enable __P((struct tulip_softc *)); 123 void tlp_disable __P((struct tulip_softc *)); 124 void tlp_power __P((int, void *)); 125 126 void tlp_filter_setup __P((struct tulip_softc *)); 127 void tlp_winb_filter_setup __P((struct tulip_softc *)); 128 void tlp_al981_filter_setup __P((struct tulip_softc *)); 129 130 void tlp_rxintr __P((struct tulip_softc *)); 131 void tlp_txintr __P((struct tulip_softc *)); 132 133 void tlp_mii_tick __P((void *)); 134 void tlp_mii_statchg __P((struct device *)); 135 void tlp_winb_mii_statchg __P((struct device *)); 136 void tlp_dm9102_mii_statchg __P((struct device *)); 137 138 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 139 int tlp_mii_setmedia __P((struct tulip_softc *)); 140 141 int tlp_bitbang_mii_readreg __P((struct device *, int, int)); 142 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int)); 143 144 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 145 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 146 147 int tlp_al981_mii_readreg __P((struct device *, int, int)); 148 void tlp_al981_mii_writereg __P((struct device *, int, int, int)); 149 150 void tlp_2114x_preinit __P((struct tulip_softc *)); 151 void tlp_2114x_mii_preinit __P((struct tulip_softc *)); 152 void tlp_pnic_preinit __P((struct tulip_softc *)); 153 void tlp_dm9102_preinit __P((struct tulip_softc *)); 154 155 void tlp_21140_reset __P((struct tulip_softc *)); 156 void tlp_21142_reset __P((struct tulip_softc *)); 157 void tlp_pmac_reset __P((struct tulip_softc *)); 158 void tlp_dm9102_reset __P((struct tulip_softc *)); 159 160 #define tlp_mchash(addr, sz) \ 161 (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1)) 162 163 /* 164 * MII bit-bang glue. 165 */ 166 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *)); 167 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t)); 168 169 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = { 170 tlp_sio_mii_bitbang_read, 171 tlp_sio_mii_bitbang_write, 172 { 173 MIIROM_MDO, /* MII_BIT_MDO */ 174 MIIROM_MDI, /* MII_BIT_MDI */ 175 MIIROM_MDC, /* MII_BIT_MDC */ 176 0, /* MII_BIT_DIR_HOST_PHY */ 177 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */ 178 } 179 }; 180 181 #ifdef TLP_DEBUG 182 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 183 printf x 184 #else 185 #define DPRINTF(sc, x) /* nothing */ 186 #endif 187 188 #ifdef TLP_STATS 189 void tlp_print_stats __P((struct tulip_softc *)); 190 #endif 191 192 /* 193 * Can be used to debug the SROM-related things, including contents. 194 * Initialized so that it's patchable. 195 */ 196 int tlp_srom_debug = 0; 197 198 /* 199 * tlp_attach: 200 * 201 * Attach a Tulip interface to the system. 202 */ 203 void 204 tlp_attach(sc, enaddr) 205 struct tulip_softc *sc; 206 const u_int8_t *enaddr; 207 { 208 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 209 int i, error; 210 211 callout_init(&sc->sc_nway_callout); 212 callout_init(&sc->sc_tick_callout); 213 214 /* 215 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 216 */ 217 218 /* 219 * Setup the transmit threshold table. 220 */ 221 switch (sc->sc_chip) { 222 case TULIP_CHIP_DE425: 223 case TULIP_CHIP_21040: 224 case TULIP_CHIP_21041: 225 sc->sc_txth = tlp_10_txthresh_tab; 226 break; 227 228 case TULIP_CHIP_DM9102: 229 case TULIP_CHIP_DM9102A: 230 sc->sc_txth = tlp_dm9102_txthresh_tab; 231 break; 232 233 default: 234 sc->sc_txth = tlp_10_100_txthresh_tab; 235 break; 236 } 237 238 /* 239 * Setup the filter setup function. 240 */ 241 switch (sc->sc_chip) { 242 case TULIP_CHIP_WB89C840F: 243 sc->sc_filter_setup = tlp_winb_filter_setup; 244 break; 245 246 case TULIP_CHIP_AL981: 247 case TULIP_CHIP_AN983: 248 case TULIP_CHIP_AN985: 249 sc->sc_filter_setup = tlp_al981_filter_setup; 250 break; 251 252 default: 253 sc->sc_filter_setup = tlp_filter_setup; 254 break; 255 } 256 257 /* 258 * Set up the media status change function. 259 */ 260 switch (sc->sc_chip) { 261 case TULIP_CHIP_WB89C840F: 262 sc->sc_statchg = tlp_winb_mii_statchg; 263 break; 264 265 case TULIP_CHIP_DM9102: 266 case TULIP_CHIP_DM9102A: 267 sc->sc_statchg = tlp_dm9102_mii_statchg; 268 break; 269 270 default: 271 /* 272 * We may override this if we have special media 273 * handling requirements (e.g. flipping GPIO pins). 274 * 275 * The pure-MII statchg function covers the basics. 276 */ 277 sc->sc_statchg = tlp_mii_statchg; 278 break; 279 } 280 281 /* 282 * Default to no FS|LS in setup packet descriptors. They're 283 * supposed to be zero according to the 21040 and 21143 284 * manuals, and some chips fall over badly if they're 285 * included. Yet, other chips seem to require them. Sigh. 286 */ 287 switch (sc->sc_chip) { 288 case TULIP_CHIP_X3201_3: 289 sc->sc_setup_fsls = TDCTL_Tx_FS|TDCTL_Tx_LS; 290 break; 291 292 default: 293 sc->sc_setup_fsls = 0; 294 } 295 296 /* 297 * Set up various chip-specific quirks. 298 * 299 * Note that wherever we can, we use the "ring" option for 300 * transmit and receive descriptors. This is because some 301 * clone chips apparently have problems when using chaining, 302 * although some *only* support chaining. 303 * 304 * What we do is always program the "next" pointer, and then 305 * conditionally set the TDCTL_CH and TDCTL_ER bits in the 306 * appropriate places. 307 */ 308 switch (sc->sc_chip) { 309 case TULIP_CHIP_21140: 310 case TULIP_CHIP_21140A: 311 case TULIP_CHIP_21142: 312 case TULIP_CHIP_21143: 313 case TULIP_CHIP_82C115: /* 21143-like */ 314 case TULIP_CHIP_MX98713: /* 21140-like */ 315 case TULIP_CHIP_MX98713A: /* 21143-like */ 316 case TULIP_CHIP_MX98715: /* 21143-like */ 317 case TULIP_CHIP_MX98715A: /* 21143-like */ 318 case TULIP_CHIP_MX98715AEC_X: /* 21143-like */ 319 case TULIP_CHIP_MX98725: /* 21143-like */ 320 /* 321 * Run these chips in ring mode. 322 */ 323 sc->sc_tdctl_ch = 0; 324 sc->sc_tdctl_er = TDCTL_ER; 325 sc->sc_preinit = tlp_2114x_preinit; 326 break; 327 328 case TULIP_CHIP_82C168: 329 case TULIP_CHIP_82C169: 330 /* 331 * Run these chips in ring mode. 332 */ 333 sc->sc_tdctl_ch = 0; 334 sc->sc_tdctl_er = TDCTL_ER; 335 sc->sc_preinit = tlp_pnic_preinit; 336 337 /* 338 * These chips seem to have busted DMA engines; just put them 339 * in Store-and-Forward mode from the get-go. 340 */ 341 sc->sc_txthresh = TXTH_SF; 342 break; 343 344 case TULIP_CHIP_WB89C840F: 345 /* 346 * Run this chip in chained mode. 347 */ 348 sc->sc_tdctl_ch = TDCTL_CH; 349 sc->sc_tdctl_er = 0; 350 sc->sc_flags |= TULIPF_IC_FS; 351 break; 352 353 case TULIP_CHIP_DM9102: 354 case TULIP_CHIP_DM9102A: 355 /* 356 * Run these chips in chained mode. 357 */ 358 sc->sc_tdctl_ch = TDCTL_CH; 359 sc->sc_tdctl_er = 0; 360 sc->sc_preinit = tlp_dm9102_preinit; 361 362 /* 363 * These chips have a broken bus interface, so we 364 * can't use any optimized bus commands. For this 365 * reason, we tend to underrun pretty quickly, so 366 * just to Store-and-Forward mode from the get-go. 367 */ 368 sc->sc_txthresh = TXTH_DM9102_SF; 369 break; 370 371 default: 372 /* 373 * Default to running in ring mode. 374 */ 375 sc->sc_tdctl_ch = 0; 376 sc->sc_tdctl_er = TDCTL_ER; 377 } 378 379 /* 380 * Set up the MII bit-bang operations. 381 */ 382 switch (sc->sc_chip) { 383 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */ 384 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 385 break; 386 387 default: 388 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 389 } 390 391 SIMPLEQ_INIT(&sc->sc_txfreeq); 392 SIMPLEQ_INIT(&sc->sc_txdirtyq); 393 394 /* 395 * Allocate the control data structures, and create and load the 396 * DMA map for it. 397 */ 398 if ((error = bus_dmamem_alloc(sc->sc_dmat, 399 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg, 400 1, &sc->sc_cdnseg, 0)) != 0) { 401 printf("%s: unable to allocate control data, error = %d\n", 402 sc->sc_dev.dv_xname, error); 403 goto fail_0; 404 } 405 406 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg, 407 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 408 BUS_DMA_COHERENT)) != 0) { 409 printf("%s: unable to map control data, error = %d\n", 410 sc->sc_dev.dv_xname, error); 411 goto fail_1; 412 } 413 414 if ((error = bus_dmamap_create(sc->sc_dmat, 415 sizeof(struct tulip_control_data), 1, 416 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 417 printf("%s: unable to create control data DMA map, " 418 "error = %d\n", sc->sc_dev.dv_xname, error); 419 goto fail_2; 420 } 421 422 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 423 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 424 0)) != 0) { 425 printf("%s: unable to load control data DMA map, error = %d\n", 426 sc->sc_dev.dv_xname, error); 427 goto fail_3; 428 } 429 430 /* 431 * Create the transmit buffer DMA maps. 432 * 433 * Note that on the Xircom clone, transmit buffers must be 434 * 4-byte aligned. We're almost guaranteed to have to copy 435 * the packet in that case, so we just limit ourselves to 436 * one segment. 437 * 438 * On the DM9102, the transmit logic can only handle one 439 * DMA segment. 440 */ 441 switch (sc->sc_chip) { 442 case TULIP_CHIP_X3201_3: 443 case TULIP_CHIP_DM9102: 444 case TULIP_CHIP_DM9102A: 445 sc->sc_ntxsegs = 1; 446 break; 447 448 default: 449 sc->sc_ntxsegs = TULIP_NTXSEGS; 450 } 451 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 452 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 453 sc->sc_ntxsegs, MCLBYTES, 0, 0, 454 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 455 printf("%s: unable to create tx DMA map %d, " 456 "error = %d\n", sc->sc_dev.dv_xname, i, error); 457 goto fail_4; 458 } 459 } 460 461 /* 462 * Create the recieve buffer DMA maps. 463 */ 464 for (i = 0; i < TULIP_NRXDESC; i++) { 465 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 466 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 467 printf("%s: unable to create rx DMA map %d, " 468 "error = %d\n", sc->sc_dev.dv_xname, i, error); 469 goto fail_5; 470 } 471 sc->sc_rxsoft[i].rxs_mbuf = NULL; 472 } 473 474 /* 475 * From this point forward, the attachment cannot fail. A failure 476 * before this point releases all resources that may have been 477 * allocated. 478 */ 479 sc->sc_flags |= TULIPF_ATTACHED; 480 481 /* 482 * Reset the chip to a known state. 483 */ 484 tlp_reset(sc); 485 486 /* Announce ourselves. */ 487 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 488 sc->sc_name[0] != '\0' ? sc->sc_name : "", 489 sc->sc_name[0] != '\0' ? ", " : "", 490 ether_sprintf(enaddr)); 491 492 /* 493 * Initialize our media structures. This may probe the MII, if 494 * present. 495 */ 496 (*sc->sc_mediasw->tmsw_init)(sc); 497 498 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 499 ifp->if_softc = sc; 500 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 501 ifp->if_ioctl = tlp_ioctl; 502 ifp->if_start = tlp_start; 503 ifp->if_watchdog = tlp_watchdog; 504 ifp->if_init = tlp_init; 505 ifp->if_stop = tlp_stop; 506 507 /* 508 * We can support 802.1Q VLAN-sized frames. 509 */ 510 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 511 512 /* 513 * Attach the interface. 514 */ 515 if_attach(ifp); 516 ether_ifattach(ifp, enaddr); 517 #if NBPFILTER > 0 518 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 519 sizeof(struct ether_header)); 520 #endif 521 #if NRND > 0 522 rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname, 523 RND_TYPE_NET, 0); 524 #endif 525 526 /* 527 * Make sure the interface is shutdown during reboot. 528 */ 529 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 530 if (sc->sc_sdhook == NULL) 531 printf("%s: WARNING: unable to establish shutdown hook\n", 532 sc->sc_dev.dv_xname); 533 534 /* 535 * Add a suspend hook to make sure we come back up after a 536 * resume. 537 */ 538 sc->sc_powerhook = powerhook_establish(tlp_power, sc); 539 if (sc->sc_powerhook == NULL) 540 printf("%s: WARNING: unable to establish power hook\n", 541 sc->sc_dev.dv_xname); 542 return; 543 544 /* 545 * Free any resources we've allocated during the failed attach 546 * attempt. Do this in reverse order and fall through. 547 */ 548 fail_5: 549 for (i = 0; i < TULIP_NRXDESC; i++) { 550 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 551 bus_dmamap_destroy(sc->sc_dmat, 552 sc->sc_rxsoft[i].rxs_dmamap); 553 } 554 fail_4: 555 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 556 if (sc->sc_txsoft[i].txs_dmamap != NULL) 557 bus_dmamap_destroy(sc->sc_dmat, 558 sc->sc_txsoft[i].txs_dmamap); 559 } 560 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 561 fail_3: 562 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 563 fail_2: 564 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 565 sizeof(struct tulip_control_data)); 566 fail_1: 567 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 568 fail_0: 569 return; 570 } 571 572 /* 573 * tlp_activate: 574 * 575 * Handle device activation/deactivation requests. 576 */ 577 int 578 tlp_activate(self, act) 579 struct device *self; 580 enum devact act; 581 { 582 struct tulip_softc *sc = (void *) self; 583 int s, error = 0; 584 585 s = splnet(); 586 switch (act) { 587 case DVACT_ACTIVATE: 588 error = EOPNOTSUPP; 589 break; 590 591 case DVACT_DEACTIVATE: 592 if (sc->sc_flags & TULIPF_HAS_MII) 593 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 594 MII_OFFSET_ANY); 595 if_deactivate(&sc->sc_ethercom.ec_if); 596 break; 597 } 598 splx(s); 599 600 return (error); 601 } 602 603 /* 604 * tlp_detach: 605 * 606 * Detach a Tulip interface. 607 */ 608 int 609 tlp_detach(sc) 610 struct tulip_softc *sc; 611 { 612 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 613 struct tulip_rxsoft *rxs; 614 struct tulip_txsoft *txs; 615 int i; 616 617 /* 618 * Suceed now if there isn't any work to do. 619 */ 620 if ((sc->sc_flags & TULIPF_ATTACHED) == 0) 621 return (0); 622 623 /* Unhook our tick handler. */ 624 if (sc->sc_tick) 625 callout_stop(&sc->sc_tick_callout); 626 627 if (sc->sc_flags & TULIPF_HAS_MII) { 628 /* Detach all PHYs */ 629 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 630 } 631 632 /* Delete all remaining media. */ 633 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 634 635 #if NRND > 0 636 rnd_detach_source(&sc->sc_rnd_source); 637 #endif 638 #if NBPFILTER > 0 639 bpfdetach(ifp); 640 #endif 641 ether_ifdetach(ifp); 642 if_detach(ifp); 643 644 for (i = 0; i < TULIP_NRXDESC; i++) { 645 rxs = &sc->sc_rxsoft[i]; 646 if (rxs->rxs_mbuf != NULL) { 647 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 648 m_freem(rxs->rxs_mbuf); 649 rxs->rxs_mbuf = NULL; 650 } 651 bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap); 652 } 653 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 654 txs = &sc->sc_txsoft[i]; 655 if (txs->txs_mbuf != NULL) { 656 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 657 m_freem(txs->txs_mbuf); 658 txs->txs_mbuf = NULL; 659 } 660 bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap); 661 } 662 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 663 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 664 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 665 sizeof(struct tulip_control_data)); 666 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 667 668 shutdownhook_disestablish(sc->sc_sdhook); 669 powerhook_disestablish(sc->sc_powerhook); 670 671 if (sc->sc_srom) 672 free(sc->sc_srom, M_DEVBUF); 673 674 return (0); 675 } 676 677 /* 678 * tlp_shutdown: 679 * 680 * Make sure the interface is stopped at reboot time. 681 */ 682 void 683 tlp_shutdown(arg) 684 void *arg; 685 { 686 struct tulip_softc *sc = arg; 687 688 tlp_stop(&sc->sc_ethercom.ec_if, 1); 689 } 690 691 /* 692 * tlp_start: [ifnet interface function] 693 * 694 * Start packet transmission on the interface. 695 */ 696 void 697 tlp_start(ifp) 698 struct ifnet *ifp; 699 { 700 struct tulip_softc *sc = ifp->if_softc; 701 struct mbuf *m0, *m; 702 struct tulip_txsoft *txs, *last_txs; 703 bus_dmamap_t dmamap; 704 int error, firsttx, nexttx, lasttx, ofree, seg; 705 706 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 707 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 708 709 /* 710 * If we want a filter setup, it means no more descriptors were 711 * available for the setup routine. Let it get a chance to wedge 712 * itself into the ring. 713 */ 714 if (sc->sc_flags & TULIPF_WANT_SETUP) 715 ifp->if_flags |= IFF_OACTIVE; 716 717 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 718 return; 719 720 /* 721 * Remember the previous number of free descriptors and 722 * the first descriptor we'll use. 723 */ 724 ofree = sc->sc_txfree; 725 firsttx = sc->sc_txnext; 726 727 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 728 sc->sc_dev.dv_xname, ofree, firsttx)); 729 730 /* 731 * Loop through the send queue, setting up transmit descriptors 732 * until we drain the queue, or use up all available transmit 733 * descriptors. 734 */ 735 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 736 sc->sc_txfree != 0) { 737 /* 738 * Grab a packet off the queue. 739 */ 740 IF_DEQUEUE(&ifp->if_snd, m0); 741 if (m0 == NULL) 742 break; 743 744 dmamap = txs->txs_dmamap; 745 746 /* 747 * Load the DMA map. If this fails, the packet either 748 * didn't fit in the alloted number of segments, or we were 749 * short on resources. In this case, we'll copy and try 750 * again. 751 * 752 * Note that if we're only allowed 1 Tx segment, we 753 * have an alignment restriction. Do this test before 754 * attempting to load the DMA map, because it's more 755 * likely we'll trip the alignment test than the 756 * more-than-one-segment test. 757 */ 758 if ((sc->sc_ntxsegs == 1 && (mtod(m0, bus_addr_t) & 3) != 0) || 759 bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 760 BUS_DMA_NOWAIT) != 0) { 761 MGETHDR(m, M_DONTWAIT, MT_DATA); 762 if (m == NULL) { 763 printf("%s: unable to allocate Tx mbuf\n", 764 sc->sc_dev.dv_xname); 765 IF_PREPEND(&ifp->if_snd, m0); 766 break; 767 } 768 if (m0->m_pkthdr.len > MHLEN) { 769 MCLGET(m, M_DONTWAIT); 770 if ((m->m_flags & M_EXT) == 0) { 771 printf("%s: unable to allocate Tx " 772 "cluster\n", sc->sc_dev.dv_xname); 773 m_freem(m); 774 IF_PREPEND(&ifp->if_snd, m0); 775 break; 776 } 777 } 778 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 779 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 780 m_freem(m0); 781 m0 = m; 782 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 783 m0, BUS_DMA_NOWAIT); 784 if (error) { 785 printf("%s: unable to load Tx buffer, " 786 "error = %d\n", sc->sc_dev.dv_xname, error); 787 IF_PREPEND(&ifp->if_snd, m0); 788 break; 789 } 790 } 791 792 /* 793 * Ensure we have enough descriptors free to describe 794 * the packet. 795 */ 796 if (dmamap->dm_nsegs > sc->sc_txfree) { 797 /* 798 * Not enough free descriptors to transmit this 799 * packet. We haven't committed to anything yet, 800 * so just unload the DMA map, put the packet 801 * back on the queue, and punt. Notify the upper 802 * layer that there are no more slots left. 803 * 804 * XXX We could allocate an mbuf and copy, but 805 * XXX it is worth it? 806 */ 807 ifp->if_flags |= IFF_OACTIVE; 808 bus_dmamap_unload(sc->sc_dmat, dmamap); 809 IF_PREPEND(&ifp->if_snd, m0); 810 break; 811 } 812 813 /* 814 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 815 */ 816 817 /* Sync the DMA map. */ 818 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 819 BUS_DMASYNC_PREWRITE); 820 821 /* 822 * Initialize the transmit descriptors. 823 */ 824 for (nexttx = sc->sc_txnext, seg = 0; 825 seg < dmamap->dm_nsegs; 826 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 827 /* 828 * If this is the first descriptor we're 829 * enqueueing, don't set the OWN bit just 830 * yet. That could cause a race condition. 831 * We'll do it below. 832 */ 833 sc->sc_txdescs[nexttx].td_status = 834 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN); 835 sc->sc_txdescs[nexttx].td_bufaddr1 = 836 htole32(dmamap->dm_segs[seg].ds_addr); 837 sc->sc_txdescs[nexttx].td_ctl = 838 htole32((dmamap->dm_segs[seg].ds_len << 839 TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch | 840 (nexttx == (TULIP_NTXDESC - 1) ? 841 sc->sc_tdctl_er : 0)); 842 lasttx = nexttx; 843 } 844 845 /* Set `first segment' and `last segment' appropriately. */ 846 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS); 847 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS); 848 849 #ifdef TLP_DEBUG 850 if (ifp->if_flags & IFF_DEBUG) { 851 printf(" txsoft %p transmit chain:\n", txs); 852 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 853 printf(" descriptor %d:\n", seg); 854 printf(" td_status: 0x%08x\n", 855 le32toh(sc->sc_txdescs[seg].td_status)); 856 printf(" td_ctl: 0x%08x\n", 857 le32toh(sc->sc_txdescs[seg].td_ctl)); 858 printf(" td_bufaddr1: 0x%08x\n", 859 le32toh(sc->sc_txdescs[seg].td_bufaddr1)); 860 printf(" td_bufaddr2: 0x%08x\n", 861 le32toh(sc->sc_txdescs[seg].td_bufaddr2)); 862 if (seg == lasttx) 863 break; 864 } 865 } 866 #endif 867 868 /* Sync the descriptors we're using. */ 869 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 870 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 871 872 /* 873 * Store a pointer to the packet so we can free it later, 874 * and remember what txdirty will be once the packet is 875 * done. 876 */ 877 txs->txs_mbuf = m0; 878 txs->txs_firstdesc = sc->sc_txnext; 879 txs->txs_lastdesc = lasttx; 880 txs->txs_ndescs = dmamap->dm_nsegs; 881 882 /* Advance the tx pointer. */ 883 sc->sc_txfree -= dmamap->dm_nsegs; 884 sc->sc_txnext = nexttx; 885 886 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 887 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 888 889 last_txs = txs; 890 891 #if NBPFILTER > 0 892 /* 893 * Pass the packet to any BPF listeners. 894 */ 895 if (ifp->if_bpf) 896 bpf_mtap(ifp->if_bpf, m0); 897 #endif /* NBPFILTER > 0 */ 898 } 899 900 if (txs == NULL || sc->sc_txfree == 0) { 901 /* No more slots left; notify upper layer. */ 902 ifp->if_flags |= IFF_OACTIVE; 903 } 904 905 if (sc->sc_txfree != ofree) { 906 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 907 sc->sc_dev.dv_xname, lasttx, firsttx)); 908 /* 909 * Cause a transmit interrupt to happen on the 910 * last packet we enqueued. 911 */ 912 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC); 913 TULIP_CDTXSYNC(sc, lasttx, 1, 914 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 915 916 /* 917 * Some clone chips want IC on the *first* segment in 918 * the packet. Appease them. 919 */ 920 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 921 last_txs->txs_firstdesc != lasttx) { 922 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 923 htole32(TDCTL_Tx_IC); 924 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 925 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 926 } 927 928 /* 929 * The entire packet chain is set up. Give the 930 * first descriptor to the chip now. 931 */ 932 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN); 933 TULIP_CDTXSYNC(sc, firsttx, 1, 934 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 935 936 /* Wake up the transmitter. */ 937 /* XXX USE AUTOPOLLING? */ 938 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 939 940 /* Set a watchdog timer in case the chip flakes out. */ 941 ifp->if_timer = 5; 942 } 943 } 944 945 /* 946 * tlp_watchdog: [ifnet interface function] 947 * 948 * Watchdog timer handler. 949 */ 950 void 951 tlp_watchdog(ifp) 952 struct ifnet *ifp; 953 { 954 struct tulip_softc *sc = ifp->if_softc; 955 int doing_setup, doing_transmit; 956 957 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 958 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 959 960 if (doing_setup && doing_transmit) { 961 printf("%s: filter setup and transmit timeout\n", 962 sc->sc_dev.dv_xname); 963 ifp->if_oerrors++; 964 } else if (doing_transmit) { 965 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 966 ifp->if_oerrors++; 967 } else if (doing_setup) 968 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 969 else 970 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 971 972 (void) tlp_init(ifp); 973 974 /* Try to get more packets going. */ 975 tlp_start(ifp); 976 } 977 978 /* 979 * tlp_ioctl: [ifnet interface function] 980 * 981 * Handle control requests from the operator. 982 */ 983 int 984 tlp_ioctl(ifp, cmd, data) 985 struct ifnet *ifp; 986 u_long cmd; 987 caddr_t data; 988 { 989 struct tulip_softc *sc = ifp->if_softc; 990 struct ifreq *ifr = (struct ifreq *)data; 991 int s, error; 992 993 s = splnet(); 994 995 switch (cmd) { 996 case SIOCSIFMEDIA: 997 case SIOCGIFMEDIA: 998 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 999 break; 1000 1001 default: 1002 error = ether_ioctl(ifp, cmd, data); 1003 if (error == ENETRESET) { 1004 if (TULIP_IS_ENABLED(sc)) { 1005 /* 1006 * Multicast list has changed. Set the 1007 * hardware filter accordingly. 1008 */ 1009 (*sc->sc_filter_setup)(sc); 1010 } 1011 error = 0; 1012 } 1013 break; 1014 } 1015 1016 /* Try to get more packets going. */ 1017 if (TULIP_IS_ENABLED(sc)) 1018 tlp_start(ifp); 1019 1020 splx(s); 1021 return (error); 1022 } 1023 1024 /* 1025 * tlp_intr: 1026 * 1027 * Interrupt service routine. 1028 */ 1029 int 1030 tlp_intr(arg) 1031 void *arg; 1032 { 1033 struct tulip_softc *sc = arg; 1034 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1035 u_int32_t status, rxstatus, txstatus; 1036 int handled = 0, txthresh; 1037 1038 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 1039 1040 #ifdef DEBUG 1041 if (TULIP_IS_ENABLED(sc) == 0) 1042 panic("%s: tlp_intr: not enabled\n", sc->sc_dev.dv_xname); 1043 #endif 1044 1045 /* 1046 * If the interface isn't running, the interrupt couldn't 1047 * possibly have come from us. 1048 */ 1049 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1050 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1051 return (0); 1052 1053 /* Disable interrupts on the DM9102 (interrupt edge bug). */ 1054 switch (sc->sc_chip) { 1055 case TULIP_CHIP_DM9102: 1056 case TULIP_CHIP_DM9102A: 1057 TULIP_WRITE(sc, CSR_INTEN, 0); 1058 break; 1059 1060 default: 1061 /* Nothing. */ 1062 } 1063 1064 for (;;) { 1065 status = TULIP_READ(sc, CSR_STATUS); 1066 if (status) 1067 TULIP_WRITE(sc, CSR_STATUS, status); 1068 1069 if ((status & sc->sc_inten) == 0) 1070 break; 1071 1072 handled = 1; 1073 1074 rxstatus = status & sc->sc_rxint_mask; 1075 txstatus = status & sc->sc_txint_mask; 1076 1077 if (rxstatus) { 1078 /* Grab new any new packets. */ 1079 tlp_rxintr(sc); 1080 1081 if (rxstatus & STATUS_RWT) 1082 printf("%s: receive watchdog timeout\n", 1083 sc->sc_dev.dv_xname); 1084 1085 if (rxstatus & STATUS_RU) { 1086 printf("%s: receive ring overrun\n", 1087 sc->sc_dev.dv_xname); 1088 /* Get the receive process going again. */ 1089 if (sc->sc_tdctl_er != TDCTL_ER) { 1090 tlp_idle(sc, OPMODE_SR); 1091 TULIP_WRITE(sc, CSR_RXLIST, 1092 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1093 TULIP_WRITE(sc, CSR_OPMODE, 1094 sc->sc_opmode); 1095 } 1096 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1097 break; 1098 } 1099 } 1100 1101 if (txstatus) { 1102 /* Sweep up transmit descriptors. */ 1103 tlp_txintr(sc); 1104 1105 if (txstatus & STATUS_TJT) 1106 printf("%s: transmit jabber timeout\n", 1107 sc->sc_dev.dv_xname); 1108 1109 if (txstatus & STATUS_UNF) { 1110 /* 1111 * Increase our transmit threshold if 1112 * another is available. 1113 */ 1114 txthresh = sc->sc_txthresh + 1; 1115 if (sc->sc_txth[txthresh].txth_name != NULL) { 1116 /* Idle the transmit process. */ 1117 tlp_idle(sc, OPMODE_ST); 1118 1119 sc->sc_txthresh = txthresh; 1120 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 1121 sc->sc_opmode |= 1122 sc->sc_txth[txthresh].txth_opmode; 1123 printf("%s: transmit underrun; new " 1124 "threshold: %s\n", 1125 sc->sc_dev.dv_xname, 1126 sc->sc_txth[txthresh].txth_name); 1127 1128 /* 1129 * Set the new threshold and restart 1130 * the transmit process. 1131 */ 1132 TULIP_WRITE(sc, CSR_OPMODE, 1133 sc->sc_opmode); 1134 } 1135 /* 1136 * XXX Log every Nth underrun from 1137 * XXX now on? 1138 */ 1139 } 1140 } 1141 1142 if (status & (STATUS_TPS|STATUS_RPS)) { 1143 if (status & STATUS_TPS) 1144 printf("%s: transmit process stopped\n", 1145 sc->sc_dev.dv_xname); 1146 if (status & STATUS_RPS) 1147 printf("%s: receive process stopped\n", 1148 sc->sc_dev.dv_xname); 1149 (void) tlp_init(ifp); 1150 break; 1151 } 1152 1153 if (status & STATUS_SE) { 1154 const char *str; 1155 switch (status & STATUS_EB) { 1156 case STATUS_EB_PARITY: 1157 str = "parity error"; 1158 break; 1159 1160 case STATUS_EB_MABT: 1161 str = "master abort"; 1162 break; 1163 1164 case STATUS_EB_TABT: 1165 str = "target abort"; 1166 break; 1167 1168 default: 1169 str = "unknown error"; 1170 break; 1171 } 1172 printf("%s: fatal system error: %s\n", 1173 sc->sc_dev.dv_xname, str); 1174 (void) tlp_init(ifp); 1175 break; 1176 } 1177 1178 /* 1179 * Not handled: 1180 * 1181 * Transmit buffer unavailable -- normal 1182 * condition, nothing to do, really. 1183 * 1184 * General purpose timer experied -- we don't 1185 * use the general purpose timer. 1186 * 1187 * Early receive interrupt -- not available on 1188 * all chips, we just use RI. We also only 1189 * use single-segment receive DMA, so this 1190 * is mostly useless. 1191 */ 1192 } 1193 1194 /* Bring interrupts back up on the DM9102. */ 1195 switch (sc->sc_chip) { 1196 case TULIP_CHIP_DM9102: 1197 case TULIP_CHIP_DM9102A: 1198 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1199 break; 1200 1201 default: 1202 /* Nothing. */ 1203 } 1204 1205 /* Try to get more packets going. */ 1206 tlp_start(ifp); 1207 1208 #if NRND > 0 1209 if (handled) 1210 rnd_add_uint32(&sc->sc_rnd_source, status); 1211 #endif 1212 return (handled); 1213 } 1214 1215 /* 1216 * tlp_rxintr: 1217 * 1218 * Helper; handle receive interrupts. 1219 */ 1220 void 1221 tlp_rxintr(sc) 1222 struct tulip_softc *sc; 1223 { 1224 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1225 struct ether_header *eh; 1226 struct tulip_rxsoft *rxs; 1227 struct mbuf *m; 1228 u_int32_t rxstat; 1229 int i, len; 1230 1231 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 1232 rxs = &sc->sc_rxsoft[i]; 1233 1234 TULIP_CDRXSYNC(sc, i, 1235 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1236 1237 rxstat = le32toh(sc->sc_rxdescs[i].td_status); 1238 1239 if (rxstat & TDSTAT_OWN) { 1240 /* 1241 * We have processed all of the receive buffers. 1242 */ 1243 break; 1244 } 1245 1246 /* 1247 * Make sure the packet fit in one buffer. This should 1248 * always be the case. But the Lite-On PNIC, rev 33 1249 * has an awful receive engine bug, which may require 1250 * a very icky work-around. 1251 */ 1252 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1253 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1254 printf("%s: incoming packet spilled, resetting\n", 1255 sc->sc_dev.dv_xname); 1256 (void) tlp_init(ifp); 1257 return; 1258 } 1259 1260 /* 1261 * If any collisions were seen on the wire, count one. 1262 */ 1263 if (rxstat & TDSTAT_Rx_CS) 1264 ifp->if_collisions++; 1265 1266 /* 1267 * If an error occured, update stats, clear the status 1268 * word, and leave the packet buffer in place. It will 1269 * simply be reused the next time the ring comes around. 1270 * If 802.1Q VLAN MTU is enabled, ignore the Frame Too Long 1271 * error. 1272 */ 1273 if (rxstat & TDSTAT_ES && 1274 ((sc->sc_ethercom.ec_capenable & ETHERCAP_VLAN_MTU) == 0 || 1275 (rxstat & (TDSTAT_Rx_DE | TDSTAT_Rx_RF | TDSTAT_Rx_RE | 1276 TDSTAT_Rx_DB | TDSTAT_Rx_CE)) != 0)) { 1277 #define PRINTERR(bit, str) \ 1278 if (rxstat & (bit)) \ 1279 printf("%s: receive error: %s\n", \ 1280 sc->sc_dev.dv_xname, str) 1281 ifp->if_ierrors++; 1282 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1283 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1284 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1285 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1286 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1287 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1288 #undef PRINTERR 1289 TULIP_INIT_RXDESC(sc, i); 1290 continue; 1291 } 1292 1293 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1294 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1295 1296 /* 1297 * No errors; receive the packet. Note the Tulip 1298 * includes the CRC with every packet. 1299 */ 1300 len = TDSTAT_Rx_LENGTH(rxstat); 1301 1302 #ifdef __NO_STRICT_ALIGNMENT 1303 /* 1304 * Allocate a new mbuf cluster. If that fails, we are 1305 * out of memory, and must drop the packet and recycle 1306 * the buffer that's already attached to this descriptor. 1307 */ 1308 m = rxs->rxs_mbuf; 1309 if (tlp_add_rxbuf(sc, i) != 0) { 1310 ifp->if_ierrors++; 1311 TULIP_INIT_RXDESC(sc, i); 1312 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1313 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1314 continue; 1315 } 1316 #else 1317 /* 1318 * The Tulip's receive buffers must be 4-byte aligned. 1319 * But this means that the data after the Ethernet header 1320 * is misaligned. We must allocate a new buffer and 1321 * copy the data, shifted forward 2 bytes. 1322 */ 1323 MGETHDR(m, M_DONTWAIT, MT_DATA); 1324 if (m == NULL) { 1325 dropit: 1326 ifp->if_ierrors++; 1327 TULIP_INIT_RXDESC(sc, i); 1328 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1329 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1330 continue; 1331 } 1332 if (len > (MHLEN - 2)) { 1333 MCLGET(m, M_DONTWAIT); 1334 if ((m->m_flags & M_EXT) == 0) { 1335 m_freem(m); 1336 goto dropit; 1337 } 1338 } 1339 m->m_data += 2; 1340 1341 /* 1342 * Note that we use clusters for incoming frames, so the 1343 * buffer is virtually contiguous. 1344 */ 1345 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1346 1347 /* Allow the receive descriptor to continue using its mbuf. */ 1348 TULIP_INIT_RXDESC(sc, i); 1349 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1350 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1351 #endif /* __NO_STRICT_ALIGNMENT */ 1352 1353 ifp->if_ipackets++; 1354 eh = mtod(m, struct ether_header *); 1355 m->m_flags |= M_HASFCS; 1356 m->m_pkthdr.rcvif = ifp; 1357 m->m_pkthdr.len = m->m_len = len; 1358 1359 #if NBPFILTER > 0 1360 /* 1361 * Pass this up to any BPF listeners, but only 1362 * pass it up the stack if its for us. 1363 */ 1364 if (ifp->if_bpf) 1365 bpf_mtap(ifp->if_bpf, m); 1366 #endif /* NPBFILTER > 0 */ 1367 1368 /* 1369 * We sometimes have to run the 21140 in Hash-Only 1370 * mode. If we're in that mode, and not in promiscuous 1371 * mode, and we have a unicast packet that isn't for 1372 * us, then drop it. 1373 */ 1374 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY && 1375 (ifp->if_flags & IFF_PROMISC) == 0 && 1376 ETHER_IS_MULTICAST(eh->ether_dhost) == 0 && 1377 memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1378 ETHER_ADDR_LEN) != 0) { 1379 m_freem(m); 1380 continue; 1381 } 1382 1383 /* Pass it on. */ 1384 (*ifp->if_input)(ifp, m); 1385 } 1386 1387 /* Update the recieve pointer. */ 1388 sc->sc_rxptr = i; 1389 } 1390 1391 /* 1392 * tlp_txintr: 1393 * 1394 * Helper; handle transmit interrupts. 1395 */ 1396 void 1397 tlp_txintr(sc) 1398 struct tulip_softc *sc; 1399 { 1400 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1401 struct tulip_txsoft *txs; 1402 u_int32_t txstat; 1403 1404 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1405 sc->sc_dev.dv_xname, sc->sc_flags)); 1406 1407 ifp->if_flags &= ~IFF_OACTIVE; 1408 1409 /* 1410 * Go through our Tx list and free mbufs for those 1411 * frames that have been transmitted. 1412 */ 1413 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1414 TULIP_CDTXSYNC(sc, txs->txs_lastdesc, 1415 txs->txs_ndescs, 1416 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1417 1418 #ifdef TLP_DEBUG 1419 if (ifp->if_flags & IFF_DEBUG) { 1420 int i; 1421 printf(" txsoft %p transmit chain:\n", txs); 1422 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1423 printf(" descriptor %d:\n", i); 1424 printf(" td_status: 0x%08x\n", 1425 le32toh(sc->sc_txdescs[i].td_status)); 1426 printf(" td_ctl: 0x%08x\n", 1427 le32toh(sc->sc_txdescs[i].td_ctl)); 1428 printf(" td_bufaddr1: 0x%08x\n", 1429 le32toh(sc->sc_txdescs[i].td_bufaddr1)); 1430 printf(" td_bufaddr2: 0x%08x\n", 1431 le32toh(sc->sc_txdescs[i].td_bufaddr2)); 1432 if (i == txs->txs_lastdesc) 1433 break; 1434 } 1435 } 1436 #endif 1437 1438 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status); 1439 if (txstat & TDSTAT_OWN) 1440 break; 1441 1442 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1443 1444 sc->sc_txfree += txs->txs_ndescs; 1445 1446 if (txs->txs_mbuf == NULL) { 1447 /* 1448 * If we didn't have an mbuf, it was the setup 1449 * packet. 1450 */ 1451 #ifdef DIAGNOSTIC 1452 if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1453 panic("tlp_txintr: null mbuf, not doing setup"); 1454 #endif 1455 TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE); 1456 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1457 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1458 continue; 1459 } 1460 1461 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1462 0, txs->txs_dmamap->dm_mapsize, 1463 BUS_DMASYNC_POSTWRITE); 1464 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1465 m_freem(txs->txs_mbuf); 1466 txs->txs_mbuf = NULL; 1467 1468 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1469 1470 /* 1471 * Check for errors and collisions. 1472 */ 1473 #ifdef TLP_STATS 1474 if (txstat & TDSTAT_Tx_UF) 1475 sc->sc_stats.ts_tx_uf++; 1476 if (txstat & TDSTAT_Tx_TO) 1477 sc->sc_stats.ts_tx_to++; 1478 if (txstat & TDSTAT_Tx_EC) 1479 sc->sc_stats.ts_tx_ec++; 1480 if (txstat & TDSTAT_Tx_LC) 1481 sc->sc_stats.ts_tx_lc++; 1482 #endif 1483 1484 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO)) 1485 ifp->if_oerrors++; 1486 1487 if (txstat & TDSTAT_Tx_EC) 1488 ifp->if_collisions += 16; 1489 else 1490 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1491 if (txstat & TDSTAT_Tx_LC) 1492 ifp->if_collisions++; 1493 1494 ifp->if_opackets++; 1495 } 1496 1497 /* 1498 * If there are no more pending transmissions, cancel the watchdog 1499 * timer. 1500 */ 1501 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1502 ifp->if_timer = 0; 1503 1504 /* 1505 * If we have a receive filter setup pending, do it now. 1506 */ 1507 if (sc->sc_flags & TULIPF_WANT_SETUP) 1508 (*sc->sc_filter_setup)(sc); 1509 } 1510 1511 #ifdef TLP_STATS 1512 void 1513 tlp_print_stats(sc) 1514 struct tulip_softc *sc; 1515 { 1516 1517 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n", 1518 sc->sc_dev.dv_xname, 1519 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to, 1520 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc); 1521 } 1522 #endif 1523 1524 /* 1525 * tlp_reset: 1526 * 1527 * Perform a soft reset on the Tulip. 1528 */ 1529 void 1530 tlp_reset(sc) 1531 struct tulip_softc *sc; 1532 { 1533 int i; 1534 1535 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1536 1537 /* 1538 * Xircom clone doesn't bring itself out of reset automatically. 1539 * Instead, we have to wait at least 50 PCI cycles, and then 1540 * clear SWR. 1541 */ 1542 if (sc->sc_chip == TULIP_CHIP_X3201_3) { 1543 delay(10); 1544 TULIP_WRITE(sc, CSR_BUSMODE, 0); 1545 } 1546 1547 for (i = 0; i < 1000; i++) { 1548 /* 1549 * Wait at least 50 PCI cycles for the reset to 1550 * complete before peeking at the Tulip again. 1551 * 10 uSec is a bit longer than 50 PCI cycles 1552 * (at 33MHz), but it doesn't hurt have the extra 1553 * wait. 1554 */ 1555 delay(10); 1556 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1557 break; 1558 } 1559 1560 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1561 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1562 1563 delay(1000); 1564 1565 /* 1566 * If the board has any GPIO reset sequences to issue, do them now. 1567 */ 1568 if (sc->sc_reset != NULL) 1569 (*sc->sc_reset)(sc); 1570 } 1571 1572 /* 1573 * tlp_init: [ ifnet interface function ] 1574 * 1575 * Initialize the interface. Must be called at splnet(). 1576 */ 1577 int 1578 tlp_init(ifp) 1579 struct ifnet *ifp; 1580 { 1581 struct tulip_softc *sc = ifp->if_softc; 1582 struct tulip_txsoft *txs; 1583 struct tulip_rxsoft *rxs; 1584 int i, error = 0; 1585 1586 if ((error = tlp_enable(sc)) != 0) 1587 goto out; 1588 1589 /* 1590 * Cancel any pending I/O. 1591 */ 1592 tlp_stop(ifp, 0); 1593 1594 /* 1595 * Initialize `opmode' to 0, and call the pre-init routine, if 1596 * any. This is required because the 2114x and some of the 1597 * clones require that the media-related bits in `opmode' be 1598 * set before performing a soft-reset in order to get internal 1599 * chip pathways are correct. Yay! 1600 */ 1601 sc->sc_opmode = 0; 1602 if (sc->sc_preinit != NULL) 1603 (*sc->sc_preinit)(sc); 1604 1605 /* 1606 * Reset the Tulip to a known state. 1607 */ 1608 tlp_reset(sc); 1609 1610 /* 1611 * Initialize the BUSMODE register. 1612 */ 1613 sc->sc_busmode = BUSMODE_BAR; 1614 switch (sc->sc_chip) { 1615 case TULIP_CHIP_21140: 1616 case TULIP_CHIP_21140A: 1617 case TULIP_CHIP_21142: 1618 case TULIP_CHIP_21143: 1619 case TULIP_CHIP_82C115: 1620 case TULIP_CHIP_MX98725: 1621 /* 1622 * If we're allowed to do so, use Memory Read Line 1623 * and Memory Read Multiple. 1624 * 1625 * XXX Should we use Memory Write and Invalidate? 1626 */ 1627 if (sc->sc_flags & TULIPF_MRL) 1628 sc->sc_busmode |= BUSMODE_RLE; 1629 if (sc->sc_flags & TULIPF_MRM) 1630 sc->sc_busmode |= BUSMODE_RME; 1631 #if 0 1632 if (sc->sc_flags & TULIPF_MWI) 1633 sc->sc_busmode |= BUSMODE_WLE; 1634 #endif 1635 break; 1636 1637 case TULIP_CHIP_82C168: 1638 case TULIP_CHIP_82C169: 1639 sc->sc_busmode |= BUSMODE_PNIC_MBO; 1640 if (sc->sc_maxburst == 0) 1641 sc->sc_maxburst = 16; 1642 break; 1643 1644 default: 1645 /* Nothing. */ 1646 } 1647 switch (sc->sc_cacheline) { 1648 default: 1649 /* 1650 * Note: We must *always* set these bits; a cache 1651 * alignment of 0 is RESERVED. 1652 */ 1653 case 8: 1654 sc->sc_busmode |= BUSMODE_CAL_8LW; 1655 break; 1656 case 16: 1657 sc->sc_busmode |= BUSMODE_CAL_16LW; 1658 break; 1659 case 32: 1660 sc->sc_busmode |= BUSMODE_CAL_32LW; 1661 break; 1662 } 1663 switch (sc->sc_maxburst) { 1664 case 1: 1665 sc->sc_busmode |= BUSMODE_PBL_1LW; 1666 break; 1667 case 2: 1668 sc->sc_busmode |= BUSMODE_PBL_2LW; 1669 break; 1670 case 4: 1671 sc->sc_busmode |= BUSMODE_PBL_4LW; 1672 break; 1673 case 8: 1674 sc->sc_busmode |= BUSMODE_PBL_8LW; 1675 break; 1676 case 16: 1677 sc->sc_busmode |= BUSMODE_PBL_16LW; 1678 break; 1679 case 32: 1680 sc->sc_busmode |= BUSMODE_PBL_32LW; 1681 break; 1682 default: 1683 sc->sc_busmode |= BUSMODE_PBL_DEFAULT; 1684 break; 1685 } 1686 #if BYTE_ORDER == BIG_ENDIAN 1687 /* 1688 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips 1689 * support them, and even on ones that do, it doesn't 1690 * always work. So we always access descriptors with 1691 * little endian via htole32/le32toh. 1692 */ 1693 #endif 1694 /* 1695 * Big-endian bus requires BUSMODE_BLE anyway. 1696 * Also, BUSMODE_DBO is needed because we assume 1697 * descriptors are little endian. 1698 */ 1699 if (sc->sc_flags & TULIPF_BLE) 1700 sc->sc_busmode |= BUSMODE_BLE; 1701 if (sc->sc_flags & TULIPF_DBO) 1702 sc->sc_busmode |= BUSMODE_DBO; 1703 1704 /* 1705 * Some chips have a broken bus interface. 1706 */ 1707 switch (sc->sc_chip) { 1708 case TULIP_CHIP_DM9102: 1709 case TULIP_CHIP_DM9102A: 1710 sc->sc_busmode = 0; 1711 break; 1712 1713 default: 1714 /* Nothing. */ 1715 } 1716 1717 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1718 1719 /* 1720 * Initialize the OPMODE register. We don't write it until 1721 * we're ready to begin the transmit and receive processes. 1722 * 1723 * Media-related OPMODE bits are set in the media callbacks 1724 * for each specific chip/board. 1725 */ 1726 sc->sc_opmode |= OPMODE_SR | OPMODE_ST | 1727 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1728 1729 /* 1730 * Magical mystery initialization on the Macronix chips. 1731 * The MX98713 uses its own magic value, the rest share 1732 * a common one. 1733 */ 1734 switch (sc->sc_chip) { 1735 case TULIP_CHIP_MX98713: 1736 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1737 break; 1738 1739 case TULIP_CHIP_MX98713A: 1740 case TULIP_CHIP_MX98715: 1741 case TULIP_CHIP_MX98715A: 1742 case TULIP_CHIP_MX98715AEC_X: 1743 case TULIP_CHIP_MX98725: 1744 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1745 break; 1746 1747 default: 1748 /* Nothing. */ 1749 } 1750 1751 /* 1752 * Initialize the transmit descriptor ring. 1753 */ 1754 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1755 for (i = 0; i < TULIP_NTXDESC; i++) { 1756 sc->sc_txdescs[i].td_ctl = htole32(sc->sc_tdctl_ch); 1757 sc->sc_txdescs[i].td_bufaddr2 = 1758 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i))); 1759 } 1760 sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er); 1761 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1762 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1763 sc->sc_txfree = TULIP_NTXDESC; 1764 sc->sc_txnext = 0; 1765 1766 /* 1767 * Initialize the transmit job descriptors. 1768 */ 1769 SIMPLEQ_INIT(&sc->sc_txfreeq); 1770 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1771 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1772 txs = &sc->sc_txsoft[i]; 1773 txs->txs_mbuf = NULL; 1774 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1775 } 1776 1777 /* 1778 * Initialize the receive descriptor and receive job 1779 * descriptor rings. 1780 */ 1781 for (i = 0; i < TULIP_NRXDESC; i++) { 1782 rxs = &sc->sc_rxsoft[i]; 1783 if (rxs->rxs_mbuf == NULL) { 1784 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1785 printf("%s: unable to allocate or map rx " 1786 "buffer %d, error = %d\n", 1787 sc->sc_dev.dv_xname, i, error); 1788 /* 1789 * XXX Should attempt to run with fewer receive 1790 * XXX buffers instead of just failing. 1791 */ 1792 tlp_rxdrain(sc); 1793 goto out; 1794 } 1795 } 1796 } 1797 sc->sc_rxptr = 0; 1798 1799 /* 1800 * Initialize the interrupt mask and enable interrupts. 1801 */ 1802 /* normal interrupts */ 1803 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1804 1805 /* abnormal interrupts */ 1806 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1807 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1808 1809 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1810 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1811 1812 switch (sc->sc_chip) { 1813 case TULIP_CHIP_WB89C840F: 1814 /* 1815 * Clear bits that we don't want that happen to 1816 * overlap or don't exist. 1817 */ 1818 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1819 break; 1820 1821 default: 1822 /* Nothing. */ 1823 } 1824 1825 sc->sc_rxint_mask &= sc->sc_inten; 1826 sc->sc_txint_mask &= sc->sc_inten; 1827 1828 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1829 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1830 1831 /* 1832 * Give the transmit and receive rings to the Tulip. 1833 */ 1834 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1835 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1836 1837 /* 1838 * On chips that do this differently, set the station address. 1839 */ 1840 switch (sc->sc_chip) { 1841 case TULIP_CHIP_WB89C840F: 1842 { 1843 /* XXX Do this with stream writes? */ 1844 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1845 1846 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1847 bus_space_write_1(sc->sc_st, sc->sc_sh, 1848 cpa + i, LLADDR(ifp->if_sadl)[i]); 1849 } 1850 break; 1851 } 1852 1853 case TULIP_CHIP_AL981: 1854 case TULIP_CHIP_AN983: 1855 case TULIP_CHIP_AN985: 1856 { 1857 u_int32_t reg; 1858 u_int8_t *enaddr = LLADDR(ifp->if_sadl); 1859 1860 reg = enaddr[0] | 1861 (enaddr[1] << 8) | 1862 (enaddr[2] << 16) | 1863 (enaddr[3] << 24); 1864 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg); 1865 1866 reg = enaddr[4] | 1867 (enaddr[5] << 8); 1868 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg); 1869 } 1870 1871 default: 1872 /* Nothing. */ 1873 } 1874 1875 /* 1876 * Set the receive filter. This will start the transmit and 1877 * receive processes. 1878 */ 1879 (*sc->sc_filter_setup)(sc); 1880 1881 /* 1882 * Set the current media. 1883 */ 1884 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1885 1886 /* 1887 * Start the receive process. 1888 */ 1889 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1890 1891 if (sc->sc_tick != NULL) { 1892 /* Start the one second clock. */ 1893 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 1894 } 1895 1896 /* 1897 * Note that the interface is now running. 1898 */ 1899 ifp->if_flags |= IFF_RUNNING; 1900 ifp->if_flags &= ~IFF_OACTIVE; 1901 1902 out: 1903 if (error) { 1904 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1905 ifp->if_timer = 0; 1906 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1907 } 1908 return (error); 1909 } 1910 1911 /* 1912 * tlp_enable: 1913 * 1914 * Enable the Tulip chip. 1915 */ 1916 int 1917 tlp_enable(sc) 1918 struct tulip_softc *sc; 1919 { 1920 1921 if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) { 1922 if ((*sc->sc_enable)(sc) != 0) { 1923 printf("%s: device enable failed\n", 1924 sc->sc_dev.dv_xname); 1925 return (EIO); 1926 } 1927 sc->sc_flags |= TULIPF_ENABLED; 1928 } 1929 return (0); 1930 } 1931 1932 /* 1933 * tlp_disable: 1934 * 1935 * Disable the Tulip chip. 1936 */ 1937 void 1938 tlp_disable(sc) 1939 struct tulip_softc *sc; 1940 { 1941 1942 if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) { 1943 (*sc->sc_disable)(sc); 1944 sc->sc_flags &= ~TULIPF_ENABLED; 1945 } 1946 } 1947 1948 /* 1949 * tlp_power: 1950 * 1951 * Power management (suspend/resume) hook. 1952 */ 1953 void 1954 tlp_power(why, arg) 1955 int why; 1956 void *arg; 1957 { 1958 struct tulip_softc *sc = arg; 1959 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1960 int s; 1961 1962 s = splnet(); 1963 if (why != PWR_RESUME) { 1964 tlp_stop(ifp, 0); 1965 if (sc->sc_power != NULL) 1966 (*sc->sc_power)(sc, why); 1967 } else if (ifp->if_flags & IFF_UP) { 1968 if (sc->sc_power != NULL) 1969 (*sc->sc_power)(sc, why); 1970 tlp_init(ifp); 1971 } 1972 splx(s); 1973 } 1974 1975 /* 1976 * tlp_rxdrain: 1977 * 1978 * Drain the receive queue. 1979 */ 1980 void 1981 tlp_rxdrain(sc) 1982 struct tulip_softc *sc; 1983 { 1984 struct tulip_rxsoft *rxs; 1985 int i; 1986 1987 for (i = 0; i < TULIP_NRXDESC; i++) { 1988 rxs = &sc->sc_rxsoft[i]; 1989 if (rxs->rxs_mbuf != NULL) { 1990 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1991 m_freem(rxs->rxs_mbuf); 1992 rxs->rxs_mbuf = NULL; 1993 } 1994 } 1995 } 1996 1997 /* 1998 * tlp_stop: [ ifnet interface function ] 1999 * 2000 * Stop transmission on the interface. 2001 */ 2002 void 2003 tlp_stop(ifp, disable) 2004 struct ifnet *ifp; 2005 int disable; 2006 { 2007 struct tulip_softc *sc = ifp->if_softc; 2008 struct tulip_txsoft *txs; 2009 2010 if (sc->sc_tick != NULL) { 2011 /* Stop the one second clock. */ 2012 callout_stop(&sc->sc_tick_callout); 2013 } 2014 2015 if (sc->sc_flags & TULIPF_HAS_MII) { 2016 /* Down the MII. */ 2017 mii_down(&sc->sc_mii); 2018 } 2019 2020 /* Disable interrupts. */ 2021 TULIP_WRITE(sc, CSR_INTEN, 0); 2022 2023 /* Stop the transmit and receive processes. */ 2024 sc->sc_opmode = 0; 2025 TULIP_WRITE(sc, CSR_OPMODE, 0); 2026 TULIP_WRITE(sc, CSR_RXLIST, 0); 2027 TULIP_WRITE(sc, CSR_TXLIST, 0); 2028 2029 /* 2030 * Release any queued transmit buffers. 2031 */ 2032 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 2033 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 2034 if (txs->txs_mbuf != NULL) { 2035 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 2036 m_freem(txs->txs_mbuf); 2037 txs->txs_mbuf = NULL; 2038 } 2039 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 2040 } 2041 2042 if (disable) { 2043 tlp_rxdrain(sc); 2044 tlp_disable(sc); 2045 } 2046 2047 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 2048 2049 /* 2050 * Mark the interface down and cancel the watchdog timer. 2051 */ 2052 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2053 ifp->if_timer = 0; 2054 } 2055 2056 #define SROM_EMIT(sc, x) \ 2057 do { \ 2058 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2059 delay(2); \ 2060 } while (0) 2061 2062 /* 2063 * tlp_srom_idle: 2064 * 2065 * Put the SROM in idle state. 2066 */ 2067 void 2068 tlp_srom_idle(sc) 2069 struct tulip_softc *sc; 2070 { 2071 u_int32_t miirom; 2072 int i; 2073 2074 miirom = MIIROM_SR; 2075 SROM_EMIT(sc, miirom); 2076 2077 miirom |= MIIROM_RD; 2078 SROM_EMIT(sc, miirom); 2079 2080 miirom |= MIIROM_SROMCS; 2081 SROM_EMIT(sc, miirom); 2082 2083 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2084 2085 /* Strobe the clock 32 times. */ 2086 for (i = 0; i < 32; i++) { 2087 SROM_EMIT(sc, miirom); 2088 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2089 } 2090 2091 SROM_EMIT(sc, miirom); 2092 2093 miirom &= ~MIIROM_SROMCS; 2094 SROM_EMIT(sc, miirom); 2095 2096 SROM_EMIT(sc, 0); 2097 } 2098 2099 /* 2100 * tlp_srom_size: 2101 * 2102 * Determine the number of address bits in the SROM. 2103 */ 2104 int 2105 tlp_srom_size(sc) 2106 struct tulip_softc *sc; 2107 { 2108 u_int32_t miirom; 2109 int x; 2110 2111 /* Select the SROM. */ 2112 miirom = MIIROM_SR; 2113 SROM_EMIT(sc, miirom); 2114 2115 miirom |= MIIROM_RD; 2116 SROM_EMIT(sc, miirom); 2117 2118 /* Send CHIP SELECT for one clock tick. */ 2119 miirom |= MIIROM_SROMCS; 2120 SROM_EMIT(sc, miirom); 2121 2122 /* Shift in the READ opcode. */ 2123 for (x = 3; x > 0; x--) { 2124 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2125 miirom |= MIIROM_SROMDI; 2126 else 2127 miirom &= ~MIIROM_SROMDI; 2128 SROM_EMIT(sc, miirom); 2129 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2130 SROM_EMIT(sc, miirom); 2131 } 2132 2133 /* Shift in address and look for dummy 0 bit. */ 2134 for (x = 1; x <= 12; x++) { 2135 miirom &= ~MIIROM_SROMDI; 2136 SROM_EMIT(sc, miirom); 2137 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2138 if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2139 break; 2140 SROM_EMIT(sc, miirom); 2141 } 2142 2143 /* Clear CHIP SELECT. */ 2144 miirom &= ~MIIROM_SROMCS; 2145 SROM_EMIT(sc, miirom); 2146 2147 /* Deselect the SROM. */ 2148 SROM_EMIT(sc, 0); 2149 2150 if (x < 4 || x > 12) { 2151 printf("%s: broken MicroWire interface detected; " 2152 "setting SROM size to 1Kb\n", sc->sc_dev.dv_xname); 2153 return (6); 2154 } else { 2155 if (tlp_srom_debug) 2156 printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n", 2157 sc->sc_dev.dv_xname, x, (1 << (x + 4)) >> 3); 2158 return (x); 2159 } 2160 } 2161 2162 /* 2163 * tlp_read_srom: 2164 * 2165 * Read the Tulip SROM. 2166 */ 2167 int 2168 tlp_read_srom(sc) 2169 struct tulip_softc *sc; 2170 { 2171 int size; 2172 u_int32_t miirom; 2173 u_int16_t datain; 2174 int i, x; 2175 2176 tlp_srom_idle(sc); 2177 2178 sc->sc_srom_addrbits = tlp_srom_size(sc); 2179 if (sc->sc_srom_addrbits == 0) 2180 return (0); 2181 size = TULIP_ROM_SIZE(sc->sc_srom_addrbits); 2182 sc->sc_srom = malloc(size, M_DEVBUF, M_NOWAIT); 2183 2184 /* Select the SROM. */ 2185 miirom = MIIROM_SR; 2186 SROM_EMIT(sc, miirom); 2187 2188 miirom |= MIIROM_RD; 2189 SROM_EMIT(sc, miirom); 2190 2191 for (i = 0; i < size; i += 2) { 2192 /* Send CHIP SELECT for one clock tick. */ 2193 miirom |= MIIROM_SROMCS; 2194 SROM_EMIT(sc, miirom); 2195 2196 /* Shift in the READ opcode. */ 2197 for (x = 3; x > 0; x--) { 2198 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2199 miirom |= MIIROM_SROMDI; 2200 else 2201 miirom &= ~MIIROM_SROMDI; 2202 SROM_EMIT(sc, miirom); 2203 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2204 SROM_EMIT(sc, miirom); 2205 } 2206 2207 /* Shift in address. */ 2208 for (x = sc->sc_srom_addrbits; x > 0; x--) { 2209 if (i & (1 << x)) 2210 miirom |= MIIROM_SROMDI; 2211 else 2212 miirom &= ~MIIROM_SROMDI; 2213 SROM_EMIT(sc, miirom); 2214 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2215 SROM_EMIT(sc, miirom); 2216 } 2217 2218 /* Shift out data. */ 2219 miirom &= ~MIIROM_SROMDI; 2220 datain = 0; 2221 for (x = 16; x > 0; x--) { 2222 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2223 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2224 datain |= (1 << (x - 1)); 2225 SROM_EMIT(sc, miirom); 2226 } 2227 sc->sc_srom[i] = datain & 0xff; 2228 sc->sc_srom[i + 1] = datain >> 8; 2229 2230 /* Clear CHIP SELECT. */ 2231 miirom &= ~MIIROM_SROMCS; 2232 SROM_EMIT(sc, miirom); 2233 } 2234 2235 /* Deselect the SROM. */ 2236 SROM_EMIT(sc, 0); 2237 2238 /* ...and idle it. */ 2239 tlp_srom_idle(sc); 2240 2241 if (tlp_srom_debug) { 2242 printf("SROM CONTENTS:"); 2243 for (i = 0; i < size; i++) { 2244 if ((i % 8) == 0) 2245 printf("\n\t"); 2246 printf("0x%02x ", sc->sc_srom[i]); 2247 } 2248 printf("\n"); 2249 } 2250 2251 return (1); 2252 } 2253 2254 #undef SROM_EMIT 2255 2256 /* 2257 * tlp_add_rxbuf: 2258 * 2259 * Add a receive buffer to the indicated descriptor. 2260 */ 2261 int 2262 tlp_add_rxbuf(sc, idx) 2263 struct tulip_softc *sc; 2264 int idx; 2265 { 2266 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 2267 struct mbuf *m; 2268 int error; 2269 2270 MGETHDR(m, M_DONTWAIT, MT_DATA); 2271 if (m == NULL) 2272 return (ENOBUFS); 2273 2274 MCLGET(m, M_DONTWAIT); 2275 if ((m->m_flags & M_EXT) == 0) { 2276 m_freem(m); 2277 return (ENOBUFS); 2278 } 2279 2280 if (rxs->rxs_mbuf != NULL) 2281 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 2282 2283 rxs->rxs_mbuf = m; 2284 2285 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 2286 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 2287 if (error) { 2288 printf("%s: can't load rx DMA map %d, error = %d\n", 2289 sc->sc_dev.dv_xname, idx, error); 2290 panic("tlp_add_rxbuf"); /* XXX */ 2291 } 2292 2293 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 2294 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 2295 2296 TULIP_INIT_RXDESC(sc, idx); 2297 2298 return (0); 2299 } 2300 2301 /* 2302 * tlp_srom_crcok: 2303 * 2304 * Check the CRC of the Tulip SROM. 2305 */ 2306 int 2307 tlp_srom_crcok(romdata) 2308 const u_int8_t *romdata; 2309 { 2310 u_int32_t crc; 2311 2312 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM); 2313 crc = (crc & 0xffff) ^ 0xffff; 2314 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 2315 return (1); 2316 2317 /* 2318 * Try an alternate checksum. 2319 */ 2320 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1); 2321 crc = (crc & 0xffff) ^ 0xffff; 2322 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1)) 2323 return (1); 2324 2325 return (0); 2326 } 2327 2328 /* 2329 * tlp_isv_srom: 2330 * 2331 * Check to see if the SROM is in the new standardized format. 2332 */ 2333 int 2334 tlp_isv_srom(romdata) 2335 const u_int8_t *romdata; 2336 { 2337 int i; 2338 u_int16_t cksum; 2339 2340 if (tlp_srom_crcok(romdata)) { 2341 /* 2342 * SROM CRC checks out; must be in the new format. 2343 */ 2344 return (1); 2345 } 2346 2347 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); 2348 if (cksum == 0xffff || cksum == 0) { 2349 /* 2350 * No checksum present. Check the SROM ID; 18 bytes of 0 2351 * followed by 1 (version) followed by the number of 2352 * adapters which use this SROM (should be non-zero). 2353 */ 2354 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { 2355 if (romdata[i] != 0) 2356 return (0); 2357 } 2358 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) 2359 return (0); 2360 if (romdata[TULIP_ROM_CHIP_COUNT] == 0) 2361 return (0); 2362 return (1); 2363 } 2364 2365 return (0); 2366 } 2367 2368 /* 2369 * tlp_isv_srom_enaddr: 2370 * 2371 * Get the Ethernet address from an ISV SROM. 2372 */ 2373 int 2374 tlp_isv_srom_enaddr(sc, enaddr) 2375 struct tulip_softc *sc; 2376 u_int8_t *enaddr; 2377 { 2378 int i, devcnt; 2379 2380 if (tlp_isv_srom(sc->sc_srom) == 0) 2381 return (0); 2382 2383 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 2384 for (i = 0; i < devcnt; i++) { 2385 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 2386 break; 2387 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 2388 sc->sc_devno) 2389 break; 2390 } 2391 2392 if (i == devcnt) 2393 return (0); 2394 2395 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], 2396 ETHER_ADDR_LEN); 2397 enaddr[5] += i; 2398 2399 return (1); 2400 } 2401 2402 /* 2403 * tlp_parse_old_srom: 2404 * 2405 * Parse old-format SROMs. 2406 * 2407 * This routine is largely lifted from Matt Thomas's `de' driver. 2408 */ 2409 int 2410 tlp_parse_old_srom(sc, enaddr) 2411 struct tulip_softc *sc; 2412 u_int8_t *enaddr; 2413 { 2414 static const u_int8_t testpat[] = 2415 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 2416 int i; 2417 u_int32_t cksum; 2418 2419 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 2420 /* 2421 * Some vendors (e.g. ZNYX) don't use the standard 2422 * DEC Address ROM format, but rather just have an 2423 * Ethernet address in the first 6 bytes, maybe a 2424 * 2 byte checksum, and then all 0xff's. 2425 * 2426 * On the other hand, Cobalt Networks interfaces 2427 * simply have the address in the first six bytes 2428 * with the rest zeroed out. 2429 */ 2430 for (i = 8; i < 32; i++) { 2431 if (sc->sc_srom[i] != 0xff && 2432 sc->sc_srom[i] != 0) 2433 return (0); 2434 } 2435 2436 /* 2437 * Sanity check the Ethernet address: 2438 * 2439 * - Make sure it's not multicast or locally 2440 * assigned 2441 * - Make sure it has a non-0 OUI 2442 */ 2443 if (sc->sc_srom[0] & 3) 2444 return (0); 2445 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 2446 sc->sc_srom[2] == 0) 2447 return (0); 2448 2449 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2450 return (1); 2451 } 2452 2453 /* 2454 * Standard DEC Address ROM test. 2455 */ 2456 2457 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 2458 return (0); 2459 2460 for (i = 0; i < 8; i++) { 2461 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 2462 return (0); 2463 } 2464 2465 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2466 2467 cksum = *(u_int16_t *) &enaddr[0]; 2468 2469 cksum <<= 1; 2470 if (cksum > 0xffff) 2471 cksum -= 0xffff; 2472 2473 cksum += *(u_int16_t *) &enaddr[2]; 2474 if (cksum > 0xffff) 2475 cksum -= 0xffff; 2476 2477 cksum <<= 1; 2478 if (cksum > 0xffff) 2479 cksum -= 0xffff; 2480 2481 cksum += *(u_int16_t *) &enaddr[4]; 2482 if (cksum >= 0xffff) 2483 cksum -= 0xffff; 2484 2485 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 2486 return (0); 2487 2488 return (1); 2489 } 2490 2491 /* 2492 * tlp_filter_setup: 2493 * 2494 * Set the Tulip's receive filter. 2495 */ 2496 void 2497 tlp_filter_setup(sc) 2498 struct tulip_softc *sc; 2499 { 2500 struct ethercom *ec = &sc->sc_ethercom; 2501 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2502 struct ether_multi *enm; 2503 struct ether_multistep step; 2504 __volatile u_int32_t *sp; 2505 struct tulip_txsoft *txs; 2506 u_int8_t enaddr[ETHER_ADDR_LEN]; 2507 u_int32_t hash, hashsize; 2508 int cnt; 2509 2510 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 2511 sc->sc_dev.dv_xname, sc->sc_flags)); 2512 2513 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 2514 2515 /* 2516 * If there are transmissions pending, wait until they have 2517 * completed. 2518 */ 2519 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 2520 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 2521 sc->sc_flags |= TULIPF_WANT_SETUP; 2522 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 2523 sc->sc_dev.dv_xname)); 2524 return; 2525 } 2526 sc->sc_flags &= ~TULIPF_WANT_SETUP; 2527 2528 switch (sc->sc_chip) { 2529 case TULIP_CHIP_82C115: 2530 hashsize = TULIP_PNICII_HASHSIZE; 2531 break; 2532 2533 default: 2534 hashsize = TULIP_MCHASHSIZE; 2535 } 2536 2537 /* 2538 * If we're running, idle the transmit and receive engines. If 2539 * we're NOT running, we're being called from tlp_init(), and our 2540 * writing OPMODE will start the transmit and receive processes 2541 * in motion. 2542 */ 2543 if (ifp->if_flags & IFF_RUNNING) 2544 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2545 2546 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2547 2548 if (ifp->if_flags & IFF_PROMISC) { 2549 sc->sc_opmode |= OPMODE_PR; 2550 goto allmulti; 2551 } 2552 2553 /* 2554 * Try Perfect filtering first. 2555 */ 2556 2557 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2558 sp = TULIP_CDSP(sc); 2559 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2560 cnt = 0; 2561 ETHER_FIRST_MULTI(step, ec, enm); 2562 while (enm != NULL) { 2563 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2564 /* 2565 * We must listen to a range of multicast addresses. 2566 * For now, just accept all multicasts, rather than 2567 * trying to set only those filter bits needed to match 2568 * the range. (At this time, the only use of address 2569 * ranges is for IP multicast routing, for which the 2570 * range is big enough to require all bits set.) 2571 */ 2572 goto allmulti; 2573 } 2574 if (cnt == (TULIP_MAXADDRS - 2)) { 2575 /* 2576 * We already have our multicast limit (still need 2577 * our station address and broadcast). Go to 2578 * Hash-Perfect mode. 2579 */ 2580 goto hashperfect; 2581 } 2582 cnt++; 2583 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0); 2584 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1); 2585 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2); 2586 ETHER_NEXT_MULTI(step, enm); 2587 } 2588 2589 if (ifp->if_flags & IFF_BROADCAST) { 2590 /* ...and the broadcast address. */ 2591 cnt++; 2592 *sp++ = TULIP_SP_FIELD_C(0xffff); 2593 *sp++ = TULIP_SP_FIELD_C(0xffff); 2594 *sp++ = TULIP_SP_FIELD_C(0xffff); 2595 } 2596 2597 /* Pad the rest with our station address. */ 2598 for (; cnt < TULIP_MAXADDRS; cnt++) { 2599 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2600 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2601 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2602 } 2603 ifp->if_flags &= ~IFF_ALLMULTI; 2604 goto setit; 2605 2606 hashperfect: 2607 /* 2608 * Try Hash-Perfect mode. 2609 */ 2610 2611 /* 2612 * Some 21140 chips have broken Hash-Perfect modes. On these 2613 * chips, we simply use Hash-Only mode, and put our station 2614 * address into the filter. 2615 */ 2616 if (sc->sc_chip == TULIP_CHIP_21140) 2617 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2618 else 2619 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2620 sp = TULIP_CDSP(sc); 2621 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2622 ETHER_FIRST_MULTI(step, ec, enm); 2623 while (enm != NULL) { 2624 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2625 /* 2626 * We must listen to a range of multicast addresses. 2627 * For now, just accept all multicasts, rather than 2628 * trying to set only those filter bits needed to match 2629 * the range. (At this time, the only use of address 2630 * ranges is for IP multicast routing, for which the 2631 * range is big enough to require all bits set.) 2632 */ 2633 goto allmulti; 2634 } 2635 hash = tlp_mchash(enm->enm_addrlo, hashsize); 2636 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2637 ETHER_NEXT_MULTI(step, enm); 2638 } 2639 2640 if (ifp->if_flags & IFF_BROADCAST) { 2641 /* ...and the broadcast address. */ 2642 hash = tlp_mchash(etherbroadcastaddr, hashsize); 2643 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2644 } 2645 2646 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2647 /* ...and our station address. */ 2648 hash = tlp_mchash(enaddr, hashsize); 2649 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2650 } else { 2651 /* 2652 * Hash-Perfect mode; put our station address after 2653 * the hash table. 2654 */ 2655 sp[39] = TULIP_SP_FIELD(enaddr, 0); 2656 sp[40] = TULIP_SP_FIELD(enaddr, 1); 2657 sp[41] = TULIP_SP_FIELD(enaddr, 2); 2658 } 2659 ifp->if_flags &= ~IFF_ALLMULTI; 2660 goto setit; 2661 2662 allmulti: 2663 /* 2664 * Use Perfect filter mode. First address is the broadcast address, 2665 * and pad the rest with our station address. We'll set Pass-all- 2666 * multicast in OPMODE below. 2667 */ 2668 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2669 sp = TULIP_CDSP(sc); 2670 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2671 cnt = 0; 2672 if (ifp->if_flags & IFF_BROADCAST) { 2673 cnt++; 2674 *sp++ = TULIP_SP_FIELD_C(0xffff); 2675 *sp++ = TULIP_SP_FIELD_C(0xffff); 2676 *sp++ = TULIP_SP_FIELD_C(0xffff); 2677 } 2678 for (; cnt < TULIP_MAXADDRS; cnt++) { 2679 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2680 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2681 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2682 } 2683 ifp->if_flags |= IFF_ALLMULTI; 2684 2685 setit: 2686 if (ifp->if_flags & IFF_ALLMULTI) 2687 sc->sc_opmode |= OPMODE_PM; 2688 2689 /* Sync the setup packet buffer. */ 2690 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2691 2692 /* 2693 * Fill in the setup packet descriptor. 2694 */ 2695 txs = SIMPLEQ_FIRST(&sc->sc_txfreeq); 2696 2697 txs->txs_firstdesc = sc->sc_txnext; 2698 txs->txs_lastdesc = sc->sc_txnext; 2699 txs->txs_ndescs = 1; 2700 txs->txs_mbuf = NULL; 2701 2702 sc->sc_txdescs[sc->sc_txnext].td_bufaddr1 = 2703 htole32(TULIP_CDSPADDR(sc)); 2704 sc->sc_txdescs[sc->sc_txnext].td_ctl = 2705 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2706 sc->sc_filtmode | TDCTL_Tx_SET | sc->sc_setup_fsls | 2707 TDCTL_Tx_IC | sc->sc_tdctl_ch | 2708 (sc->sc_txnext == (TULIP_NTXDESC - 1) ? sc->sc_tdctl_er : 0)); 2709 sc->sc_txdescs[sc->sc_txnext].td_status = htole32(TDSTAT_OWN); 2710 TULIP_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndescs, 2711 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2712 2713 /* Advance the tx pointer. */ 2714 sc->sc_txfree -= 1; 2715 sc->sc_txnext = TULIP_NEXTTX(sc->sc_txnext); 2716 2717 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 2718 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 2719 2720 /* 2721 * Set the OPMODE register. This will also resume the 2722 * transmit transmit process we idled above. 2723 */ 2724 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2725 2726 sc->sc_flags |= TULIPF_DOING_SETUP; 2727 2728 /* 2729 * Kick the transmitter; this will cause the Tulip to 2730 * read the setup descriptor. 2731 */ 2732 /* XXX USE AUTOPOLLING? */ 2733 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2734 2735 /* Set up a watchdog timer in case the chip flakes out. */ 2736 ifp->if_timer = 5; 2737 2738 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2739 } 2740 2741 /* 2742 * tlp_winb_filter_setup: 2743 * 2744 * Set the Winbond 89C840F's receive filter. 2745 */ 2746 void 2747 tlp_winb_filter_setup(sc) 2748 struct tulip_softc *sc; 2749 { 2750 struct ethercom *ec = &sc->sc_ethercom; 2751 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2752 struct ether_multi *enm; 2753 struct ether_multistep step; 2754 u_int32_t hash, mchash[2]; 2755 2756 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2757 sc->sc_dev.dv_xname, sc->sc_flags)); 2758 2759 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2760 2761 if (ifp->if_flags & IFF_MULTICAST) 2762 sc->sc_opmode |= OPMODE_WINB_AMP; 2763 2764 if (ifp->if_flags & IFF_BROADCAST) 2765 sc->sc_opmode |= OPMODE_WINB_ABP; 2766 2767 if (ifp->if_flags & IFF_PROMISC) { 2768 sc->sc_opmode |= OPMODE_WINB_APP; 2769 goto allmulti; 2770 } 2771 2772 mchash[0] = mchash[1] = 0; 2773 2774 ETHER_FIRST_MULTI(step, ec, enm); 2775 while (enm != NULL) { 2776 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2777 /* 2778 * We must listen to a range of multicast addresses. 2779 * For now, just accept all multicasts, rather than 2780 * trying to set only those filter bits needed to match 2781 * the range. (At this time, the only use of address 2782 * ranges is for IP multicast routing, for which the 2783 * range is big enough to require all bits set.) 2784 */ 2785 goto allmulti; 2786 } 2787 2788 /* 2789 * According to the FreeBSD `wb' driver, yes, you 2790 * really do invert the hash. 2791 */ 2792 hash = 2793 (~(ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2794 & 0x3f; 2795 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2796 ETHER_NEXT_MULTI(step, enm); 2797 } 2798 ifp->if_flags &= ~IFF_ALLMULTI; 2799 goto setit; 2800 2801 allmulti: 2802 ifp->if_flags |= IFF_ALLMULTI; 2803 mchash[0] = mchash[1] = 0xffffffff; 2804 2805 setit: 2806 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2807 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2808 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2809 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2810 sc->sc_dev.dv_xname)); 2811 } 2812 2813 /* 2814 * tlp_al981_filter_setup: 2815 * 2816 * Set the ADMtek AL981's receive filter. 2817 */ 2818 void 2819 tlp_al981_filter_setup(sc) 2820 struct tulip_softc *sc; 2821 { 2822 struct ethercom *ec = &sc->sc_ethercom; 2823 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2824 struct ether_multi *enm; 2825 struct ether_multistep step; 2826 u_int32_t hash, mchash[2]; 2827 2828 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n", 2829 sc->sc_dev.dv_xname, sc->sc_flags)); 2830 2831 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2832 2833 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2834 2835 if (ifp->if_flags & IFF_PROMISC) { 2836 sc->sc_opmode |= OPMODE_PR; 2837 goto allmulti; 2838 } 2839 2840 mchash[0] = mchash[1] = 0; 2841 2842 ETHER_FIRST_MULTI(step, ec, enm); 2843 while (enm != NULL) { 2844 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2845 /* 2846 * We must listen to a range of multicast addresses. 2847 * For now, just accept all multicasts, rather than 2848 * trying to set only those filter bits needed to match 2849 * the range. (At this time, the only use of address 2850 * ranges is for IP multicast routing, for which the 2851 * range is big enough to require all bits set.) 2852 */ 2853 goto allmulti; 2854 } 2855 2856 hash = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26; 2857 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2858 ETHER_NEXT_MULTI(step, enm); 2859 } 2860 ifp->if_flags &= ~IFF_ALLMULTI; 2861 goto setit; 2862 2863 allmulti: 2864 ifp->if_flags |= IFF_ALLMULTI; 2865 mchash[0] = mchash[1] = 0xffffffff; 2866 2867 setit: 2868 TULIP_WRITE(sc, CSR_ADM_MAR0, mchash[0]); 2869 TULIP_WRITE(sc, CSR_ADM_MAR1, mchash[1]); 2870 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2871 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n", 2872 sc->sc_dev.dv_xname)); 2873 } 2874 2875 /* 2876 * tlp_idle: 2877 * 2878 * Cause the transmit and/or receive processes to go idle. 2879 */ 2880 void 2881 tlp_idle(sc, bits) 2882 struct tulip_softc *sc; 2883 u_int32_t bits; 2884 { 2885 static const char *tlp_tx_state_names[] = { 2886 "STOPPED", 2887 "RUNNING - FETCH", 2888 "RUNNING - WAIT", 2889 "RUNNING - READING", 2890 "-- RESERVED --", 2891 "RUNNING - SETUP", 2892 "SUSPENDED", 2893 "RUNNING - CLOSE", 2894 }; 2895 static const char *tlp_rx_state_names[] = { 2896 "STOPPED", 2897 "RUNNING - FETCH", 2898 "RUNNING - CHECK", 2899 "RUNNING - WAIT", 2900 "SUSPENDED", 2901 "RUNNING - CLOSE", 2902 "RUNNING - FLUSH", 2903 "RUNNING - QUEUE", 2904 }; 2905 static const char *dm9102_tx_state_names[] = { 2906 "STOPPED", 2907 "RUNNING - FETCH", 2908 "RUNNING - SETUP", 2909 "RUNNING - READING", 2910 "RUNNING - CLOSE - CLEAR OWNER", 2911 "RUNNING - WAIT", 2912 "RUNNING - CLOSE - WRITE STATUS", 2913 "SUSPENDED", 2914 }; 2915 static const char *dm9102_rx_state_names[] = { 2916 "STOPPED", 2917 "RUNNING - FETCH", 2918 "RUNNING - WAIT", 2919 "RUNNING - QUEUE", 2920 "RUNNING - CLOSE - CLEAR OWNER", 2921 "RUNNING - CLOSE - WRITE STATUS", 2922 "SUSPENDED", 2923 "RUNNING - FLUSH", 2924 }; 2925 2926 const char **tx_state_names, **rx_state_names; 2927 u_int32_t csr, ackmask = 0; 2928 int i; 2929 2930 switch (sc->sc_chip) { 2931 case TULIP_CHIP_DM9102: 2932 case TULIP_CHIP_DM9102A: 2933 tx_state_names = dm9102_tx_state_names; 2934 rx_state_names = dm9102_rx_state_names; 2935 break; 2936 2937 default: 2938 tx_state_names = tlp_tx_state_names; 2939 rx_state_names = tlp_rx_state_names; 2940 break; 2941 } 2942 2943 if (bits & OPMODE_ST) 2944 ackmask |= STATUS_TPS; 2945 2946 if (bits & OPMODE_SR) 2947 ackmask |= STATUS_RPS; 2948 2949 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2950 2951 for (i = 0; i < 1000; i++) { 2952 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2953 break; 2954 delay(10); 2955 } 2956 2957 csr = TULIP_READ(sc, CSR_STATUS); 2958 if ((csr & ackmask) != ackmask) { 2959 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2960 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2961 printf("%s: transmit process failed to idle: " 2962 "state %s\n", sc->sc_dev.dv_xname, 2963 tx_state_names[(csr & STATUS_TS) >> 20]); 2964 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2965 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2966 printf("%s: receive process failed to idle: " 2967 "state %s\n", sc->sc_dev.dv_xname, 2968 rx_state_names[(csr & STATUS_RS) >> 17]); 2969 } 2970 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2971 } 2972 2973 /***************************************************************************** 2974 * Generic media support functions. 2975 *****************************************************************************/ 2976 2977 /* 2978 * tlp_mediastatus: [ifmedia interface function] 2979 * 2980 * Query the current media. 2981 */ 2982 void 2983 tlp_mediastatus(ifp, ifmr) 2984 struct ifnet *ifp; 2985 struct ifmediareq *ifmr; 2986 { 2987 struct tulip_softc *sc = ifp->if_softc; 2988 2989 if (TULIP_IS_ENABLED(sc) == 0) { 2990 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 2991 ifmr->ifm_status = 0; 2992 return; 2993 } 2994 2995 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2996 } 2997 2998 /* 2999 * tlp_mediachange: [ifmedia interface function] 3000 * 3001 * Update the current media. 3002 */ 3003 int 3004 tlp_mediachange(ifp) 3005 struct ifnet *ifp; 3006 { 3007 struct tulip_softc *sc = ifp->if_softc; 3008 3009 if ((ifp->if_flags & IFF_UP) == 0) 3010 return (0); 3011 return ((*sc->sc_mediasw->tmsw_set)(sc)); 3012 } 3013 3014 /***************************************************************************** 3015 * Support functions for MII-attached media. 3016 *****************************************************************************/ 3017 3018 /* 3019 * tlp_mii_tick: 3020 * 3021 * One second timer, used to tick the MII. 3022 */ 3023 void 3024 tlp_mii_tick(arg) 3025 void *arg; 3026 { 3027 struct tulip_softc *sc = arg; 3028 int s; 3029 3030 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 3031 return; 3032 3033 s = splnet(); 3034 mii_tick(&sc->sc_mii); 3035 splx(s); 3036 3037 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 3038 } 3039 3040 /* 3041 * tlp_mii_statchg: [mii interface function] 3042 * 3043 * Callback from PHY when media changes. 3044 */ 3045 void 3046 tlp_mii_statchg(self) 3047 struct device *self; 3048 { 3049 struct tulip_softc *sc = (struct tulip_softc *)self; 3050 3051 /* Idle the transmit and receive processes. */ 3052 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3053 3054 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD); 3055 3056 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 3057 sc->sc_opmode |= OPMODE_TTM; 3058 else 3059 sc->sc_opmode |= OPMODE_HBD; 3060 3061 if (sc->sc_mii.mii_media_active & IFM_FDX) 3062 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 3063 3064 /* 3065 * Write new OPMODE bits. This also restarts the transmit 3066 * and receive processes. 3067 */ 3068 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3069 } 3070 3071 /* 3072 * tlp_winb_mii_statchg: [mii interface function] 3073 * 3074 * Callback from PHY when media changes. This version is 3075 * for the Winbond 89C840F, which has different OPMODE bits. 3076 */ 3077 void 3078 tlp_winb_mii_statchg(self) 3079 struct device *self; 3080 { 3081 struct tulip_softc *sc = (struct tulip_softc *)self; 3082 3083 /* Idle the transmit and receive processes. */ 3084 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3085 3086 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 3087 3088 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 3089 sc->sc_opmode |= OPMODE_WINB_FES; 3090 3091 if (sc->sc_mii.mii_media_active & IFM_FDX) 3092 sc->sc_opmode |= OPMODE_FD; 3093 3094 /* 3095 * Write new OPMODE bits. This also restarts the transmit 3096 * and receive processes. 3097 */ 3098 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3099 } 3100 3101 /* 3102 * tlp_dm9102_mii_statchg: [mii interface function] 3103 * 3104 * Callback from PHY when media changes. This version is 3105 * for the DM9102. 3106 */ 3107 void 3108 tlp_dm9102_mii_statchg(self) 3109 struct device *self; 3110 { 3111 struct tulip_softc *sc = (struct tulip_softc *)self; 3112 3113 /* 3114 * Don't idle the transmit and receive processes, here. It 3115 * seems to fail, and just causes excess noise. 3116 */ 3117 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 3118 3119 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) != IFM_100_TX) 3120 sc->sc_opmode |= OPMODE_TTM; 3121 3122 if (sc->sc_mii.mii_media_active & IFM_FDX) 3123 sc->sc_opmode |= OPMODE_FD; 3124 3125 /* 3126 * Write new OPMODE bits. 3127 */ 3128 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3129 } 3130 3131 /* 3132 * tlp_mii_getmedia: 3133 * 3134 * Callback from ifmedia to request current media status. 3135 */ 3136 void 3137 tlp_mii_getmedia(sc, ifmr) 3138 struct tulip_softc *sc; 3139 struct ifmediareq *ifmr; 3140 { 3141 3142 mii_pollstat(&sc->sc_mii); 3143 ifmr->ifm_status = sc->sc_mii.mii_media_status; 3144 ifmr->ifm_active = sc->sc_mii.mii_media_active; 3145 } 3146 3147 /* 3148 * tlp_mii_setmedia: 3149 * 3150 * Callback from ifmedia to request new media setting. 3151 */ 3152 int 3153 tlp_mii_setmedia(sc) 3154 struct tulip_softc *sc; 3155 { 3156 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3157 3158 if (ifp->if_flags & IFF_UP) { 3159 switch (sc->sc_chip) { 3160 case TULIP_CHIP_21142: 3161 case TULIP_CHIP_21143: 3162 /* Disable the internal Nway engine. */ 3163 TULIP_WRITE(sc, CSR_SIATXRX, 0); 3164 break; 3165 3166 default: 3167 /* Nothing. */ 3168 } 3169 mii_mediachg(&sc->sc_mii); 3170 } 3171 return (0); 3172 } 3173 3174 /* 3175 * tlp_bitbang_mii_readreg: 3176 * 3177 * Read a PHY register via bit-bang'ing the MII. 3178 */ 3179 int 3180 tlp_bitbang_mii_readreg(self, phy, reg) 3181 struct device *self; 3182 int phy, reg; 3183 { 3184 struct tulip_softc *sc = (void *) self; 3185 3186 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg)); 3187 } 3188 3189 /* 3190 * tlp_bitbang_mii_writereg: 3191 * 3192 * Write a PHY register via bit-bang'ing the MII. 3193 */ 3194 void 3195 tlp_bitbang_mii_writereg(self, phy, reg, val) 3196 struct device *self; 3197 int phy, reg, val; 3198 { 3199 struct tulip_softc *sc = (void *) self; 3200 3201 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val); 3202 } 3203 3204 /* 3205 * tlp_sio_mii_bitbang_read: 3206 * 3207 * Read the MII serial port for the MII bit-bang module. 3208 */ 3209 u_int32_t 3210 tlp_sio_mii_bitbang_read(self) 3211 struct device *self; 3212 { 3213 struct tulip_softc *sc = (void *) self; 3214 3215 return (TULIP_READ(sc, CSR_MIIROM)); 3216 } 3217 3218 /* 3219 * tlp_sio_mii_bitbang_write: 3220 * 3221 * Write the MII serial port for the MII bit-bang module. 3222 */ 3223 void 3224 tlp_sio_mii_bitbang_write(self, val) 3225 struct device *self; 3226 u_int32_t val; 3227 { 3228 struct tulip_softc *sc = (void *) self; 3229 3230 TULIP_WRITE(sc, CSR_MIIROM, val); 3231 } 3232 3233 /* 3234 * tlp_pnic_mii_readreg: 3235 * 3236 * Read a PHY register on the Lite-On PNIC. 3237 */ 3238 int 3239 tlp_pnic_mii_readreg(self, phy, reg) 3240 struct device *self; 3241 int phy, reg; 3242 { 3243 struct tulip_softc *sc = (void *) self; 3244 u_int32_t val; 3245 int i; 3246 3247 TULIP_WRITE(sc, CSR_PNIC_MII, 3248 PNIC_MII_MBO | PNIC_MII_RESERVED | 3249 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 3250 (reg << PNIC_MII_REGSHIFT)); 3251 3252 for (i = 0; i < 1000; i++) { 3253 delay(10); 3254 val = TULIP_READ(sc, CSR_PNIC_MII); 3255 if ((val & PNIC_MII_BUSY) == 0) { 3256 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 3257 return (0); 3258 else 3259 return (val & PNIC_MII_DATA); 3260 } 3261 } 3262 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 3263 return (0); 3264 } 3265 3266 /* 3267 * tlp_pnic_mii_writereg: 3268 * 3269 * Write a PHY register on the Lite-On PNIC. 3270 */ 3271 void 3272 tlp_pnic_mii_writereg(self, phy, reg, val) 3273 struct device *self; 3274 int phy, reg, val; 3275 { 3276 struct tulip_softc *sc = (void *) self; 3277 int i; 3278 3279 TULIP_WRITE(sc, CSR_PNIC_MII, 3280 PNIC_MII_MBO | PNIC_MII_RESERVED | 3281 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 3282 (reg << PNIC_MII_REGSHIFT) | val); 3283 3284 for (i = 0; i < 1000; i++) { 3285 delay(10); 3286 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 3287 return; 3288 } 3289 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 3290 } 3291 3292 const bus_addr_t tlp_al981_phy_regmap[] = { 3293 CSR_ADM_BMCR, 3294 CSR_ADM_BMSR, 3295 CSR_ADM_PHYIDR1, 3296 CSR_ADM_PHYIDR2, 3297 CSR_ADM_ANAR, 3298 CSR_ADM_ANLPAR, 3299 CSR_ADM_ANER, 3300 3301 CSR_ADM_XMC, 3302 CSR_ADM_XCIIS, 3303 CSR_ADM_XIE, 3304 CSR_ADM_100CTR, 3305 }; 3306 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) / 3307 sizeof(tlp_al981_phy_regmap[0]); 3308 3309 /* 3310 * tlp_al981_mii_readreg: 3311 * 3312 * Read a PHY register on the ADMtek AL981. 3313 */ 3314 int 3315 tlp_al981_mii_readreg(self, phy, reg) 3316 struct device *self; 3317 int phy, reg; 3318 { 3319 struct tulip_softc *sc = (struct tulip_softc *)self; 3320 3321 /* AL981 only has an internal PHY. */ 3322 if (phy != 0) 3323 return (0); 3324 3325 if (reg >= tlp_al981_phy_regmap_size) 3326 return (0); 3327 3328 return (bus_space_read_4(sc->sc_st, sc->sc_sh, 3329 tlp_al981_phy_regmap[reg]) & 0xffff); 3330 } 3331 3332 /* 3333 * tlp_al981_mii_writereg: 3334 * 3335 * Write a PHY register on the ADMtek AL981. 3336 */ 3337 void 3338 tlp_al981_mii_writereg(self, phy, reg, val) 3339 struct device *self; 3340 int phy, reg, val; 3341 { 3342 struct tulip_softc *sc = (struct tulip_softc *)self; 3343 3344 /* AL981 only has an internal PHY. */ 3345 if (phy != 0) 3346 return; 3347 3348 if (reg >= tlp_al981_phy_regmap_size) 3349 return; 3350 3351 bus_space_write_4(sc->sc_st, sc->sc_sh, 3352 tlp_al981_phy_regmap[reg], val); 3353 } 3354 3355 /***************************************************************************** 3356 * Chip-specific pre-init and reset functions. 3357 *****************************************************************************/ 3358 3359 /* 3360 * tlp_2114x_preinit: 3361 * 3362 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3363 */ 3364 void 3365 tlp_2114x_preinit(sc) 3366 struct tulip_softc *sc; 3367 { 3368 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3369 struct tulip_21x4x_media *tm = ife->ifm_aux; 3370 3371 /* 3372 * Whether or not we're in MII or SIA/SYM mode, the media info 3373 * contains the appropriate OPMODE bits. 3374 * 3375 * Note that if we have no media info, we are are doing 3376 * non-MII `auto'. 3377 * 3378 * Also, we always set the Must-Be-One bit. 3379 */ 3380 if (tm == NULL) { 3381 #ifdef DIAGNOSTIC 3382 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3383 panic("tlp_2114x_preinit: not IFM_AUTO"); 3384 if (sc->sc_nway_active == NULL) 3385 panic("tlp_2114x_preinit: nway_active NULL"); 3386 #endif 3387 tm = sc->sc_nway_active->ifm_aux; 3388 } 3389 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode; 3390 3391 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3392 } 3393 3394 /* 3395 * tlp_2114x_mii_preinit: 3396 * 3397 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3398 * This version is used by boards which only have MII and don't have 3399 * an ISV SROM. 3400 */ 3401 void 3402 tlp_2114x_mii_preinit(sc) 3403 struct tulip_softc *sc; 3404 { 3405 3406 /* 3407 * Always set the Must-Be-One bit, and Port Select (to select MII). 3408 * We'll never be called during a media change. 3409 */ 3410 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS; 3411 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3412 } 3413 3414 /* 3415 * tlp_pnic_preinit: 3416 * 3417 * Pre-init function for the Lite-On 82c168 and 82c169. 3418 */ 3419 void 3420 tlp_pnic_preinit(sc) 3421 struct tulip_softc *sc; 3422 { 3423 3424 if (sc->sc_flags & TULIPF_HAS_MII) { 3425 /* 3426 * MII case: just set the port-select bit; we will never 3427 * be called during a media change. 3428 */ 3429 sc->sc_opmode |= OPMODE_PS; 3430 } else { 3431 /* 3432 * ENDEC/PCS/Nway mode; enable the Tx backoff counter. 3433 */ 3434 sc->sc_opmode |= OPMODE_PNIC_TBEN; 3435 } 3436 } 3437 3438 /* 3439 * tlp_dm9102_preinit: 3440 * 3441 * Pre-init function for the Davicom DM9102. 3442 */ 3443 void 3444 tlp_dm9102_preinit(sc) 3445 struct tulip_softc *sc; 3446 { 3447 3448 switch (sc->sc_chip) { 3449 case TULIP_CHIP_DM9102: 3450 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 3451 break; 3452 3453 case TULIP_CHIP_DM9102A: 3454 /* 3455 * XXX Figure out how to actually deal with the HomePNA 3456 * XXX portion of the DM9102A. 3457 */ 3458 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD; 3459 break; 3460 3461 default: 3462 /* Nothing. */ 3463 } 3464 3465 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3466 } 3467 3468 /* 3469 * tlp_21140_reset: 3470 * 3471 * Issue a reset sequence on the 21140 via the GPIO facility. 3472 */ 3473 void 3474 tlp_21140_reset(sc) 3475 struct tulip_softc *sc; 3476 { 3477 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3478 struct tulip_21x4x_media *tm = ife->ifm_aux; 3479 int i; 3480 3481 /* First, set the direction on the GPIO pins. */ 3482 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 3483 3484 /* Now, issue the reset sequence. */ 3485 for (i = 0; i < tm->tm_reset_length; i++) { 3486 delay(10); 3487 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]); 3488 } 3489 3490 /* Now, issue the selection sequence. */ 3491 for (i = 0; i < tm->tm_gp_length; i++) { 3492 delay(10); 3493 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]); 3494 } 3495 3496 /* If there were no sequences, just lower the pins. */ 3497 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) 3498 TULIP_WRITE(sc, CSR_GPP, 0); 3499 } 3500 3501 /* 3502 * tlp_21142_reset: 3503 * 3504 * Issue a reset sequence on the 21142 via the GPIO facility. 3505 */ 3506 void 3507 tlp_21142_reset(sc) 3508 struct tulip_softc *sc; 3509 { 3510 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3511 struct tulip_21x4x_media *tm = ife->ifm_aux; 3512 const u_int8_t *ncp; 3513 int i; 3514 3515 ncp = &sc->sc_srom[tm->tm_reset_offset]; 3516 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 3517 delay(10); 3518 TULIP_WRITE(sc, CSR_SIAGEN, 3519 TULIP_ROM_GETW(ncp, 0) << 16); 3520 } 3521 3522 ncp = &sc->sc_srom[tm->tm_gp_offset]; 3523 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 3524 delay(10); 3525 TULIP_WRITE(sc, CSR_SIAGEN, 3526 TULIP_ROM_GETW(ncp, 0) << 16); 3527 } 3528 3529 /* If there were no sequences, just lower the pins. */ 3530 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 3531 delay(10); 3532 TULIP_WRITE(sc, CSR_SIAGEN, 0); 3533 } 3534 } 3535 3536 /* 3537 * tlp_pmac_reset: 3538 * 3539 * Reset routine for Macronix chips. 3540 */ 3541 void 3542 tlp_pmac_reset(sc) 3543 struct tulip_softc *sc; 3544 { 3545 3546 switch (sc->sc_chip) { 3547 case TULIP_CHIP_82C115: 3548 case TULIP_CHIP_MX98715: 3549 case TULIP_CHIP_MX98715A: 3550 case TULIP_CHIP_MX98725: 3551 /* 3552 * Set the LED operating mode. This information is located 3553 * in the EEPROM at byte offset 0x77, per the MX98715A and 3554 * MX98725 application notes. 3555 */ 3556 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24); 3557 break; 3558 case TULIP_CHIP_MX98715AEC_X: 3559 /* 3560 * Set the LED operating mode. This information is located 3561 * in the EEPROM at byte offset 0x76, per the MX98715AEC 3562 * application note. 3563 */ 3564 TULIP_WRITE(sc, CSR_MIIROM, ((0xf & sc->sc_srom[0x76]) << 28) 3565 | ((0xf0 & sc->sc_srom[0x76]) << 20)); 3566 break; 3567 3568 default: 3569 /* Nothing. */ 3570 } 3571 } 3572 3573 /* 3574 * tlp_dm9102_reset: 3575 * 3576 * Reset routine for the Davicom DM9102. 3577 */ 3578 void 3579 tlp_dm9102_reset(sc) 3580 struct tulip_softc *sc; 3581 { 3582 3583 TULIP_WRITE(sc, CSR_DM_PHYSTAT, DM_PHYSTAT_GEPC|DM_PHYSTAT_GPED); 3584 delay(100); 3585 TULIP_WRITE(sc, CSR_DM_PHYSTAT, 0); 3586 } 3587 3588 /***************************************************************************** 3589 * Chip/board-specific media switches. The ones here are ones that 3590 * are potentially common to multiple front-ends. 3591 *****************************************************************************/ 3592 3593 /* 3594 * This table is a common place for all sorts of media information, 3595 * keyed off of the SROM media code for that media. 3596 * 3597 * Note that we explicitly configure the 21142/21143 to always advertise 3598 * NWay capabilities when using the UTP port. 3599 * XXX Actually, we don't yet. 3600 */ 3601 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = { 3602 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0, 3603 "10baseT", 3604 0, 3605 { SIACONN_21040_10BASET, 3606 SIATXRX_21040_10BASET, 3607 SIAGEN_21040_10BASET }, 3608 3609 { SIACONN_21041_10BASET, 3610 SIATXRX_21041_10BASET, 3611 SIAGEN_21041_10BASET }, 3612 3613 { SIACONN_21142_10BASET, 3614 SIATXRX_21142_10BASET, 3615 SIAGEN_21142_10BASET } }, 3616 3617 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0, 3618 "10base2", 3619 0, 3620 { 0, 3621 0, 3622 0 }, 3623 3624 { SIACONN_21041_BNC, 3625 SIATXRX_21041_BNC, 3626 SIAGEN_21041_BNC }, 3627 3628 { SIACONN_21142_BNC, 3629 SIATXRX_21142_BNC, 3630 SIAGEN_21142_BNC } }, 3631 3632 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0, 3633 "10base5", 3634 0, 3635 { SIACONN_21040_AUI, 3636 SIATXRX_21040_AUI, 3637 SIAGEN_21040_AUI }, 3638 3639 { SIACONN_21041_AUI, 3640 SIATXRX_21041_AUI, 3641 SIAGEN_21041_AUI }, 3642 3643 { SIACONN_21142_AUI, 3644 SIATXRX_21142_AUI, 3645 SIAGEN_21142_AUI } }, 3646 3647 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0, 3648 "100baseTX", 3649 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3650 { 0, 3651 0, 3652 0 }, 3653 3654 { 0, 3655 0, 3656 0 }, 3657 3658 { 0, 3659 0, 3660 SIAGEN_ABM } }, 3661 3662 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX, 3663 "10baseT-FDX", 3664 OPMODE_FD|OPMODE_HBD, 3665 { SIACONN_21040_10BASET_FDX, 3666 SIATXRX_21040_10BASET_FDX, 3667 SIAGEN_21040_10BASET_FDX }, 3668 3669 { SIACONN_21041_10BASET_FDX, 3670 SIATXRX_21041_10BASET_FDX, 3671 SIAGEN_21041_10BASET_FDX }, 3672 3673 { SIACONN_21142_10BASET_FDX, 3674 SIATXRX_21142_10BASET_FDX, 3675 SIAGEN_21142_10BASET_FDX } }, 3676 3677 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX, 3678 "100baseTX-FDX", 3679 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD, 3680 { 0, 3681 0, 3682 0 }, 3683 3684 { 0, 3685 0, 3686 0 }, 3687 3688 { 0, 3689 0, 3690 SIAGEN_ABM } }, 3691 3692 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0, 3693 "100baseT4", 3694 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3695 { 0, 3696 0, 3697 0 }, 3698 3699 { 0, 3700 0, 3701 0 }, 3702 3703 { 0, 3704 0, 3705 SIAGEN_ABM } }, 3706 3707 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0, 3708 "100baseFX", 3709 OPMODE_PS|OPMODE_PCS|OPMODE_HBD, 3710 { 0, 3711 0, 3712 0 }, 3713 3714 { 0, 3715 0, 3716 0 }, 3717 3718 { 0, 3719 0, 3720 SIAGEN_ABM } }, 3721 3722 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX, 3723 "100baseFX-FDX", 3724 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD, 3725 { 0, 3726 0, 3727 0 }, 3728 3729 { 0, 3730 0, 3731 0 }, 3732 3733 { 0, 3734 0, 3735 SIAGEN_ABM } }, 3736 3737 { 0, 0, 0, 3738 NULL, 3739 0, 3740 { 0, 3741 0, 3742 0 }, 3743 3744 { 0, 3745 0, 3746 0 }, 3747 3748 { 0, 3749 0, 3750 0 } }, 3751 }; 3752 3753 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t)); 3754 void tlp_srom_media_info __P((struct tulip_softc *, 3755 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *)); 3756 void tlp_add_srom_media __P((struct tulip_softc *, int, 3757 void (*)(struct tulip_softc *, struct ifmediareq *), 3758 int (*)(struct tulip_softc *), const u_int8_t *, int)); 3759 void tlp_print_media __P((struct tulip_softc *)); 3760 void tlp_nway_activate __P((struct tulip_softc *, int)); 3761 void tlp_get_minst __P((struct tulip_softc *)); 3762 3763 const struct tulip_srom_to_ifmedia * 3764 tlp_srom_to_ifmedia(sm) 3765 u_int8_t sm; 3766 { 3767 const struct tulip_srom_to_ifmedia *tsti; 3768 3769 for (tsti = tulip_srom_to_ifmedia_table; 3770 tsti->tsti_name != NULL; tsti++) { 3771 if (tsti->tsti_srom == sm) 3772 return (tsti); 3773 } 3774 3775 return (NULL); 3776 } 3777 3778 void 3779 tlp_srom_media_info(sc, tsti, tm) 3780 struct tulip_softc *sc; 3781 const struct tulip_srom_to_ifmedia *tsti; 3782 struct tulip_21x4x_media *tm; 3783 { 3784 3785 tm->tm_name = tsti->tsti_name; 3786 tm->tm_opmode = tsti->tsti_opmode; 3787 3788 switch (sc->sc_chip) { 3789 case TULIP_CHIP_DE425: 3790 case TULIP_CHIP_21040: 3791 tm->tm_sia = tsti->tsti_21040; /* struct assignment */ 3792 break; 3793 3794 case TULIP_CHIP_21041: 3795 tm->tm_sia = tsti->tsti_21041; /* struct assignment */ 3796 break; 3797 3798 case TULIP_CHIP_21142: 3799 case TULIP_CHIP_21143: 3800 case TULIP_CHIP_82C115: 3801 case TULIP_CHIP_MX98715: 3802 case TULIP_CHIP_MX98715A: 3803 case TULIP_CHIP_MX98715AEC_X: 3804 case TULIP_CHIP_MX98725: 3805 tm->tm_sia = tsti->tsti_21142; /* struct assignment */ 3806 break; 3807 3808 default: 3809 /* Nothing. */ 3810 } 3811 } 3812 3813 void 3814 tlp_add_srom_media(sc, type, get, set, list, cnt) 3815 struct tulip_softc *sc; 3816 int type; 3817 void (*get) __P((struct tulip_softc *, struct ifmediareq *)); 3818 int (*set) __P((struct tulip_softc *)); 3819 const u_int8_t *list; 3820 int cnt; 3821 { 3822 struct tulip_21x4x_media *tm; 3823 const struct tulip_srom_to_ifmedia *tsti; 3824 int i; 3825 3826 for (i = 0; i < cnt; i++) { 3827 tsti = tlp_srom_to_ifmedia(list[i]); 3828 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 3829 memset(tm, 0, sizeof(*tm)); 3830 tlp_srom_media_info(sc, tsti, tm); 3831 tm->tm_type = type; 3832 tm->tm_get = get; 3833 tm->tm_set = set; 3834 3835 ifmedia_add(&sc->sc_mii.mii_media, 3836 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 3837 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 3838 } 3839 } 3840 3841 void 3842 tlp_print_media(sc) 3843 struct tulip_softc *sc; 3844 { 3845 struct ifmedia_entry *ife; 3846 struct tulip_21x4x_media *tm; 3847 const char *sep = ""; 3848 3849 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3850 3851 printf("%s: ", sc->sc_dev.dv_xname); 3852 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 3853 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 3854 tm = ife->ifm_aux; 3855 if (tm == NULL) { 3856 #ifdef DIAGNOSTIC 3857 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3858 panic("tlp_print_media"); 3859 #endif 3860 PRINT("auto"); 3861 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII && 3862 tm->tm_type != TULIP_ROM_MB_21142_MII) { 3863 PRINT(tm->tm_name); 3864 } 3865 } 3866 printf("\n"); 3867 3868 #undef PRINT 3869 } 3870 3871 void 3872 tlp_nway_activate(sc, media) 3873 struct tulip_softc *sc; 3874 int media; 3875 { 3876 struct ifmedia_entry *ife; 3877 3878 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0); 3879 #ifdef DIAGNOSTIC 3880 if (ife == NULL) 3881 panic("tlp_nway_activate"); 3882 #endif 3883 sc->sc_nway_active = ife; 3884 } 3885 3886 void 3887 tlp_get_minst(sc) 3888 struct tulip_softc *sc; 3889 { 3890 3891 if ((sc->sc_media_seen & 3892 ~((1 << TULIP_ROM_MB_21140_MII) | 3893 (1 << TULIP_ROM_MB_21142_MII))) == 0) { 3894 /* 3895 * We have not yet seen any SIA/SYM media (but are 3896 * about to; that's why we're called!), so assign 3897 * the current media instance to be the `internal media' 3898 * instance, and advance it so any MII media gets a 3899 * fresh one (used to selecting/isolating a PHY). 3900 */ 3901 sc->sc_tlp_minst = sc->sc_mii.mii_instance++; 3902 } 3903 } 3904 3905 /* 3906 * SIA Utility functions. 3907 */ 3908 void tlp_sia_update_link __P((struct tulip_softc *)); 3909 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *)); 3910 int tlp_sia_set __P((struct tulip_softc *)); 3911 void tlp_sia_fixup __P((struct tulip_softc *)); 3912 3913 void 3914 tlp_sia_update_link(sc) 3915 struct tulip_softc *sc; 3916 { 3917 struct ifmedia_entry *ife; 3918 struct tulip_21x4x_media *tm; 3919 u_int32_t siastat; 3920 3921 ife = TULIP_CURRENT_MEDIA(sc); 3922 tm = ife->ifm_aux; 3923 3924 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 3925 3926 siastat = TULIP_READ(sc, CSR_SIASTAT); 3927 3928 /* 3929 * Note that when we do SIA link tests, we are assuming that 3930 * the chip is really in the mode that the current media setting 3931 * reflects. If we're not, then the link tests will not be 3932 * accurate! 3933 */ 3934 switch (IFM_SUBTYPE(ife->ifm_media)) { 3935 case IFM_10_T: 3936 sc->sc_flags |= TULIPF_LINK_VALID; 3937 if ((siastat & SIASTAT_LS10) == 0) 3938 sc->sc_flags |= TULIPF_LINK_UP; 3939 break; 3940 3941 case IFM_100_TX: 3942 case IFM_100_T4: 3943 sc->sc_flags |= TULIPF_LINK_VALID; 3944 if ((siastat & SIASTAT_LS100) == 0) 3945 sc->sc_flags |= TULIPF_LINK_UP; 3946 break; 3947 } 3948 3949 switch (sc->sc_chip) { 3950 case TULIP_CHIP_21142: 3951 case TULIP_CHIP_21143: 3952 /* 3953 * On these chips, we can tell more information about 3954 * AUI/BNC. Note that the AUI/BNC selection is made 3955 * in a different register; for our purpose, it's all 3956 * AUI. 3957 */ 3958 switch (IFM_SUBTYPE(ife->ifm_media)) { 3959 case IFM_10_2: 3960 case IFM_10_5: 3961 sc->sc_flags |= TULIPF_LINK_VALID; 3962 if (siastat & SIASTAT_ARA) { 3963 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA); 3964 sc->sc_flags |= TULIPF_LINK_UP; 3965 } 3966 break; 3967 3968 default: 3969 /* 3970 * If we're SYM media and can detect the link 3971 * via the GPIO facility, prefer that status 3972 * over LS100. 3973 */ 3974 if (tm->tm_type == TULIP_ROM_MB_21143_SYM && 3975 tm->tm_actmask != 0) { 3976 sc->sc_flags = (sc->sc_flags & 3977 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID; 3978 if (TULIP_ISSET(sc, CSR_SIAGEN, 3979 tm->tm_actmask) == tm->tm_actdata) 3980 sc->sc_flags |= TULIPF_LINK_UP; 3981 } 3982 } 3983 break; 3984 3985 default: 3986 /* Nothing. */ 3987 } 3988 } 3989 3990 void 3991 tlp_sia_get(sc, ifmr) 3992 struct tulip_softc *sc; 3993 struct ifmediareq *ifmr; 3994 { 3995 struct ifmedia_entry *ife; 3996 3997 ifmr->ifm_status = 0; 3998 3999 tlp_sia_update_link(sc); 4000 4001 ife = TULIP_CURRENT_MEDIA(sc); 4002 4003 if (sc->sc_flags & TULIPF_LINK_VALID) 4004 ifmr->ifm_status |= IFM_AVALID; 4005 if (sc->sc_flags & TULIPF_LINK_UP) 4006 ifmr->ifm_status |= IFM_ACTIVE; 4007 ifmr->ifm_active = ife->ifm_media; 4008 } 4009 4010 void 4011 tlp_sia_fixup(sc) 4012 struct tulip_softc *sc; 4013 { 4014 struct ifmedia_entry *ife; 4015 struct tulip_21x4x_media *tm; 4016 u_int32_t siaconn, siatxrx, siagen; 4017 4018 switch (sc->sc_chip) { 4019 case TULIP_CHIP_82C115: 4020 case TULIP_CHIP_MX98713A: 4021 case TULIP_CHIP_MX98715: 4022 case TULIP_CHIP_MX98715A: 4023 case TULIP_CHIP_MX98715AEC_X: 4024 case TULIP_CHIP_MX98725: 4025 siaconn = PMAC_SIACONN_MASK; 4026 siatxrx = PMAC_SIATXRX_MASK; 4027 siagen = PMAC_SIAGEN_MASK; 4028 break; 4029 4030 default: 4031 /* No fixups required on any other chips. */ 4032 return; 4033 } 4034 4035 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4036 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 4037 tm = ife->ifm_aux; 4038 if (tm == NULL) 4039 continue; 4040 4041 tm->tm_siaconn &= siaconn; 4042 tm->tm_siatxrx &= siatxrx; 4043 tm->tm_siagen &= siagen; 4044 } 4045 } 4046 4047 int 4048 tlp_sia_set(sc) 4049 struct tulip_softc *sc; 4050 { 4051 struct ifmedia_entry *ife; 4052 struct tulip_21x4x_media *tm; 4053 4054 ife = TULIP_CURRENT_MEDIA(sc); 4055 tm = ife->ifm_aux; 4056 4057 /* 4058 * XXX This appears to be necessary on a bunch of the clone chips. 4059 */ 4060 delay(20000); 4061 4062 /* 4063 * Idle the chip. 4064 */ 4065 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4066 4067 /* 4068 * Program the SIA. It's important to write in this order, 4069 * resetting the SIA first. 4070 */ 4071 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */ 4072 delay(1000); 4073 4074 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx); 4075 4076 switch (sc->sc_chip) { 4077 case TULIP_CHIP_21142: 4078 case TULIP_CHIP_21143: 4079 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl); 4080 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata); 4081 break; 4082 default: 4083 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen); 4084 } 4085 4086 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn); 4087 4088 /* 4089 * Set the OPMODE bits for this media and write OPMODE. 4090 * This will resume the transmit and receive processes. 4091 */ 4092 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4093 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4094 4095 return (0); 4096 } 4097 4098 /* 4099 * 21140 GPIO utility functions. 4100 */ 4101 void tlp_21140_gpio_update_link __P((struct tulip_softc *)); 4102 void tlp_21140_gpio_get __P((struct tulip_softc *sc, 4103 struct ifmediareq *ifmr)); 4104 int tlp_21140_gpio_set __P((struct tulip_softc *sc)); 4105 4106 void 4107 tlp_21140_gpio_update_link(sc) 4108 struct tulip_softc *sc; 4109 { 4110 struct ifmedia_entry *ife; 4111 struct tulip_21x4x_media *tm; 4112 4113 ife = TULIP_CURRENT_MEDIA(sc); 4114 tm = ife->ifm_aux; 4115 4116 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 4117 4118 if (tm->tm_actmask != 0) { 4119 sc->sc_flags |= TULIPF_LINK_VALID; 4120 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) == 4121 tm->tm_actdata) 4122 sc->sc_flags |= TULIPF_LINK_UP; 4123 } 4124 } 4125 4126 void 4127 tlp_21140_gpio_get(sc, ifmr) 4128 struct tulip_softc *sc; 4129 struct ifmediareq *ifmr; 4130 { 4131 struct ifmedia_entry *ife; 4132 4133 ifmr->ifm_status = 0; 4134 4135 tlp_21140_gpio_update_link(sc); 4136 4137 ife = TULIP_CURRENT_MEDIA(sc); 4138 4139 if (sc->sc_flags & TULIPF_LINK_VALID) 4140 ifmr->ifm_status |= IFM_AVALID; 4141 if (sc->sc_flags & TULIPF_LINK_UP) 4142 ifmr->ifm_status |= IFM_ACTIVE; 4143 ifmr->ifm_active = ife->ifm_media; 4144 } 4145 4146 int 4147 tlp_21140_gpio_set(sc) 4148 struct tulip_softc *sc; 4149 { 4150 struct ifmedia_entry *ife; 4151 struct tulip_21x4x_media *tm; 4152 4153 ife = TULIP_CURRENT_MEDIA(sc); 4154 tm = ife->ifm_aux; 4155 4156 /* 4157 * Idle the chip. 4158 */ 4159 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4160 4161 /* 4162 * Set the GPIO pins for this media, to flip any 4163 * relays, etc. 4164 */ 4165 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4166 delay(10); 4167 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata); 4168 4169 /* 4170 * Set the OPMODE bits for this media and write OPMODE. 4171 * This will resume the transmit and receive processes. 4172 */ 4173 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4174 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4175 4176 return (0); 4177 } 4178 4179 /* 4180 * 21040 and 21041 media switches. 4181 */ 4182 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 4183 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 4184 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 4185 void tlp_21041_tmsw_init __P((struct tulip_softc *)); 4186 4187 const struct tulip_mediasw tlp_21040_mediasw = { 4188 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set 4189 }; 4190 4191 const struct tulip_mediasw tlp_21040_tp_mediasw = { 4192 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set 4193 }; 4194 4195 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 4196 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set 4197 }; 4198 4199 const struct tulip_mediasw tlp_21041_mediasw = { 4200 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set 4201 }; 4202 4203 4204 void 4205 tlp_21040_tmsw_init(sc) 4206 struct tulip_softc *sc; 4207 { 4208 static const u_int8_t media[] = { 4209 TULIP_ROM_MB_MEDIA_TP, 4210 TULIP_ROM_MB_MEDIA_TP_FDX, 4211 TULIP_ROM_MB_MEDIA_AUI, 4212 }; 4213 struct tulip_21x4x_media *tm; 4214 4215 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4216 tlp_mediastatus); 4217 4218 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3); 4219 4220 /* 4221 * No SROM type for External SIA. 4222 */ 4223 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4224 memset(tm, 0, sizeof(*tm)); 4225 tm->tm_name = "manual"; 4226 tm->tm_opmode = 0; 4227 tm->tm_siaconn = SIACONN_21040_EXTSIA; 4228 tm->tm_siatxrx = SIATXRX_21040_EXTSIA; 4229 tm->tm_siagen = SIAGEN_21040_EXTSIA; 4230 ifmedia_add(&sc->sc_mii.mii_media, 4231 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm); 4232 4233 /* 4234 * XXX Autosense not yet supported. 4235 */ 4236 4237 /* XXX This should be auto-sense. */ 4238 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4239 4240 tlp_print_media(sc); 4241 } 4242 4243 void 4244 tlp_21040_tp_tmsw_init(sc) 4245 struct tulip_softc *sc; 4246 { 4247 static const u_int8_t media[] = { 4248 TULIP_ROM_MB_MEDIA_TP, 4249 TULIP_ROM_MB_MEDIA_TP_FDX, 4250 }; 4251 4252 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4253 tlp_mediastatus); 4254 4255 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2); 4256 4257 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4258 4259 tlp_print_media(sc); 4260 } 4261 4262 void 4263 tlp_21040_auibnc_tmsw_init(sc) 4264 struct tulip_softc *sc; 4265 { 4266 static const u_int8_t media[] = { 4267 TULIP_ROM_MB_MEDIA_AUI, 4268 }; 4269 4270 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4271 tlp_mediastatus); 4272 4273 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1); 4274 4275 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 4276 4277 tlp_print_media(sc); 4278 } 4279 4280 void 4281 tlp_21041_tmsw_init(sc) 4282 struct tulip_softc *sc; 4283 { 4284 static const u_int8_t media[] = { 4285 TULIP_ROM_MB_MEDIA_TP, 4286 TULIP_ROM_MB_MEDIA_TP_FDX, 4287 TULIP_ROM_MB_MEDIA_BNC, 4288 TULIP_ROM_MB_MEDIA_AUI, 4289 }; 4290 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt; 4291 const struct tulip_srom_to_ifmedia *tsti; 4292 struct tulip_21x4x_media *tm; 4293 u_int16_t romdef; 4294 u_int8_t mb; 4295 4296 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4297 tlp_mediastatus); 4298 4299 if (tlp_isv_srom(sc->sc_srom) == 0) { 4300 not_isv_srom: 4301 /* 4302 * If we have a board without the standard 21041 SROM format, 4303 * we just assume all media are present and try and pick a 4304 * reasonable default. 4305 */ 4306 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4); 4307 4308 /* 4309 * XXX Autosense not yet supported. 4310 */ 4311 4312 /* XXX This should be auto-sense. */ 4313 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4314 4315 tlp_print_media(sc); 4316 return; 4317 } 4318 4319 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4320 for (i = 0; i < devcnt; i++) { 4321 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4322 break; 4323 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4324 sc->sc_devno) 4325 break; 4326 } 4327 4328 if (i == devcnt) 4329 goto not_isv_srom; 4330 4331 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4332 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4333 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE; 4334 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4335 4336 for (; m_cnt != 0; 4337 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) { 4338 mb = sc->sc_srom[mb_offset]; 4339 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4340 memset(tm, 0, sizeof(*tm)); 4341 switch (mb & TULIP_ROM_MB_MEDIA_CODE) { 4342 case TULIP_ROM_MB_MEDIA_TP_FDX: 4343 case TULIP_ROM_MB_MEDIA_TP: 4344 case TULIP_ROM_MB_MEDIA_BNC: 4345 case TULIP_ROM_MB_MEDIA_AUI: 4346 tsti = tlp_srom_to_ifmedia(mb & 4347 TULIP_ROM_MB_MEDIA_CODE); 4348 4349 tlp_srom_media_info(sc, tsti, tm); 4350 4351 /* 4352 * Override our default SIA settings if the 4353 * SROM contains its own. 4354 */ 4355 if (mb & TULIP_ROM_MB_EXT) { 4356 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom, 4357 mb_offset + TULIP_ROM_MB_CSR13); 4358 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom, 4359 mb_offset + TULIP_ROM_MB_CSR14); 4360 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom, 4361 mb_offset + TULIP_ROM_MB_CSR15); 4362 } 4363 4364 ifmedia_add(&sc->sc_mii.mii_media, 4365 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4366 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4367 break; 4368 4369 default: 4370 printf("%s: unknown media code 0x%02x\n", 4371 sc->sc_dev.dv_xname, 4372 mb & TULIP_ROM_MB_MEDIA_CODE); 4373 free(tm, M_DEVBUF); 4374 } 4375 } 4376 4377 /* 4378 * XXX Autosense not yet supported. 4379 */ 4380 4381 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset + 4382 TULIP_ROM_IL_SELECT_CONN_TYPE); 4383 switch (romdef) { 4384 case SELECT_CONN_TYPE_TP: 4385 case SELECT_CONN_TYPE_TP_AUTONEG: 4386 case SELECT_CONN_TYPE_TP_NOLINKPASS: 4387 defmedia = IFM_ETHER|IFM_10_T; 4388 break; 4389 4390 case SELECT_CONN_TYPE_TP_FDX: 4391 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX; 4392 break; 4393 4394 case SELECT_CONN_TYPE_BNC: 4395 defmedia = IFM_ETHER|IFM_10_2; 4396 break; 4397 4398 case SELECT_CONN_TYPE_AUI: 4399 defmedia = IFM_ETHER|IFM_10_5; 4400 break; 4401 #if 0 /* XXX */ 4402 case SELECT_CONN_TYPE_ASENSE: 4403 case SELECT_CONN_TYPE_ASENSE_AUTONEG: 4404 defmedia = IFM_ETHER|IFM_AUTO; 4405 break; 4406 #endif 4407 default: 4408 defmedia = 0; 4409 } 4410 4411 if (defmedia == 0) { 4412 /* 4413 * XXX We should default to auto-sense. 4414 */ 4415 defmedia = IFM_ETHER|IFM_10_T; 4416 } 4417 4418 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4419 4420 tlp_print_media(sc); 4421 } 4422 4423 /* 4424 * DECchip 2114x ISV media switch. 4425 */ 4426 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *)); 4427 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 4428 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *)); 4429 4430 const struct tulip_mediasw tlp_2114x_isv_mediasw = { 4431 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 4432 }; 4433 4434 void 4435 tlp_2114x_isv_tmsw_init(sc) 4436 struct tulip_softc *sc; 4437 { 4438 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 4439 struct ifmedia_entry *ife; 4440 struct mii_softc *phy; 4441 struct tulip_21x4x_media *tm; 4442 const struct tulip_srom_to_ifmedia *tsti; 4443 int i, devcnt, leaf_offset, m_cnt, type, length; 4444 int defmedia, miidef; 4445 u_int16_t word; 4446 u_int8_t *cp, *ncp; 4447 4448 defmedia = miidef = 0; 4449 4450 sc->sc_mii.mii_ifp = ifp; 4451 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 4452 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 4453 sc->sc_mii.mii_statchg = sc->sc_statchg; 4454 4455 /* 4456 * Ignore `instance'; we may get a mixture of SIA and MII 4457 * media, and `instance' is used to isolate or select the 4458 * PHY on the MII as appropriate. Note that duplicate media 4459 * are disallowed, so ignoring `instance' is safe. 4460 */ 4461 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange, 4462 tlp_mediastatus); 4463 4464 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4465 for (i = 0; i < devcnt; i++) { 4466 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4467 break; 4468 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4469 sc->sc_devno) 4470 break; 4471 } 4472 4473 if (i == devcnt) { 4474 printf("%s: unable to locate info leaf in SROM\n", 4475 sc->sc_dev.dv_xname); 4476 return; 4477 } 4478 4479 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4480 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4481 4482 /* XXX SELECT CONN TYPE */ 4483 4484 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4485 4486 /* 4487 * On some chips, the first thing in the Info Leaf is the 4488 * GPIO pin direction data. 4489 */ 4490 switch (sc->sc_chip) { 4491 case TULIP_CHIP_21140: 4492 case TULIP_CHIP_21140A: 4493 case TULIP_CHIP_MX98713: 4494 case TULIP_CHIP_AX88140: 4495 case TULIP_CHIP_AX88141: 4496 sc->sc_gp_dir = *cp++; 4497 break; 4498 4499 default: 4500 /* Nothing. */ 4501 } 4502 4503 /* Get the media count. */ 4504 m_cnt = *cp++; 4505 4506 for (; m_cnt != 0; cp = ncp, m_cnt--) { 4507 /* 4508 * Determine the type and length of this media block. 4509 */ 4510 if ((*cp & 0x80) == 0) { 4511 length = 4; 4512 type = TULIP_ROM_MB_21140_GPR; 4513 } else { 4514 length = (*cp++ & 0x7f) - 1; 4515 type = *cp++ & 0x3f; 4516 } 4517 4518 /* Compute the start of the next block. */ 4519 ncp = cp + length; 4520 4521 /* Now, parse the block. */ 4522 switch (type) { 4523 case TULIP_ROM_MB_21140_GPR: 4524 tlp_get_minst(sc); 4525 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR; 4526 4527 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4528 memset(tm, 0, sizeof(*tm)); 4529 4530 tm->tm_type = TULIP_ROM_MB_21140_GPR; 4531 tm->tm_get = tlp_21140_gpio_get; 4532 tm->tm_set = tlp_21140_gpio_set; 4533 4534 /* First is the media type code. */ 4535 tsti = tlp_srom_to_ifmedia(cp[0] & 4536 TULIP_ROM_MB_MEDIA_CODE); 4537 if (tsti == NULL) { 4538 /* Invalid media code. */ 4539 free(tm, M_DEVBUF); 4540 break; 4541 } 4542 4543 /* Get defaults. */ 4544 tlp_srom_media_info(sc, tsti, tm); 4545 4546 /* Next is any GPIO info for this media. */ 4547 tm->tm_gpdata = cp[1]; 4548 4549 /* 4550 * Next is a word containing OPMODE information 4551 * and info on how to detect if this media is 4552 * active. 4553 */ 4554 word = TULIP_ROM_GETW(cp, 2); 4555 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4556 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4557 tm->tm_actmask = 4558 TULIP_ROM_MB_BITPOS(word); 4559 tm->tm_actdata = 4560 (word & TULIP_ROM_MB_POLARITY) ? 4561 0 : tm->tm_actmask; 4562 } 4563 4564 ifmedia_add(&sc->sc_mii.mii_media, 4565 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4566 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4567 break; 4568 4569 case TULIP_ROM_MB_21140_MII: 4570 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII; 4571 4572 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4573 memset(tm, 0, sizeof(*tm)); 4574 4575 tm->tm_type = TULIP_ROM_MB_21140_MII; 4576 tm->tm_get = tlp_mii_getmedia; 4577 tm->tm_set = tlp_mii_setmedia; 4578 tm->tm_opmode = OPMODE_PS; 4579 4580 if (sc->sc_reset == NULL) 4581 sc->sc_reset = tlp_21140_reset; 4582 4583 /* First is the PHY number. */ 4584 tm->tm_phyno = *cp++; 4585 4586 /* Next is the MII select sequence length and offset. */ 4587 tm->tm_gp_length = *cp++; 4588 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4589 cp += tm->tm_gp_length; 4590 4591 /* Next is the MII reset sequence length and offset. */ 4592 tm->tm_reset_length = *cp++; 4593 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4594 cp += tm->tm_reset_length; 4595 4596 /* 4597 * The following items are left in the media block 4598 * that we don't particularly care about: 4599 * 4600 * capabilities W 4601 * advertisement W 4602 * full duplex W 4603 * tx threshold W 4604 * 4605 * These appear to be bits in the PHY registers, 4606 * which our MII code handles on its own. 4607 */ 4608 4609 /* 4610 * Before we probe the MII bus, we need to reset 4611 * it and issue the selection sequence. 4612 */ 4613 4614 /* Set the direction of the pins... */ 4615 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4616 4617 for (i = 0; i < tm->tm_reset_length; i++) { 4618 delay(10); 4619 TULIP_WRITE(sc, CSR_GPP, 4620 sc->sc_srom[tm->tm_reset_offset + i]); 4621 } 4622 4623 for (i = 0; i < tm->tm_gp_length; i++) { 4624 delay(10); 4625 TULIP_WRITE(sc, CSR_GPP, 4626 sc->sc_srom[tm->tm_gp_offset + i]); 4627 } 4628 4629 /* If there were no sequences, just lower the pins. */ 4630 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4631 delay(10); 4632 TULIP_WRITE(sc, CSR_GPP, 0); 4633 } 4634 4635 /* 4636 * Now, probe the MII for the PHY. Note, we know 4637 * the location of the PHY on the bus, but we don't 4638 * particularly care; the MII code just likes to 4639 * search the whole thing anyhow. 4640 */ 4641 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4642 MII_PHY_ANY, tm->tm_phyno, 0); 4643 4644 /* 4645 * Now, search for the PHY we hopefully just 4646 * configured. If it's not configured into the 4647 * kernel, we lose. The PHY's default media always 4648 * takes priority. 4649 */ 4650 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4651 phy != NULL; 4652 phy = LIST_NEXT(phy, mii_list)) 4653 if (phy->mii_offset == tm->tm_phyno) 4654 break; 4655 if (phy == NULL) { 4656 printf("%s: unable to configure MII\n", 4657 sc->sc_dev.dv_xname); 4658 break; 4659 } 4660 4661 sc->sc_flags |= TULIPF_HAS_MII; 4662 sc->sc_tick = tlp_mii_tick; 4663 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4664 phy->mii_inst); 4665 4666 /* 4667 * Okay, now that we've found the PHY and the MII 4668 * layer has added all of the media associated 4669 * with that PHY, we need to traverse the media 4670 * list, and add our `tm' to each entry's `aux' 4671 * pointer. 4672 * 4673 * We do this by looking for media with our 4674 * PHY's `instance'. 4675 */ 4676 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4677 ife != NULL; 4678 ife = TAILQ_NEXT(ife, ifm_list)) { 4679 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4680 continue; 4681 ife->ifm_aux = tm; 4682 } 4683 break; 4684 4685 case TULIP_ROM_MB_21142_SIA: 4686 tlp_get_minst(sc); 4687 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA; 4688 4689 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4690 memset(tm, 0, sizeof(*tm)); 4691 4692 tm->tm_type = TULIP_ROM_MB_21142_SIA; 4693 tm->tm_get = tlp_sia_get; 4694 tm->tm_set = tlp_sia_set; 4695 4696 /* First is the media type code. */ 4697 tsti = tlp_srom_to_ifmedia(cp[0] & 4698 TULIP_ROM_MB_MEDIA_CODE); 4699 if (tsti == NULL) { 4700 /* Invalid media code. */ 4701 free(tm, M_DEVBUF); 4702 break; 4703 } 4704 4705 /* Get defaults. */ 4706 tlp_srom_media_info(sc, tsti, tm); 4707 4708 /* 4709 * Override our default SIA settings if the 4710 * SROM contains its own. 4711 */ 4712 if (cp[0] & 0x40) { 4713 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1); 4714 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3); 4715 tm->tm_siagen = TULIP_ROM_GETW(cp, 5); 4716 cp += 7; 4717 } else 4718 cp++; 4719 4720 /* Next is GPIO control/data. */ 4721 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0); 4722 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2); 4723 4724 ifmedia_add(&sc->sc_mii.mii_media, 4725 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4726 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4727 break; 4728 4729 case TULIP_ROM_MB_21142_MII: 4730 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII; 4731 4732 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4733 memset(tm, 0, sizeof(*tm)); 4734 4735 tm->tm_type = TULIP_ROM_MB_21142_MII; 4736 tm->tm_get = tlp_mii_getmedia; 4737 tm->tm_set = tlp_mii_setmedia; 4738 tm->tm_opmode = OPMODE_PS; 4739 4740 if (sc->sc_reset == NULL) 4741 sc->sc_reset = tlp_21142_reset; 4742 4743 /* First is the PHY number. */ 4744 tm->tm_phyno = *cp++; 4745 4746 /* Next is the MII select sequence length and offset. */ 4747 tm->tm_gp_length = *cp++; 4748 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4749 cp += tm->tm_gp_length * 2; 4750 4751 /* Next is the MII reset sequence length and offset. */ 4752 tm->tm_reset_length = *cp++; 4753 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4754 cp += tm->tm_reset_length * 2; 4755 4756 /* 4757 * The following items are left in the media block 4758 * that we don't particularly care about: 4759 * 4760 * capabilities W 4761 * advertisement W 4762 * full duplex W 4763 * tx threshold W 4764 * MII interrupt W 4765 * 4766 * These appear to be bits in the PHY registers, 4767 * which our MII code handles on its own. 4768 */ 4769 4770 /* 4771 * Before we probe the MII bus, we need to reset 4772 * it and issue the selection sequence. 4773 */ 4774 4775 ncp = &sc->sc_srom[tm->tm_reset_offset]; 4776 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 4777 delay(10); 4778 TULIP_WRITE(sc, CSR_SIAGEN, 4779 TULIP_ROM_GETW(ncp, 0) << 16); 4780 } 4781 4782 ncp = &sc->sc_srom[tm->tm_gp_offset]; 4783 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 4784 delay(10); 4785 TULIP_WRITE(sc, CSR_SIAGEN, 4786 TULIP_ROM_GETW(ncp, 0) << 16); 4787 } 4788 4789 /* If there were no sequences, just lower the pins. */ 4790 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4791 delay(10); 4792 TULIP_WRITE(sc, CSR_SIAGEN, 0); 4793 } 4794 4795 /* 4796 * Now, probe the MII for the PHY. Note, we know 4797 * the location of the PHY on the bus, but we don't 4798 * particularly care; the MII code just likes to 4799 * search the whole thing anyhow. 4800 */ 4801 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4802 MII_PHY_ANY, tm->tm_phyno, 0); 4803 4804 /* 4805 * Now, search for the PHY we hopefully just 4806 * configured. If it's not configured into the 4807 * kernel, we lose. The PHY's default media always 4808 * takes priority. 4809 */ 4810 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4811 phy != NULL; 4812 phy = LIST_NEXT(phy, mii_list)) 4813 if (phy->mii_offset == tm->tm_phyno) 4814 break; 4815 if (phy == NULL) { 4816 printf("%s: unable to configure MII\n", 4817 sc->sc_dev.dv_xname); 4818 break; 4819 } 4820 4821 sc->sc_flags |= TULIPF_HAS_MII; 4822 sc->sc_tick = tlp_mii_tick; 4823 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4824 phy->mii_inst); 4825 4826 /* 4827 * Okay, now that we've found the PHY and the MII 4828 * layer has added all of the media associated 4829 * with that PHY, we need to traverse the media 4830 * list, and add our `tm' to each entry's `aux' 4831 * pointer. 4832 * 4833 * We do this by looking for media with our 4834 * PHY's `instance'. 4835 */ 4836 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4837 ife != NULL; 4838 ife = TAILQ_NEXT(ife, ifm_list)) { 4839 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4840 continue; 4841 ife->ifm_aux = tm; 4842 } 4843 break; 4844 4845 case TULIP_ROM_MB_21143_SYM: 4846 tlp_get_minst(sc); 4847 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM; 4848 4849 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4850 memset(tm, 0, sizeof(*tm)); 4851 4852 tm->tm_type = TULIP_ROM_MB_21143_SYM; 4853 tm->tm_get = tlp_sia_get; 4854 tm->tm_set = tlp_sia_set; 4855 4856 /* First is the media type code. */ 4857 tsti = tlp_srom_to_ifmedia(cp[0] & 4858 TULIP_ROM_MB_MEDIA_CODE); 4859 if (tsti == NULL) { 4860 /* Invalid media code. */ 4861 free(tm, M_DEVBUF); 4862 break; 4863 } 4864 4865 /* Get defaults. */ 4866 tlp_srom_media_info(sc, tsti, tm); 4867 4868 /* Next is GPIO control/data. */ 4869 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1); 4870 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3); 4871 4872 /* 4873 * Next is a word containing OPMODE information 4874 * and info on how to detect if this media is 4875 * active. 4876 */ 4877 word = TULIP_ROM_GETW(cp, 5); 4878 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4879 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4880 tm->tm_actmask = 4881 TULIP_ROM_MB_BITPOS(word); 4882 tm->tm_actdata = 4883 (word & TULIP_ROM_MB_POLARITY) ? 4884 0 : tm->tm_actmask; 4885 } 4886 4887 ifmedia_add(&sc->sc_mii.mii_media, 4888 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4889 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4890 break; 4891 4892 case TULIP_ROM_MB_21143_RESET: 4893 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname); 4894 break; 4895 4896 default: 4897 printf("%s: unknown ISV media block type 0x%02x\n", 4898 sc->sc_dev.dv_xname, type); 4899 } 4900 } 4901 4902 /* 4903 * Deal with the case where no media is configured. 4904 */ 4905 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) { 4906 printf("%s: no media found!\n", sc->sc_dev.dv_xname); 4907 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 4908 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 4909 return; 4910 } 4911 4912 /* 4913 * Pick the default media. 4914 */ 4915 if (miidef != 0) 4916 defmedia = miidef; 4917 else { 4918 /* 4919 * XXX Pick a better default. Should come from SROM 4920 * XXX on 21140[A], and should be "auto" on 21142, 4921 * XXX 21143, and Macronix chips. 4922 */ 4923 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0); 4924 } 4925 4926 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4927 4928 /* 4929 * Display any non-MII media we've located. 4930 */ 4931 if (sc->sc_media_seen & 4932 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII))) 4933 tlp_print_media(sc); 4934 4935 tlp_sia_fixup(sc); 4936 } 4937 4938 void 4939 tlp_2114x_isv_tmsw_get(sc, ifmr) 4940 struct tulip_softc *sc; 4941 struct ifmediareq *ifmr; 4942 { 4943 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4944 struct tulip_21x4x_media *tm = ife->ifm_aux; 4945 4946 /* 4947 * We might be polling a non-MII autosense; check for that. 4948 */ 4949 if (tm == NULL) { 4950 #ifdef DIAGNOSTIC 4951 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4952 panic("tlp_2114x_isv_tmsw_get"); 4953 #endif 4954 tm = sc->sc_nway_active->ifm_aux; 4955 } 4956 4957 (*tm->tm_get)(sc, ifmr); 4958 } 4959 4960 int 4961 tlp_2114x_isv_tmsw_set(sc) 4962 struct tulip_softc *sc; 4963 { 4964 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4965 struct tulip_21x4x_media *tm = ife->ifm_aux; 4966 4967 /* 4968 * We might be setting a non-MII autosense; check for that. 4969 */ 4970 if (tm == NULL) { 4971 #ifdef DIAGNOSTIC 4972 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4973 panic("tlp_2114x_isv_tmsw_set"); 4974 #endif 4975 /* XXX XXX XXX */ 4976 } 4977 4978 /* 4979 * Check to see if we need to reset the chip, and do it. The 4980 * reset path will get the OPMODE register right the next 4981 * time through. 4982 */ 4983 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode)) 4984 return (tlp_init(&sc->sc_ethercom.ec_if)); 4985 4986 return ((*tm->tm_set)(sc)); 4987 } 4988 4989 /* 4990 * MII-on-SIO media switch. Handles only MII attached to the SIO. 4991 */ 4992 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 4993 4994 const struct tulip_mediasw tlp_sio_mii_mediasw = { 4995 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 4996 }; 4997 4998 void 4999 tlp_sio_mii_tmsw_init(sc) 5000 struct tulip_softc *sc; 5001 { 5002 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5003 5004 /* 5005 * We don't attach any media info structures to the ifmedia 5006 * entries, so if we're using a pre-init function that needs 5007 * that info, override it to one that doesn't. 5008 */ 5009 if (sc->sc_preinit == tlp_2114x_preinit) 5010 sc->sc_preinit = tlp_2114x_mii_preinit; 5011 5012 sc->sc_mii.mii_ifp = ifp; 5013 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5014 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5015 sc->sc_mii.mii_statchg = sc->sc_statchg; 5016 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5017 tlp_mediastatus); 5018 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5019 MII_OFFSET_ANY, 0); 5020 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5021 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5022 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5023 } else { 5024 sc->sc_flags |= TULIPF_HAS_MII; 5025 sc->sc_tick = tlp_mii_tick; 5026 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5027 } 5028 } 5029 5030 /* 5031 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 5032 */ 5033 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 5034 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 5035 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 5036 5037 const struct tulip_mediasw tlp_pnic_mediasw = { 5038 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 5039 }; 5040 5041 void tlp_pnic_nway_statchg __P((struct device *)); 5042 void tlp_pnic_nway_tick __P((void *)); 5043 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 5044 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 5045 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 5046 void tlp_pnic_nway_auto_timeout __P((void *)); 5047 void tlp_pnic_nway_status __P((struct tulip_softc *)); 5048 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 5049 5050 void 5051 tlp_pnic_tmsw_init(sc) 5052 struct tulip_softc *sc; 5053 { 5054 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5055 const char *sep = ""; 5056 5057 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 5058 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 5059 5060 sc->sc_mii.mii_ifp = ifp; 5061 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 5062 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 5063 sc->sc_mii.mii_statchg = sc->sc_statchg; 5064 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5065 tlp_mediastatus); 5066 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5067 MII_OFFSET_ANY, 0); 5068 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5069 /* XXX What about AUI/BNC support? */ 5070 printf("%s: ", sc->sc_dev.dv_xname); 5071 5072 tlp_pnic_nway_reset(sc); 5073 5074 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 5075 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 5076 PRINT("10baseT"); 5077 5078 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 5079 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 5080 PRINT("10baseT-FDX"); 5081 5082 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 5083 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 5084 PRINT("100baseTX"); 5085 5086 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 5087 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 5088 PNIC_NWAY_CAP100TXFDX); 5089 PRINT("100baseTX-FDX"); 5090 5091 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 5092 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 5093 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 5094 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 5095 PRINT("auto"); 5096 5097 printf("\n"); 5098 5099 sc->sc_statchg = tlp_pnic_nway_statchg; 5100 sc->sc_tick = tlp_pnic_nway_tick; 5101 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5102 } else { 5103 sc->sc_flags |= TULIPF_HAS_MII; 5104 sc->sc_tick = tlp_mii_tick; 5105 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5106 } 5107 5108 #undef ADD 5109 #undef PRINT 5110 } 5111 5112 void 5113 tlp_pnic_tmsw_get(sc, ifmr) 5114 struct tulip_softc *sc; 5115 struct ifmediareq *ifmr; 5116 { 5117 struct mii_data *mii = &sc->sc_mii; 5118 5119 if (sc->sc_flags & TULIPF_HAS_MII) 5120 tlp_mii_getmedia(sc, ifmr); 5121 else { 5122 mii->mii_media_status = 0; 5123 mii->mii_media_active = IFM_NONE; 5124 tlp_pnic_nway_service(sc, MII_POLLSTAT); 5125 ifmr->ifm_status = sc->sc_mii.mii_media_status; 5126 ifmr->ifm_active = sc->sc_mii.mii_media_active; 5127 } 5128 } 5129 5130 int 5131 tlp_pnic_tmsw_set(sc) 5132 struct tulip_softc *sc; 5133 { 5134 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5135 struct mii_data *mii = &sc->sc_mii; 5136 5137 if (sc->sc_flags & TULIPF_HAS_MII) { 5138 /* 5139 * Make sure the built-in Tx jabber timer is disabled. 5140 */ 5141 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 5142 5143 return (tlp_mii_setmedia(sc)); 5144 } 5145 5146 if (ifp->if_flags & IFF_UP) { 5147 mii->mii_media_status = 0; 5148 mii->mii_media_active = IFM_NONE; 5149 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 5150 } 5151 5152 return (0); 5153 } 5154 5155 void 5156 tlp_pnic_nway_statchg(self) 5157 struct device *self; 5158 { 5159 struct tulip_softc *sc = (struct tulip_softc *)self; 5160 5161 /* Idle the transmit and receive processes. */ 5162 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 5163 5164 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 5165 OPMODE_SCR|OPMODE_HBD); 5166 5167 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 5168 sc->sc_opmode |= OPMODE_TTM; 5169 TULIP_WRITE(sc, CSR_GPP, 5170 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 5171 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5172 } else { 5173 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD; 5174 TULIP_WRITE(sc, CSR_GPP, 5175 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 5176 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5177 } 5178 5179 if (sc->sc_mii.mii_media_active & IFM_FDX) 5180 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 5181 5182 /* 5183 * Write new OPMODE bits. This also restarts the transmit 5184 * and receive processes. 5185 */ 5186 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 5187 } 5188 5189 void 5190 tlp_pnic_nway_tick(arg) 5191 void *arg; 5192 { 5193 struct tulip_softc *sc = arg; 5194 int s; 5195 5196 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 5197 return; 5198 5199 s = splnet(); 5200 tlp_pnic_nway_service(sc, MII_TICK); 5201 splx(s); 5202 5203 callout_reset(&sc->sc_tick_callout, hz, tlp_pnic_nway_tick, sc); 5204 } 5205 5206 /* 5207 * Support for the Lite-On PNIC internal NWay block. This is constructed 5208 * somewhat like a PHY driver for simplicity. 5209 */ 5210 5211 int 5212 tlp_pnic_nway_service(sc, cmd) 5213 struct tulip_softc *sc; 5214 int cmd; 5215 { 5216 struct mii_data *mii = &sc->sc_mii; 5217 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5218 5219 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 5220 return (0); 5221 5222 switch (cmd) { 5223 case MII_POLLSTAT: 5224 /* Nothing special to do here. */ 5225 break; 5226 5227 case MII_MEDIACHG: 5228 switch (IFM_SUBTYPE(ife->ifm_media)) { 5229 case IFM_AUTO: 5230 (void) tlp_pnic_nway_auto(sc, 1); 5231 break; 5232 case IFM_100_T4: 5233 /* 5234 * XXX Not supported as a manual setting right now. 5235 */ 5236 return (EINVAL); 5237 default: 5238 /* 5239 * NWAY register data is stored in the ifmedia entry. 5240 */ 5241 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5242 } 5243 break; 5244 5245 case MII_TICK: 5246 /* 5247 * Only used for autonegotiation. 5248 */ 5249 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 5250 return (0); 5251 5252 /* 5253 * Check to see if we have link. If we do, we don't 5254 * need to restart the autonegotiation process. 5255 */ 5256 if (sc->sc_flags & TULIPF_LINK_UP) 5257 return (0); 5258 5259 /* 5260 * Only retry autonegotiation every 5 seconds. 5261 */ 5262 if (++sc->sc_nway_ticks != 5) 5263 return (0); 5264 5265 sc->sc_nway_ticks = 0; 5266 tlp_pnic_nway_reset(sc); 5267 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 5268 return (0); 5269 break; 5270 } 5271 5272 /* Update the media status. */ 5273 tlp_pnic_nway_status(sc); 5274 5275 /* Callback if something changed. */ 5276 if ((sc->sc_nway_active == NULL || 5277 sc->sc_nway_active->ifm_media != mii->mii_media_active) || 5278 cmd == MII_MEDIACHG) { 5279 (*sc->sc_statchg)(&sc->sc_dev); 5280 tlp_nway_activate(sc, mii->mii_media_active); 5281 } 5282 return (0); 5283 } 5284 5285 void 5286 tlp_pnic_nway_reset(sc) 5287 struct tulip_softc *sc; 5288 { 5289 5290 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 5291 delay(100); 5292 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 5293 } 5294 5295 int 5296 tlp_pnic_nway_auto(sc, waitfor) 5297 struct tulip_softc *sc; 5298 int waitfor; 5299 { 5300 struct mii_data *mii = &sc->sc_mii; 5301 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5302 u_int32_t reg; 5303 int i; 5304 5305 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 5306 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5307 5308 if (waitfor) { 5309 /* Wait 500ms for it to complete. */ 5310 for (i = 0; i < 500; i++) { 5311 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5312 if (reg & PNIC_NWAY_LPAR_MASK) { 5313 tlp_pnic_nway_acomp(sc); 5314 return (0); 5315 } 5316 delay(1000); 5317 } 5318 #if 0 5319 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5320 printf("%s: autonegotiation failed to complete\n", 5321 sc->sc_dev.dv_xname); 5322 #endif 5323 5324 /* 5325 * Don't need to worry about clearing DOINGAUTO. 5326 * If that's set, a timeout is pending, and it will 5327 * clear the flag. 5328 */ 5329 return (EIO); 5330 } 5331 5332 /* 5333 * Just let it finish asynchronously. This is for the benefit of 5334 * the tick handler driving autonegotiation. Don't want 500ms 5335 * delays all the time while the system is running! 5336 */ 5337 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 5338 sc->sc_flags |= TULIPF_DOINGAUTO; 5339 callout_reset(&sc->sc_nway_callout, hz >> 1, 5340 tlp_pnic_nway_auto_timeout, sc); 5341 } 5342 return (EJUSTRETURN); 5343 } 5344 5345 void 5346 tlp_pnic_nway_auto_timeout(arg) 5347 void *arg; 5348 { 5349 struct tulip_softc *sc = arg; 5350 u_int32_t reg; 5351 int s; 5352 5353 s = splnet(); 5354 sc->sc_flags &= ~TULIPF_DOINGAUTO; 5355 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5356 #if 0 5357 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5358 printf("%s: autonegotiation failed to complete\n", 5359 sc->sc_dev.dv_xname); 5360 #endif 5361 5362 tlp_pnic_nway_acomp(sc); 5363 5364 /* Update the media status. */ 5365 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 5366 splx(s); 5367 } 5368 5369 void 5370 tlp_pnic_nway_status(sc) 5371 struct tulip_softc *sc; 5372 { 5373 struct mii_data *mii = &sc->sc_mii; 5374 u_int32_t reg; 5375 5376 mii->mii_media_status = IFM_AVALID; 5377 mii->mii_media_active = IFM_ETHER; 5378 5379 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5380 5381 if (sc->sc_flags & TULIPF_LINK_UP) 5382 mii->mii_media_status |= IFM_ACTIVE; 5383 5384 if (reg & PNIC_NWAY_NW) { 5385 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 5386 /* Erg, still trying, I guess... */ 5387 mii->mii_media_active |= IFM_NONE; 5388 return; 5389 } 5390 5391 #if 0 5392 if (reg & PNIC_NWAY_LPAR100T4) 5393 mii->mii_media_active |= IFM_100_T4; 5394 else 5395 #endif 5396 if (reg & PNIC_NWAY_LPAR100TXFDX) 5397 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 5398 else if (reg & PNIC_NWAY_LPAR100TX) 5399 mii->mii_media_active |= IFM_100_TX; 5400 else if (reg & PNIC_NWAY_LPAR10TFDX) 5401 mii->mii_media_active |= IFM_10_T|IFM_FDX; 5402 else if (reg & PNIC_NWAY_LPAR10T) 5403 mii->mii_media_active |= IFM_10_T; 5404 else 5405 mii->mii_media_active |= IFM_NONE; 5406 } else { 5407 if (reg & PNIC_NWAY_100) 5408 mii->mii_media_active |= IFM_100_TX; 5409 else 5410 mii->mii_media_active |= IFM_10_T; 5411 if (reg & PNIC_NWAY_FD) 5412 mii->mii_media_active |= IFM_FDX; 5413 } 5414 } 5415 5416 void 5417 tlp_pnic_nway_acomp(sc) 5418 struct tulip_softc *sc; 5419 { 5420 u_int32_t reg; 5421 5422 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5423 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 5424 5425 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 5426 reg |= PNIC_NWAY_100; 5427 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 5428 reg |= PNIC_NWAY_FD; 5429 5430 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 5431 } 5432 5433 /* 5434 * Macronix PMAC and Lite-On PNIC-II media switch: 5435 * 5436 * MX98713 and MX98713A 21140-like MII or GPIO media. 5437 * 5438 * MX98713A 21143-like MII or SIA/SYM media. 5439 * 5440 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media. 5441 * 82C115, MX98715AEC-C, -E 5442 * 5443 * So, what we do here is fake MII-on-SIO or ISV media info, and 5444 * use the ISV media switch get/set functions to handle the rest. 5445 */ 5446 5447 void tlp_pmac_tmsw_init __P((struct tulip_softc *)); 5448 5449 const struct tulip_mediasw tlp_pmac_mediasw = { 5450 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 5451 }; 5452 5453 const struct tulip_mediasw tlp_pmac_mii_mediasw = { 5454 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5455 }; 5456 5457 void 5458 tlp_pmac_tmsw_init(sc) 5459 struct tulip_softc *sc; 5460 { 5461 static const u_int8_t media[] = { 5462 TULIP_ROM_MB_MEDIA_TP, 5463 TULIP_ROM_MB_MEDIA_TP_FDX, 5464 TULIP_ROM_MB_MEDIA_100TX, 5465 TULIP_ROM_MB_MEDIA_100TX_FDX, 5466 }; 5467 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5468 5469 sc->sc_mii.mii_ifp = ifp; 5470 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5471 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5472 sc->sc_mii.mii_statchg = sc->sc_statchg; 5473 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5474 tlp_mediastatus); 5475 if (sc->sc_chip == TULIP_CHIP_MX98713 || 5476 sc->sc_chip == TULIP_CHIP_MX98713A) { 5477 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 5478 MII_PHY_ANY, MII_OFFSET_ANY, 0); 5479 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) { 5480 sc->sc_flags |= TULIPF_HAS_MII; 5481 sc->sc_tick = tlp_mii_tick; 5482 sc->sc_preinit = tlp_2114x_mii_preinit; 5483 sc->sc_mediasw = &tlp_pmac_mii_mediasw; 5484 ifmedia_set(&sc->sc_mii.mii_media, 5485 IFM_ETHER|IFM_AUTO); 5486 return; 5487 } 5488 } 5489 5490 switch (sc->sc_chip) { 5491 case TULIP_CHIP_MX98713: 5492 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR, 5493 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4); 5494 5495 /* 5496 * XXX Should implement auto-sense for this someday, 5497 * XXX when we do the same for the 21140. 5498 */ 5499 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5500 break; 5501 5502 default: 5503 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA, 5504 tlp_sia_get, tlp_sia_set, media, 2); 5505 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM, 5506 tlp_sia_get, tlp_sia_set, media + 2, 2); 5507 5508 /* 5509 * XXX Autonegotiation not yet supported. 5510 */ 5511 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5512 break; 5513 } 5514 5515 tlp_print_media(sc); 5516 tlp_sia_fixup(sc); 5517 5518 /* Set the LED modes. */ 5519 tlp_pmac_reset(sc); 5520 5521 sc->sc_reset = tlp_pmac_reset; 5522 } 5523 5524 /* 5525 * ADMtek AL981 media switch. Only has internal PHY. 5526 */ 5527 void tlp_al981_tmsw_init __P((struct tulip_softc *)); 5528 5529 const struct tulip_mediasw tlp_al981_mediasw = { 5530 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5531 }; 5532 5533 void 5534 tlp_al981_tmsw_init(sc) 5535 struct tulip_softc *sc; 5536 { 5537 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5538 5539 sc->sc_mii.mii_ifp = ifp; 5540 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg; 5541 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg; 5542 sc->sc_mii.mii_statchg = sc->sc_statchg; 5543 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5544 tlp_mediastatus); 5545 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5546 MII_OFFSET_ANY, 0); 5547 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5548 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5549 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5550 } else { 5551 sc->sc_flags |= TULIPF_HAS_MII; 5552 sc->sc_tick = tlp_mii_tick; 5553 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5554 } 5555 } 5556 5557 /* 5558 * Davicom DM9102 media switch. Internal PHY and possibly HomePNA. 5559 */ 5560 void tlp_dm9102_tmsw_init __P((struct tulip_softc *)); 5561 void tlp_dm9102_tmsw_getmedia __P((struct tulip_softc *, 5562 struct ifmediareq *)); 5563 int tlp_dm9102_tmsw_setmedia __P((struct tulip_softc *)); 5564 5565 const struct tulip_mediasw tlp_dm9102_mediasw = { 5566 tlp_dm9102_tmsw_init, tlp_dm9102_tmsw_getmedia, 5567 tlp_dm9102_tmsw_setmedia 5568 }; 5569 5570 void 5571 tlp_dm9102_tmsw_init(sc) 5572 struct tulip_softc *sc; 5573 { 5574 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5575 u_int32_t opmode; 5576 5577 sc->sc_mii.mii_ifp = ifp; 5578 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5579 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5580 sc->sc_mii.mii_statchg = sc->sc_statchg; 5581 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5582 tlp_mediastatus); 5583 5584 /* PHY block already reset via tlp_reset(). */ 5585 5586 /* 5587 * Configure OPMODE properly for the internal MII interface. 5588 */ 5589 switch (sc->sc_chip) { 5590 case TULIP_CHIP_DM9102: 5591 opmode = OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 5592 break; 5593 5594 case TULIP_CHIP_DM9102A: 5595 opmode = OPMODE_MBO|OPMODE_HBD; 5596 break; 5597 5598 default: 5599 /* Nothing. */ 5600 } 5601 5602 TULIP_WRITE(sc, CSR_OPMODE, opmode); 5603 5604 /* Now, probe the internal MII for the internal PHY. */ 5605 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5606 MII_OFFSET_ANY, 0); 5607 5608 /* 5609 * XXX Figure out what to do about the HomePNA portion 5610 * XXX of the DM9102A. 5611 */ 5612 5613 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5614 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5615 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5616 } else { 5617 sc->sc_flags |= TULIPF_HAS_MII; 5618 sc->sc_tick = tlp_mii_tick; 5619 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5620 } 5621 } 5622 5623 void 5624 tlp_dm9102_tmsw_getmedia(sc, ifmr) 5625 struct tulip_softc *sc; 5626 struct ifmediareq *ifmr; 5627 { 5628 5629 /* XXX HomePNA on DM9102A. */ 5630 tlp_mii_getmedia(sc, ifmr); 5631 } 5632 5633 int 5634 tlp_dm9102_tmsw_setmedia(sc) 5635 struct tulip_softc *sc; 5636 { 5637 5638 /* XXX HomePNA on DM9102A. */ 5639 return (tlp_mii_setmedia(sc)); 5640 } 5641
Indexes created Wed Sep 24 05:09:52 GMT 2025