tulip.c revision 1.82
1 /* $NetBSD: tulip.c,v 1.82 2000/11/26 11:08:58 takemura Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/callout.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <machine/endian.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <net/if.h> 65 #include <net/if_dl.h> 66 #include <net/if_media.h> 67 #include <net/if_ether.h> 68 69 #if NBPFILTER > 0 70 #include <net/bpf.h> 71 #endif 72 73 #ifdef INET 74 #include <netinet/in.h> 75 #include <netinet/if_inarp.h> 76 #endif 77 78 #ifdef NS 79 #include <netns/ns.h> 80 #include <netns/ns_if.h> 81 #endif 82 83 #include <machine/bus.h> 84 #include <machine/intr.h> 85 86 #include <dev/mii/mii.h> 87 #include <dev/mii/miivar.h> 88 #include <dev/mii/mii_bitbang.h> 89 90 #include <dev/ic/tulipreg.h> 91 #include <dev/ic/tulipvar.h> 92 93 const char *tlp_chip_names[] = TULIP_CHIP_NAMES; 94 95 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = 96 TLP_TXTHRESH_TAB_10; 97 98 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = 99 TLP_TXTHRESH_TAB_10_100; 100 101 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = 102 TLP_TXTHRESH_TAB_WINB; 103 104 const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] = 105 TLP_TXTHRESH_TAB_DM9102; 106 107 void tlp_start __P((struct ifnet *)); 108 void tlp_watchdog __P((struct ifnet *)); 109 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 110 int tlp_init __P((struct ifnet *)); 111 void tlp_stop __P((struct ifnet *, int)); 112 113 void tlp_shutdown __P((void *)); 114 115 void tlp_reset __P((struct tulip_softc *)); 116 void tlp_rxdrain __P((struct tulip_softc *)); 117 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 118 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 119 void tlp_srom_idle __P((struct tulip_softc *)); 120 int tlp_srom_size __P((struct tulip_softc *)); 121 122 int tlp_enable __P((struct tulip_softc *)); 123 void tlp_disable __P((struct tulip_softc *)); 124 void tlp_power __P((int, void *)); 125 126 void tlp_filter_setup __P((struct tulip_softc *)); 127 void tlp_winb_filter_setup __P((struct tulip_softc *)); 128 void tlp_al981_filter_setup __P((struct tulip_softc *)); 129 130 void tlp_rxintr __P((struct tulip_softc *)); 131 void tlp_txintr __P((struct tulip_softc *)); 132 133 void tlp_mii_tick __P((void *)); 134 void tlp_mii_statchg __P((struct device *)); 135 void tlp_winb_mii_statchg __P((struct device *)); 136 void tlp_dm9102_mii_statchg __P((struct device *)); 137 138 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 139 int tlp_mii_setmedia __P((struct tulip_softc *)); 140 141 int tlp_bitbang_mii_readreg __P((struct device *, int, int)); 142 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int)); 143 144 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 145 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 146 147 int tlp_al981_mii_readreg __P((struct device *, int, int)); 148 void tlp_al981_mii_writereg __P((struct device *, int, int, int)); 149 150 void tlp_2114x_preinit __P((struct tulip_softc *)); 151 void tlp_2114x_mii_preinit __P((struct tulip_softc *)); 152 void tlp_pnic_preinit __P((struct tulip_softc *)); 153 void tlp_dm9102_preinit __P((struct tulip_softc *)); 154 155 void tlp_21140_reset __P((struct tulip_softc *)); 156 void tlp_21142_reset __P((struct tulip_softc *)); 157 void tlp_pmac_reset __P((struct tulip_softc *)); 158 void tlp_dm9102_reset __P((struct tulip_softc *)); 159 160 #define tlp_mchash(addr, sz) \ 161 (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1)) 162 163 /* 164 * MII bit-bang glue. 165 */ 166 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *)); 167 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t)); 168 169 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = { 170 tlp_sio_mii_bitbang_read, 171 tlp_sio_mii_bitbang_write, 172 { 173 MIIROM_MDO, /* MII_BIT_MDO */ 174 MIIROM_MDI, /* MII_BIT_MDI */ 175 MIIROM_MDC, /* MII_BIT_MDC */ 176 0, /* MII_BIT_DIR_HOST_PHY */ 177 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */ 178 } 179 }; 180 181 #ifdef TLP_DEBUG 182 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 183 printf x 184 #else 185 #define DPRINTF(sc, x) /* nothing */ 186 #endif 187 188 #ifdef TLP_STATS 189 void tlp_print_stats __P((struct tulip_softc *)); 190 #endif 191 192 /* 193 * Can be used to debug the SROM-related things, including contents. 194 * Initialized so that it's patchable. 195 */ 196 int tlp_srom_debug = 0; 197 198 /* 199 * tlp_attach: 200 * 201 * Attach a Tulip interface to the system. 202 */ 203 void 204 tlp_attach(sc, enaddr) 205 struct tulip_softc *sc; 206 const u_int8_t *enaddr; 207 { 208 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 209 int i, error; 210 211 callout_init(&sc->sc_nway_callout); 212 callout_init(&sc->sc_tick_callout); 213 214 /* 215 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 216 */ 217 218 /* 219 * Setup the transmit threshold table. 220 */ 221 switch (sc->sc_chip) { 222 case TULIP_CHIP_DE425: 223 case TULIP_CHIP_21040: 224 case TULIP_CHIP_21041: 225 sc->sc_txth = tlp_10_txthresh_tab; 226 break; 227 228 case TULIP_CHIP_DM9102: 229 case TULIP_CHIP_DM9102A: 230 sc->sc_txth = tlp_dm9102_txthresh_tab; 231 break; 232 233 default: 234 sc->sc_txth = tlp_10_100_txthresh_tab; 235 break; 236 } 237 238 /* 239 * Setup the filter setup function. 240 */ 241 switch (sc->sc_chip) { 242 case TULIP_CHIP_WB89C840F: 243 sc->sc_filter_setup = tlp_winb_filter_setup; 244 break; 245 246 case TULIP_CHIP_AL981: 247 case TULIP_CHIP_AN983: 248 case TULIP_CHIP_AN985: 249 sc->sc_filter_setup = tlp_al981_filter_setup; 250 break; 251 252 default: 253 sc->sc_filter_setup = tlp_filter_setup; 254 break; 255 } 256 257 /* 258 * Set up the media status change function. 259 */ 260 switch (sc->sc_chip) { 261 case TULIP_CHIP_WB89C840F: 262 sc->sc_statchg = tlp_winb_mii_statchg; 263 break; 264 265 case TULIP_CHIP_DM9102: 266 case TULIP_CHIP_DM9102A: 267 sc->sc_statchg = tlp_dm9102_mii_statchg; 268 break; 269 270 default: 271 /* 272 * We may override this if we have special media 273 * handling requirements (e.g. flipping GPIO pins). 274 * 275 * The pure-MII statchg function covers the basics. 276 */ 277 sc->sc_statchg = tlp_mii_statchg; 278 break; 279 } 280 281 /* 282 * Default to no FS|LS in setup packet descriptors. They're 283 * supposed to be zero according to the 21040 and 21143 284 * manuals, and some chips fall over badly if they're 285 * included. Yet, other chips seem to require them. Sigh. 286 */ 287 switch (sc->sc_chip) { 288 case TULIP_CHIP_X3201_3: 289 sc->sc_setup_fsls = TDCTL_Tx_FS|TDCTL_Tx_LS; 290 break; 291 292 default: 293 sc->sc_setup_fsls = 0; 294 } 295 296 /* 297 * Set up various chip-specific quirks. 298 * 299 * Note that wherever we can, we use the "ring" option for 300 * transmit and receive descriptors. This is because some 301 * clone chips apparently have problems when using chaining, 302 * although some *only* support chaining. 303 * 304 * What we do is always program the "next" pointer, and then 305 * conditionally set the TDCTL_CH and TDCTL_ER bits in the 306 * appropriate places. 307 */ 308 switch (sc->sc_chip) { 309 case TULIP_CHIP_21140: 310 case TULIP_CHIP_21140A: 311 case TULIP_CHIP_21142: 312 case TULIP_CHIP_21143: 313 case TULIP_CHIP_82C115: /* 21143-like */ 314 case TULIP_CHIP_MX98713: /* 21140-like */ 315 case TULIP_CHIP_MX98713A: /* 21143-like */ 316 case TULIP_CHIP_MX98715: /* 21143-like */ 317 case TULIP_CHIP_MX98715A: /* 21143-like */ 318 case TULIP_CHIP_MX98715AEC_X: /* 21143-like */ 319 case TULIP_CHIP_MX98725: /* 21143-like */ 320 /* 321 * Run these chips in ring mode. 322 */ 323 sc->sc_tdctl_ch = 0; 324 sc->sc_tdctl_er = TDCTL_ER; 325 sc->sc_preinit = tlp_2114x_preinit; 326 break; 327 328 case TULIP_CHIP_82C168: 329 case TULIP_CHIP_82C169: 330 /* 331 * Run these chips in ring mode. 332 */ 333 sc->sc_tdctl_ch = 0; 334 sc->sc_tdctl_er = TDCTL_ER; 335 sc->sc_preinit = tlp_pnic_preinit; 336 337 /* 338 * These chips seem to have busted DMA engines; just put them 339 * in Store-and-Forward mode from the get-go. 340 */ 341 sc->sc_txthresh = TXTH_SF; 342 break; 343 344 case TULIP_CHIP_WB89C840F: 345 /* 346 * Run this chip in chained mode. 347 */ 348 sc->sc_tdctl_ch = TDCTL_CH; 349 sc->sc_tdctl_er = 0; 350 sc->sc_flags |= TULIPF_IC_FS; 351 break; 352 353 case TULIP_CHIP_DM9102: 354 case TULIP_CHIP_DM9102A: 355 /* 356 * Run these chips in chained mode. 357 */ 358 sc->sc_tdctl_ch = TDCTL_CH; 359 sc->sc_tdctl_er = 0; 360 sc->sc_preinit = tlp_dm9102_preinit; 361 362 /* 363 * These chips have a broken bus interface, so we 364 * can't use any optimized bus commands. For this 365 * reason, we tend to underrun pretty quickly, so 366 * just to Store-and-Forward mode from the get-go. 367 */ 368 sc->sc_txthresh = TXTH_DM9102_SF; 369 break; 370 371 default: 372 /* 373 * Default to running in ring mode. 374 */ 375 sc->sc_tdctl_ch = 0; 376 sc->sc_tdctl_er = TDCTL_ER; 377 } 378 379 /* 380 * Set up the MII bit-bang operations. 381 */ 382 switch (sc->sc_chip) { 383 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */ 384 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 385 break; 386 387 default: 388 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 389 } 390 391 SIMPLEQ_INIT(&sc->sc_txfreeq); 392 SIMPLEQ_INIT(&sc->sc_txdirtyq); 393 394 /* 395 * Allocate the control data structures, and create and load the 396 * DMA map for it. 397 */ 398 if ((error = bus_dmamem_alloc(sc->sc_dmat, 399 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg, 400 1, &sc->sc_cdnseg, 0)) != 0) { 401 printf("%s: unable to allocate control data, error = %d\n", 402 sc->sc_dev.dv_xname, error); 403 goto fail_0; 404 } 405 406 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg, 407 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 408 BUS_DMA_COHERENT)) != 0) { 409 printf("%s: unable to map control data, error = %d\n", 410 sc->sc_dev.dv_xname, error); 411 goto fail_1; 412 } 413 414 if ((error = bus_dmamap_create(sc->sc_dmat, 415 sizeof(struct tulip_control_data), 1, 416 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 417 printf("%s: unable to create control data DMA map, " 418 "error = %d\n", sc->sc_dev.dv_xname, error); 419 goto fail_2; 420 } 421 422 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 423 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 424 0)) != 0) { 425 printf("%s: unable to load control data DMA map, error = %d\n", 426 sc->sc_dev.dv_xname, error); 427 goto fail_3; 428 } 429 430 /* 431 * Create the transmit buffer DMA maps. 432 * 433 * Note that on the Xircom clone, transmit buffers must be 434 * 4-byte aligned. We're almost guaranteed to have to copy 435 * the packet in that case, so we just limit ourselves to 436 * one segment. 437 * 438 * On the DM9102, the transmit logic can only handle one 439 * DMA segment. 440 */ 441 switch (sc->sc_chip) { 442 case TULIP_CHIP_X3201_3: 443 case TULIP_CHIP_DM9102: 444 case TULIP_CHIP_DM9102A: 445 sc->sc_ntxsegs = 1; 446 break; 447 448 default: 449 sc->sc_ntxsegs = TULIP_NTXSEGS; 450 } 451 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 452 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 453 sc->sc_ntxsegs, MCLBYTES, 0, 0, 454 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 455 printf("%s: unable to create tx DMA map %d, " 456 "error = %d\n", sc->sc_dev.dv_xname, i, error); 457 goto fail_4; 458 } 459 } 460 461 /* 462 * Create the recieve buffer DMA maps. 463 */ 464 for (i = 0; i < TULIP_NRXDESC; i++) { 465 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 466 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 467 printf("%s: unable to create rx DMA map %d, " 468 "error = %d\n", sc->sc_dev.dv_xname, i, error); 469 goto fail_5; 470 } 471 sc->sc_rxsoft[i].rxs_mbuf = NULL; 472 } 473 474 /* 475 * From this point forward, the attachment cannot fail. A failure 476 * before this point releases all resources that may have been 477 * allocated. 478 */ 479 sc->sc_flags |= TULIPF_ATTACHED; 480 481 /* 482 * Reset the chip to a known state. 483 */ 484 tlp_reset(sc); 485 486 /* Announce ourselves. */ 487 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 488 sc->sc_name[0] != '\0' ? sc->sc_name : "", 489 sc->sc_name[0] != '\0' ? ", " : "", 490 ether_sprintf(enaddr)); 491 492 /* 493 * Initialize our media structures. This may probe the MII, if 494 * present. 495 */ 496 (*sc->sc_mediasw->tmsw_init)(sc); 497 498 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 499 ifp->if_softc = sc; 500 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 501 ifp->if_ioctl = tlp_ioctl; 502 ifp->if_start = tlp_start; 503 ifp->if_watchdog = tlp_watchdog; 504 ifp->if_init = tlp_init; 505 ifp->if_stop = tlp_stop; 506 507 /* 508 * We can support 802.1Q VLAN-sized frames. 509 */ 510 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 511 512 /* 513 * Attach the interface. 514 */ 515 if_attach(ifp); 516 ether_ifattach(ifp, enaddr); 517 #if NRND > 0 518 rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname, 519 RND_TYPE_NET, 0); 520 #endif 521 522 /* 523 * Make sure the interface is shutdown during reboot. 524 */ 525 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 526 if (sc->sc_sdhook == NULL) 527 printf("%s: WARNING: unable to establish shutdown hook\n", 528 sc->sc_dev.dv_xname); 529 530 /* 531 * Add a suspend hook to make sure we come back up after a 532 * resume. 533 */ 534 sc->sc_powerhook = powerhook_establish(tlp_power, sc); 535 if (sc->sc_powerhook == NULL) 536 printf("%s: WARNING: unable to establish power hook\n", 537 sc->sc_dev.dv_xname); 538 return; 539 540 /* 541 * Free any resources we've allocated during the failed attach 542 * attempt. Do this in reverse order and fall through. 543 */ 544 fail_5: 545 for (i = 0; i < TULIP_NRXDESC; i++) { 546 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 547 bus_dmamap_destroy(sc->sc_dmat, 548 sc->sc_rxsoft[i].rxs_dmamap); 549 } 550 fail_4: 551 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 552 if (sc->sc_txsoft[i].txs_dmamap != NULL) 553 bus_dmamap_destroy(sc->sc_dmat, 554 sc->sc_txsoft[i].txs_dmamap); 555 } 556 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 557 fail_3: 558 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 559 fail_2: 560 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 561 sizeof(struct tulip_control_data)); 562 fail_1: 563 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 564 fail_0: 565 return; 566 } 567 568 /* 569 * tlp_activate: 570 * 571 * Handle device activation/deactivation requests. 572 */ 573 int 574 tlp_activate(self, act) 575 struct device *self; 576 enum devact act; 577 { 578 struct tulip_softc *sc = (void *) self; 579 int s, error = 0; 580 581 s = splnet(); 582 switch (act) { 583 case DVACT_ACTIVATE: 584 error = EOPNOTSUPP; 585 break; 586 587 case DVACT_DEACTIVATE: 588 if (sc->sc_flags & TULIPF_HAS_MII) 589 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 590 MII_OFFSET_ANY); 591 if_deactivate(&sc->sc_ethercom.ec_if); 592 break; 593 } 594 splx(s); 595 596 return (error); 597 } 598 599 /* 600 * tlp_detach: 601 * 602 * Detach a Tulip interface. 603 */ 604 int 605 tlp_detach(sc) 606 struct tulip_softc *sc; 607 { 608 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 609 struct tulip_rxsoft *rxs; 610 struct tulip_txsoft *txs; 611 int i; 612 613 /* 614 * Suceed now if there isn't any work to do. 615 */ 616 if ((sc->sc_flags & TULIPF_ATTACHED) == 0) 617 return (0); 618 619 /* Unhook our tick handler. */ 620 if (sc->sc_tick) 621 callout_stop(&sc->sc_tick_callout); 622 623 if (sc->sc_flags & TULIPF_HAS_MII) { 624 /* Detach all PHYs */ 625 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 626 } 627 628 /* Delete all remaining media. */ 629 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 630 631 #if NRND > 0 632 rnd_detach_source(&sc->sc_rnd_source); 633 #endif 634 ether_ifdetach(ifp); 635 if_detach(ifp); 636 637 for (i = 0; i < TULIP_NRXDESC; i++) { 638 rxs = &sc->sc_rxsoft[i]; 639 if (rxs->rxs_mbuf != NULL) { 640 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 641 m_freem(rxs->rxs_mbuf); 642 rxs->rxs_mbuf = NULL; 643 } 644 bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap); 645 } 646 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 647 txs = &sc->sc_txsoft[i]; 648 if (txs->txs_mbuf != NULL) { 649 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 650 m_freem(txs->txs_mbuf); 651 txs->txs_mbuf = NULL; 652 } 653 bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap); 654 } 655 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 656 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 657 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 658 sizeof(struct tulip_control_data)); 659 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 660 661 shutdownhook_disestablish(sc->sc_sdhook); 662 powerhook_disestablish(sc->sc_powerhook); 663 664 if (sc->sc_srom) 665 free(sc->sc_srom, M_DEVBUF); 666 667 return (0); 668 } 669 670 /* 671 * tlp_shutdown: 672 * 673 * Make sure the interface is stopped at reboot time. 674 */ 675 void 676 tlp_shutdown(arg) 677 void *arg; 678 { 679 struct tulip_softc *sc = arg; 680 681 tlp_stop(&sc->sc_ethercom.ec_if, 1); 682 } 683 684 /* 685 * tlp_start: [ifnet interface function] 686 * 687 * Start packet transmission on the interface. 688 */ 689 void 690 tlp_start(ifp) 691 struct ifnet *ifp; 692 { 693 struct tulip_softc *sc = ifp->if_softc; 694 struct mbuf *m0, *m; 695 struct tulip_txsoft *txs, *last_txs; 696 bus_dmamap_t dmamap; 697 int error, firsttx, nexttx, lasttx, ofree, seg; 698 699 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 700 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 701 702 /* 703 * If we want a filter setup, it means no more descriptors were 704 * available for the setup routine. Let it get a chance to wedge 705 * itself into the ring. 706 */ 707 if (sc->sc_flags & TULIPF_WANT_SETUP) 708 ifp->if_flags |= IFF_OACTIVE; 709 710 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 711 return; 712 713 /* 714 * Remember the previous number of free descriptors and 715 * the first descriptor we'll use. 716 */ 717 ofree = sc->sc_txfree; 718 firsttx = sc->sc_txnext; 719 720 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 721 sc->sc_dev.dv_xname, ofree, firsttx)); 722 723 /* 724 * Loop through the send queue, setting up transmit descriptors 725 * until we drain the queue, or use up all available transmit 726 * descriptors. 727 */ 728 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 729 sc->sc_txfree != 0) { 730 /* 731 * Grab a packet off the queue. 732 */ 733 IF_DEQUEUE(&ifp->if_snd, m0); 734 if (m0 == NULL) 735 break; 736 737 dmamap = txs->txs_dmamap; 738 739 /* 740 * Load the DMA map. If this fails, the packet either 741 * didn't fit in the alloted number of segments, or we were 742 * short on resources. In this case, we'll copy and try 743 * again. 744 * 745 * Note that if we're only allowed 1 Tx segment, we 746 * have an alignment restriction. Do this test before 747 * attempting to load the DMA map, because it's more 748 * likely we'll trip the alignment test than the 749 * more-than-one-segment test. 750 */ 751 if ((sc->sc_ntxsegs == 1 && (mtod(m0, bus_addr_t) & 3) != 0) || 752 bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 753 BUS_DMA_NOWAIT) != 0) { 754 MGETHDR(m, M_DONTWAIT, MT_DATA); 755 if (m == NULL) { 756 printf("%s: unable to allocate Tx mbuf\n", 757 sc->sc_dev.dv_xname); 758 IF_PREPEND(&ifp->if_snd, m0); 759 break; 760 } 761 if (m0->m_pkthdr.len > MHLEN) { 762 MCLGET(m, M_DONTWAIT); 763 if ((m->m_flags & M_EXT) == 0) { 764 printf("%s: unable to allocate Tx " 765 "cluster\n", sc->sc_dev.dv_xname); 766 m_freem(m); 767 IF_PREPEND(&ifp->if_snd, m0); 768 break; 769 } 770 } 771 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 772 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 773 m_freem(m0); 774 m0 = m; 775 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 776 m0, BUS_DMA_NOWAIT); 777 if (error) { 778 printf("%s: unable to load Tx buffer, " 779 "error = %d\n", sc->sc_dev.dv_xname, error); 780 IF_PREPEND(&ifp->if_snd, m0); 781 break; 782 } 783 } 784 785 /* 786 * Ensure we have enough descriptors free to describe 787 * the packet. 788 */ 789 if (dmamap->dm_nsegs > sc->sc_txfree) { 790 /* 791 * Not enough free descriptors to transmit this 792 * packet. We haven't committed to anything yet, 793 * so just unload the DMA map, put the packet 794 * back on the queue, and punt. Notify the upper 795 * layer that there are no more slots left. 796 * 797 * XXX We could allocate an mbuf and copy, but 798 * XXX it is worth it? 799 */ 800 ifp->if_flags |= IFF_OACTIVE; 801 bus_dmamap_unload(sc->sc_dmat, dmamap); 802 IF_PREPEND(&ifp->if_snd, m0); 803 break; 804 } 805 806 /* 807 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 808 */ 809 810 /* Sync the DMA map. */ 811 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 812 BUS_DMASYNC_PREWRITE); 813 814 /* 815 * Initialize the transmit descriptors. 816 */ 817 for (nexttx = sc->sc_txnext, seg = 0; 818 seg < dmamap->dm_nsegs; 819 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 820 /* 821 * If this is the first descriptor we're 822 * enqueueing, don't set the OWN bit just 823 * yet. That could cause a race condition. 824 * We'll do it below. 825 */ 826 sc->sc_txdescs[nexttx].td_status = 827 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN); 828 sc->sc_txdescs[nexttx].td_bufaddr1 = 829 htole32(dmamap->dm_segs[seg].ds_addr); 830 sc->sc_txdescs[nexttx].td_ctl = 831 htole32((dmamap->dm_segs[seg].ds_len << 832 TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch | 833 (nexttx == (TULIP_NTXDESC - 1) ? 834 sc->sc_tdctl_er : 0)); 835 lasttx = nexttx; 836 } 837 838 /* Set `first segment' and `last segment' appropriately. */ 839 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS); 840 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS); 841 842 #ifdef TLP_DEBUG 843 if (ifp->if_flags & IFF_DEBUG) { 844 printf(" txsoft %p transmit chain:\n", txs); 845 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 846 printf(" descriptor %d:\n", seg); 847 printf(" td_status: 0x%08x\n", 848 le32toh(sc->sc_txdescs[seg].td_status)); 849 printf(" td_ctl: 0x%08x\n", 850 le32toh(sc->sc_txdescs[seg].td_ctl)); 851 printf(" td_bufaddr1: 0x%08x\n", 852 le32toh(sc->sc_txdescs[seg].td_bufaddr1)); 853 printf(" td_bufaddr2: 0x%08x\n", 854 le32toh(sc->sc_txdescs[seg].td_bufaddr2)); 855 if (seg == lasttx) 856 break; 857 } 858 } 859 #endif 860 861 /* Sync the descriptors we're using. */ 862 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 863 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 864 865 /* 866 * Store a pointer to the packet so we can free it later, 867 * and remember what txdirty will be once the packet is 868 * done. 869 */ 870 txs->txs_mbuf = m0; 871 txs->txs_firstdesc = sc->sc_txnext; 872 txs->txs_lastdesc = lasttx; 873 txs->txs_ndescs = dmamap->dm_nsegs; 874 875 /* Advance the tx pointer. */ 876 sc->sc_txfree -= dmamap->dm_nsegs; 877 sc->sc_txnext = nexttx; 878 879 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 880 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 881 882 last_txs = txs; 883 884 #if NBPFILTER > 0 885 /* 886 * Pass the packet to any BPF listeners. 887 */ 888 if (ifp->if_bpf) 889 bpf_mtap(ifp->if_bpf, m0); 890 #endif /* NBPFILTER > 0 */ 891 } 892 893 if (txs == NULL || sc->sc_txfree == 0) { 894 /* No more slots left; notify upper layer. */ 895 ifp->if_flags |= IFF_OACTIVE; 896 } 897 898 if (sc->sc_txfree != ofree) { 899 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 900 sc->sc_dev.dv_xname, lasttx, firsttx)); 901 /* 902 * Cause a transmit interrupt to happen on the 903 * last packet we enqueued. 904 */ 905 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC); 906 TULIP_CDTXSYNC(sc, lasttx, 1, 907 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 908 909 /* 910 * Some clone chips want IC on the *first* segment in 911 * the packet. Appease them. 912 */ 913 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 914 last_txs->txs_firstdesc != lasttx) { 915 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 916 htole32(TDCTL_Tx_IC); 917 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 918 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 919 } 920 921 /* 922 * The entire packet chain is set up. Give the 923 * first descriptor to the chip now. 924 */ 925 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN); 926 TULIP_CDTXSYNC(sc, firsttx, 1, 927 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 928 929 /* Wake up the transmitter. */ 930 /* XXX USE AUTOPOLLING? */ 931 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 932 933 /* Set a watchdog timer in case the chip flakes out. */ 934 ifp->if_timer = 5; 935 } 936 } 937 938 /* 939 * tlp_watchdog: [ifnet interface function] 940 * 941 * Watchdog timer handler. 942 */ 943 void 944 tlp_watchdog(ifp) 945 struct ifnet *ifp; 946 { 947 struct tulip_softc *sc = ifp->if_softc; 948 int doing_setup, doing_transmit; 949 950 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 951 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 952 953 if (doing_setup && doing_transmit) { 954 printf("%s: filter setup and transmit timeout\n", 955 sc->sc_dev.dv_xname); 956 ifp->if_oerrors++; 957 } else if (doing_transmit) { 958 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 959 ifp->if_oerrors++; 960 } else if (doing_setup) 961 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 962 else 963 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 964 965 (void) tlp_init(ifp); 966 967 /* Try to get more packets going. */ 968 tlp_start(ifp); 969 } 970 971 /* 972 * tlp_ioctl: [ifnet interface function] 973 * 974 * Handle control requests from the operator. 975 */ 976 int 977 tlp_ioctl(ifp, cmd, data) 978 struct ifnet *ifp; 979 u_long cmd; 980 caddr_t data; 981 { 982 struct tulip_softc *sc = ifp->if_softc; 983 struct ifreq *ifr = (struct ifreq *)data; 984 int s, error; 985 986 s = splnet(); 987 988 switch (cmd) { 989 case SIOCSIFMEDIA: 990 case SIOCGIFMEDIA: 991 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 992 break; 993 994 default: 995 error = ether_ioctl(ifp, cmd, data); 996 if (error == ENETRESET) { 997 if (TULIP_IS_ENABLED(sc)) { 998 /* 999 * Multicast list has changed. Set the 1000 * hardware filter accordingly. 1001 */ 1002 (*sc->sc_filter_setup)(sc); 1003 } 1004 error = 0; 1005 } 1006 break; 1007 } 1008 1009 /* Try to get more packets going. */ 1010 if (TULIP_IS_ENABLED(sc)) 1011 tlp_start(ifp); 1012 1013 splx(s); 1014 return (error); 1015 } 1016 1017 /* 1018 * tlp_intr: 1019 * 1020 * Interrupt service routine. 1021 */ 1022 int 1023 tlp_intr(arg) 1024 void *arg; 1025 { 1026 struct tulip_softc *sc = arg; 1027 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1028 u_int32_t status, rxstatus, txstatus; 1029 int handled = 0, txthresh; 1030 1031 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 1032 1033 #ifdef DEBUG 1034 if (TULIP_IS_ENABLED(sc) == 0) 1035 panic("%s: tlp_intr: not enabled\n", sc->sc_dev.dv_xname); 1036 #endif 1037 1038 /* 1039 * If the interface isn't running, the interrupt couldn't 1040 * possibly have come from us. 1041 */ 1042 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1043 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1044 return (0); 1045 1046 /* Disable interrupts on the DM9102 (interrupt edge bug). */ 1047 switch (sc->sc_chip) { 1048 case TULIP_CHIP_DM9102: 1049 case TULIP_CHIP_DM9102A: 1050 TULIP_WRITE(sc, CSR_INTEN, 0); 1051 break; 1052 1053 default: 1054 /* Nothing. */ 1055 } 1056 1057 for (;;) { 1058 status = TULIP_READ(sc, CSR_STATUS); 1059 if (status) 1060 TULIP_WRITE(sc, CSR_STATUS, status); 1061 1062 if ((status & sc->sc_inten) == 0) 1063 break; 1064 1065 handled = 1; 1066 1067 rxstatus = status & sc->sc_rxint_mask; 1068 txstatus = status & sc->sc_txint_mask; 1069 1070 if (rxstatus) { 1071 /* Grab new any new packets. */ 1072 tlp_rxintr(sc); 1073 1074 if (rxstatus & STATUS_RWT) 1075 printf("%s: receive watchdog timeout\n", 1076 sc->sc_dev.dv_xname); 1077 1078 if (rxstatus & STATUS_RU) { 1079 printf("%s: receive ring overrun\n", 1080 sc->sc_dev.dv_xname); 1081 /* Get the receive process going again. */ 1082 if (sc->sc_tdctl_er != TDCTL_ER) { 1083 tlp_idle(sc, OPMODE_SR); 1084 TULIP_WRITE(sc, CSR_RXLIST, 1085 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1086 TULIP_WRITE(sc, CSR_OPMODE, 1087 sc->sc_opmode); 1088 } 1089 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1090 break; 1091 } 1092 } 1093 1094 if (txstatus) { 1095 /* Sweep up transmit descriptors. */ 1096 tlp_txintr(sc); 1097 1098 if (txstatus & STATUS_TJT) 1099 printf("%s: transmit jabber timeout\n", 1100 sc->sc_dev.dv_xname); 1101 1102 if (txstatus & STATUS_UNF) { 1103 /* 1104 * Increase our transmit threshold if 1105 * another is available. 1106 */ 1107 txthresh = sc->sc_txthresh + 1; 1108 if (sc->sc_txth[txthresh].txth_name != NULL) { 1109 /* Idle the transmit process. */ 1110 tlp_idle(sc, OPMODE_ST); 1111 1112 sc->sc_txthresh = txthresh; 1113 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 1114 sc->sc_opmode |= 1115 sc->sc_txth[txthresh].txth_opmode; 1116 printf("%s: transmit underrun; new " 1117 "threshold: %s\n", 1118 sc->sc_dev.dv_xname, 1119 sc->sc_txth[txthresh].txth_name); 1120 1121 /* 1122 * Set the new threshold and restart 1123 * the transmit process. 1124 */ 1125 TULIP_WRITE(sc, CSR_OPMODE, 1126 sc->sc_opmode); 1127 } 1128 /* 1129 * XXX Log every Nth underrun from 1130 * XXX now on? 1131 */ 1132 } 1133 } 1134 1135 if (status & (STATUS_TPS|STATUS_RPS)) { 1136 if (status & STATUS_TPS) 1137 printf("%s: transmit process stopped\n", 1138 sc->sc_dev.dv_xname); 1139 if (status & STATUS_RPS) 1140 printf("%s: receive process stopped\n", 1141 sc->sc_dev.dv_xname); 1142 (void) tlp_init(ifp); 1143 break; 1144 } 1145 1146 if (status & STATUS_SE) { 1147 const char *str; 1148 switch (status & STATUS_EB) { 1149 case STATUS_EB_PARITY: 1150 str = "parity error"; 1151 break; 1152 1153 case STATUS_EB_MABT: 1154 str = "master abort"; 1155 break; 1156 1157 case STATUS_EB_TABT: 1158 str = "target abort"; 1159 break; 1160 1161 default: 1162 str = "unknown error"; 1163 break; 1164 } 1165 printf("%s: fatal system error: %s\n", 1166 sc->sc_dev.dv_xname, str); 1167 (void) tlp_init(ifp); 1168 break; 1169 } 1170 1171 /* 1172 * Not handled: 1173 * 1174 * Transmit buffer unavailable -- normal 1175 * condition, nothing to do, really. 1176 * 1177 * General purpose timer experied -- we don't 1178 * use the general purpose timer. 1179 * 1180 * Early receive interrupt -- not available on 1181 * all chips, we just use RI. We also only 1182 * use single-segment receive DMA, so this 1183 * is mostly useless. 1184 */ 1185 } 1186 1187 /* Bring interrupts back up on the DM9102. */ 1188 switch (sc->sc_chip) { 1189 case TULIP_CHIP_DM9102: 1190 case TULIP_CHIP_DM9102A: 1191 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1192 break; 1193 1194 default: 1195 /* Nothing. */ 1196 } 1197 1198 /* Try to get more packets going. */ 1199 tlp_start(ifp); 1200 1201 #if NRND > 0 1202 if (handled) 1203 rnd_add_uint32(&sc->sc_rnd_source, status); 1204 #endif 1205 return (handled); 1206 } 1207 1208 /* 1209 * tlp_rxintr: 1210 * 1211 * Helper; handle receive interrupts. 1212 */ 1213 void 1214 tlp_rxintr(sc) 1215 struct tulip_softc *sc; 1216 { 1217 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1218 struct ether_header *eh; 1219 struct tulip_rxsoft *rxs; 1220 struct mbuf *m; 1221 u_int32_t rxstat; 1222 int i, len; 1223 1224 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 1225 rxs = &sc->sc_rxsoft[i]; 1226 1227 TULIP_CDRXSYNC(sc, i, 1228 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1229 1230 rxstat = le32toh(sc->sc_rxdescs[i].td_status); 1231 1232 if (rxstat & TDSTAT_OWN) { 1233 /* 1234 * We have processed all of the receive buffers. 1235 */ 1236 break; 1237 } 1238 1239 /* 1240 * Make sure the packet fit in one buffer. This should 1241 * always be the case. But the Lite-On PNIC, rev 33 1242 * has an awful receive engine bug, which may require 1243 * a very icky work-around. 1244 */ 1245 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1246 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1247 printf("%s: incoming packet spilled, resetting\n", 1248 sc->sc_dev.dv_xname); 1249 (void) tlp_init(ifp); 1250 return; 1251 } 1252 1253 /* 1254 * If any collisions were seen on the wire, count one. 1255 */ 1256 if (rxstat & TDSTAT_Rx_CS) 1257 ifp->if_collisions++; 1258 1259 /* 1260 * If an error occured, update stats, clear the status 1261 * word, and leave the packet buffer in place. It will 1262 * simply be reused the next time the ring comes around. 1263 * If 802.1Q VLAN MTU is enabled, ignore the Frame Too Long 1264 * error. 1265 */ 1266 if (rxstat & TDSTAT_ES && 1267 ((sc->sc_ethercom.ec_capenable & ETHERCAP_VLAN_MTU) == 0 || 1268 (rxstat & (TDSTAT_Rx_DE | TDSTAT_Rx_RF | TDSTAT_Rx_RE | 1269 TDSTAT_Rx_DB | TDSTAT_Rx_CE)) != 0)) { 1270 #define PRINTERR(bit, str) \ 1271 if (rxstat & (bit)) \ 1272 printf("%s: receive error: %s\n", \ 1273 sc->sc_dev.dv_xname, str) 1274 ifp->if_ierrors++; 1275 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1276 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1277 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1278 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1279 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1280 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1281 #undef PRINTERR 1282 TULIP_INIT_RXDESC(sc, i); 1283 continue; 1284 } 1285 1286 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1287 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1288 1289 /* 1290 * No errors; receive the packet. Note the Tulip 1291 * includes the CRC with every packet. 1292 */ 1293 len = TDSTAT_Rx_LENGTH(rxstat); 1294 1295 #ifdef __NO_STRICT_ALIGNMENT 1296 /* 1297 * Allocate a new mbuf cluster. If that fails, we are 1298 * out of memory, and must drop the packet and recycle 1299 * the buffer that's already attached to this descriptor. 1300 */ 1301 m = rxs->rxs_mbuf; 1302 if (tlp_add_rxbuf(sc, i) != 0) { 1303 ifp->if_ierrors++; 1304 TULIP_INIT_RXDESC(sc, i); 1305 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1306 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1307 continue; 1308 } 1309 #else 1310 /* 1311 * The Tulip's receive buffers must be 4-byte aligned. 1312 * But this means that the data after the Ethernet header 1313 * is misaligned. We must allocate a new buffer and 1314 * copy the data, shifted forward 2 bytes. 1315 */ 1316 MGETHDR(m, M_DONTWAIT, MT_DATA); 1317 if (m == NULL) { 1318 dropit: 1319 ifp->if_ierrors++; 1320 TULIP_INIT_RXDESC(sc, i); 1321 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1322 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1323 continue; 1324 } 1325 if (len > (MHLEN - 2)) { 1326 MCLGET(m, M_DONTWAIT); 1327 if ((m->m_flags & M_EXT) == 0) { 1328 m_freem(m); 1329 goto dropit; 1330 } 1331 } 1332 m->m_data += 2; 1333 1334 /* 1335 * Note that we use clusters for incoming frames, so the 1336 * buffer is virtually contiguous. 1337 */ 1338 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1339 1340 /* Allow the receive descriptor to continue using its mbuf. */ 1341 TULIP_INIT_RXDESC(sc, i); 1342 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1343 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1344 #endif /* __NO_STRICT_ALIGNMENT */ 1345 1346 ifp->if_ipackets++; 1347 eh = mtod(m, struct ether_header *); 1348 m->m_flags |= M_HASFCS; 1349 m->m_pkthdr.rcvif = ifp; 1350 m->m_pkthdr.len = m->m_len = len; 1351 1352 #if NBPFILTER > 0 1353 /* 1354 * Pass this up to any BPF listeners, but only 1355 * pass it up the stack if its for us. 1356 */ 1357 if (ifp->if_bpf) 1358 bpf_mtap(ifp->if_bpf, m); 1359 #endif /* NPBFILTER > 0 */ 1360 1361 /* 1362 * We sometimes have to run the 21140 in Hash-Only 1363 * mode. If we're in that mode, and not in promiscuous 1364 * mode, and we have a unicast packet that isn't for 1365 * us, then drop it. 1366 */ 1367 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY && 1368 (ifp->if_flags & IFF_PROMISC) == 0 && 1369 ETHER_IS_MULTICAST(eh->ether_dhost) == 0 && 1370 memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1371 ETHER_ADDR_LEN) != 0) { 1372 m_freem(m); 1373 continue; 1374 } 1375 1376 /* Pass it on. */ 1377 (*ifp->if_input)(ifp, m); 1378 } 1379 1380 /* Update the recieve pointer. */ 1381 sc->sc_rxptr = i; 1382 } 1383 1384 /* 1385 * tlp_txintr: 1386 * 1387 * Helper; handle transmit interrupts. 1388 */ 1389 void 1390 tlp_txintr(sc) 1391 struct tulip_softc *sc; 1392 { 1393 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1394 struct tulip_txsoft *txs; 1395 u_int32_t txstat; 1396 1397 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1398 sc->sc_dev.dv_xname, sc->sc_flags)); 1399 1400 ifp->if_flags &= ~IFF_OACTIVE; 1401 1402 /* 1403 * Go through our Tx list and free mbufs for those 1404 * frames that have been transmitted. 1405 */ 1406 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1407 TULIP_CDTXSYNC(sc, txs->txs_lastdesc, 1408 txs->txs_ndescs, 1409 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1410 1411 #ifdef TLP_DEBUG 1412 if (ifp->if_flags & IFF_DEBUG) { 1413 int i; 1414 printf(" txsoft %p transmit chain:\n", txs); 1415 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1416 printf(" descriptor %d:\n", i); 1417 printf(" td_status: 0x%08x\n", 1418 le32toh(sc->sc_txdescs[i].td_status)); 1419 printf(" td_ctl: 0x%08x\n", 1420 le32toh(sc->sc_txdescs[i].td_ctl)); 1421 printf(" td_bufaddr1: 0x%08x\n", 1422 le32toh(sc->sc_txdescs[i].td_bufaddr1)); 1423 printf(" td_bufaddr2: 0x%08x\n", 1424 le32toh(sc->sc_txdescs[i].td_bufaddr2)); 1425 if (i == txs->txs_lastdesc) 1426 break; 1427 } 1428 } 1429 #endif 1430 1431 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status); 1432 if (txstat & TDSTAT_OWN) 1433 break; 1434 1435 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1436 1437 sc->sc_txfree += txs->txs_ndescs; 1438 1439 if (txs->txs_mbuf == NULL) { 1440 /* 1441 * If we didn't have an mbuf, it was the setup 1442 * packet. 1443 */ 1444 #ifdef DIAGNOSTIC 1445 if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1446 panic("tlp_txintr: null mbuf, not doing setup"); 1447 #endif 1448 TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE); 1449 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1450 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1451 continue; 1452 } 1453 1454 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1455 0, txs->txs_dmamap->dm_mapsize, 1456 BUS_DMASYNC_POSTWRITE); 1457 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1458 m_freem(txs->txs_mbuf); 1459 txs->txs_mbuf = NULL; 1460 1461 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1462 1463 /* 1464 * Check for errors and collisions. 1465 */ 1466 #ifdef TLP_STATS 1467 if (txstat & TDSTAT_Tx_UF) 1468 sc->sc_stats.ts_tx_uf++; 1469 if (txstat & TDSTAT_Tx_TO) 1470 sc->sc_stats.ts_tx_to++; 1471 if (txstat & TDSTAT_Tx_EC) 1472 sc->sc_stats.ts_tx_ec++; 1473 if (txstat & TDSTAT_Tx_LC) 1474 sc->sc_stats.ts_tx_lc++; 1475 #endif 1476 1477 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO)) 1478 ifp->if_oerrors++; 1479 1480 if (txstat & TDSTAT_Tx_EC) 1481 ifp->if_collisions += 16; 1482 else 1483 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1484 if (txstat & TDSTAT_Tx_LC) 1485 ifp->if_collisions++; 1486 1487 ifp->if_opackets++; 1488 } 1489 1490 /* 1491 * If there are no more pending transmissions, cancel the watchdog 1492 * timer. 1493 */ 1494 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1495 ifp->if_timer = 0; 1496 1497 /* 1498 * If we have a receive filter setup pending, do it now. 1499 */ 1500 if (sc->sc_flags & TULIPF_WANT_SETUP) 1501 (*sc->sc_filter_setup)(sc); 1502 } 1503 1504 #ifdef TLP_STATS 1505 void 1506 tlp_print_stats(sc) 1507 struct tulip_softc *sc; 1508 { 1509 1510 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n", 1511 sc->sc_dev.dv_xname, 1512 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to, 1513 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc); 1514 } 1515 #endif 1516 1517 /* 1518 * tlp_reset: 1519 * 1520 * Perform a soft reset on the Tulip. 1521 */ 1522 void 1523 tlp_reset(sc) 1524 struct tulip_softc *sc; 1525 { 1526 int i; 1527 1528 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1529 1530 /* 1531 * Xircom clone doesn't bring itself out of reset automatically. 1532 * Instead, we have to wait at least 50 PCI cycles, and then 1533 * clear SWR. 1534 */ 1535 if (sc->sc_chip == TULIP_CHIP_X3201_3) { 1536 delay(10); 1537 TULIP_WRITE(sc, CSR_BUSMODE, 0); 1538 } 1539 1540 for (i = 0; i < 1000; i++) { 1541 /* 1542 * Wait at least 50 PCI cycles for the reset to 1543 * complete before peeking at the Tulip again. 1544 * 10 uSec is a bit longer than 50 PCI cycles 1545 * (at 33MHz), but it doesn't hurt have the extra 1546 * wait. 1547 */ 1548 delay(10); 1549 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1550 break; 1551 } 1552 1553 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1554 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1555 1556 delay(1000); 1557 1558 /* 1559 * If the board has any GPIO reset sequences to issue, do them now. 1560 */ 1561 if (sc->sc_reset != NULL) 1562 (*sc->sc_reset)(sc); 1563 } 1564 1565 /* 1566 * tlp_init: [ ifnet interface function ] 1567 * 1568 * Initialize the interface. Must be called at splnet(). 1569 */ 1570 int 1571 tlp_init(ifp) 1572 struct ifnet *ifp; 1573 { 1574 struct tulip_softc *sc = ifp->if_softc; 1575 struct tulip_txsoft *txs; 1576 struct tulip_rxsoft *rxs; 1577 int i, error = 0; 1578 1579 if ((error = tlp_enable(sc)) != 0) 1580 goto out; 1581 1582 /* 1583 * Cancel any pending I/O. 1584 */ 1585 tlp_stop(ifp, 0); 1586 1587 /* 1588 * Initialize `opmode' to 0, and call the pre-init routine, if 1589 * any. This is required because the 2114x and some of the 1590 * clones require that the media-related bits in `opmode' be 1591 * set before performing a soft-reset in order to get internal 1592 * chip pathways are correct. Yay! 1593 */ 1594 sc->sc_opmode = 0; 1595 if (sc->sc_preinit != NULL) 1596 (*sc->sc_preinit)(sc); 1597 1598 /* 1599 * Reset the Tulip to a known state. 1600 */ 1601 tlp_reset(sc); 1602 1603 /* 1604 * Initialize the BUSMODE register. 1605 */ 1606 sc->sc_busmode = BUSMODE_BAR; 1607 switch (sc->sc_chip) { 1608 case TULIP_CHIP_21140: 1609 case TULIP_CHIP_21140A: 1610 case TULIP_CHIP_21142: 1611 case TULIP_CHIP_21143: 1612 case TULIP_CHIP_82C115: 1613 case TULIP_CHIP_MX98725: 1614 /* 1615 * If we're allowed to do so, use Memory Read Line 1616 * and Memory Read Multiple. 1617 * 1618 * XXX Should we use Memory Write and Invalidate? 1619 */ 1620 if (sc->sc_flags & TULIPF_MRL) 1621 sc->sc_busmode |= BUSMODE_RLE; 1622 if (sc->sc_flags & TULIPF_MRM) 1623 sc->sc_busmode |= BUSMODE_RME; 1624 #if 0 1625 if (sc->sc_flags & TULIPF_MWI) 1626 sc->sc_busmode |= BUSMODE_WLE; 1627 #endif 1628 break; 1629 1630 case TULIP_CHIP_82C168: 1631 case TULIP_CHIP_82C169: 1632 sc->sc_busmode |= BUSMODE_PNIC_MBO; 1633 if (sc->sc_maxburst == 0) 1634 sc->sc_maxburst = 16; 1635 break; 1636 1637 default: 1638 /* Nothing. */ 1639 } 1640 switch (sc->sc_cacheline) { 1641 default: 1642 /* 1643 * Note: We must *always* set these bits; a cache 1644 * alignment of 0 is RESERVED. 1645 */ 1646 case 8: 1647 sc->sc_busmode |= BUSMODE_CAL_8LW; 1648 break; 1649 case 16: 1650 sc->sc_busmode |= BUSMODE_CAL_16LW; 1651 break; 1652 case 32: 1653 sc->sc_busmode |= BUSMODE_CAL_32LW; 1654 break; 1655 } 1656 switch (sc->sc_maxburst) { 1657 case 1: 1658 sc->sc_busmode |= BUSMODE_PBL_1LW; 1659 break; 1660 case 2: 1661 sc->sc_busmode |= BUSMODE_PBL_2LW; 1662 break; 1663 case 4: 1664 sc->sc_busmode |= BUSMODE_PBL_4LW; 1665 break; 1666 case 8: 1667 sc->sc_busmode |= BUSMODE_PBL_8LW; 1668 break; 1669 case 16: 1670 sc->sc_busmode |= BUSMODE_PBL_16LW; 1671 break; 1672 case 32: 1673 sc->sc_busmode |= BUSMODE_PBL_32LW; 1674 break; 1675 default: 1676 sc->sc_busmode |= BUSMODE_PBL_DEFAULT; 1677 break; 1678 } 1679 #if BYTE_ORDER == BIG_ENDIAN 1680 /* 1681 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips 1682 * support them, and even on ones that do, it doesn't 1683 * always work. So we always access descriptors with 1684 * little endian via htole32/le32toh. 1685 */ 1686 #endif 1687 /* 1688 * Big-endian bus requires BUSMODE_BLE anyway. 1689 * Also, BUSMODE_DBO is needed because we assume 1690 * descriptors are little endian. 1691 */ 1692 if (sc->sc_flags & TULIPF_BLE) 1693 sc->sc_busmode |= BUSMODE_BLE; 1694 if (sc->sc_flags & TULIPF_DBO) 1695 sc->sc_busmode |= BUSMODE_DBO; 1696 1697 /* 1698 * Some chips have a broken bus interface. 1699 */ 1700 switch (sc->sc_chip) { 1701 case TULIP_CHIP_DM9102: 1702 case TULIP_CHIP_DM9102A: 1703 sc->sc_busmode = 0; 1704 break; 1705 1706 default: 1707 /* Nothing. */ 1708 } 1709 1710 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1711 1712 /* 1713 * Initialize the OPMODE register. We don't write it until 1714 * we're ready to begin the transmit and receive processes. 1715 * 1716 * Media-related OPMODE bits are set in the media callbacks 1717 * for each specific chip/board. 1718 */ 1719 sc->sc_opmode |= OPMODE_SR | OPMODE_ST | 1720 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1721 1722 /* 1723 * Magical mystery initialization on the Macronix chips. 1724 * The MX98713 uses its own magic value, the rest share 1725 * a common one. 1726 */ 1727 switch (sc->sc_chip) { 1728 case TULIP_CHIP_MX98713: 1729 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1730 break; 1731 1732 case TULIP_CHIP_MX98713A: 1733 case TULIP_CHIP_MX98715: 1734 case TULIP_CHIP_MX98715A: 1735 case TULIP_CHIP_MX98715AEC_X: 1736 case TULIP_CHIP_MX98725: 1737 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1738 break; 1739 1740 default: 1741 /* Nothing. */ 1742 } 1743 1744 /* 1745 * Initialize the transmit descriptor ring. 1746 */ 1747 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1748 for (i = 0; i < TULIP_NTXDESC; i++) { 1749 sc->sc_txdescs[i].td_ctl = htole32(sc->sc_tdctl_ch); 1750 sc->sc_txdescs[i].td_bufaddr2 = 1751 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i))); 1752 } 1753 sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er); 1754 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1755 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1756 sc->sc_txfree = TULIP_NTXDESC; 1757 sc->sc_txnext = 0; 1758 1759 /* 1760 * Initialize the transmit job descriptors. 1761 */ 1762 SIMPLEQ_INIT(&sc->sc_txfreeq); 1763 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1764 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1765 txs = &sc->sc_txsoft[i]; 1766 txs->txs_mbuf = NULL; 1767 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1768 } 1769 1770 /* 1771 * Initialize the receive descriptor and receive job 1772 * descriptor rings. 1773 */ 1774 for (i = 0; i < TULIP_NRXDESC; i++) { 1775 rxs = &sc->sc_rxsoft[i]; 1776 if (rxs->rxs_mbuf == NULL) { 1777 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1778 printf("%s: unable to allocate or map rx " 1779 "buffer %d, error = %d\n", 1780 sc->sc_dev.dv_xname, i, error); 1781 /* 1782 * XXX Should attempt to run with fewer receive 1783 * XXX buffers instead of just failing. 1784 */ 1785 tlp_rxdrain(sc); 1786 goto out; 1787 } 1788 } 1789 } 1790 sc->sc_rxptr = 0; 1791 1792 /* 1793 * Initialize the interrupt mask and enable interrupts. 1794 */ 1795 /* normal interrupts */ 1796 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1797 1798 /* abnormal interrupts */ 1799 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1800 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1801 1802 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1803 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1804 1805 switch (sc->sc_chip) { 1806 case TULIP_CHIP_WB89C840F: 1807 /* 1808 * Clear bits that we don't want that happen to 1809 * overlap or don't exist. 1810 */ 1811 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1812 break; 1813 1814 default: 1815 /* Nothing. */ 1816 } 1817 1818 sc->sc_rxint_mask &= sc->sc_inten; 1819 sc->sc_txint_mask &= sc->sc_inten; 1820 1821 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1822 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1823 1824 /* 1825 * Give the transmit and receive rings to the Tulip. 1826 */ 1827 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1828 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1829 1830 /* 1831 * On chips that do this differently, set the station address. 1832 */ 1833 switch (sc->sc_chip) { 1834 case TULIP_CHIP_WB89C840F: 1835 { 1836 /* XXX Do this with stream writes? */ 1837 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1838 1839 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1840 bus_space_write_1(sc->sc_st, sc->sc_sh, 1841 cpa + i, LLADDR(ifp->if_sadl)[i]); 1842 } 1843 break; 1844 } 1845 1846 case TULIP_CHIP_AL981: 1847 case TULIP_CHIP_AN983: 1848 case TULIP_CHIP_AN985: 1849 { 1850 u_int32_t reg; 1851 u_int8_t *enaddr = LLADDR(ifp->if_sadl); 1852 1853 reg = enaddr[0] | 1854 (enaddr[1] << 8) | 1855 (enaddr[2] << 16) | 1856 (enaddr[3] << 24); 1857 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg); 1858 1859 reg = enaddr[4] | 1860 (enaddr[5] << 8); 1861 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg); 1862 } 1863 1864 default: 1865 /* Nothing. */ 1866 } 1867 1868 /* 1869 * Set the receive filter. This will start the transmit and 1870 * receive processes. 1871 */ 1872 (*sc->sc_filter_setup)(sc); 1873 1874 /* 1875 * Set the current media. 1876 */ 1877 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1878 1879 /* 1880 * Start the receive process. 1881 */ 1882 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1883 1884 if (sc->sc_tick != NULL) { 1885 /* Start the one second clock. */ 1886 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 1887 } 1888 1889 /* 1890 * Note that the interface is now running. 1891 */ 1892 ifp->if_flags |= IFF_RUNNING; 1893 ifp->if_flags &= ~IFF_OACTIVE; 1894 1895 out: 1896 if (error) { 1897 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1898 ifp->if_timer = 0; 1899 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1900 } 1901 return (error); 1902 } 1903 1904 /* 1905 * tlp_enable: 1906 * 1907 * Enable the Tulip chip. 1908 */ 1909 int 1910 tlp_enable(sc) 1911 struct tulip_softc *sc; 1912 { 1913 1914 if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) { 1915 if ((*sc->sc_enable)(sc) != 0) { 1916 printf("%s: device enable failed\n", 1917 sc->sc_dev.dv_xname); 1918 return (EIO); 1919 } 1920 sc->sc_flags |= TULIPF_ENABLED; 1921 } 1922 return (0); 1923 } 1924 1925 /* 1926 * tlp_disable: 1927 * 1928 * Disable the Tulip chip. 1929 */ 1930 void 1931 tlp_disable(sc) 1932 struct tulip_softc *sc; 1933 { 1934 1935 if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) { 1936 (*sc->sc_disable)(sc); 1937 sc->sc_flags &= ~TULIPF_ENABLED; 1938 } 1939 } 1940 1941 /* 1942 * tlp_power: 1943 * 1944 * Power management (suspend/resume) hook. 1945 */ 1946 void 1947 tlp_power(why, arg) 1948 int why; 1949 void *arg; 1950 { 1951 struct tulip_softc *sc = arg; 1952 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1953 int s; 1954 1955 s = splnet(); 1956 switch (why) { 1957 case PWR_SUSPEND: 1958 case PWR_STANDBY: 1959 tlp_stop(ifp, 0); 1960 if (sc->sc_power != NULL) 1961 (*sc->sc_power)(sc, why); 1962 break; 1963 case PWR_RESUME: 1964 if (ifp->if_flags & IFF_UP) { 1965 if (sc->sc_power != NULL) 1966 (*sc->sc_power)(sc, why); 1967 tlp_init(ifp); 1968 } 1969 break; 1970 case PWR_SOFTSUSPEND: 1971 case PWR_SOFTSTANDBY: 1972 case PWR_SOFTRESUME: 1973 break; 1974 } 1975 splx(s); 1976 } 1977 1978 /* 1979 * tlp_rxdrain: 1980 * 1981 * Drain the receive queue. 1982 */ 1983 void 1984 tlp_rxdrain(sc) 1985 struct tulip_softc *sc; 1986 { 1987 struct tulip_rxsoft *rxs; 1988 int i; 1989 1990 for (i = 0; i < TULIP_NRXDESC; i++) { 1991 rxs = &sc->sc_rxsoft[i]; 1992 if (rxs->rxs_mbuf != NULL) { 1993 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1994 m_freem(rxs->rxs_mbuf); 1995 rxs->rxs_mbuf = NULL; 1996 } 1997 } 1998 } 1999 2000 /* 2001 * tlp_stop: [ ifnet interface function ] 2002 * 2003 * Stop transmission on the interface. 2004 */ 2005 void 2006 tlp_stop(ifp, disable) 2007 struct ifnet *ifp; 2008 int disable; 2009 { 2010 struct tulip_softc *sc = ifp->if_softc; 2011 struct tulip_txsoft *txs; 2012 2013 if (sc->sc_tick != NULL) { 2014 /* Stop the one second clock. */ 2015 callout_stop(&sc->sc_tick_callout); 2016 } 2017 2018 if (sc->sc_flags & TULIPF_HAS_MII) { 2019 /* Down the MII. */ 2020 mii_down(&sc->sc_mii); 2021 } 2022 2023 /* Disable interrupts. */ 2024 TULIP_WRITE(sc, CSR_INTEN, 0); 2025 2026 /* Stop the transmit and receive processes. */ 2027 sc->sc_opmode = 0; 2028 TULIP_WRITE(sc, CSR_OPMODE, 0); 2029 TULIP_WRITE(sc, CSR_RXLIST, 0); 2030 TULIP_WRITE(sc, CSR_TXLIST, 0); 2031 2032 /* 2033 * Release any queued transmit buffers. 2034 */ 2035 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 2036 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 2037 if (txs->txs_mbuf != NULL) { 2038 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 2039 m_freem(txs->txs_mbuf); 2040 txs->txs_mbuf = NULL; 2041 } 2042 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 2043 } 2044 2045 if (disable) { 2046 tlp_rxdrain(sc); 2047 tlp_disable(sc); 2048 } 2049 2050 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 2051 2052 /* 2053 * Mark the interface down and cancel the watchdog timer. 2054 */ 2055 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2056 ifp->if_timer = 0; 2057 } 2058 2059 #define SROM_EMIT(sc, x) \ 2060 do { \ 2061 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2062 delay(2); \ 2063 } while (0) 2064 2065 /* 2066 * tlp_srom_idle: 2067 * 2068 * Put the SROM in idle state. 2069 */ 2070 void 2071 tlp_srom_idle(sc) 2072 struct tulip_softc *sc; 2073 { 2074 u_int32_t miirom; 2075 int i; 2076 2077 miirom = MIIROM_SR; 2078 SROM_EMIT(sc, miirom); 2079 2080 miirom |= MIIROM_RD; 2081 SROM_EMIT(sc, miirom); 2082 2083 miirom |= MIIROM_SROMCS; 2084 SROM_EMIT(sc, miirom); 2085 2086 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2087 2088 /* Strobe the clock 32 times. */ 2089 for (i = 0; i < 32; i++) { 2090 SROM_EMIT(sc, miirom); 2091 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2092 } 2093 2094 SROM_EMIT(sc, miirom); 2095 2096 miirom &= ~MIIROM_SROMCS; 2097 SROM_EMIT(sc, miirom); 2098 2099 SROM_EMIT(sc, 0); 2100 } 2101 2102 /* 2103 * tlp_srom_size: 2104 * 2105 * Determine the number of address bits in the SROM. 2106 */ 2107 int 2108 tlp_srom_size(sc) 2109 struct tulip_softc *sc; 2110 { 2111 u_int32_t miirom; 2112 int x; 2113 2114 /* Select the SROM. */ 2115 miirom = MIIROM_SR; 2116 SROM_EMIT(sc, miirom); 2117 2118 miirom |= MIIROM_RD; 2119 SROM_EMIT(sc, miirom); 2120 2121 /* Send CHIP SELECT for one clock tick. */ 2122 miirom |= MIIROM_SROMCS; 2123 SROM_EMIT(sc, miirom); 2124 2125 /* Shift in the READ opcode. */ 2126 for (x = 3; x > 0; x--) { 2127 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2128 miirom |= MIIROM_SROMDI; 2129 else 2130 miirom &= ~MIIROM_SROMDI; 2131 SROM_EMIT(sc, miirom); 2132 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2133 SROM_EMIT(sc, miirom); 2134 } 2135 2136 /* Shift in address and look for dummy 0 bit. */ 2137 for (x = 1; x <= 12; x++) { 2138 miirom &= ~MIIROM_SROMDI; 2139 SROM_EMIT(sc, miirom); 2140 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2141 if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2142 break; 2143 SROM_EMIT(sc, miirom); 2144 } 2145 2146 /* Clear CHIP SELECT. */ 2147 miirom &= ~MIIROM_SROMCS; 2148 SROM_EMIT(sc, miirom); 2149 2150 /* Deselect the SROM. */ 2151 SROM_EMIT(sc, 0); 2152 2153 if (x < 4 || x > 12) { 2154 printf("%s: broken MicroWire interface detected; " 2155 "setting SROM size to 1Kb\n", sc->sc_dev.dv_xname); 2156 return (6); 2157 } else { 2158 if (tlp_srom_debug) 2159 printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n", 2160 sc->sc_dev.dv_xname, x, (1 << (x + 4)) >> 3); 2161 return (x); 2162 } 2163 } 2164 2165 /* 2166 * tlp_read_srom: 2167 * 2168 * Read the Tulip SROM. 2169 */ 2170 int 2171 tlp_read_srom(sc) 2172 struct tulip_softc *sc; 2173 { 2174 int size; 2175 u_int32_t miirom; 2176 u_int16_t datain; 2177 int i, x; 2178 2179 tlp_srom_idle(sc); 2180 2181 sc->sc_srom_addrbits = tlp_srom_size(sc); 2182 if (sc->sc_srom_addrbits == 0) 2183 return (0); 2184 size = TULIP_ROM_SIZE(sc->sc_srom_addrbits); 2185 sc->sc_srom = malloc(size, M_DEVBUF, M_NOWAIT); 2186 2187 /* Select the SROM. */ 2188 miirom = MIIROM_SR; 2189 SROM_EMIT(sc, miirom); 2190 2191 miirom |= MIIROM_RD; 2192 SROM_EMIT(sc, miirom); 2193 2194 for (i = 0; i < size; i += 2) { 2195 /* Send CHIP SELECT for one clock tick. */ 2196 miirom |= MIIROM_SROMCS; 2197 SROM_EMIT(sc, miirom); 2198 2199 /* Shift in the READ opcode. */ 2200 for (x = 3; x > 0; x--) { 2201 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2202 miirom |= MIIROM_SROMDI; 2203 else 2204 miirom &= ~MIIROM_SROMDI; 2205 SROM_EMIT(sc, miirom); 2206 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2207 SROM_EMIT(sc, miirom); 2208 } 2209 2210 /* Shift in address. */ 2211 for (x = sc->sc_srom_addrbits; x > 0; x--) { 2212 if (i & (1 << x)) 2213 miirom |= MIIROM_SROMDI; 2214 else 2215 miirom &= ~MIIROM_SROMDI; 2216 SROM_EMIT(sc, miirom); 2217 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2218 SROM_EMIT(sc, miirom); 2219 } 2220 2221 /* Shift out data. */ 2222 miirom &= ~MIIROM_SROMDI; 2223 datain = 0; 2224 for (x = 16; x > 0; x--) { 2225 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2226 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2227 datain |= (1 << (x - 1)); 2228 SROM_EMIT(sc, miirom); 2229 } 2230 sc->sc_srom[i] = datain & 0xff; 2231 sc->sc_srom[i + 1] = datain >> 8; 2232 2233 /* Clear CHIP SELECT. */ 2234 miirom &= ~MIIROM_SROMCS; 2235 SROM_EMIT(sc, miirom); 2236 } 2237 2238 /* Deselect the SROM. */ 2239 SROM_EMIT(sc, 0); 2240 2241 /* ...and idle it. */ 2242 tlp_srom_idle(sc); 2243 2244 if (tlp_srom_debug) { 2245 printf("SROM CONTENTS:"); 2246 for (i = 0; i < size; i++) { 2247 if ((i % 8) == 0) 2248 printf("\n\t"); 2249 printf("0x%02x ", sc->sc_srom[i]); 2250 } 2251 printf("\n"); 2252 } 2253 2254 return (1); 2255 } 2256 2257 #undef SROM_EMIT 2258 2259 /* 2260 * tlp_add_rxbuf: 2261 * 2262 * Add a receive buffer to the indicated descriptor. 2263 */ 2264 int 2265 tlp_add_rxbuf(sc, idx) 2266 struct tulip_softc *sc; 2267 int idx; 2268 { 2269 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 2270 struct mbuf *m; 2271 int error; 2272 2273 MGETHDR(m, M_DONTWAIT, MT_DATA); 2274 if (m == NULL) 2275 return (ENOBUFS); 2276 2277 MCLGET(m, M_DONTWAIT); 2278 if ((m->m_flags & M_EXT) == 0) { 2279 m_freem(m); 2280 return (ENOBUFS); 2281 } 2282 2283 if (rxs->rxs_mbuf != NULL) 2284 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 2285 2286 rxs->rxs_mbuf = m; 2287 2288 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 2289 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 2290 if (error) { 2291 printf("%s: can't load rx DMA map %d, error = %d\n", 2292 sc->sc_dev.dv_xname, idx, error); 2293 panic("tlp_add_rxbuf"); /* XXX */ 2294 } 2295 2296 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 2297 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 2298 2299 TULIP_INIT_RXDESC(sc, idx); 2300 2301 return (0); 2302 } 2303 2304 /* 2305 * tlp_srom_crcok: 2306 * 2307 * Check the CRC of the Tulip SROM. 2308 */ 2309 int 2310 tlp_srom_crcok(romdata) 2311 const u_int8_t *romdata; 2312 { 2313 u_int32_t crc; 2314 2315 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM); 2316 crc = (crc & 0xffff) ^ 0xffff; 2317 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 2318 return (1); 2319 2320 /* 2321 * Try an alternate checksum. 2322 */ 2323 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1); 2324 crc = (crc & 0xffff) ^ 0xffff; 2325 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1)) 2326 return (1); 2327 2328 return (0); 2329 } 2330 2331 /* 2332 * tlp_isv_srom: 2333 * 2334 * Check to see if the SROM is in the new standardized format. 2335 */ 2336 int 2337 tlp_isv_srom(romdata) 2338 const u_int8_t *romdata; 2339 { 2340 int i; 2341 u_int16_t cksum; 2342 2343 if (tlp_srom_crcok(romdata)) { 2344 /* 2345 * SROM CRC checks out; must be in the new format. 2346 */ 2347 return (1); 2348 } 2349 2350 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); 2351 if (cksum == 0xffff || cksum == 0) { 2352 /* 2353 * No checksum present. Check the SROM ID; 18 bytes of 0 2354 * followed by 1 (version) followed by the number of 2355 * adapters which use this SROM (should be non-zero). 2356 */ 2357 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { 2358 if (romdata[i] != 0) 2359 return (0); 2360 } 2361 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) 2362 return (0); 2363 if (romdata[TULIP_ROM_CHIP_COUNT] == 0) 2364 return (0); 2365 return (1); 2366 } 2367 2368 return (0); 2369 } 2370 2371 /* 2372 * tlp_isv_srom_enaddr: 2373 * 2374 * Get the Ethernet address from an ISV SROM. 2375 */ 2376 int 2377 tlp_isv_srom_enaddr(sc, enaddr) 2378 struct tulip_softc *sc; 2379 u_int8_t *enaddr; 2380 { 2381 int i, devcnt; 2382 2383 if (tlp_isv_srom(sc->sc_srom) == 0) 2384 return (0); 2385 2386 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 2387 for (i = 0; i < devcnt; i++) { 2388 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 2389 break; 2390 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 2391 sc->sc_devno) 2392 break; 2393 } 2394 2395 if (i == devcnt) 2396 return (0); 2397 2398 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], 2399 ETHER_ADDR_LEN); 2400 enaddr[5] += i; 2401 2402 return (1); 2403 } 2404 2405 /* 2406 * tlp_parse_old_srom: 2407 * 2408 * Parse old-format SROMs. 2409 * 2410 * This routine is largely lifted from Matt Thomas's `de' driver. 2411 */ 2412 int 2413 tlp_parse_old_srom(sc, enaddr) 2414 struct tulip_softc *sc; 2415 u_int8_t *enaddr; 2416 { 2417 static const u_int8_t testpat[] = 2418 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 2419 int i; 2420 u_int32_t cksum; 2421 2422 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 2423 /* 2424 * Some vendors (e.g. ZNYX) don't use the standard 2425 * DEC Address ROM format, but rather just have an 2426 * Ethernet address in the first 6 bytes, maybe a 2427 * 2 byte checksum, and then all 0xff's. 2428 * 2429 * On the other hand, Cobalt Networks interfaces 2430 * simply have the address in the first six bytes 2431 * with the rest zeroed out. 2432 */ 2433 for (i = 8; i < 32; i++) { 2434 if (sc->sc_srom[i] != 0xff && 2435 sc->sc_srom[i] != 0) 2436 return (0); 2437 } 2438 2439 /* 2440 * Sanity check the Ethernet address: 2441 * 2442 * - Make sure it's not multicast or locally 2443 * assigned 2444 * - Make sure it has a non-0 OUI 2445 */ 2446 if (sc->sc_srom[0] & 3) 2447 return (0); 2448 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 2449 sc->sc_srom[2] == 0) 2450 return (0); 2451 2452 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2453 return (1); 2454 } 2455 2456 /* 2457 * Standard DEC Address ROM test. 2458 */ 2459 2460 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 2461 return (0); 2462 2463 for (i = 0; i < 8; i++) { 2464 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 2465 return (0); 2466 } 2467 2468 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2469 2470 cksum = *(u_int16_t *) &enaddr[0]; 2471 2472 cksum <<= 1; 2473 if (cksum > 0xffff) 2474 cksum -= 0xffff; 2475 2476 cksum += *(u_int16_t *) &enaddr[2]; 2477 if (cksum > 0xffff) 2478 cksum -= 0xffff; 2479 2480 cksum <<= 1; 2481 if (cksum > 0xffff) 2482 cksum -= 0xffff; 2483 2484 cksum += *(u_int16_t *) &enaddr[4]; 2485 if (cksum >= 0xffff) 2486 cksum -= 0xffff; 2487 2488 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 2489 return (0); 2490 2491 return (1); 2492 } 2493 2494 /* 2495 * tlp_filter_setup: 2496 * 2497 * Set the Tulip's receive filter. 2498 */ 2499 void 2500 tlp_filter_setup(sc) 2501 struct tulip_softc *sc; 2502 { 2503 struct ethercom *ec = &sc->sc_ethercom; 2504 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2505 struct ether_multi *enm; 2506 struct ether_multistep step; 2507 __volatile u_int32_t *sp; 2508 struct tulip_txsoft *txs; 2509 u_int8_t enaddr[ETHER_ADDR_LEN]; 2510 u_int32_t hash, hashsize; 2511 int cnt; 2512 2513 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 2514 sc->sc_dev.dv_xname, sc->sc_flags)); 2515 2516 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 2517 2518 /* 2519 * If there are transmissions pending, wait until they have 2520 * completed. 2521 */ 2522 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 2523 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 2524 sc->sc_flags |= TULIPF_WANT_SETUP; 2525 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 2526 sc->sc_dev.dv_xname)); 2527 return; 2528 } 2529 sc->sc_flags &= ~TULIPF_WANT_SETUP; 2530 2531 switch (sc->sc_chip) { 2532 case TULIP_CHIP_82C115: 2533 hashsize = TULIP_PNICII_HASHSIZE; 2534 break; 2535 2536 default: 2537 hashsize = TULIP_MCHASHSIZE; 2538 } 2539 2540 /* 2541 * If we're running, idle the transmit and receive engines. If 2542 * we're NOT running, we're being called from tlp_init(), and our 2543 * writing OPMODE will start the transmit and receive processes 2544 * in motion. 2545 */ 2546 if (ifp->if_flags & IFF_RUNNING) 2547 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2548 2549 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2550 2551 if (ifp->if_flags & IFF_PROMISC) { 2552 sc->sc_opmode |= OPMODE_PR; 2553 goto allmulti; 2554 } 2555 2556 /* 2557 * Try Perfect filtering first. 2558 */ 2559 2560 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2561 sp = TULIP_CDSP(sc); 2562 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2563 cnt = 0; 2564 ETHER_FIRST_MULTI(step, ec, enm); 2565 while (enm != NULL) { 2566 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2567 /* 2568 * We must listen to a range of multicast addresses. 2569 * For now, just accept all multicasts, rather than 2570 * trying to set only those filter bits needed to match 2571 * the range. (At this time, the only use of address 2572 * ranges is for IP multicast routing, for which the 2573 * range is big enough to require all bits set.) 2574 */ 2575 goto allmulti; 2576 } 2577 if (cnt == (TULIP_MAXADDRS - 2)) { 2578 /* 2579 * We already have our multicast limit (still need 2580 * our station address and broadcast). Go to 2581 * Hash-Perfect mode. 2582 */ 2583 goto hashperfect; 2584 } 2585 cnt++; 2586 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0); 2587 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1); 2588 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2); 2589 ETHER_NEXT_MULTI(step, enm); 2590 } 2591 2592 if (ifp->if_flags & IFF_BROADCAST) { 2593 /* ...and the broadcast address. */ 2594 cnt++; 2595 *sp++ = TULIP_SP_FIELD_C(0xffff); 2596 *sp++ = TULIP_SP_FIELD_C(0xffff); 2597 *sp++ = TULIP_SP_FIELD_C(0xffff); 2598 } 2599 2600 /* Pad the rest with our station address. */ 2601 for (; cnt < TULIP_MAXADDRS; cnt++) { 2602 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2603 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2604 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2605 } 2606 ifp->if_flags &= ~IFF_ALLMULTI; 2607 goto setit; 2608 2609 hashperfect: 2610 /* 2611 * Try Hash-Perfect mode. 2612 */ 2613 2614 /* 2615 * Some 21140 chips have broken Hash-Perfect modes. On these 2616 * chips, we simply use Hash-Only mode, and put our station 2617 * address into the filter. 2618 */ 2619 if (sc->sc_chip == TULIP_CHIP_21140) 2620 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2621 else 2622 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2623 sp = TULIP_CDSP(sc); 2624 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2625 ETHER_FIRST_MULTI(step, ec, enm); 2626 while (enm != NULL) { 2627 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2628 /* 2629 * We must listen to a range of multicast addresses. 2630 * For now, just accept all multicasts, rather than 2631 * trying to set only those filter bits needed to match 2632 * the range. (At this time, the only use of address 2633 * ranges is for IP multicast routing, for which the 2634 * range is big enough to require all bits set.) 2635 */ 2636 goto allmulti; 2637 } 2638 hash = tlp_mchash(enm->enm_addrlo, hashsize); 2639 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2640 ETHER_NEXT_MULTI(step, enm); 2641 } 2642 2643 if (ifp->if_flags & IFF_BROADCAST) { 2644 /* ...and the broadcast address. */ 2645 hash = tlp_mchash(etherbroadcastaddr, hashsize); 2646 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2647 } 2648 2649 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2650 /* ...and our station address. */ 2651 hash = tlp_mchash(enaddr, hashsize); 2652 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2653 } else { 2654 /* 2655 * Hash-Perfect mode; put our station address after 2656 * the hash table. 2657 */ 2658 sp[39] = TULIP_SP_FIELD(enaddr, 0); 2659 sp[40] = TULIP_SP_FIELD(enaddr, 1); 2660 sp[41] = TULIP_SP_FIELD(enaddr, 2); 2661 } 2662 ifp->if_flags &= ~IFF_ALLMULTI; 2663 goto setit; 2664 2665 allmulti: 2666 /* 2667 * Use Perfect filter mode. First address is the broadcast address, 2668 * and pad the rest with our station address. We'll set Pass-all- 2669 * multicast in OPMODE below. 2670 */ 2671 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2672 sp = TULIP_CDSP(sc); 2673 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2674 cnt = 0; 2675 if (ifp->if_flags & IFF_BROADCAST) { 2676 cnt++; 2677 *sp++ = TULIP_SP_FIELD_C(0xffff); 2678 *sp++ = TULIP_SP_FIELD_C(0xffff); 2679 *sp++ = TULIP_SP_FIELD_C(0xffff); 2680 } 2681 for (; cnt < TULIP_MAXADDRS; cnt++) { 2682 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2683 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2684 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2685 } 2686 ifp->if_flags |= IFF_ALLMULTI; 2687 2688 setit: 2689 if (ifp->if_flags & IFF_ALLMULTI) 2690 sc->sc_opmode |= OPMODE_PM; 2691 2692 /* Sync the setup packet buffer. */ 2693 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2694 2695 /* 2696 * Fill in the setup packet descriptor. 2697 */ 2698 txs = SIMPLEQ_FIRST(&sc->sc_txfreeq); 2699 2700 txs->txs_firstdesc = sc->sc_txnext; 2701 txs->txs_lastdesc = sc->sc_txnext; 2702 txs->txs_ndescs = 1; 2703 txs->txs_mbuf = NULL; 2704 2705 sc->sc_txdescs[sc->sc_txnext].td_bufaddr1 = 2706 htole32(TULIP_CDSPADDR(sc)); 2707 sc->sc_txdescs[sc->sc_txnext].td_ctl = 2708 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2709 sc->sc_filtmode | TDCTL_Tx_SET | sc->sc_setup_fsls | 2710 TDCTL_Tx_IC | sc->sc_tdctl_ch | 2711 (sc->sc_txnext == (TULIP_NTXDESC - 1) ? sc->sc_tdctl_er : 0)); 2712 sc->sc_txdescs[sc->sc_txnext].td_status = htole32(TDSTAT_OWN); 2713 TULIP_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndescs, 2714 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2715 2716 /* Advance the tx pointer. */ 2717 sc->sc_txfree -= 1; 2718 sc->sc_txnext = TULIP_NEXTTX(sc->sc_txnext); 2719 2720 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 2721 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 2722 2723 /* 2724 * Set the OPMODE register. This will also resume the 2725 * transmit transmit process we idled above. 2726 */ 2727 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2728 2729 sc->sc_flags |= TULIPF_DOING_SETUP; 2730 2731 /* 2732 * Kick the transmitter; this will cause the Tulip to 2733 * read the setup descriptor. 2734 */ 2735 /* XXX USE AUTOPOLLING? */ 2736 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2737 2738 /* Set up a watchdog timer in case the chip flakes out. */ 2739 ifp->if_timer = 5; 2740 2741 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2742 } 2743 2744 /* 2745 * tlp_winb_filter_setup: 2746 * 2747 * Set the Winbond 89C840F's receive filter. 2748 */ 2749 void 2750 tlp_winb_filter_setup(sc) 2751 struct tulip_softc *sc; 2752 { 2753 struct ethercom *ec = &sc->sc_ethercom; 2754 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2755 struct ether_multi *enm; 2756 struct ether_multistep step; 2757 u_int32_t hash, mchash[2]; 2758 2759 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2760 sc->sc_dev.dv_xname, sc->sc_flags)); 2761 2762 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2763 2764 if (ifp->if_flags & IFF_MULTICAST) 2765 sc->sc_opmode |= OPMODE_WINB_AMP; 2766 2767 if (ifp->if_flags & IFF_BROADCAST) 2768 sc->sc_opmode |= OPMODE_WINB_ABP; 2769 2770 if (ifp->if_flags & IFF_PROMISC) { 2771 sc->sc_opmode |= OPMODE_WINB_APP; 2772 goto allmulti; 2773 } 2774 2775 mchash[0] = mchash[1] = 0; 2776 2777 ETHER_FIRST_MULTI(step, ec, enm); 2778 while (enm != NULL) { 2779 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2780 /* 2781 * We must listen to a range of multicast addresses. 2782 * For now, just accept all multicasts, rather than 2783 * trying to set only those filter bits needed to match 2784 * the range. (At this time, the only use of address 2785 * ranges is for IP multicast routing, for which the 2786 * range is big enough to require all bits set.) 2787 */ 2788 goto allmulti; 2789 } 2790 2791 /* 2792 * According to the FreeBSD `wb' driver, yes, you 2793 * really do invert the hash. 2794 */ 2795 hash = 2796 (~(ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2797 & 0x3f; 2798 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2799 ETHER_NEXT_MULTI(step, enm); 2800 } 2801 ifp->if_flags &= ~IFF_ALLMULTI; 2802 goto setit; 2803 2804 allmulti: 2805 ifp->if_flags |= IFF_ALLMULTI; 2806 mchash[0] = mchash[1] = 0xffffffff; 2807 2808 setit: 2809 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2810 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2811 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2812 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2813 sc->sc_dev.dv_xname)); 2814 } 2815 2816 /* 2817 * tlp_al981_filter_setup: 2818 * 2819 * Set the ADMtek AL981's receive filter. 2820 */ 2821 void 2822 tlp_al981_filter_setup(sc) 2823 struct tulip_softc *sc; 2824 { 2825 struct ethercom *ec = &sc->sc_ethercom; 2826 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2827 struct ether_multi *enm; 2828 struct ether_multistep step; 2829 u_int32_t hash, mchash[2]; 2830 2831 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n", 2832 sc->sc_dev.dv_xname, sc->sc_flags)); 2833 2834 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2835 2836 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2837 2838 if (ifp->if_flags & IFF_PROMISC) { 2839 sc->sc_opmode |= OPMODE_PR; 2840 goto allmulti; 2841 } 2842 2843 mchash[0] = mchash[1] = 0; 2844 2845 ETHER_FIRST_MULTI(step, ec, enm); 2846 while (enm != NULL) { 2847 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2848 /* 2849 * We must listen to a range of multicast addresses. 2850 * For now, just accept all multicasts, rather than 2851 * trying to set only those filter bits needed to match 2852 * the range. (At this time, the only use of address 2853 * ranges is for IP multicast routing, for which the 2854 * range is big enough to require all bits set.) 2855 */ 2856 goto allmulti; 2857 } 2858 2859 hash = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26; 2860 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2861 ETHER_NEXT_MULTI(step, enm); 2862 } 2863 ifp->if_flags &= ~IFF_ALLMULTI; 2864 goto setit; 2865 2866 allmulti: 2867 ifp->if_flags |= IFF_ALLMULTI; 2868 mchash[0] = mchash[1] = 0xffffffff; 2869 2870 setit: 2871 TULIP_WRITE(sc, CSR_ADM_MAR0, mchash[0]); 2872 TULIP_WRITE(sc, CSR_ADM_MAR1, mchash[1]); 2873 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2874 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n", 2875 sc->sc_dev.dv_xname)); 2876 } 2877 2878 /* 2879 * tlp_idle: 2880 * 2881 * Cause the transmit and/or receive processes to go idle. 2882 */ 2883 void 2884 tlp_idle(sc, bits) 2885 struct tulip_softc *sc; 2886 u_int32_t bits; 2887 { 2888 static const char *tlp_tx_state_names[] = { 2889 "STOPPED", 2890 "RUNNING - FETCH", 2891 "RUNNING - WAIT", 2892 "RUNNING - READING", 2893 "-- RESERVED --", 2894 "RUNNING - SETUP", 2895 "SUSPENDED", 2896 "RUNNING - CLOSE", 2897 }; 2898 static const char *tlp_rx_state_names[] = { 2899 "STOPPED", 2900 "RUNNING - FETCH", 2901 "RUNNING - CHECK", 2902 "RUNNING - WAIT", 2903 "SUSPENDED", 2904 "RUNNING - CLOSE", 2905 "RUNNING - FLUSH", 2906 "RUNNING - QUEUE", 2907 }; 2908 static const char *dm9102_tx_state_names[] = { 2909 "STOPPED", 2910 "RUNNING - FETCH", 2911 "RUNNING - SETUP", 2912 "RUNNING - READING", 2913 "RUNNING - CLOSE - CLEAR OWNER", 2914 "RUNNING - WAIT", 2915 "RUNNING - CLOSE - WRITE STATUS", 2916 "SUSPENDED", 2917 }; 2918 static const char *dm9102_rx_state_names[] = { 2919 "STOPPED", 2920 "RUNNING - FETCH", 2921 "RUNNING - WAIT", 2922 "RUNNING - QUEUE", 2923 "RUNNING - CLOSE - CLEAR OWNER", 2924 "RUNNING - CLOSE - WRITE STATUS", 2925 "SUSPENDED", 2926 "RUNNING - FLUSH", 2927 }; 2928 2929 const char **tx_state_names, **rx_state_names; 2930 u_int32_t csr, ackmask = 0; 2931 int i; 2932 2933 switch (sc->sc_chip) { 2934 case TULIP_CHIP_DM9102: 2935 case TULIP_CHIP_DM9102A: 2936 tx_state_names = dm9102_tx_state_names; 2937 rx_state_names = dm9102_rx_state_names; 2938 break; 2939 2940 default: 2941 tx_state_names = tlp_tx_state_names; 2942 rx_state_names = tlp_rx_state_names; 2943 break; 2944 } 2945 2946 if (bits & OPMODE_ST) 2947 ackmask |= STATUS_TPS; 2948 2949 if (bits & OPMODE_SR) 2950 ackmask |= STATUS_RPS; 2951 2952 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2953 2954 for (i = 0; i < 1000; i++) { 2955 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2956 break; 2957 delay(10); 2958 } 2959 2960 csr = TULIP_READ(sc, CSR_STATUS); 2961 if ((csr & ackmask) != ackmask) { 2962 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2963 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2964 printf("%s: transmit process failed to idle: " 2965 "state %s\n", sc->sc_dev.dv_xname, 2966 tx_state_names[(csr & STATUS_TS) >> 20]); 2967 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2968 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2969 printf("%s: receive process failed to idle: " 2970 "state %s\n", sc->sc_dev.dv_xname, 2971 rx_state_names[(csr & STATUS_RS) >> 17]); 2972 } 2973 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2974 } 2975 2976 /***************************************************************************** 2977 * Generic media support functions. 2978 *****************************************************************************/ 2979 2980 /* 2981 * tlp_mediastatus: [ifmedia interface function] 2982 * 2983 * Query the current media. 2984 */ 2985 void 2986 tlp_mediastatus(ifp, ifmr) 2987 struct ifnet *ifp; 2988 struct ifmediareq *ifmr; 2989 { 2990 struct tulip_softc *sc = ifp->if_softc; 2991 2992 if (TULIP_IS_ENABLED(sc) == 0) { 2993 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 2994 ifmr->ifm_status = 0; 2995 return; 2996 } 2997 2998 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2999 } 3000 3001 /* 3002 * tlp_mediachange: [ifmedia interface function] 3003 * 3004 * Update the current media. 3005 */ 3006 int 3007 tlp_mediachange(ifp) 3008 struct ifnet *ifp; 3009 { 3010 struct tulip_softc *sc = ifp->if_softc; 3011 3012 if ((ifp->if_flags & IFF_UP) == 0) 3013 return (0); 3014 return ((*sc->sc_mediasw->tmsw_set)(sc)); 3015 } 3016 3017 /***************************************************************************** 3018 * Support functions for MII-attached media. 3019 *****************************************************************************/ 3020 3021 /* 3022 * tlp_mii_tick: 3023 * 3024 * One second timer, used to tick the MII. 3025 */ 3026 void 3027 tlp_mii_tick(arg) 3028 void *arg; 3029 { 3030 struct tulip_softc *sc = arg; 3031 int s; 3032 3033 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 3034 return; 3035 3036 s = splnet(); 3037 mii_tick(&sc->sc_mii); 3038 splx(s); 3039 3040 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 3041 } 3042 3043 /* 3044 * tlp_mii_statchg: [mii interface function] 3045 * 3046 * Callback from PHY when media changes. 3047 */ 3048 void 3049 tlp_mii_statchg(self) 3050 struct device *self; 3051 { 3052 struct tulip_softc *sc = (struct tulip_softc *)self; 3053 3054 /* Idle the transmit and receive processes. */ 3055 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3056 3057 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD); 3058 3059 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 3060 sc->sc_opmode |= OPMODE_TTM; 3061 else 3062 sc->sc_opmode |= OPMODE_HBD; 3063 3064 if (sc->sc_mii.mii_media_active & IFM_FDX) 3065 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 3066 3067 /* 3068 * Write new OPMODE bits. This also restarts the transmit 3069 * and receive processes. 3070 */ 3071 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3072 } 3073 3074 /* 3075 * tlp_winb_mii_statchg: [mii interface function] 3076 * 3077 * Callback from PHY when media changes. This version is 3078 * for the Winbond 89C840F, which has different OPMODE bits. 3079 */ 3080 void 3081 tlp_winb_mii_statchg(self) 3082 struct device *self; 3083 { 3084 struct tulip_softc *sc = (struct tulip_softc *)self; 3085 3086 /* Idle the transmit and receive processes. */ 3087 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3088 3089 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 3090 3091 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 3092 sc->sc_opmode |= OPMODE_WINB_FES; 3093 3094 if (sc->sc_mii.mii_media_active & IFM_FDX) 3095 sc->sc_opmode |= OPMODE_FD; 3096 3097 /* 3098 * Write new OPMODE bits. This also restarts the transmit 3099 * and receive processes. 3100 */ 3101 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3102 } 3103 3104 /* 3105 * tlp_dm9102_mii_statchg: [mii interface function] 3106 * 3107 * Callback from PHY when media changes. This version is 3108 * for the DM9102. 3109 */ 3110 void 3111 tlp_dm9102_mii_statchg(self) 3112 struct device *self; 3113 { 3114 struct tulip_softc *sc = (struct tulip_softc *)self; 3115 3116 /* 3117 * Don't idle the transmit and receive processes, here. It 3118 * seems to fail, and just causes excess noise. 3119 */ 3120 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 3121 3122 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) != IFM_100_TX) 3123 sc->sc_opmode |= OPMODE_TTM; 3124 3125 if (sc->sc_mii.mii_media_active & IFM_FDX) 3126 sc->sc_opmode |= OPMODE_FD; 3127 3128 /* 3129 * Write new OPMODE bits. 3130 */ 3131 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3132 } 3133 3134 /* 3135 * tlp_mii_getmedia: 3136 * 3137 * Callback from ifmedia to request current media status. 3138 */ 3139 void 3140 tlp_mii_getmedia(sc, ifmr) 3141 struct tulip_softc *sc; 3142 struct ifmediareq *ifmr; 3143 { 3144 3145 mii_pollstat(&sc->sc_mii); 3146 ifmr->ifm_status = sc->sc_mii.mii_media_status; 3147 ifmr->ifm_active = sc->sc_mii.mii_media_active; 3148 } 3149 3150 /* 3151 * tlp_mii_setmedia: 3152 * 3153 * Callback from ifmedia to request new media setting. 3154 */ 3155 int 3156 tlp_mii_setmedia(sc) 3157 struct tulip_softc *sc; 3158 { 3159 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3160 3161 if (ifp->if_flags & IFF_UP) { 3162 switch (sc->sc_chip) { 3163 case TULIP_CHIP_21142: 3164 case TULIP_CHIP_21143: 3165 /* Disable the internal Nway engine. */ 3166 TULIP_WRITE(sc, CSR_SIATXRX, 0); 3167 break; 3168 3169 default: 3170 /* Nothing. */ 3171 } 3172 mii_mediachg(&sc->sc_mii); 3173 } 3174 return (0); 3175 } 3176 3177 /* 3178 * tlp_bitbang_mii_readreg: 3179 * 3180 * Read a PHY register via bit-bang'ing the MII. 3181 */ 3182 int 3183 tlp_bitbang_mii_readreg(self, phy, reg) 3184 struct device *self; 3185 int phy, reg; 3186 { 3187 struct tulip_softc *sc = (void *) self; 3188 3189 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg)); 3190 } 3191 3192 /* 3193 * tlp_bitbang_mii_writereg: 3194 * 3195 * Write a PHY register via bit-bang'ing the MII. 3196 */ 3197 void 3198 tlp_bitbang_mii_writereg(self, phy, reg, val) 3199 struct device *self; 3200 int phy, reg, val; 3201 { 3202 struct tulip_softc *sc = (void *) self; 3203 3204 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val); 3205 } 3206 3207 /* 3208 * tlp_sio_mii_bitbang_read: 3209 * 3210 * Read the MII serial port for the MII bit-bang module. 3211 */ 3212 u_int32_t 3213 tlp_sio_mii_bitbang_read(self) 3214 struct device *self; 3215 { 3216 struct tulip_softc *sc = (void *) self; 3217 3218 return (TULIP_READ(sc, CSR_MIIROM)); 3219 } 3220 3221 /* 3222 * tlp_sio_mii_bitbang_write: 3223 * 3224 * Write the MII serial port for the MII bit-bang module. 3225 */ 3226 void 3227 tlp_sio_mii_bitbang_write(self, val) 3228 struct device *self; 3229 u_int32_t val; 3230 { 3231 struct tulip_softc *sc = (void *) self; 3232 3233 TULIP_WRITE(sc, CSR_MIIROM, val); 3234 } 3235 3236 /* 3237 * tlp_pnic_mii_readreg: 3238 * 3239 * Read a PHY register on the Lite-On PNIC. 3240 */ 3241 int 3242 tlp_pnic_mii_readreg(self, phy, reg) 3243 struct device *self; 3244 int phy, reg; 3245 { 3246 struct tulip_softc *sc = (void *) self; 3247 u_int32_t val; 3248 int i; 3249 3250 TULIP_WRITE(sc, CSR_PNIC_MII, 3251 PNIC_MII_MBO | PNIC_MII_RESERVED | 3252 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 3253 (reg << PNIC_MII_REGSHIFT)); 3254 3255 for (i = 0; i < 1000; i++) { 3256 delay(10); 3257 val = TULIP_READ(sc, CSR_PNIC_MII); 3258 if ((val & PNIC_MII_BUSY) == 0) { 3259 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 3260 return (0); 3261 else 3262 return (val & PNIC_MII_DATA); 3263 } 3264 } 3265 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 3266 return (0); 3267 } 3268 3269 /* 3270 * tlp_pnic_mii_writereg: 3271 * 3272 * Write a PHY register on the Lite-On PNIC. 3273 */ 3274 void 3275 tlp_pnic_mii_writereg(self, phy, reg, val) 3276 struct device *self; 3277 int phy, reg, val; 3278 { 3279 struct tulip_softc *sc = (void *) self; 3280 int i; 3281 3282 TULIP_WRITE(sc, CSR_PNIC_MII, 3283 PNIC_MII_MBO | PNIC_MII_RESERVED | 3284 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 3285 (reg << PNIC_MII_REGSHIFT) | val); 3286 3287 for (i = 0; i < 1000; i++) { 3288 delay(10); 3289 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 3290 return; 3291 } 3292 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 3293 } 3294 3295 const bus_addr_t tlp_al981_phy_regmap[] = { 3296 CSR_ADM_BMCR, 3297 CSR_ADM_BMSR, 3298 CSR_ADM_PHYIDR1, 3299 CSR_ADM_PHYIDR2, 3300 CSR_ADM_ANAR, 3301 CSR_ADM_ANLPAR, 3302 CSR_ADM_ANER, 3303 3304 CSR_ADM_XMC, 3305 CSR_ADM_XCIIS, 3306 CSR_ADM_XIE, 3307 CSR_ADM_100CTR, 3308 }; 3309 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) / 3310 sizeof(tlp_al981_phy_regmap[0]); 3311 3312 /* 3313 * tlp_al981_mii_readreg: 3314 * 3315 * Read a PHY register on the ADMtek AL981. 3316 */ 3317 int 3318 tlp_al981_mii_readreg(self, phy, reg) 3319 struct device *self; 3320 int phy, reg; 3321 { 3322 struct tulip_softc *sc = (struct tulip_softc *)self; 3323 3324 /* AL981 only has an internal PHY. */ 3325 if (phy != 0) 3326 return (0); 3327 3328 if (reg >= tlp_al981_phy_regmap_size) 3329 return (0); 3330 3331 return (bus_space_read_4(sc->sc_st, sc->sc_sh, 3332 tlp_al981_phy_regmap[reg]) & 0xffff); 3333 } 3334 3335 /* 3336 * tlp_al981_mii_writereg: 3337 * 3338 * Write a PHY register on the ADMtek AL981. 3339 */ 3340 void 3341 tlp_al981_mii_writereg(self, phy, reg, val) 3342 struct device *self; 3343 int phy, reg, val; 3344 { 3345 struct tulip_softc *sc = (struct tulip_softc *)self; 3346 3347 /* AL981 only has an internal PHY. */ 3348 if (phy != 0) 3349 return; 3350 3351 if (reg >= tlp_al981_phy_regmap_size) 3352 return; 3353 3354 bus_space_write_4(sc->sc_st, sc->sc_sh, 3355 tlp_al981_phy_regmap[reg], val); 3356 } 3357 3358 /***************************************************************************** 3359 * Chip-specific pre-init and reset functions. 3360 *****************************************************************************/ 3361 3362 /* 3363 * tlp_2114x_preinit: 3364 * 3365 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3366 */ 3367 void 3368 tlp_2114x_preinit(sc) 3369 struct tulip_softc *sc; 3370 { 3371 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3372 struct tulip_21x4x_media *tm = ife->ifm_aux; 3373 3374 /* 3375 * Whether or not we're in MII or SIA/SYM mode, the media info 3376 * contains the appropriate OPMODE bits. 3377 * 3378 * Note that if we have no media info, we are are doing 3379 * non-MII `auto'. 3380 * 3381 * Also, we always set the Must-Be-One bit. 3382 */ 3383 if (tm == NULL) { 3384 #ifdef DIAGNOSTIC 3385 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3386 panic("tlp_2114x_preinit: not IFM_AUTO"); 3387 if (sc->sc_nway_active == NULL) 3388 panic("tlp_2114x_preinit: nway_active NULL"); 3389 #endif 3390 tm = sc->sc_nway_active->ifm_aux; 3391 } 3392 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode; 3393 3394 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3395 } 3396 3397 /* 3398 * tlp_2114x_mii_preinit: 3399 * 3400 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3401 * This version is used by boards which only have MII and don't have 3402 * an ISV SROM. 3403 */ 3404 void 3405 tlp_2114x_mii_preinit(sc) 3406 struct tulip_softc *sc; 3407 { 3408 3409 /* 3410 * Always set the Must-Be-One bit, and Port Select (to select MII). 3411 * We'll never be called during a media change. 3412 */ 3413 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS; 3414 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3415 } 3416 3417 /* 3418 * tlp_pnic_preinit: 3419 * 3420 * Pre-init function for the Lite-On 82c168 and 82c169. 3421 */ 3422 void 3423 tlp_pnic_preinit(sc) 3424 struct tulip_softc *sc; 3425 { 3426 3427 if (sc->sc_flags & TULIPF_HAS_MII) { 3428 /* 3429 * MII case: just set the port-select bit; we will never 3430 * be called during a media change. 3431 */ 3432 sc->sc_opmode |= OPMODE_PS; 3433 } else { 3434 /* 3435 * ENDEC/PCS/Nway mode; enable the Tx backoff counter. 3436 */ 3437 sc->sc_opmode |= OPMODE_PNIC_TBEN; 3438 } 3439 } 3440 3441 /* 3442 * tlp_dm9102_preinit: 3443 * 3444 * Pre-init function for the Davicom DM9102. 3445 */ 3446 void 3447 tlp_dm9102_preinit(sc) 3448 struct tulip_softc *sc; 3449 { 3450 3451 switch (sc->sc_chip) { 3452 case TULIP_CHIP_DM9102: 3453 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 3454 break; 3455 3456 case TULIP_CHIP_DM9102A: 3457 /* 3458 * XXX Figure out how to actually deal with the HomePNA 3459 * XXX portion of the DM9102A. 3460 */ 3461 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD; 3462 break; 3463 3464 default: 3465 /* Nothing. */ 3466 } 3467 3468 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3469 } 3470 3471 /* 3472 * tlp_21140_reset: 3473 * 3474 * Issue a reset sequence on the 21140 via the GPIO facility. 3475 */ 3476 void 3477 tlp_21140_reset(sc) 3478 struct tulip_softc *sc; 3479 { 3480 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3481 struct tulip_21x4x_media *tm = ife->ifm_aux; 3482 int i; 3483 3484 /* First, set the direction on the GPIO pins. */ 3485 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 3486 3487 /* Now, issue the reset sequence. */ 3488 for (i = 0; i < tm->tm_reset_length; i++) { 3489 delay(10); 3490 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]); 3491 } 3492 3493 /* Now, issue the selection sequence. */ 3494 for (i = 0; i < tm->tm_gp_length; i++) { 3495 delay(10); 3496 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]); 3497 } 3498 3499 /* If there were no sequences, just lower the pins. */ 3500 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) 3501 TULIP_WRITE(sc, CSR_GPP, 0); 3502 } 3503 3504 /* 3505 * tlp_21142_reset: 3506 * 3507 * Issue a reset sequence on the 21142 via the GPIO facility. 3508 */ 3509 void 3510 tlp_21142_reset(sc) 3511 struct tulip_softc *sc; 3512 { 3513 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3514 struct tulip_21x4x_media *tm = ife->ifm_aux; 3515 const u_int8_t *ncp; 3516 int i; 3517 3518 ncp = &sc->sc_srom[tm->tm_reset_offset]; 3519 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 3520 delay(10); 3521 TULIP_WRITE(sc, CSR_SIAGEN, 3522 TULIP_ROM_GETW(ncp, 0) << 16); 3523 } 3524 3525 ncp = &sc->sc_srom[tm->tm_gp_offset]; 3526 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 3527 delay(10); 3528 TULIP_WRITE(sc, CSR_SIAGEN, 3529 TULIP_ROM_GETW(ncp, 0) << 16); 3530 } 3531 3532 /* If there were no sequences, just lower the pins. */ 3533 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 3534 delay(10); 3535 TULIP_WRITE(sc, CSR_SIAGEN, 0); 3536 } 3537 } 3538 3539 /* 3540 * tlp_pmac_reset: 3541 * 3542 * Reset routine for Macronix chips. 3543 */ 3544 void 3545 tlp_pmac_reset(sc) 3546 struct tulip_softc *sc; 3547 { 3548 3549 switch (sc->sc_chip) { 3550 case TULIP_CHIP_82C115: 3551 case TULIP_CHIP_MX98715: 3552 case TULIP_CHIP_MX98715A: 3553 case TULIP_CHIP_MX98725: 3554 /* 3555 * Set the LED operating mode. This information is located 3556 * in the EEPROM at byte offset 0x77, per the MX98715A and 3557 * MX98725 application notes. 3558 */ 3559 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24); 3560 break; 3561 case TULIP_CHIP_MX98715AEC_X: 3562 /* 3563 * Set the LED operating mode. This information is located 3564 * in the EEPROM at byte offset 0x76, per the MX98715AEC 3565 * application note. 3566 */ 3567 TULIP_WRITE(sc, CSR_MIIROM, ((0xf & sc->sc_srom[0x76]) << 28) 3568 | ((0xf0 & sc->sc_srom[0x76]) << 20)); 3569 break; 3570 3571 default: 3572 /* Nothing. */ 3573 } 3574 } 3575 3576 /* 3577 * tlp_dm9102_reset: 3578 * 3579 * Reset routine for the Davicom DM9102. 3580 */ 3581 void 3582 tlp_dm9102_reset(sc) 3583 struct tulip_softc *sc; 3584 { 3585 3586 TULIP_WRITE(sc, CSR_DM_PHYSTAT, DM_PHYSTAT_GEPC|DM_PHYSTAT_GPED); 3587 delay(100); 3588 TULIP_WRITE(sc, CSR_DM_PHYSTAT, 0); 3589 } 3590 3591 /***************************************************************************** 3592 * Chip/board-specific media switches. The ones here are ones that 3593 * are potentially common to multiple front-ends. 3594 *****************************************************************************/ 3595 3596 /* 3597 * This table is a common place for all sorts of media information, 3598 * keyed off of the SROM media code for that media. 3599 * 3600 * Note that we explicitly configure the 21142/21143 to always advertise 3601 * NWay capabilities when using the UTP port. 3602 * XXX Actually, we don't yet. 3603 */ 3604 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = { 3605 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0, 3606 "10baseT", 3607 0, 3608 { SIACONN_21040_10BASET, 3609 SIATXRX_21040_10BASET, 3610 SIAGEN_21040_10BASET }, 3611 3612 { SIACONN_21041_10BASET, 3613 SIATXRX_21041_10BASET, 3614 SIAGEN_21041_10BASET }, 3615 3616 { SIACONN_21142_10BASET, 3617 SIATXRX_21142_10BASET, 3618 SIAGEN_21142_10BASET } }, 3619 3620 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0, 3621 "10base2", 3622 0, 3623 { 0, 3624 0, 3625 0 }, 3626 3627 { SIACONN_21041_BNC, 3628 SIATXRX_21041_BNC, 3629 SIAGEN_21041_BNC }, 3630 3631 { SIACONN_21142_BNC, 3632 SIATXRX_21142_BNC, 3633 SIAGEN_21142_BNC } }, 3634 3635 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0, 3636 "10base5", 3637 0, 3638 { SIACONN_21040_AUI, 3639 SIATXRX_21040_AUI, 3640 SIAGEN_21040_AUI }, 3641 3642 { SIACONN_21041_AUI, 3643 SIATXRX_21041_AUI, 3644 SIAGEN_21041_AUI }, 3645 3646 { SIACONN_21142_AUI, 3647 SIATXRX_21142_AUI, 3648 SIAGEN_21142_AUI } }, 3649 3650 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0, 3651 "100baseTX", 3652 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3653 { 0, 3654 0, 3655 0 }, 3656 3657 { 0, 3658 0, 3659 0 }, 3660 3661 { 0, 3662 0, 3663 SIAGEN_ABM } }, 3664 3665 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX, 3666 "10baseT-FDX", 3667 OPMODE_FD|OPMODE_HBD, 3668 { SIACONN_21040_10BASET_FDX, 3669 SIATXRX_21040_10BASET_FDX, 3670 SIAGEN_21040_10BASET_FDX }, 3671 3672 { SIACONN_21041_10BASET_FDX, 3673 SIATXRX_21041_10BASET_FDX, 3674 SIAGEN_21041_10BASET_FDX }, 3675 3676 { SIACONN_21142_10BASET_FDX, 3677 SIATXRX_21142_10BASET_FDX, 3678 SIAGEN_21142_10BASET_FDX } }, 3679 3680 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX, 3681 "100baseTX-FDX", 3682 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD, 3683 { 0, 3684 0, 3685 0 }, 3686 3687 { 0, 3688 0, 3689 0 }, 3690 3691 { 0, 3692 0, 3693 SIAGEN_ABM } }, 3694 3695 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0, 3696 "100baseT4", 3697 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3698 { 0, 3699 0, 3700 0 }, 3701 3702 { 0, 3703 0, 3704 0 }, 3705 3706 { 0, 3707 0, 3708 SIAGEN_ABM } }, 3709 3710 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0, 3711 "100baseFX", 3712 OPMODE_PS|OPMODE_PCS|OPMODE_HBD, 3713 { 0, 3714 0, 3715 0 }, 3716 3717 { 0, 3718 0, 3719 0 }, 3720 3721 { 0, 3722 0, 3723 SIAGEN_ABM } }, 3724 3725 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX, 3726 "100baseFX-FDX", 3727 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD, 3728 { 0, 3729 0, 3730 0 }, 3731 3732 { 0, 3733 0, 3734 0 }, 3735 3736 { 0, 3737 0, 3738 SIAGEN_ABM } }, 3739 3740 { 0, 0, 0, 3741 NULL, 3742 0, 3743 { 0, 3744 0, 3745 0 }, 3746 3747 { 0, 3748 0, 3749 0 }, 3750 3751 { 0, 3752 0, 3753 0 } }, 3754 }; 3755 3756 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t)); 3757 void tlp_srom_media_info __P((struct tulip_softc *, 3758 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *)); 3759 void tlp_add_srom_media __P((struct tulip_softc *, int, 3760 void (*)(struct tulip_softc *, struct ifmediareq *), 3761 int (*)(struct tulip_softc *), const u_int8_t *, int)); 3762 void tlp_print_media __P((struct tulip_softc *)); 3763 void tlp_nway_activate __P((struct tulip_softc *, int)); 3764 void tlp_get_minst __P((struct tulip_softc *)); 3765 3766 const struct tulip_srom_to_ifmedia * 3767 tlp_srom_to_ifmedia(sm) 3768 u_int8_t sm; 3769 { 3770 const struct tulip_srom_to_ifmedia *tsti; 3771 3772 for (tsti = tulip_srom_to_ifmedia_table; 3773 tsti->tsti_name != NULL; tsti++) { 3774 if (tsti->tsti_srom == sm) 3775 return (tsti); 3776 } 3777 3778 return (NULL); 3779 } 3780 3781 void 3782 tlp_srom_media_info(sc, tsti, tm) 3783 struct tulip_softc *sc; 3784 const struct tulip_srom_to_ifmedia *tsti; 3785 struct tulip_21x4x_media *tm; 3786 { 3787 3788 tm->tm_name = tsti->tsti_name; 3789 tm->tm_opmode = tsti->tsti_opmode; 3790 3791 switch (sc->sc_chip) { 3792 case TULIP_CHIP_DE425: 3793 case TULIP_CHIP_21040: 3794 tm->tm_sia = tsti->tsti_21040; /* struct assignment */ 3795 break; 3796 3797 case TULIP_CHIP_21041: 3798 tm->tm_sia = tsti->tsti_21041; /* struct assignment */ 3799 break; 3800 3801 case TULIP_CHIP_21142: 3802 case TULIP_CHIP_21143: 3803 case TULIP_CHIP_82C115: 3804 case TULIP_CHIP_MX98715: 3805 case TULIP_CHIP_MX98715A: 3806 case TULIP_CHIP_MX98715AEC_X: 3807 case TULIP_CHIP_MX98725: 3808 tm->tm_sia = tsti->tsti_21142; /* struct assignment */ 3809 break; 3810 3811 default: 3812 /* Nothing. */ 3813 } 3814 } 3815 3816 void 3817 tlp_add_srom_media(sc, type, get, set, list, cnt) 3818 struct tulip_softc *sc; 3819 int type; 3820 void (*get) __P((struct tulip_softc *, struct ifmediareq *)); 3821 int (*set) __P((struct tulip_softc *)); 3822 const u_int8_t *list; 3823 int cnt; 3824 { 3825 struct tulip_21x4x_media *tm; 3826 const struct tulip_srom_to_ifmedia *tsti; 3827 int i; 3828 3829 for (i = 0; i < cnt; i++) { 3830 tsti = tlp_srom_to_ifmedia(list[i]); 3831 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 3832 memset(tm, 0, sizeof(*tm)); 3833 tlp_srom_media_info(sc, tsti, tm); 3834 tm->tm_type = type; 3835 tm->tm_get = get; 3836 tm->tm_set = set; 3837 3838 ifmedia_add(&sc->sc_mii.mii_media, 3839 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 3840 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 3841 } 3842 } 3843 3844 void 3845 tlp_print_media(sc) 3846 struct tulip_softc *sc; 3847 { 3848 struct ifmedia_entry *ife; 3849 struct tulip_21x4x_media *tm; 3850 const char *sep = ""; 3851 3852 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3853 3854 printf("%s: ", sc->sc_dev.dv_xname); 3855 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 3856 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 3857 tm = ife->ifm_aux; 3858 if (tm == NULL) { 3859 #ifdef DIAGNOSTIC 3860 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3861 panic("tlp_print_media"); 3862 #endif 3863 PRINT("auto"); 3864 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII && 3865 tm->tm_type != TULIP_ROM_MB_21142_MII) { 3866 PRINT(tm->tm_name); 3867 } 3868 } 3869 printf("\n"); 3870 3871 #undef PRINT 3872 } 3873 3874 void 3875 tlp_nway_activate(sc, media) 3876 struct tulip_softc *sc; 3877 int media; 3878 { 3879 struct ifmedia_entry *ife; 3880 3881 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0); 3882 #ifdef DIAGNOSTIC 3883 if (ife == NULL) 3884 panic("tlp_nway_activate"); 3885 #endif 3886 sc->sc_nway_active = ife; 3887 } 3888 3889 void 3890 tlp_get_minst(sc) 3891 struct tulip_softc *sc; 3892 { 3893 3894 if ((sc->sc_media_seen & 3895 ~((1 << TULIP_ROM_MB_21140_MII) | 3896 (1 << TULIP_ROM_MB_21142_MII))) == 0) { 3897 /* 3898 * We have not yet seen any SIA/SYM media (but are 3899 * about to; that's why we're called!), so assign 3900 * the current media instance to be the `internal media' 3901 * instance, and advance it so any MII media gets a 3902 * fresh one (used to selecting/isolating a PHY). 3903 */ 3904 sc->sc_tlp_minst = sc->sc_mii.mii_instance++; 3905 } 3906 } 3907 3908 /* 3909 * SIA Utility functions. 3910 */ 3911 void tlp_sia_update_link __P((struct tulip_softc *)); 3912 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *)); 3913 int tlp_sia_set __P((struct tulip_softc *)); 3914 void tlp_sia_fixup __P((struct tulip_softc *)); 3915 3916 void 3917 tlp_sia_update_link(sc) 3918 struct tulip_softc *sc; 3919 { 3920 struct ifmedia_entry *ife; 3921 struct tulip_21x4x_media *tm; 3922 u_int32_t siastat; 3923 3924 ife = TULIP_CURRENT_MEDIA(sc); 3925 tm = ife->ifm_aux; 3926 3927 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 3928 3929 siastat = TULIP_READ(sc, CSR_SIASTAT); 3930 3931 /* 3932 * Note that when we do SIA link tests, we are assuming that 3933 * the chip is really in the mode that the current media setting 3934 * reflects. If we're not, then the link tests will not be 3935 * accurate! 3936 */ 3937 switch (IFM_SUBTYPE(ife->ifm_media)) { 3938 case IFM_10_T: 3939 sc->sc_flags |= TULIPF_LINK_VALID; 3940 if ((siastat & SIASTAT_LS10) == 0) 3941 sc->sc_flags |= TULIPF_LINK_UP; 3942 break; 3943 3944 case IFM_100_TX: 3945 case IFM_100_T4: 3946 sc->sc_flags |= TULIPF_LINK_VALID; 3947 if ((siastat & SIASTAT_LS100) == 0) 3948 sc->sc_flags |= TULIPF_LINK_UP; 3949 break; 3950 } 3951 3952 switch (sc->sc_chip) { 3953 case TULIP_CHIP_21142: 3954 case TULIP_CHIP_21143: 3955 /* 3956 * On these chips, we can tell more information about 3957 * AUI/BNC. Note that the AUI/BNC selection is made 3958 * in a different register; for our purpose, it's all 3959 * AUI. 3960 */ 3961 switch (IFM_SUBTYPE(ife->ifm_media)) { 3962 case IFM_10_2: 3963 case IFM_10_5: 3964 sc->sc_flags |= TULIPF_LINK_VALID; 3965 if (siastat & SIASTAT_ARA) { 3966 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA); 3967 sc->sc_flags |= TULIPF_LINK_UP; 3968 } 3969 break; 3970 3971 default: 3972 /* 3973 * If we're SYM media and can detect the link 3974 * via the GPIO facility, prefer that status 3975 * over LS100. 3976 */ 3977 if (tm->tm_type == TULIP_ROM_MB_21143_SYM && 3978 tm->tm_actmask != 0) { 3979 sc->sc_flags = (sc->sc_flags & 3980 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID; 3981 if (TULIP_ISSET(sc, CSR_SIAGEN, 3982 tm->tm_actmask) == tm->tm_actdata) 3983 sc->sc_flags |= TULIPF_LINK_UP; 3984 } 3985 } 3986 break; 3987 3988 default: 3989 /* Nothing. */ 3990 } 3991 } 3992 3993 void 3994 tlp_sia_get(sc, ifmr) 3995 struct tulip_softc *sc; 3996 struct ifmediareq *ifmr; 3997 { 3998 struct ifmedia_entry *ife; 3999 4000 ifmr->ifm_status = 0; 4001 4002 tlp_sia_update_link(sc); 4003 4004 ife = TULIP_CURRENT_MEDIA(sc); 4005 4006 if (sc->sc_flags & TULIPF_LINK_VALID) 4007 ifmr->ifm_status |= IFM_AVALID; 4008 if (sc->sc_flags & TULIPF_LINK_UP) 4009 ifmr->ifm_status |= IFM_ACTIVE; 4010 ifmr->ifm_active = ife->ifm_media; 4011 } 4012 4013 void 4014 tlp_sia_fixup(sc) 4015 struct tulip_softc *sc; 4016 { 4017 struct ifmedia_entry *ife; 4018 struct tulip_21x4x_media *tm; 4019 u_int32_t siaconn, siatxrx, siagen; 4020 4021 switch (sc->sc_chip) { 4022 case TULIP_CHIP_82C115: 4023 case TULIP_CHIP_MX98713A: 4024 case TULIP_CHIP_MX98715: 4025 case TULIP_CHIP_MX98715A: 4026 case TULIP_CHIP_MX98715AEC_X: 4027 case TULIP_CHIP_MX98725: 4028 siaconn = PMAC_SIACONN_MASK; 4029 siatxrx = PMAC_SIATXRX_MASK; 4030 siagen = PMAC_SIAGEN_MASK; 4031 break; 4032 4033 default: 4034 /* No fixups required on any other chips. */ 4035 return; 4036 } 4037 4038 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4039 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 4040 tm = ife->ifm_aux; 4041 if (tm == NULL) 4042 continue; 4043 4044 tm->tm_siaconn &= siaconn; 4045 tm->tm_siatxrx &= siatxrx; 4046 tm->tm_siagen &= siagen; 4047 } 4048 } 4049 4050 int 4051 tlp_sia_set(sc) 4052 struct tulip_softc *sc; 4053 { 4054 struct ifmedia_entry *ife; 4055 struct tulip_21x4x_media *tm; 4056 4057 ife = TULIP_CURRENT_MEDIA(sc); 4058 tm = ife->ifm_aux; 4059 4060 /* 4061 * XXX This appears to be necessary on a bunch of the clone chips. 4062 */ 4063 delay(20000); 4064 4065 /* 4066 * Idle the chip. 4067 */ 4068 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4069 4070 /* 4071 * Program the SIA. It's important to write in this order, 4072 * resetting the SIA first. 4073 */ 4074 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */ 4075 delay(1000); 4076 4077 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx); 4078 4079 switch (sc->sc_chip) { 4080 case TULIP_CHIP_21142: 4081 case TULIP_CHIP_21143: 4082 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl); 4083 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata); 4084 break; 4085 default: 4086 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen); 4087 } 4088 4089 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn); 4090 4091 /* 4092 * Set the OPMODE bits for this media and write OPMODE. 4093 * This will resume the transmit and receive processes. 4094 */ 4095 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4096 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4097 4098 return (0); 4099 } 4100 4101 /* 4102 * 21140 GPIO utility functions. 4103 */ 4104 void tlp_21140_gpio_update_link __P((struct tulip_softc *)); 4105 void tlp_21140_gpio_get __P((struct tulip_softc *sc, 4106 struct ifmediareq *ifmr)); 4107 int tlp_21140_gpio_set __P((struct tulip_softc *sc)); 4108 4109 void 4110 tlp_21140_gpio_update_link(sc) 4111 struct tulip_softc *sc; 4112 { 4113 struct ifmedia_entry *ife; 4114 struct tulip_21x4x_media *tm; 4115 4116 ife = TULIP_CURRENT_MEDIA(sc); 4117 tm = ife->ifm_aux; 4118 4119 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 4120 4121 if (tm->tm_actmask != 0) { 4122 sc->sc_flags |= TULIPF_LINK_VALID; 4123 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) == 4124 tm->tm_actdata) 4125 sc->sc_flags |= TULIPF_LINK_UP; 4126 } 4127 } 4128 4129 void 4130 tlp_21140_gpio_get(sc, ifmr) 4131 struct tulip_softc *sc; 4132 struct ifmediareq *ifmr; 4133 { 4134 struct ifmedia_entry *ife; 4135 4136 ifmr->ifm_status = 0; 4137 4138 tlp_21140_gpio_update_link(sc); 4139 4140 ife = TULIP_CURRENT_MEDIA(sc); 4141 4142 if (sc->sc_flags & TULIPF_LINK_VALID) 4143 ifmr->ifm_status |= IFM_AVALID; 4144 if (sc->sc_flags & TULIPF_LINK_UP) 4145 ifmr->ifm_status |= IFM_ACTIVE; 4146 ifmr->ifm_active = ife->ifm_media; 4147 } 4148 4149 int 4150 tlp_21140_gpio_set(sc) 4151 struct tulip_softc *sc; 4152 { 4153 struct ifmedia_entry *ife; 4154 struct tulip_21x4x_media *tm; 4155 4156 ife = TULIP_CURRENT_MEDIA(sc); 4157 tm = ife->ifm_aux; 4158 4159 /* 4160 * Idle the chip. 4161 */ 4162 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4163 4164 /* 4165 * Set the GPIO pins for this media, to flip any 4166 * relays, etc. 4167 */ 4168 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4169 delay(10); 4170 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata); 4171 4172 /* 4173 * Set the OPMODE bits for this media and write OPMODE. 4174 * This will resume the transmit and receive processes. 4175 */ 4176 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4177 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4178 4179 return (0); 4180 } 4181 4182 /* 4183 * 21040 and 21041 media switches. 4184 */ 4185 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 4186 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 4187 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 4188 void tlp_21041_tmsw_init __P((struct tulip_softc *)); 4189 4190 const struct tulip_mediasw tlp_21040_mediasw = { 4191 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set 4192 }; 4193 4194 const struct tulip_mediasw tlp_21040_tp_mediasw = { 4195 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set 4196 }; 4197 4198 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 4199 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set 4200 }; 4201 4202 const struct tulip_mediasw tlp_21041_mediasw = { 4203 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set 4204 }; 4205 4206 4207 void 4208 tlp_21040_tmsw_init(sc) 4209 struct tulip_softc *sc; 4210 { 4211 static const u_int8_t media[] = { 4212 TULIP_ROM_MB_MEDIA_TP, 4213 TULIP_ROM_MB_MEDIA_TP_FDX, 4214 TULIP_ROM_MB_MEDIA_AUI, 4215 }; 4216 struct tulip_21x4x_media *tm; 4217 4218 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4219 tlp_mediastatus); 4220 4221 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3); 4222 4223 /* 4224 * No SROM type for External SIA. 4225 */ 4226 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4227 memset(tm, 0, sizeof(*tm)); 4228 tm->tm_name = "manual"; 4229 tm->tm_opmode = 0; 4230 tm->tm_siaconn = SIACONN_21040_EXTSIA; 4231 tm->tm_siatxrx = SIATXRX_21040_EXTSIA; 4232 tm->tm_siagen = SIAGEN_21040_EXTSIA; 4233 ifmedia_add(&sc->sc_mii.mii_media, 4234 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm); 4235 4236 /* 4237 * XXX Autosense not yet supported. 4238 */ 4239 4240 /* XXX This should be auto-sense. */ 4241 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4242 4243 tlp_print_media(sc); 4244 } 4245 4246 void 4247 tlp_21040_tp_tmsw_init(sc) 4248 struct tulip_softc *sc; 4249 { 4250 static const u_int8_t media[] = { 4251 TULIP_ROM_MB_MEDIA_TP, 4252 TULIP_ROM_MB_MEDIA_TP_FDX, 4253 }; 4254 4255 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4256 tlp_mediastatus); 4257 4258 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2); 4259 4260 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4261 4262 tlp_print_media(sc); 4263 } 4264 4265 void 4266 tlp_21040_auibnc_tmsw_init(sc) 4267 struct tulip_softc *sc; 4268 { 4269 static const u_int8_t media[] = { 4270 TULIP_ROM_MB_MEDIA_AUI, 4271 }; 4272 4273 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4274 tlp_mediastatus); 4275 4276 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1); 4277 4278 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 4279 4280 tlp_print_media(sc); 4281 } 4282 4283 void 4284 tlp_21041_tmsw_init(sc) 4285 struct tulip_softc *sc; 4286 { 4287 static const u_int8_t media[] = { 4288 TULIP_ROM_MB_MEDIA_TP, 4289 TULIP_ROM_MB_MEDIA_TP_FDX, 4290 TULIP_ROM_MB_MEDIA_BNC, 4291 TULIP_ROM_MB_MEDIA_AUI, 4292 }; 4293 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt; 4294 const struct tulip_srom_to_ifmedia *tsti; 4295 struct tulip_21x4x_media *tm; 4296 u_int16_t romdef; 4297 u_int8_t mb; 4298 4299 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4300 tlp_mediastatus); 4301 4302 if (tlp_isv_srom(sc->sc_srom) == 0) { 4303 not_isv_srom: 4304 /* 4305 * If we have a board without the standard 21041 SROM format, 4306 * we just assume all media are present and try and pick a 4307 * reasonable default. 4308 */ 4309 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4); 4310 4311 /* 4312 * XXX Autosense not yet supported. 4313 */ 4314 4315 /* XXX This should be auto-sense. */ 4316 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4317 4318 tlp_print_media(sc); 4319 return; 4320 } 4321 4322 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4323 for (i = 0; i < devcnt; i++) { 4324 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4325 break; 4326 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4327 sc->sc_devno) 4328 break; 4329 } 4330 4331 if (i == devcnt) 4332 goto not_isv_srom; 4333 4334 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4335 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4336 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE; 4337 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4338 4339 for (; m_cnt != 0; 4340 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) { 4341 mb = sc->sc_srom[mb_offset]; 4342 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4343 memset(tm, 0, sizeof(*tm)); 4344 switch (mb & TULIP_ROM_MB_MEDIA_CODE) { 4345 case TULIP_ROM_MB_MEDIA_TP_FDX: 4346 case TULIP_ROM_MB_MEDIA_TP: 4347 case TULIP_ROM_MB_MEDIA_BNC: 4348 case TULIP_ROM_MB_MEDIA_AUI: 4349 tsti = tlp_srom_to_ifmedia(mb & 4350 TULIP_ROM_MB_MEDIA_CODE); 4351 4352 tlp_srom_media_info(sc, tsti, tm); 4353 4354 /* 4355 * Override our default SIA settings if the 4356 * SROM contains its own. 4357 */ 4358 if (mb & TULIP_ROM_MB_EXT) { 4359 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom, 4360 mb_offset + TULIP_ROM_MB_CSR13); 4361 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom, 4362 mb_offset + TULIP_ROM_MB_CSR14); 4363 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom, 4364 mb_offset + TULIP_ROM_MB_CSR15); 4365 } 4366 4367 ifmedia_add(&sc->sc_mii.mii_media, 4368 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4369 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4370 break; 4371 4372 default: 4373 printf("%s: unknown media code 0x%02x\n", 4374 sc->sc_dev.dv_xname, 4375 mb & TULIP_ROM_MB_MEDIA_CODE); 4376 free(tm, M_DEVBUF); 4377 } 4378 } 4379 4380 /* 4381 * XXX Autosense not yet supported. 4382 */ 4383 4384 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset + 4385 TULIP_ROM_IL_SELECT_CONN_TYPE); 4386 switch (romdef) { 4387 case SELECT_CONN_TYPE_TP: 4388 case SELECT_CONN_TYPE_TP_AUTONEG: 4389 case SELECT_CONN_TYPE_TP_NOLINKPASS: 4390 defmedia = IFM_ETHER|IFM_10_T; 4391 break; 4392 4393 case SELECT_CONN_TYPE_TP_FDX: 4394 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX; 4395 break; 4396 4397 case SELECT_CONN_TYPE_BNC: 4398 defmedia = IFM_ETHER|IFM_10_2; 4399 break; 4400 4401 case SELECT_CONN_TYPE_AUI: 4402 defmedia = IFM_ETHER|IFM_10_5; 4403 break; 4404 #if 0 /* XXX */ 4405 case SELECT_CONN_TYPE_ASENSE: 4406 case SELECT_CONN_TYPE_ASENSE_AUTONEG: 4407 defmedia = IFM_ETHER|IFM_AUTO; 4408 break; 4409 #endif 4410 default: 4411 defmedia = 0; 4412 } 4413 4414 if (defmedia == 0) { 4415 /* 4416 * XXX We should default to auto-sense. 4417 */ 4418 defmedia = IFM_ETHER|IFM_10_T; 4419 } 4420 4421 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4422 4423 tlp_print_media(sc); 4424 } 4425 4426 /* 4427 * DECchip 2114x ISV media switch. 4428 */ 4429 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *)); 4430 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 4431 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *)); 4432 4433 const struct tulip_mediasw tlp_2114x_isv_mediasw = { 4434 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 4435 }; 4436 4437 void 4438 tlp_2114x_isv_tmsw_init(sc) 4439 struct tulip_softc *sc; 4440 { 4441 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 4442 struct ifmedia_entry *ife; 4443 struct mii_softc *phy; 4444 struct tulip_21x4x_media *tm; 4445 const struct tulip_srom_to_ifmedia *tsti; 4446 int i, devcnt, leaf_offset, m_cnt, type, length; 4447 int defmedia, miidef; 4448 u_int16_t word; 4449 u_int8_t *cp, *ncp; 4450 4451 defmedia = miidef = 0; 4452 4453 sc->sc_mii.mii_ifp = ifp; 4454 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 4455 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 4456 sc->sc_mii.mii_statchg = sc->sc_statchg; 4457 4458 /* 4459 * Ignore `instance'; we may get a mixture of SIA and MII 4460 * media, and `instance' is used to isolate or select the 4461 * PHY on the MII as appropriate. Note that duplicate media 4462 * are disallowed, so ignoring `instance' is safe. 4463 */ 4464 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange, 4465 tlp_mediastatus); 4466 4467 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4468 for (i = 0; i < devcnt; i++) { 4469 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4470 break; 4471 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4472 sc->sc_devno) 4473 break; 4474 } 4475 4476 if (i == devcnt) { 4477 printf("%s: unable to locate info leaf in SROM\n", 4478 sc->sc_dev.dv_xname); 4479 return; 4480 } 4481 4482 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4483 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4484 4485 /* XXX SELECT CONN TYPE */ 4486 4487 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4488 4489 /* 4490 * On some chips, the first thing in the Info Leaf is the 4491 * GPIO pin direction data. 4492 */ 4493 switch (sc->sc_chip) { 4494 case TULIP_CHIP_21140: 4495 case TULIP_CHIP_21140A: 4496 case TULIP_CHIP_MX98713: 4497 case TULIP_CHIP_AX88140: 4498 case TULIP_CHIP_AX88141: 4499 sc->sc_gp_dir = *cp++; 4500 break; 4501 4502 default: 4503 /* Nothing. */ 4504 } 4505 4506 /* Get the media count. */ 4507 m_cnt = *cp++; 4508 4509 for (; m_cnt != 0; cp = ncp, m_cnt--) { 4510 /* 4511 * Determine the type and length of this media block. 4512 */ 4513 if ((*cp & 0x80) == 0) { 4514 length = 4; 4515 type = TULIP_ROM_MB_21140_GPR; 4516 } else { 4517 length = (*cp++ & 0x7f) - 1; 4518 type = *cp++ & 0x3f; 4519 } 4520 4521 /* Compute the start of the next block. */ 4522 ncp = cp + length; 4523 4524 /* Now, parse the block. */ 4525 switch (type) { 4526 case TULIP_ROM_MB_21140_GPR: 4527 tlp_get_minst(sc); 4528 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR; 4529 4530 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4531 memset(tm, 0, sizeof(*tm)); 4532 4533 tm->tm_type = TULIP_ROM_MB_21140_GPR; 4534 tm->tm_get = tlp_21140_gpio_get; 4535 tm->tm_set = tlp_21140_gpio_set; 4536 4537 /* First is the media type code. */ 4538 tsti = tlp_srom_to_ifmedia(cp[0] & 4539 TULIP_ROM_MB_MEDIA_CODE); 4540 if (tsti == NULL) { 4541 /* Invalid media code. */ 4542 free(tm, M_DEVBUF); 4543 break; 4544 } 4545 4546 /* Get defaults. */ 4547 tlp_srom_media_info(sc, tsti, tm); 4548 4549 /* Next is any GPIO info for this media. */ 4550 tm->tm_gpdata = cp[1]; 4551 4552 /* 4553 * Next is a word containing OPMODE information 4554 * and info on how to detect if this media is 4555 * active. 4556 */ 4557 word = TULIP_ROM_GETW(cp, 2); 4558 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4559 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4560 tm->tm_actmask = 4561 TULIP_ROM_MB_BITPOS(word); 4562 tm->tm_actdata = 4563 (word & TULIP_ROM_MB_POLARITY) ? 4564 0 : tm->tm_actmask; 4565 } 4566 4567 ifmedia_add(&sc->sc_mii.mii_media, 4568 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4569 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4570 break; 4571 4572 case TULIP_ROM_MB_21140_MII: 4573 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII; 4574 4575 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4576 memset(tm, 0, sizeof(*tm)); 4577 4578 tm->tm_type = TULIP_ROM_MB_21140_MII; 4579 tm->tm_get = tlp_mii_getmedia; 4580 tm->tm_set = tlp_mii_setmedia; 4581 tm->tm_opmode = OPMODE_PS; 4582 4583 if (sc->sc_reset == NULL) 4584 sc->sc_reset = tlp_21140_reset; 4585 4586 /* First is the PHY number. */ 4587 tm->tm_phyno = *cp++; 4588 4589 /* Next is the MII select sequence length and offset. */ 4590 tm->tm_gp_length = *cp++; 4591 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4592 cp += tm->tm_gp_length; 4593 4594 /* Next is the MII reset sequence length and offset. */ 4595 tm->tm_reset_length = *cp++; 4596 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4597 cp += tm->tm_reset_length; 4598 4599 /* 4600 * The following items are left in the media block 4601 * that we don't particularly care about: 4602 * 4603 * capabilities W 4604 * advertisement W 4605 * full duplex W 4606 * tx threshold W 4607 * 4608 * These appear to be bits in the PHY registers, 4609 * which our MII code handles on its own. 4610 */ 4611 4612 /* 4613 * Before we probe the MII bus, we need to reset 4614 * it and issue the selection sequence. 4615 */ 4616 4617 /* Set the direction of the pins... */ 4618 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4619 4620 for (i = 0; i < tm->tm_reset_length; i++) { 4621 delay(10); 4622 TULIP_WRITE(sc, CSR_GPP, 4623 sc->sc_srom[tm->tm_reset_offset + i]); 4624 } 4625 4626 for (i = 0; i < tm->tm_gp_length; i++) { 4627 delay(10); 4628 TULIP_WRITE(sc, CSR_GPP, 4629 sc->sc_srom[tm->tm_gp_offset + i]); 4630 } 4631 4632 /* If there were no sequences, just lower the pins. */ 4633 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4634 delay(10); 4635 TULIP_WRITE(sc, CSR_GPP, 0); 4636 } 4637 4638 /* 4639 * Now, probe the MII for the PHY. Note, we know 4640 * the location of the PHY on the bus, but we don't 4641 * particularly care; the MII code just likes to 4642 * search the whole thing anyhow. 4643 */ 4644 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4645 MII_PHY_ANY, tm->tm_phyno, 0); 4646 4647 /* 4648 * Now, search for the PHY we hopefully just 4649 * configured. If it's not configured into the 4650 * kernel, we lose. The PHY's default media always 4651 * takes priority. 4652 */ 4653 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4654 phy != NULL; 4655 phy = LIST_NEXT(phy, mii_list)) 4656 if (phy->mii_offset == tm->tm_phyno) 4657 break; 4658 if (phy == NULL) { 4659 printf("%s: unable to configure MII\n", 4660 sc->sc_dev.dv_xname); 4661 break; 4662 } 4663 4664 sc->sc_flags |= TULIPF_HAS_MII; 4665 sc->sc_tick = tlp_mii_tick; 4666 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4667 phy->mii_inst); 4668 4669 /* 4670 * Okay, now that we've found the PHY and the MII 4671 * layer has added all of the media associated 4672 * with that PHY, we need to traverse the media 4673 * list, and add our `tm' to each entry's `aux' 4674 * pointer. 4675 * 4676 * We do this by looking for media with our 4677 * PHY's `instance'. 4678 */ 4679 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4680 ife != NULL; 4681 ife = TAILQ_NEXT(ife, ifm_list)) { 4682 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4683 continue; 4684 ife->ifm_aux = tm; 4685 } 4686 break; 4687 4688 case TULIP_ROM_MB_21142_SIA: 4689 tlp_get_minst(sc); 4690 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA; 4691 4692 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4693 memset(tm, 0, sizeof(*tm)); 4694 4695 tm->tm_type = TULIP_ROM_MB_21142_SIA; 4696 tm->tm_get = tlp_sia_get; 4697 tm->tm_set = tlp_sia_set; 4698 4699 /* First is the media type code. */ 4700 tsti = tlp_srom_to_ifmedia(cp[0] & 4701 TULIP_ROM_MB_MEDIA_CODE); 4702 if (tsti == NULL) { 4703 /* Invalid media code. */ 4704 free(tm, M_DEVBUF); 4705 break; 4706 } 4707 4708 /* Get defaults. */ 4709 tlp_srom_media_info(sc, tsti, tm); 4710 4711 /* 4712 * Override our default SIA settings if the 4713 * SROM contains its own. 4714 */ 4715 if (cp[0] & 0x40) { 4716 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1); 4717 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3); 4718 tm->tm_siagen = TULIP_ROM_GETW(cp, 5); 4719 cp += 7; 4720 } else 4721 cp++; 4722 4723 /* Next is GPIO control/data. */ 4724 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0); 4725 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2); 4726 4727 ifmedia_add(&sc->sc_mii.mii_media, 4728 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4729 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4730 break; 4731 4732 case TULIP_ROM_MB_21142_MII: 4733 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII; 4734 4735 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4736 memset(tm, 0, sizeof(*tm)); 4737 4738 tm->tm_type = TULIP_ROM_MB_21142_MII; 4739 tm->tm_get = tlp_mii_getmedia; 4740 tm->tm_set = tlp_mii_setmedia; 4741 tm->tm_opmode = OPMODE_PS; 4742 4743 if (sc->sc_reset == NULL) 4744 sc->sc_reset = tlp_21142_reset; 4745 4746 /* First is the PHY number. */ 4747 tm->tm_phyno = *cp++; 4748 4749 /* Next is the MII select sequence length and offset. */ 4750 tm->tm_gp_length = *cp++; 4751 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4752 cp += tm->tm_gp_length * 2; 4753 4754 /* Next is the MII reset sequence length and offset. */ 4755 tm->tm_reset_length = *cp++; 4756 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4757 cp += tm->tm_reset_length * 2; 4758 4759 /* 4760 * The following items are left in the media block 4761 * that we don't particularly care about: 4762 * 4763 * capabilities W 4764 * advertisement W 4765 * full duplex W 4766 * tx threshold W 4767 * MII interrupt W 4768 * 4769 * These appear to be bits in the PHY registers, 4770 * which our MII code handles on its own. 4771 */ 4772 4773 /* 4774 * Before we probe the MII bus, we need to reset 4775 * it and issue the selection sequence. 4776 */ 4777 4778 ncp = &sc->sc_srom[tm->tm_reset_offset]; 4779 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 4780 delay(10); 4781 TULIP_WRITE(sc, CSR_SIAGEN, 4782 TULIP_ROM_GETW(ncp, 0) << 16); 4783 } 4784 4785 ncp = &sc->sc_srom[tm->tm_gp_offset]; 4786 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 4787 delay(10); 4788 TULIP_WRITE(sc, CSR_SIAGEN, 4789 TULIP_ROM_GETW(ncp, 0) << 16); 4790 } 4791 4792 /* If there were no sequences, just lower the pins. */ 4793 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4794 delay(10); 4795 TULIP_WRITE(sc, CSR_SIAGEN, 0); 4796 } 4797 4798 /* 4799 * Now, probe the MII for the PHY. Note, we know 4800 * the location of the PHY on the bus, but we don't 4801 * particularly care; the MII code just likes to 4802 * search the whole thing anyhow. 4803 */ 4804 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4805 MII_PHY_ANY, tm->tm_phyno, 0); 4806 4807 /* 4808 * Now, search for the PHY we hopefully just 4809 * configured. If it's not configured into the 4810 * kernel, we lose. The PHY's default media always 4811 * takes priority. 4812 */ 4813 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4814 phy != NULL; 4815 phy = LIST_NEXT(phy, mii_list)) 4816 if (phy->mii_offset == tm->tm_phyno) 4817 break; 4818 if (phy == NULL) { 4819 printf("%s: unable to configure MII\n", 4820 sc->sc_dev.dv_xname); 4821 break; 4822 } 4823 4824 sc->sc_flags |= TULIPF_HAS_MII; 4825 sc->sc_tick = tlp_mii_tick; 4826 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4827 phy->mii_inst); 4828 4829 /* 4830 * Okay, now that we've found the PHY and the MII 4831 * layer has added all of the media associated 4832 * with that PHY, we need to traverse the media 4833 * list, and add our `tm' to each entry's `aux' 4834 * pointer. 4835 * 4836 * We do this by looking for media with our 4837 * PHY's `instance'. 4838 */ 4839 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4840 ife != NULL; 4841 ife = TAILQ_NEXT(ife, ifm_list)) { 4842 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4843 continue; 4844 ife->ifm_aux = tm; 4845 } 4846 break; 4847 4848 case TULIP_ROM_MB_21143_SYM: 4849 tlp_get_minst(sc); 4850 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM; 4851 4852 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4853 memset(tm, 0, sizeof(*tm)); 4854 4855 tm->tm_type = TULIP_ROM_MB_21143_SYM; 4856 tm->tm_get = tlp_sia_get; 4857 tm->tm_set = tlp_sia_set; 4858 4859 /* First is the media type code. */ 4860 tsti = tlp_srom_to_ifmedia(cp[0] & 4861 TULIP_ROM_MB_MEDIA_CODE); 4862 if (tsti == NULL) { 4863 /* Invalid media code. */ 4864 free(tm, M_DEVBUF); 4865 break; 4866 } 4867 4868 /* Get defaults. */ 4869 tlp_srom_media_info(sc, tsti, tm); 4870 4871 /* Next is GPIO control/data. */ 4872 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1); 4873 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3); 4874 4875 /* 4876 * Next is a word containing OPMODE information 4877 * and info on how to detect if this media is 4878 * active. 4879 */ 4880 word = TULIP_ROM_GETW(cp, 5); 4881 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4882 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4883 tm->tm_actmask = 4884 TULIP_ROM_MB_BITPOS(word); 4885 tm->tm_actdata = 4886 (word & TULIP_ROM_MB_POLARITY) ? 4887 0 : tm->tm_actmask; 4888 } 4889 4890 ifmedia_add(&sc->sc_mii.mii_media, 4891 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4892 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4893 break; 4894 4895 case TULIP_ROM_MB_21143_RESET: 4896 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname); 4897 break; 4898 4899 default: 4900 printf("%s: unknown ISV media block type 0x%02x\n", 4901 sc->sc_dev.dv_xname, type); 4902 } 4903 } 4904 4905 /* 4906 * Deal with the case where no media is configured. 4907 */ 4908 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) { 4909 printf("%s: no media found!\n", sc->sc_dev.dv_xname); 4910 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 4911 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 4912 return; 4913 } 4914 4915 /* 4916 * Pick the default media. 4917 */ 4918 if (miidef != 0) 4919 defmedia = miidef; 4920 else { 4921 /* 4922 * XXX Pick a better default. Should come from SROM 4923 * XXX on 21140[A], and should be "auto" on 21142, 4924 * XXX 21143, and Macronix chips. 4925 */ 4926 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0); 4927 } 4928 4929 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4930 4931 /* 4932 * Display any non-MII media we've located. 4933 */ 4934 if (sc->sc_media_seen & 4935 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII))) 4936 tlp_print_media(sc); 4937 4938 tlp_sia_fixup(sc); 4939 } 4940 4941 void 4942 tlp_2114x_isv_tmsw_get(sc, ifmr) 4943 struct tulip_softc *sc; 4944 struct ifmediareq *ifmr; 4945 { 4946 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4947 struct tulip_21x4x_media *tm = ife->ifm_aux; 4948 4949 /* 4950 * We might be polling a non-MII autosense; check for that. 4951 */ 4952 if (tm == NULL) { 4953 #ifdef DIAGNOSTIC 4954 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4955 panic("tlp_2114x_isv_tmsw_get"); 4956 #endif 4957 tm = sc->sc_nway_active->ifm_aux; 4958 } 4959 4960 (*tm->tm_get)(sc, ifmr); 4961 } 4962 4963 int 4964 tlp_2114x_isv_tmsw_set(sc) 4965 struct tulip_softc *sc; 4966 { 4967 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4968 struct tulip_21x4x_media *tm = ife->ifm_aux; 4969 4970 /* 4971 * We might be setting a non-MII autosense; check for that. 4972 */ 4973 if (tm == NULL) { 4974 #ifdef DIAGNOSTIC 4975 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4976 panic("tlp_2114x_isv_tmsw_set"); 4977 #endif 4978 /* XXX XXX XXX */ 4979 } 4980 4981 /* 4982 * Check to see if we need to reset the chip, and do it. The 4983 * reset path will get the OPMODE register right the next 4984 * time through. 4985 */ 4986 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode)) 4987 return (tlp_init(&sc->sc_ethercom.ec_if)); 4988 4989 return ((*tm->tm_set)(sc)); 4990 } 4991 4992 /* 4993 * MII-on-SIO media switch. Handles only MII attached to the SIO. 4994 */ 4995 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 4996 4997 const struct tulip_mediasw tlp_sio_mii_mediasw = { 4998 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 4999 }; 5000 5001 void 5002 tlp_sio_mii_tmsw_init(sc) 5003 struct tulip_softc *sc; 5004 { 5005 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5006 5007 /* 5008 * We don't attach any media info structures to the ifmedia 5009 * entries, so if we're using a pre-init function that needs 5010 * that info, override it to one that doesn't. 5011 */ 5012 if (sc->sc_preinit == tlp_2114x_preinit) 5013 sc->sc_preinit = tlp_2114x_mii_preinit; 5014 5015 sc->sc_mii.mii_ifp = ifp; 5016 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5017 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5018 sc->sc_mii.mii_statchg = sc->sc_statchg; 5019 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5020 tlp_mediastatus); 5021 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5022 MII_OFFSET_ANY, 0); 5023 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5024 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5025 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5026 } else { 5027 sc->sc_flags |= TULIPF_HAS_MII; 5028 sc->sc_tick = tlp_mii_tick; 5029 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5030 } 5031 } 5032 5033 /* 5034 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 5035 */ 5036 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 5037 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 5038 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 5039 5040 const struct tulip_mediasw tlp_pnic_mediasw = { 5041 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 5042 }; 5043 5044 void tlp_pnic_nway_statchg __P((struct device *)); 5045 void tlp_pnic_nway_tick __P((void *)); 5046 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 5047 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 5048 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 5049 void tlp_pnic_nway_auto_timeout __P((void *)); 5050 void tlp_pnic_nway_status __P((struct tulip_softc *)); 5051 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 5052 5053 void 5054 tlp_pnic_tmsw_init(sc) 5055 struct tulip_softc *sc; 5056 { 5057 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5058 const char *sep = ""; 5059 5060 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 5061 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 5062 5063 sc->sc_mii.mii_ifp = ifp; 5064 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 5065 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 5066 sc->sc_mii.mii_statchg = sc->sc_statchg; 5067 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5068 tlp_mediastatus); 5069 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5070 MII_OFFSET_ANY, 0); 5071 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5072 /* XXX What about AUI/BNC support? */ 5073 printf("%s: ", sc->sc_dev.dv_xname); 5074 5075 tlp_pnic_nway_reset(sc); 5076 5077 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 5078 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 5079 PRINT("10baseT"); 5080 5081 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 5082 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 5083 PRINT("10baseT-FDX"); 5084 5085 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 5086 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 5087 PRINT("100baseTX"); 5088 5089 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 5090 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 5091 PNIC_NWAY_CAP100TXFDX); 5092 PRINT("100baseTX-FDX"); 5093 5094 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 5095 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 5096 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 5097 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 5098 PRINT("auto"); 5099 5100 printf("\n"); 5101 5102 sc->sc_statchg = tlp_pnic_nway_statchg; 5103 sc->sc_tick = tlp_pnic_nway_tick; 5104 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5105 } else { 5106 sc->sc_flags |= TULIPF_HAS_MII; 5107 sc->sc_tick = tlp_mii_tick; 5108 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5109 } 5110 5111 #undef ADD 5112 #undef PRINT 5113 } 5114 5115 void 5116 tlp_pnic_tmsw_get(sc, ifmr) 5117 struct tulip_softc *sc; 5118 struct ifmediareq *ifmr; 5119 { 5120 struct mii_data *mii = &sc->sc_mii; 5121 5122 if (sc->sc_flags & TULIPF_HAS_MII) 5123 tlp_mii_getmedia(sc, ifmr); 5124 else { 5125 mii->mii_media_status = 0; 5126 mii->mii_media_active = IFM_NONE; 5127 tlp_pnic_nway_service(sc, MII_POLLSTAT); 5128 ifmr->ifm_status = sc->sc_mii.mii_media_status; 5129 ifmr->ifm_active = sc->sc_mii.mii_media_active; 5130 } 5131 } 5132 5133 int 5134 tlp_pnic_tmsw_set(sc) 5135 struct tulip_softc *sc; 5136 { 5137 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5138 struct mii_data *mii = &sc->sc_mii; 5139 5140 if (sc->sc_flags & TULIPF_HAS_MII) { 5141 /* 5142 * Make sure the built-in Tx jabber timer is disabled. 5143 */ 5144 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 5145 5146 return (tlp_mii_setmedia(sc)); 5147 } 5148 5149 if (ifp->if_flags & IFF_UP) { 5150 mii->mii_media_status = 0; 5151 mii->mii_media_active = IFM_NONE; 5152 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 5153 } 5154 5155 return (0); 5156 } 5157 5158 void 5159 tlp_pnic_nway_statchg(self) 5160 struct device *self; 5161 { 5162 struct tulip_softc *sc = (struct tulip_softc *)self; 5163 5164 /* Idle the transmit and receive processes. */ 5165 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 5166 5167 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 5168 OPMODE_SCR|OPMODE_HBD); 5169 5170 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 5171 sc->sc_opmode |= OPMODE_TTM; 5172 TULIP_WRITE(sc, CSR_GPP, 5173 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 5174 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5175 } else { 5176 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD; 5177 TULIP_WRITE(sc, CSR_GPP, 5178 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 5179 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5180 } 5181 5182 if (sc->sc_mii.mii_media_active & IFM_FDX) 5183 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 5184 5185 /* 5186 * Write new OPMODE bits. This also restarts the transmit 5187 * and receive processes. 5188 */ 5189 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 5190 } 5191 5192 void 5193 tlp_pnic_nway_tick(arg) 5194 void *arg; 5195 { 5196 struct tulip_softc *sc = arg; 5197 int s; 5198 5199 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 5200 return; 5201 5202 s = splnet(); 5203 tlp_pnic_nway_service(sc, MII_TICK); 5204 splx(s); 5205 5206 callout_reset(&sc->sc_tick_callout, hz, tlp_pnic_nway_tick, sc); 5207 } 5208 5209 /* 5210 * Support for the Lite-On PNIC internal NWay block. This is constructed 5211 * somewhat like a PHY driver for simplicity. 5212 */ 5213 5214 int 5215 tlp_pnic_nway_service(sc, cmd) 5216 struct tulip_softc *sc; 5217 int cmd; 5218 { 5219 struct mii_data *mii = &sc->sc_mii; 5220 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5221 5222 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 5223 return (0); 5224 5225 switch (cmd) { 5226 case MII_POLLSTAT: 5227 /* Nothing special to do here. */ 5228 break; 5229 5230 case MII_MEDIACHG: 5231 switch (IFM_SUBTYPE(ife->ifm_media)) { 5232 case IFM_AUTO: 5233 (void) tlp_pnic_nway_auto(sc, 1); 5234 break; 5235 case IFM_100_T4: 5236 /* 5237 * XXX Not supported as a manual setting right now. 5238 */ 5239 return (EINVAL); 5240 default: 5241 /* 5242 * NWAY register data is stored in the ifmedia entry. 5243 */ 5244 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5245 } 5246 break; 5247 5248 case MII_TICK: 5249 /* 5250 * Only used for autonegotiation. 5251 */ 5252 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 5253 return (0); 5254 5255 /* 5256 * Check to see if we have link. If we do, we don't 5257 * need to restart the autonegotiation process. 5258 */ 5259 if (sc->sc_flags & TULIPF_LINK_UP) 5260 return (0); 5261 5262 /* 5263 * Only retry autonegotiation every 5 seconds. 5264 */ 5265 if (++sc->sc_nway_ticks != 5) 5266 return (0); 5267 5268 sc->sc_nway_ticks = 0; 5269 tlp_pnic_nway_reset(sc); 5270 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 5271 return (0); 5272 break; 5273 } 5274 5275 /* Update the media status. */ 5276 tlp_pnic_nway_status(sc); 5277 5278 /* Callback if something changed. */ 5279 if ((sc->sc_nway_active == NULL || 5280 sc->sc_nway_active->ifm_media != mii->mii_media_active) || 5281 cmd == MII_MEDIACHG) { 5282 (*sc->sc_statchg)(&sc->sc_dev); 5283 tlp_nway_activate(sc, mii->mii_media_active); 5284 } 5285 return (0); 5286 } 5287 5288 void 5289 tlp_pnic_nway_reset(sc) 5290 struct tulip_softc *sc; 5291 { 5292 5293 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 5294 delay(100); 5295 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 5296 } 5297 5298 int 5299 tlp_pnic_nway_auto(sc, waitfor) 5300 struct tulip_softc *sc; 5301 int waitfor; 5302 { 5303 struct mii_data *mii = &sc->sc_mii; 5304 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5305 u_int32_t reg; 5306 int i; 5307 5308 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 5309 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5310 5311 if (waitfor) { 5312 /* Wait 500ms for it to complete. */ 5313 for (i = 0; i < 500; i++) { 5314 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5315 if (reg & PNIC_NWAY_LPAR_MASK) { 5316 tlp_pnic_nway_acomp(sc); 5317 return (0); 5318 } 5319 delay(1000); 5320 } 5321 #if 0 5322 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5323 printf("%s: autonegotiation failed to complete\n", 5324 sc->sc_dev.dv_xname); 5325 #endif 5326 5327 /* 5328 * Don't need to worry about clearing DOINGAUTO. 5329 * If that's set, a timeout is pending, and it will 5330 * clear the flag. 5331 */ 5332 return (EIO); 5333 } 5334 5335 /* 5336 * Just let it finish asynchronously. This is for the benefit of 5337 * the tick handler driving autonegotiation. Don't want 500ms 5338 * delays all the time while the system is running! 5339 */ 5340 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 5341 sc->sc_flags |= TULIPF_DOINGAUTO; 5342 callout_reset(&sc->sc_nway_callout, hz >> 1, 5343 tlp_pnic_nway_auto_timeout, sc); 5344 } 5345 return (EJUSTRETURN); 5346 } 5347 5348 void 5349 tlp_pnic_nway_auto_timeout(arg) 5350 void *arg; 5351 { 5352 struct tulip_softc *sc = arg; 5353 u_int32_t reg; 5354 int s; 5355 5356 s = splnet(); 5357 sc->sc_flags &= ~TULIPF_DOINGAUTO; 5358 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5359 #if 0 5360 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5361 printf("%s: autonegotiation failed to complete\n", 5362 sc->sc_dev.dv_xname); 5363 #endif 5364 5365 tlp_pnic_nway_acomp(sc); 5366 5367 /* Update the media status. */ 5368 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 5369 splx(s); 5370 } 5371 5372 void 5373 tlp_pnic_nway_status(sc) 5374 struct tulip_softc *sc; 5375 { 5376 struct mii_data *mii = &sc->sc_mii; 5377 u_int32_t reg; 5378 5379 mii->mii_media_status = IFM_AVALID; 5380 mii->mii_media_active = IFM_ETHER; 5381 5382 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5383 5384 if (sc->sc_flags & TULIPF_LINK_UP) 5385 mii->mii_media_status |= IFM_ACTIVE; 5386 5387 if (reg & PNIC_NWAY_NW) { 5388 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 5389 /* Erg, still trying, I guess... */ 5390 mii->mii_media_active |= IFM_NONE; 5391 return; 5392 } 5393 5394 #if 0 5395 if (reg & PNIC_NWAY_LPAR100T4) 5396 mii->mii_media_active |= IFM_100_T4; 5397 else 5398 #endif 5399 if (reg & PNIC_NWAY_LPAR100TXFDX) 5400 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 5401 else if (reg & PNIC_NWAY_LPAR100TX) 5402 mii->mii_media_active |= IFM_100_TX; 5403 else if (reg & PNIC_NWAY_LPAR10TFDX) 5404 mii->mii_media_active |= IFM_10_T|IFM_FDX; 5405 else if (reg & PNIC_NWAY_LPAR10T) 5406 mii->mii_media_active |= IFM_10_T; 5407 else 5408 mii->mii_media_active |= IFM_NONE; 5409 } else { 5410 if (reg & PNIC_NWAY_100) 5411 mii->mii_media_active |= IFM_100_TX; 5412 else 5413 mii->mii_media_active |= IFM_10_T; 5414 if (reg & PNIC_NWAY_FD) 5415 mii->mii_media_active |= IFM_FDX; 5416 } 5417 } 5418 5419 void 5420 tlp_pnic_nway_acomp(sc) 5421 struct tulip_softc *sc; 5422 { 5423 u_int32_t reg; 5424 5425 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5426 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 5427 5428 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 5429 reg |= PNIC_NWAY_100; 5430 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 5431 reg |= PNIC_NWAY_FD; 5432 5433 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 5434 } 5435 5436 /* 5437 * Macronix PMAC and Lite-On PNIC-II media switch: 5438 * 5439 * MX98713 and MX98713A 21140-like MII or GPIO media. 5440 * 5441 * MX98713A 21143-like MII or SIA/SYM media. 5442 * 5443 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media. 5444 * 82C115, MX98715AEC-C, -E 5445 * 5446 * So, what we do here is fake MII-on-SIO or ISV media info, and 5447 * use the ISV media switch get/set functions to handle the rest. 5448 */ 5449 5450 void tlp_pmac_tmsw_init __P((struct tulip_softc *)); 5451 5452 const struct tulip_mediasw tlp_pmac_mediasw = { 5453 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 5454 }; 5455 5456 const struct tulip_mediasw tlp_pmac_mii_mediasw = { 5457 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5458 }; 5459 5460 void 5461 tlp_pmac_tmsw_init(sc) 5462 struct tulip_softc *sc; 5463 { 5464 static const u_int8_t media[] = { 5465 TULIP_ROM_MB_MEDIA_TP, 5466 TULIP_ROM_MB_MEDIA_TP_FDX, 5467 TULIP_ROM_MB_MEDIA_100TX, 5468 TULIP_ROM_MB_MEDIA_100TX_FDX, 5469 }; 5470 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5471 5472 sc->sc_mii.mii_ifp = ifp; 5473 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5474 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5475 sc->sc_mii.mii_statchg = sc->sc_statchg; 5476 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5477 tlp_mediastatus); 5478 if (sc->sc_chip == TULIP_CHIP_MX98713 || 5479 sc->sc_chip == TULIP_CHIP_MX98713A) { 5480 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 5481 MII_PHY_ANY, MII_OFFSET_ANY, 0); 5482 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) { 5483 sc->sc_flags |= TULIPF_HAS_MII; 5484 sc->sc_tick = tlp_mii_tick; 5485 sc->sc_preinit = tlp_2114x_mii_preinit; 5486 sc->sc_mediasw = &tlp_pmac_mii_mediasw; 5487 ifmedia_set(&sc->sc_mii.mii_media, 5488 IFM_ETHER|IFM_AUTO); 5489 return; 5490 } 5491 } 5492 5493 switch (sc->sc_chip) { 5494 case TULIP_CHIP_MX98713: 5495 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR, 5496 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4); 5497 5498 /* 5499 * XXX Should implement auto-sense for this someday, 5500 * XXX when we do the same for the 21140. 5501 */ 5502 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5503 break; 5504 5505 default: 5506 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA, 5507 tlp_sia_get, tlp_sia_set, media, 2); 5508 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM, 5509 tlp_sia_get, tlp_sia_set, media + 2, 2); 5510 5511 /* 5512 * XXX Autonegotiation not yet supported. 5513 */ 5514 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5515 break; 5516 } 5517 5518 tlp_print_media(sc); 5519 tlp_sia_fixup(sc); 5520 5521 /* Set the LED modes. */ 5522 tlp_pmac_reset(sc); 5523 5524 sc->sc_reset = tlp_pmac_reset; 5525 } 5526 5527 /* 5528 * ADMtek AL981 media switch. Only has internal PHY. 5529 */ 5530 void tlp_al981_tmsw_init __P((struct tulip_softc *)); 5531 5532 const struct tulip_mediasw tlp_al981_mediasw = { 5533 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5534 }; 5535 5536 void 5537 tlp_al981_tmsw_init(sc) 5538 struct tulip_softc *sc; 5539 { 5540 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5541 5542 sc->sc_mii.mii_ifp = ifp; 5543 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg; 5544 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg; 5545 sc->sc_mii.mii_statchg = sc->sc_statchg; 5546 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5547 tlp_mediastatus); 5548 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5549 MII_OFFSET_ANY, 0); 5550 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5551 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5552 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5553 } else { 5554 sc->sc_flags |= TULIPF_HAS_MII; 5555 sc->sc_tick = tlp_mii_tick; 5556 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5557 } 5558 } 5559 5560 /* 5561 * Davicom DM9102 media switch. Internal PHY and possibly HomePNA. 5562 */ 5563 void tlp_dm9102_tmsw_init __P((struct tulip_softc *)); 5564 void tlp_dm9102_tmsw_getmedia __P((struct tulip_softc *, 5565 struct ifmediareq *)); 5566 int tlp_dm9102_tmsw_setmedia __P((struct tulip_softc *)); 5567 5568 const struct tulip_mediasw tlp_dm9102_mediasw = { 5569 tlp_dm9102_tmsw_init, tlp_dm9102_tmsw_getmedia, 5570 tlp_dm9102_tmsw_setmedia 5571 }; 5572 5573 void 5574 tlp_dm9102_tmsw_init(sc) 5575 struct tulip_softc *sc; 5576 { 5577 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5578 u_int32_t opmode; 5579 5580 sc->sc_mii.mii_ifp = ifp; 5581 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5582 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5583 sc->sc_mii.mii_statchg = sc->sc_statchg; 5584 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5585 tlp_mediastatus); 5586 5587 /* PHY block already reset via tlp_reset(). */ 5588 5589 /* 5590 * Configure OPMODE properly for the internal MII interface. 5591 */ 5592 switch (sc->sc_chip) { 5593 case TULIP_CHIP_DM9102: 5594 opmode = OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 5595 break; 5596 5597 case TULIP_CHIP_DM9102A: 5598 opmode = OPMODE_MBO|OPMODE_HBD; 5599 break; 5600 5601 default: 5602 /* Nothing. */ 5603 } 5604 5605 TULIP_WRITE(sc, CSR_OPMODE, opmode); 5606 5607 /* Now, probe the internal MII for the internal PHY. */ 5608 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5609 MII_OFFSET_ANY, 0); 5610 5611 /* 5612 * XXX Figure out what to do about the HomePNA portion 5613 * XXX of the DM9102A. 5614 */ 5615 5616 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5617 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5618 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5619 } else { 5620 sc->sc_flags |= TULIPF_HAS_MII; 5621 sc->sc_tick = tlp_mii_tick; 5622 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5623 } 5624 } 5625 5626 void 5627 tlp_dm9102_tmsw_getmedia(sc, ifmr) 5628 struct tulip_softc *sc; 5629 struct ifmediareq *ifmr; 5630 { 5631 5632 /* XXX HomePNA on DM9102A. */ 5633 tlp_mii_getmedia(sc, ifmr); 5634 } 5635 5636 int 5637 tlp_dm9102_tmsw_setmedia(sc) 5638 struct tulip_softc *sc; 5639 { 5640 5641 /* XXX HomePNA on DM9102A. */ 5642 return (tlp_mii_setmedia(sc)); 5643 } 5644
Indexes created Fri Sep 26 08:10:20 GMT 2025