tulip.c revision 1.83
1 /* $NetBSD: tulip.c,v 1.83 2000/12/14 06:27:26 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/callout.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <machine/endian.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <net/if.h> 65 #include <net/if_dl.h> 66 #include <net/if_media.h> 67 #include <net/if_ether.h> 68 69 #if NBPFILTER > 0 70 #include <net/bpf.h> 71 #endif 72 73 #ifdef INET 74 #include <netinet/in.h> 75 #include <netinet/if_inarp.h> 76 #endif 77 78 #ifdef NS 79 #include <netns/ns.h> 80 #include <netns/ns_if.h> 81 #endif 82 83 #include <machine/bus.h> 84 #include <machine/intr.h> 85 86 #include <dev/mii/mii.h> 87 #include <dev/mii/miivar.h> 88 #include <dev/mii/mii_bitbang.h> 89 90 #include <dev/ic/tulipreg.h> 91 #include <dev/ic/tulipvar.h> 92 93 const char *tlp_chip_names[] = TULIP_CHIP_NAMES; 94 95 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = 96 TLP_TXTHRESH_TAB_10; 97 98 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = 99 TLP_TXTHRESH_TAB_10_100; 100 101 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = 102 TLP_TXTHRESH_TAB_WINB; 103 104 const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] = 105 TLP_TXTHRESH_TAB_DM9102; 106 107 void tlp_start __P((struct ifnet *)); 108 void tlp_watchdog __P((struct ifnet *)); 109 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 110 int tlp_init __P((struct ifnet *)); 111 void tlp_stop __P((struct ifnet *, int)); 112 113 void tlp_shutdown __P((void *)); 114 115 void tlp_reset __P((struct tulip_softc *)); 116 void tlp_rxdrain __P((struct tulip_softc *)); 117 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 118 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 119 void tlp_srom_idle __P((struct tulip_softc *)); 120 int tlp_srom_size __P((struct tulip_softc *)); 121 122 int tlp_enable __P((struct tulip_softc *)); 123 void tlp_disable __P((struct tulip_softc *)); 124 void tlp_power __P((int, void *)); 125 126 void tlp_filter_setup __P((struct tulip_softc *)); 127 void tlp_winb_filter_setup __P((struct tulip_softc *)); 128 void tlp_al981_filter_setup __P((struct tulip_softc *)); 129 130 void tlp_rxintr __P((struct tulip_softc *)); 131 void tlp_txintr __P((struct tulip_softc *)); 132 133 void tlp_mii_tick __P((void *)); 134 void tlp_mii_statchg __P((struct device *)); 135 void tlp_winb_mii_statchg __P((struct device *)); 136 void tlp_dm9102_mii_statchg __P((struct device *)); 137 138 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 139 int tlp_mii_setmedia __P((struct tulip_softc *)); 140 141 int tlp_bitbang_mii_readreg __P((struct device *, int, int)); 142 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int)); 143 144 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 145 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 146 147 int tlp_al981_mii_readreg __P((struct device *, int, int)); 148 void tlp_al981_mii_writereg __P((struct device *, int, int, int)); 149 150 void tlp_2114x_preinit __P((struct tulip_softc *)); 151 void tlp_2114x_mii_preinit __P((struct tulip_softc *)); 152 void tlp_pnic_preinit __P((struct tulip_softc *)); 153 void tlp_dm9102_preinit __P((struct tulip_softc *)); 154 155 void tlp_21140_reset __P((struct tulip_softc *)); 156 void tlp_21142_reset __P((struct tulip_softc *)); 157 void tlp_pmac_reset __P((struct tulip_softc *)); 158 void tlp_dm9102_reset __P((struct tulip_softc *)); 159 160 #define tlp_mchash(addr, sz) \ 161 (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1)) 162 163 /* 164 * MII bit-bang glue. 165 */ 166 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *)); 167 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t)); 168 169 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = { 170 tlp_sio_mii_bitbang_read, 171 tlp_sio_mii_bitbang_write, 172 { 173 MIIROM_MDO, /* MII_BIT_MDO */ 174 MIIROM_MDI, /* MII_BIT_MDI */ 175 MIIROM_MDC, /* MII_BIT_MDC */ 176 0, /* MII_BIT_DIR_HOST_PHY */ 177 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */ 178 } 179 }; 180 181 #ifdef TLP_DEBUG 182 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 183 printf x 184 #else 185 #define DPRINTF(sc, x) /* nothing */ 186 #endif 187 188 #ifdef TLP_STATS 189 void tlp_print_stats __P((struct tulip_softc *)); 190 #endif 191 192 /* 193 * Can be used to debug the SROM-related things, including contents. 194 * Initialized so that it's patchable. 195 */ 196 int tlp_srom_debug = 0; 197 198 /* 199 * tlp_attach: 200 * 201 * Attach a Tulip interface to the system. 202 */ 203 void 204 tlp_attach(sc, enaddr) 205 struct tulip_softc *sc; 206 const u_int8_t *enaddr; 207 { 208 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 209 int i, error; 210 211 callout_init(&sc->sc_nway_callout); 212 callout_init(&sc->sc_tick_callout); 213 214 /* 215 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 216 */ 217 218 /* 219 * Setup the transmit threshold table. 220 */ 221 switch (sc->sc_chip) { 222 case TULIP_CHIP_DE425: 223 case TULIP_CHIP_21040: 224 case TULIP_CHIP_21041: 225 sc->sc_txth = tlp_10_txthresh_tab; 226 break; 227 228 case TULIP_CHIP_DM9102: 229 case TULIP_CHIP_DM9102A: 230 sc->sc_txth = tlp_dm9102_txthresh_tab; 231 break; 232 233 default: 234 sc->sc_txth = tlp_10_100_txthresh_tab; 235 break; 236 } 237 238 /* 239 * Setup the filter setup function. 240 */ 241 switch (sc->sc_chip) { 242 case TULIP_CHIP_WB89C840F: 243 sc->sc_filter_setup = tlp_winb_filter_setup; 244 break; 245 246 case TULIP_CHIP_AL981: 247 case TULIP_CHIP_AN983: 248 case TULIP_CHIP_AN985: 249 sc->sc_filter_setup = tlp_al981_filter_setup; 250 break; 251 252 default: 253 sc->sc_filter_setup = tlp_filter_setup; 254 break; 255 } 256 257 /* 258 * Set up the media status change function. 259 */ 260 switch (sc->sc_chip) { 261 case TULIP_CHIP_WB89C840F: 262 sc->sc_statchg = tlp_winb_mii_statchg; 263 break; 264 265 case TULIP_CHIP_DM9102: 266 case TULIP_CHIP_DM9102A: 267 sc->sc_statchg = tlp_dm9102_mii_statchg; 268 break; 269 270 default: 271 /* 272 * We may override this if we have special media 273 * handling requirements (e.g. flipping GPIO pins). 274 * 275 * The pure-MII statchg function covers the basics. 276 */ 277 sc->sc_statchg = tlp_mii_statchg; 278 break; 279 } 280 281 /* 282 * Default to no FS|LS in setup packet descriptors. They're 283 * supposed to be zero according to the 21040 and 21143 284 * manuals, and some chips fall over badly if they're 285 * included. Yet, other chips seem to require them. Sigh. 286 */ 287 switch (sc->sc_chip) { 288 case TULIP_CHIP_X3201_3: 289 sc->sc_setup_fsls = TDCTL_Tx_FS|TDCTL_Tx_LS; 290 break; 291 292 default: 293 sc->sc_setup_fsls = 0; 294 } 295 296 /* 297 * Set up various chip-specific quirks. 298 * 299 * Note that wherever we can, we use the "ring" option for 300 * transmit and receive descriptors. This is because some 301 * clone chips apparently have problems when using chaining, 302 * although some *only* support chaining. 303 * 304 * What we do is always program the "next" pointer, and then 305 * conditionally set the TDCTL_CH and TDCTL_ER bits in the 306 * appropriate places. 307 */ 308 switch (sc->sc_chip) { 309 case TULIP_CHIP_21140: 310 case TULIP_CHIP_21140A: 311 case TULIP_CHIP_21142: 312 case TULIP_CHIP_21143: 313 case TULIP_CHIP_82C115: /* 21143-like */ 314 case TULIP_CHIP_MX98713: /* 21140-like */ 315 case TULIP_CHIP_MX98713A: /* 21143-like */ 316 case TULIP_CHIP_MX98715: /* 21143-like */ 317 case TULIP_CHIP_MX98715A: /* 21143-like */ 318 case TULIP_CHIP_MX98715AEC_X: /* 21143-like */ 319 case TULIP_CHIP_MX98725: /* 21143-like */ 320 /* 321 * Run these chips in ring mode. 322 */ 323 sc->sc_tdctl_ch = 0; 324 sc->sc_tdctl_er = TDCTL_ER; 325 sc->sc_preinit = tlp_2114x_preinit; 326 break; 327 328 case TULIP_CHIP_82C168: 329 case TULIP_CHIP_82C169: 330 /* 331 * Run these chips in ring mode. 332 */ 333 sc->sc_tdctl_ch = 0; 334 sc->sc_tdctl_er = TDCTL_ER; 335 sc->sc_preinit = tlp_pnic_preinit; 336 337 /* 338 * These chips seem to have busted DMA engines; just put them 339 * in Store-and-Forward mode from the get-go. 340 */ 341 sc->sc_txthresh = TXTH_SF; 342 break; 343 344 case TULIP_CHIP_WB89C840F: 345 /* 346 * Run this chip in chained mode. 347 */ 348 sc->sc_tdctl_ch = TDCTL_CH; 349 sc->sc_tdctl_er = 0; 350 sc->sc_flags |= TULIPF_IC_FS; 351 break; 352 353 case TULIP_CHIP_DM9102: 354 case TULIP_CHIP_DM9102A: 355 /* 356 * Run these chips in chained mode. 357 */ 358 sc->sc_tdctl_ch = TDCTL_CH; 359 sc->sc_tdctl_er = 0; 360 sc->sc_preinit = tlp_dm9102_preinit; 361 362 /* 363 * These chips have a broken bus interface, so we 364 * can't use any optimized bus commands. For this 365 * reason, we tend to underrun pretty quickly, so 366 * just to Store-and-Forward mode from the get-go. 367 */ 368 sc->sc_txthresh = TXTH_DM9102_SF; 369 break; 370 371 default: 372 /* 373 * Default to running in ring mode. 374 */ 375 sc->sc_tdctl_ch = 0; 376 sc->sc_tdctl_er = TDCTL_ER; 377 } 378 379 /* 380 * Set up the MII bit-bang operations. 381 */ 382 switch (sc->sc_chip) { 383 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */ 384 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 385 break; 386 387 default: 388 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 389 } 390 391 SIMPLEQ_INIT(&sc->sc_txfreeq); 392 SIMPLEQ_INIT(&sc->sc_txdirtyq); 393 394 /* 395 * Allocate the control data structures, and create and load the 396 * DMA map for it. 397 */ 398 if ((error = bus_dmamem_alloc(sc->sc_dmat, 399 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg, 400 1, &sc->sc_cdnseg, 0)) != 0) { 401 printf("%s: unable to allocate control data, error = %d\n", 402 sc->sc_dev.dv_xname, error); 403 goto fail_0; 404 } 405 406 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg, 407 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 408 BUS_DMA_COHERENT)) != 0) { 409 printf("%s: unable to map control data, error = %d\n", 410 sc->sc_dev.dv_xname, error); 411 goto fail_1; 412 } 413 414 if ((error = bus_dmamap_create(sc->sc_dmat, 415 sizeof(struct tulip_control_data), 1, 416 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 417 printf("%s: unable to create control data DMA map, " 418 "error = %d\n", sc->sc_dev.dv_xname, error); 419 goto fail_2; 420 } 421 422 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 423 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 424 0)) != 0) { 425 printf("%s: unable to load control data DMA map, error = %d\n", 426 sc->sc_dev.dv_xname, error); 427 goto fail_3; 428 } 429 430 /* 431 * Create the transmit buffer DMA maps. 432 * 433 * Note that on the Xircom clone, transmit buffers must be 434 * 4-byte aligned. We're almost guaranteed to have to copy 435 * the packet in that case, so we just limit ourselves to 436 * one segment. 437 * 438 * On the DM9102, the transmit logic can only handle one 439 * DMA segment. 440 */ 441 switch (sc->sc_chip) { 442 case TULIP_CHIP_X3201_3: 443 case TULIP_CHIP_DM9102: 444 case TULIP_CHIP_DM9102A: 445 sc->sc_ntxsegs = 1; 446 break; 447 448 default: 449 sc->sc_ntxsegs = TULIP_NTXSEGS; 450 } 451 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 452 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 453 sc->sc_ntxsegs, MCLBYTES, 0, 0, 454 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 455 printf("%s: unable to create tx DMA map %d, " 456 "error = %d\n", sc->sc_dev.dv_xname, i, error); 457 goto fail_4; 458 } 459 } 460 461 /* 462 * Create the recieve buffer DMA maps. 463 */ 464 for (i = 0; i < TULIP_NRXDESC; i++) { 465 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 466 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 467 printf("%s: unable to create rx DMA map %d, " 468 "error = %d\n", sc->sc_dev.dv_xname, i, error); 469 goto fail_5; 470 } 471 sc->sc_rxsoft[i].rxs_mbuf = NULL; 472 } 473 474 /* 475 * From this point forward, the attachment cannot fail. A failure 476 * before this point releases all resources that may have been 477 * allocated. 478 */ 479 sc->sc_flags |= TULIPF_ATTACHED; 480 481 /* 482 * Reset the chip to a known state. 483 */ 484 tlp_reset(sc); 485 486 /* Announce ourselves. */ 487 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 488 sc->sc_name[0] != '\0' ? sc->sc_name : "", 489 sc->sc_name[0] != '\0' ? ", " : "", 490 ether_sprintf(enaddr)); 491 492 /* 493 * Initialize our media structures. This may probe the MII, if 494 * present. 495 */ 496 (*sc->sc_mediasw->tmsw_init)(sc); 497 498 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 499 ifp->if_softc = sc; 500 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 501 ifp->if_ioctl = tlp_ioctl; 502 ifp->if_start = tlp_start; 503 ifp->if_watchdog = tlp_watchdog; 504 ifp->if_init = tlp_init; 505 ifp->if_stop = tlp_stop; 506 IFQ_SET_READY(&ifp->if_snd); 507 508 /* 509 * We can support 802.1Q VLAN-sized frames. 510 */ 511 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 512 513 /* 514 * Attach the interface. 515 */ 516 if_attach(ifp); 517 ether_ifattach(ifp, enaddr); 518 #if NRND > 0 519 rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname, 520 RND_TYPE_NET, 0); 521 #endif 522 523 /* 524 * Make sure the interface is shutdown during reboot. 525 */ 526 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 527 if (sc->sc_sdhook == NULL) 528 printf("%s: WARNING: unable to establish shutdown hook\n", 529 sc->sc_dev.dv_xname); 530 531 /* 532 * Add a suspend hook to make sure we come back up after a 533 * resume. 534 */ 535 sc->sc_powerhook = powerhook_establish(tlp_power, sc); 536 if (sc->sc_powerhook == NULL) 537 printf("%s: WARNING: unable to establish power hook\n", 538 sc->sc_dev.dv_xname); 539 return; 540 541 /* 542 * Free any resources we've allocated during the failed attach 543 * attempt. Do this in reverse order and fall through. 544 */ 545 fail_5: 546 for (i = 0; i < TULIP_NRXDESC; i++) { 547 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 548 bus_dmamap_destroy(sc->sc_dmat, 549 sc->sc_rxsoft[i].rxs_dmamap); 550 } 551 fail_4: 552 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 553 if (sc->sc_txsoft[i].txs_dmamap != NULL) 554 bus_dmamap_destroy(sc->sc_dmat, 555 sc->sc_txsoft[i].txs_dmamap); 556 } 557 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 558 fail_3: 559 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 560 fail_2: 561 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 562 sizeof(struct tulip_control_data)); 563 fail_1: 564 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 565 fail_0: 566 return; 567 } 568 569 /* 570 * tlp_activate: 571 * 572 * Handle device activation/deactivation requests. 573 */ 574 int 575 tlp_activate(self, act) 576 struct device *self; 577 enum devact act; 578 { 579 struct tulip_softc *sc = (void *) self; 580 int s, error = 0; 581 582 s = splnet(); 583 switch (act) { 584 case DVACT_ACTIVATE: 585 error = EOPNOTSUPP; 586 break; 587 588 case DVACT_DEACTIVATE: 589 if (sc->sc_flags & TULIPF_HAS_MII) 590 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 591 MII_OFFSET_ANY); 592 if_deactivate(&sc->sc_ethercom.ec_if); 593 break; 594 } 595 splx(s); 596 597 return (error); 598 } 599 600 /* 601 * tlp_detach: 602 * 603 * Detach a Tulip interface. 604 */ 605 int 606 tlp_detach(sc) 607 struct tulip_softc *sc; 608 { 609 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 610 struct tulip_rxsoft *rxs; 611 struct tulip_txsoft *txs; 612 int i; 613 614 /* 615 * Suceed now if there isn't any work to do. 616 */ 617 if ((sc->sc_flags & TULIPF_ATTACHED) == 0) 618 return (0); 619 620 /* Unhook our tick handler. */ 621 if (sc->sc_tick) 622 callout_stop(&sc->sc_tick_callout); 623 624 if (sc->sc_flags & TULIPF_HAS_MII) { 625 /* Detach all PHYs */ 626 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 627 } 628 629 /* Delete all remaining media. */ 630 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 631 632 #if NRND > 0 633 rnd_detach_source(&sc->sc_rnd_source); 634 #endif 635 ether_ifdetach(ifp); 636 if_detach(ifp); 637 638 for (i = 0; i < TULIP_NRXDESC; i++) { 639 rxs = &sc->sc_rxsoft[i]; 640 if (rxs->rxs_mbuf != NULL) { 641 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 642 m_freem(rxs->rxs_mbuf); 643 rxs->rxs_mbuf = NULL; 644 } 645 bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap); 646 } 647 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 648 txs = &sc->sc_txsoft[i]; 649 if (txs->txs_mbuf != NULL) { 650 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 651 m_freem(txs->txs_mbuf); 652 txs->txs_mbuf = NULL; 653 } 654 bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap); 655 } 656 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 657 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 658 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 659 sizeof(struct tulip_control_data)); 660 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 661 662 shutdownhook_disestablish(sc->sc_sdhook); 663 powerhook_disestablish(sc->sc_powerhook); 664 665 if (sc->sc_srom) 666 free(sc->sc_srom, M_DEVBUF); 667 668 return (0); 669 } 670 671 /* 672 * tlp_shutdown: 673 * 674 * Make sure the interface is stopped at reboot time. 675 */ 676 void 677 tlp_shutdown(arg) 678 void *arg; 679 { 680 struct tulip_softc *sc = arg; 681 682 tlp_stop(&sc->sc_ethercom.ec_if, 1); 683 } 684 685 /* 686 * tlp_start: [ifnet interface function] 687 * 688 * Start packet transmission on the interface. 689 */ 690 void 691 tlp_start(ifp) 692 struct ifnet *ifp; 693 { 694 struct tulip_softc *sc = ifp->if_softc; 695 struct mbuf *m0, *m; 696 struct tulip_txsoft *txs, *last_txs; 697 bus_dmamap_t dmamap; 698 int error, firsttx, nexttx, lasttx, ofree, seg; 699 700 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 701 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 702 703 /* 704 * If we want a filter setup, it means no more descriptors were 705 * available for the setup routine. Let it get a chance to wedge 706 * itself into the ring. 707 */ 708 if (sc->sc_flags & TULIPF_WANT_SETUP) 709 ifp->if_flags |= IFF_OACTIVE; 710 711 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 712 return; 713 714 /* 715 * Remember the previous number of free descriptors and 716 * the first descriptor we'll use. 717 */ 718 ofree = sc->sc_txfree; 719 firsttx = sc->sc_txnext; 720 721 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 722 sc->sc_dev.dv_xname, ofree, firsttx)); 723 724 /* 725 * Loop through the send queue, setting up transmit descriptors 726 * until we drain the queue, or use up all available transmit 727 * descriptors. 728 */ 729 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 730 sc->sc_txfree != 0) { 731 /* 732 * Grab a packet off the queue. 733 */ 734 IFQ_POLL(&ifp->if_snd, m0); 735 if (m0 == NULL) 736 break; 737 738 dmamap = txs->txs_dmamap; 739 740 /* 741 * Load the DMA map. If this fails, the packet either 742 * didn't fit in the alloted number of segments, or we were 743 * short on resources. In this case, we'll copy and try 744 * again. 745 * 746 * Note that if we're only allowed 1 Tx segment, we 747 * have an alignment restriction. Do this test before 748 * attempting to load the DMA map, because it's more 749 * likely we'll trip the alignment test than the 750 * more-than-one-segment test. 751 */ 752 if ((sc->sc_ntxsegs == 1 && (mtod(m0, bus_addr_t) & 3) != 0) || 753 bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 754 BUS_DMA_NOWAIT) != 0) { 755 MGETHDR(m, M_DONTWAIT, MT_DATA); 756 if (m == NULL) { 757 printf("%s: unable to allocate Tx mbuf\n", 758 sc->sc_dev.dv_xname); 759 break; 760 } 761 if (m0->m_pkthdr.len > MHLEN) { 762 MCLGET(m, M_DONTWAIT); 763 if ((m->m_flags & M_EXT) == 0) { 764 printf("%s: unable to allocate Tx " 765 "cluster\n", sc->sc_dev.dv_xname); 766 m_freem(m); 767 break; 768 } 769 } 770 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 771 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 772 m_freem(m0); 773 m0 = m; 774 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 775 m0, BUS_DMA_NOWAIT); 776 if (error) { 777 printf("%s: unable to load Tx buffer, " 778 "error = %d\n", sc->sc_dev.dv_xname, error); 779 break; 780 } 781 } 782 783 /* 784 * Ensure we have enough descriptors free to describe 785 * the packet. 786 */ 787 if (dmamap->dm_nsegs > sc->sc_txfree) { 788 /* 789 * Not enough free descriptors to transmit this 790 * packet. We haven't committed to anything yet, 791 * so just unload the DMA map, put the packet 792 * back on the queue, and punt. Notify the upper 793 * layer that there are no more slots left. 794 * 795 * XXX We could allocate an mbuf and copy, but 796 * XXX it is worth it? 797 */ 798 ifp->if_flags |= IFF_OACTIVE; 799 bus_dmamap_unload(sc->sc_dmat, dmamap); 800 break; 801 } 802 803 IFQ_DEQUEUE(&ifp->if_snd, m0); 804 805 /* 806 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 807 */ 808 809 /* Sync the DMA map. */ 810 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 811 BUS_DMASYNC_PREWRITE); 812 813 /* 814 * Initialize the transmit descriptors. 815 */ 816 for (nexttx = sc->sc_txnext, seg = 0; 817 seg < dmamap->dm_nsegs; 818 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 819 /* 820 * If this is the first descriptor we're 821 * enqueueing, don't set the OWN bit just 822 * yet. That could cause a race condition. 823 * We'll do it below. 824 */ 825 sc->sc_txdescs[nexttx].td_status = 826 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN); 827 sc->sc_txdescs[nexttx].td_bufaddr1 = 828 htole32(dmamap->dm_segs[seg].ds_addr); 829 sc->sc_txdescs[nexttx].td_ctl = 830 htole32((dmamap->dm_segs[seg].ds_len << 831 TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch | 832 (nexttx == (TULIP_NTXDESC - 1) ? 833 sc->sc_tdctl_er : 0)); 834 lasttx = nexttx; 835 } 836 837 /* Set `first segment' and `last segment' appropriately. */ 838 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS); 839 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS); 840 841 #ifdef TLP_DEBUG 842 if (ifp->if_flags & IFF_DEBUG) { 843 printf(" txsoft %p transmit chain:\n", txs); 844 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 845 printf(" descriptor %d:\n", seg); 846 printf(" td_status: 0x%08x\n", 847 le32toh(sc->sc_txdescs[seg].td_status)); 848 printf(" td_ctl: 0x%08x\n", 849 le32toh(sc->sc_txdescs[seg].td_ctl)); 850 printf(" td_bufaddr1: 0x%08x\n", 851 le32toh(sc->sc_txdescs[seg].td_bufaddr1)); 852 printf(" td_bufaddr2: 0x%08x\n", 853 le32toh(sc->sc_txdescs[seg].td_bufaddr2)); 854 if (seg == lasttx) 855 break; 856 } 857 } 858 #endif 859 860 /* Sync the descriptors we're using. */ 861 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 862 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 863 864 /* 865 * Store a pointer to the packet so we can free it later, 866 * and remember what txdirty will be once the packet is 867 * done. 868 */ 869 txs->txs_mbuf = m0; 870 txs->txs_firstdesc = sc->sc_txnext; 871 txs->txs_lastdesc = lasttx; 872 txs->txs_ndescs = dmamap->dm_nsegs; 873 874 /* Advance the tx pointer. */ 875 sc->sc_txfree -= dmamap->dm_nsegs; 876 sc->sc_txnext = nexttx; 877 878 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 879 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 880 881 last_txs = txs; 882 883 #if NBPFILTER > 0 884 /* 885 * Pass the packet to any BPF listeners. 886 */ 887 if (ifp->if_bpf) 888 bpf_mtap(ifp->if_bpf, m0); 889 #endif /* NBPFILTER > 0 */ 890 } 891 892 if (txs == NULL || sc->sc_txfree == 0) { 893 /* No more slots left; notify upper layer. */ 894 ifp->if_flags |= IFF_OACTIVE; 895 } 896 897 if (sc->sc_txfree != ofree) { 898 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 899 sc->sc_dev.dv_xname, lasttx, firsttx)); 900 /* 901 * Cause a transmit interrupt to happen on the 902 * last packet we enqueued. 903 */ 904 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC); 905 TULIP_CDTXSYNC(sc, lasttx, 1, 906 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 907 908 /* 909 * Some clone chips want IC on the *first* segment in 910 * the packet. Appease them. 911 */ 912 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 913 last_txs->txs_firstdesc != lasttx) { 914 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 915 htole32(TDCTL_Tx_IC); 916 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 917 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 918 } 919 920 /* 921 * The entire packet chain is set up. Give the 922 * first descriptor to the chip now. 923 */ 924 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN); 925 TULIP_CDTXSYNC(sc, firsttx, 1, 926 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 927 928 /* Wake up the transmitter. */ 929 /* XXX USE AUTOPOLLING? */ 930 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 931 932 /* Set a watchdog timer in case the chip flakes out. */ 933 ifp->if_timer = 5; 934 } 935 } 936 937 /* 938 * tlp_watchdog: [ifnet interface function] 939 * 940 * Watchdog timer handler. 941 */ 942 void 943 tlp_watchdog(ifp) 944 struct ifnet *ifp; 945 { 946 struct tulip_softc *sc = ifp->if_softc; 947 int doing_setup, doing_transmit; 948 949 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 950 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 951 952 if (doing_setup && doing_transmit) { 953 printf("%s: filter setup and transmit timeout\n", 954 sc->sc_dev.dv_xname); 955 ifp->if_oerrors++; 956 } else if (doing_transmit) { 957 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 958 ifp->if_oerrors++; 959 } else if (doing_setup) 960 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 961 else 962 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 963 964 (void) tlp_init(ifp); 965 966 /* Try to get more packets going. */ 967 tlp_start(ifp); 968 } 969 970 /* 971 * tlp_ioctl: [ifnet interface function] 972 * 973 * Handle control requests from the operator. 974 */ 975 int 976 tlp_ioctl(ifp, cmd, data) 977 struct ifnet *ifp; 978 u_long cmd; 979 caddr_t data; 980 { 981 struct tulip_softc *sc = ifp->if_softc; 982 struct ifreq *ifr = (struct ifreq *)data; 983 int s, error; 984 985 s = splnet(); 986 987 switch (cmd) { 988 case SIOCSIFMEDIA: 989 case SIOCGIFMEDIA: 990 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 991 break; 992 993 default: 994 error = ether_ioctl(ifp, cmd, data); 995 if (error == ENETRESET) { 996 if (TULIP_IS_ENABLED(sc)) { 997 /* 998 * Multicast list has changed. Set the 999 * hardware filter accordingly. 1000 */ 1001 (*sc->sc_filter_setup)(sc); 1002 } 1003 error = 0; 1004 } 1005 break; 1006 } 1007 1008 /* Try to get more packets going. */ 1009 if (TULIP_IS_ENABLED(sc)) 1010 tlp_start(ifp); 1011 1012 splx(s); 1013 return (error); 1014 } 1015 1016 /* 1017 * tlp_intr: 1018 * 1019 * Interrupt service routine. 1020 */ 1021 int 1022 tlp_intr(arg) 1023 void *arg; 1024 { 1025 struct tulip_softc *sc = arg; 1026 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1027 u_int32_t status, rxstatus, txstatus; 1028 int handled = 0, txthresh; 1029 1030 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 1031 1032 #ifdef DEBUG 1033 if (TULIP_IS_ENABLED(sc) == 0) 1034 panic("%s: tlp_intr: not enabled\n", sc->sc_dev.dv_xname); 1035 #endif 1036 1037 /* 1038 * If the interface isn't running, the interrupt couldn't 1039 * possibly have come from us. 1040 */ 1041 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1042 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1043 return (0); 1044 1045 /* Disable interrupts on the DM9102 (interrupt edge bug). */ 1046 switch (sc->sc_chip) { 1047 case TULIP_CHIP_DM9102: 1048 case TULIP_CHIP_DM9102A: 1049 TULIP_WRITE(sc, CSR_INTEN, 0); 1050 break; 1051 1052 default: 1053 /* Nothing. */ 1054 } 1055 1056 for (;;) { 1057 status = TULIP_READ(sc, CSR_STATUS); 1058 if (status) 1059 TULIP_WRITE(sc, CSR_STATUS, status); 1060 1061 if ((status & sc->sc_inten) == 0) 1062 break; 1063 1064 handled = 1; 1065 1066 rxstatus = status & sc->sc_rxint_mask; 1067 txstatus = status & sc->sc_txint_mask; 1068 1069 if (rxstatus) { 1070 /* Grab new any new packets. */ 1071 tlp_rxintr(sc); 1072 1073 if (rxstatus & STATUS_RWT) 1074 printf("%s: receive watchdog timeout\n", 1075 sc->sc_dev.dv_xname); 1076 1077 if (rxstatus & STATUS_RU) { 1078 printf("%s: receive ring overrun\n", 1079 sc->sc_dev.dv_xname); 1080 /* Get the receive process going again. */ 1081 if (sc->sc_tdctl_er != TDCTL_ER) { 1082 tlp_idle(sc, OPMODE_SR); 1083 TULIP_WRITE(sc, CSR_RXLIST, 1084 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1085 TULIP_WRITE(sc, CSR_OPMODE, 1086 sc->sc_opmode); 1087 } 1088 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1089 break; 1090 } 1091 } 1092 1093 if (txstatus) { 1094 /* Sweep up transmit descriptors. */ 1095 tlp_txintr(sc); 1096 1097 if (txstatus & STATUS_TJT) 1098 printf("%s: transmit jabber timeout\n", 1099 sc->sc_dev.dv_xname); 1100 1101 if (txstatus & STATUS_UNF) { 1102 /* 1103 * Increase our transmit threshold if 1104 * another is available. 1105 */ 1106 txthresh = sc->sc_txthresh + 1; 1107 if (sc->sc_txth[txthresh].txth_name != NULL) { 1108 /* Idle the transmit process. */ 1109 tlp_idle(sc, OPMODE_ST); 1110 1111 sc->sc_txthresh = txthresh; 1112 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 1113 sc->sc_opmode |= 1114 sc->sc_txth[txthresh].txth_opmode; 1115 printf("%s: transmit underrun; new " 1116 "threshold: %s\n", 1117 sc->sc_dev.dv_xname, 1118 sc->sc_txth[txthresh].txth_name); 1119 1120 /* 1121 * Set the new threshold and restart 1122 * the transmit process. 1123 */ 1124 TULIP_WRITE(sc, CSR_OPMODE, 1125 sc->sc_opmode); 1126 } 1127 /* 1128 * XXX Log every Nth underrun from 1129 * XXX now on? 1130 */ 1131 } 1132 } 1133 1134 if (status & (STATUS_TPS|STATUS_RPS)) { 1135 if (status & STATUS_TPS) 1136 printf("%s: transmit process stopped\n", 1137 sc->sc_dev.dv_xname); 1138 if (status & STATUS_RPS) 1139 printf("%s: receive process stopped\n", 1140 sc->sc_dev.dv_xname); 1141 (void) tlp_init(ifp); 1142 break; 1143 } 1144 1145 if (status & STATUS_SE) { 1146 const char *str; 1147 switch (status & STATUS_EB) { 1148 case STATUS_EB_PARITY: 1149 str = "parity error"; 1150 break; 1151 1152 case STATUS_EB_MABT: 1153 str = "master abort"; 1154 break; 1155 1156 case STATUS_EB_TABT: 1157 str = "target abort"; 1158 break; 1159 1160 default: 1161 str = "unknown error"; 1162 break; 1163 } 1164 printf("%s: fatal system error: %s\n", 1165 sc->sc_dev.dv_xname, str); 1166 (void) tlp_init(ifp); 1167 break; 1168 } 1169 1170 /* 1171 * Not handled: 1172 * 1173 * Transmit buffer unavailable -- normal 1174 * condition, nothing to do, really. 1175 * 1176 * General purpose timer experied -- we don't 1177 * use the general purpose timer. 1178 * 1179 * Early receive interrupt -- not available on 1180 * all chips, we just use RI. We also only 1181 * use single-segment receive DMA, so this 1182 * is mostly useless. 1183 */ 1184 } 1185 1186 /* Bring interrupts back up on the DM9102. */ 1187 switch (sc->sc_chip) { 1188 case TULIP_CHIP_DM9102: 1189 case TULIP_CHIP_DM9102A: 1190 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1191 break; 1192 1193 default: 1194 /* Nothing. */ 1195 } 1196 1197 /* Try to get more packets going. */ 1198 tlp_start(ifp); 1199 1200 #if NRND > 0 1201 if (handled) 1202 rnd_add_uint32(&sc->sc_rnd_source, status); 1203 #endif 1204 return (handled); 1205 } 1206 1207 /* 1208 * tlp_rxintr: 1209 * 1210 * Helper; handle receive interrupts. 1211 */ 1212 void 1213 tlp_rxintr(sc) 1214 struct tulip_softc *sc; 1215 { 1216 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1217 struct ether_header *eh; 1218 struct tulip_rxsoft *rxs; 1219 struct mbuf *m; 1220 u_int32_t rxstat; 1221 int i, len; 1222 1223 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 1224 rxs = &sc->sc_rxsoft[i]; 1225 1226 TULIP_CDRXSYNC(sc, i, 1227 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1228 1229 rxstat = le32toh(sc->sc_rxdescs[i].td_status); 1230 1231 if (rxstat & TDSTAT_OWN) { 1232 /* 1233 * We have processed all of the receive buffers. 1234 */ 1235 break; 1236 } 1237 1238 /* 1239 * Make sure the packet fit in one buffer. This should 1240 * always be the case. But the Lite-On PNIC, rev 33 1241 * has an awful receive engine bug, which may require 1242 * a very icky work-around. 1243 */ 1244 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1245 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1246 printf("%s: incoming packet spilled, resetting\n", 1247 sc->sc_dev.dv_xname); 1248 (void) tlp_init(ifp); 1249 return; 1250 } 1251 1252 /* 1253 * If any collisions were seen on the wire, count one. 1254 */ 1255 if (rxstat & TDSTAT_Rx_CS) 1256 ifp->if_collisions++; 1257 1258 /* 1259 * If an error occured, update stats, clear the status 1260 * word, and leave the packet buffer in place. It will 1261 * simply be reused the next time the ring comes around. 1262 * If 802.1Q VLAN MTU is enabled, ignore the Frame Too Long 1263 * error. 1264 */ 1265 if (rxstat & TDSTAT_ES && 1266 ((sc->sc_ethercom.ec_capenable & ETHERCAP_VLAN_MTU) == 0 || 1267 (rxstat & (TDSTAT_Rx_DE | TDSTAT_Rx_RF | TDSTAT_Rx_RE | 1268 TDSTAT_Rx_DB | TDSTAT_Rx_CE)) != 0)) { 1269 #define PRINTERR(bit, str) \ 1270 if (rxstat & (bit)) \ 1271 printf("%s: receive error: %s\n", \ 1272 sc->sc_dev.dv_xname, str) 1273 ifp->if_ierrors++; 1274 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1275 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1276 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1277 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1278 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1279 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1280 #undef PRINTERR 1281 TULIP_INIT_RXDESC(sc, i); 1282 continue; 1283 } 1284 1285 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1286 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1287 1288 /* 1289 * No errors; receive the packet. Note the Tulip 1290 * includes the CRC with every packet. 1291 */ 1292 len = TDSTAT_Rx_LENGTH(rxstat); 1293 1294 #ifdef __NO_STRICT_ALIGNMENT 1295 /* 1296 * Allocate a new mbuf cluster. If that fails, we are 1297 * out of memory, and must drop the packet and recycle 1298 * the buffer that's already attached to this descriptor. 1299 */ 1300 m = rxs->rxs_mbuf; 1301 if (tlp_add_rxbuf(sc, i) != 0) { 1302 ifp->if_ierrors++; 1303 TULIP_INIT_RXDESC(sc, i); 1304 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1305 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1306 continue; 1307 } 1308 #else 1309 /* 1310 * The Tulip's receive buffers must be 4-byte aligned. 1311 * But this means that the data after the Ethernet header 1312 * is misaligned. We must allocate a new buffer and 1313 * copy the data, shifted forward 2 bytes. 1314 */ 1315 MGETHDR(m, M_DONTWAIT, MT_DATA); 1316 if (m == NULL) { 1317 dropit: 1318 ifp->if_ierrors++; 1319 TULIP_INIT_RXDESC(sc, i); 1320 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1321 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1322 continue; 1323 } 1324 if (len > (MHLEN - 2)) { 1325 MCLGET(m, M_DONTWAIT); 1326 if ((m->m_flags & M_EXT) == 0) { 1327 m_freem(m); 1328 goto dropit; 1329 } 1330 } 1331 m->m_data += 2; 1332 1333 /* 1334 * Note that we use clusters for incoming frames, so the 1335 * buffer is virtually contiguous. 1336 */ 1337 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1338 1339 /* Allow the receive descriptor to continue using its mbuf. */ 1340 TULIP_INIT_RXDESC(sc, i); 1341 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1342 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1343 #endif /* __NO_STRICT_ALIGNMENT */ 1344 1345 ifp->if_ipackets++; 1346 eh = mtod(m, struct ether_header *); 1347 m->m_flags |= M_HASFCS; 1348 m->m_pkthdr.rcvif = ifp; 1349 m->m_pkthdr.len = m->m_len = len; 1350 1351 #if NBPFILTER > 0 1352 /* 1353 * Pass this up to any BPF listeners, but only 1354 * pass it up the stack if its for us. 1355 */ 1356 if (ifp->if_bpf) 1357 bpf_mtap(ifp->if_bpf, m); 1358 #endif /* NPBFILTER > 0 */ 1359 1360 /* 1361 * We sometimes have to run the 21140 in Hash-Only 1362 * mode. If we're in that mode, and not in promiscuous 1363 * mode, and we have a unicast packet that isn't for 1364 * us, then drop it. 1365 */ 1366 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY && 1367 (ifp->if_flags & IFF_PROMISC) == 0 && 1368 ETHER_IS_MULTICAST(eh->ether_dhost) == 0 && 1369 memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1370 ETHER_ADDR_LEN) != 0) { 1371 m_freem(m); 1372 continue; 1373 } 1374 1375 /* Pass it on. */ 1376 (*ifp->if_input)(ifp, m); 1377 } 1378 1379 /* Update the recieve pointer. */ 1380 sc->sc_rxptr = i; 1381 } 1382 1383 /* 1384 * tlp_txintr: 1385 * 1386 * Helper; handle transmit interrupts. 1387 */ 1388 void 1389 tlp_txintr(sc) 1390 struct tulip_softc *sc; 1391 { 1392 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1393 struct tulip_txsoft *txs; 1394 u_int32_t txstat; 1395 1396 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1397 sc->sc_dev.dv_xname, sc->sc_flags)); 1398 1399 ifp->if_flags &= ~IFF_OACTIVE; 1400 1401 /* 1402 * Go through our Tx list and free mbufs for those 1403 * frames that have been transmitted. 1404 */ 1405 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1406 TULIP_CDTXSYNC(sc, txs->txs_lastdesc, 1407 txs->txs_ndescs, 1408 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1409 1410 #ifdef TLP_DEBUG 1411 if (ifp->if_flags & IFF_DEBUG) { 1412 int i; 1413 printf(" txsoft %p transmit chain:\n", txs); 1414 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1415 printf(" descriptor %d:\n", i); 1416 printf(" td_status: 0x%08x\n", 1417 le32toh(sc->sc_txdescs[i].td_status)); 1418 printf(" td_ctl: 0x%08x\n", 1419 le32toh(sc->sc_txdescs[i].td_ctl)); 1420 printf(" td_bufaddr1: 0x%08x\n", 1421 le32toh(sc->sc_txdescs[i].td_bufaddr1)); 1422 printf(" td_bufaddr2: 0x%08x\n", 1423 le32toh(sc->sc_txdescs[i].td_bufaddr2)); 1424 if (i == txs->txs_lastdesc) 1425 break; 1426 } 1427 } 1428 #endif 1429 1430 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status); 1431 if (txstat & TDSTAT_OWN) 1432 break; 1433 1434 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1435 1436 sc->sc_txfree += txs->txs_ndescs; 1437 1438 if (txs->txs_mbuf == NULL) { 1439 /* 1440 * If we didn't have an mbuf, it was the setup 1441 * packet. 1442 */ 1443 #ifdef DIAGNOSTIC 1444 if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1445 panic("tlp_txintr: null mbuf, not doing setup"); 1446 #endif 1447 TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE); 1448 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1449 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1450 continue; 1451 } 1452 1453 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1454 0, txs->txs_dmamap->dm_mapsize, 1455 BUS_DMASYNC_POSTWRITE); 1456 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1457 m_freem(txs->txs_mbuf); 1458 txs->txs_mbuf = NULL; 1459 1460 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1461 1462 /* 1463 * Check for errors and collisions. 1464 */ 1465 #ifdef TLP_STATS 1466 if (txstat & TDSTAT_Tx_UF) 1467 sc->sc_stats.ts_tx_uf++; 1468 if (txstat & TDSTAT_Tx_TO) 1469 sc->sc_stats.ts_tx_to++; 1470 if (txstat & TDSTAT_Tx_EC) 1471 sc->sc_stats.ts_tx_ec++; 1472 if (txstat & TDSTAT_Tx_LC) 1473 sc->sc_stats.ts_tx_lc++; 1474 #endif 1475 1476 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO)) 1477 ifp->if_oerrors++; 1478 1479 if (txstat & TDSTAT_Tx_EC) 1480 ifp->if_collisions += 16; 1481 else 1482 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1483 if (txstat & TDSTAT_Tx_LC) 1484 ifp->if_collisions++; 1485 1486 ifp->if_opackets++; 1487 } 1488 1489 /* 1490 * If there are no more pending transmissions, cancel the watchdog 1491 * timer. 1492 */ 1493 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1494 ifp->if_timer = 0; 1495 1496 /* 1497 * If we have a receive filter setup pending, do it now. 1498 */ 1499 if (sc->sc_flags & TULIPF_WANT_SETUP) 1500 (*sc->sc_filter_setup)(sc); 1501 } 1502 1503 #ifdef TLP_STATS 1504 void 1505 tlp_print_stats(sc) 1506 struct tulip_softc *sc; 1507 { 1508 1509 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n", 1510 sc->sc_dev.dv_xname, 1511 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to, 1512 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc); 1513 } 1514 #endif 1515 1516 /* 1517 * tlp_reset: 1518 * 1519 * Perform a soft reset on the Tulip. 1520 */ 1521 void 1522 tlp_reset(sc) 1523 struct tulip_softc *sc; 1524 { 1525 int i; 1526 1527 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1528 1529 /* 1530 * Xircom clone doesn't bring itself out of reset automatically. 1531 * Instead, we have to wait at least 50 PCI cycles, and then 1532 * clear SWR. 1533 */ 1534 if (sc->sc_chip == TULIP_CHIP_X3201_3) { 1535 delay(10); 1536 TULIP_WRITE(sc, CSR_BUSMODE, 0); 1537 } 1538 1539 for (i = 0; i < 1000; i++) { 1540 /* 1541 * Wait at least 50 PCI cycles for the reset to 1542 * complete before peeking at the Tulip again. 1543 * 10 uSec is a bit longer than 50 PCI cycles 1544 * (at 33MHz), but it doesn't hurt have the extra 1545 * wait. 1546 */ 1547 delay(10); 1548 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1549 break; 1550 } 1551 1552 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1553 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1554 1555 delay(1000); 1556 1557 /* 1558 * If the board has any GPIO reset sequences to issue, do them now. 1559 */ 1560 if (sc->sc_reset != NULL) 1561 (*sc->sc_reset)(sc); 1562 } 1563 1564 /* 1565 * tlp_init: [ ifnet interface function ] 1566 * 1567 * Initialize the interface. Must be called at splnet(). 1568 */ 1569 int 1570 tlp_init(ifp) 1571 struct ifnet *ifp; 1572 { 1573 struct tulip_softc *sc = ifp->if_softc; 1574 struct tulip_txsoft *txs; 1575 struct tulip_rxsoft *rxs; 1576 int i, error = 0; 1577 1578 if ((error = tlp_enable(sc)) != 0) 1579 goto out; 1580 1581 /* 1582 * Cancel any pending I/O. 1583 */ 1584 tlp_stop(ifp, 0); 1585 1586 /* 1587 * Initialize `opmode' to 0, and call the pre-init routine, if 1588 * any. This is required because the 2114x and some of the 1589 * clones require that the media-related bits in `opmode' be 1590 * set before performing a soft-reset in order to get internal 1591 * chip pathways are correct. Yay! 1592 */ 1593 sc->sc_opmode = 0; 1594 if (sc->sc_preinit != NULL) 1595 (*sc->sc_preinit)(sc); 1596 1597 /* 1598 * Reset the Tulip to a known state. 1599 */ 1600 tlp_reset(sc); 1601 1602 /* 1603 * Initialize the BUSMODE register. 1604 */ 1605 sc->sc_busmode = BUSMODE_BAR; 1606 switch (sc->sc_chip) { 1607 case TULIP_CHIP_21140: 1608 case TULIP_CHIP_21140A: 1609 case TULIP_CHIP_21142: 1610 case TULIP_CHIP_21143: 1611 case TULIP_CHIP_82C115: 1612 case TULIP_CHIP_MX98725: 1613 /* 1614 * If we're allowed to do so, use Memory Read Line 1615 * and Memory Read Multiple. 1616 * 1617 * XXX Should we use Memory Write and Invalidate? 1618 */ 1619 if (sc->sc_flags & TULIPF_MRL) 1620 sc->sc_busmode |= BUSMODE_RLE; 1621 if (sc->sc_flags & TULIPF_MRM) 1622 sc->sc_busmode |= BUSMODE_RME; 1623 #if 0 1624 if (sc->sc_flags & TULIPF_MWI) 1625 sc->sc_busmode |= BUSMODE_WLE; 1626 #endif 1627 break; 1628 1629 case TULIP_CHIP_82C168: 1630 case TULIP_CHIP_82C169: 1631 sc->sc_busmode |= BUSMODE_PNIC_MBO; 1632 if (sc->sc_maxburst == 0) 1633 sc->sc_maxburst = 16; 1634 break; 1635 1636 default: 1637 /* Nothing. */ 1638 } 1639 switch (sc->sc_cacheline) { 1640 default: 1641 /* 1642 * Note: We must *always* set these bits; a cache 1643 * alignment of 0 is RESERVED. 1644 */ 1645 case 8: 1646 sc->sc_busmode |= BUSMODE_CAL_8LW; 1647 break; 1648 case 16: 1649 sc->sc_busmode |= BUSMODE_CAL_16LW; 1650 break; 1651 case 32: 1652 sc->sc_busmode |= BUSMODE_CAL_32LW; 1653 break; 1654 } 1655 switch (sc->sc_maxburst) { 1656 case 1: 1657 sc->sc_busmode |= BUSMODE_PBL_1LW; 1658 break; 1659 case 2: 1660 sc->sc_busmode |= BUSMODE_PBL_2LW; 1661 break; 1662 case 4: 1663 sc->sc_busmode |= BUSMODE_PBL_4LW; 1664 break; 1665 case 8: 1666 sc->sc_busmode |= BUSMODE_PBL_8LW; 1667 break; 1668 case 16: 1669 sc->sc_busmode |= BUSMODE_PBL_16LW; 1670 break; 1671 case 32: 1672 sc->sc_busmode |= BUSMODE_PBL_32LW; 1673 break; 1674 default: 1675 sc->sc_busmode |= BUSMODE_PBL_DEFAULT; 1676 break; 1677 } 1678 #if BYTE_ORDER == BIG_ENDIAN 1679 /* 1680 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips 1681 * support them, and even on ones that do, it doesn't 1682 * always work. So we always access descriptors with 1683 * little endian via htole32/le32toh. 1684 */ 1685 #endif 1686 /* 1687 * Big-endian bus requires BUSMODE_BLE anyway. 1688 * Also, BUSMODE_DBO is needed because we assume 1689 * descriptors are little endian. 1690 */ 1691 if (sc->sc_flags & TULIPF_BLE) 1692 sc->sc_busmode |= BUSMODE_BLE; 1693 if (sc->sc_flags & TULIPF_DBO) 1694 sc->sc_busmode |= BUSMODE_DBO; 1695 1696 /* 1697 * Some chips have a broken bus interface. 1698 */ 1699 switch (sc->sc_chip) { 1700 case TULIP_CHIP_DM9102: 1701 case TULIP_CHIP_DM9102A: 1702 sc->sc_busmode = 0; 1703 break; 1704 1705 default: 1706 /* Nothing. */ 1707 } 1708 1709 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1710 1711 /* 1712 * Initialize the OPMODE register. We don't write it until 1713 * we're ready to begin the transmit and receive processes. 1714 * 1715 * Media-related OPMODE bits are set in the media callbacks 1716 * for each specific chip/board. 1717 */ 1718 sc->sc_opmode |= OPMODE_SR | OPMODE_ST | 1719 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1720 1721 /* 1722 * Magical mystery initialization on the Macronix chips. 1723 * The MX98713 uses its own magic value, the rest share 1724 * a common one. 1725 */ 1726 switch (sc->sc_chip) { 1727 case TULIP_CHIP_MX98713: 1728 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1729 break; 1730 1731 case TULIP_CHIP_MX98713A: 1732 case TULIP_CHIP_MX98715: 1733 case TULIP_CHIP_MX98715A: 1734 case TULIP_CHIP_MX98715AEC_X: 1735 case TULIP_CHIP_MX98725: 1736 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1737 break; 1738 1739 default: 1740 /* Nothing. */ 1741 } 1742 1743 /* 1744 * Initialize the transmit descriptor ring. 1745 */ 1746 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1747 for (i = 0; i < TULIP_NTXDESC; i++) { 1748 sc->sc_txdescs[i].td_ctl = htole32(sc->sc_tdctl_ch); 1749 sc->sc_txdescs[i].td_bufaddr2 = 1750 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i))); 1751 } 1752 sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er); 1753 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1754 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1755 sc->sc_txfree = TULIP_NTXDESC; 1756 sc->sc_txnext = 0; 1757 1758 /* 1759 * Initialize the transmit job descriptors. 1760 */ 1761 SIMPLEQ_INIT(&sc->sc_txfreeq); 1762 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1763 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1764 txs = &sc->sc_txsoft[i]; 1765 txs->txs_mbuf = NULL; 1766 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1767 } 1768 1769 /* 1770 * Initialize the receive descriptor and receive job 1771 * descriptor rings. 1772 */ 1773 for (i = 0; i < TULIP_NRXDESC; i++) { 1774 rxs = &sc->sc_rxsoft[i]; 1775 if (rxs->rxs_mbuf == NULL) { 1776 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1777 printf("%s: unable to allocate or map rx " 1778 "buffer %d, error = %d\n", 1779 sc->sc_dev.dv_xname, i, error); 1780 /* 1781 * XXX Should attempt to run with fewer receive 1782 * XXX buffers instead of just failing. 1783 */ 1784 tlp_rxdrain(sc); 1785 goto out; 1786 } 1787 } 1788 } 1789 sc->sc_rxptr = 0; 1790 1791 /* 1792 * Initialize the interrupt mask and enable interrupts. 1793 */ 1794 /* normal interrupts */ 1795 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1796 1797 /* abnormal interrupts */ 1798 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1799 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1800 1801 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1802 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1803 1804 switch (sc->sc_chip) { 1805 case TULIP_CHIP_WB89C840F: 1806 /* 1807 * Clear bits that we don't want that happen to 1808 * overlap or don't exist. 1809 */ 1810 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1811 break; 1812 1813 default: 1814 /* Nothing. */ 1815 } 1816 1817 sc->sc_rxint_mask &= sc->sc_inten; 1818 sc->sc_txint_mask &= sc->sc_inten; 1819 1820 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1821 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1822 1823 /* 1824 * Give the transmit and receive rings to the Tulip. 1825 */ 1826 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1827 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1828 1829 /* 1830 * On chips that do this differently, set the station address. 1831 */ 1832 switch (sc->sc_chip) { 1833 case TULIP_CHIP_WB89C840F: 1834 { 1835 /* XXX Do this with stream writes? */ 1836 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1837 1838 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1839 bus_space_write_1(sc->sc_st, sc->sc_sh, 1840 cpa + i, LLADDR(ifp->if_sadl)[i]); 1841 } 1842 break; 1843 } 1844 1845 case TULIP_CHIP_AL981: 1846 case TULIP_CHIP_AN983: 1847 case TULIP_CHIP_AN985: 1848 { 1849 u_int32_t reg; 1850 u_int8_t *enaddr = LLADDR(ifp->if_sadl); 1851 1852 reg = enaddr[0] | 1853 (enaddr[1] << 8) | 1854 (enaddr[2] << 16) | 1855 (enaddr[3] << 24); 1856 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg); 1857 1858 reg = enaddr[4] | 1859 (enaddr[5] << 8); 1860 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg); 1861 } 1862 1863 default: 1864 /* Nothing. */ 1865 } 1866 1867 /* 1868 * Set the receive filter. This will start the transmit and 1869 * receive processes. 1870 */ 1871 (*sc->sc_filter_setup)(sc); 1872 1873 /* 1874 * Set the current media. 1875 */ 1876 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1877 1878 /* 1879 * Start the receive process. 1880 */ 1881 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1882 1883 if (sc->sc_tick != NULL) { 1884 /* Start the one second clock. */ 1885 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 1886 } 1887 1888 /* 1889 * Note that the interface is now running. 1890 */ 1891 ifp->if_flags |= IFF_RUNNING; 1892 ifp->if_flags &= ~IFF_OACTIVE; 1893 1894 out: 1895 if (error) { 1896 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1897 ifp->if_timer = 0; 1898 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1899 } 1900 return (error); 1901 } 1902 1903 /* 1904 * tlp_enable: 1905 * 1906 * Enable the Tulip chip. 1907 */ 1908 int 1909 tlp_enable(sc) 1910 struct tulip_softc *sc; 1911 { 1912 1913 if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) { 1914 if ((*sc->sc_enable)(sc) != 0) { 1915 printf("%s: device enable failed\n", 1916 sc->sc_dev.dv_xname); 1917 return (EIO); 1918 } 1919 sc->sc_flags |= TULIPF_ENABLED; 1920 } 1921 return (0); 1922 } 1923 1924 /* 1925 * tlp_disable: 1926 * 1927 * Disable the Tulip chip. 1928 */ 1929 void 1930 tlp_disable(sc) 1931 struct tulip_softc *sc; 1932 { 1933 1934 if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) { 1935 (*sc->sc_disable)(sc); 1936 sc->sc_flags &= ~TULIPF_ENABLED; 1937 } 1938 } 1939 1940 /* 1941 * tlp_power: 1942 * 1943 * Power management (suspend/resume) hook. 1944 */ 1945 void 1946 tlp_power(why, arg) 1947 int why; 1948 void *arg; 1949 { 1950 struct tulip_softc *sc = arg; 1951 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1952 int s; 1953 1954 s = splnet(); 1955 switch (why) { 1956 case PWR_SUSPEND: 1957 case PWR_STANDBY: 1958 tlp_stop(ifp, 0); 1959 if (sc->sc_power != NULL) 1960 (*sc->sc_power)(sc, why); 1961 break; 1962 case PWR_RESUME: 1963 if (ifp->if_flags & IFF_UP) { 1964 if (sc->sc_power != NULL) 1965 (*sc->sc_power)(sc, why); 1966 tlp_init(ifp); 1967 } 1968 break; 1969 case PWR_SOFTSUSPEND: 1970 case PWR_SOFTSTANDBY: 1971 case PWR_SOFTRESUME: 1972 break; 1973 } 1974 splx(s); 1975 } 1976 1977 /* 1978 * tlp_rxdrain: 1979 * 1980 * Drain the receive queue. 1981 */ 1982 void 1983 tlp_rxdrain(sc) 1984 struct tulip_softc *sc; 1985 { 1986 struct tulip_rxsoft *rxs; 1987 int i; 1988 1989 for (i = 0; i < TULIP_NRXDESC; i++) { 1990 rxs = &sc->sc_rxsoft[i]; 1991 if (rxs->rxs_mbuf != NULL) { 1992 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1993 m_freem(rxs->rxs_mbuf); 1994 rxs->rxs_mbuf = NULL; 1995 } 1996 } 1997 } 1998 1999 /* 2000 * tlp_stop: [ ifnet interface function ] 2001 * 2002 * Stop transmission on the interface. 2003 */ 2004 void 2005 tlp_stop(ifp, disable) 2006 struct ifnet *ifp; 2007 int disable; 2008 { 2009 struct tulip_softc *sc = ifp->if_softc; 2010 struct tulip_txsoft *txs; 2011 2012 if (sc->sc_tick != NULL) { 2013 /* Stop the one second clock. */ 2014 callout_stop(&sc->sc_tick_callout); 2015 } 2016 2017 if (sc->sc_flags & TULIPF_HAS_MII) { 2018 /* Down the MII. */ 2019 mii_down(&sc->sc_mii); 2020 } 2021 2022 /* Disable interrupts. */ 2023 TULIP_WRITE(sc, CSR_INTEN, 0); 2024 2025 /* Stop the transmit and receive processes. */ 2026 sc->sc_opmode = 0; 2027 TULIP_WRITE(sc, CSR_OPMODE, 0); 2028 TULIP_WRITE(sc, CSR_RXLIST, 0); 2029 TULIP_WRITE(sc, CSR_TXLIST, 0); 2030 2031 /* 2032 * Release any queued transmit buffers. 2033 */ 2034 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 2035 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 2036 if (txs->txs_mbuf != NULL) { 2037 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 2038 m_freem(txs->txs_mbuf); 2039 txs->txs_mbuf = NULL; 2040 } 2041 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 2042 } 2043 2044 if (disable) { 2045 tlp_rxdrain(sc); 2046 tlp_disable(sc); 2047 } 2048 2049 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 2050 2051 /* 2052 * Mark the interface down and cancel the watchdog timer. 2053 */ 2054 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2055 ifp->if_timer = 0; 2056 } 2057 2058 #define SROM_EMIT(sc, x) \ 2059 do { \ 2060 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2061 delay(2); \ 2062 } while (0) 2063 2064 /* 2065 * tlp_srom_idle: 2066 * 2067 * Put the SROM in idle state. 2068 */ 2069 void 2070 tlp_srom_idle(sc) 2071 struct tulip_softc *sc; 2072 { 2073 u_int32_t miirom; 2074 int i; 2075 2076 miirom = MIIROM_SR; 2077 SROM_EMIT(sc, miirom); 2078 2079 miirom |= MIIROM_RD; 2080 SROM_EMIT(sc, miirom); 2081 2082 miirom |= MIIROM_SROMCS; 2083 SROM_EMIT(sc, miirom); 2084 2085 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2086 2087 /* Strobe the clock 32 times. */ 2088 for (i = 0; i < 32; i++) { 2089 SROM_EMIT(sc, miirom); 2090 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2091 } 2092 2093 SROM_EMIT(sc, miirom); 2094 2095 miirom &= ~MIIROM_SROMCS; 2096 SROM_EMIT(sc, miirom); 2097 2098 SROM_EMIT(sc, 0); 2099 } 2100 2101 /* 2102 * tlp_srom_size: 2103 * 2104 * Determine the number of address bits in the SROM. 2105 */ 2106 int 2107 tlp_srom_size(sc) 2108 struct tulip_softc *sc; 2109 { 2110 u_int32_t miirom; 2111 int x; 2112 2113 /* Select the SROM. */ 2114 miirom = MIIROM_SR; 2115 SROM_EMIT(sc, miirom); 2116 2117 miirom |= MIIROM_RD; 2118 SROM_EMIT(sc, miirom); 2119 2120 /* Send CHIP SELECT for one clock tick. */ 2121 miirom |= MIIROM_SROMCS; 2122 SROM_EMIT(sc, miirom); 2123 2124 /* Shift in the READ opcode. */ 2125 for (x = 3; x > 0; x--) { 2126 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2127 miirom |= MIIROM_SROMDI; 2128 else 2129 miirom &= ~MIIROM_SROMDI; 2130 SROM_EMIT(sc, miirom); 2131 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2132 SROM_EMIT(sc, miirom); 2133 } 2134 2135 /* Shift in address and look for dummy 0 bit. */ 2136 for (x = 1; x <= 12; x++) { 2137 miirom &= ~MIIROM_SROMDI; 2138 SROM_EMIT(sc, miirom); 2139 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2140 if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2141 break; 2142 SROM_EMIT(sc, miirom); 2143 } 2144 2145 /* Clear CHIP SELECT. */ 2146 miirom &= ~MIIROM_SROMCS; 2147 SROM_EMIT(sc, miirom); 2148 2149 /* Deselect the SROM. */ 2150 SROM_EMIT(sc, 0); 2151 2152 if (x < 4 || x > 12) { 2153 printf("%s: broken MicroWire interface detected; " 2154 "setting SROM size to 1Kb\n", sc->sc_dev.dv_xname); 2155 return (6); 2156 } else { 2157 if (tlp_srom_debug) 2158 printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n", 2159 sc->sc_dev.dv_xname, x, (1 << (x + 4)) >> 3); 2160 return (x); 2161 } 2162 } 2163 2164 /* 2165 * tlp_read_srom: 2166 * 2167 * Read the Tulip SROM. 2168 */ 2169 int 2170 tlp_read_srom(sc) 2171 struct tulip_softc *sc; 2172 { 2173 int size; 2174 u_int32_t miirom; 2175 u_int16_t datain; 2176 int i, x; 2177 2178 tlp_srom_idle(sc); 2179 2180 sc->sc_srom_addrbits = tlp_srom_size(sc); 2181 if (sc->sc_srom_addrbits == 0) 2182 return (0); 2183 size = TULIP_ROM_SIZE(sc->sc_srom_addrbits); 2184 sc->sc_srom = malloc(size, M_DEVBUF, M_NOWAIT); 2185 2186 /* Select the SROM. */ 2187 miirom = MIIROM_SR; 2188 SROM_EMIT(sc, miirom); 2189 2190 miirom |= MIIROM_RD; 2191 SROM_EMIT(sc, miirom); 2192 2193 for (i = 0; i < size; i += 2) { 2194 /* Send CHIP SELECT for one clock tick. */ 2195 miirom |= MIIROM_SROMCS; 2196 SROM_EMIT(sc, miirom); 2197 2198 /* Shift in the READ opcode. */ 2199 for (x = 3; x > 0; x--) { 2200 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2201 miirom |= MIIROM_SROMDI; 2202 else 2203 miirom &= ~MIIROM_SROMDI; 2204 SROM_EMIT(sc, miirom); 2205 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2206 SROM_EMIT(sc, miirom); 2207 } 2208 2209 /* Shift in address. */ 2210 for (x = sc->sc_srom_addrbits; x > 0; x--) { 2211 if (i & (1 << x)) 2212 miirom |= MIIROM_SROMDI; 2213 else 2214 miirom &= ~MIIROM_SROMDI; 2215 SROM_EMIT(sc, miirom); 2216 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2217 SROM_EMIT(sc, miirom); 2218 } 2219 2220 /* Shift out data. */ 2221 miirom &= ~MIIROM_SROMDI; 2222 datain = 0; 2223 for (x = 16; x > 0; x--) { 2224 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2225 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2226 datain |= (1 << (x - 1)); 2227 SROM_EMIT(sc, miirom); 2228 } 2229 sc->sc_srom[i] = datain & 0xff; 2230 sc->sc_srom[i + 1] = datain >> 8; 2231 2232 /* Clear CHIP SELECT. */ 2233 miirom &= ~MIIROM_SROMCS; 2234 SROM_EMIT(sc, miirom); 2235 } 2236 2237 /* Deselect the SROM. */ 2238 SROM_EMIT(sc, 0); 2239 2240 /* ...and idle it. */ 2241 tlp_srom_idle(sc); 2242 2243 if (tlp_srom_debug) { 2244 printf("SROM CONTENTS:"); 2245 for (i = 0; i < size; i++) { 2246 if ((i % 8) == 0) 2247 printf("\n\t"); 2248 printf("0x%02x ", sc->sc_srom[i]); 2249 } 2250 printf("\n"); 2251 } 2252 2253 return (1); 2254 } 2255 2256 #undef SROM_EMIT 2257 2258 /* 2259 * tlp_add_rxbuf: 2260 * 2261 * Add a receive buffer to the indicated descriptor. 2262 */ 2263 int 2264 tlp_add_rxbuf(sc, idx) 2265 struct tulip_softc *sc; 2266 int idx; 2267 { 2268 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 2269 struct mbuf *m; 2270 int error; 2271 2272 MGETHDR(m, M_DONTWAIT, MT_DATA); 2273 if (m == NULL) 2274 return (ENOBUFS); 2275 2276 MCLGET(m, M_DONTWAIT); 2277 if ((m->m_flags & M_EXT) == 0) { 2278 m_freem(m); 2279 return (ENOBUFS); 2280 } 2281 2282 if (rxs->rxs_mbuf != NULL) 2283 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 2284 2285 rxs->rxs_mbuf = m; 2286 2287 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 2288 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 2289 if (error) { 2290 printf("%s: can't load rx DMA map %d, error = %d\n", 2291 sc->sc_dev.dv_xname, idx, error); 2292 panic("tlp_add_rxbuf"); /* XXX */ 2293 } 2294 2295 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 2296 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 2297 2298 TULIP_INIT_RXDESC(sc, idx); 2299 2300 return (0); 2301 } 2302 2303 /* 2304 * tlp_srom_crcok: 2305 * 2306 * Check the CRC of the Tulip SROM. 2307 */ 2308 int 2309 tlp_srom_crcok(romdata) 2310 const u_int8_t *romdata; 2311 { 2312 u_int32_t crc; 2313 2314 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM); 2315 crc = (crc & 0xffff) ^ 0xffff; 2316 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 2317 return (1); 2318 2319 /* 2320 * Try an alternate checksum. 2321 */ 2322 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1); 2323 crc = (crc & 0xffff) ^ 0xffff; 2324 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1)) 2325 return (1); 2326 2327 return (0); 2328 } 2329 2330 /* 2331 * tlp_isv_srom: 2332 * 2333 * Check to see if the SROM is in the new standardized format. 2334 */ 2335 int 2336 tlp_isv_srom(romdata) 2337 const u_int8_t *romdata; 2338 { 2339 int i; 2340 u_int16_t cksum; 2341 2342 if (tlp_srom_crcok(romdata)) { 2343 /* 2344 * SROM CRC checks out; must be in the new format. 2345 */ 2346 return (1); 2347 } 2348 2349 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); 2350 if (cksum == 0xffff || cksum == 0) { 2351 /* 2352 * No checksum present. Check the SROM ID; 18 bytes of 0 2353 * followed by 1 (version) followed by the number of 2354 * adapters which use this SROM (should be non-zero). 2355 */ 2356 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { 2357 if (romdata[i] != 0) 2358 return (0); 2359 } 2360 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) 2361 return (0); 2362 if (romdata[TULIP_ROM_CHIP_COUNT] == 0) 2363 return (0); 2364 return (1); 2365 } 2366 2367 return (0); 2368 } 2369 2370 /* 2371 * tlp_isv_srom_enaddr: 2372 * 2373 * Get the Ethernet address from an ISV SROM. 2374 */ 2375 int 2376 tlp_isv_srom_enaddr(sc, enaddr) 2377 struct tulip_softc *sc; 2378 u_int8_t *enaddr; 2379 { 2380 int i, devcnt; 2381 2382 if (tlp_isv_srom(sc->sc_srom) == 0) 2383 return (0); 2384 2385 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 2386 for (i = 0; i < devcnt; i++) { 2387 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 2388 break; 2389 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 2390 sc->sc_devno) 2391 break; 2392 } 2393 2394 if (i == devcnt) 2395 return (0); 2396 2397 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], 2398 ETHER_ADDR_LEN); 2399 enaddr[5] += i; 2400 2401 return (1); 2402 } 2403 2404 /* 2405 * tlp_parse_old_srom: 2406 * 2407 * Parse old-format SROMs. 2408 * 2409 * This routine is largely lifted from Matt Thomas's `de' driver. 2410 */ 2411 int 2412 tlp_parse_old_srom(sc, enaddr) 2413 struct tulip_softc *sc; 2414 u_int8_t *enaddr; 2415 { 2416 static const u_int8_t testpat[] = 2417 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 2418 int i; 2419 u_int32_t cksum; 2420 2421 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 2422 /* 2423 * Some vendors (e.g. ZNYX) don't use the standard 2424 * DEC Address ROM format, but rather just have an 2425 * Ethernet address in the first 6 bytes, maybe a 2426 * 2 byte checksum, and then all 0xff's. 2427 * 2428 * On the other hand, Cobalt Networks interfaces 2429 * simply have the address in the first six bytes 2430 * with the rest zeroed out. 2431 */ 2432 for (i = 8; i < 32; i++) { 2433 if (sc->sc_srom[i] != 0xff && 2434 sc->sc_srom[i] != 0) 2435 return (0); 2436 } 2437 2438 /* 2439 * Sanity check the Ethernet address: 2440 * 2441 * - Make sure it's not multicast or locally 2442 * assigned 2443 * - Make sure it has a non-0 OUI 2444 */ 2445 if (sc->sc_srom[0] & 3) 2446 return (0); 2447 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 2448 sc->sc_srom[2] == 0) 2449 return (0); 2450 2451 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2452 return (1); 2453 } 2454 2455 /* 2456 * Standard DEC Address ROM test. 2457 */ 2458 2459 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 2460 return (0); 2461 2462 for (i = 0; i < 8; i++) { 2463 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 2464 return (0); 2465 } 2466 2467 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2468 2469 cksum = *(u_int16_t *) &enaddr[0]; 2470 2471 cksum <<= 1; 2472 if (cksum > 0xffff) 2473 cksum -= 0xffff; 2474 2475 cksum += *(u_int16_t *) &enaddr[2]; 2476 if (cksum > 0xffff) 2477 cksum -= 0xffff; 2478 2479 cksum <<= 1; 2480 if (cksum > 0xffff) 2481 cksum -= 0xffff; 2482 2483 cksum += *(u_int16_t *) &enaddr[4]; 2484 if (cksum >= 0xffff) 2485 cksum -= 0xffff; 2486 2487 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 2488 return (0); 2489 2490 return (1); 2491 } 2492 2493 /* 2494 * tlp_filter_setup: 2495 * 2496 * Set the Tulip's receive filter. 2497 */ 2498 void 2499 tlp_filter_setup(sc) 2500 struct tulip_softc *sc; 2501 { 2502 struct ethercom *ec = &sc->sc_ethercom; 2503 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2504 struct ether_multi *enm; 2505 struct ether_multistep step; 2506 __volatile u_int32_t *sp; 2507 struct tulip_txsoft *txs; 2508 u_int8_t enaddr[ETHER_ADDR_LEN]; 2509 u_int32_t hash, hashsize; 2510 int cnt; 2511 2512 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 2513 sc->sc_dev.dv_xname, sc->sc_flags)); 2514 2515 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 2516 2517 /* 2518 * If there are transmissions pending, wait until they have 2519 * completed. 2520 */ 2521 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 2522 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 2523 sc->sc_flags |= TULIPF_WANT_SETUP; 2524 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 2525 sc->sc_dev.dv_xname)); 2526 return; 2527 } 2528 sc->sc_flags &= ~TULIPF_WANT_SETUP; 2529 2530 switch (sc->sc_chip) { 2531 case TULIP_CHIP_82C115: 2532 hashsize = TULIP_PNICII_HASHSIZE; 2533 break; 2534 2535 default: 2536 hashsize = TULIP_MCHASHSIZE; 2537 } 2538 2539 /* 2540 * If we're running, idle the transmit and receive engines. If 2541 * we're NOT running, we're being called from tlp_init(), and our 2542 * writing OPMODE will start the transmit and receive processes 2543 * in motion. 2544 */ 2545 if (ifp->if_flags & IFF_RUNNING) 2546 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2547 2548 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2549 2550 if (ifp->if_flags & IFF_PROMISC) { 2551 sc->sc_opmode |= OPMODE_PR; 2552 goto allmulti; 2553 } 2554 2555 /* 2556 * Try Perfect filtering first. 2557 */ 2558 2559 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2560 sp = TULIP_CDSP(sc); 2561 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2562 cnt = 0; 2563 ETHER_FIRST_MULTI(step, ec, enm); 2564 while (enm != NULL) { 2565 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2566 /* 2567 * We must listen to a range of multicast addresses. 2568 * For now, just accept all multicasts, rather than 2569 * trying to set only those filter bits needed to match 2570 * the range. (At this time, the only use of address 2571 * ranges is for IP multicast routing, for which the 2572 * range is big enough to require all bits set.) 2573 */ 2574 goto allmulti; 2575 } 2576 if (cnt == (TULIP_MAXADDRS - 2)) { 2577 /* 2578 * We already have our multicast limit (still need 2579 * our station address and broadcast). Go to 2580 * Hash-Perfect mode. 2581 */ 2582 goto hashperfect; 2583 } 2584 cnt++; 2585 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0); 2586 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1); 2587 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2); 2588 ETHER_NEXT_MULTI(step, enm); 2589 } 2590 2591 if (ifp->if_flags & IFF_BROADCAST) { 2592 /* ...and the broadcast address. */ 2593 cnt++; 2594 *sp++ = TULIP_SP_FIELD_C(0xffff); 2595 *sp++ = TULIP_SP_FIELD_C(0xffff); 2596 *sp++ = TULIP_SP_FIELD_C(0xffff); 2597 } 2598 2599 /* Pad the rest with our station address. */ 2600 for (; cnt < TULIP_MAXADDRS; cnt++) { 2601 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2602 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2603 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2604 } 2605 ifp->if_flags &= ~IFF_ALLMULTI; 2606 goto setit; 2607 2608 hashperfect: 2609 /* 2610 * Try Hash-Perfect mode. 2611 */ 2612 2613 /* 2614 * Some 21140 chips have broken Hash-Perfect modes. On these 2615 * chips, we simply use Hash-Only mode, and put our station 2616 * address into the filter. 2617 */ 2618 if (sc->sc_chip == TULIP_CHIP_21140) 2619 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2620 else 2621 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2622 sp = TULIP_CDSP(sc); 2623 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2624 ETHER_FIRST_MULTI(step, ec, enm); 2625 while (enm != NULL) { 2626 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2627 /* 2628 * We must listen to a range of multicast addresses. 2629 * For now, just accept all multicasts, rather than 2630 * trying to set only those filter bits needed to match 2631 * the range. (At this time, the only use of address 2632 * ranges is for IP multicast routing, for which the 2633 * range is big enough to require all bits set.) 2634 */ 2635 goto allmulti; 2636 } 2637 hash = tlp_mchash(enm->enm_addrlo, hashsize); 2638 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2639 ETHER_NEXT_MULTI(step, enm); 2640 } 2641 2642 if (ifp->if_flags & IFF_BROADCAST) { 2643 /* ...and the broadcast address. */ 2644 hash = tlp_mchash(etherbroadcastaddr, hashsize); 2645 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2646 } 2647 2648 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2649 /* ...and our station address. */ 2650 hash = tlp_mchash(enaddr, hashsize); 2651 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2652 } else { 2653 /* 2654 * Hash-Perfect mode; put our station address after 2655 * the hash table. 2656 */ 2657 sp[39] = TULIP_SP_FIELD(enaddr, 0); 2658 sp[40] = TULIP_SP_FIELD(enaddr, 1); 2659 sp[41] = TULIP_SP_FIELD(enaddr, 2); 2660 } 2661 ifp->if_flags &= ~IFF_ALLMULTI; 2662 goto setit; 2663 2664 allmulti: 2665 /* 2666 * Use Perfect filter mode. First address is the broadcast address, 2667 * and pad the rest with our station address. We'll set Pass-all- 2668 * multicast in OPMODE below. 2669 */ 2670 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2671 sp = TULIP_CDSP(sc); 2672 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2673 cnt = 0; 2674 if (ifp->if_flags & IFF_BROADCAST) { 2675 cnt++; 2676 *sp++ = TULIP_SP_FIELD_C(0xffff); 2677 *sp++ = TULIP_SP_FIELD_C(0xffff); 2678 *sp++ = TULIP_SP_FIELD_C(0xffff); 2679 } 2680 for (; cnt < TULIP_MAXADDRS; cnt++) { 2681 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2682 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2683 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2684 } 2685 ifp->if_flags |= IFF_ALLMULTI; 2686 2687 setit: 2688 if (ifp->if_flags & IFF_ALLMULTI) 2689 sc->sc_opmode |= OPMODE_PM; 2690 2691 /* Sync the setup packet buffer. */ 2692 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2693 2694 /* 2695 * Fill in the setup packet descriptor. 2696 */ 2697 txs = SIMPLEQ_FIRST(&sc->sc_txfreeq); 2698 2699 txs->txs_firstdesc = sc->sc_txnext; 2700 txs->txs_lastdesc = sc->sc_txnext; 2701 txs->txs_ndescs = 1; 2702 txs->txs_mbuf = NULL; 2703 2704 sc->sc_txdescs[sc->sc_txnext].td_bufaddr1 = 2705 htole32(TULIP_CDSPADDR(sc)); 2706 sc->sc_txdescs[sc->sc_txnext].td_ctl = 2707 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2708 sc->sc_filtmode | TDCTL_Tx_SET | sc->sc_setup_fsls | 2709 TDCTL_Tx_IC | sc->sc_tdctl_ch | 2710 (sc->sc_txnext == (TULIP_NTXDESC - 1) ? sc->sc_tdctl_er : 0)); 2711 sc->sc_txdescs[sc->sc_txnext].td_status = htole32(TDSTAT_OWN); 2712 TULIP_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndescs, 2713 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2714 2715 /* Advance the tx pointer. */ 2716 sc->sc_txfree -= 1; 2717 sc->sc_txnext = TULIP_NEXTTX(sc->sc_txnext); 2718 2719 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 2720 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 2721 2722 /* 2723 * Set the OPMODE register. This will also resume the 2724 * transmit transmit process we idled above. 2725 */ 2726 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2727 2728 sc->sc_flags |= TULIPF_DOING_SETUP; 2729 2730 /* 2731 * Kick the transmitter; this will cause the Tulip to 2732 * read the setup descriptor. 2733 */ 2734 /* XXX USE AUTOPOLLING? */ 2735 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2736 2737 /* Set up a watchdog timer in case the chip flakes out. */ 2738 ifp->if_timer = 5; 2739 2740 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2741 } 2742 2743 /* 2744 * tlp_winb_filter_setup: 2745 * 2746 * Set the Winbond 89C840F's receive filter. 2747 */ 2748 void 2749 tlp_winb_filter_setup(sc) 2750 struct tulip_softc *sc; 2751 { 2752 struct ethercom *ec = &sc->sc_ethercom; 2753 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2754 struct ether_multi *enm; 2755 struct ether_multistep step; 2756 u_int32_t hash, mchash[2]; 2757 2758 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2759 sc->sc_dev.dv_xname, sc->sc_flags)); 2760 2761 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2762 2763 if (ifp->if_flags & IFF_MULTICAST) 2764 sc->sc_opmode |= OPMODE_WINB_AMP; 2765 2766 if (ifp->if_flags & IFF_BROADCAST) 2767 sc->sc_opmode |= OPMODE_WINB_ABP; 2768 2769 if (ifp->if_flags & IFF_PROMISC) { 2770 sc->sc_opmode |= OPMODE_WINB_APP; 2771 goto allmulti; 2772 } 2773 2774 mchash[0] = mchash[1] = 0; 2775 2776 ETHER_FIRST_MULTI(step, ec, enm); 2777 while (enm != NULL) { 2778 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2779 /* 2780 * We must listen to a range of multicast addresses. 2781 * For now, just accept all multicasts, rather than 2782 * trying to set only those filter bits needed to match 2783 * the range. (At this time, the only use of address 2784 * ranges is for IP multicast routing, for which the 2785 * range is big enough to require all bits set.) 2786 */ 2787 goto allmulti; 2788 } 2789 2790 /* 2791 * According to the FreeBSD `wb' driver, yes, you 2792 * really do invert the hash. 2793 */ 2794 hash = 2795 (~(ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2796 & 0x3f; 2797 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2798 ETHER_NEXT_MULTI(step, enm); 2799 } 2800 ifp->if_flags &= ~IFF_ALLMULTI; 2801 goto setit; 2802 2803 allmulti: 2804 ifp->if_flags |= IFF_ALLMULTI; 2805 mchash[0] = mchash[1] = 0xffffffff; 2806 2807 setit: 2808 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2809 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2810 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2811 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2812 sc->sc_dev.dv_xname)); 2813 } 2814 2815 /* 2816 * tlp_al981_filter_setup: 2817 * 2818 * Set the ADMtek AL981's receive filter. 2819 */ 2820 void 2821 tlp_al981_filter_setup(sc) 2822 struct tulip_softc *sc; 2823 { 2824 struct ethercom *ec = &sc->sc_ethercom; 2825 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2826 struct ether_multi *enm; 2827 struct ether_multistep step; 2828 u_int32_t hash, mchash[2]; 2829 2830 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n", 2831 sc->sc_dev.dv_xname, sc->sc_flags)); 2832 2833 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2834 2835 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2836 2837 if (ifp->if_flags & IFF_PROMISC) { 2838 sc->sc_opmode |= OPMODE_PR; 2839 goto allmulti; 2840 } 2841 2842 mchash[0] = mchash[1] = 0; 2843 2844 ETHER_FIRST_MULTI(step, ec, enm); 2845 while (enm != NULL) { 2846 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2847 /* 2848 * We must listen to a range of multicast addresses. 2849 * For now, just accept all multicasts, rather than 2850 * trying to set only those filter bits needed to match 2851 * the range. (At this time, the only use of address 2852 * ranges is for IP multicast routing, for which the 2853 * range is big enough to require all bits set.) 2854 */ 2855 goto allmulti; 2856 } 2857 2858 hash = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26; 2859 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2860 ETHER_NEXT_MULTI(step, enm); 2861 } 2862 ifp->if_flags &= ~IFF_ALLMULTI; 2863 goto setit; 2864 2865 allmulti: 2866 ifp->if_flags |= IFF_ALLMULTI; 2867 mchash[0] = mchash[1] = 0xffffffff; 2868 2869 setit: 2870 TULIP_WRITE(sc, CSR_ADM_MAR0, mchash[0]); 2871 TULIP_WRITE(sc, CSR_ADM_MAR1, mchash[1]); 2872 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2873 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n", 2874 sc->sc_dev.dv_xname)); 2875 } 2876 2877 /* 2878 * tlp_idle: 2879 * 2880 * Cause the transmit and/or receive processes to go idle. 2881 */ 2882 void 2883 tlp_idle(sc, bits) 2884 struct tulip_softc *sc; 2885 u_int32_t bits; 2886 { 2887 static const char *tlp_tx_state_names[] = { 2888 "STOPPED", 2889 "RUNNING - FETCH", 2890 "RUNNING - WAIT", 2891 "RUNNING - READING", 2892 "-- RESERVED --", 2893 "RUNNING - SETUP", 2894 "SUSPENDED", 2895 "RUNNING - CLOSE", 2896 }; 2897 static const char *tlp_rx_state_names[] = { 2898 "STOPPED", 2899 "RUNNING - FETCH", 2900 "RUNNING - CHECK", 2901 "RUNNING - WAIT", 2902 "SUSPENDED", 2903 "RUNNING - CLOSE", 2904 "RUNNING - FLUSH", 2905 "RUNNING - QUEUE", 2906 }; 2907 static const char *dm9102_tx_state_names[] = { 2908 "STOPPED", 2909 "RUNNING - FETCH", 2910 "RUNNING - SETUP", 2911 "RUNNING - READING", 2912 "RUNNING - CLOSE - CLEAR OWNER", 2913 "RUNNING - WAIT", 2914 "RUNNING - CLOSE - WRITE STATUS", 2915 "SUSPENDED", 2916 }; 2917 static const char *dm9102_rx_state_names[] = { 2918 "STOPPED", 2919 "RUNNING - FETCH", 2920 "RUNNING - WAIT", 2921 "RUNNING - QUEUE", 2922 "RUNNING - CLOSE - CLEAR OWNER", 2923 "RUNNING - CLOSE - WRITE STATUS", 2924 "SUSPENDED", 2925 "RUNNING - FLUSH", 2926 }; 2927 2928 const char **tx_state_names, **rx_state_names; 2929 u_int32_t csr, ackmask = 0; 2930 int i; 2931 2932 switch (sc->sc_chip) { 2933 case TULIP_CHIP_DM9102: 2934 case TULIP_CHIP_DM9102A: 2935 tx_state_names = dm9102_tx_state_names; 2936 rx_state_names = dm9102_rx_state_names; 2937 break; 2938 2939 default: 2940 tx_state_names = tlp_tx_state_names; 2941 rx_state_names = tlp_rx_state_names; 2942 break; 2943 } 2944 2945 if (bits & OPMODE_ST) 2946 ackmask |= STATUS_TPS; 2947 2948 if (bits & OPMODE_SR) 2949 ackmask |= STATUS_RPS; 2950 2951 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2952 2953 for (i = 0; i < 1000; i++) { 2954 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2955 break; 2956 delay(10); 2957 } 2958 2959 csr = TULIP_READ(sc, CSR_STATUS); 2960 if ((csr & ackmask) != ackmask) { 2961 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2962 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2963 printf("%s: transmit process failed to idle: " 2964 "state %s\n", sc->sc_dev.dv_xname, 2965 tx_state_names[(csr & STATUS_TS) >> 20]); 2966 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2967 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2968 printf("%s: receive process failed to idle: " 2969 "state %s\n", sc->sc_dev.dv_xname, 2970 rx_state_names[(csr & STATUS_RS) >> 17]); 2971 } 2972 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2973 } 2974 2975 /***************************************************************************** 2976 * Generic media support functions. 2977 *****************************************************************************/ 2978 2979 /* 2980 * tlp_mediastatus: [ifmedia interface function] 2981 * 2982 * Query the current media. 2983 */ 2984 void 2985 tlp_mediastatus(ifp, ifmr) 2986 struct ifnet *ifp; 2987 struct ifmediareq *ifmr; 2988 { 2989 struct tulip_softc *sc = ifp->if_softc; 2990 2991 if (TULIP_IS_ENABLED(sc) == 0) { 2992 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 2993 ifmr->ifm_status = 0; 2994 return; 2995 } 2996 2997 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2998 } 2999 3000 /* 3001 * tlp_mediachange: [ifmedia interface function] 3002 * 3003 * Update the current media. 3004 */ 3005 int 3006 tlp_mediachange(ifp) 3007 struct ifnet *ifp; 3008 { 3009 struct tulip_softc *sc = ifp->if_softc; 3010 3011 if ((ifp->if_flags & IFF_UP) == 0) 3012 return (0); 3013 return ((*sc->sc_mediasw->tmsw_set)(sc)); 3014 } 3015 3016 /***************************************************************************** 3017 * Support functions for MII-attached media. 3018 *****************************************************************************/ 3019 3020 /* 3021 * tlp_mii_tick: 3022 * 3023 * One second timer, used to tick the MII. 3024 */ 3025 void 3026 tlp_mii_tick(arg) 3027 void *arg; 3028 { 3029 struct tulip_softc *sc = arg; 3030 int s; 3031 3032 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 3033 return; 3034 3035 s = splnet(); 3036 mii_tick(&sc->sc_mii); 3037 splx(s); 3038 3039 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 3040 } 3041 3042 /* 3043 * tlp_mii_statchg: [mii interface function] 3044 * 3045 * Callback from PHY when media changes. 3046 */ 3047 void 3048 tlp_mii_statchg(self) 3049 struct device *self; 3050 { 3051 struct tulip_softc *sc = (struct tulip_softc *)self; 3052 3053 /* Idle the transmit and receive processes. */ 3054 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3055 3056 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD); 3057 3058 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 3059 sc->sc_opmode |= OPMODE_TTM; 3060 else 3061 sc->sc_opmode |= OPMODE_HBD; 3062 3063 if (sc->sc_mii.mii_media_active & IFM_FDX) 3064 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 3065 3066 /* 3067 * Write new OPMODE bits. This also restarts the transmit 3068 * and receive processes. 3069 */ 3070 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3071 } 3072 3073 /* 3074 * tlp_winb_mii_statchg: [mii interface function] 3075 * 3076 * Callback from PHY when media changes. This version is 3077 * for the Winbond 89C840F, which has different OPMODE bits. 3078 */ 3079 void 3080 tlp_winb_mii_statchg(self) 3081 struct device *self; 3082 { 3083 struct tulip_softc *sc = (struct tulip_softc *)self; 3084 3085 /* Idle the transmit and receive processes. */ 3086 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3087 3088 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 3089 3090 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 3091 sc->sc_opmode |= OPMODE_WINB_FES; 3092 3093 if (sc->sc_mii.mii_media_active & IFM_FDX) 3094 sc->sc_opmode |= OPMODE_FD; 3095 3096 /* 3097 * Write new OPMODE bits. This also restarts the transmit 3098 * and receive processes. 3099 */ 3100 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3101 } 3102 3103 /* 3104 * tlp_dm9102_mii_statchg: [mii interface function] 3105 * 3106 * Callback from PHY when media changes. This version is 3107 * for the DM9102. 3108 */ 3109 void 3110 tlp_dm9102_mii_statchg(self) 3111 struct device *self; 3112 { 3113 struct tulip_softc *sc = (struct tulip_softc *)self; 3114 3115 /* 3116 * Don't idle the transmit and receive processes, here. It 3117 * seems to fail, and just causes excess noise. 3118 */ 3119 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 3120 3121 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) != IFM_100_TX) 3122 sc->sc_opmode |= OPMODE_TTM; 3123 3124 if (sc->sc_mii.mii_media_active & IFM_FDX) 3125 sc->sc_opmode |= OPMODE_FD; 3126 3127 /* 3128 * Write new OPMODE bits. 3129 */ 3130 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3131 } 3132 3133 /* 3134 * tlp_mii_getmedia: 3135 * 3136 * Callback from ifmedia to request current media status. 3137 */ 3138 void 3139 tlp_mii_getmedia(sc, ifmr) 3140 struct tulip_softc *sc; 3141 struct ifmediareq *ifmr; 3142 { 3143 3144 mii_pollstat(&sc->sc_mii); 3145 ifmr->ifm_status = sc->sc_mii.mii_media_status; 3146 ifmr->ifm_active = sc->sc_mii.mii_media_active; 3147 } 3148 3149 /* 3150 * tlp_mii_setmedia: 3151 * 3152 * Callback from ifmedia to request new media setting. 3153 */ 3154 int 3155 tlp_mii_setmedia(sc) 3156 struct tulip_softc *sc; 3157 { 3158 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3159 3160 if (ifp->if_flags & IFF_UP) { 3161 switch (sc->sc_chip) { 3162 case TULIP_CHIP_21142: 3163 case TULIP_CHIP_21143: 3164 /* Disable the internal Nway engine. */ 3165 TULIP_WRITE(sc, CSR_SIATXRX, 0); 3166 break; 3167 3168 default: 3169 /* Nothing. */ 3170 } 3171 mii_mediachg(&sc->sc_mii); 3172 } 3173 return (0); 3174 } 3175 3176 /* 3177 * tlp_bitbang_mii_readreg: 3178 * 3179 * Read a PHY register via bit-bang'ing the MII. 3180 */ 3181 int 3182 tlp_bitbang_mii_readreg(self, phy, reg) 3183 struct device *self; 3184 int phy, reg; 3185 { 3186 struct tulip_softc *sc = (void *) self; 3187 3188 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg)); 3189 } 3190 3191 /* 3192 * tlp_bitbang_mii_writereg: 3193 * 3194 * Write a PHY register via bit-bang'ing the MII. 3195 */ 3196 void 3197 tlp_bitbang_mii_writereg(self, phy, reg, val) 3198 struct device *self; 3199 int phy, reg, val; 3200 { 3201 struct tulip_softc *sc = (void *) self; 3202 3203 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val); 3204 } 3205 3206 /* 3207 * tlp_sio_mii_bitbang_read: 3208 * 3209 * Read the MII serial port for the MII bit-bang module. 3210 */ 3211 u_int32_t 3212 tlp_sio_mii_bitbang_read(self) 3213 struct device *self; 3214 { 3215 struct tulip_softc *sc = (void *) self; 3216 3217 return (TULIP_READ(sc, CSR_MIIROM)); 3218 } 3219 3220 /* 3221 * tlp_sio_mii_bitbang_write: 3222 * 3223 * Write the MII serial port for the MII bit-bang module. 3224 */ 3225 void 3226 tlp_sio_mii_bitbang_write(self, val) 3227 struct device *self; 3228 u_int32_t val; 3229 { 3230 struct tulip_softc *sc = (void *) self; 3231 3232 TULIP_WRITE(sc, CSR_MIIROM, val); 3233 } 3234 3235 /* 3236 * tlp_pnic_mii_readreg: 3237 * 3238 * Read a PHY register on the Lite-On PNIC. 3239 */ 3240 int 3241 tlp_pnic_mii_readreg(self, phy, reg) 3242 struct device *self; 3243 int phy, reg; 3244 { 3245 struct tulip_softc *sc = (void *) self; 3246 u_int32_t val; 3247 int i; 3248 3249 TULIP_WRITE(sc, CSR_PNIC_MII, 3250 PNIC_MII_MBO | PNIC_MII_RESERVED | 3251 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 3252 (reg << PNIC_MII_REGSHIFT)); 3253 3254 for (i = 0; i < 1000; i++) { 3255 delay(10); 3256 val = TULIP_READ(sc, CSR_PNIC_MII); 3257 if ((val & PNIC_MII_BUSY) == 0) { 3258 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 3259 return (0); 3260 else 3261 return (val & PNIC_MII_DATA); 3262 } 3263 } 3264 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 3265 return (0); 3266 } 3267 3268 /* 3269 * tlp_pnic_mii_writereg: 3270 * 3271 * Write a PHY register on the Lite-On PNIC. 3272 */ 3273 void 3274 tlp_pnic_mii_writereg(self, phy, reg, val) 3275 struct device *self; 3276 int phy, reg, val; 3277 { 3278 struct tulip_softc *sc = (void *) self; 3279 int i; 3280 3281 TULIP_WRITE(sc, CSR_PNIC_MII, 3282 PNIC_MII_MBO | PNIC_MII_RESERVED | 3283 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 3284 (reg << PNIC_MII_REGSHIFT) | val); 3285 3286 for (i = 0; i < 1000; i++) { 3287 delay(10); 3288 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 3289 return; 3290 } 3291 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 3292 } 3293 3294 const bus_addr_t tlp_al981_phy_regmap[] = { 3295 CSR_ADM_BMCR, 3296 CSR_ADM_BMSR, 3297 CSR_ADM_PHYIDR1, 3298 CSR_ADM_PHYIDR2, 3299 CSR_ADM_ANAR, 3300 CSR_ADM_ANLPAR, 3301 CSR_ADM_ANER, 3302 3303 CSR_ADM_XMC, 3304 CSR_ADM_XCIIS, 3305 CSR_ADM_XIE, 3306 CSR_ADM_100CTR, 3307 }; 3308 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) / 3309 sizeof(tlp_al981_phy_regmap[0]); 3310 3311 /* 3312 * tlp_al981_mii_readreg: 3313 * 3314 * Read a PHY register on the ADMtek AL981. 3315 */ 3316 int 3317 tlp_al981_mii_readreg(self, phy, reg) 3318 struct device *self; 3319 int phy, reg; 3320 { 3321 struct tulip_softc *sc = (struct tulip_softc *)self; 3322 3323 /* AL981 only has an internal PHY. */ 3324 if (phy != 0) 3325 return (0); 3326 3327 if (reg >= tlp_al981_phy_regmap_size) 3328 return (0); 3329 3330 return (bus_space_read_4(sc->sc_st, sc->sc_sh, 3331 tlp_al981_phy_regmap[reg]) & 0xffff); 3332 } 3333 3334 /* 3335 * tlp_al981_mii_writereg: 3336 * 3337 * Write a PHY register on the ADMtek AL981. 3338 */ 3339 void 3340 tlp_al981_mii_writereg(self, phy, reg, val) 3341 struct device *self; 3342 int phy, reg, val; 3343 { 3344 struct tulip_softc *sc = (struct tulip_softc *)self; 3345 3346 /* AL981 only has an internal PHY. */ 3347 if (phy != 0) 3348 return; 3349 3350 if (reg >= tlp_al981_phy_regmap_size) 3351 return; 3352 3353 bus_space_write_4(sc->sc_st, sc->sc_sh, 3354 tlp_al981_phy_regmap[reg], val); 3355 } 3356 3357 /***************************************************************************** 3358 * Chip-specific pre-init and reset functions. 3359 *****************************************************************************/ 3360 3361 /* 3362 * tlp_2114x_preinit: 3363 * 3364 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3365 */ 3366 void 3367 tlp_2114x_preinit(sc) 3368 struct tulip_softc *sc; 3369 { 3370 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3371 struct tulip_21x4x_media *tm = ife->ifm_aux; 3372 3373 /* 3374 * Whether or not we're in MII or SIA/SYM mode, the media info 3375 * contains the appropriate OPMODE bits. 3376 * 3377 * Note that if we have no media info, we are are doing 3378 * non-MII `auto'. 3379 * 3380 * Also, we always set the Must-Be-One bit. 3381 */ 3382 if (tm == NULL) { 3383 #ifdef DIAGNOSTIC 3384 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3385 panic("tlp_2114x_preinit: not IFM_AUTO"); 3386 if (sc->sc_nway_active == NULL) 3387 panic("tlp_2114x_preinit: nway_active NULL"); 3388 #endif 3389 tm = sc->sc_nway_active->ifm_aux; 3390 } 3391 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode; 3392 3393 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3394 } 3395 3396 /* 3397 * tlp_2114x_mii_preinit: 3398 * 3399 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3400 * This version is used by boards which only have MII and don't have 3401 * an ISV SROM. 3402 */ 3403 void 3404 tlp_2114x_mii_preinit(sc) 3405 struct tulip_softc *sc; 3406 { 3407 3408 /* 3409 * Always set the Must-Be-One bit, and Port Select (to select MII). 3410 * We'll never be called during a media change. 3411 */ 3412 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS; 3413 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3414 } 3415 3416 /* 3417 * tlp_pnic_preinit: 3418 * 3419 * Pre-init function for the Lite-On 82c168 and 82c169. 3420 */ 3421 void 3422 tlp_pnic_preinit(sc) 3423 struct tulip_softc *sc; 3424 { 3425 3426 if (sc->sc_flags & TULIPF_HAS_MII) { 3427 /* 3428 * MII case: just set the port-select bit; we will never 3429 * be called during a media change. 3430 */ 3431 sc->sc_opmode |= OPMODE_PS; 3432 } else { 3433 /* 3434 * ENDEC/PCS/Nway mode; enable the Tx backoff counter. 3435 */ 3436 sc->sc_opmode |= OPMODE_PNIC_TBEN; 3437 } 3438 } 3439 3440 /* 3441 * tlp_dm9102_preinit: 3442 * 3443 * Pre-init function for the Davicom DM9102. 3444 */ 3445 void 3446 tlp_dm9102_preinit(sc) 3447 struct tulip_softc *sc; 3448 { 3449 3450 switch (sc->sc_chip) { 3451 case TULIP_CHIP_DM9102: 3452 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 3453 break; 3454 3455 case TULIP_CHIP_DM9102A: 3456 /* 3457 * XXX Figure out how to actually deal with the HomePNA 3458 * XXX portion of the DM9102A. 3459 */ 3460 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD; 3461 break; 3462 3463 default: 3464 /* Nothing. */ 3465 } 3466 3467 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3468 } 3469 3470 /* 3471 * tlp_21140_reset: 3472 * 3473 * Issue a reset sequence on the 21140 via the GPIO facility. 3474 */ 3475 void 3476 tlp_21140_reset(sc) 3477 struct tulip_softc *sc; 3478 { 3479 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3480 struct tulip_21x4x_media *tm = ife->ifm_aux; 3481 int i; 3482 3483 /* First, set the direction on the GPIO pins. */ 3484 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 3485 3486 /* Now, issue the reset sequence. */ 3487 for (i = 0; i < tm->tm_reset_length; i++) { 3488 delay(10); 3489 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]); 3490 } 3491 3492 /* Now, issue the selection sequence. */ 3493 for (i = 0; i < tm->tm_gp_length; i++) { 3494 delay(10); 3495 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]); 3496 } 3497 3498 /* If there were no sequences, just lower the pins. */ 3499 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) 3500 TULIP_WRITE(sc, CSR_GPP, 0); 3501 } 3502 3503 /* 3504 * tlp_21142_reset: 3505 * 3506 * Issue a reset sequence on the 21142 via the GPIO facility. 3507 */ 3508 void 3509 tlp_21142_reset(sc) 3510 struct tulip_softc *sc; 3511 { 3512 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3513 struct tulip_21x4x_media *tm = ife->ifm_aux; 3514 const u_int8_t *ncp; 3515 int i; 3516 3517 ncp = &sc->sc_srom[tm->tm_reset_offset]; 3518 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 3519 delay(10); 3520 TULIP_WRITE(sc, CSR_SIAGEN, 3521 TULIP_ROM_GETW(ncp, 0) << 16); 3522 } 3523 3524 ncp = &sc->sc_srom[tm->tm_gp_offset]; 3525 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 3526 delay(10); 3527 TULIP_WRITE(sc, CSR_SIAGEN, 3528 TULIP_ROM_GETW(ncp, 0) << 16); 3529 } 3530 3531 /* If there were no sequences, just lower the pins. */ 3532 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 3533 delay(10); 3534 TULIP_WRITE(sc, CSR_SIAGEN, 0); 3535 } 3536 } 3537 3538 /* 3539 * tlp_pmac_reset: 3540 * 3541 * Reset routine for Macronix chips. 3542 */ 3543 void 3544 tlp_pmac_reset(sc) 3545 struct tulip_softc *sc; 3546 { 3547 3548 switch (sc->sc_chip) { 3549 case TULIP_CHIP_82C115: 3550 case TULIP_CHIP_MX98715: 3551 case TULIP_CHIP_MX98715A: 3552 case TULIP_CHIP_MX98725: 3553 /* 3554 * Set the LED operating mode. This information is located 3555 * in the EEPROM at byte offset 0x77, per the MX98715A and 3556 * MX98725 application notes. 3557 */ 3558 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24); 3559 break; 3560 case TULIP_CHIP_MX98715AEC_X: 3561 /* 3562 * Set the LED operating mode. This information is located 3563 * in the EEPROM at byte offset 0x76, per the MX98715AEC 3564 * application note. 3565 */ 3566 TULIP_WRITE(sc, CSR_MIIROM, ((0xf & sc->sc_srom[0x76]) << 28) 3567 | ((0xf0 & sc->sc_srom[0x76]) << 20)); 3568 break; 3569 3570 default: 3571 /* Nothing. */ 3572 } 3573 } 3574 3575 /* 3576 * tlp_dm9102_reset: 3577 * 3578 * Reset routine for the Davicom DM9102. 3579 */ 3580 void 3581 tlp_dm9102_reset(sc) 3582 struct tulip_softc *sc; 3583 { 3584 3585 TULIP_WRITE(sc, CSR_DM_PHYSTAT, DM_PHYSTAT_GEPC|DM_PHYSTAT_GPED); 3586 delay(100); 3587 TULIP_WRITE(sc, CSR_DM_PHYSTAT, 0); 3588 } 3589 3590 /***************************************************************************** 3591 * Chip/board-specific media switches. The ones here are ones that 3592 * are potentially common to multiple front-ends. 3593 *****************************************************************************/ 3594 3595 /* 3596 * This table is a common place for all sorts of media information, 3597 * keyed off of the SROM media code for that media. 3598 * 3599 * Note that we explicitly configure the 21142/21143 to always advertise 3600 * NWay capabilities when using the UTP port. 3601 * XXX Actually, we don't yet. 3602 */ 3603 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = { 3604 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0, 3605 "10baseT", 3606 0, 3607 { SIACONN_21040_10BASET, 3608 SIATXRX_21040_10BASET, 3609 SIAGEN_21040_10BASET }, 3610 3611 { SIACONN_21041_10BASET, 3612 SIATXRX_21041_10BASET, 3613 SIAGEN_21041_10BASET }, 3614 3615 { SIACONN_21142_10BASET, 3616 SIATXRX_21142_10BASET, 3617 SIAGEN_21142_10BASET } }, 3618 3619 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0, 3620 "10base2", 3621 0, 3622 { 0, 3623 0, 3624 0 }, 3625 3626 { SIACONN_21041_BNC, 3627 SIATXRX_21041_BNC, 3628 SIAGEN_21041_BNC }, 3629 3630 { SIACONN_21142_BNC, 3631 SIATXRX_21142_BNC, 3632 SIAGEN_21142_BNC } }, 3633 3634 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0, 3635 "10base5", 3636 0, 3637 { SIACONN_21040_AUI, 3638 SIATXRX_21040_AUI, 3639 SIAGEN_21040_AUI }, 3640 3641 { SIACONN_21041_AUI, 3642 SIATXRX_21041_AUI, 3643 SIAGEN_21041_AUI }, 3644 3645 { SIACONN_21142_AUI, 3646 SIATXRX_21142_AUI, 3647 SIAGEN_21142_AUI } }, 3648 3649 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0, 3650 "100baseTX", 3651 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3652 { 0, 3653 0, 3654 0 }, 3655 3656 { 0, 3657 0, 3658 0 }, 3659 3660 { 0, 3661 0, 3662 SIAGEN_ABM } }, 3663 3664 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX, 3665 "10baseT-FDX", 3666 OPMODE_FD|OPMODE_HBD, 3667 { SIACONN_21040_10BASET_FDX, 3668 SIATXRX_21040_10BASET_FDX, 3669 SIAGEN_21040_10BASET_FDX }, 3670 3671 { SIACONN_21041_10BASET_FDX, 3672 SIATXRX_21041_10BASET_FDX, 3673 SIAGEN_21041_10BASET_FDX }, 3674 3675 { SIACONN_21142_10BASET_FDX, 3676 SIATXRX_21142_10BASET_FDX, 3677 SIAGEN_21142_10BASET_FDX } }, 3678 3679 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX, 3680 "100baseTX-FDX", 3681 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD, 3682 { 0, 3683 0, 3684 0 }, 3685 3686 { 0, 3687 0, 3688 0 }, 3689 3690 { 0, 3691 0, 3692 SIAGEN_ABM } }, 3693 3694 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0, 3695 "100baseT4", 3696 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3697 { 0, 3698 0, 3699 0 }, 3700 3701 { 0, 3702 0, 3703 0 }, 3704 3705 { 0, 3706 0, 3707 SIAGEN_ABM } }, 3708 3709 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0, 3710 "100baseFX", 3711 OPMODE_PS|OPMODE_PCS|OPMODE_HBD, 3712 { 0, 3713 0, 3714 0 }, 3715 3716 { 0, 3717 0, 3718 0 }, 3719 3720 { 0, 3721 0, 3722 SIAGEN_ABM } }, 3723 3724 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX, 3725 "100baseFX-FDX", 3726 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD, 3727 { 0, 3728 0, 3729 0 }, 3730 3731 { 0, 3732 0, 3733 0 }, 3734 3735 { 0, 3736 0, 3737 SIAGEN_ABM } }, 3738 3739 { 0, 0, 0, 3740 NULL, 3741 0, 3742 { 0, 3743 0, 3744 0 }, 3745 3746 { 0, 3747 0, 3748 0 }, 3749 3750 { 0, 3751 0, 3752 0 } }, 3753 }; 3754 3755 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t)); 3756 void tlp_srom_media_info __P((struct tulip_softc *, 3757 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *)); 3758 void tlp_add_srom_media __P((struct tulip_softc *, int, 3759 void (*)(struct tulip_softc *, struct ifmediareq *), 3760 int (*)(struct tulip_softc *), const u_int8_t *, int)); 3761 void tlp_print_media __P((struct tulip_softc *)); 3762 void tlp_nway_activate __P((struct tulip_softc *, int)); 3763 void tlp_get_minst __P((struct tulip_softc *)); 3764 3765 const struct tulip_srom_to_ifmedia * 3766 tlp_srom_to_ifmedia(sm) 3767 u_int8_t sm; 3768 { 3769 const struct tulip_srom_to_ifmedia *tsti; 3770 3771 for (tsti = tulip_srom_to_ifmedia_table; 3772 tsti->tsti_name != NULL; tsti++) { 3773 if (tsti->tsti_srom == sm) 3774 return (tsti); 3775 } 3776 3777 return (NULL); 3778 } 3779 3780 void 3781 tlp_srom_media_info(sc, tsti, tm) 3782 struct tulip_softc *sc; 3783 const struct tulip_srom_to_ifmedia *tsti; 3784 struct tulip_21x4x_media *tm; 3785 { 3786 3787 tm->tm_name = tsti->tsti_name; 3788 tm->tm_opmode = tsti->tsti_opmode; 3789 3790 switch (sc->sc_chip) { 3791 case TULIP_CHIP_DE425: 3792 case TULIP_CHIP_21040: 3793 tm->tm_sia = tsti->tsti_21040; /* struct assignment */ 3794 break; 3795 3796 case TULIP_CHIP_21041: 3797 tm->tm_sia = tsti->tsti_21041; /* struct assignment */ 3798 break; 3799 3800 case TULIP_CHIP_21142: 3801 case TULIP_CHIP_21143: 3802 case TULIP_CHIP_82C115: 3803 case TULIP_CHIP_MX98715: 3804 case TULIP_CHIP_MX98715A: 3805 case TULIP_CHIP_MX98715AEC_X: 3806 case TULIP_CHIP_MX98725: 3807 tm->tm_sia = tsti->tsti_21142; /* struct assignment */ 3808 break; 3809 3810 default: 3811 /* Nothing. */ 3812 } 3813 } 3814 3815 void 3816 tlp_add_srom_media(sc, type, get, set, list, cnt) 3817 struct tulip_softc *sc; 3818 int type; 3819 void (*get) __P((struct tulip_softc *, struct ifmediareq *)); 3820 int (*set) __P((struct tulip_softc *)); 3821 const u_int8_t *list; 3822 int cnt; 3823 { 3824 struct tulip_21x4x_media *tm; 3825 const struct tulip_srom_to_ifmedia *tsti; 3826 int i; 3827 3828 for (i = 0; i < cnt; i++) { 3829 tsti = tlp_srom_to_ifmedia(list[i]); 3830 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 3831 memset(tm, 0, sizeof(*tm)); 3832 tlp_srom_media_info(sc, tsti, tm); 3833 tm->tm_type = type; 3834 tm->tm_get = get; 3835 tm->tm_set = set; 3836 3837 ifmedia_add(&sc->sc_mii.mii_media, 3838 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 3839 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 3840 } 3841 } 3842 3843 void 3844 tlp_print_media(sc) 3845 struct tulip_softc *sc; 3846 { 3847 struct ifmedia_entry *ife; 3848 struct tulip_21x4x_media *tm; 3849 const char *sep = ""; 3850 3851 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3852 3853 printf("%s: ", sc->sc_dev.dv_xname); 3854 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 3855 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 3856 tm = ife->ifm_aux; 3857 if (tm == NULL) { 3858 #ifdef DIAGNOSTIC 3859 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3860 panic("tlp_print_media"); 3861 #endif 3862 PRINT("auto"); 3863 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII && 3864 tm->tm_type != TULIP_ROM_MB_21142_MII) { 3865 PRINT(tm->tm_name); 3866 } 3867 } 3868 printf("\n"); 3869 3870 #undef PRINT 3871 } 3872 3873 void 3874 tlp_nway_activate(sc, media) 3875 struct tulip_softc *sc; 3876 int media; 3877 { 3878 struct ifmedia_entry *ife; 3879 3880 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0); 3881 #ifdef DIAGNOSTIC 3882 if (ife == NULL) 3883 panic("tlp_nway_activate"); 3884 #endif 3885 sc->sc_nway_active = ife; 3886 } 3887 3888 void 3889 tlp_get_minst(sc) 3890 struct tulip_softc *sc; 3891 { 3892 3893 if ((sc->sc_media_seen & 3894 ~((1 << TULIP_ROM_MB_21140_MII) | 3895 (1 << TULIP_ROM_MB_21142_MII))) == 0) { 3896 /* 3897 * We have not yet seen any SIA/SYM media (but are 3898 * about to; that's why we're called!), so assign 3899 * the current media instance to be the `internal media' 3900 * instance, and advance it so any MII media gets a 3901 * fresh one (used to selecting/isolating a PHY). 3902 */ 3903 sc->sc_tlp_minst = sc->sc_mii.mii_instance++; 3904 } 3905 } 3906 3907 /* 3908 * SIA Utility functions. 3909 */ 3910 void tlp_sia_update_link __P((struct tulip_softc *)); 3911 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *)); 3912 int tlp_sia_set __P((struct tulip_softc *)); 3913 void tlp_sia_fixup __P((struct tulip_softc *)); 3914 3915 void 3916 tlp_sia_update_link(sc) 3917 struct tulip_softc *sc; 3918 { 3919 struct ifmedia_entry *ife; 3920 struct tulip_21x4x_media *tm; 3921 u_int32_t siastat; 3922 3923 ife = TULIP_CURRENT_MEDIA(sc); 3924 tm = ife->ifm_aux; 3925 3926 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 3927 3928 siastat = TULIP_READ(sc, CSR_SIASTAT); 3929 3930 /* 3931 * Note that when we do SIA link tests, we are assuming that 3932 * the chip is really in the mode that the current media setting 3933 * reflects. If we're not, then the link tests will not be 3934 * accurate! 3935 */ 3936 switch (IFM_SUBTYPE(ife->ifm_media)) { 3937 case IFM_10_T: 3938 sc->sc_flags |= TULIPF_LINK_VALID; 3939 if ((siastat & SIASTAT_LS10) == 0) 3940 sc->sc_flags |= TULIPF_LINK_UP; 3941 break; 3942 3943 case IFM_100_TX: 3944 case IFM_100_T4: 3945 sc->sc_flags |= TULIPF_LINK_VALID; 3946 if ((siastat & SIASTAT_LS100) == 0) 3947 sc->sc_flags |= TULIPF_LINK_UP; 3948 break; 3949 } 3950 3951 switch (sc->sc_chip) { 3952 case TULIP_CHIP_21142: 3953 case TULIP_CHIP_21143: 3954 /* 3955 * On these chips, we can tell more information about 3956 * AUI/BNC. Note that the AUI/BNC selection is made 3957 * in a different register; for our purpose, it's all 3958 * AUI. 3959 */ 3960 switch (IFM_SUBTYPE(ife->ifm_media)) { 3961 case IFM_10_2: 3962 case IFM_10_5: 3963 sc->sc_flags |= TULIPF_LINK_VALID; 3964 if (siastat & SIASTAT_ARA) { 3965 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA); 3966 sc->sc_flags |= TULIPF_LINK_UP; 3967 } 3968 break; 3969 3970 default: 3971 /* 3972 * If we're SYM media and can detect the link 3973 * via the GPIO facility, prefer that status 3974 * over LS100. 3975 */ 3976 if (tm->tm_type == TULIP_ROM_MB_21143_SYM && 3977 tm->tm_actmask != 0) { 3978 sc->sc_flags = (sc->sc_flags & 3979 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID; 3980 if (TULIP_ISSET(sc, CSR_SIAGEN, 3981 tm->tm_actmask) == tm->tm_actdata) 3982 sc->sc_flags |= TULIPF_LINK_UP; 3983 } 3984 } 3985 break; 3986 3987 default: 3988 /* Nothing. */ 3989 } 3990 } 3991 3992 void 3993 tlp_sia_get(sc, ifmr) 3994 struct tulip_softc *sc; 3995 struct ifmediareq *ifmr; 3996 { 3997 struct ifmedia_entry *ife; 3998 3999 ifmr->ifm_status = 0; 4000 4001 tlp_sia_update_link(sc); 4002 4003 ife = TULIP_CURRENT_MEDIA(sc); 4004 4005 if (sc->sc_flags & TULIPF_LINK_VALID) 4006 ifmr->ifm_status |= IFM_AVALID; 4007 if (sc->sc_flags & TULIPF_LINK_UP) 4008 ifmr->ifm_status |= IFM_ACTIVE; 4009 ifmr->ifm_active = ife->ifm_media; 4010 } 4011 4012 void 4013 tlp_sia_fixup(sc) 4014 struct tulip_softc *sc; 4015 { 4016 struct ifmedia_entry *ife; 4017 struct tulip_21x4x_media *tm; 4018 u_int32_t siaconn, siatxrx, siagen; 4019 4020 switch (sc->sc_chip) { 4021 case TULIP_CHIP_82C115: 4022 case TULIP_CHIP_MX98713A: 4023 case TULIP_CHIP_MX98715: 4024 case TULIP_CHIP_MX98715A: 4025 case TULIP_CHIP_MX98715AEC_X: 4026 case TULIP_CHIP_MX98725: 4027 siaconn = PMAC_SIACONN_MASK; 4028 siatxrx = PMAC_SIATXRX_MASK; 4029 siagen = PMAC_SIAGEN_MASK; 4030 break; 4031 4032 default: 4033 /* No fixups required on any other chips. */ 4034 return; 4035 } 4036 4037 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4038 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 4039 tm = ife->ifm_aux; 4040 if (tm == NULL) 4041 continue; 4042 4043 tm->tm_siaconn &= siaconn; 4044 tm->tm_siatxrx &= siatxrx; 4045 tm->tm_siagen &= siagen; 4046 } 4047 } 4048 4049 int 4050 tlp_sia_set(sc) 4051 struct tulip_softc *sc; 4052 { 4053 struct ifmedia_entry *ife; 4054 struct tulip_21x4x_media *tm; 4055 4056 ife = TULIP_CURRENT_MEDIA(sc); 4057 tm = ife->ifm_aux; 4058 4059 /* 4060 * XXX This appears to be necessary on a bunch of the clone chips. 4061 */ 4062 delay(20000); 4063 4064 /* 4065 * Idle the chip. 4066 */ 4067 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4068 4069 /* 4070 * Program the SIA. It's important to write in this order, 4071 * resetting the SIA first. 4072 */ 4073 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */ 4074 delay(1000); 4075 4076 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx); 4077 4078 switch (sc->sc_chip) { 4079 case TULIP_CHIP_21142: 4080 case TULIP_CHIP_21143: 4081 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl); 4082 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata); 4083 break; 4084 default: 4085 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen); 4086 } 4087 4088 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn); 4089 4090 /* 4091 * Set the OPMODE bits for this media and write OPMODE. 4092 * This will resume the transmit and receive processes. 4093 */ 4094 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4095 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4096 4097 return (0); 4098 } 4099 4100 /* 4101 * 21140 GPIO utility functions. 4102 */ 4103 void tlp_21140_gpio_update_link __P((struct tulip_softc *)); 4104 void tlp_21140_gpio_get __P((struct tulip_softc *sc, 4105 struct ifmediareq *ifmr)); 4106 int tlp_21140_gpio_set __P((struct tulip_softc *sc)); 4107 4108 void 4109 tlp_21140_gpio_update_link(sc) 4110 struct tulip_softc *sc; 4111 { 4112 struct ifmedia_entry *ife; 4113 struct tulip_21x4x_media *tm; 4114 4115 ife = TULIP_CURRENT_MEDIA(sc); 4116 tm = ife->ifm_aux; 4117 4118 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 4119 4120 if (tm->tm_actmask != 0) { 4121 sc->sc_flags |= TULIPF_LINK_VALID; 4122 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) == 4123 tm->tm_actdata) 4124 sc->sc_flags |= TULIPF_LINK_UP; 4125 } 4126 } 4127 4128 void 4129 tlp_21140_gpio_get(sc, ifmr) 4130 struct tulip_softc *sc; 4131 struct ifmediareq *ifmr; 4132 { 4133 struct ifmedia_entry *ife; 4134 4135 ifmr->ifm_status = 0; 4136 4137 tlp_21140_gpio_update_link(sc); 4138 4139 ife = TULIP_CURRENT_MEDIA(sc); 4140 4141 if (sc->sc_flags & TULIPF_LINK_VALID) 4142 ifmr->ifm_status |= IFM_AVALID; 4143 if (sc->sc_flags & TULIPF_LINK_UP) 4144 ifmr->ifm_status |= IFM_ACTIVE; 4145 ifmr->ifm_active = ife->ifm_media; 4146 } 4147 4148 int 4149 tlp_21140_gpio_set(sc) 4150 struct tulip_softc *sc; 4151 { 4152 struct ifmedia_entry *ife; 4153 struct tulip_21x4x_media *tm; 4154 4155 ife = TULIP_CURRENT_MEDIA(sc); 4156 tm = ife->ifm_aux; 4157 4158 /* 4159 * Idle the chip. 4160 */ 4161 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4162 4163 /* 4164 * Set the GPIO pins for this media, to flip any 4165 * relays, etc. 4166 */ 4167 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4168 delay(10); 4169 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata); 4170 4171 /* 4172 * Set the OPMODE bits for this media and write OPMODE. 4173 * This will resume the transmit and receive processes. 4174 */ 4175 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4176 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4177 4178 return (0); 4179 } 4180 4181 /* 4182 * 21040 and 21041 media switches. 4183 */ 4184 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 4185 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 4186 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 4187 void tlp_21041_tmsw_init __P((struct tulip_softc *)); 4188 4189 const struct tulip_mediasw tlp_21040_mediasw = { 4190 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set 4191 }; 4192 4193 const struct tulip_mediasw tlp_21040_tp_mediasw = { 4194 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set 4195 }; 4196 4197 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 4198 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set 4199 }; 4200 4201 const struct tulip_mediasw tlp_21041_mediasw = { 4202 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set 4203 }; 4204 4205 4206 void 4207 tlp_21040_tmsw_init(sc) 4208 struct tulip_softc *sc; 4209 { 4210 static const u_int8_t media[] = { 4211 TULIP_ROM_MB_MEDIA_TP, 4212 TULIP_ROM_MB_MEDIA_TP_FDX, 4213 TULIP_ROM_MB_MEDIA_AUI, 4214 }; 4215 struct tulip_21x4x_media *tm; 4216 4217 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4218 tlp_mediastatus); 4219 4220 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3); 4221 4222 /* 4223 * No SROM type for External SIA. 4224 */ 4225 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4226 memset(tm, 0, sizeof(*tm)); 4227 tm->tm_name = "manual"; 4228 tm->tm_opmode = 0; 4229 tm->tm_siaconn = SIACONN_21040_EXTSIA; 4230 tm->tm_siatxrx = SIATXRX_21040_EXTSIA; 4231 tm->tm_siagen = SIAGEN_21040_EXTSIA; 4232 ifmedia_add(&sc->sc_mii.mii_media, 4233 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm); 4234 4235 /* 4236 * XXX Autosense not yet supported. 4237 */ 4238 4239 /* XXX This should be auto-sense. */ 4240 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4241 4242 tlp_print_media(sc); 4243 } 4244 4245 void 4246 tlp_21040_tp_tmsw_init(sc) 4247 struct tulip_softc *sc; 4248 { 4249 static const u_int8_t media[] = { 4250 TULIP_ROM_MB_MEDIA_TP, 4251 TULIP_ROM_MB_MEDIA_TP_FDX, 4252 }; 4253 4254 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4255 tlp_mediastatus); 4256 4257 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2); 4258 4259 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4260 4261 tlp_print_media(sc); 4262 } 4263 4264 void 4265 tlp_21040_auibnc_tmsw_init(sc) 4266 struct tulip_softc *sc; 4267 { 4268 static const u_int8_t media[] = { 4269 TULIP_ROM_MB_MEDIA_AUI, 4270 }; 4271 4272 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4273 tlp_mediastatus); 4274 4275 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1); 4276 4277 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 4278 4279 tlp_print_media(sc); 4280 } 4281 4282 void 4283 tlp_21041_tmsw_init(sc) 4284 struct tulip_softc *sc; 4285 { 4286 static const u_int8_t media[] = { 4287 TULIP_ROM_MB_MEDIA_TP, 4288 TULIP_ROM_MB_MEDIA_TP_FDX, 4289 TULIP_ROM_MB_MEDIA_BNC, 4290 TULIP_ROM_MB_MEDIA_AUI, 4291 }; 4292 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt; 4293 const struct tulip_srom_to_ifmedia *tsti; 4294 struct tulip_21x4x_media *tm; 4295 u_int16_t romdef; 4296 u_int8_t mb; 4297 4298 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4299 tlp_mediastatus); 4300 4301 if (tlp_isv_srom(sc->sc_srom) == 0) { 4302 not_isv_srom: 4303 /* 4304 * If we have a board without the standard 21041 SROM format, 4305 * we just assume all media are present and try and pick a 4306 * reasonable default. 4307 */ 4308 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4); 4309 4310 /* 4311 * XXX Autosense not yet supported. 4312 */ 4313 4314 /* XXX This should be auto-sense. */ 4315 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4316 4317 tlp_print_media(sc); 4318 return; 4319 } 4320 4321 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4322 for (i = 0; i < devcnt; i++) { 4323 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4324 break; 4325 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4326 sc->sc_devno) 4327 break; 4328 } 4329 4330 if (i == devcnt) 4331 goto not_isv_srom; 4332 4333 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4334 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4335 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE; 4336 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4337 4338 for (; m_cnt != 0; 4339 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) { 4340 mb = sc->sc_srom[mb_offset]; 4341 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4342 memset(tm, 0, sizeof(*tm)); 4343 switch (mb & TULIP_ROM_MB_MEDIA_CODE) { 4344 case TULIP_ROM_MB_MEDIA_TP_FDX: 4345 case TULIP_ROM_MB_MEDIA_TP: 4346 case TULIP_ROM_MB_MEDIA_BNC: 4347 case TULIP_ROM_MB_MEDIA_AUI: 4348 tsti = tlp_srom_to_ifmedia(mb & 4349 TULIP_ROM_MB_MEDIA_CODE); 4350 4351 tlp_srom_media_info(sc, tsti, tm); 4352 4353 /* 4354 * Override our default SIA settings if the 4355 * SROM contains its own. 4356 */ 4357 if (mb & TULIP_ROM_MB_EXT) { 4358 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom, 4359 mb_offset + TULIP_ROM_MB_CSR13); 4360 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom, 4361 mb_offset + TULIP_ROM_MB_CSR14); 4362 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom, 4363 mb_offset + TULIP_ROM_MB_CSR15); 4364 } 4365 4366 ifmedia_add(&sc->sc_mii.mii_media, 4367 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4368 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4369 break; 4370 4371 default: 4372 printf("%s: unknown media code 0x%02x\n", 4373 sc->sc_dev.dv_xname, 4374 mb & TULIP_ROM_MB_MEDIA_CODE); 4375 free(tm, M_DEVBUF); 4376 } 4377 } 4378 4379 /* 4380 * XXX Autosense not yet supported. 4381 */ 4382 4383 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset + 4384 TULIP_ROM_IL_SELECT_CONN_TYPE); 4385 switch (romdef) { 4386 case SELECT_CONN_TYPE_TP: 4387 case SELECT_CONN_TYPE_TP_AUTONEG: 4388 case SELECT_CONN_TYPE_TP_NOLINKPASS: 4389 defmedia = IFM_ETHER|IFM_10_T; 4390 break; 4391 4392 case SELECT_CONN_TYPE_TP_FDX: 4393 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX; 4394 break; 4395 4396 case SELECT_CONN_TYPE_BNC: 4397 defmedia = IFM_ETHER|IFM_10_2; 4398 break; 4399 4400 case SELECT_CONN_TYPE_AUI: 4401 defmedia = IFM_ETHER|IFM_10_5; 4402 break; 4403 #if 0 /* XXX */ 4404 case SELECT_CONN_TYPE_ASENSE: 4405 case SELECT_CONN_TYPE_ASENSE_AUTONEG: 4406 defmedia = IFM_ETHER|IFM_AUTO; 4407 break; 4408 #endif 4409 default: 4410 defmedia = 0; 4411 } 4412 4413 if (defmedia == 0) { 4414 /* 4415 * XXX We should default to auto-sense. 4416 */ 4417 defmedia = IFM_ETHER|IFM_10_T; 4418 } 4419 4420 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4421 4422 tlp_print_media(sc); 4423 } 4424 4425 /* 4426 * DECchip 2114x ISV media switch. 4427 */ 4428 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *)); 4429 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 4430 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *)); 4431 4432 const struct tulip_mediasw tlp_2114x_isv_mediasw = { 4433 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 4434 }; 4435 4436 void 4437 tlp_2114x_isv_tmsw_init(sc) 4438 struct tulip_softc *sc; 4439 { 4440 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 4441 struct ifmedia_entry *ife; 4442 struct mii_softc *phy; 4443 struct tulip_21x4x_media *tm; 4444 const struct tulip_srom_to_ifmedia *tsti; 4445 int i, devcnt, leaf_offset, m_cnt, type, length; 4446 int defmedia, miidef; 4447 u_int16_t word; 4448 u_int8_t *cp, *ncp; 4449 4450 defmedia = miidef = 0; 4451 4452 sc->sc_mii.mii_ifp = ifp; 4453 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 4454 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 4455 sc->sc_mii.mii_statchg = sc->sc_statchg; 4456 4457 /* 4458 * Ignore `instance'; we may get a mixture of SIA and MII 4459 * media, and `instance' is used to isolate or select the 4460 * PHY on the MII as appropriate. Note that duplicate media 4461 * are disallowed, so ignoring `instance' is safe. 4462 */ 4463 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange, 4464 tlp_mediastatus); 4465 4466 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4467 for (i = 0; i < devcnt; i++) { 4468 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4469 break; 4470 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4471 sc->sc_devno) 4472 break; 4473 } 4474 4475 if (i == devcnt) { 4476 printf("%s: unable to locate info leaf in SROM\n", 4477 sc->sc_dev.dv_xname); 4478 return; 4479 } 4480 4481 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4482 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4483 4484 /* XXX SELECT CONN TYPE */ 4485 4486 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4487 4488 /* 4489 * On some chips, the first thing in the Info Leaf is the 4490 * GPIO pin direction data. 4491 */ 4492 switch (sc->sc_chip) { 4493 case TULIP_CHIP_21140: 4494 case TULIP_CHIP_21140A: 4495 case TULIP_CHIP_MX98713: 4496 case TULIP_CHIP_AX88140: 4497 case TULIP_CHIP_AX88141: 4498 sc->sc_gp_dir = *cp++; 4499 break; 4500 4501 default: 4502 /* Nothing. */ 4503 } 4504 4505 /* Get the media count. */ 4506 m_cnt = *cp++; 4507 4508 for (; m_cnt != 0; cp = ncp, m_cnt--) { 4509 /* 4510 * Determine the type and length of this media block. 4511 */ 4512 if ((*cp & 0x80) == 0) { 4513 length = 4; 4514 type = TULIP_ROM_MB_21140_GPR; 4515 } else { 4516 length = (*cp++ & 0x7f) - 1; 4517 type = *cp++ & 0x3f; 4518 } 4519 4520 /* Compute the start of the next block. */ 4521 ncp = cp + length; 4522 4523 /* Now, parse the block. */ 4524 switch (type) { 4525 case TULIP_ROM_MB_21140_GPR: 4526 tlp_get_minst(sc); 4527 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR; 4528 4529 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4530 memset(tm, 0, sizeof(*tm)); 4531 4532 tm->tm_type = TULIP_ROM_MB_21140_GPR; 4533 tm->tm_get = tlp_21140_gpio_get; 4534 tm->tm_set = tlp_21140_gpio_set; 4535 4536 /* First is the media type code. */ 4537 tsti = tlp_srom_to_ifmedia(cp[0] & 4538 TULIP_ROM_MB_MEDIA_CODE); 4539 if (tsti == NULL) { 4540 /* Invalid media code. */ 4541 free(tm, M_DEVBUF); 4542 break; 4543 } 4544 4545 /* Get defaults. */ 4546 tlp_srom_media_info(sc, tsti, tm); 4547 4548 /* Next is any GPIO info for this media. */ 4549 tm->tm_gpdata = cp[1]; 4550 4551 /* 4552 * Next is a word containing OPMODE information 4553 * and info on how to detect if this media is 4554 * active. 4555 */ 4556 word = TULIP_ROM_GETW(cp, 2); 4557 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4558 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4559 tm->tm_actmask = 4560 TULIP_ROM_MB_BITPOS(word); 4561 tm->tm_actdata = 4562 (word & TULIP_ROM_MB_POLARITY) ? 4563 0 : tm->tm_actmask; 4564 } 4565 4566 ifmedia_add(&sc->sc_mii.mii_media, 4567 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4568 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4569 break; 4570 4571 case TULIP_ROM_MB_21140_MII: 4572 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII; 4573 4574 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4575 memset(tm, 0, sizeof(*tm)); 4576 4577 tm->tm_type = TULIP_ROM_MB_21140_MII; 4578 tm->tm_get = tlp_mii_getmedia; 4579 tm->tm_set = tlp_mii_setmedia; 4580 tm->tm_opmode = OPMODE_PS; 4581 4582 if (sc->sc_reset == NULL) 4583 sc->sc_reset = tlp_21140_reset; 4584 4585 /* First is the PHY number. */ 4586 tm->tm_phyno = *cp++; 4587 4588 /* Next is the MII select sequence length and offset. */ 4589 tm->tm_gp_length = *cp++; 4590 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4591 cp += tm->tm_gp_length; 4592 4593 /* Next is the MII reset sequence length and offset. */ 4594 tm->tm_reset_length = *cp++; 4595 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4596 cp += tm->tm_reset_length; 4597 4598 /* 4599 * The following items are left in the media block 4600 * that we don't particularly care about: 4601 * 4602 * capabilities W 4603 * advertisement W 4604 * full duplex W 4605 * tx threshold W 4606 * 4607 * These appear to be bits in the PHY registers, 4608 * which our MII code handles on its own. 4609 */ 4610 4611 /* 4612 * Before we probe the MII bus, we need to reset 4613 * it and issue the selection sequence. 4614 */ 4615 4616 /* Set the direction of the pins... */ 4617 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4618 4619 for (i = 0; i < tm->tm_reset_length; i++) { 4620 delay(10); 4621 TULIP_WRITE(sc, CSR_GPP, 4622 sc->sc_srom[tm->tm_reset_offset + i]); 4623 } 4624 4625 for (i = 0; i < tm->tm_gp_length; i++) { 4626 delay(10); 4627 TULIP_WRITE(sc, CSR_GPP, 4628 sc->sc_srom[tm->tm_gp_offset + i]); 4629 } 4630 4631 /* If there were no sequences, just lower the pins. */ 4632 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4633 delay(10); 4634 TULIP_WRITE(sc, CSR_GPP, 0); 4635 } 4636 4637 /* 4638 * Now, probe the MII for the PHY. Note, we know 4639 * the location of the PHY on the bus, but we don't 4640 * particularly care; the MII code just likes to 4641 * search the whole thing anyhow. 4642 */ 4643 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4644 MII_PHY_ANY, tm->tm_phyno, 0); 4645 4646 /* 4647 * Now, search for the PHY we hopefully just 4648 * configured. If it's not configured into the 4649 * kernel, we lose. The PHY's default media always 4650 * takes priority. 4651 */ 4652 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4653 phy != NULL; 4654 phy = LIST_NEXT(phy, mii_list)) 4655 if (phy->mii_offset == tm->tm_phyno) 4656 break; 4657 if (phy == NULL) { 4658 printf("%s: unable to configure MII\n", 4659 sc->sc_dev.dv_xname); 4660 break; 4661 } 4662 4663 sc->sc_flags |= TULIPF_HAS_MII; 4664 sc->sc_tick = tlp_mii_tick; 4665 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4666 phy->mii_inst); 4667 4668 /* 4669 * Okay, now that we've found the PHY and the MII 4670 * layer has added all of the media associated 4671 * with that PHY, we need to traverse the media 4672 * list, and add our `tm' to each entry's `aux' 4673 * pointer. 4674 * 4675 * We do this by looking for media with our 4676 * PHY's `instance'. 4677 */ 4678 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4679 ife != NULL; 4680 ife = TAILQ_NEXT(ife, ifm_list)) { 4681 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4682 continue; 4683 ife->ifm_aux = tm; 4684 } 4685 break; 4686 4687 case TULIP_ROM_MB_21142_SIA: 4688 tlp_get_minst(sc); 4689 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA; 4690 4691 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4692 memset(tm, 0, sizeof(*tm)); 4693 4694 tm->tm_type = TULIP_ROM_MB_21142_SIA; 4695 tm->tm_get = tlp_sia_get; 4696 tm->tm_set = tlp_sia_set; 4697 4698 /* First is the media type code. */ 4699 tsti = tlp_srom_to_ifmedia(cp[0] & 4700 TULIP_ROM_MB_MEDIA_CODE); 4701 if (tsti == NULL) { 4702 /* Invalid media code. */ 4703 free(tm, M_DEVBUF); 4704 break; 4705 } 4706 4707 /* Get defaults. */ 4708 tlp_srom_media_info(sc, tsti, tm); 4709 4710 /* 4711 * Override our default SIA settings if the 4712 * SROM contains its own. 4713 */ 4714 if (cp[0] & 0x40) { 4715 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1); 4716 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3); 4717 tm->tm_siagen = TULIP_ROM_GETW(cp, 5); 4718 cp += 7; 4719 } else 4720 cp++; 4721 4722 /* Next is GPIO control/data. */ 4723 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0); 4724 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2); 4725 4726 ifmedia_add(&sc->sc_mii.mii_media, 4727 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4728 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4729 break; 4730 4731 case TULIP_ROM_MB_21142_MII: 4732 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII; 4733 4734 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4735 memset(tm, 0, sizeof(*tm)); 4736 4737 tm->tm_type = TULIP_ROM_MB_21142_MII; 4738 tm->tm_get = tlp_mii_getmedia; 4739 tm->tm_set = tlp_mii_setmedia; 4740 tm->tm_opmode = OPMODE_PS; 4741 4742 if (sc->sc_reset == NULL) 4743 sc->sc_reset = tlp_21142_reset; 4744 4745 /* First is the PHY number. */ 4746 tm->tm_phyno = *cp++; 4747 4748 /* Next is the MII select sequence length and offset. */ 4749 tm->tm_gp_length = *cp++; 4750 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4751 cp += tm->tm_gp_length * 2; 4752 4753 /* Next is the MII reset sequence length and offset. */ 4754 tm->tm_reset_length = *cp++; 4755 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4756 cp += tm->tm_reset_length * 2; 4757 4758 /* 4759 * The following items are left in the media block 4760 * that we don't particularly care about: 4761 * 4762 * capabilities W 4763 * advertisement W 4764 * full duplex W 4765 * tx threshold W 4766 * MII interrupt W 4767 * 4768 * These appear to be bits in the PHY registers, 4769 * which our MII code handles on its own. 4770 */ 4771 4772 /* 4773 * Before we probe the MII bus, we need to reset 4774 * it and issue the selection sequence. 4775 */ 4776 4777 ncp = &sc->sc_srom[tm->tm_reset_offset]; 4778 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 4779 delay(10); 4780 TULIP_WRITE(sc, CSR_SIAGEN, 4781 TULIP_ROM_GETW(ncp, 0) << 16); 4782 } 4783 4784 ncp = &sc->sc_srom[tm->tm_gp_offset]; 4785 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 4786 delay(10); 4787 TULIP_WRITE(sc, CSR_SIAGEN, 4788 TULIP_ROM_GETW(ncp, 0) << 16); 4789 } 4790 4791 /* If there were no sequences, just lower the pins. */ 4792 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4793 delay(10); 4794 TULIP_WRITE(sc, CSR_SIAGEN, 0); 4795 } 4796 4797 /* 4798 * Now, probe the MII for the PHY. Note, we know 4799 * the location of the PHY on the bus, but we don't 4800 * particularly care; the MII code just likes to 4801 * search the whole thing anyhow. 4802 */ 4803 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4804 MII_PHY_ANY, tm->tm_phyno, 0); 4805 4806 /* 4807 * Now, search for the PHY we hopefully just 4808 * configured. If it's not configured into the 4809 * kernel, we lose. The PHY's default media always 4810 * takes priority. 4811 */ 4812 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4813 phy != NULL; 4814 phy = LIST_NEXT(phy, mii_list)) 4815 if (phy->mii_offset == tm->tm_phyno) 4816 break; 4817 if (phy == NULL) { 4818 printf("%s: unable to configure MII\n", 4819 sc->sc_dev.dv_xname); 4820 break; 4821 } 4822 4823 sc->sc_flags |= TULIPF_HAS_MII; 4824 sc->sc_tick = tlp_mii_tick; 4825 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4826 phy->mii_inst); 4827 4828 /* 4829 * Okay, now that we've found the PHY and the MII 4830 * layer has added all of the media associated 4831 * with that PHY, we need to traverse the media 4832 * list, and add our `tm' to each entry's `aux' 4833 * pointer. 4834 * 4835 * We do this by looking for media with our 4836 * PHY's `instance'. 4837 */ 4838 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4839 ife != NULL; 4840 ife = TAILQ_NEXT(ife, ifm_list)) { 4841 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4842 continue; 4843 ife->ifm_aux = tm; 4844 } 4845 break; 4846 4847 case TULIP_ROM_MB_21143_SYM: 4848 tlp_get_minst(sc); 4849 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM; 4850 4851 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4852 memset(tm, 0, sizeof(*tm)); 4853 4854 tm->tm_type = TULIP_ROM_MB_21143_SYM; 4855 tm->tm_get = tlp_sia_get; 4856 tm->tm_set = tlp_sia_set; 4857 4858 /* First is the media type code. */ 4859 tsti = tlp_srom_to_ifmedia(cp[0] & 4860 TULIP_ROM_MB_MEDIA_CODE); 4861 if (tsti == NULL) { 4862 /* Invalid media code. */ 4863 free(tm, M_DEVBUF); 4864 break; 4865 } 4866 4867 /* Get defaults. */ 4868 tlp_srom_media_info(sc, tsti, tm); 4869 4870 /* Next is GPIO control/data. */ 4871 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1); 4872 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3); 4873 4874 /* 4875 * Next is a word containing OPMODE information 4876 * and info on how to detect if this media is 4877 * active. 4878 */ 4879 word = TULIP_ROM_GETW(cp, 5); 4880 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4881 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4882 tm->tm_actmask = 4883 TULIP_ROM_MB_BITPOS(word); 4884 tm->tm_actdata = 4885 (word & TULIP_ROM_MB_POLARITY) ? 4886 0 : tm->tm_actmask; 4887 } 4888 4889 ifmedia_add(&sc->sc_mii.mii_media, 4890 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4891 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4892 break; 4893 4894 case TULIP_ROM_MB_21143_RESET: 4895 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname); 4896 break; 4897 4898 default: 4899 printf("%s: unknown ISV media block type 0x%02x\n", 4900 sc->sc_dev.dv_xname, type); 4901 } 4902 } 4903 4904 /* 4905 * Deal with the case where no media is configured. 4906 */ 4907 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) { 4908 printf("%s: no media found!\n", sc->sc_dev.dv_xname); 4909 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 4910 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 4911 return; 4912 } 4913 4914 /* 4915 * Pick the default media. 4916 */ 4917 if (miidef != 0) 4918 defmedia = miidef; 4919 else { 4920 /* 4921 * XXX Pick a better default. Should come from SROM 4922 * XXX on 21140[A], and should be "auto" on 21142, 4923 * XXX 21143, and Macronix chips. 4924 */ 4925 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0); 4926 } 4927 4928 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4929 4930 /* 4931 * Display any non-MII media we've located. 4932 */ 4933 if (sc->sc_media_seen & 4934 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII))) 4935 tlp_print_media(sc); 4936 4937 tlp_sia_fixup(sc); 4938 } 4939 4940 void 4941 tlp_2114x_isv_tmsw_get(sc, ifmr) 4942 struct tulip_softc *sc; 4943 struct ifmediareq *ifmr; 4944 { 4945 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4946 struct tulip_21x4x_media *tm = ife->ifm_aux; 4947 4948 /* 4949 * We might be polling a non-MII autosense; check for that. 4950 */ 4951 if (tm == NULL) { 4952 #ifdef DIAGNOSTIC 4953 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4954 panic("tlp_2114x_isv_tmsw_get"); 4955 #endif 4956 tm = sc->sc_nway_active->ifm_aux; 4957 } 4958 4959 (*tm->tm_get)(sc, ifmr); 4960 } 4961 4962 int 4963 tlp_2114x_isv_tmsw_set(sc) 4964 struct tulip_softc *sc; 4965 { 4966 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4967 struct tulip_21x4x_media *tm = ife->ifm_aux; 4968 4969 /* 4970 * We might be setting a non-MII autosense; check for that. 4971 */ 4972 if (tm == NULL) { 4973 #ifdef DIAGNOSTIC 4974 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4975 panic("tlp_2114x_isv_tmsw_set"); 4976 #endif 4977 /* XXX XXX XXX */ 4978 } 4979 4980 /* 4981 * Check to see if we need to reset the chip, and do it. The 4982 * reset path will get the OPMODE register right the next 4983 * time through. 4984 */ 4985 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode)) 4986 return (tlp_init(&sc->sc_ethercom.ec_if)); 4987 4988 return ((*tm->tm_set)(sc)); 4989 } 4990 4991 /* 4992 * MII-on-SIO media switch. Handles only MII attached to the SIO. 4993 */ 4994 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 4995 4996 const struct tulip_mediasw tlp_sio_mii_mediasw = { 4997 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 4998 }; 4999 5000 void 5001 tlp_sio_mii_tmsw_init(sc) 5002 struct tulip_softc *sc; 5003 { 5004 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5005 5006 /* 5007 * We don't attach any media info structures to the ifmedia 5008 * entries, so if we're using a pre-init function that needs 5009 * that info, override it to one that doesn't. 5010 */ 5011 if (sc->sc_preinit == tlp_2114x_preinit) 5012 sc->sc_preinit = tlp_2114x_mii_preinit; 5013 5014 sc->sc_mii.mii_ifp = ifp; 5015 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5016 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5017 sc->sc_mii.mii_statchg = sc->sc_statchg; 5018 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5019 tlp_mediastatus); 5020 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5021 MII_OFFSET_ANY, 0); 5022 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5023 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5024 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5025 } else { 5026 sc->sc_flags |= TULIPF_HAS_MII; 5027 sc->sc_tick = tlp_mii_tick; 5028 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5029 } 5030 } 5031 5032 /* 5033 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 5034 */ 5035 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 5036 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 5037 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 5038 5039 const struct tulip_mediasw tlp_pnic_mediasw = { 5040 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 5041 }; 5042 5043 void tlp_pnic_nway_statchg __P((struct device *)); 5044 void tlp_pnic_nway_tick __P((void *)); 5045 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 5046 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 5047 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 5048 void tlp_pnic_nway_auto_timeout __P((void *)); 5049 void tlp_pnic_nway_status __P((struct tulip_softc *)); 5050 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 5051 5052 void 5053 tlp_pnic_tmsw_init(sc) 5054 struct tulip_softc *sc; 5055 { 5056 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5057 const char *sep = ""; 5058 5059 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 5060 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 5061 5062 sc->sc_mii.mii_ifp = ifp; 5063 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 5064 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 5065 sc->sc_mii.mii_statchg = sc->sc_statchg; 5066 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5067 tlp_mediastatus); 5068 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5069 MII_OFFSET_ANY, 0); 5070 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5071 /* XXX What about AUI/BNC support? */ 5072 printf("%s: ", sc->sc_dev.dv_xname); 5073 5074 tlp_pnic_nway_reset(sc); 5075 5076 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 5077 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 5078 PRINT("10baseT"); 5079 5080 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 5081 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 5082 PRINT("10baseT-FDX"); 5083 5084 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 5085 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 5086 PRINT("100baseTX"); 5087 5088 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 5089 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 5090 PNIC_NWAY_CAP100TXFDX); 5091 PRINT("100baseTX-FDX"); 5092 5093 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 5094 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 5095 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 5096 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 5097 PRINT("auto"); 5098 5099 printf("\n"); 5100 5101 sc->sc_statchg = tlp_pnic_nway_statchg; 5102 sc->sc_tick = tlp_pnic_nway_tick; 5103 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5104 } else { 5105 sc->sc_flags |= TULIPF_HAS_MII; 5106 sc->sc_tick = tlp_mii_tick; 5107 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5108 } 5109 5110 #undef ADD 5111 #undef PRINT 5112 } 5113 5114 void 5115 tlp_pnic_tmsw_get(sc, ifmr) 5116 struct tulip_softc *sc; 5117 struct ifmediareq *ifmr; 5118 { 5119 struct mii_data *mii = &sc->sc_mii; 5120 5121 if (sc->sc_flags & TULIPF_HAS_MII) 5122 tlp_mii_getmedia(sc, ifmr); 5123 else { 5124 mii->mii_media_status = 0; 5125 mii->mii_media_active = IFM_NONE; 5126 tlp_pnic_nway_service(sc, MII_POLLSTAT); 5127 ifmr->ifm_status = sc->sc_mii.mii_media_status; 5128 ifmr->ifm_active = sc->sc_mii.mii_media_active; 5129 } 5130 } 5131 5132 int 5133 tlp_pnic_tmsw_set(sc) 5134 struct tulip_softc *sc; 5135 { 5136 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5137 struct mii_data *mii = &sc->sc_mii; 5138 5139 if (sc->sc_flags & TULIPF_HAS_MII) { 5140 /* 5141 * Make sure the built-in Tx jabber timer is disabled. 5142 */ 5143 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 5144 5145 return (tlp_mii_setmedia(sc)); 5146 } 5147 5148 if (ifp->if_flags & IFF_UP) { 5149 mii->mii_media_status = 0; 5150 mii->mii_media_active = IFM_NONE; 5151 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 5152 } 5153 5154 return (0); 5155 } 5156 5157 void 5158 tlp_pnic_nway_statchg(self) 5159 struct device *self; 5160 { 5161 struct tulip_softc *sc = (struct tulip_softc *)self; 5162 5163 /* Idle the transmit and receive processes. */ 5164 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 5165 5166 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 5167 OPMODE_SCR|OPMODE_HBD); 5168 5169 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 5170 sc->sc_opmode |= OPMODE_TTM; 5171 TULIP_WRITE(sc, CSR_GPP, 5172 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 5173 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5174 } else { 5175 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD; 5176 TULIP_WRITE(sc, CSR_GPP, 5177 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 5178 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5179 } 5180 5181 if (sc->sc_mii.mii_media_active & IFM_FDX) 5182 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 5183 5184 /* 5185 * Write new OPMODE bits. This also restarts the transmit 5186 * and receive processes. 5187 */ 5188 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 5189 } 5190 5191 void 5192 tlp_pnic_nway_tick(arg) 5193 void *arg; 5194 { 5195 struct tulip_softc *sc = arg; 5196 int s; 5197 5198 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 5199 return; 5200 5201 s = splnet(); 5202 tlp_pnic_nway_service(sc, MII_TICK); 5203 splx(s); 5204 5205 callout_reset(&sc->sc_tick_callout, hz, tlp_pnic_nway_tick, sc); 5206 } 5207 5208 /* 5209 * Support for the Lite-On PNIC internal NWay block. This is constructed 5210 * somewhat like a PHY driver for simplicity. 5211 */ 5212 5213 int 5214 tlp_pnic_nway_service(sc, cmd) 5215 struct tulip_softc *sc; 5216 int cmd; 5217 { 5218 struct mii_data *mii = &sc->sc_mii; 5219 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5220 5221 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 5222 return (0); 5223 5224 switch (cmd) { 5225 case MII_POLLSTAT: 5226 /* Nothing special to do here. */ 5227 break; 5228 5229 case MII_MEDIACHG: 5230 switch (IFM_SUBTYPE(ife->ifm_media)) { 5231 case IFM_AUTO: 5232 (void) tlp_pnic_nway_auto(sc, 1); 5233 break; 5234 case IFM_100_T4: 5235 /* 5236 * XXX Not supported as a manual setting right now. 5237 */ 5238 return (EINVAL); 5239 default: 5240 /* 5241 * NWAY register data is stored in the ifmedia entry. 5242 */ 5243 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5244 } 5245 break; 5246 5247 case MII_TICK: 5248 /* 5249 * Only used for autonegotiation. 5250 */ 5251 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 5252 return (0); 5253 5254 /* 5255 * Check to see if we have link. If we do, we don't 5256 * need to restart the autonegotiation process. 5257 */ 5258 if (sc->sc_flags & TULIPF_LINK_UP) 5259 return (0); 5260 5261 /* 5262 * Only retry autonegotiation every 5 seconds. 5263 */ 5264 if (++sc->sc_nway_ticks != 5) 5265 return (0); 5266 5267 sc->sc_nway_ticks = 0; 5268 tlp_pnic_nway_reset(sc); 5269 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 5270 return (0); 5271 break; 5272 } 5273 5274 /* Update the media status. */ 5275 tlp_pnic_nway_status(sc); 5276 5277 /* Callback if something changed. */ 5278 if ((sc->sc_nway_active == NULL || 5279 sc->sc_nway_active->ifm_media != mii->mii_media_active) || 5280 cmd == MII_MEDIACHG) { 5281 (*sc->sc_statchg)(&sc->sc_dev); 5282 tlp_nway_activate(sc, mii->mii_media_active); 5283 } 5284 return (0); 5285 } 5286 5287 void 5288 tlp_pnic_nway_reset(sc) 5289 struct tulip_softc *sc; 5290 { 5291 5292 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 5293 delay(100); 5294 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 5295 } 5296 5297 int 5298 tlp_pnic_nway_auto(sc, waitfor) 5299 struct tulip_softc *sc; 5300 int waitfor; 5301 { 5302 struct mii_data *mii = &sc->sc_mii; 5303 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5304 u_int32_t reg; 5305 int i; 5306 5307 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 5308 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5309 5310 if (waitfor) { 5311 /* Wait 500ms for it to complete. */ 5312 for (i = 0; i < 500; i++) { 5313 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5314 if (reg & PNIC_NWAY_LPAR_MASK) { 5315 tlp_pnic_nway_acomp(sc); 5316 return (0); 5317 } 5318 delay(1000); 5319 } 5320 #if 0 5321 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5322 printf("%s: autonegotiation failed to complete\n", 5323 sc->sc_dev.dv_xname); 5324 #endif 5325 5326 /* 5327 * Don't need to worry about clearing DOINGAUTO. 5328 * If that's set, a timeout is pending, and it will 5329 * clear the flag. 5330 */ 5331 return (EIO); 5332 } 5333 5334 /* 5335 * Just let it finish asynchronously. This is for the benefit of 5336 * the tick handler driving autonegotiation. Don't want 500ms 5337 * delays all the time while the system is running! 5338 */ 5339 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 5340 sc->sc_flags |= TULIPF_DOINGAUTO; 5341 callout_reset(&sc->sc_nway_callout, hz >> 1, 5342 tlp_pnic_nway_auto_timeout, sc); 5343 } 5344 return (EJUSTRETURN); 5345 } 5346 5347 void 5348 tlp_pnic_nway_auto_timeout(arg) 5349 void *arg; 5350 { 5351 struct tulip_softc *sc = arg; 5352 u_int32_t reg; 5353 int s; 5354 5355 s = splnet(); 5356 sc->sc_flags &= ~TULIPF_DOINGAUTO; 5357 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5358 #if 0 5359 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5360 printf("%s: autonegotiation failed to complete\n", 5361 sc->sc_dev.dv_xname); 5362 #endif 5363 5364 tlp_pnic_nway_acomp(sc); 5365 5366 /* Update the media status. */ 5367 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 5368 splx(s); 5369 } 5370 5371 void 5372 tlp_pnic_nway_status(sc) 5373 struct tulip_softc *sc; 5374 { 5375 struct mii_data *mii = &sc->sc_mii; 5376 u_int32_t reg; 5377 5378 mii->mii_media_status = IFM_AVALID; 5379 mii->mii_media_active = IFM_ETHER; 5380 5381 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5382 5383 if (sc->sc_flags & TULIPF_LINK_UP) 5384 mii->mii_media_status |= IFM_ACTIVE; 5385 5386 if (reg & PNIC_NWAY_NW) { 5387 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 5388 /* Erg, still trying, I guess... */ 5389 mii->mii_media_active |= IFM_NONE; 5390 return; 5391 } 5392 5393 #if 0 5394 if (reg & PNIC_NWAY_LPAR100T4) 5395 mii->mii_media_active |= IFM_100_T4; 5396 else 5397 #endif 5398 if (reg & PNIC_NWAY_LPAR100TXFDX) 5399 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 5400 else if (reg & PNIC_NWAY_LPAR100TX) 5401 mii->mii_media_active |= IFM_100_TX; 5402 else if (reg & PNIC_NWAY_LPAR10TFDX) 5403 mii->mii_media_active |= IFM_10_T|IFM_FDX; 5404 else if (reg & PNIC_NWAY_LPAR10T) 5405 mii->mii_media_active |= IFM_10_T; 5406 else 5407 mii->mii_media_active |= IFM_NONE; 5408 } else { 5409 if (reg & PNIC_NWAY_100) 5410 mii->mii_media_active |= IFM_100_TX; 5411 else 5412 mii->mii_media_active |= IFM_10_T; 5413 if (reg & PNIC_NWAY_FD) 5414 mii->mii_media_active |= IFM_FDX; 5415 } 5416 } 5417 5418 void 5419 tlp_pnic_nway_acomp(sc) 5420 struct tulip_softc *sc; 5421 { 5422 u_int32_t reg; 5423 5424 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5425 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 5426 5427 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 5428 reg |= PNIC_NWAY_100; 5429 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 5430 reg |= PNIC_NWAY_FD; 5431 5432 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 5433 } 5434 5435 /* 5436 * Macronix PMAC and Lite-On PNIC-II media switch: 5437 * 5438 * MX98713 and MX98713A 21140-like MII or GPIO media. 5439 * 5440 * MX98713A 21143-like MII or SIA/SYM media. 5441 * 5442 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media. 5443 * 82C115, MX98715AEC-C, -E 5444 * 5445 * So, what we do here is fake MII-on-SIO or ISV media info, and 5446 * use the ISV media switch get/set functions to handle the rest. 5447 */ 5448 5449 void tlp_pmac_tmsw_init __P((struct tulip_softc *)); 5450 5451 const struct tulip_mediasw tlp_pmac_mediasw = { 5452 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 5453 }; 5454 5455 const struct tulip_mediasw tlp_pmac_mii_mediasw = { 5456 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5457 }; 5458 5459 void 5460 tlp_pmac_tmsw_init(sc) 5461 struct tulip_softc *sc; 5462 { 5463 static const u_int8_t media[] = { 5464 TULIP_ROM_MB_MEDIA_TP, 5465 TULIP_ROM_MB_MEDIA_TP_FDX, 5466 TULIP_ROM_MB_MEDIA_100TX, 5467 TULIP_ROM_MB_MEDIA_100TX_FDX, 5468 }; 5469 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5470 5471 sc->sc_mii.mii_ifp = ifp; 5472 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5473 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5474 sc->sc_mii.mii_statchg = sc->sc_statchg; 5475 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5476 tlp_mediastatus); 5477 if (sc->sc_chip == TULIP_CHIP_MX98713 || 5478 sc->sc_chip == TULIP_CHIP_MX98713A) { 5479 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 5480 MII_PHY_ANY, MII_OFFSET_ANY, 0); 5481 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) { 5482 sc->sc_flags |= TULIPF_HAS_MII; 5483 sc->sc_tick = tlp_mii_tick; 5484 sc->sc_preinit = tlp_2114x_mii_preinit; 5485 sc->sc_mediasw = &tlp_pmac_mii_mediasw; 5486 ifmedia_set(&sc->sc_mii.mii_media, 5487 IFM_ETHER|IFM_AUTO); 5488 return; 5489 } 5490 } 5491 5492 switch (sc->sc_chip) { 5493 case TULIP_CHIP_MX98713: 5494 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR, 5495 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4); 5496 5497 /* 5498 * XXX Should implement auto-sense for this someday, 5499 * XXX when we do the same for the 21140. 5500 */ 5501 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5502 break; 5503 5504 default: 5505 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA, 5506 tlp_sia_get, tlp_sia_set, media, 2); 5507 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM, 5508 tlp_sia_get, tlp_sia_set, media + 2, 2); 5509 5510 /* 5511 * XXX Autonegotiation not yet supported. 5512 */ 5513 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5514 break; 5515 } 5516 5517 tlp_print_media(sc); 5518 tlp_sia_fixup(sc); 5519 5520 /* Set the LED modes. */ 5521 tlp_pmac_reset(sc); 5522 5523 sc->sc_reset = tlp_pmac_reset; 5524 } 5525 5526 /* 5527 * ADMtek AL981 media switch. Only has internal PHY. 5528 */ 5529 void tlp_al981_tmsw_init __P((struct tulip_softc *)); 5530 5531 const struct tulip_mediasw tlp_al981_mediasw = { 5532 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5533 }; 5534 5535 void 5536 tlp_al981_tmsw_init(sc) 5537 struct tulip_softc *sc; 5538 { 5539 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5540 5541 sc->sc_mii.mii_ifp = ifp; 5542 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg; 5543 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg; 5544 sc->sc_mii.mii_statchg = sc->sc_statchg; 5545 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5546 tlp_mediastatus); 5547 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5548 MII_OFFSET_ANY, 0); 5549 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5550 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5551 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5552 } else { 5553 sc->sc_flags |= TULIPF_HAS_MII; 5554 sc->sc_tick = tlp_mii_tick; 5555 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5556 } 5557 } 5558 5559 /* 5560 * Davicom DM9102 media switch. Internal PHY and possibly HomePNA. 5561 */ 5562 void tlp_dm9102_tmsw_init __P((struct tulip_softc *)); 5563 void tlp_dm9102_tmsw_getmedia __P((struct tulip_softc *, 5564 struct ifmediareq *)); 5565 int tlp_dm9102_tmsw_setmedia __P((struct tulip_softc *)); 5566 5567 const struct tulip_mediasw tlp_dm9102_mediasw = { 5568 tlp_dm9102_tmsw_init, tlp_dm9102_tmsw_getmedia, 5569 tlp_dm9102_tmsw_setmedia 5570 }; 5571 5572 void 5573 tlp_dm9102_tmsw_init(sc) 5574 struct tulip_softc *sc; 5575 { 5576 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5577 u_int32_t opmode; 5578 5579 sc->sc_mii.mii_ifp = ifp; 5580 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5581 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5582 sc->sc_mii.mii_statchg = sc->sc_statchg; 5583 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5584 tlp_mediastatus); 5585 5586 /* PHY block already reset via tlp_reset(). */ 5587 5588 /* 5589 * Configure OPMODE properly for the internal MII interface. 5590 */ 5591 switch (sc->sc_chip) { 5592 case TULIP_CHIP_DM9102: 5593 opmode = OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 5594 break; 5595 5596 case TULIP_CHIP_DM9102A: 5597 opmode = OPMODE_MBO|OPMODE_HBD; 5598 break; 5599 5600 default: 5601 /* Nothing. */ 5602 } 5603 5604 TULIP_WRITE(sc, CSR_OPMODE, opmode); 5605 5606 /* Now, probe the internal MII for the internal PHY. */ 5607 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5608 MII_OFFSET_ANY, 0); 5609 5610 /* 5611 * XXX Figure out what to do about the HomePNA portion 5612 * XXX of the DM9102A. 5613 */ 5614 5615 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5616 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5617 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5618 } else { 5619 sc->sc_flags |= TULIPF_HAS_MII; 5620 sc->sc_tick = tlp_mii_tick; 5621 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5622 } 5623 } 5624 5625 void 5626 tlp_dm9102_tmsw_getmedia(sc, ifmr) 5627 struct tulip_softc *sc; 5628 struct ifmediareq *ifmr; 5629 { 5630 5631 /* XXX HomePNA on DM9102A. */ 5632 tlp_mii_getmedia(sc, ifmr); 5633 } 5634 5635 int 5636 tlp_dm9102_tmsw_setmedia(sc) 5637 struct tulip_softc *sc; 5638 { 5639 5640 /* XXX HomePNA on DM9102A. */ 5641 return (tlp_mii_setmedia(sc)); 5642 } 5643
Indexes created Fri Sep 26 08:10:20 GMT 2025