tulip.c revision 1.9
1 /* $NetBSD: tulip.c,v 1.9 1999/09/14 22:25:50 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <vm/vm.h> /* for PAGE_SIZE */ 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #endif 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/if_inarp.h> 73 #endif 74 75 #ifdef NS 76 #include <netns/ns.h> 77 #include <netns/ns_if.h> 78 #endif 79 80 #include <machine/bus.h> 81 #include <machine/intr.h> 82 83 #include <dev/mii/mii.h> 84 #include <dev/mii/miivar.h> 85 86 #include <dev/ic/tulipreg.h> 87 #include <dev/ic/tulipvar.h> 88 89 /* 90 * The following tables compute the transmit threshold mode. We start 91 * at index 0. When ever we get a transmit underrun, we increment our 92 * index, falling back if we encounter the NULL terminator. 93 * 94 * Note: Store and forward mode is only available on the 100mbps chips 95 * (21140 and higher). 96 */ 97 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = { 98 { OPMODE_TR_72, "72 bytes" }, 99 { OPMODE_TR_96, "96 bytes" }, 100 { OPMODE_TR_128, "128 bytes" }, 101 { OPMODE_TR_160, "160 bytes" }, 102 { 0, NULL }, 103 }; 104 105 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = { 106 { OPMODE_TR_72, "72/128 bytes" }, 107 { OPMODE_TR_96, "96/256 bytes" }, 108 { OPMODE_TR_128, "128/512 bytes" }, 109 { OPMODE_TR_160, "160/1024 bytes" }, 110 { OPMODE_SF, "store and forward mode" }, 111 { 0, NULL }, 112 }; 113 114 #define TXTH_72 0 115 #define TXTH_96 1 116 #define TXTH_128 2 117 #define TXTH_160 3 118 #define TXTH_SF 4 119 120 /* 121 * The Winbond 89C840F does transmit threshold control totally 122 * differently. It simply has a 7-bit field which indicates 123 * the threshold: 124 * 125 * txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16; 126 * 127 * However, we just do Store-and-Forward mode on these chips, since 128 * the DMA engines seem to be flaky. 129 */ 130 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = { 131 { 0, "store and forward mode" }, 132 { 0, NULL }, 133 }; 134 135 #define TXTH_WINB_SF 0 136 137 void tlp_start __P((struct ifnet *)); 138 void tlp_watchdog __P((struct ifnet *)); 139 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 140 141 void tlp_shutdown __P((void *)); 142 143 void tlp_reset __P((struct tulip_softc *)); 144 int tlp_init __P((struct tulip_softc *)); 145 void tlp_rxdrain __P((struct tulip_softc *)); 146 void tlp_stop __P((struct tulip_softc *, int)); 147 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 148 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 149 void tlp_srom_idle __P((struct tulip_softc *)); 150 151 void tlp_filter_setup __P((struct tulip_softc *)); 152 void tlp_winb_filter_setup __P((struct tulip_softc *)); 153 154 void tlp_rxintr __P((struct tulip_softc *)); 155 void tlp_txintr __P((struct tulip_softc *)); 156 157 void tlp_mii_tick __P((void *)); 158 void tlp_mii_statchg __P((struct device *)); 159 void tlp_winb_mii_statchg __P((struct device *)); 160 161 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 162 int tlp_mii_setmedia __P((struct tulip_softc *)); 163 164 void tlp_sio_mii_sync __P((struct tulip_softc *)); 165 void tlp_sio_mii_sendbits __P((struct tulip_softc *, u_int32_t, int)); 166 int tlp_sio_mii_readreg __P((struct device *, int, int)); 167 void tlp_sio_mii_writereg __P((struct device *, int, int, int)); 168 169 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 170 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 171 172 u_int32_t tlp_crc32 __P((const u_int8_t *, size_t)); 173 #define tlp_mchash(addr) (tlp_crc32((addr), ETHER_ADDR_LEN) & \ 174 (TULIP_MCHASHSIZE - 1)) 175 176 #ifdef TLP_DEBUG 177 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 178 printf x 179 #else 180 #define DPRINTF(sc, x) /* nothing */ 181 #endif 182 183 /* 184 * tlp_attach: 185 * 186 * Attach a Tulip interface to the system. 187 */ 188 void 189 tlp_attach(sc, enaddr) 190 struct tulip_softc *sc; 191 const u_int8_t *enaddr; 192 { 193 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 194 int i, rseg, error; 195 bus_dma_segment_t seg; 196 197 /* 198 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 199 */ 200 201 /* 202 * Setup the transmit threshold table. 203 */ 204 switch (sc->sc_chip) { 205 case TULIP_CHIP_DE425: 206 case TULIP_CHIP_21040: 207 case TULIP_CHIP_21041: 208 sc->sc_txth = tlp_10_txthresh_tab; 209 break; 210 211 default: 212 sc->sc_txth = tlp_10_100_txthresh_tab; 213 break; 214 } 215 216 /* 217 * Setup the filter setup function. 218 */ 219 switch (sc->sc_chip) { 220 case TULIP_CHIP_WB89C840F: 221 sc->sc_filter_setup = tlp_winb_filter_setup; 222 break; 223 224 default: 225 sc->sc_filter_setup = tlp_filter_setup; 226 break; 227 } 228 229 /* 230 * Set up the media status change function. 231 */ 232 switch (sc->sc_chip) { 233 case TULIP_CHIP_WB89C840F: 234 sc->sc_statchg = tlp_winb_mii_statchg; 235 break; 236 237 default: 238 /* 239 * We may override this if we have special media 240 * handling requirements (e.g. flipping GPIO pins). 241 * 242 * The pure-MII statchg function covers the basics. 243 */ 244 sc->sc_statchg = tlp_mii_statchg; 245 break; 246 } 247 248 /* 249 * Set up various chip-specific quirks. 250 */ 251 switch (sc->sc_chip) { 252 case TULIP_CHIP_82C168: 253 case TULIP_CHIP_82C169: 254 /* 255 * These chips seem to have busted DMA engines; just put them 256 * in Store-and-Forward mode from the get-go. 257 */ 258 sc->sc_txthresh = TXTH_SF; 259 break; 260 261 case TULIP_CHIP_WB89C840F: 262 sc->sc_flags |= TULIPF_IC_FS; 263 break; 264 265 default: 266 /* Nothing. */ 267 } 268 269 SIMPLEQ_INIT(&sc->sc_txfreeq); 270 SIMPLEQ_INIT(&sc->sc_txdirtyq); 271 272 /* 273 * Allocate the control data structures, and create and load the 274 * DMA map for it. 275 */ 276 if ((error = bus_dmamem_alloc(sc->sc_dmat, 277 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &seg, 1, &rseg, 278 0)) != 0) { 279 printf("%s: unable to allocate control data, error = %d\n", 280 sc->sc_dev.dv_xname, error); 281 goto fail_0; 282 } 283 284 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 285 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 286 BUS_DMA_COHERENT)) != 0) { 287 printf("%s: unable to map control data, error = %d\n", 288 sc->sc_dev.dv_xname, error); 289 goto fail_1; 290 } 291 292 if ((error = bus_dmamap_create(sc->sc_dmat, 293 sizeof(struct tulip_control_data), 1, 294 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 295 printf("%s: unable to create control data DMA map, " 296 "error = %d\n", sc->sc_dev.dv_xname, error); 297 goto fail_2; 298 } 299 300 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 301 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 302 0)) != 0) { 303 printf("%s: unable to load control data DMA map, error = %d\n", 304 sc->sc_dev.dv_xname, error); 305 goto fail_3; 306 } 307 308 /* 309 * Create the transmit buffer DMA maps. 310 */ 311 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 312 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 313 TULIP_NTXSEGS, MCLBYTES, 0, 0, 314 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 315 printf("%s: unable to create tx DMA map %d, " 316 "error = %d\n", sc->sc_dev.dv_xname, i, error); 317 goto fail_4; 318 } 319 } 320 321 /* 322 * Create the recieve buffer DMA maps. 323 */ 324 for (i = 0; i < TULIP_NRXDESC; i++) { 325 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 326 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 327 printf("%s: unable to create rx DMA map %d, " 328 "error = %d\n", sc->sc_dev.dv_xname, i, error); 329 goto fail_5; 330 } 331 sc->sc_rxsoft[i].rxs_mbuf = NULL; 332 } 333 334 /* 335 * Reset the chip to a known state. 336 */ 337 tlp_reset(sc); 338 339 /* Announce ourselves. */ 340 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 341 sc->sc_name[0] != '\0' ? sc->sc_name : "", 342 sc->sc_name[0] != '\0' ? ", " : "", 343 ether_sprintf(enaddr)); 344 345 /* 346 * Initialize our media structures. This may probe the MII, if 347 * present. 348 */ 349 (*sc->sc_mediasw->tmsw_init)(sc); 350 351 ifp = &sc->sc_ethercom.ec_if; 352 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 353 ifp->if_softc = sc; 354 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 355 ifp->if_ioctl = tlp_ioctl; 356 ifp->if_start = tlp_start; 357 ifp->if_watchdog = tlp_watchdog; 358 359 /* 360 * Attach the interface. 361 */ 362 if_attach(ifp); 363 ether_ifattach(ifp, enaddr); 364 #if NBPFILTER > 0 365 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 366 sizeof(struct ether_header)); 367 #endif 368 369 /* 370 * Make sure the interface is shutdown during reboot. 371 */ 372 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 373 if (sc->sc_sdhook == NULL) 374 printf("%s: WARNING: unable to establish shutdown hook\n", 375 sc->sc_dev.dv_xname); 376 return; 377 378 /* 379 * Free any resources we've allocated during the failed attach 380 * attempt. Do this in reverse order and fall through. 381 */ 382 fail_5: 383 for (i = 0; i < TULIP_NRXDESC; i++) { 384 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 385 bus_dmamap_destroy(sc->sc_dmat, 386 sc->sc_rxsoft[i].rxs_dmamap); 387 } 388 fail_4: 389 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 390 if (sc->sc_txsoft[i].txs_dmamap != NULL) 391 bus_dmamap_destroy(sc->sc_dmat, 392 sc->sc_txsoft[i].txs_dmamap); 393 } 394 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 395 fail_3: 396 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 397 fail_2: 398 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 399 sizeof(struct tulip_control_data)); 400 fail_1: 401 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 402 fail_0: 403 return; 404 } 405 406 /* 407 * tlp_shutdown: 408 * 409 * Make sure the interface is stopped at reboot time. 410 */ 411 void 412 tlp_shutdown(arg) 413 void *arg; 414 { 415 struct tulip_softc *sc = arg; 416 417 tlp_stop(sc, 1); 418 } 419 420 /* 421 * tlp_start: [ifnet interface function] 422 * 423 * Start packet transmission on the interface. 424 */ 425 void 426 tlp_start(ifp) 427 struct ifnet *ifp; 428 { 429 struct tulip_softc *sc = ifp->if_softc; 430 struct mbuf *m0, *m; 431 struct tulip_txsoft *txs, *last_txs; 432 bus_dmamap_t dmamap; 433 int error, firsttx, nexttx, lasttx, ofree, seg; 434 435 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 436 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 437 438 /* 439 * If we want a filter setup, it means no more descriptors were 440 * available for the setup routine. Let it get a chance to wedge 441 * itself into the ring. 442 */ 443 if (sc->sc_flags & TULIPF_WANT_SETUP) 444 ifp->if_flags |= IFF_OACTIVE; 445 446 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 447 return; 448 449 /* 450 * Remember the previous number of free descriptors and 451 * the first descriptor we'll use. 452 */ 453 ofree = sc->sc_txfree; 454 firsttx = sc->sc_txnext; 455 456 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 457 sc->sc_dev.dv_xname, ofree, firsttx)); 458 459 /* 460 * Loop through the send queue, setting up transmit descriptors 461 * until we drain the queue, or use up all available transmit 462 * descriptors. 463 */ 464 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 465 sc->sc_txfree != 0) { 466 /* 467 * Grab a packet off the queue. 468 */ 469 IF_DEQUEUE(&ifp->if_snd, m0); 470 if (m0 == NULL) 471 break; 472 473 dmamap = txs->txs_dmamap; 474 475 /* 476 * Load the DMA map. If this fails, the packet either 477 * didn't fit in the alloted number of segments, or we were 478 * short on resources. In this case, we'll copy and try 479 * again. 480 */ 481 if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 482 BUS_DMA_NOWAIT) != 0) { 483 MGETHDR(m, M_DONTWAIT, MT_DATA); 484 if (m == NULL) { 485 printf("%s: unable to allocate Tx mbuf\n", 486 sc->sc_dev.dv_xname); 487 IF_PREPEND(&ifp->if_snd, m0); 488 break; 489 } 490 if (m0->m_pkthdr.len > MHLEN) { 491 MCLGET(m, M_DONTWAIT); 492 if ((m->m_flags & M_EXT) == 0) { 493 printf("%s: unable to allocate Tx " 494 "cluster\n", sc->sc_dev.dv_xname); 495 m_freem(m); 496 IF_PREPEND(&ifp->if_snd, m0); 497 break; 498 } 499 } 500 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 501 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 502 m_freem(m0); 503 m0 = m; 504 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 505 m0, BUS_DMA_NOWAIT); 506 if (error) { 507 printf("%s: unable to load Tx buffer, " 508 "error = %d\n", sc->sc_dev.dv_xname, error); 509 IF_PREPEND(&ifp->if_snd, m0); 510 break; 511 } 512 } 513 514 /* 515 * Ensure we have enough descriptors free to describe 516 * the packet. 517 */ 518 if (dmamap->dm_nsegs > sc->sc_txfree) { 519 /* 520 * Not enough free descriptors to transmit this 521 * packet. We haven't committed to anything yet, 522 * so just unload the DMA map, put the packet 523 * back on the queue, and punt. Notify the upper 524 * layer that there are no more slots left. 525 * 526 * XXX We could allocate an mbuf and copy, but 527 * XXX it is worth it? 528 */ 529 ifp->if_flags |= IFF_OACTIVE; 530 bus_dmamap_unload(sc->sc_dmat, dmamap); 531 IF_PREPEND(&ifp->if_snd, m0); 532 break; 533 } 534 535 /* 536 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 537 */ 538 539 /* Sync the DMA map. */ 540 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 541 BUS_DMASYNC_PREWRITE); 542 543 /* 544 * Initialize the transmit descriptors. 545 */ 546 for (nexttx = sc->sc_txnext, seg = 0; 547 seg < dmamap->dm_nsegs; 548 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 549 /* 550 * If this is the first descriptor we're 551 * enqueueing, don't set the OWN bit just 552 * yet. That could cause a race condition. 553 * We'll do it below. 554 */ 555 sc->sc_txdescs[nexttx].td_status = 556 (nexttx == firsttx) ? 0 : TDSTAT_OWN; 557 sc->sc_txdescs[nexttx].td_bufaddr1 = 558 dmamap->dm_segs[seg].ds_addr; 559 sc->sc_txdescs[nexttx].td_ctl = 560 (dmamap->dm_segs[seg].ds_len << TDCTL_SIZE1_SHIFT) | 561 TDCTL_CH; 562 lasttx = nexttx; 563 } 564 565 /* Set `first segment' and `last segment' appropriately. */ 566 sc->sc_txdescs[sc->sc_txnext].td_ctl |= TDCTL_Tx_FS; 567 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_LS; 568 569 #ifdef TLP_DEBUG 570 if (ifp->if_flags & IFF_DEBUG) { 571 printf(" txsoft %p trainsmit chain:\n", txs); 572 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 573 printf(" descriptor %d:\n", seg); 574 printf(" td_status: 0x%08x\n", 575 sc->sc_txdescs[seg].td_status); 576 printf(" td_ctl: 0x%08x\n", 577 sc->sc_txdescs[seg].td_ctl); 578 printf(" td_bufaddr1: 0x%08x\n", 579 sc->sc_txdescs[seg].td_bufaddr1); 580 printf(" td_bufaddr2: 0x%08x\n", 581 sc->sc_txdescs[seg].td_bufaddr2); 582 if (seg == lasttx) 583 break; 584 } 585 } 586 #endif 587 588 /* Sync the descriptors we're using. */ 589 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 590 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 591 592 /* 593 * Store a pointer to the packet so we can free it later, 594 * and remember what txdirty will be once the packet is 595 * done. 596 */ 597 txs->txs_mbuf = m0; 598 txs->txs_firstdesc = sc->sc_txnext; 599 txs->txs_lastdesc = lasttx; 600 601 /* Advance the tx pointer. */ 602 sc->sc_txfree -= dmamap->dm_nsegs; 603 sc->sc_txnext = nexttx; 604 605 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 606 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 607 608 last_txs = txs; 609 610 #if NBPFILTER > 0 611 /* 612 * Pass the packet to any BPF listeners. 613 */ 614 if (ifp->if_bpf) 615 bpf_mtap(ifp->if_bpf, m0); 616 #endif /* NBPFILTER > 0 */ 617 } 618 619 if (txs == NULL || sc->sc_txfree == 0) { 620 /* No more slots left; notify upper layer. */ 621 ifp->if_flags |= IFF_OACTIVE; 622 } 623 624 if (sc->sc_txfree != ofree) { 625 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 626 sc->sc_dev.dv_xname, lasttx, firsttx)); 627 /* 628 * Cause a transmit interrupt to happen on the 629 * last packet we enqueued. 630 */ 631 sc->sc_txdescs[lasttx].td_ctl |= TDCTL_Tx_IC; 632 TULIP_CDTXSYNC(sc, lasttx, 1, 633 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 634 635 /* 636 * Some clone chips want IC on the *first* segment in 637 * the packet. Appease them. 638 */ 639 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 640 last_txs->txs_firstdesc != lasttx) { 641 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 642 TDCTL_Tx_IC; 643 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 644 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 645 } 646 647 /* 648 * The entire packet chain is set up. Give the 649 * first descriptor to the chip now. 650 */ 651 sc->sc_txdescs[firsttx].td_status |= TDSTAT_OWN; 652 TULIP_CDTXSYNC(sc, firsttx, 1, 653 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 654 655 /* Wake up the transmitter. */ 656 /* XXX USE AUTOPOLLING? */ 657 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 658 659 /* Set a watchdog timer in case the chip flakes out. */ 660 ifp->if_timer = 5; 661 } 662 } 663 664 /* 665 * tlp_watchdog: [ifnet interface function] 666 * 667 * Watchdog timer handler. 668 */ 669 void 670 tlp_watchdog(ifp) 671 struct ifnet *ifp; 672 { 673 struct tulip_softc *sc = ifp->if_softc; 674 int doing_setup, doing_transmit; 675 676 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 677 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 678 679 if (doing_setup && doing_transmit) { 680 printf("%s: filter setup and transmit timeout\n", 681 sc->sc_dev.dv_xname); 682 ifp->if_oerrors++; 683 } else if (doing_transmit) { 684 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 685 ifp->if_oerrors++; 686 } else if (doing_setup) 687 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 688 else 689 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 690 691 (void) tlp_init(sc); 692 693 /* Try to get more packets going. */ 694 tlp_start(ifp); 695 } 696 697 /* 698 * tlp_ioctl: [ifnet interface function] 699 * 700 * Handle control requests from the operator. 701 */ 702 int 703 tlp_ioctl(ifp, cmd, data) 704 struct ifnet *ifp; 705 u_long cmd; 706 caddr_t data; 707 { 708 struct tulip_softc *sc = ifp->if_softc; 709 struct ifreq *ifr = (struct ifreq *)data; 710 struct ifaddr *ifa = (struct ifaddr *)data; 711 int s, error = 0; 712 713 s = splnet(); 714 715 switch (cmd) { 716 case SIOCSIFADDR: 717 ifp->if_flags |= IFF_UP; 718 719 switch (ifa->ifa_addr->sa_family) { 720 #ifdef INET 721 case AF_INET: 722 if ((error = tlp_init(sc)) != 0) 723 break; 724 arp_ifinit(ifp, ifa); 725 break; 726 #endif /* INET */ 727 #ifdef NS 728 case AF_NS: 729 { 730 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 731 732 if (ns_nullhost(*ina)) 733 ina->x_host = *(union ns_host *) 734 LLADDR(ifp->if_sadl); 735 else 736 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 737 ifp->if_addrlen); 738 /* Set new address. */ 739 error = tlp_init(sc); 740 break; 741 } 742 #endif /* NS */ 743 default: 744 error = tlp_init(sc); 745 break; 746 } 747 break; 748 749 case SIOCSIFMTU: 750 if (ifr->ifr_mtu > ETHERMTU) 751 error = EINVAL; 752 else 753 ifp->if_mtu = ifr->ifr_mtu; 754 break; 755 756 case SIOCSIFFLAGS: 757 if ((ifp->if_flags & IFF_UP) == 0 && 758 (ifp->if_flags & IFF_RUNNING) != 0) { 759 /* 760 * If interface is marked down and it is running, then 761 * stop it. 762 */ 763 tlp_stop(sc, 1); 764 } else if ((ifp->if_flags & IFF_UP) != 0 && 765 (ifp->if_flags & IFF_RUNNING) == 0) { 766 /* 767 * If interfase it marked up and it is stopped, then 768 * start it. 769 */ 770 error = tlp_init(sc); 771 } else if ((ifp->if_flags & IFF_UP) != 0) { 772 /* 773 * Reset the interface to pick up changes in any other 774 * flags that affect the hardware state. 775 */ 776 error = tlp_init(sc); 777 } 778 break; 779 780 case SIOCADDMULTI: 781 case SIOCDELMULTI: 782 error = (cmd == SIOCADDMULTI) ? 783 ether_addmulti(ifr, &sc->sc_ethercom) : 784 ether_delmulti(ifr, &sc->sc_ethercom); 785 786 if (error == ENETRESET) { 787 /* 788 * Multicast list has changed. Set the filter 789 * accordingly. 790 */ 791 (*sc->sc_filter_setup)(sc); 792 error = 0; 793 } 794 break; 795 796 case SIOCSIFMEDIA: 797 case SIOCGIFMEDIA: 798 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 799 break; 800 801 default: 802 error = EINVAL; 803 break; 804 } 805 806 /* Try to get more packets going. */ 807 tlp_start(ifp); 808 809 splx(s); 810 return (error); 811 } 812 813 /* 814 * tlp_intr: 815 * 816 * Interrupt service routine. 817 */ 818 int 819 tlp_intr(arg) 820 void *arg; 821 { 822 struct tulip_softc *sc = arg; 823 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 824 u_int32_t status, rxstatus, txstatus; 825 int handled = 0, txthresh; 826 827 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 828 829 for (;;) { 830 status = TULIP_READ(sc, CSR_STATUS); 831 if (status) 832 TULIP_WRITE(sc, CSR_STATUS, status); 833 834 if ((status & sc->sc_inten) == 0) 835 break; 836 837 handled = 1; 838 839 rxstatus = status & sc->sc_rxint_mask; 840 txstatus = status & sc->sc_txint_mask; 841 842 if (rxstatus) { 843 /* Grab new any new packets. */ 844 tlp_rxintr(sc); 845 846 if (rxstatus & STATUS_RWT) 847 printf("%s: receive watchdog timeout\n", 848 sc->sc_dev.dv_xname); 849 850 if (rxstatus & STATUS_RU) { 851 printf("%s: receive ring overrun\n", 852 sc->sc_dev.dv_xname); 853 /* Get the receive process going again. */ 854 tlp_idle(sc, OPMODE_SR); 855 TULIP_WRITE(sc, CSR_RXLIST, 856 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 857 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 858 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 859 break; 860 } 861 } 862 863 if (txstatus) { 864 /* Sweep up transmit descriptors. */ 865 tlp_txintr(sc); 866 867 if (txstatus & STATUS_TJT) 868 printf("%s: transmit jabber timeout\n", 869 sc->sc_dev.dv_xname); 870 871 if (txstatus & STATUS_UNF) { 872 /* 873 * Increase our transmit threshold if 874 * another is available. 875 */ 876 txthresh = sc->sc_txthresh + 1; 877 if (sc->sc_txth[txthresh].txth_name != NULL) { 878 /* Idle the transmit process. */ 879 tlp_idle(sc, OPMODE_ST); 880 881 sc->sc_txthresh = txthresh; 882 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 883 sc->sc_opmode |= 884 sc->sc_txth[txthresh].txth_opmode; 885 printf("%s: transmit underrun; new " 886 "threshold: %s\n", 887 sc->sc_dev.dv_xname, 888 sc->sc_txth[txthresh].txth_name); 889 890 /* 891 * Set the new threshold and restart 892 * the transmit process. 893 */ 894 TULIP_WRITE(sc, CSR_OPMODE, 895 sc->sc_opmode); 896 } 897 /* 898 * XXX Log every Nth underrun from 899 * XXX now on? 900 */ 901 } 902 } 903 904 if (status & (STATUS_TPS|STATUS_RPS)) { 905 if (status & STATUS_TPS) 906 printf("%s: transmit process stopped\n", 907 sc->sc_dev.dv_xname); 908 if (status & STATUS_RPS) 909 printf("%s: receive process stopped\n", 910 sc->sc_dev.dv_xname); 911 (void) tlp_init(sc); 912 break; 913 } 914 915 if (status & STATUS_SE) { 916 const char *str; 917 switch (status & STATUS_EB) { 918 case STATUS_EB_PARITY: 919 str = "parity error"; 920 break; 921 922 case STATUS_EB_MABT: 923 str = "master abort"; 924 break; 925 926 case STATUS_EB_TABT: 927 str = "target abort"; 928 break; 929 930 default: 931 str = "unknown error"; 932 break; 933 } 934 printf("%s: fatal system error: %s\n", 935 sc->sc_dev.dv_xname, str); 936 (void) tlp_init(sc); 937 break; 938 } 939 940 /* 941 * Not handled: 942 * 943 * Transmit buffer unavailable -- normal 944 * condition, nothing to do, really. 945 * 946 * General purpose timer experied -- we don't 947 * use the general purpose timer. 948 * 949 * Early receive interrupt -- not available on 950 * all chips, we just use RI. We also only 951 * use single-segment receive DMA, so this 952 * is mostly useless. 953 */ 954 } 955 956 /* Try to get more packets going. */ 957 tlp_start(ifp); 958 959 return (handled); 960 } 961 962 /* 963 * tlp_rxintr: 964 * 965 * Helper; handle receive interrupts. 966 */ 967 void 968 tlp_rxintr(sc) 969 struct tulip_softc *sc; 970 { 971 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 972 struct ether_header *eh; 973 struct tulip_rxsoft *rxs; 974 struct mbuf *m; 975 u_int32_t rxstat; 976 int i, len; 977 978 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 979 rxs = &sc->sc_rxsoft[i]; 980 981 TULIP_CDRXSYNC(sc, i, 982 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 983 984 rxstat = sc->sc_rxdescs[i].td_status; 985 986 if (rxstat & TDSTAT_OWN) { 987 /* 988 * We have processed all of the receive buffers. 989 */ 990 break; 991 } 992 993 /* 994 * Make sure the packet fit in one buffer. This should 995 * always be the case. But the Lite-On PNIC, rev 33 996 * has an awful receive engine bug, which may require 997 * a very icky work-around. 998 */ 999 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1000 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1001 printf("%s: incoming packet spilled, resetting\n", 1002 sc->sc_dev.dv_xname); 1003 (void) tlp_init(sc); 1004 return; 1005 } 1006 1007 /* 1008 * If any collisions were seen on the wire, count one. 1009 */ 1010 if (rxstat & TDSTAT_Rx_CS) 1011 ifp->if_collisions++; 1012 1013 /* 1014 * If an error occured, update stats, clear the status 1015 * word, and leave the packet buffer in place. It will 1016 * simply be reused the next time the ring comes around. 1017 */ 1018 if (rxstat & TDSTAT_ES) { 1019 #define PRINTERR(bit, str) \ 1020 if (rxstat & (bit)) \ 1021 printf("%s: receive error: %s\n", \ 1022 sc->sc_dev.dv_xname, str) 1023 ifp->if_ierrors++; 1024 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1025 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1026 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1027 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1028 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1029 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1030 #undef PRINTERR 1031 TULIP_INIT_RXDESC(sc, i); 1032 continue; 1033 } 1034 1035 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1036 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1037 1038 /* 1039 * No errors; receive the packet. Note the Tulip 1040 * includes the CRC with every packet; trim it. 1041 */ 1042 len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN; 1043 1044 #ifdef __NO_STRICT_ALIGNMENT 1045 /* 1046 * Allocate a new mbuf cluster. If that fails, we are 1047 * out of memory, and must drop the packet and recycle 1048 * the buffer that's already attached to this descriptor. 1049 */ 1050 m = rxs->rxs_mbuf; 1051 if (tlp_add_rxbuf(sc, i) != 0) { 1052 ifp->if_ierrors++; 1053 TULIP_INIT_RXDESC(sc, i); 1054 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1055 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1056 continue; 1057 } 1058 #else 1059 /* 1060 * The Tulip's receive buffers must be 4-byte aligned. 1061 * But this means that the data after the Ethernet header 1062 * is misaligned. We must allocate a new buffer and 1063 * copy the data, shifted forward 2 bytes. 1064 */ 1065 MGETHDR(m, M_DONTWAIT, MT_DATA); 1066 if (m == NULL) { 1067 dropit: 1068 ifp->if_ierrors++; 1069 TULIP_INIT_RXDESC(sc, i); 1070 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1071 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1072 continue; 1073 } 1074 if (len > (MHLEN - 2)) { 1075 MCLGET(m, M_DONTWAIT); 1076 if ((m->m_flags & M_EXT) == 0) { 1077 m_freem(m); 1078 goto dropit; 1079 } 1080 } 1081 m->m_data += 2; 1082 1083 /* 1084 * Note that we use clusters for incoming frames, so the 1085 * buffer is virtually contiguous. 1086 */ 1087 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1088 1089 /* Allow the receive descriptor to continue using its mbuf. */ 1090 TULIP_INIT_RXDESC(sc, i); 1091 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1092 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1093 #endif /* __NO_STRICT_ALIGNMENT */ 1094 1095 ifp->if_ipackets++; 1096 eh = mtod(m, struct ether_header *); 1097 m->m_pkthdr.rcvif = ifp; 1098 m->m_pkthdr.len = m->m_len = len; 1099 1100 #if NBPFILTER > 0 1101 /* 1102 * Pass this up to any BPF listeners, but only 1103 * pass it up the stack if its for us. 1104 */ 1105 if (ifp->if_bpf) 1106 bpf_mtap(ifp->if_bpf, m); 1107 #endif /* NPBFILTER > 0 */ 1108 1109 /* 1110 * This test is outside the NBPFILTER block because 1111 * on the 21140 we have to use Hash-Only mode due to 1112 * a bug in the filter logic. 1113 */ 1114 if ((ifp->if_flags & IFF_PROMISC) != 0 || 1115 sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 1116 if (memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1117 ETHER_ADDR_LEN) != 0 && 1118 ETHER_IS_MULTICAST(eh->ether_dhost) == 0) { 1119 m_freem(m); 1120 continue; 1121 } 1122 } 1123 1124 /* Pass it on. */ 1125 (*ifp->if_input)(ifp, m); 1126 } 1127 1128 /* Update the recieve pointer. */ 1129 sc->sc_rxptr = i; 1130 } 1131 1132 /* 1133 * tlp_txintr: 1134 * 1135 * Helper; handle transmit interrupts. 1136 */ 1137 void 1138 tlp_txintr(sc) 1139 struct tulip_softc *sc; 1140 { 1141 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1142 struct tulip_txsoft *txs; 1143 u_int32_t txstat; 1144 1145 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1146 sc->sc_dev.dv_xname, sc->sc_flags)); 1147 1148 ifp->if_flags &= ~IFF_OACTIVE; 1149 1150 /* 1151 * If we were doing a filter setup, check to see if it completed. 1152 */ 1153 if (sc->sc_flags & TULIPF_DOING_SETUP) { 1154 TULIP_CDSDSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1155 if ((sc->sc_setup_desc.td_status & TDSTAT_OWN) == 0) 1156 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1157 } 1158 1159 /* 1160 * Go through our Tx list and free mbufs for those 1161 * frames that have been transmitted. 1162 */ 1163 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1164 TULIP_CDTXSYNC(sc, txs->txs_firstdesc, 1165 txs->txs_dmamap->dm_nsegs, 1166 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1167 1168 #ifdef TLP_DEBUG 1169 if (ifp->if_flags & IFF_DEBUG) { 1170 int i; 1171 printf(" txsoft %p trainsmit chain:\n", txs); 1172 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1173 printf(" descriptor %d:\n", i); 1174 printf(" td_status: 0x%08x\n", 1175 sc->sc_txdescs[i].td_status); 1176 printf(" td_ctl: 0x%08x\n", 1177 sc->sc_txdescs[i].td_ctl); 1178 printf(" td_bufaddr1: 0x%08x\n", 1179 sc->sc_txdescs[i].td_bufaddr1); 1180 printf(" td_bufaddr2: 0x%08x\n", 1181 sc->sc_txdescs[i].td_bufaddr2); 1182 if (i == txs->txs_lastdesc) 1183 break; 1184 } 1185 } 1186 #endif 1187 1188 txstat = sc->sc_txdescs[txs->txs_firstdesc].td_status; 1189 if (txstat & TDSTAT_OWN) 1190 break; 1191 1192 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1193 1194 sc->sc_txfree += txs->txs_dmamap->dm_nsegs; 1195 1196 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1197 0, txs->txs_dmamap->dm_mapsize, 1198 BUS_DMASYNC_POSTWRITE); 1199 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1200 m_freem(txs->txs_mbuf); 1201 txs->txs_mbuf = NULL; 1202 1203 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1204 1205 /* 1206 * Check for errors and collisions. 1207 */ 1208 if (txstat & TDSTAT_ES) { 1209 ifp->if_oerrors++; 1210 if (txstat & TDSTAT_Tx_EC) 1211 ifp->if_collisions += 16; 1212 if (txstat & TDSTAT_Tx_LC) 1213 ifp->if_collisions++; 1214 } else { 1215 /* Packet was transmitted successfully. */ 1216 ifp->if_opackets++; 1217 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1218 } 1219 } 1220 1221 /* 1222 * If there are no more pending transmissions, cancel the watchdog 1223 * timer. 1224 */ 1225 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1226 ifp->if_timer = 0; 1227 1228 /* 1229 * If we have a receive filter setup pending, do it now. 1230 */ 1231 if (sc->sc_flags & TULIPF_WANT_SETUP) 1232 (*sc->sc_filter_setup)(sc); 1233 } 1234 1235 /* 1236 * tlp_reset: 1237 * 1238 * Perform a soft reset on the Tulip. 1239 */ 1240 void 1241 tlp_reset(sc) 1242 struct tulip_softc *sc; 1243 { 1244 int i; 1245 1246 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1247 1248 for (i = 0; i < 1000; i++) { 1249 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1250 break; 1251 delay(10); 1252 } 1253 1254 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1255 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1256 1257 delay(1000); 1258 } 1259 1260 /* 1261 * tlp_init: 1262 * 1263 * Initialize the interface. Must be called at splnet(). 1264 */ 1265 int 1266 tlp_init(sc) 1267 struct tulip_softc *sc; 1268 { 1269 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1270 struct tulip_txsoft *txs; 1271 struct tulip_rxsoft *rxs; 1272 int i, error = 0; 1273 1274 /* 1275 * Cancel any pending I/O. 1276 */ 1277 tlp_stop(sc, 0); 1278 1279 /* 1280 * Reset the Tulip to a known state. 1281 */ 1282 tlp_reset(sc); 1283 1284 /* 1285 * Initialize the BUSMODE register. 1286 * 1287 * XXX What about read-multiple/read-line/write-line on 1288 * XXX the 21140 and up? 1289 */ 1290 sc->sc_busmode = BUSMODE_BAR | BUSMODE_PBL_DEFAULT; 1291 switch (sc->sc_cacheline) { 1292 default: 1293 /* 1294 * Note: We must *always* set these bits; a cache 1295 * alignment of 0 is RESERVED. 1296 */ 1297 case 8: 1298 sc->sc_busmode |= BUSMODE_CAL_8LW; 1299 break; 1300 case 16: 1301 sc->sc_busmode |= BUSMODE_CAL_16LW; 1302 break; 1303 case 32: 1304 sc->sc_busmode |= BUSMODE_CAL_32LW; 1305 break; 1306 } 1307 switch (sc->sc_chip) { 1308 case TULIP_CHIP_82C168: 1309 case TULIP_CHIP_82C169: 1310 sc->sc_busmode |= BUSMODE_PNIC_MBO; 1311 break; 1312 default: 1313 /* Nothing. */ 1314 break; 1315 } 1316 #if BYTE_ORDER == BIG_ENDIAN 1317 /* 1318 * XXX There are reports that this doesn't work properly 1319 * in the old Tulip driver, but BUSMODE_DBO does. However, 1320 * BUSMODE_DBO is not available on the 21040, and requires 1321 * us to byte-swap the setup packet. What to do? 1322 */ 1323 sc->sc_busmode |= BUSMODE_BLE; 1324 #endif 1325 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1326 1327 /* 1328 * Initialize the OPMODE register. We don't write it until 1329 * we're ready to begin the transmit and receive processes. 1330 * 1331 * Media-related OPMODE bits are set in the media callbacks 1332 * for each specific chip/board. 1333 */ 1334 sc->sc_opmode = OPMODE_SR | OPMODE_ST | 1335 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1336 switch (sc->sc_chip) { 1337 case TULIP_CHIP_21140: 1338 case TULIP_CHIP_21140A: 1339 case TULIP_CHIP_21142: 1340 case TULIP_CHIP_21143: 1341 sc->sc_opmode |= OPMODE_MBO; 1342 break; 1343 1344 default: 1345 /* Nothing. */ 1346 } 1347 1348 if (sc->sc_flags & TULIPF_HAS_MII) { 1349 switch (sc->sc_chip) { 1350 case TULIP_CHIP_82C168: 1351 case TULIP_CHIP_82C169: 1352 /* Enable the MII port. */ 1353 sc->sc_opmode |= OPMODE_PS; 1354 1355 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 1356 break; 1357 1358 case TULIP_CHIP_WB89C840F: 1359 /* Nothing. */ 1360 break; 1361 1362 default: 1363 /* Enable the MII port. */ 1364 sc->sc_opmode |= OPMODE_PS; 1365 break; 1366 } 1367 } else { 1368 switch (sc->sc_chip) { 1369 case TULIP_CHIP_82C168: 1370 case TULIP_CHIP_82C169: 1371 sc->sc_opmode |= OPMODE_PNIC_TBEN; 1372 break; 1373 1374 default: 1375 /* Nothing. */ 1376 } 1377 } 1378 1379 /* 1380 * Magical mystery initialization on the Macronix chips. 1381 * The MX98713 uses its own magic value, the rest share 1382 * a common one. 1383 */ 1384 switch (sc->sc_chip) { 1385 case TULIP_CHIP_MX98713: 1386 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1387 break; 1388 1389 case TULIP_CHIP_MX98713A: 1390 case TULIP_CHIP_MX98715: 1391 case TULIP_CHIP_MX98725: 1392 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1393 break; 1394 1395 default: 1396 /* Nothing. */ 1397 } 1398 1399 /* 1400 * Initialize the transmit descriptor ring. 1401 */ 1402 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1403 for (i = 0; i < TULIP_NTXDESC; i++) { 1404 sc->sc_txdescs[i].td_ctl = TDCTL_CH; 1405 sc->sc_txdescs[i].td_bufaddr2 = 1406 TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)); 1407 } 1408 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1409 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1410 sc->sc_txfree = TULIP_NTXDESC; 1411 sc->sc_txnext = 0; 1412 1413 /* 1414 * Initialize the transmit job descriptors. 1415 */ 1416 SIMPLEQ_INIT(&sc->sc_txfreeq); 1417 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1418 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1419 txs = &sc->sc_txsoft[i]; 1420 txs->txs_mbuf = NULL; 1421 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1422 } 1423 1424 /* 1425 * Initialize the receive descriptor and receive job 1426 * descriptor rings. 1427 */ 1428 for (i = 0; i < TULIP_NRXDESC; i++) { 1429 rxs = &sc->sc_rxsoft[i]; 1430 if (rxs->rxs_mbuf == NULL) { 1431 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1432 printf("%s: unable to allocate or map rx " 1433 "buffer %d, error = %d\n", 1434 sc->sc_dev.dv_xname, i, error); 1435 /* 1436 * XXX Should attempt to run with fewer receive 1437 * XXX buffers instead of just failing. 1438 */ 1439 tlp_rxdrain(sc); 1440 goto out; 1441 } 1442 } 1443 } 1444 sc->sc_rxptr = 0; 1445 1446 /* 1447 * Initialize the interrupt mask and enable interrupts. 1448 */ 1449 /* normal interrupts */ 1450 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1451 1452 /* abnormal interrupts */ 1453 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1454 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1455 1456 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1457 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1458 1459 switch (sc->sc_chip) { 1460 case TULIP_CHIP_WB89C840F: 1461 /* 1462 * Clear bits that we don't want that happen to 1463 * overlap or don't exist. 1464 */ 1465 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1466 break; 1467 1468 default: 1469 /* Nothing. */ 1470 } 1471 1472 sc->sc_rxint_mask &= sc->sc_inten; 1473 sc->sc_txint_mask &= sc->sc_inten; 1474 1475 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1476 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1477 1478 /* 1479 * Give the transmit and receive rings to the Tulip. 1480 */ 1481 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1482 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1483 1484 /* 1485 * On chips that do this differently, set the station address. 1486 */ 1487 switch (sc->sc_chip) { 1488 case TULIP_CHIP_WB89C840F: 1489 { 1490 /* XXX Do this with stream writes? */ 1491 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1492 1493 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1494 bus_space_write_1(sc->sc_st, sc->sc_sh, 1495 cpa + i, LLADDR(ifp->if_sadl)[i]); 1496 } 1497 break; 1498 } 1499 1500 default: 1501 /* Nothing. */ 1502 } 1503 1504 /* 1505 * Set the receive filter. This will start the transmit and 1506 * receive processes. 1507 */ 1508 (*sc->sc_filter_setup)(sc); 1509 1510 /* 1511 * Start the receive process. 1512 */ 1513 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1514 1515 if (sc->sc_tick != NULL) { 1516 /* Start the one second clock. */ 1517 timeout(sc->sc_tick, sc, hz); 1518 } 1519 1520 /* 1521 * Note that the interface is now running. 1522 */ 1523 ifp->if_flags |= IFF_RUNNING; 1524 ifp->if_flags &= ~IFF_OACTIVE; 1525 1526 /* 1527 * Set the media. We must do this after the transmit process is 1528 * running, since we may actually have to transmit packets on 1529 * our board to test link integrity. 1530 */ 1531 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1532 1533 out: 1534 if (error) 1535 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1536 return (error); 1537 } 1538 1539 /* 1540 * tlp_rxdrain: 1541 * 1542 * Drain the receive queue. 1543 */ 1544 void 1545 tlp_rxdrain(sc) 1546 struct tulip_softc *sc; 1547 { 1548 struct tulip_rxsoft *rxs; 1549 int i; 1550 1551 for (i = 0; i < TULIP_NRXDESC; i++) { 1552 rxs = &sc->sc_rxsoft[i]; 1553 if (rxs->rxs_mbuf != NULL) { 1554 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1555 m_freem(rxs->rxs_mbuf); 1556 rxs->rxs_mbuf = NULL; 1557 } 1558 } 1559 } 1560 1561 /* 1562 * tlp_stop: 1563 * 1564 * Stop transmission on the interface. 1565 */ 1566 void 1567 tlp_stop(sc, drain) 1568 struct tulip_softc *sc; 1569 int drain; 1570 { 1571 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1572 struct tulip_txsoft *txs; 1573 1574 if (sc->sc_tick != NULL) { 1575 /* Stop the one second clock. */ 1576 untimeout(sc->sc_tick, sc); 1577 } 1578 1579 /* Disable interrupts. */ 1580 TULIP_WRITE(sc, CSR_INTEN, 0); 1581 1582 /* Stop the transmit and receive processes. */ 1583 TULIP_WRITE(sc, CSR_OPMODE, 0); 1584 TULIP_WRITE(sc, CSR_RXLIST, 0); 1585 TULIP_WRITE(sc, CSR_TXLIST, 0); 1586 1587 /* 1588 * Release any queued transmit buffers. 1589 */ 1590 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1591 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1592 if (txs->txs_mbuf != NULL) { 1593 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1594 m_freem(txs->txs_mbuf); 1595 txs->txs_mbuf = NULL; 1596 } 1597 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1598 } 1599 1600 if (drain) { 1601 /* 1602 * Release the receive buffers. 1603 */ 1604 tlp_rxdrain(sc); 1605 } 1606 1607 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 1608 1609 /* 1610 * Mark the interface down and cancel the watchdog timer. 1611 */ 1612 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1613 ifp->if_timer = 0; 1614 } 1615 1616 #define SROM_EMIT(sc, x) \ 1617 do { \ 1618 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 1619 delay(1); \ 1620 } while (0) 1621 1622 /* 1623 * tlp_srom_idle: 1624 * 1625 * Put the SROM in idle state. 1626 */ 1627 void 1628 tlp_srom_idle(sc) 1629 struct tulip_softc *sc; 1630 { 1631 u_int32_t miirom; 1632 int i; 1633 1634 miirom = MIIROM_SR; 1635 SROM_EMIT(sc, miirom); 1636 1637 miirom |= MIIROM_RD; 1638 SROM_EMIT(sc, miirom); 1639 1640 miirom |= MIIROM_SROMCS; 1641 SROM_EMIT(sc, miirom); 1642 1643 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1644 1645 /* Strobe the clock 25 times. */ 1646 for (i = 0; i < 25; i++) { 1647 SROM_EMIT(sc, miirom); 1648 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1649 } 1650 1651 SROM_EMIT(sc, miirom); 1652 1653 miirom &= ~MIIROM_SROMCS; 1654 SROM_EMIT(sc, miirom); 1655 1656 SROM_EMIT(sc, 0); 1657 } 1658 1659 /* 1660 * tlp_read_srom: 1661 * 1662 * Read the Tulip SROM. 1663 */ 1664 void 1665 tlp_read_srom(sc, word, wordcnt, data) 1666 struct tulip_softc *sc; 1667 int word, wordcnt; 1668 u_int16_t *data; 1669 { 1670 u_int32_t miirom; 1671 int i, x; 1672 1673 tlp_srom_idle(sc); 1674 1675 /* Select the SROM. */ 1676 miirom = MIIROM_SR; 1677 SROM_EMIT(sc, miirom); 1678 1679 miirom |= MIIROM_RD; 1680 SROM_EMIT(sc, miirom); 1681 1682 for (i = 0; i < wordcnt; i++) { 1683 /* Send CHIP SELECT for one clock tick. */ 1684 miirom |= MIIROM_SROMCS; 1685 SROM_EMIT(sc, miirom); 1686 1687 /* Shift in the READ opcode. */ 1688 for (x = 3; x > 0; x--) { 1689 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 1690 miirom |= MIIROM_SROMDI; 1691 else 1692 miirom &= ~MIIROM_SROMDI; 1693 SROM_EMIT(sc, miirom); 1694 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1695 SROM_EMIT(sc, miirom); 1696 } 1697 1698 /* Shift in address. */ 1699 for (x = 6; x > 0; x--) { 1700 if ((word + i) & (1 << (x - 1))) 1701 miirom |= MIIROM_SROMDI; 1702 else 1703 miirom &= ~MIIROM_SROMDI; 1704 SROM_EMIT(sc, miirom); 1705 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1706 SROM_EMIT(sc, miirom); 1707 } 1708 1709 /* Shift out data. */ 1710 miirom &= ~MIIROM_SROMDI; 1711 data[i] = 0; 1712 for (x = 16; x > 0; x--) { 1713 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 1714 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 1715 data[i] |= (1 << (x - 1)); 1716 SROM_EMIT(sc, miirom); 1717 } 1718 1719 /* Clear CHIP SELECT. */ 1720 miirom &= ~MIIROM_SROMCS; 1721 SROM_EMIT(sc, miirom); 1722 } 1723 1724 /* Deselect the SROM. */ 1725 SROM_EMIT(sc, 0); 1726 1727 /* ...and idle it. */ 1728 tlp_srom_idle(sc); 1729 } 1730 1731 #undef SROM_EMIT 1732 1733 /* 1734 * tlp_add_rxbuf: 1735 * 1736 * Add a receive buffer to the indicated descriptor. 1737 */ 1738 int 1739 tlp_add_rxbuf(sc, idx) 1740 struct tulip_softc *sc; 1741 int idx; 1742 { 1743 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 1744 struct mbuf *m; 1745 int error; 1746 1747 MGETHDR(m, M_DONTWAIT, MT_DATA); 1748 if (m == NULL) 1749 return (ENOBUFS); 1750 1751 MCLGET(m, M_DONTWAIT); 1752 if ((m->m_flags & M_EXT) == 0) { 1753 m_freem(m); 1754 return (ENOBUFS); 1755 } 1756 1757 if (rxs->rxs_mbuf != NULL) 1758 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1759 1760 rxs->rxs_mbuf = m; 1761 1762 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 1763 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 1764 if (error) { 1765 printf("%s: can't load rx DMA map %d, error = %d\n", 1766 sc->sc_dev.dv_xname, idx, error); 1767 panic("tlp_add_rxbuf"); /* XXX */ 1768 } 1769 1770 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1771 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1772 1773 TULIP_INIT_RXDESC(sc, idx); 1774 1775 return (0); 1776 } 1777 1778 /* 1779 * tlp_crc32: 1780 * 1781 * Compute the 32-bit CRC of the provided buffer. 1782 */ 1783 u_int32_t 1784 tlp_crc32(buf, len) 1785 const u_int8_t *buf; 1786 size_t len; 1787 { 1788 static const u_int32_t crctab[] = { 1789 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 1790 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, 1791 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 1792 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c 1793 }; 1794 u_int32_t crc; 1795 int i; 1796 1797 crc = 0xffffffff; 1798 for (i = 0; i < len; i++) { 1799 crc ^= buf[i]; 1800 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1801 crc = (crc >> 4) ^ crctab[crc & 0xf]; 1802 } 1803 return (crc); 1804 } 1805 1806 /* 1807 * tlp_srom_crcok: 1808 * 1809 * Check the CRC of the Tulip SROM. 1810 */ 1811 int 1812 tlp_srom_crcok(romdata) 1813 u_int8_t *romdata; 1814 { 1815 u_int32_t crc; 1816 1817 crc = tlp_crc32(romdata, TULIP_ROM_CRC32_CHECKSUM); 1818 crc = (crc & 0xffff) ^ 0xffff; 1819 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 1820 return (1); 1821 return (0); 1822 } 1823 1824 /* 1825 * tlp_parse_old_srom: 1826 * 1827 * Parse old-format SROMs. 1828 * 1829 * This routine is largely lifted from Matt Thomas's `de' driver. 1830 */ 1831 int 1832 tlp_parse_old_srom(sc, enaddr) 1833 struct tulip_softc *sc; 1834 u_int8_t *enaddr; 1835 { 1836 static const u_int8_t testpat[] = 1837 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 1838 int i; 1839 u_int32_t cksum; 1840 1841 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 1842 /* 1843 * Some vendors (e.g. ZNYX) don't use the standard 1844 * DEC Address ROM format, but rather just have an 1845 * Ethernet address in the first 6 bytes, maybe a 1846 * 2 byte checksum, and then all 0xff's. 1847 */ 1848 for (i = 8; i < 32; i++) { 1849 if (sc->sc_srom[i] != 0xff) 1850 return (0); 1851 } 1852 1853 /* 1854 * Sanity check the Ethernet address: 1855 * 1856 * - Make sure it's not multicast or locally 1857 * assigned 1858 * - Make sure it has a non-0 OUI 1859 */ 1860 if (sc->sc_srom[0] & 3) 1861 return (0); 1862 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 1863 sc->sc_srom[2] == 0) 1864 return (0); 1865 1866 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1867 return (1); 1868 } 1869 1870 /* 1871 * Standard DEC Address ROM test. 1872 */ 1873 1874 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 1875 return (0); 1876 1877 for (i = 0; i < 8; i++) { 1878 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 1879 return (0); 1880 } 1881 1882 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 1883 1884 cksum = *(u_int16_t *) &enaddr[0]; 1885 1886 cksum <<= 1; 1887 if (cksum > 0xffff) 1888 cksum -= 0xffff; 1889 1890 cksum += *(u_int16_t *) &enaddr[2]; 1891 if (cksum > 0xffff) 1892 cksum -= 0xffff; 1893 1894 cksum <<= 1; 1895 if (cksum > 0xffff) 1896 cksum -= 0xffff; 1897 1898 cksum += *(u_int16_t *) &enaddr[4]; 1899 if (cksum >= 0xffff) 1900 cksum -= 0xffff; 1901 1902 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 1903 return (0); 1904 1905 return (1); 1906 } 1907 1908 /* 1909 * tlp_filter_setup: 1910 * 1911 * Set the Tulip's receive filter. 1912 */ 1913 void 1914 tlp_filter_setup(sc) 1915 struct tulip_softc *sc; 1916 { 1917 struct ethercom *ec = &sc->sc_ethercom; 1918 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1919 struct ether_multi *enm; 1920 struct ether_multistep step; 1921 __volatile u_int32_t *sp; 1922 u_int8_t enaddr[ETHER_ADDR_LEN]; 1923 u_int32_t hash; 1924 int cnt; 1925 1926 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 1927 sc->sc_dev.dv_xname, sc->sc_flags)); 1928 1929 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 1930 1931 /* 1932 * If there are transmissions pending, wait until they have 1933 * completed. 1934 */ 1935 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 1936 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 1937 sc->sc_flags |= TULIPF_WANT_SETUP; 1938 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 1939 sc->sc_dev.dv_xname)); 1940 return; 1941 } 1942 sc->sc_flags &= ~TULIPF_WANT_SETUP; 1943 1944 /* 1945 * If we're running, idle the transmit and receive engines. If 1946 * we're NOT running, we're being called from tlp_init(), and our 1947 * writing OPMODE will start the transmit and receive processes 1948 * in motion. 1949 */ 1950 if (ifp->if_flags & IFF_RUNNING) 1951 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 1952 1953 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 1954 1955 if (ifp->if_flags & IFF_PROMISC) { 1956 sc->sc_opmode |= OPMODE_PR; 1957 goto allmulti; 1958 } 1959 1960 /* 1961 * Try Perfect filtering first. 1962 */ 1963 1964 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 1965 sp = TULIP_CDSP(sc); 1966 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 1967 cnt = 0; 1968 ETHER_FIRST_MULTI(step, ec, enm); 1969 while (enm != NULL) { 1970 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 1971 /* 1972 * We must listen to a range of multicast addresses. 1973 * For now, just accept all multicasts, rather than 1974 * trying to set only those filter bits needed to match 1975 * the range. (At this time, the only use of address 1976 * ranges is for IP multicast routing, for which the 1977 * range is big enough to require all bits set.) 1978 */ 1979 goto allmulti; 1980 } 1981 if (cnt == (TULIP_MAXADDRS - 2)) { 1982 /* 1983 * We already have our multicast limit (still need 1984 * our station address and broadcast). Go to 1985 * Hash-Perfect mode. 1986 */ 1987 goto hashperfect; 1988 } 1989 *sp++ = ((u_int16_t *) enm->enm_addrlo)[0]; 1990 *sp++ = ((u_int16_t *) enm->enm_addrlo)[1]; 1991 *sp++ = ((u_int16_t *) enm->enm_addrlo)[2]; 1992 ETHER_NEXT_MULTI(step, enm); 1993 } 1994 1995 if (ifp->if_flags & IFF_BROADCAST) { 1996 /* ...and the broadcast address. */ 1997 cnt++; 1998 *sp++ = 0xffff; 1999 *sp++ = 0xffff; 2000 *sp++ = 0xffff; 2001 } 2002 2003 /* Pad the rest with our station address. */ 2004 for (; cnt < TULIP_MAXADDRS; cnt++) { 2005 *sp++ = ((u_int16_t *) enaddr)[0]; 2006 *sp++ = ((u_int16_t *) enaddr)[1]; 2007 *sp++ = ((u_int16_t *) enaddr)[2]; 2008 } 2009 ifp->if_flags &= ~IFF_ALLMULTI; 2010 goto setit; 2011 2012 hashperfect: 2013 /* 2014 * Try Hash-Perfect mode. 2015 */ 2016 2017 /* 2018 * Some 21140 chips have broken Hash-Perfect modes. On these 2019 * chips, we simply use Hash-Only mode, and put our station 2020 * address into the filter. 2021 */ 2022 if (sc->sc_chip == TULIP_CHIP_21140) 2023 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2024 else 2025 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2026 sp = TULIP_CDSP(sc); 2027 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2028 ETHER_FIRST_MULTI(step, ec, enm); 2029 while (enm != NULL) { 2030 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2031 /* 2032 * We must listen to a range of multicast addresses. 2033 * For now, just accept all multicasts, rather than 2034 * trying to set only those filter bits needed to match 2035 * the range. (At this time, the only use of address 2036 * ranges is for IP multicast routing, for which the 2037 * range is big enough to require all bits set.) 2038 */ 2039 goto allmulti; 2040 } 2041 hash = tlp_mchash(enm->enm_addrlo); 2042 sp[hash >> 4] |= 1 << (hash & 0xf); 2043 ETHER_NEXT_MULTI(step, enm); 2044 } 2045 2046 if (ifp->if_flags & IFF_BROADCAST) { 2047 /* ...and the broadcast address. */ 2048 hash = tlp_mchash(etherbroadcastaddr); 2049 sp[hash >> 4] |= 1 << (hash & 0xf); 2050 } 2051 2052 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2053 /* ...and our station address. */ 2054 hash = tlp_mchash(enaddr); 2055 sp[hash >> 4] |= 1 << (hash & 0xf); 2056 } else { 2057 /* 2058 * Hash-Perfect mode; put our station address after 2059 * the hash table. 2060 */ 2061 sp[39] = ((u_int16_t *) enaddr)[0]; 2062 sp[40] = ((u_int16_t *) enaddr)[1]; 2063 sp[41] = ((u_int16_t *) enaddr)[2]; 2064 } 2065 ifp->if_flags &= ~IFF_ALLMULTI; 2066 goto setit; 2067 2068 allmulti: 2069 /* 2070 * Use Perfect filter mode. First address is the broadcast address, 2071 * and pad the rest with our station address. We'll set Pass-all- 2072 * multicast in OPMODE below. 2073 */ 2074 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2075 sp = TULIP_CDSP(sc); 2076 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2077 cnt = 0; 2078 if (ifp->if_flags & IFF_BROADCAST) { 2079 cnt++; 2080 *sp++ = 0xffff; 2081 *sp++ = 0xffff; 2082 *sp++ = 0xffff; 2083 } 2084 for (; cnt < TULIP_MAXADDRS; cnt++) { 2085 *sp++ = ((u_int16_t *) enaddr)[0]; 2086 *sp++ = ((u_int16_t *) enaddr)[1]; 2087 *sp++ = ((u_int16_t *) enaddr)[2]; 2088 } 2089 ifp->if_flags |= IFF_ALLMULTI; 2090 2091 setit: 2092 if (ifp->if_flags & IFF_ALLMULTI) 2093 sc->sc_opmode |= OPMODE_PM; 2094 2095 /* Sync the setup packet buffer. */ 2096 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2097 2098 /* 2099 * Fill in the setup packet descriptor. 2100 */ 2101 sc->sc_setup_desc.td_bufaddr1 = TULIP_CDSPADDR(sc); 2102 sc->sc_setup_desc.td_bufaddr2 = TULIP_CDTXADDR(sc, sc->sc_txnext); 2103 sc->sc_setup_desc.td_ctl = 2104 (TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2105 sc->sc_filtmode | TDCTL_Tx_SET | TDCTL_Tx_FS | TDCTL_Tx_LS | 2106 TDCTL_Tx_IC | TDCTL_CH; 2107 sc->sc_setup_desc.td_status = TDSTAT_OWN; 2108 TULIP_CDSDSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2109 2110 /* 2111 * Write the address of the setup descriptor. This also has 2112 * the side effect of giving the transmit ring to the chip, 2113 * since the setup descriptor points to the next available 2114 * descriptor in the ring. 2115 */ 2116 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDSDADDR(sc)); 2117 2118 /* 2119 * Set the OPMODE register. This will also resume the 2120 * transmit transmit process we idled above. 2121 */ 2122 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2123 2124 sc->sc_flags |= TULIPF_DOING_SETUP; 2125 2126 /* 2127 * Kick the transmitter; this will cause the Tulip to 2128 * read the setup descriptor. 2129 */ 2130 /* XXX USE AUTOPOLLING? */ 2131 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2132 2133 /* Set up a watchdog timer in case the chip flakes out. */ 2134 ifp->if_timer = 5; 2135 2136 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2137 } 2138 2139 /* 2140 * tlp_winb_filter_setup: 2141 * 2142 * Set the Winbond 89C840F's receive filter. 2143 */ 2144 void 2145 tlp_winb_filter_setup(sc) 2146 struct tulip_softc *sc; 2147 { 2148 struct ethercom *ec = &sc->sc_ethercom; 2149 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2150 struct ether_multi *enm; 2151 struct ether_multistep step; 2152 u_int32_t hash, mchash[2]; 2153 2154 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2155 sc->sc_dev.dv_xname, sc->sc_flags)); 2156 2157 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2158 2159 if (ifp->if_flags & IFF_MULTICAST) 2160 sc->sc_opmode |= OPMODE_WINB_AMP; 2161 2162 if (ifp->if_flags & IFF_BROADCAST) 2163 sc->sc_opmode |= OPMODE_WINB_ABP; 2164 2165 if (ifp->if_flags & IFF_PROMISC) { 2166 sc->sc_opmode |= OPMODE_WINB_APP; 2167 goto allmulti; 2168 } 2169 2170 mchash[0] = mchash[1] = 0; 2171 2172 ETHER_FIRST_MULTI(step, ec, enm); 2173 while (enm != NULL) { 2174 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2175 /* 2176 * We must listen to a range of multicast addresses. 2177 * For now, just accept all multicasts, rather than 2178 * trying to set only those filter bits needed to match 2179 * the range. (At this time, the only use of address 2180 * ranges is for IP multicast routing, for which the 2181 * range is big enough to require all bits set.) 2182 */ 2183 goto allmulti; 2184 } 2185 2186 /* 2187 * According to the FreeBSD `wb' driver, yes, you 2188 * really do invert the hash. 2189 */ 2190 hash = (~(tlp_crc32(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2191 & 0x3f; 2192 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2193 ETHER_NEXT_MULTI(step, enm); 2194 } 2195 ifp->if_flags &= ~IFF_ALLMULTI; 2196 goto setit; 2197 2198 allmulti: 2199 ifp->if_flags |= IFF_ALLMULTI; 2200 mchash[0] = mchash[1] = 0xffffffff; 2201 2202 setit: 2203 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2204 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2205 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2206 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2207 sc->sc_dev.dv_xname)); 2208 } 2209 2210 /* 2211 * tlp_idle: 2212 * 2213 * Cause the transmit and/or receive processes to go idle. 2214 */ 2215 void 2216 tlp_idle(sc, bits) 2217 struct tulip_softc *sc; 2218 u_int32_t bits; 2219 { 2220 static const char *tx_state_names[] = { 2221 "STOPPED", 2222 "RUNNING - FETCH", 2223 "RUNNING - WAIT", 2224 "RUNNING - READING", 2225 "-- RESERVED --", 2226 "RUNNING - SETUP", 2227 "SUSPENDED", 2228 "RUNNING - CLOSE", 2229 }; 2230 static const char *rx_state_names[] = { 2231 "STOPPED", 2232 "RUNNING - FETCH", 2233 "RUNNING - CHECK", 2234 "RUNNING - WAIT", 2235 "SUSPENDED", 2236 "RUNNING - CLOSE", 2237 "RUNNING - FLUSH", 2238 "RUNNING - QUEUE", 2239 }; 2240 u_int32_t csr, ackmask = 0; 2241 int i; 2242 2243 if (bits & OPMODE_ST) 2244 ackmask |= STATUS_TPS; 2245 2246 if (bits & OPMODE_SR) 2247 ackmask |= STATUS_RPS; 2248 2249 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2250 2251 for (i = 0; i < 1000; i++) { 2252 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2253 break; 2254 delay(10); 2255 } 2256 2257 csr = TULIP_READ(sc, CSR_STATUS); 2258 if ((csr & ackmask) != ackmask) { 2259 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2260 (csr & STATUS_TS) != STATUS_TS_STOPPED) 2261 printf("%s: transmit process failed to idle: " 2262 "state %s\n", sc->sc_dev.dv_xname, 2263 tx_state_names[(csr & STATUS_TS) >> 20]); 2264 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2265 (csr & STATUS_RS) != STATUS_RS_STOPPED) 2266 printf("%s: receive process failed to idle: " 2267 "state %s\n", sc->sc_dev.dv_xname, 2268 rx_state_names[(csr & STATUS_RS) >> 17]); 2269 } 2270 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2271 } 2272 2273 /***************************************************************************** 2274 * Generic media support functions. 2275 *****************************************************************************/ 2276 2277 /* 2278 * tlp_mediastatus: [ifmedia interface function] 2279 * 2280 * Query the current media. 2281 */ 2282 void 2283 tlp_mediastatus(ifp, ifmr) 2284 struct ifnet *ifp; 2285 struct ifmediareq *ifmr; 2286 { 2287 struct tulip_softc *sc = ifp->if_softc; 2288 2289 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 2290 } 2291 2292 /* 2293 * tlp_mediachange: [ifmedia interface function] 2294 * 2295 * Update the current media. 2296 */ 2297 int 2298 tlp_mediachange(ifp) 2299 struct ifnet *ifp; 2300 { 2301 struct tulip_softc *sc = ifp->if_softc; 2302 2303 return ((*sc->sc_mediasw->tmsw_set)(sc)); 2304 } 2305 2306 /***************************************************************************** 2307 * Support functions for MII-attached media. 2308 *****************************************************************************/ 2309 2310 /* 2311 * tlp_mii_tick: 2312 * 2313 * One second timer, used to tick the MII. 2314 */ 2315 void 2316 tlp_mii_tick(arg) 2317 void *arg; 2318 { 2319 struct tulip_softc *sc = arg; 2320 int s; 2321 2322 s = splnet(); 2323 mii_tick(&sc->sc_mii); 2324 splx(s); 2325 2326 timeout(sc->sc_tick, sc, hz); 2327 } 2328 2329 /* 2330 * tlp_mii_statchg: [mii interface function] 2331 * 2332 * Callback from PHY when media changes. 2333 */ 2334 void 2335 tlp_mii_statchg(self) 2336 struct device *self; 2337 { 2338 struct tulip_softc *sc = (struct tulip_softc *)self; 2339 2340 /* Idle the transmit and receive processes. */ 2341 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2342 2343 /* 2344 * XXX What about Heartbeat Disable? Is it magically frobbed 2345 * XXX by the PHY? I hope so... 2346 */ 2347 2348 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 2349 2350 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 2351 sc->sc_opmode |= OPMODE_TTM; 2352 2353 if (sc->sc_mii.mii_media_active & IFM_FDX) 2354 sc->sc_opmode |= OPMODE_FD; 2355 2356 /* 2357 * Write new OPMODE bits. This also restarts the transmit 2358 * and receive processes. 2359 */ 2360 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2361 2362 /* XXX Update ifp->if_baudrate */ 2363 } 2364 2365 /* 2366 * tlp_winb_mii_statchg: [mii interface function] 2367 * 2368 * Callback from PHY when media changes. This version is 2369 * for the Winbond 89C840F, which has different OPMODE bits. 2370 */ 2371 void 2372 tlp_winb_mii_statchg(self) 2373 struct device *self; 2374 { 2375 struct tulip_softc *sc = (struct tulip_softc *)self; 2376 2377 /* Idle the transmit and receive processes. */ 2378 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2379 2380 /* 2381 * XXX What about Heartbeat Disable? Is it magically frobbed 2382 * XXX by the PHY? I hope so... 2383 */ 2384 2385 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 2386 2387 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 2388 sc->sc_opmode |= OPMODE_WINB_FES; 2389 2390 if (sc->sc_mii.mii_media_active & IFM_FDX) 2391 sc->sc_opmode |= OPMODE_FD; 2392 2393 /* 2394 * Write new OPMODE bits. This also restarts the transmit 2395 * and receive processes. 2396 */ 2397 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2398 2399 /* XXX Update ifp->if_baudrate */ 2400 } 2401 2402 /* 2403 * tlp_mii_getmedia: 2404 * 2405 * Callback from ifmedia to request current media status. 2406 */ 2407 void 2408 tlp_mii_getmedia(sc, ifmr) 2409 struct tulip_softc *sc; 2410 struct ifmediareq *ifmr; 2411 { 2412 2413 mii_pollstat(&sc->sc_mii); 2414 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2415 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2416 } 2417 2418 /* 2419 * tlp_mii_setmedia: 2420 * 2421 * Callback from ifmedia to request new media setting. 2422 */ 2423 int 2424 tlp_mii_setmedia(sc) 2425 struct tulip_softc *sc; 2426 { 2427 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2428 2429 if (ifp->if_flags & IFF_UP) 2430 mii_mediachg(&sc->sc_mii); 2431 return (0); 2432 } 2433 2434 #define MII_EMIT(sc, x) \ 2435 do { \ 2436 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2437 delay(1); \ 2438 } while (0) 2439 2440 /* 2441 * tlp_sio_mii_sync: 2442 * 2443 * Synchronize the SIO-attached MII. 2444 */ 2445 void 2446 tlp_sio_mii_sync(sc) 2447 struct tulip_softc *sc; 2448 { 2449 u_int32_t miirom; 2450 int i; 2451 2452 miirom = MIIROM_MIIDIR|MIIROM_MDO; 2453 2454 MII_EMIT(sc, miirom); 2455 for (i = 0; i < 32; i++) { 2456 MII_EMIT(sc, miirom | MIIROM_MDC); 2457 MII_EMIT(sc, miirom); 2458 } 2459 } 2460 2461 /* 2462 * tlp_sio_mii_sendbits: 2463 * 2464 * Send a series of bits out the SIO to the MII. 2465 */ 2466 void 2467 tlp_sio_mii_sendbits(sc, data, nbits) 2468 struct tulip_softc *sc; 2469 u_int32_t data; 2470 int nbits; 2471 { 2472 u_int32_t miirom, i; 2473 2474 miirom = MIIROM_MIIDIR; 2475 MII_EMIT(sc, miirom); 2476 2477 for (i = 1 << (nbits - 1); i != 0; i >>= 1) { 2478 if (data & i) 2479 miirom |= MIIROM_MDO; 2480 else 2481 miirom &= ~MIIROM_MDO; 2482 MII_EMIT(sc, miirom); 2483 MII_EMIT(sc, miirom|MIIROM_MDC); 2484 MII_EMIT(sc, miirom); 2485 } 2486 } 2487 2488 /* 2489 * tlp_sio_mii_readreg: 2490 * 2491 * Read a PHY register via SIO-attached MII. 2492 */ 2493 int 2494 tlp_sio_mii_readreg(self, phy, reg) 2495 struct device *self; 2496 int phy, reg; 2497 { 2498 struct tulip_softc *sc = (void *) self; 2499 int val = 0, err = 0, i; 2500 2501 tlp_sio_mii_sync(sc); 2502 2503 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2504 tlp_sio_mii_sendbits(sc, MII_COMMAND_READ, 2); 2505 tlp_sio_mii_sendbits(sc, phy, 5); 2506 tlp_sio_mii_sendbits(sc, reg, 5); 2507 2508 MII_EMIT(sc, MIIROM_MIIDIR); 2509 MII_EMIT(sc, MIIROM_MIIDIR|MIIROM_MDC); 2510 2511 MII_EMIT(sc, 0); 2512 MII_EMIT(sc, MIIROM_MDC); 2513 2514 err = TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI); 2515 2516 MII_EMIT(sc, 0); 2517 MII_EMIT(sc, MIIROM_MDC); 2518 2519 for (i = 0; i < 16; i++) { 2520 val <<= 1; 2521 MII_EMIT(sc, 0); 2522 if (err == 0 && TULIP_ISSET(sc, CSR_MIIROM, MIIROM_MDI)) 2523 val |= 1; 2524 MII_EMIT(sc, MIIROM_MDC); 2525 } 2526 2527 MII_EMIT(sc, 0); 2528 2529 return (err ? 0 : val); 2530 } 2531 2532 /* 2533 * tlp_sio_mii_writereg: 2534 * 2535 * Write a PHY register via SIO-attached MII. 2536 */ 2537 void 2538 tlp_sio_mii_writereg(self, phy, reg, val) 2539 struct device *self; 2540 int phy, reg, val; 2541 { 2542 struct tulip_softc *sc = (void *) self; 2543 2544 tlp_sio_mii_sync(sc); 2545 2546 tlp_sio_mii_sendbits(sc, MII_COMMAND_START, 2); 2547 tlp_sio_mii_sendbits(sc, MII_COMMAND_WRITE, 2); 2548 tlp_sio_mii_sendbits(sc, phy, 5); 2549 tlp_sio_mii_sendbits(sc, reg, 5); 2550 tlp_sio_mii_sendbits(sc, MII_COMMAND_ACK, 2); 2551 tlp_sio_mii_sendbits(sc, val, 16); 2552 2553 MII_EMIT(sc, 0); 2554 } 2555 2556 #undef MII_EMIT 2557 2558 /* 2559 * tlp_pnic_mii_readreg: 2560 * 2561 * Read a PHY register on the Lite-On PNIC. 2562 */ 2563 int 2564 tlp_pnic_mii_readreg(self, phy, reg) 2565 struct device *self; 2566 int phy, reg; 2567 { 2568 struct tulip_softc *sc = (void *) self; 2569 u_int32_t val; 2570 int i; 2571 2572 TULIP_WRITE(sc, CSR_PNIC_MII, 2573 PNIC_MII_MBO | PNIC_MII_RESERVED | 2574 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 2575 (reg << PNIC_MII_REGSHIFT)); 2576 2577 for (i = 0; i < 1000; i++) { 2578 delay(10); 2579 val = TULIP_READ(sc, CSR_PNIC_MII); 2580 if ((val & PNIC_MII_BUSY) == 0) { 2581 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 2582 return (0); 2583 else 2584 return (val & PNIC_MII_DATA); 2585 } 2586 } 2587 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 2588 return (0); 2589 } 2590 2591 /* 2592 * tlp_pnic_mii_writereg: 2593 * 2594 * Write a PHY register on the Lite-On PNIC. 2595 */ 2596 void 2597 tlp_pnic_mii_writereg(self, phy, reg, val) 2598 struct device *self; 2599 int phy, reg, val; 2600 { 2601 struct tulip_softc *sc = (void *) self; 2602 int i; 2603 2604 TULIP_WRITE(sc, CSR_PNIC_MII, 2605 PNIC_MII_MBO | PNIC_MII_RESERVED | 2606 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 2607 (reg << PNIC_MII_REGSHIFT) | val); 2608 2609 for (i = 0; i < 1000; i++) { 2610 delay(10); 2611 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 2612 return; 2613 } 2614 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 2615 } 2616 2617 /***************************************************************************** 2618 * Chip/board-specific media switches. The ones here are ones that 2619 * are potentially common to multiple front-ends. 2620 *****************************************************************************/ 2621 2622 /* 2623 * 21040 and 21041 media switches. 2624 */ 2625 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 2626 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 2627 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 2628 void tlp_21040_21041_tmsw_get __P((struct tulip_softc *, 2629 struct ifmediareq *)); 2630 int tlp_21040_21041_tmsw_set __P((struct tulip_softc *)); 2631 2632 const struct tulip_mediasw tlp_21040_mediasw = { 2633 tlp_21040_tmsw_init, tlp_21040_21041_tmsw_get, tlp_21040_21041_tmsw_set 2634 }; 2635 2636 const struct tulip_mediasw tlp_21040_tp_mediasw = { 2637 tlp_21040_tp_tmsw_init, tlp_21040_21041_tmsw_get, 2638 tlp_21040_21041_tmsw_set 2639 }; 2640 2641 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 2642 tlp_21040_auibnc_tmsw_init, tlp_21040_21041_tmsw_get, 2643 tlp_21040_21041_tmsw_set 2644 }; 2645 2646 #define ADD(m, t) ifmedia_add(&sc->sc_mii.mii_media, (m), 0, (t)) 2647 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 2648 2649 void 2650 tlp_21040_tmsw_init(sc) 2651 struct tulip_softc *sc; 2652 { 2653 struct tulip_21040_21041_sia_media *tsm; 2654 const char *sep = ""; 2655 2656 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2657 tlp_mediastatus); 2658 2659 printf("%s: ", sc->sc_dev.dv_xname); 2660 2661 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2662 M_WAITOK); 2663 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2664 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2665 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2666 ADD(IFM_ETHER|IFM_10_T, tsm); 2667 PRINT("10baseT"); 2668 2669 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2670 M_WAITOK); 2671 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2672 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2673 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2674 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2675 PRINT("10baseT-FDX"); 2676 2677 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2678 M_WAITOK); 2679 tsm->tsm_siaconn = SIACONN_21040_AUI; 2680 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2681 tsm->tsm_siagen = SIAGEN_21040_AUI; 2682 ADD(IFM_ETHER|IFM_10_5, tsm); 2683 PRINT("10base5"); 2684 2685 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2686 M_WAITOK); 2687 tsm->tsm_siaconn = SIACONN_21040_EXTSIA; 2688 tsm->tsm_siatxrx = SIATXRX_21040_EXTSIA; 2689 tsm->tsm_siagen = SIAGEN_21040_EXTSIA; 2690 ADD(IFM_ETHER|IFM_MANUAL, tsm); 2691 PRINT("manual"); 2692 2693 /* 2694 * XXX Autosense not yet supported. 2695 */ 2696 2697 /* XXX This should be auto-sense. */ 2698 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2699 printf(", default 10baseT"); 2700 2701 printf("\n"); 2702 } 2703 2704 void 2705 tlp_21040_tp_tmsw_init(sc) 2706 struct tulip_softc *sc; 2707 { 2708 struct tulip_21040_21041_sia_media *tsm; 2709 const char *sep = ""; 2710 2711 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2712 tlp_mediastatus); 2713 2714 printf("%s: ", sc->sc_dev.dv_xname); 2715 2716 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2717 M_WAITOK); 2718 tsm->tsm_siaconn = SIACONN_21040_10BASET; 2719 tsm->tsm_siatxrx = SIATXRX_21040_10BASET; 2720 tsm->tsm_siagen = SIAGEN_21040_10BASET; 2721 ADD(IFM_ETHER|IFM_10_T, tsm); 2722 PRINT("10baseT"); 2723 2724 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2725 M_WAITOK); 2726 tsm->tsm_siaconn = SIACONN_21040_10BASET_FDX; 2727 tsm->tsm_siatxrx = SIATXRX_21040_10BASET_FDX; 2728 tsm->tsm_siagen = SIAGEN_21040_10BASET_FDX; 2729 ADD(IFM_ETHER|IFM_10_T|IFM_FDX, tsm); 2730 PRINT("10baseT-FDX"); 2731 2732 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 2733 printf(", default 10baseT"); 2734 2735 printf("\n"); 2736 } 2737 2738 void 2739 tlp_21040_auibnc_tmsw_init(sc) 2740 struct tulip_softc *sc; 2741 { 2742 struct tulip_21040_21041_sia_media *tsm; 2743 const char *sep = ""; 2744 2745 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2746 tlp_mediastatus); 2747 2748 printf("%s: ", sc->sc_dev.dv_xname); 2749 2750 tsm = malloc(sizeof(struct tulip_21040_21041_sia_media), M_DEVBUF, 2751 M_WAITOK); 2752 tsm->tsm_siaconn = SIACONN_21040_AUI; 2753 tsm->tsm_siatxrx = SIATXRX_21040_AUI; 2754 tsm->tsm_siagen = SIAGEN_21040_AUI; 2755 ADD(IFM_ETHER|IFM_10_5, tsm); 2756 PRINT("10base5"); 2757 2758 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 2759 2760 printf("\n"); 2761 } 2762 2763 #undef ADD 2764 #undef PRINT 2765 2766 void 2767 tlp_21040_21041_tmsw_get(sc, ifmr) 2768 struct tulip_softc *sc; 2769 struct ifmediareq *ifmr; 2770 { 2771 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2772 2773 ifmr->ifm_status = 0; 2774 2775 switch (IFM_SUBTYPE(ife->ifm_media)) { 2776 case IFM_AUTO: 2777 /* 2778 * XXX Implement autosensing case. 2779 */ 2780 break; 2781 2782 case IFM_10_T: 2783 /* 2784 * We're able to detect link directly on twisted pair. 2785 */ 2786 ifmr->ifm_status = IFM_AVALID; 2787 if (TULIP_ISSET(sc, CSR_SIASTAT, SIASTAT_LKF) == 0) 2788 ifmr->ifm_status |= IFM_ACTIVE; 2789 /* FALLTHROUGH */ 2790 default: 2791 /* 2792 * If not autosensing, active media is the currently 2793 * selected media. 2794 */ 2795 ifmr->ifm_active = ife->ifm_media; 2796 } 2797 } 2798 2799 int 2800 tlp_21040_21041_tmsw_set(sc) 2801 struct tulip_softc *sc; 2802 { 2803 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 2804 struct tulip_21040_21041_sia_media *tsm; 2805 2806 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 2807 /* 2808 * If not autosensing, just pull the SIA settings out 2809 * of the media entry. 2810 */ 2811 tsm = ife->ifm_aux; 2812 TULIP_WRITE(sc, CSR_SIACONN, SIACONN_SRL); 2813 TULIP_WRITE(sc, CSR_SIATXRX, tsm->tsm_siatxrx); 2814 TULIP_WRITE(sc, CSR_SIAGEN, tsm->tsm_siagen); 2815 TULIP_WRITE(sc, CSR_SIACONN, tsm->tsm_siaconn); 2816 2817 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2818 sc->sc_opmode &= ~OPMODE_FD; 2819 if (ife->ifm_media & IFM_FDX) 2820 sc->sc_opmode |= OPMODE_FD; 2821 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2822 } else { 2823 /* 2824 * XXX Implement autosensing case. 2825 */ 2826 } 2827 2828 return (0); 2829 } 2830 2831 /* 2832 * MII-on-SIO media switch. Handles only MII attached to the SIO. 2833 */ 2834 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 2835 2836 const struct tulip_mediasw tlp_sio_mii_mediasw = { 2837 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 2838 }; 2839 2840 void 2841 tlp_sio_mii_tmsw_init(sc) 2842 struct tulip_softc *sc; 2843 { 2844 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2845 2846 sc->sc_mii.mii_ifp = ifp; 2847 sc->sc_mii.mii_readreg = tlp_sio_mii_readreg; 2848 sc->sc_mii.mii_writereg = tlp_sio_mii_writereg; 2849 sc->sc_mii.mii_statchg = sc->sc_statchg; 2850 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2851 tlp_mediastatus); 2852 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 2853 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 2854 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 2855 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 2856 } else { 2857 sc->sc_flags |= TULIPF_HAS_MII; 2858 sc->sc_tick = tlp_mii_tick; 2859 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2860 } 2861 } 2862 2863 /* 2864 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 2865 */ 2866 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 2867 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 2868 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 2869 2870 const struct tulip_mediasw tlp_pnic_mediasw = { 2871 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 2872 }; 2873 2874 void tlp_pnic_nway_statchg __P((struct device *)); 2875 void tlp_pnic_nway_tick __P((void *)); 2876 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 2877 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 2878 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 2879 void tlp_pnic_nway_auto_timeout __P((void *)); 2880 void tlp_pnic_nway_status __P((struct tulip_softc *)); 2881 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 2882 2883 void 2884 tlp_pnic_tmsw_init(sc) 2885 struct tulip_softc *sc; 2886 { 2887 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2888 const char *sep = ""; 2889 2890 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 2891 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 2892 2893 sc->sc_mii.mii_ifp = ifp; 2894 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 2895 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 2896 sc->sc_mii.mii_statchg = sc->sc_statchg; 2897 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 2898 tlp_mediastatus); 2899 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff); 2900 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 2901 /* XXX What about AUI/BNC support? */ 2902 printf("%s: ", sc->sc_dev.dv_xname); 2903 2904 tlp_pnic_nway_reset(sc); 2905 2906 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 2907 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 2908 PRINT("10baseT"); 2909 2910 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 2911 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 2912 PRINT("10baseT-FDX"); 2913 2914 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 2915 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 2916 PRINT("100baseTX"); 2917 2918 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 2919 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 2920 PNIC_NWAY_CAP100TXFDX); 2921 PRINT("100baseTX-FDX"); 2922 2923 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 2924 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 2925 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 2926 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 2927 PRINT("auto"); 2928 2929 printf("\n"); 2930 2931 sc->sc_statchg = tlp_pnic_nway_statchg; 2932 sc->sc_tick = tlp_pnic_nway_tick; 2933 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2934 } else { 2935 sc->sc_flags |= TULIPF_HAS_MII; 2936 sc->sc_tick = tlp_mii_tick; 2937 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 2938 } 2939 2940 #undef ADD 2941 #undef PRINT 2942 } 2943 2944 void 2945 tlp_pnic_tmsw_get(sc, ifmr) 2946 struct tulip_softc *sc; 2947 struct ifmediareq *ifmr; 2948 { 2949 struct mii_data *mii = &sc->sc_mii; 2950 2951 if (sc->sc_flags & TULIPF_HAS_MII) 2952 tlp_mii_getmedia(sc, ifmr); 2953 else { 2954 mii->mii_media_status = 0; 2955 mii->mii_media_active = IFM_NONE; 2956 tlp_pnic_nway_service(sc, MII_POLLSTAT); 2957 ifmr->ifm_status = sc->sc_mii.mii_media_status; 2958 ifmr->ifm_active = sc->sc_mii.mii_media_active; 2959 } 2960 } 2961 2962 int 2963 tlp_pnic_tmsw_set(sc) 2964 struct tulip_softc *sc; 2965 { 2966 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2967 struct mii_data *mii = &sc->sc_mii; 2968 2969 if (sc->sc_flags & TULIPF_HAS_MII) 2970 return (tlp_mii_setmedia(sc)); 2971 2972 if (ifp->if_flags & IFF_UP) { 2973 mii->mii_media_status = 0; 2974 mii->mii_media_active = IFM_NONE; 2975 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 2976 } 2977 2978 return (0); 2979 } 2980 2981 void 2982 tlp_pnic_nway_statchg(self) 2983 struct device *self; 2984 { 2985 struct tulip_softc *sc = (struct tulip_softc *)self; 2986 2987 /* Idle the transmit and receive processes. */ 2988 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2989 2990 /* 2991 * XXX What about Heartbeat Disable? Is it magically frobbed 2992 * XXX by the PHY? I hope so... 2993 */ 2994 2995 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 2996 OPMODE_SCR); 2997 2998 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 2999 sc->sc_opmode |= OPMODE_TTM; 3000 TULIP_WRITE(sc, CSR_GPP, 3001 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 3002 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3003 } else { 3004 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR; 3005 TULIP_WRITE(sc, CSR_GPP, 3006 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 3007 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 3008 } 3009 3010 if (sc->sc_mii.mii_media_active & IFM_FDX) 3011 sc->sc_opmode |= OPMODE_FD; 3012 3013 /* 3014 * Write new OPMODE bits. This also restarts the transmit 3015 * and receive processes. 3016 */ 3017 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3018 3019 /* XXX Update ifp->if_baudrate */ 3020 } 3021 3022 void 3023 tlp_pnic_nway_tick(arg) 3024 void *arg; 3025 { 3026 struct tulip_softc *sc = arg; 3027 int s; 3028 3029 s = splnet(); 3030 tlp_pnic_nway_service(sc, MII_TICK); 3031 splx(s); 3032 3033 timeout(tlp_pnic_nway_tick, sc, hz); 3034 } 3035 3036 /* 3037 * Support for the Lite-On PNIC internal NWay block. This is constructed 3038 * somewhat like a PHY driver for simplicity. 3039 */ 3040 3041 int 3042 tlp_pnic_nway_service(sc, cmd) 3043 struct tulip_softc *sc; 3044 int cmd; 3045 { 3046 struct mii_data *mii = &sc->sc_mii; 3047 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3048 3049 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 3050 return (0); 3051 3052 switch (cmd) { 3053 case MII_POLLSTAT: 3054 /* Nothing special to do here. */ 3055 break; 3056 3057 case MII_MEDIACHG: 3058 switch (IFM_SUBTYPE(ife->ifm_media)) { 3059 case IFM_AUTO: 3060 (void) tlp_pnic_nway_auto(sc, 1); 3061 break; 3062 case IFM_100_T4: 3063 /* 3064 * XXX Not supported as a manual setting right now. 3065 */ 3066 return (EINVAL); 3067 default: 3068 /* 3069 * NWAY register data is stored in the ifmedia entry. 3070 */ 3071 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3072 } 3073 break; 3074 3075 case MII_TICK: 3076 /* 3077 * Only used for autonegotiation. 3078 */ 3079 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3080 return (0); 3081 3082 /* 3083 * Check to see if we have link. If we do, we don't 3084 * need to restart the autonegotiation process. 3085 */ 3086 if (sc->sc_flags & TULIPF_LINK_UP) 3087 return (0); 3088 3089 /* 3090 * Only retry autonegotiation every 5 seconds. 3091 */ 3092 if (++sc->sc_nway_ticks != 5) 3093 return (0); 3094 3095 sc->sc_nway_ticks = 0; 3096 tlp_pnic_nway_reset(sc); 3097 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 3098 return (0); 3099 break; 3100 } 3101 3102 /* Update the media status. */ 3103 tlp_pnic_nway_status(sc); 3104 3105 /* Callback if something changed. */ 3106 if (sc->sc_nway_active != mii->mii_media_active || 3107 cmd == MII_MEDIACHG) { 3108 (*sc->sc_statchg)(&sc->sc_dev); 3109 sc->sc_nway_active = mii->mii_media_active; 3110 } 3111 return (0); 3112 } 3113 3114 void 3115 tlp_pnic_nway_reset(sc) 3116 struct tulip_softc *sc; 3117 { 3118 3119 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 3120 delay(100); 3121 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 3122 } 3123 3124 int 3125 tlp_pnic_nway_auto(sc, waitfor) 3126 struct tulip_softc *sc; 3127 int waitfor; 3128 { 3129 struct mii_data *mii = &sc->sc_mii; 3130 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 3131 u_int32_t reg; 3132 int i; 3133 3134 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 3135 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 3136 3137 if (waitfor) { 3138 /* Wait 500ms for it to complete. */ 3139 for (i = 0; i < 500; i++) { 3140 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3141 if (reg & PNIC_NWAY_LPAR_MASK) { 3142 tlp_pnic_nway_acomp(sc); 3143 return (0); 3144 } 3145 delay(1000); 3146 } 3147 #if 0 3148 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3149 printf("%s: autonegotiation failed to complete\n", 3150 sc->sc_dev.dv_xname); 3151 #endif 3152 3153 /* 3154 * Don't need to worry about clearing DOINGAUTO. 3155 * If that's set, a timeout is pending, and it will 3156 * clear the flag. 3157 */ 3158 return (EIO); 3159 } 3160 3161 /* 3162 * Just let it finish asynchronously. This is for the benefit of 3163 * the tick handler driving autonegotiation. Don't want 500ms 3164 * delays all the time while the system is running! 3165 */ 3166 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 3167 sc->sc_flags |= TULIPF_DOINGAUTO; 3168 timeout(tlp_pnic_nway_auto_timeout, sc, hz >> 1); 3169 } 3170 return (EJUSTRETURN); 3171 } 3172 3173 void 3174 tlp_pnic_nway_auto_timeout(arg) 3175 void *arg; 3176 { 3177 struct tulip_softc *sc = arg; 3178 u_int32_t reg; 3179 int s; 3180 3181 s = splnet(); 3182 sc->sc_flags &= ~TULIPF_DOINGAUTO; 3183 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3184 #if 0 3185 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 3186 printf("%s: autonegotiation failed to complete\n", 3187 sc->sc_dev.dv_xname); 3188 #endif 3189 3190 tlp_pnic_nway_acomp(sc); 3191 3192 /* Update the media status. */ 3193 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 3194 splx(s); 3195 } 3196 3197 void 3198 tlp_pnic_nway_status(sc) 3199 struct tulip_softc *sc; 3200 { 3201 struct mii_data *mii = &sc->sc_mii; 3202 u_int32_t reg; 3203 3204 mii->mii_media_status = IFM_AVALID; 3205 mii->mii_media_active = IFM_ETHER; 3206 3207 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3208 3209 if (sc->sc_flags & TULIPF_LINK_UP) 3210 mii->mii_media_status |= IFM_ACTIVE; 3211 3212 if (reg & PNIC_NWAY_NW) { 3213 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 3214 /* Erg, still trying, I guess... */ 3215 mii->mii_media_active |= IFM_NONE; 3216 return; 3217 } 3218 3219 #if 0 3220 if (reg & PNIC_NWAY_LPAR100T4) 3221 mii->mii_media_active |= IFM_100_T4; 3222 else 3223 #endif 3224 if (reg & PNIC_NWAY_LPAR100TXFDX) 3225 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 3226 else if (reg & PNIC_NWAY_LPAR100TX) 3227 mii->mii_media_active |= IFM_100_TX; 3228 else if (reg & PNIC_NWAY_LPAR10TFDX) 3229 mii->mii_media_active |= IFM_10_T|IFM_FDX; 3230 else if (reg & PNIC_NWAY_LPAR10T) 3231 mii->mii_media_active |= IFM_10_T; 3232 else 3233 mii->mii_media_active |= IFM_NONE; 3234 } else { 3235 if (reg & PNIC_NWAY_100) 3236 mii->mii_media_active |= IFM_100_TX; 3237 else 3238 mii->mii_media_active |= IFM_10_T; 3239 if (reg & PNIC_NWAY_FD) 3240 mii->mii_media_active |= IFM_FDX; 3241 } 3242 } 3243 3244 void 3245 tlp_pnic_nway_acomp(sc) 3246 struct tulip_softc *sc; 3247 { 3248 u_int32_t reg; 3249 3250 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 3251 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 3252 3253 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 3254 reg |= PNIC_NWAY_100; 3255 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 3256 reg |= PNIC_NWAY_FD; 3257 3258 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 3259 } 3260
Indexes created Mon Sep 22 13:09:51 GMT 2025