tulip.c revision 1.95 1 /* $NetBSD: tulip.c,v 1.95 2001/07/19 16:25:26 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family, and a variety of clone chips.
43 */
44
45 #include "bpfilter.h"
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/callout.h>
50 #include <sys/mbuf.h>
51 #include <sys/malloc.h>
52 #include <sys/kernel.h>
53 #include <sys/socket.h>
54 #include <sys/ioctl.h>
55 #include <sys/errno.h>
56 #include <sys/device.h>
57
58 #include <machine/endian.h>
59
60 #include <uvm/uvm_extern.h>
61
62 #include <net/if.h>
63 #include <net/if_dl.h>
64 #include <net/if_media.h>
65 #include <net/if_ether.h>
66
67 #if NBPFILTER > 0
68 #include <net/bpf.h>
69 #endif
70
71 #include <machine/bus.h>
72 #include <machine/intr.h>
73
74 #include <dev/mii/mii.h>
75 #include <dev/mii/miivar.h>
76 #include <dev/mii/mii_bitbang.h>
77
78 #include <dev/ic/tulipreg.h>
79 #include <dev/ic/tulipvar.h>
80
81 const char * const tlp_chip_names[] = TULIP_CHIP_NAMES;
82
83 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] =
84 TLP_TXTHRESH_TAB_10;
85
86 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] =
87 TLP_TXTHRESH_TAB_10_100;
88
89 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] =
90 TLP_TXTHRESH_TAB_WINB;
91
92 const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] =
93 TLP_TXTHRESH_TAB_DM9102;
94
95 void tlp_start __P((struct ifnet *));
96 void tlp_watchdog __P((struct ifnet *));
97 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t));
98 int tlp_init __P((struct ifnet *));
99 void tlp_stop __P((struct ifnet *, int));
100
101 void tlp_shutdown __P((void *));
102
103 void tlp_reset __P((struct tulip_softc *));
104 void tlp_rxdrain __P((struct tulip_softc *));
105 int tlp_add_rxbuf __P((struct tulip_softc *, int));
106 void tlp_idle __P((struct tulip_softc *, u_int32_t));
107 void tlp_srom_idle __P((struct tulip_softc *));
108 int tlp_srom_size __P((struct tulip_softc *));
109
110 int tlp_enable __P((struct tulip_softc *));
111 void tlp_disable __P((struct tulip_softc *));
112 void tlp_power __P((int, void *));
113
114 void tlp_filter_setup __P((struct tulip_softc *));
115 void tlp_winb_filter_setup __P((struct tulip_softc *));
116 void tlp_al981_filter_setup __P((struct tulip_softc *));
117
118 void tlp_rxintr __P((struct tulip_softc *));
119 void tlp_txintr __P((struct tulip_softc *));
120
121 void tlp_mii_tick __P((void *));
122 void tlp_mii_statchg __P((struct device *));
123 void tlp_winb_mii_statchg __P((struct device *));
124 void tlp_dm9102_mii_statchg __P((struct device *));
125
126 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *));
127 int tlp_mii_setmedia __P((struct tulip_softc *));
128
129 int tlp_bitbang_mii_readreg __P((struct device *, int, int));
130 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int));
131
132 int tlp_pnic_mii_readreg __P((struct device *, int, int));
133 void tlp_pnic_mii_writereg __P((struct device *, int, int, int));
134
135 int tlp_al981_mii_readreg __P((struct device *, int, int));
136 void tlp_al981_mii_writereg __P((struct device *, int, int, int));
137
138 void tlp_2114x_preinit __P((struct tulip_softc *));
139 void tlp_2114x_mii_preinit __P((struct tulip_softc *));
140 void tlp_pnic_preinit __P((struct tulip_softc *));
141 void tlp_dm9102_preinit __P((struct tulip_softc *));
142
143 void tlp_21140_reset __P((struct tulip_softc *));
144 void tlp_21142_reset __P((struct tulip_softc *));
145 void tlp_pmac_reset __P((struct tulip_softc *));
146 void tlp_dm9102_reset __P((struct tulip_softc *));
147
148 #define tlp_mchash(addr, sz) \
149 (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1))
150
151 /*
152 * MII bit-bang glue.
153 */
154 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *));
155 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t));
156
157 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = {
158 tlp_sio_mii_bitbang_read,
159 tlp_sio_mii_bitbang_write,
160 {
161 MIIROM_MDO, /* MII_BIT_MDO */
162 MIIROM_MDI, /* MII_BIT_MDI */
163 MIIROM_MDC, /* MII_BIT_MDC */
164 0, /* MII_BIT_DIR_HOST_PHY */
165 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */
166 }
167 };
168
169 #ifdef TLP_DEBUG
170 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \
171 printf x
172 #else
173 #define DPRINTF(sc, x) /* nothing */
174 #endif
175
176 #ifdef TLP_STATS
177 void tlp_print_stats __P((struct tulip_softc *));
178 #endif
179
180 /*
181 * Can be used to debug the SROM-related things, including contents.
182 * Initialized so that it's patchable.
183 */
184 int tlp_srom_debug = 0;
185
186 /*
187 * tlp_attach:
188 *
189 * Attach a Tulip interface to the system.
190 */
191 void
192 tlp_attach(sc, enaddr)
193 struct tulip_softc *sc;
194 const u_int8_t *enaddr;
195 {
196 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
197 int i, error;
198
199 callout_init(&sc->sc_nway_callout);
200 callout_init(&sc->sc_tick_callout);
201
202 /*
203 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift!
204 */
205
206 /*
207 * Setup the transmit threshold table.
208 */
209 switch (sc->sc_chip) {
210 case TULIP_CHIP_DE425:
211 case TULIP_CHIP_21040:
212 case TULIP_CHIP_21041:
213 sc->sc_txth = tlp_10_txthresh_tab;
214 break;
215
216 case TULIP_CHIP_DM9102:
217 case TULIP_CHIP_DM9102A:
218 sc->sc_txth = tlp_dm9102_txthresh_tab;
219 break;
220
221 default:
222 sc->sc_txth = tlp_10_100_txthresh_tab;
223 break;
224 }
225
226 /*
227 * Setup the filter setup function.
228 */
229 switch (sc->sc_chip) {
230 case TULIP_CHIP_WB89C840F:
231 sc->sc_filter_setup = tlp_winb_filter_setup;
232 break;
233
234 case TULIP_CHIP_AL981:
235 case TULIP_CHIP_AN983:
236 case TULIP_CHIP_AN985:
237 sc->sc_filter_setup = tlp_al981_filter_setup;
238 break;
239
240 default:
241 sc->sc_filter_setup = tlp_filter_setup;
242 break;
243 }
244
245 /*
246 * Set up the media status change function.
247 */
248 switch (sc->sc_chip) {
249 case TULIP_CHIP_WB89C840F:
250 sc->sc_statchg = tlp_winb_mii_statchg;
251 break;
252
253 case TULIP_CHIP_DM9102:
254 case TULIP_CHIP_DM9102A:
255 sc->sc_statchg = tlp_dm9102_mii_statchg;
256 break;
257
258 default:
259 /*
260 * We may override this if we have special media
261 * handling requirements (e.g. flipping GPIO pins).
262 *
263 * The pure-MII statchg function covers the basics.
264 */
265 sc->sc_statchg = tlp_mii_statchg;
266 break;
267 }
268
269 /*
270 * Default to no FS|LS in setup packet descriptors. They're
271 * supposed to be zero according to the 21040 and 21143
272 * manuals, and some chips fall over badly if they're
273 * included. Yet, other chips seem to require them. Sigh.
274 */
275 switch (sc->sc_chip) {
276 case TULIP_CHIP_X3201_3:
277 sc->sc_setup_fsls = TDCTL_Tx_FS|TDCTL_Tx_LS;
278 break;
279
280 default:
281 sc->sc_setup_fsls = 0;
282 }
283
284 /*
285 * Set up various chip-specific quirks.
286 *
287 * Note that wherever we can, we use the "ring" option for
288 * transmit and receive descriptors. This is because some
289 * clone chips apparently have problems when using chaining,
290 * although some *only* support chaining.
291 *
292 * What we do is always program the "next" pointer, and then
293 * conditionally set the TDCTL_CH and TDCTL_ER bits in the
294 * appropriate places.
295 */
296 switch (sc->sc_chip) {
297 case TULIP_CHIP_21140:
298 case TULIP_CHIP_21140A:
299 case TULIP_CHIP_21142:
300 case TULIP_CHIP_21143:
301 case TULIP_CHIP_82C115: /* 21143-like */
302 case TULIP_CHIP_MX98713: /* 21140-like */
303 case TULIP_CHIP_MX98713A: /* 21143-like */
304 case TULIP_CHIP_MX98715: /* 21143-like */
305 case TULIP_CHIP_MX98715A: /* 21143-like */
306 case TULIP_CHIP_MX98715AEC_X: /* 21143-like */
307 case TULIP_CHIP_MX98725: /* 21143-like */
308 /*
309 * Run these chips in ring mode.
310 */
311 sc->sc_tdctl_ch = 0;
312 sc->sc_tdctl_er = TDCTL_ER;
313 sc->sc_preinit = tlp_2114x_preinit;
314 break;
315
316 case TULIP_CHIP_82C168:
317 case TULIP_CHIP_82C169:
318 /*
319 * Run these chips in ring mode.
320 */
321 sc->sc_tdctl_ch = 0;
322 sc->sc_tdctl_er = TDCTL_ER;
323 sc->sc_preinit = tlp_pnic_preinit;
324
325 /*
326 * These chips seem to have busted DMA engines; just put them
327 * in Store-and-Forward mode from the get-go.
328 */
329 sc->sc_txthresh = TXTH_SF;
330 break;
331
332 case TULIP_CHIP_WB89C840F:
333 /*
334 * Run this chip in chained mode.
335 */
336 sc->sc_tdctl_ch = TDCTL_CH;
337 sc->sc_tdctl_er = 0;
338 sc->sc_flags |= TULIPF_IC_FS;
339 break;
340
341 case TULIP_CHIP_DM9102:
342 case TULIP_CHIP_DM9102A:
343 /*
344 * Run these chips in chained mode.
345 */
346 sc->sc_tdctl_ch = TDCTL_CH;
347 sc->sc_tdctl_er = 0;
348 sc->sc_preinit = tlp_dm9102_preinit;
349
350 /*
351 * These chips have a broken bus interface, so we
352 * can't use any optimized bus commands. For this
353 * reason, we tend to underrun pretty quickly, so
354 * just to Store-and-Forward mode from the get-go.
355 */
356 sc->sc_txthresh = TXTH_DM9102_SF;
357 break;
358
359 default:
360 /*
361 * Default to running in ring mode.
362 */
363 sc->sc_tdctl_ch = 0;
364 sc->sc_tdctl_er = TDCTL_ER;
365 }
366
367 /*
368 * Set up the MII bit-bang operations.
369 */
370 switch (sc->sc_chip) {
371 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */
372 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
373 break;
374
375 default:
376 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
377 }
378
379 SIMPLEQ_INIT(&sc->sc_txfreeq);
380 SIMPLEQ_INIT(&sc->sc_txdirtyq);
381
382 /*
383 * Allocate the control data structures, and create and load the
384 * DMA map for it.
385 */
386 if ((error = bus_dmamem_alloc(sc->sc_dmat,
387 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg,
388 1, &sc->sc_cdnseg, 0)) != 0) {
389 printf("%s: unable to allocate control data, error = %d\n",
390 sc->sc_dev.dv_xname, error);
391 goto fail_0;
392 }
393
394 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg,
395 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data,
396 BUS_DMA_COHERENT)) != 0) {
397 printf("%s: unable to map control data, error = %d\n",
398 sc->sc_dev.dv_xname, error);
399 goto fail_1;
400 }
401
402 if ((error = bus_dmamap_create(sc->sc_dmat,
403 sizeof(struct tulip_control_data), 1,
404 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
405 printf("%s: unable to create control data DMA map, "
406 "error = %d\n", sc->sc_dev.dv_xname, error);
407 goto fail_2;
408 }
409
410 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
411 sc->sc_control_data, sizeof(struct tulip_control_data), NULL,
412 0)) != 0) {
413 printf("%s: unable to load control data DMA map, error = %d\n",
414 sc->sc_dev.dv_xname, error);
415 goto fail_3;
416 }
417
418 /*
419 * Create the transmit buffer DMA maps.
420 *
421 * Note that on the Xircom clone, transmit buffers must be
422 * 4-byte aligned. We're almost guaranteed to have to copy
423 * the packet in that case, so we just limit ourselves to
424 * one segment.
425 *
426 * On the DM9102, the transmit logic can only handle one
427 * DMA segment.
428 */
429 switch (sc->sc_chip) {
430 case TULIP_CHIP_X3201_3:
431 case TULIP_CHIP_DM9102:
432 case TULIP_CHIP_DM9102A:
433 sc->sc_ntxsegs = 1;
434 break;
435
436 default:
437 sc->sc_ntxsegs = TULIP_NTXSEGS;
438 }
439 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
440 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
441 sc->sc_ntxsegs, MCLBYTES, 0, 0,
442 &sc->sc_txsoft[i].txs_dmamap)) != 0) {
443 printf("%s: unable to create tx DMA map %d, "
444 "error = %d\n", sc->sc_dev.dv_xname, i, error);
445 goto fail_4;
446 }
447 }
448
449 /*
450 * Create the receive buffer DMA maps.
451 */
452 for (i = 0; i < TULIP_NRXDESC; i++) {
453 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
454 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
455 printf("%s: unable to create rx DMA map %d, "
456 "error = %d\n", sc->sc_dev.dv_xname, i, error);
457 goto fail_5;
458 }
459 sc->sc_rxsoft[i].rxs_mbuf = NULL;
460 }
461
462 /*
463 * From this point forward, the attachment cannot fail. A failure
464 * before this point releases all resources that may have been
465 * allocated.
466 */
467 sc->sc_flags |= TULIPF_ATTACHED;
468
469 /*
470 * Reset the chip to a known state.
471 */
472 tlp_reset(sc);
473
474 /* Announce ourselves. */
475 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname,
476 sc->sc_name[0] != '\0' ? sc->sc_name : "",
477 sc->sc_name[0] != '\0' ? ", " : "",
478 ether_sprintf(enaddr));
479
480 /*
481 * Initialize our media structures. This may probe the MII, if
482 * present.
483 */
484 (*sc->sc_mediasw->tmsw_init)(sc);
485
486 strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
487 ifp->if_softc = sc;
488 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
489 ifp->if_ioctl = tlp_ioctl;
490 ifp->if_start = tlp_start;
491 ifp->if_watchdog = tlp_watchdog;
492 ifp->if_init = tlp_init;
493 ifp->if_stop = tlp_stop;
494 IFQ_SET_READY(&ifp->if_snd);
495
496 /*
497 * We can support 802.1Q VLAN-sized frames.
498 */
499 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
500
501 /*
502 * Attach the interface.
503 */
504 if_attach(ifp);
505 ether_ifattach(ifp, enaddr);
506 #if NRND > 0
507 rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname,
508 RND_TYPE_NET, 0);
509 #endif
510
511 /*
512 * Make sure the interface is shutdown during reboot.
513 */
514 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc);
515 if (sc->sc_sdhook == NULL)
516 printf("%s: WARNING: unable to establish shutdown hook\n",
517 sc->sc_dev.dv_xname);
518
519 /*
520 * Add a suspend hook to make sure we come back up after a
521 * resume.
522 */
523 sc->sc_powerhook = powerhook_establish(tlp_power, sc);
524 if (sc->sc_powerhook == NULL)
525 printf("%s: WARNING: unable to establish power hook\n",
526 sc->sc_dev.dv_xname);
527 return;
528
529 /*
530 * Free any resources we've allocated during the failed attach
531 * attempt. Do this in reverse order and fall through.
532 */
533 fail_5:
534 for (i = 0; i < TULIP_NRXDESC; i++) {
535 if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
536 bus_dmamap_destroy(sc->sc_dmat,
537 sc->sc_rxsoft[i].rxs_dmamap);
538 }
539 fail_4:
540 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
541 if (sc->sc_txsoft[i].txs_dmamap != NULL)
542 bus_dmamap_destroy(sc->sc_dmat,
543 sc->sc_txsoft[i].txs_dmamap);
544 }
545 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
546 fail_3:
547 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
548 fail_2:
549 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
550 sizeof(struct tulip_control_data));
551 fail_1:
552 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg);
553 fail_0:
554 return;
555 }
556
557 /*
558 * tlp_activate:
559 *
560 * Handle device activation/deactivation requests.
561 */
562 int
563 tlp_activate(self, act)
564 struct device *self;
565 enum devact act;
566 {
567 struct tulip_softc *sc = (void *) self;
568 int s, error = 0;
569
570 s = splnet();
571 switch (act) {
572 case DVACT_ACTIVATE:
573 error = EOPNOTSUPP;
574 break;
575
576 case DVACT_DEACTIVATE:
577 if (sc->sc_flags & TULIPF_HAS_MII)
578 mii_activate(&sc->sc_mii, act, MII_PHY_ANY,
579 MII_OFFSET_ANY);
580 if_deactivate(&sc->sc_ethercom.ec_if);
581 break;
582 }
583 splx(s);
584
585 return (error);
586 }
587
588 /*
589 * tlp_detach:
590 *
591 * Detach a Tulip interface.
592 */
593 int
594 tlp_detach(sc)
595 struct tulip_softc *sc;
596 {
597 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
598 struct tulip_rxsoft *rxs;
599 struct tulip_txsoft *txs;
600 int i;
601
602 /*
603 * Suceed now if there isn't any work to do.
604 */
605 if ((sc->sc_flags & TULIPF_ATTACHED) == 0)
606 return (0);
607
608 /* Unhook our tick handler. */
609 if (sc->sc_tick)
610 callout_stop(&sc->sc_tick_callout);
611
612 if (sc->sc_flags & TULIPF_HAS_MII) {
613 /* Detach all PHYs */
614 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
615 }
616
617 /* Delete all remaining media. */
618 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
619
620 #if NRND > 0
621 rnd_detach_source(&sc->sc_rnd_source);
622 #endif
623 ether_ifdetach(ifp);
624 if_detach(ifp);
625
626 for (i = 0; i < TULIP_NRXDESC; i++) {
627 rxs = &sc->sc_rxsoft[i];
628 if (rxs->rxs_mbuf != NULL) {
629 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
630 m_freem(rxs->rxs_mbuf);
631 rxs->rxs_mbuf = NULL;
632 }
633 bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap);
634 }
635 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
636 txs = &sc->sc_txsoft[i];
637 if (txs->txs_mbuf != NULL) {
638 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
639 m_freem(txs->txs_mbuf);
640 txs->txs_mbuf = NULL;
641 }
642 bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap);
643 }
644 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
645 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
646 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
647 sizeof(struct tulip_control_data));
648 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg);
649
650 shutdownhook_disestablish(sc->sc_sdhook);
651 powerhook_disestablish(sc->sc_powerhook);
652
653 if (sc->sc_srom)
654 free(sc->sc_srom, M_DEVBUF);
655
656 return (0);
657 }
658
659 /*
660 * tlp_shutdown:
661 *
662 * Make sure the interface is stopped at reboot time.
663 */
664 void
665 tlp_shutdown(arg)
666 void *arg;
667 {
668 struct tulip_softc *sc = arg;
669
670 tlp_stop(&sc->sc_ethercom.ec_if, 1);
671 }
672
673 /*
674 * tlp_start: [ifnet interface function]
675 *
676 * Start packet transmission on the interface.
677 */
678 void
679 tlp_start(ifp)
680 struct ifnet *ifp;
681 {
682 struct tulip_softc *sc = ifp->if_softc;
683 struct mbuf *m0, *m;
684 struct tulip_txsoft *txs, *last_txs;
685 bus_dmamap_t dmamap;
686 int error, firsttx, nexttx, lasttx, ofree, seg;
687
688 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n",
689 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags));
690
691 /*
692 * If we want a filter setup, it means no more descriptors were
693 * available for the setup routine. Let it get a chance to wedge
694 * itself into the ring.
695 */
696 if (sc->sc_flags & TULIPF_WANT_SETUP)
697 ifp->if_flags |= IFF_OACTIVE;
698
699 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
700 return;
701
702 /*
703 * Remember the previous number of free descriptors and
704 * the first descriptor we'll use.
705 */
706 ofree = sc->sc_txfree;
707 firsttx = sc->sc_txnext;
708
709 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n",
710 sc->sc_dev.dv_xname, ofree, firsttx));
711
712 /*
713 * Loop through the send queue, setting up transmit descriptors
714 * until we drain the queue, or use up all available transmit
715 * descriptors.
716 */
717 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL &&
718 sc->sc_txfree != 0) {
719 /*
720 * Grab a packet off the queue.
721 */
722 IFQ_POLL(&ifp->if_snd, m0);
723 if (m0 == NULL)
724 break;
725 m = NULL;
726
727 dmamap = txs->txs_dmamap;
728
729 /*
730 * Load the DMA map. If this fails, the packet either
731 * didn't fit in the alloted number of segments, or we were
732 * short on resources. In this case, we'll copy and try
733 * again.
734 *
735 * Note that if we're only allowed 1 Tx segment, we
736 * have an alignment restriction. Do this test before
737 * attempting to load the DMA map, because it's more
738 * likely we'll trip the alignment test than the
739 * more-than-one-segment test.
740 */
741 if ((sc->sc_ntxsegs == 1 && (mtod(m0, bus_addr_t) & 3) != 0) ||
742 bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
743 BUS_DMA_WRITE|BUS_DMA_NOWAIT) != 0) {
744 MGETHDR(m, M_DONTWAIT, MT_DATA);
745 if (m == NULL) {
746 printf("%s: unable to allocate Tx mbuf\n",
747 sc->sc_dev.dv_xname);
748 break;
749 }
750 if (m0->m_pkthdr.len > MHLEN) {
751 MCLGET(m, M_DONTWAIT);
752 if ((m->m_flags & M_EXT) == 0) {
753 printf("%s: unable to allocate Tx "
754 "cluster\n", sc->sc_dev.dv_xname);
755 m_freem(m);
756 break;
757 }
758 }
759 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
760 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
761 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
762 m, BUS_DMA_WRITE|BUS_DMA_NOWAIT);
763 if (error) {
764 printf("%s: unable to load Tx buffer, "
765 "error = %d\n", sc->sc_dev.dv_xname, error);
766 break;
767 }
768 }
769
770 /*
771 * Ensure we have enough descriptors free to describe
772 * the packet.
773 */
774 if (dmamap->dm_nsegs > sc->sc_txfree) {
775 /*
776 * Not enough free descriptors to transmit this
777 * packet. We haven't committed to anything yet,
778 * so just unload the DMA map, put the packet
779 * back on the queue, and punt. Notify the upper
780 * layer that there are no more slots left.
781 *
782 * XXX We could allocate an mbuf and copy, but
783 * XXX it is worth it?
784 */
785 ifp->if_flags |= IFF_OACTIVE;
786 bus_dmamap_unload(sc->sc_dmat, dmamap);
787 if (m != NULL)
788 m_freem(m);
789 break;
790 }
791
792 IFQ_DEQUEUE(&ifp->if_snd, m0);
793 if (m != NULL) {
794 m_freem(m0);
795 m0 = m;
796 }
797
798 /*
799 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET.
800 */
801
802 /* Sync the DMA map. */
803 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
804 BUS_DMASYNC_PREWRITE);
805
806 /*
807 * Initialize the transmit descriptors.
808 */
809 for (nexttx = sc->sc_txnext, seg = 0;
810 seg < dmamap->dm_nsegs;
811 seg++, nexttx = TULIP_NEXTTX(nexttx)) {
812 /*
813 * If this is the first descriptor we're
814 * enqueueing, don't set the OWN bit just
815 * yet. That could cause a race condition.
816 * We'll do it below.
817 */
818 sc->sc_txdescs[nexttx].td_status =
819 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN);
820 sc->sc_txdescs[nexttx].td_bufaddr1 =
821 htole32(dmamap->dm_segs[seg].ds_addr);
822 sc->sc_txdescs[nexttx].td_ctl =
823 htole32((dmamap->dm_segs[seg].ds_len <<
824 TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch |
825 (nexttx == (TULIP_NTXDESC - 1) ?
826 sc->sc_tdctl_er : 0));
827 lasttx = nexttx;
828 }
829
830 /* Set `first segment' and `last segment' appropriately. */
831 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS);
832 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS);
833
834 #ifdef TLP_DEBUG
835 if (ifp->if_flags & IFF_DEBUG) {
836 printf(" txsoft %p transmit chain:\n", txs);
837 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) {
838 printf(" descriptor %d:\n", seg);
839 printf(" td_status: 0x%08x\n",
840 le32toh(sc->sc_txdescs[seg].td_status));
841 printf(" td_ctl: 0x%08x\n",
842 le32toh(sc->sc_txdescs[seg].td_ctl));
843 printf(" td_bufaddr1: 0x%08x\n",
844 le32toh(sc->sc_txdescs[seg].td_bufaddr1));
845 printf(" td_bufaddr2: 0x%08x\n",
846 le32toh(sc->sc_txdescs[seg].td_bufaddr2));
847 if (seg == lasttx)
848 break;
849 }
850 }
851 #endif
852
853 /* Sync the descriptors we're using. */
854 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
855 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
856
857 /*
858 * Store a pointer to the packet so we can free it later,
859 * and remember what txdirty will be once the packet is
860 * done.
861 */
862 txs->txs_mbuf = m0;
863 txs->txs_firstdesc = sc->sc_txnext;
864 txs->txs_lastdesc = lasttx;
865 txs->txs_ndescs = dmamap->dm_nsegs;
866
867 /* Advance the tx pointer. */
868 sc->sc_txfree -= dmamap->dm_nsegs;
869 sc->sc_txnext = nexttx;
870
871 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q);
872 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
873
874 last_txs = txs;
875
876 #if NBPFILTER > 0
877 /*
878 * Pass the packet to any BPF listeners.
879 */
880 if (ifp->if_bpf)
881 bpf_mtap(ifp->if_bpf, m0);
882 #endif /* NBPFILTER > 0 */
883 }
884
885 if (txs == NULL || sc->sc_txfree == 0) {
886 /* No more slots left; notify upper layer. */
887 ifp->if_flags |= IFF_OACTIVE;
888 }
889
890 if (sc->sc_txfree != ofree) {
891 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n",
892 sc->sc_dev.dv_xname, lasttx, firsttx));
893 /*
894 * Cause a transmit interrupt to happen on the
895 * last packet we enqueued.
896 */
897 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC);
898 TULIP_CDTXSYNC(sc, lasttx, 1,
899 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
900
901 /*
902 * Some clone chips want IC on the *first* segment in
903 * the packet. Appease them.
904 */
905 if ((sc->sc_flags & TULIPF_IC_FS) != 0 &&
906 last_txs->txs_firstdesc != lasttx) {
907 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |=
908 htole32(TDCTL_Tx_IC);
909 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1,
910 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
911 }
912
913 /*
914 * The entire packet chain is set up. Give the
915 * first descriptor to the chip now.
916 */
917 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN);
918 TULIP_CDTXSYNC(sc, firsttx, 1,
919 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
920
921 /* Wake up the transmitter. */
922 /* XXX USE AUTOPOLLING? */
923 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
924
925 /* Set a watchdog timer in case the chip flakes out. */
926 ifp->if_timer = 5;
927 }
928 }
929
930 /*
931 * tlp_watchdog: [ifnet interface function]
932 *
933 * Watchdog timer handler.
934 */
935 void
936 tlp_watchdog(ifp)
937 struct ifnet *ifp;
938 {
939 struct tulip_softc *sc = ifp->if_softc;
940 int doing_setup, doing_transmit;
941
942 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP);
943 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL);
944
945 if (doing_setup && doing_transmit) {
946 printf("%s: filter setup and transmit timeout\n",
947 sc->sc_dev.dv_xname);
948 ifp->if_oerrors++;
949 } else if (doing_transmit) {
950 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname);
951 ifp->if_oerrors++;
952 } else if (doing_setup)
953 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname);
954 else
955 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname);
956
957 (void) tlp_init(ifp);
958
959 /* Try to get more packets going. */
960 tlp_start(ifp);
961 }
962
963 /*
964 * tlp_ioctl: [ifnet interface function]
965 *
966 * Handle control requests from the operator.
967 */
968 int
969 tlp_ioctl(ifp, cmd, data)
970 struct ifnet *ifp;
971 u_long cmd;
972 caddr_t data;
973 {
974 struct tulip_softc *sc = ifp->if_softc;
975 struct ifreq *ifr = (struct ifreq *)data;
976 int s, error;
977
978 s = splnet();
979
980 switch (cmd) {
981 case SIOCSIFMEDIA:
982 case SIOCGIFMEDIA:
983 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
984 break;
985
986 default:
987 error = ether_ioctl(ifp, cmd, data);
988 if (error == ENETRESET) {
989 if (TULIP_IS_ENABLED(sc)) {
990 /*
991 * Multicast list has changed. Set the
992 * hardware filter accordingly.
993 */
994 (*sc->sc_filter_setup)(sc);
995 }
996 error = 0;
997 }
998 break;
999 }
1000
1001 /* Try to get more packets going. */
1002 if (TULIP_IS_ENABLED(sc))
1003 tlp_start(ifp);
1004
1005 splx(s);
1006 return (error);
1007 }
1008
1009 /*
1010 * tlp_intr:
1011 *
1012 * Interrupt service routine.
1013 */
1014 int
1015 tlp_intr(arg)
1016 void *arg;
1017 {
1018 struct tulip_softc *sc = arg;
1019 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1020 u_int32_t status, rxstatus, txstatus;
1021 int handled = 0, txthresh;
1022
1023 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname));
1024
1025 #ifdef DEBUG
1026 if (TULIP_IS_ENABLED(sc) == 0)
1027 panic("%s: tlp_intr: not enabled\n", sc->sc_dev.dv_xname);
1028 #endif
1029
1030 /*
1031 * If the interface isn't running, the interrupt couldn't
1032 * possibly have come from us.
1033 */
1034 if ((ifp->if_flags & IFF_RUNNING) == 0 ||
1035 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1036 return (0);
1037
1038 /* Disable interrupts on the DM9102 (interrupt edge bug). */
1039 switch (sc->sc_chip) {
1040 case TULIP_CHIP_DM9102:
1041 case TULIP_CHIP_DM9102A:
1042 TULIP_WRITE(sc, CSR_INTEN, 0);
1043 break;
1044
1045 default:
1046 /* Nothing. */
1047 break;
1048 }
1049
1050 for (;;) {
1051 status = TULIP_READ(sc, CSR_STATUS);
1052 if (status)
1053 TULIP_WRITE(sc, CSR_STATUS, status);
1054
1055 if ((status & sc->sc_inten) == 0)
1056 break;
1057
1058 handled = 1;
1059
1060 rxstatus = status & sc->sc_rxint_mask;
1061 txstatus = status & sc->sc_txint_mask;
1062
1063 if (rxstatus) {
1064 /* Grab new any new packets. */
1065 tlp_rxintr(sc);
1066
1067 if (rxstatus & STATUS_RWT)
1068 printf("%s: receive watchdog timeout\n",
1069 sc->sc_dev.dv_xname);
1070
1071 if (rxstatus & STATUS_RU) {
1072 printf("%s: receive ring overrun\n",
1073 sc->sc_dev.dv_xname);
1074 /* Get the receive process going again. */
1075 if (sc->sc_tdctl_er != TDCTL_ER) {
1076 tlp_idle(sc, OPMODE_SR);
1077 TULIP_WRITE(sc, CSR_RXLIST,
1078 TULIP_CDRXADDR(sc, sc->sc_rxptr));
1079 TULIP_WRITE(sc, CSR_OPMODE,
1080 sc->sc_opmode);
1081 }
1082 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
1083 break;
1084 }
1085 }
1086
1087 if (txstatus) {
1088 /* Sweep up transmit descriptors. */
1089 tlp_txintr(sc);
1090
1091 if (txstatus & STATUS_TJT)
1092 printf("%s: transmit jabber timeout\n",
1093 sc->sc_dev.dv_xname);
1094
1095 if (txstatus & STATUS_UNF) {
1096 /*
1097 * Increase our transmit threshold if
1098 * another is available.
1099 */
1100 txthresh = sc->sc_txthresh + 1;
1101 if (sc->sc_txth[txthresh].txth_name != NULL) {
1102 /* Idle the transmit process. */
1103 tlp_idle(sc, OPMODE_ST);
1104
1105 sc->sc_txthresh = txthresh;
1106 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF);
1107 sc->sc_opmode |=
1108 sc->sc_txth[txthresh].txth_opmode;
1109 printf("%s: transmit underrun; new "
1110 "threshold: %s\n",
1111 sc->sc_dev.dv_xname,
1112 sc->sc_txth[txthresh].txth_name);
1113
1114 /*
1115 * Set the new threshold and restart
1116 * the transmit process.
1117 */
1118 TULIP_WRITE(sc, CSR_OPMODE,
1119 sc->sc_opmode);
1120 }
1121 /*
1122 * XXX Log every Nth underrun from
1123 * XXX now on?
1124 */
1125 }
1126 }
1127
1128 if (status & (STATUS_TPS|STATUS_RPS)) {
1129 if (status & STATUS_TPS)
1130 printf("%s: transmit process stopped\n",
1131 sc->sc_dev.dv_xname);
1132 if (status & STATUS_RPS)
1133 printf("%s: receive process stopped\n",
1134 sc->sc_dev.dv_xname);
1135 (void) tlp_init(ifp);
1136 break;
1137 }
1138
1139 if (status & STATUS_SE) {
1140 const char *str;
1141 switch (status & STATUS_EB) {
1142 case STATUS_EB_PARITY:
1143 str = "parity error";
1144 break;
1145
1146 case STATUS_EB_MABT:
1147 str = "master abort";
1148 break;
1149
1150 case STATUS_EB_TABT:
1151 str = "target abort";
1152 break;
1153
1154 default:
1155 str = "unknown error";
1156 break;
1157 }
1158 printf("%s: fatal system error: %s\n",
1159 sc->sc_dev.dv_xname, str);
1160 (void) tlp_init(ifp);
1161 break;
1162 }
1163
1164 /*
1165 * Not handled:
1166 *
1167 * Transmit buffer unavailable -- normal
1168 * condition, nothing to do, really.
1169 *
1170 * General purpose timer experied -- we don't
1171 * use the general purpose timer.
1172 *
1173 * Early receive interrupt -- not available on
1174 * all chips, we just use RI. We also only
1175 * use single-segment receive DMA, so this
1176 * is mostly useless.
1177 */
1178 }
1179
1180 /* Bring interrupts back up on the DM9102. */
1181 switch (sc->sc_chip) {
1182 case TULIP_CHIP_DM9102:
1183 case TULIP_CHIP_DM9102A:
1184 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten);
1185 break;
1186
1187 default:
1188 /* Nothing. */
1189 break;
1190 }
1191
1192 /* Try to get more packets going. */
1193 tlp_start(ifp);
1194
1195 #if NRND > 0
1196 if (handled)
1197 rnd_add_uint32(&sc->sc_rnd_source, status);
1198 #endif
1199 return (handled);
1200 }
1201
1202 /*
1203 * tlp_rxintr:
1204 *
1205 * Helper; handle receive interrupts.
1206 */
1207 void
1208 tlp_rxintr(sc)
1209 struct tulip_softc *sc;
1210 {
1211 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1212 struct ether_header *eh;
1213 struct tulip_rxsoft *rxs;
1214 struct mbuf *m;
1215 u_int32_t rxstat;
1216 int i, len;
1217
1218 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) {
1219 rxs = &sc->sc_rxsoft[i];
1220
1221 TULIP_CDRXSYNC(sc, i,
1222 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1223
1224 rxstat = le32toh(sc->sc_rxdescs[i].td_status);
1225
1226 if (rxstat & TDSTAT_OWN) {
1227 /*
1228 * We have processed all of the receive buffers.
1229 */
1230 break;
1231 }
1232
1233 /*
1234 * Make sure the packet fit in one buffer. This should
1235 * always be the case. But the Lite-On PNIC, rev 33
1236 * has an awful receive engine bug, which may require
1237 * a very icky work-around.
1238 */
1239 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) !=
1240 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) {
1241 printf("%s: incoming packet spilled, resetting\n",
1242 sc->sc_dev.dv_xname);
1243 (void) tlp_init(ifp);
1244 return;
1245 }
1246
1247 /*
1248 * If any collisions were seen on the wire, count one.
1249 */
1250 if (rxstat & TDSTAT_Rx_CS)
1251 ifp->if_collisions++;
1252
1253 /*
1254 * If an error occured, update stats, clear the status
1255 * word, and leave the packet buffer in place. It will
1256 * simply be reused the next time the ring comes around.
1257 * If 802.1Q VLAN MTU is enabled, ignore the Frame Too Long
1258 * error.
1259 */
1260 if (rxstat & TDSTAT_ES &&
1261 ((sc->sc_ethercom.ec_capenable & ETHERCAP_VLAN_MTU) == 0 ||
1262 (rxstat & (TDSTAT_Rx_DE | TDSTAT_Rx_RF |
1263 TDSTAT_Rx_DB | TDSTAT_Rx_CE)) != 0)) {
1264 #define PRINTERR(bit, str) \
1265 if (rxstat & (bit)) \
1266 printf("%s: receive error: %s\n", \
1267 sc->sc_dev.dv_xname, str)
1268 ifp->if_ierrors++;
1269 PRINTERR(TDSTAT_Rx_DE, "descriptor error");
1270 PRINTERR(TDSTAT_Rx_RF, "runt frame");
1271 PRINTERR(TDSTAT_Rx_TL, "frame too long");
1272 PRINTERR(TDSTAT_Rx_RE, "MII error");
1273 PRINTERR(TDSTAT_Rx_DB, "dribbling bit");
1274 PRINTERR(TDSTAT_Rx_CE, "CRC error");
1275 #undef PRINTERR
1276 TULIP_INIT_RXDESC(sc, i);
1277 continue;
1278 }
1279
1280 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1281 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1282
1283 /*
1284 * No errors; receive the packet. Note the Tulip
1285 * includes the CRC with every packet.
1286 */
1287 len = TDSTAT_Rx_LENGTH(rxstat);
1288
1289 #ifdef __NO_STRICT_ALIGNMENT
1290 /*
1291 * Allocate a new mbuf cluster. If that fails, we are
1292 * out of memory, and must drop the packet and recycle
1293 * the buffer that's already attached to this descriptor.
1294 */
1295 m = rxs->rxs_mbuf;
1296 if (tlp_add_rxbuf(sc, i) != 0) {
1297 ifp->if_ierrors++;
1298 TULIP_INIT_RXDESC(sc, i);
1299 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1300 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1301 continue;
1302 }
1303 #else
1304 /*
1305 * The Tulip's receive buffers must be 4-byte aligned.
1306 * But this means that the data after the Ethernet header
1307 * is misaligned. We must allocate a new buffer and
1308 * copy the data, shifted forward 2 bytes.
1309 */
1310 MGETHDR(m, M_DONTWAIT, MT_DATA);
1311 if (m == NULL) {
1312 dropit:
1313 ifp->if_ierrors++;
1314 TULIP_INIT_RXDESC(sc, i);
1315 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1316 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1317 continue;
1318 }
1319 if (len > (MHLEN - 2)) {
1320 MCLGET(m, M_DONTWAIT);
1321 if ((m->m_flags & M_EXT) == 0) {
1322 m_freem(m);
1323 goto dropit;
1324 }
1325 }
1326 m->m_data += 2;
1327
1328 /*
1329 * Note that we use clusters for incoming frames, so the
1330 * buffer is virtually contiguous.
1331 */
1332 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len);
1333
1334 /* Allow the receive descriptor to continue using its mbuf. */
1335 TULIP_INIT_RXDESC(sc, i);
1336 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
1337 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1338 #endif /* __NO_STRICT_ALIGNMENT */
1339
1340 ifp->if_ipackets++;
1341 eh = mtod(m, struct ether_header *);
1342 m->m_flags |= M_HASFCS;
1343 m->m_pkthdr.rcvif = ifp;
1344 m->m_pkthdr.len = m->m_len = len;
1345
1346 #if NBPFILTER > 0
1347 /*
1348 * Pass this up to any BPF listeners, but only
1349 * pass it up the stack if its for us.
1350 */
1351 if (ifp->if_bpf)
1352 bpf_mtap(ifp->if_bpf, m);
1353 #endif /* NPBFILTER > 0 */
1354
1355 /*
1356 * We sometimes have to run the 21140 in Hash-Only
1357 * mode. If we're in that mode, and not in promiscuous
1358 * mode, and we have a unicast packet that isn't for
1359 * us, then drop it.
1360 */
1361 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY &&
1362 (ifp->if_flags & IFF_PROMISC) == 0 &&
1363 ETHER_IS_MULTICAST(eh->ether_dhost) == 0 &&
1364 memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost,
1365 ETHER_ADDR_LEN) != 0) {
1366 m_freem(m);
1367 continue;
1368 }
1369
1370 /* Pass it on. */
1371 (*ifp->if_input)(ifp, m);
1372 }
1373
1374 /* Update the receive pointer. */
1375 sc->sc_rxptr = i;
1376 }
1377
1378 /*
1379 * tlp_txintr:
1380 *
1381 * Helper; handle transmit interrupts.
1382 */
1383 void
1384 tlp_txintr(sc)
1385 struct tulip_softc *sc;
1386 {
1387 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1388 struct tulip_txsoft *txs;
1389 u_int32_t txstat;
1390
1391 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n",
1392 sc->sc_dev.dv_xname, sc->sc_flags));
1393
1394 ifp->if_flags &= ~IFF_OACTIVE;
1395
1396 /*
1397 * Go through our Tx list and free mbufs for those
1398 * frames that have been transmitted.
1399 */
1400 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
1401 TULIP_CDTXSYNC(sc, txs->txs_lastdesc,
1402 txs->txs_ndescs,
1403 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1404
1405 #ifdef TLP_DEBUG
1406 if (ifp->if_flags & IFF_DEBUG) {
1407 int i;
1408 printf(" txsoft %p transmit chain:\n", txs);
1409 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) {
1410 printf(" descriptor %d:\n", i);
1411 printf(" td_status: 0x%08x\n",
1412 le32toh(sc->sc_txdescs[i].td_status));
1413 printf(" td_ctl: 0x%08x\n",
1414 le32toh(sc->sc_txdescs[i].td_ctl));
1415 printf(" td_bufaddr1: 0x%08x\n",
1416 le32toh(sc->sc_txdescs[i].td_bufaddr1));
1417 printf(" td_bufaddr2: 0x%08x\n",
1418 le32toh(sc->sc_txdescs[i].td_bufaddr2));
1419 if (i == txs->txs_lastdesc)
1420 break;
1421 }
1422 }
1423 #endif
1424
1425 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status);
1426 if (txstat & TDSTAT_OWN)
1427 break;
1428
1429 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
1430
1431 sc->sc_txfree += txs->txs_ndescs;
1432
1433 if (txs->txs_mbuf == NULL) {
1434 /*
1435 * If we didn't have an mbuf, it was the setup
1436 * packet.
1437 */
1438 #ifdef DIAGNOSTIC
1439 if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0)
1440 panic("tlp_txintr: null mbuf, not doing setup");
1441 #endif
1442 TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE);
1443 sc->sc_flags &= ~TULIPF_DOING_SETUP;
1444 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1445 continue;
1446 }
1447
1448 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap,
1449 0, txs->txs_dmamap->dm_mapsize,
1450 BUS_DMASYNC_POSTWRITE);
1451 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
1452 m_freem(txs->txs_mbuf);
1453 txs->txs_mbuf = NULL;
1454
1455 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1456
1457 /*
1458 * Check for errors and collisions.
1459 */
1460 #ifdef TLP_STATS
1461 if (txstat & TDSTAT_Tx_UF)
1462 sc->sc_stats.ts_tx_uf++;
1463 if (txstat & TDSTAT_Tx_TO)
1464 sc->sc_stats.ts_tx_to++;
1465 if (txstat & TDSTAT_Tx_EC)
1466 sc->sc_stats.ts_tx_ec++;
1467 if (txstat & TDSTAT_Tx_LC)
1468 sc->sc_stats.ts_tx_lc++;
1469 #endif
1470
1471 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO))
1472 ifp->if_oerrors++;
1473
1474 if (txstat & TDSTAT_Tx_EC)
1475 ifp->if_collisions += 16;
1476 else
1477 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat);
1478 if (txstat & TDSTAT_Tx_LC)
1479 ifp->if_collisions++;
1480
1481 ifp->if_opackets++;
1482 }
1483
1484 /*
1485 * If there are no more pending transmissions, cancel the watchdog
1486 * timer.
1487 */
1488 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0)
1489 ifp->if_timer = 0;
1490
1491 /*
1492 * If we have a receive filter setup pending, do it now.
1493 */
1494 if (sc->sc_flags & TULIPF_WANT_SETUP)
1495 (*sc->sc_filter_setup)(sc);
1496 }
1497
1498 #ifdef TLP_STATS
1499 void
1500 tlp_print_stats(sc)
1501 struct tulip_softc *sc;
1502 {
1503
1504 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n",
1505 sc->sc_dev.dv_xname,
1506 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to,
1507 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc);
1508 }
1509 #endif
1510
1511 /*
1512 * tlp_reset:
1513 *
1514 * Perform a soft reset on the Tulip.
1515 */
1516 void
1517 tlp_reset(sc)
1518 struct tulip_softc *sc;
1519 {
1520 int i;
1521
1522 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR);
1523
1524 /*
1525 * Xircom clone doesn't bring itself out of reset automatically.
1526 * Instead, we have to wait at least 50 PCI cycles, and then
1527 * clear SWR.
1528 */
1529 if (sc->sc_chip == TULIP_CHIP_X3201_3) {
1530 delay(10);
1531 TULIP_WRITE(sc, CSR_BUSMODE, 0);
1532 }
1533
1534 for (i = 0; i < 1000; i++) {
1535 /*
1536 * Wait at least 50 PCI cycles for the reset to
1537 * complete before peeking at the Tulip again.
1538 * 10 uSec is a bit longer than 50 PCI cycles
1539 * (at 33MHz), but it doesn't hurt have the extra
1540 * wait.
1541 */
1542 delay(10);
1543 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0)
1544 break;
1545 }
1546
1547 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR))
1548 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname);
1549
1550 delay(1000);
1551
1552 /*
1553 * If the board has any GPIO reset sequences to issue, do them now.
1554 */
1555 if (sc->sc_reset != NULL)
1556 (*sc->sc_reset)(sc);
1557 }
1558
1559 /*
1560 * tlp_init: [ ifnet interface function ]
1561 *
1562 * Initialize the interface. Must be called at splnet().
1563 */
1564 int
1565 tlp_init(ifp)
1566 struct ifnet *ifp;
1567 {
1568 struct tulip_softc *sc = ifp->if_softc;
1569 struct tulip_txsoft *txs;
1570 struct tulip_rxsoft *rxs;
1571 int i, error = 0;
1572
1573 if ((error = tlp_enable(sc)) != 0)
1574 goto out;
1575
1576 /*
1577 * Cancel any pending I/O.
1578 */
1579 tlp_stop(ifp, 0);
1580
1581 /*
1582 * Initialize `opmode' to 0, and call the pre-init routine, if
1583 * any. This is required because the 2114x and some of the
1584 * clones require that the media-related bits in `opmode' be
1585 * set before performing a soft-reset in order to get internal
1586 * chip pathways are correct. Yay!
1587 */
1588 sc->sc_opmode = 0;
1589 if (sc->sc_preinit != NULL)
1590 (*sc->sc_preinit)(sc);
1591
1592 /*
1593 * Reset the Tulip to a known state.
1594 */
1595 tlp_reset(sc);
1596
1597 /*
1598 * Initialize the BUSMODE register.
1599 */
1600 sc->sc_busmode = BUSMODE_BAR;
1601 switch (sc->sc_chip) {
1602 case TULIP_CHIP_21140:
1603 case TULIP_CHIP_21140A:
1604 case TULIP_CHIP_21142:
1605 case TULIP_CHIP_21143:
1606 case TULIP_CHIP_82C115:
1607 case TULIP_CHIP_MX98725:
1608 /*
1609 * If we're allowed to do so, use Memory Read Line
1610 * and Memory Read Multiple.
1611 *
1612 * XXX Should we use Memory Write and Invalidate?
1613 */
1614 if (sc->sc_flags & TULIPF_MRL)
1615 sc->sc_busmode |= BUSMODE_RLE;
1616 if (sc->sc_flags & TULIPF_MRM)
1617 sc->sc_busmode |= BUSMODE_RME;
1618 #if 0
1619 if (sc->sc_flags & TULIPF_MWI)
1620 sc->sc_busmode |= BUSMODE_WLE;
1621 #endif
1622 break;
1623
1624 case TULIP_CHIP_82C168:
1625 case TULIP_CHIP_82C169:
1626 sc->sc_busmode |= BUSMODE_PNIC_MBO;
1627 if (sc->sc_maxburst == 0)
1628 sc->sc_maxburst = 16;
1629 break;
1630
1631 default:
1632 /* Nothing. */
1633 break;
1634 }
1635 switch (sc->sc_cacheline) {
1636 default:
1637 /*
1638 * Note: We must *always* set these bits; a cache
1639 * alignment of 0 is RESERVED.
1640 */
1641 case 8:
1642 sc->sc_busmode |= BUSMODE_CAL_8LW;
1643 break;
1644 case 16:
1645 sc->sc_busmode |= BUSMODE_CAL_16LW;
1646 break;
1647 case 32:
1648 sc->sc_busmode |= BUSMODE_CAL_32LW;
1649 break;
1650 }
1651 switch (sc->sc_maxburst) {
1652 case 1:
1653 sc->sc_busmode |= BUSMODE_PBL_1LW;
1654 break;
1655 case 2:
1656 sc->sc_busmode |= BUSMODE_PBL_2LW;
1657 break;
1658 case 4:
1659 sc->sc_busmode |= BUSMODE_PBL_4LW;
1660 break;
1661 case 8:
1662 sc->sc_busmode |= BUSMODE_PBL_8LW;
1663 break;
1664 case 16:
1665 sc->sc_busmode |= BUSMODE_PBL_16LW;
1666 break;
1667 case 32:
1668 sc->sc_busmode |= BUSMODE_PBL_32LW;
1669 break;
1670 default:
1671 sc->sc_busmode |= BUSMODE_PBL_DEFAULT;
1672 break;
1673 }
1674 #if BYTE_ORDER == BIG_ENDIAN
1675 /*
1676 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips
1677 * support them, and even on ones that do, it doesn't
1678 * always work. So we always access descriptors with
1679 * little endian via htole32/le32toh.
1680 */
1681 #endif
1682 /*
1683 * Big-endian bus requires BUSMODE_BLE anyway.
1684 * Also, BUSMODE_DBO is needed because we assume
1685 * descriptors are little endian.
1686 */
1687 if (sc->sc_flags & TULIPF_BLE)
1688 sc->sc_busmode |= BUSMODE_BLE;
1689 if (sc->sc_flags & TULIPF_DBO)
1690 sc->sc_busmode |= BUSMODE_DBO;
1691
1692 /*
1693 * Some chips have a broken bus interface.
1694 */
1695 switch (sc->sc_chip) {
1696 case TULIP_CHIP_DM9102:
1697 case TULIP_CHIP_DM9102A:
1698 sc->sc_busmode = 0;
1699 break;
1700
1701 default:
1702 /* Nothing. */
1703 break;
1704 }
1705
1706 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode);
1707
1708 /*
1709 * Initialize the OPMODE register. We don't write it until
1710 * we're ready to begin the transmit and receive processes.
1711 *
1712 * Media-related OPMODE bits are set in the media callbacks
1713 * for each specific chip/board.
1714 */
1715 sc->sc_opmode |= OPMODE_SR | OPMODE_ST |
1716 sc->sc_txth[sc->sc_txthresh].txth_opmode;
1717
1718 /*
1719 * Magical mystery initialization on the Macronix chips.
1720 * The MX98713 uses its own magic value, the rest share
1721 * a common one.
1722 */
1723 switch (sc->sc_chip) {
1724 case TULIP_CHIP_MX98713:
1725 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713);
1726 break;
1727
1728 case TULIP_CHIP_MX98713A:
1729 case TULIP_CHIP_MX98715:
1730 case TULIP_CHIP_MX98715A:
1731 case TULIP_CHIP_MX98715AEC_X:
1732 case TULIP_CHIP_MX98725:
1733 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715);
1734 break;
1735
1736 default:
1737 /* Nothing. */
1738 break;
1739 }
1740
1741 /*
1742 * Initialize the transmit descriptor ring.
1743 */
1744 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
1745 for (i = 0; i < TULIP_NTXDESC; i++) {
1746 sc->sc_txdescs[i].td_ctl = htole32(sc->sc_tdctl_ch);
1747 sc->sc_txdescs[i].td_bufaddr2 =
1748 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i)));
1749 }
1750 sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er);
1751 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC,
1752 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1753 sc->sc_txfree = TULIP_NTXDESC;
1754 sc->sc_txnext = 0;
1755
1756 /*
1757 * Initialize the transmit job descriptors.
1758 */
1759 SIMPLEQ_INIT(&sc->sc_txfreeq);
1760 SIMPLEQ_INIT(&sc->sc_txdirtyq);
1761 for (i = 0; i < TULIP_TXQUEUELEN; i++) {
1762 txs = &sc->sc_txsoft[i];
1763 txs->txs_mbuf = NULL;
1764 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
1765 }
1766
1767 /*
1768 * Initialize the receive descriptor and receive job
1769 * descriptor rings.
1770 */
1771 for (i = 0; i < TULIP_NRXDESC; i++) {
1772 rxs = &sc->sc_rxsoft[i];
1773 if (rxs->rxs_mbuf == NULL) {
1774 if ((error = tlp_add_rxbuf(sc, i)) != 0) {
1775 printf("%s: unable to allocate or map rx "
1776 "buffer %d, error = %d\n",
1777 sc->sc_dev.dv_xname, i, error);
1778 /*
1779 * XXX Should attempt to run with fewer receive
1780 * XXX buffers instead of just failing.
1781 */
1782 tlp_rxdrain(sc);
1783 goto out;
1784 }
1785 }
1786 }
1787 sc->sc_rxptr = 0;
1788
1789 /*
1790 * Initialize the interrupt mask and enable interrupts.
1791 */
1792 /* normal interrupts */
1793 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS;
1794
1795 /* abnormal interrupts */
1796 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF |
1797 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS;
1798
1799 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT;
1800 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT;
1801
1802 switch (sc->sc_chip) {
1803 case TULIP_CHIP_WB89C840F:
1804 /*
1805 * Clear bits that we don't want that happen to
1806 * overlap or don't exist.
1807 */
1808 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT);
1809 break;
1810
1811 default:
1812 /* Nothing. */
1813 break;
1814 }
1815
1816 sc->sc_rxint_mask &= sc->sc_inten;
1817 sc->sc_txint_mask &= sc->sc_inten;
1818
1819 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten);
1820 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff);
1821
1822 /*
1823 * Give the transmit and receive rings to the Tulip.
1824 */
1825 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext));
1826 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr));
1827
1828 /*
1829 * On chips that do this differently, set the station address.
1830 */
1831 switch (sc->sc_chip) {
1832 case TULIP_CHIP_WB89C840F:
1833 {
1834 /* XXX Do this with stream writes? */
1835 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0);
1836
1837 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1838 bus_space_write_1(sc->sc_st, sc->sc_sh,
1839 cpa + i, LLADDR(ifp->if_sadl)[i]);
1840 }
1841 break;
1842 }
1843
1844 case TULIP_CHIP_AL981:
1845 case TULIP_CHIP_AN983:
1846 case TULIP_CHIP_AN985:
1847 {
1848 u_int32_t reg;
1849 u_int8_t *enaddr = LLADDR(ifp->if_sadl);
1850
1851 reg = enaddr[0] |
1852 (enaddr[1] << 8) |
1853 (enaddr[2] << 16) |
1854 (enaddr[3] << 24);
1855 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg);
1856
1857 reg = enaddr[4] |
1858 (enaddr[5] << 8);
1859 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg);
1860 }
1861
1862 default:
1863 /* Nothing. */
1864 break;
1865 }
1866
1867 /*
1868 * Set the receive filter. This will start the transmit and
1869 * receive processes.
1870 */
1871 (*sc->sc_filter_setup)(sc);
1872
1873 /*
1874 * Set the current media.
1875 */
1876 (void) (*sc->sc_mediasw->tmsw_set)(sc);
1877
1878 /*
1879 * Start the receive process.
1880 */
1881 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
1882
1883 if (sc->sc_tick != NULL) {
1884 /* Start the one second clock. */
1885 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc);
1886 }
1887
1888 /*
1889 * Note that the interface is now running.
1890 */
1891 ifp->if_flags |= IFF_RUNNING;
1892 ifp->if_flags &= ~IFF_OACTIVE;
1893
1894 out:
1895 if (error) {
1896 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1897 ifp->if_timer = 0;
1898 printf("%s: interface not running\n", sc->sc_dev.dv_xname);
1899 }
1900 return (error);
1901 }
1902
1903 /*
1904 * tlp_enable:
1905 *
1906 * Enable the Tulip chip.
1907 */
1908 int
1909 tlp_enable(sc)
1910 struct tulip_softc *sc;
1911 {
1912
1913 if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) {
1914 if ((*sc->sc_enable)(sc) != 0) {
1915 printf("%s: device enable failed\n",
1916 sc->sc_dev.dv_xname);
1917 return (EIO);
1918 }
1919 sc->sc_flags |= TULIPF_ENABLED;
1920 }
1921 return (0);
1922 }
1923
1924 /*
1925 * tlp_disable:
1926 *
1927 * Disable the Tulip chip.
1928 */
1929 void
1930 tlp_disable(sc)
1931 struct tulip_softc *sc;
1932 {
1933
1934 if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) {
1935 (*sc->sc_disable)(sc);
1936 sc->sc_flags &= ~TULIPF_ENABLED;
1937 }
1938 }
1939
1940 /*
1941 * tlp_power:
1942 *
1943 * Power management (suspend/resume) hook.
1944 */
1945 void
1946 tlp_power(why, arg)
1947 int why;
1948 void *arg;
1949 {
1950 struct tulip_softc *sc = arg;
1951 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1952 int s;
1953
1954 s = splnet();
1955 switch (why) {
1956 case PWR_SUSPEND:
1957 case PWR_STANDBY:
1958 tlp_stop(ifp, 0);
1959 if (sc->sc_power != NULL)
1960 (*sc->sc_power)(sc, why);
1961 break;
1962 case PWR_RESUME:
1963 if (ifp->if_flags & IFF_UP) {
1964 if (sc->sc_power != NULL)
1965 (*sc->sc_power)(sc, why);
1966 tlp_init(ifp);
1967 }
1968 break;
1969 case PWR_SOFTSUSPEND:
1970 case PWR_SOFTSTANDBY:
1971 case PWR_SOFTRESUME:
1972 break;
1973 }
1974 splx(s);
1975 }
1976
1977 /*
1978 * tlp_rxdrain:
1979 *
1980 * Drain the receive queue.
1981 */
1982 void
1983 tlp_rxdrain(sc)
1984 struct tulip_softc *sc;
1985 {
1986 struct tulip_rxsoft *rxs;
1987 int i;
1988
1989 for (i = 0; i < TULIP_NRXDESC; i++) {
1990 rxs = &sc->sc_rxsoft[i];
1991 if (rxs->rxs_mbuf != NULL) {
1992 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
1993 m_freem(rxs->rxs_mbuf);
1994 rxs->rxs_mbuf = NULL;
1995 }
1996 }
1997 }
1998
1999 /*
2000 * tlp_stop: [ ifnet interface function ]
2001 *
2002 * Stop transmission on the interface.
2003 */
2004 void
2005 tlp_stop(ifp, disable)
2006 struct ifnet *ifp;
2007 int disable;
2008 {
2009 struct tulip_softc *sc = ifp->if_softc;
2010 struct tulip_txsoft *txs;
2011
2012 if (sc->sc_tick != NULL) {
2013 /* Stop the one second clock. */
2014 callout_stop(&sc->sc_tick_callout);
2015 }
2016
2017 if (sc->sc_flags & TULIPF_HAS_MII) {
2018 /* Down the MII. */
2019 mii_down(&sc->sc_mii);
2020 }
2021
2022 /* Disable interrupts. */
2023 TULIP_WRITE(sc, CSR_INTEN, 0);
2024
2025 /* Stop the transmit and receive processes. */
2026 sc->sc_opmode = 0;
2027 TULIP_WRITE(sc, CSR_OPMODE, 0);
2028 TULIP_WRITE(sc, CSR_RXLIST, 0);
2029 TULIP_WRITE(sc, CSR_TXLIST, 0);
2030
2031 /*
2032 * Release any queued transmit buffers.
2033 */
2034 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
2035 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q);
2036 if (txs->txs_mbuf != NULL) {
2037 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
2038 m_freem(txs->txs_mbuf);
2039 txs->txs_mbuf = NULL;
2040 }
2041 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
2042 }
2043
2044 if (disable) {
2045 tlp_rxdrain(sc);
2046 tlp_disable(sc);
2047 }
2048
2049 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP);
2050
2051 /*
2052 * Mark the interface down and cancel the watchdog timer.
2053 */
2054 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2055 ifp->if_timer = 0;
2056 }
2057
2058 #define SROM_EMIT(sc, x) \
2059 do { \
2060 TULIP_WRITE((sc), CSR_MIIROM, (x)); \
2061 delay(2); \
2062 } while (0)
2063
2064 /*
2065 * tlp_srom_idle:
2066 *
2067 * Put the SROM in idle state.
2068 */
2069 void
2070 tlp_srom_idle(sc)
2071 struct tulip_softc *sc;
2072 {
2073 u_int32_t miirom;
2074 int i;
2075
2076 miirom = MIIROM_SR;
2077 SROM_EMIT(sc, miirom);
2078
2079 miirom |= MIIROM_RD;
2080 SROM_EMIT(sc, miirom);
2081
2082 miirom |= MIIROM_SROMCS;
2083 SROM_EMIT(sc, miirom);
2084
2085 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2086
2087 /* Strobe the clock 32 times. */
2088 for (i = 0; i < 32; i++) {
2089 SROM_EMIT(sc, miirom);
2090 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2091 }
2092
2093 SROM_EMIT(sc, miirom);
2094
2095 miirom &= ~MIIROM_SROMCS;
2096 SROM_EMIT(sc, miirom);
2097
2098 SROM_EMIT(sc, 0);
2099 }
2100
2101 /*
2102 * tlp_srom_size:
2103 *
2104 * Determine the number of address bits in the SROM.
2105 */
2106 int
2107 tlp_srom_size(sc)
2108 struct tulip_softc *sc;
2109 {
2110 u_int32_t miirom;
2111 int x;
2112
2113 /* Select the SROM. */
2114 miirom = MIIROM_SR;
2115 SROM_EMIT(sc, miirom);
2116
2117 miirom |= MIIROM_RD;
2118 SROM_EMIT(sc, miirom);
2119
2120 /* Send CHIP SELECT for one clock tick. */
2121 miirom |= MIIROM_SROMCS;
2122 SROM_EMIT(sc, miirom);
2123
2124 /* Shift in the READ opcode. */
2125 for (x = 3; x > 0; x--) {
2126 if (TULIP_SROM_OPC_READ & (1 << (x - 1)))
2127 miirom |= MIIROM_SROMDI;
2128 else
2129 miirom &= ~MIIROM_SROMDI;
2130 SROM_EMIT(sc, miirom);
2131 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2132 SROM_EMIT(sc, miirom);
2133 }
2134
2135 /* Shift in address and look for dummy 0 bit. */
2136 for (x = 1; x <= 12; x++) {
2137 miirom &= ~MIIROM_SROMDI;
2138 SROM_EMIT(sc, miirom);
2139 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2140 if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO))
2141 break;
2142 SROM_EMIT(sc, miirom);
2143 }
2144
2145 /* Clear CHIP SELECT. */
2146 miirom &= ~MIIROM_SROMCS;
2147 SROM_EMIT(sc, miirom);
2148
2149 /* Deselect the SROM. */
2150 SROM_EMIT(sc, 0);
2151
2152 if (x < 4 || x > 12) {
2153 printf("%s: broken MicroWire interface detected; "
2154 "setting SROM size to 1Kb\n", sc->sc_dev.dv_xname);
2155 return (6);
2156 } else {
2157 if (tlp_srom_debug)
2158 printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n",
2159 sc->sc_dev.dv_xname, x, (1 << (x + 4)) >> 3);
2160 return (x);
2161 }
2162 }
2163
2164 /*
2165 * tlp_read_srom:
2166 *
2167 * Read the Tulip SROM.
2168 */
2169 int
2170 tlp_read_srom(sc)
2171 struct tulip_softc *sc;
2172 {
2173 int size;
2174 u_int32_t miirom;
2175 u_int16_t datain;
2176 int i, x;
2177
2178 tlp_srom_idle(sc);
2179
2180 sc->sc_srom_addrbits = tlp_srom_size(sc);
2181 if (sc->sc_srom_addrbits == 0)
2182 return (0);
2183 size = TULIP_ROM_SIZE(sc->sc_srom_addrbits);
2184 sc->sc_srom = malloc(size, M_DEVBUF, M_NOWAIT);
2185
2186 /* Select the SROM. */
2187 miirom = MIIROM_SR;
2188 SROM_EMIT(sc, miirom);
2189
2190 miirom |= MIIROM_RD;
2191 SROM_EMIT(sc, miirom);
2192
2193 for (i = 0; i < size; i += 2) {
2194 /* Send CHIP SELECT for one clock tick. */
2195 miirom |= MIIROM_SROMCS;
2196 SROM_EMIT(sc, miirom);
2197
2198 /* Shift in the READ opcode. */
2199 for (x = 3; x > 0; x--) {
2200 if (TULIP_SROM_OPC_READ & (1 << (x - 1)))
2201 miirom |= MIIROM_SROMDI;
2202 else
2203 miirom &= ~MIIROM_SROMDI;
2204 SROM_EMIT(sc, miirom);
2205 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2206 SROM_EMIT(sc, miirom);
2207 }
2208
2209 /* Shift in address. */
2210 for (x = sc->sc_srom_addrbits; x > 0; x--) {
2211 if (i & (1 << x))
2212 miirom |= MIIROM_SROMDI;
2213 else
2214 miirom &= ~MIIROM_SROMDI;
2215 SROM_EMIT(sc, miirom);
2216 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2217 SROM_EMIT(sc, miirom);
2218 }
2219
2220 /* Shift out data. */
2221 miirom &= ~MIIROM_SROMDI;
2222 datain = 0;
2223 for (x = 16; x > 0; x--) {
2224 SROM_EMIT(sc, miirom|MIIROM_SROMSK);
2225 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO))
2226 datain |= (1 << (x - 1));
2227 SROM_EMIT(sc, miirom);
2228 }
2229 sc->sc_srom[i] = datain & 0xff;
2230 sc->sc_srom[i + 1] = datain >> 8;
2231
2232 /* Clear CHIP SELECT. */
2233 miirom &= ~MIIROM_SROMCS;
2234 SROM_EMIT(sc, miirom);
2235 }
2236
2237 /* Deselect the SROM. */
2238 SROM_EMIT(sc, 0);
2239
2240 /* ...and idle it. */
2241 tlp_srom_idle(sc);
2242
2243 if (tlp_srom_debug) {
2244 printf("SROM CONTENTS:");
2245 for (i = 0; i < size; i++) {
2246 if ((i % 8) == 0)
2247 printf("\n\t");
2248 printf("0x%02x ", sc->sc_srom[i]);
2249 }
2250 printf("\n");
2251 }
2252
2253 return (1);
2254 }
2255
2256 #undef SROM_EMIT
2257
2258 /*
2259 * tlp_add_rxbuf:
2260 *
2261 * Add a receive buffer to the indicated descriptor.
2262 */
2263 int
2264 tlp_add_rxbuf(sc, idx)
2265 struct tulip_softc *sc;
2266 int idx;
2267 {
2268 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx];
2269 struct mbuf *m;
2270 int error;
2271
2272 MGETHDR(m, M_DONTWAIT, MT_DATA);
2273 if (m == NULL)
2274 return (ENOBUFS);
2275
2276 MCLGET(m, M_DONTWAIT);
2277 if ((m->m_flags & M_EXT) == 0) {
2278 m_freem(m);
2279 return (ENOBUFS);
2280 }
2281
2282 if (rxs->rxs_mbuf != NULL)
2283 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
2284
2285 rxs->rxs_mbuf = m;
2286
2287 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap,
2288 m->m_ext.ext_buf, m->m_ext.ext_size, NULL,
2289 BUS_DMA_READ|BUS_DMA_NOWAIT);
2290 if (error) {
2291 printf("%s: can't load rx DMA map %d, error = %d\n",
2292 sc->sc_dev.dv_xname, idx, error);
2293 panic("tlp_add_rxbuf"); /* XXX */
2294 }
2295
2296 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
2297 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
2298
2299 TULIP_INIT_RXDESC(sc, idx);
2300
2301 return (0);
2302 }
2303
2304 /*
2305 * tlp_srom_crcok:
2306 *
2307 * Check the CRC of the Tulip SROM.
2308 */
2309 int
2310 tlp_srom_crcok(romdata)
2311 const u_int8_t *romdata;
2312 {
2313 u_int32_t crc;
2314
2315 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM);
2316 crc = (crc & 0xffff) ^ 0xffff;
2317 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM))
2318 return (1);
2319
2320 /*
2321 * Try an alternate checksum.
2322 */
2323 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1);
2324 crc = (crc & 0xffff) ^ 0xffff;
2325 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1))
2326 return (1);
2327
2328 return (0);
2329 }
2330
2331 /*
2332 * tlp_isv_srom:
2333 *
2334 * Check to see if the SROM is in the new standardized format.
2335 */
2336 int
2337 tlp_isv_srom(romdata)
2338 const u_int8_t *romdata;
2339 {
2340 int i;
2341 u_int16_t cksum;
2342
2343 if (tlp_srom_crcok(romdata)) {
2344 /*
2345 * SROM CRC checks out; must be in the new format.
2346 */
2347 return (1);
2348 }
2349
2350 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM);
2351 if (cksum == 0xffff || cksum == 0) {
2352 /*
2353 * No checksum present. Check the SROM ID; 18 bytes of 0
2354 * followed by 1 (version) followed by the number of
2355 * adapters which use this SROM (should be non-zero).
2356 */
2357 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) {
2358 if (romdata[i] != 0)
2359 return (0);
2360 }
2361 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1)
2362 return (0);
2363 if (romdata[TULIP_ROM_CHIP_COUNT] == 0)
2364 return (0);
2365 return (1);
2366 }
2367
2368 return (0);
2369 }
2370
2371 /*
2372 * tlp_isv_srom_enaddr:
2373 *
2374 * Get the Ethernet address from an ISV SROM.
2375 */
2376 int
2377 tlp_isv_srom_enaddr(sc, enaddr)
2378 struct tulip_softc *sc;
2379 u_int8_t *enaddr;
2380 {
2381 int i, devcnt;
2382
2383 if (tlp_isv_srom(sc->sc_srom) == 0)
2384 return (0);
2385
2386 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
2387 for (i = 0; i < devcnt; i++) {
2388 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
2389 break;
2390 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
2391 sc->sc_devno)
2392 break;
2393 }
2394
2395 if (i == devcnt)
2396 return (0);
2397
2398 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS],
2399 ETHER_ADDR_LEN);
2400 enaddr[5] += i;
2401
2402 return (1);
2403 }
2404
2405 /*
2406 * tlp_parse_old_srom:
2407 *
2408 * Parse old-format SROMs.
2409 *
2410 * This routine is largely lifted from Matt Thomas's `de' driver.
2411 */
2412 int
2413 tlp_parse_old_srom(sc, enaddr)
2414 struct tulip_softc *sc;
2415 u_int8_t *enaddr;
2416 {
2417 static const u_int8_t testpat[] =
2418 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa };
2419 int i;
2420 u_int32_t cksum;
2421
2422 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) {
2423 /*
2424 * Some vendors (e.g. ZNYX) don't use the standard
2425 * DEC Address ROM format, but rather just have an
2426 * Ethernet address in the first 6 bytes, maybe a
2427 * 2 byte checksum, and then all 0xff's.
2428 *
2429 * On the other hand, Cobalt Networks interfaces
2430 * simply have the address in the first six bytes
2431 * with the rest zeroed out.
2432 */
2433 for (i = 8; i < 32; i++) {
2434 if (sc->sc_srom[i] != 0xff &&
2435 sc->sc_srom[i] != 0)
2436 return (0);
2437 }
2438
2439 /*
2440 * Sanity check the Ethernet address:
2441 *
2442 * - Make sure it's not multicast or locally
2443 * assigned
2444 * - Make sure it has a non-0 OUI
2445 */
2446 if (sc->sc_srom[0] & 3)
2447 return (0);
2448 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 &&
2449 sc->sc_srom[2] == 0)
2450 return (0);
2451
2452 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
2453 return (1);
2454 }
2455
2456 /*
2457 * Standard DEC Address ROM test.
2458 */
2459
2460 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0)
2461 return (0);
2462
2463 for (i = 0; i < 8; i++) {
2464 if (sc->sc_srom[i] != sc->sc_srom[15 - i])
2465 return (0);
2466 }
2467
2468 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
2469
2470 cksum = *(u_int16_t *) &enaddr[0];
2471
2472 cksum <<= 1;
2473 if (cksum > 0xffff)
2474 cksum -= 0xffff;
2475
2476 cksum += *(u_int16_t *) &enaddr[2];
2477 if (cksum > 0xffff)
2478 cksum -= 0xffff;
2479
2480 cksum <<= 1;
2481 if (cksum > 0xffff)
2482 cksum -= 0xffff;
2483
2484 cksum += *(u_int16_t *) &enaddr[4];
2485 if (cksum >= 0xffff)
2486 cksum -= 0xffff;
2487
2488 if (cksum != *(u_int16_t *) &sc->sc_srom[6])
2489 return (0);
2490
2491 return (1);
2492 }
2493
2494 /*
2495 * tlp_filter_setup:
2496 *
2497 * Set the Tulip's receive filter.
2498 */
2499 void
2500 tlp_filter_setup(sc)
2501 struct tulip_softc *sc;
2502 {
2503 struct ethercom *ec = &sc->sc_ethercom;
2504 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2505 struct ether_multi *enm;
2506 struct ether_multistep step;
2507 __volatile u_int32_t *sp;
2508 struct tulip_txsoft *txs;
2509 u_int8_t enaddr[ETHER_ADDR_LEN];
2510 u_int32_t hash, hashsize;
2511 int cnt;
2512
2513 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n",
2514 sc->sc_dev.dv_xname, sc->sc_flags));
2515
2516 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN);
2517
2518 /*
2519 * If there are transmissions pending, wait until they have
2520 * completed.
2521 */
2522 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL ||
2523 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) {
2524 sc->sc_flags |= TULIPF_WANT_SETUP;
2525 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n",
2526 sc->sc_dev.dv_xname));
2527 return;
2528 }
2529 sc->sc_flags &= ~TULIPF_WANT_SETUP;
2530
2531 switch (sc->sc_chip) {
2532 case TULIP_CHIP_82C115:
2533 hashsize = TULIP_PNICII_HASHSIZE;
2534 break;
2535
2536 default:
2537 hashsize = TULIP_MCHASHSIZE;
2538 }
2539
2540 /*
2541 * If we're running, idle the transmit and receive engines. If
2542 * we're NOT running, we're being called from tlp_init(), and our
2543 * writing OPMODE will start the transmit and receive processes
2544 * in motion.
2545 */
2546 if (ifp->if_flags & IFF_RUNNING)
2547 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
2548
2549 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
2550
2551 if (ifp->if_flags & IFF_PROMISC) {
2552 sc->sc_opmode |= OPMODE_PR;
2553 goto allmulti;
2554 }
2555
2556 /*
2557 * Try Perfect filtering first.
2558 */
2559
2560 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
2561 sp = TULIP_CDSP(sc);
2562 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2563 cnt = 0;
2564 ETHER_FIRST_MULTI(step, ec, enm);
2565 while (enm != NULL) {
2566 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2567 /*
2568 * We must listen to a range of multicast addresses.
2569 * For now, just accept all multicasts, rather than
2570 * trying to set only those filter bits needed to match
2571 * the range. (At this time, the only use of address
2572 * ranges is for IP multicast routing, for which the
2573 * range is big enough to require all bits set.)
2574 */
2575 goto allmulti;
2576 }
2577 if (cnt == (TULIP_MAXADDRS - 2)) {
2578 /*
2579 * We already have our multicast limit (still need
2580 * our station address and broadcast). Go to
2581 * Hash-Perfect mode.
2582 */
2583 goto hashperfect;
2584 }
2585 cnt++;
2586 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0);
2587 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1);
2588 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2);
2589 ETHER_NEXT_MULTI(step, enm);
2590 }
2591
2592 if (ifp->if_flags & IFF_BROADCAST) {
2593 /* ...and the broadcast address. */
2594 cnt++;
2595 *sp++ = TULIP_SP_FIELD_C(0xffff);
2596 *sp++ = TULIP_SP_FIELD_C(0xffff);
2597 *sp++ = TULIP_SP_FIELD_C(0xffff);
2598 }
2599
2600 /* Pad the rest with our station address. */
2601 for (; cnt < TULIP_MAXADDRS; cnt++) {
2602 *sp++ = TULIP_SP_FIELD(enaddr, 0);
2603 *sp++ = TULIP_SP_FIELD(enaddr, 1);
2604 *sp++ = TULIP_SP_FIELD(enaddr, 2);
2605 }
2606 ifp->if_flags &= ~IFF_ALLMULTI;
2607 goto setit;
2608
2609 hashperfect:
2610 /*
2611 * Try Hash-Perfect mode.
2612 */
2613
2614 /*
2615 * Some 21140 chips have broken Hash-Perfect modes. On these
2616 * chips, we simply use Hash-Only mode, and put our station
2617 * address into the filter.
2618 */
2619 if (sc->sc_chip == TULIP_CHIP_21140)
2620 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY;
2621 else
2622 sc->sc_filtmode = TDCTL_Tx_FT_HASH;
2623 sp = TULIP_CDSP(sc);
2624 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2625 ETHER_FIRST_MULTI(step, ec, enm);
2626 while (enm != NULL) {
2627 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2628 /*
2629 * We must listen to a range of multicast addresses.
2630 * For now, just accept all multicasts, rather than
2631 * trying to set only those filter bits needed to match
2632 * the range. (At this time, the only use of address
2633 * ranges is for IP multicast routing, for which the
2634 * range is big enough to require all bits set.)
2635 */
2636 goto allmulti;
2637 }
2638 hash = tlp_mchash(enm->enm_addrlo, hashsize);
2639 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2640 ETHER_NEXT_MULTI(step, enm);
2641 }
2642
2643 if (ifp->if_flags & IFF_BROADCAST) {
2644 /* ...and the broadcast address. */
2645 hash = tlp_mchash(etherbroadcastaddr, hashsize);
2646 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2647 }
2648
2649 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) {
2650 /* ...and our station address. */
2651 hash = tlp_mchash(enaddr, hashsize);
2652 sp[hash >> 4] |= htole32(1 << (hash & 0xf));
2653 } else {
2654 /*
2655 * Hash-Perfect mode; put our station address after
2656 * the hash table.
2657 */
2658 sp[39] = TULIP_SP_FIELD(enaddr, 0);
2659 sp[40] = TULIP_SP_FIELD(enaddr, 1);
2660 sp[41] = TULIP_SP_FIELD(enaddr, 2);
2661 }
2662 ifp->if_flags &= ~IFF_ALLMULTI;
2663 goto setit;
2664
2665 allmulti:
2666 /*
2667 * Use Perfect filter mode. First address is the broadcast address,
2668 * and pad the rest with our station address. We'll set Pass-all-
2669 * multicast in OPMODE below.
2670 */
2671 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
2672 sp = TULIP_CDSP(sc);
2673 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
2674 cnt = 0;
2675 if (ifp->if_flags & IFF_BROADCAST) {
2676 cnt++;
2677 *sp++ = TULIP_SP_FIELD_C(0xffff);
2678 *sp++ = TULIP_SP_FIELD_C(0xffff);
2679 *sp++ = TULIP_SP_FIELD_C(0xffff);
2680 }
2681 for (; cnt < TULIP_MAXADDRS; cnt++) {
2682 *sp++ = TULIP_SP_FIELD(enaddr, 0);
2683 *sp++ = TULIP_SP_FIELD(enaddr, 1);
2684 *sp++ = TULIP_SP_FIELD(enaddr, 2);
2685 }
2686 ifp->if_flags |= IFF_ALLMULTI;
2687
2688 setit:
2689 if (ifp->if_flags & IFF_ALLMULTI)
2690 sc->sc_opmode |= OPMODE_PM;
2691
2692 /* Sync the setup packet buffer. */
2693 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE);
2694
2695 /*
2696 * Fill in the setup packet descriptor.
2697 */
2698 txs = SIMPLEQ_FIRST(&sc->sc_txfreeq);
2699
2700 txs->txs_firstdesc = sc->sc_txnext;
2701 txs->txs_lastdesc = sc->sc_txnext;
2702 txs->txs_ndescs = 1;
2703 txs->txs_mbuf = NULL;
2704
2705 sc->sc_txdescs[sc->sc_txnext].td_bufaddr1 =
2706 htole32(TULIP_CDSPADDR(sc));
2707 sc->sc_txdescs[sc->sc_txnext].td_ctl =
2708 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) |
2709 sc->sc_filtmode | TDCTL_Tx_SET | sc->sc_setup_fsls |
2710 TDCTL_Tx_IC | sc->sc_tdctl_ch |
2711 (sc->sc_txnext == (TULIP_NTXDESC - 1) ? sc->sc_tdctl_er : 0));
2712 sc->sc_txdescs[sc->sc_txnext].td_status = htole32(TDSTAT_OWN);
2713 TULIP_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndescs,
2714 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2715
2716 /* Advance the tx pointer. */
2717 sc->sc_txfree -= 1;
2718 sc->sc_txnext = TULIP_NEXTTX(sc->sc_txnext);
2719
2720 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q);
2721 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
2722
2723 /*
2724 * Set the OPMODE register. This will also resume the
2725 * transmit transmit process we idled above.
2726 */
2727 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2728
2729 sc->sc_flags |= TULIPF_DOING_SETUP;
2730
2731 /*
2732 * Kick the transmitter; this will cause the Tulip to
2733 * read the setup descriptor.
2734 */
2735 /* XXX USE AUTOPOLLING? */
2736 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
2737
2738 /* Set up a watchdog timer in case the chip flakes out. */
2739 ifp->if_timer = 5;
2740
2741 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname));
2742 }
2743
2744 /*
2745 * tlp_winb_filter_setup:
2746 *
2747 * Set the Winbond 89C840F's receive filter.
2748 */
2749 void
2750 tlp_winb_filter_setup(sc)
2751 struct tulip_softc *sc;
2752 {
2753 struct ethercom *ec = &sc->sc_ethercom;
2754 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2755 struct ether_multi *enm;
2756 struct ether_multistep step;
2757 u_int32_t hash, mchash[2];
2758
2759 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n",
2760 sc->sc_dev.dv_xname, sc->sc_flags));
2761
2762 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP);
2763
2764 if (ifp->if_flags & IFF_MULTICAST)
2765 sc->sc_opmode |= OPMODE_WINB_AMP;
2766
2767 if (ifp->if_flags & IFF_BROADCAST)
2768 sc->sc_opmode |= OPMODE_WINB_ABP;
2769
2770 if (ifp->if_flags & IFF_PROMISC) {
2771 sc->sc_opmode |= OPMODE_WINB_APP;
2772 goto allmulti;
2773 }
2774
2775 mchash[0] = mchash[1] = 0;
2776
2777 ETHER_FIRST_MULTI(step, ec, enm);
2778 while (enm != NULL) {
2779 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2780 /*
2781 * We must listen to a range of multicast addresses.
2782 * For now, just accept all multicasts, rather than
2783 * trying to set only those filter bits needed to match
2784 * the range. (At this time, the only use of address
2785 * ranges is for IP multicast routing, for which the
2786 * range is big enough to require all bits set.)
2787 */
2788 goto allmulti;
2789 }
2790
2791 /*
2792 * According to the FreeBSD `wb' driver, yes, you
2793 * really do invert the hash.
2794 */
2795 hash =
2796 (~(ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26))
2797 & 0x3f;
2798 mchash[hash >> 5] |= 1 << (hash & 0x1f);
2799 ETHER_NEXT_MULTI(step, enm);
2800 }
2801 ifp->if_flags &= ~IFF_ALLMULTI;
2802 goto setit;
2803
2804 allmulti:
2805 ifp->if_flags |= IFF_ALLMULTI;
2806 mchash[0] = mchash[1] = 0xffffffff;
2807
2808 setit:
2809 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]);
2810 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]);
2811 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2812 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n",
2813 sc->sc_dev.dv_xname));
2814 }
2815
2816 /*
2817 * tlp_al981_filter_setup:
2818 *
2819 * Set the ADMtek AL981's receive filter.
2820 */
2821 void
2822 tlp_al981_filter_setup(sc)
2823 struct tulip_softc *sc;
2824 {
2825 struct ethercom *ec = &sc->sc_ethercom;
2826 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2827 struct ether_multi *enm;
2828 struct ether_multistep step;
2829 u_int32_t hash, mchash[2];
2830
2831 /*
2832 * If the chip is running, we need to reset the interface,
2833 * and will revisit here (with IFF_RUNNING) clear. The
2834 * chip seems to really not like to have its multicast
2835 * filter programmed without a reset.
2836 */
2837 if (ifp->if_flags & IFF_RUNNING) {
2838 (void) tlp_init(ifp);
2839 return;
2840 }
2841
2842 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n",
2843 sc->sc_dev.dv_xname, sc->sc_flags));
2844
2845 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM);
2846
2847 if (ifp->if_flags & IFF_PROMISC) {
2848 sc->sc_opmode |= OPMODE_PR;
2849 goto allmulti;
2850 }
2851
2852 mchash[0] = mchash[1] = 0;
2853
2854 ETHER_FIRST_MULTI(step, ec, enm);
2855 while (enm != NULL) {
2856 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
2857 /*
2858 * We must listen to a range of multicast addresses.
2859 * For now, just accept all multicasts, rather than
2860 * trying to set only those filter bits needed to match
2861 * the range. (At this time, the only use of address
2862 * ranges is for IP multicast routing, for which the
2863 * range is big enough to require all bits set.)
2864 */
2865 goto allmulti;
2866 }
2867
2868 hash = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26;
2869 mchash[hash >> 5] |= 1 << (hash & 0x1f);
2870 ETHER_NEXT_MULTI(step, enm);
2871 }
2872 ifp->if_flags &= ~IFF_ALLMULTI;
2873 goto setit;
2874
2875 allmulti:
2876 ifp->if_flags |= IFF_ALLMULTI;
2877 mchash[0] = mchash[1] = 0xffffffff;
2878
2879 setit:
2880 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_MAR0, mchash[0]);
2881 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_MAR1, mchash[1]);
2882 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
2883 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n",
2884 sc->sc_dev.dv_xname));
2885 }
2886
2887 /*
2888 * tlp_idle:
2889 *
2890 * Cause the transmit and/or receive processes to go idle.
2891 */
2892 void
2893 tlp_idle(sc, bits)
2894 struct tulip_softc *sc;
2895 u_int32_t bits;
2896 {
2897 static const char * const tlp_tx_state_names[] = {
2898 "STOPPED",
2899 "RUNNING - FETCH",
2900 "RUNNING - WAIT",
2901 "RUNNING - READING",
2902 "-- RESERVED --",
2903 "RUNNING - SETUP",
2904 "SUSPENDED",
2905 "RUNNING - CLOSE",
2906 };
2907 static const char * const tlp_rx_state_names[] = {
2908 "STOPPED",
2909 "RUNNING - FETCH",
2910 "RUNNING - CHECK",
2911 "RUNNING - WAIT",
2912 "SUSPENDED",
2913 "RUNNING - CLOSE",
2914 "RUNNING - FLUSH",
2915 "RUNNING - QUEUE",
2916 };
2917 static const char * const dm9102_tx_state_names[] = {
2918 "STOPPED",
2919 "RUNNING - FETCH",
2920 "RUNNING - SETUP",
2921 "RUNNING - READING",
2922 "RUNNING - CLOSE - CLEAR OWNER",
2923 "RUNNING - WAIT",
2924 "RUNNING - CLOSE - WRITE STATUS",
2925 "SUSPENDED",
2926 };
2927 static const char * const dm9102_rx_state_names[] = {
2928 "STOPPED",
2929 "RUNNING - FETCH",
2930 "RUNNING - WAIT",
2931 "RUNNING - QUEUE",
2932 "RUNNING - CLOSE - CLEAR OWNER",
2933 "RUNNING - CLOSE - WRITE STATUS",
2934 "SUSPENDED",
2935 "RUNNING - FLUSH",
2936 };
2937
2938 const char * const *tx_state_names, * const *rx_state_names;
2939 u_int32_t csr, ackmask = 0;
2940 int i;
2941
2942 switch (sc->sc_chip) {
2943 case TULIP_CHIP_DM9102:
2944 case TULIP_CHIP_DM9102A:
2945 tx_state_names = dm9102_tx_state_names;
2946 rx_state_names = dm9102_rx_state_names;
2947 break;
2948
2949 default:
2950 tx_state_names = tlp_tx_state_names;
2951 rx_state_names = tlp_rx_state_names;
2952 break;
2953 }
2954
2955 if (bits & OPMODE_ST)
2956 ackmask |= STATUS_TPS;
2957
2958 if (bits & OPMODE_SR)
2959 ackmask |= STATUS_RPS;
2960
2961 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits);
2962
2963 for (i = 0; i < 1000; i++) {
2964 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask)
2965 break;
2966 delay(10);
2967 }
2968
2969 csr = TULIP_READ(sc, CSR_STATUS);
2970 if ((csr & ackmask) != ackmask) {
2971 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 &&
2972 (csr & STATUS_TS) != STATUS_TS_STOPPED) {
2973 printf("%s: transmit process failed to idle: "
2974 "state %s\n", sc->sc_dev.dv_xname,
2975 tx_state_names[(csr & STATUS_TS) >> 20]);
2976 }
2977 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 &&
2978 (csr & STATUS_RS) != STATUS_RS_STOPPED) {
2979 switch (sc->sc_chip) {
2980 case TULIP_CHIP_AN983:
2981 case TULIP_CHIP_AN985:
2982 /*
2983 * Filter the message out on noisy chips.
2984 */
2985 break;
2986 default:
2987 printf("%s: receive process failed to idle: "
2988 "state %s\n", sc->sc_dev.dv_xname,
2989 rx_state_names[(csr & STATUS_RS) >> 17]);
2990 }
2991 }
2992 }
2993 TULIP_WRITE(sc, CSR_STATUS, ackmask);
2994 }
2995
2996 /*****************************************************************************
2997 * Generic media support functions.
2998 *****************************************************************************/
2999
3000 /*
3001 * tlp_mediastatus: [ifmedia interface function]
3002 *
3003 * Query the current media.
3004 */
3005 void
3006 tlp_mediastatus(ifp, ifmr)
3007 struct ifnet *ifp;
3008 struct ifmediareq *ifmr;
3009 {
3010 struct tulip_softc *sc = ifp->if_softc;
3011
3012 if (TULIP_IS_ENABLED(sc) == 0) {
3013 ifmr->ifm_active = IFM_ETHER | IFM_NONE;
3014 ifmr->ifm_status = 0;
3015 return;
3016 }
3017
3018 (*sc->sc_mediasw->tmsw_get)(sc, ifmr);
3019 }
3020
3021 /*
3022 * tlp_mediachange: [ifmedia interface function]
3023 *
3024 * Update the current media.
3025 */
3026 int
3027 tlp_mediachange(ifp)
3028 struct ifnet *ifp;
3029 {
3030 struct tulip_softc *sc = ifp->if_softc;
3031
3032 if ((ifp->if_flags & IFF_UP) == 0)
3033 return (0);
3034 return ((*sc->sc_mediasw->tmsw_set)(sc));
3035 }
3036
3037 /*****************************************************************************
3038 * Support functions for MII-attached media.
3039 *****************************************************************************/
3040
3041 /*
3042 * tlp_mii_tick:
3043 *
3044 * One second timer, used to tick the MII.
3045 */
3046 void
3047 tlp_mii_tick(arg)
3048 void *arg;
3049 {
3050 struct tulip_softc *sc = arg;
3051 int s;
3052
3053 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
3054 return;
3055
3056 s = splnet();
3057 mii_tick(&sc->sc_mii);
3058 splx(s);
3059
3060 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc);
3061 }
3062
3063 /*
3064 * tlp_mii_statchg: [mii interface function]
3065 *
3066 * Callback from PHY when media changes.
3067 */
3068 void
3069 tlp_mii_statchg(self)
3070 struct device *self;
3071 {
3072 struct tulip_softc *sc = (struct tulip_softc *)self;
3073
3074 /* Idle the transmit and receive processes. */
3075 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
3076
3077 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD);
3078
3079 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T)
3080 sc->sc_opmode |= OPMODE_TTM;
3081 else
3082 sc->sc_opmode |= OPMODE_HBD;
3083
3084 if (sc->sc_mii.mii_media_active & IFM_FDX)
3085 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD;
3086
3087 /*
3088 * Write new OPMODE bits. This also restarts the transmit
3089 * and receive processes.
3090 */
3091 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3092 }
3093
3094 /*
3095 * tlp_winb_mii_statchg: [mii interface function]
3096 *
3097 * Callback from PHY when media changes. This version is
3098 * for the Winbond 89C840F, which has different OPMODE bits.
3099 */
3100 void
3101 tlp_winb_mii_statchg(self)
3102 struct device *self;
3103 {
3104 struct tulip_softc *sc = (struct tulip_softc *)self;
3105
3106 /* Idle the transmit and receive processes. */
3107 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
3108
3109 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD);
3110
3111 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX)
3112 sc->sc_opmode |= OPMODE_WINB_FES;
3113
3114 if (sc->sc_mii.mii_media_active & IFM_FDX)
3115 sc->sc_opmode |= OPMODE_FD;
3116
3117 /*
3118 * Write new OPMODE bits. This also restarts the transmit
3119 * and receive processes.
3120 */
3121 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3122 }
3123
3124 /*
3125 * tlp_dm9102_mii_statchg: [mii interface function]
3126 *
3127 * Callback from PHY when media changes. This version is
3128 * for the DM9102.
3129 */
3130 void
3131 tlp_dm9102_mii_statchg(self)
3132 struct device *self;
3133 {
3134 struct tulip_softc *sc = (struct tulip_softc *)self;
3135
3136 /*
3137 * Don't idle the transmit and receive processes, here. It
3138 * seems to fail, and just causes excess noise.
3139 */
3140 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD);
3141
3142 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) != IFM_100_TX)
3143 sc->sc_opmode |= OPMODE_TTM;
3144
3145 if (sc->sc_mii.mii_media_active & IFM_FDX)
3146 sc->sc_opmode |= OPMODE_FD;
3147
3148 /*
3149 * Write new OPMODE bits.
3150 */
3151 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3152 }
3153
3154 /*
3155 * tlp_mii_getmedia:
3156 *
3157 * Callback from ifmedia to request current media status.
3158 */
3159 void
3160 tlp_mii_getmedia(sc, ifmr)
3161 struct tulip_softc *sc;
3162 struct ifmediareq *ifmr;
3163 {
3164
3165 mii_pollstat(&sc->sc_mii);
3166 ifmr->ifm_status = sc->sc_mii.mii_media_status;
3167 ifmr->ifm_active = sc->sc_mii.mii_media_active;
3168 }
3169
3170 /*
3171 * tlp_mii_setmedia:
3172 *
3173 * Callback from ifmedia to request new media setting.
3174 */
3175 int
3176 tlp_mii_setmedia(sc)
3177 struct tulip_softc *sc;
3178 {
3179 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
3180
3181 if (ifp->if_flags & IFF_UP) {
3182 switch (sc->sc_chip) {
3183 case TULIP_CHIP_21142:
3184 case TULIP_CHIP_21143:
3185 /* Disable the internal Nway engine. */
3186 TULIP_WRITE(sc, CSR_SIATXRX, 0);
3187 break;
3188
3189 default:
3190 /* Nothing. */
3191 break;
3192 }
3193 mii_mediachg(&sc->sc_mii);
3194 }
3195 return (0);
3196 }
3197
3198 /*
3199 * tlp_bitbang_mii_readreg:
3200 *
3201 * Read a PHY register via bit-bang'ing the MII.
3202 */
3203 int
3204 tlp_bitbang_mii_readreg(self, phy, reg)
3205 struct device *self;
3206 int phy, reg;
3207 {
3208 struct tulip_softc *sc = (void *) self;
3209
3210 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg));
3211 }
3212
3213 /*
3214 * tlp_bitbang_mii_writereg:
3215 *
3216 * Write a PHY register via bit-bang'ing the MII.
3217 */
3218 void
3219 tlp_bitbang_mii_writereg(self, phy, reg, val)
3220 struct device *self;
3221 int phy, reg, val;
3222 {
3223 struct tulip_softc *sc = (void *) self;
3224
3225 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val);
3226 }
3227
3228 /*
3229 * tlp_sio_mii_bitbang_read:
3230 *
3231 * Read the MII serial port for the MII bit-bang module.
3232 */
3233 u_int32_t
3234 tlp_sio_mii_bitbang_read(self)
3235 struct device *self;
3236 {
3237 struct tulip_softc *sc = (void *) self;
3238
3239 return (TULIP_READ(sc, CSR_MIIROM));
3240 }
3241
3242 /*
3243 * tlp_sio_mii_bitbang_write:
3244 *
3245 * Write the MII serial port for the MII bit-bang module.
3246 */
3247 void
3248 tlp_sio_mii_bitbang_write(self, val)
3249 struct device *self;
3250 u_int32_t val;
3251 {
3252 struct tulip_softc *sc = (void *) self;
3253
3254 TULIP_WRITE(sc, CSR_MIIROM, val);
3255 }
3256
3257 /*
3258 * tlp_pnic_mii_readreg:
3259 *
3260 * Read a PHY register on the Lite-On PNIC.
3261 */
3262 int
3263 tlp_pnic_mii_readreg(self, phy, reg)
3264 struct device *self;
3265 int phy, reg;
3266 {
3267 struct tulip_softc *sc = (void *) self;
3268 u_int32_t val;
3269 int i;
3270
3271 TULIP_WRITE(sc, CSR_PNIC_MII,
3272 PNIC_MII_MBO | PNIC_MII_RESERVED |
3273 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) |
3274 (reg << PNIC_MII_REGSHIFT));
3275
3276 for (i = 0; i < 1000; i++) {
3277 delay(10);
3278 val = TULIP_READ(sc, CSR_PNIC_MII);
3279 if ((val & PNIC_MII_BUSY) == 0) {
3280 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA)
3281 return (0);
3282 else
3283 return (val & PNIC_MII_DATA);
3284 }
3285 }
3286 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname);
3287 return (0);
3288 }
3289
3290 /*
3291 * tlp_pnic_mii_writereg:
3292 *
3293 * Write a PHY register on the Lite-On PNIC.
3294 */
3295 void
3296 tlp_pnic_mii_writereg(self, phy, reg, val)
3297 struct device *self;
3298 int phy, reg, val;
3299 {
3300 struct tulip_softc *sc = (void *) self;
3301 int i;
3302
3303 TULIP_WRITE(sc, CSR_PNIC_MII,
3304 PNIC_MII_MBO | PNIC_MII_RESERVED |
3305 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) |
3306 (reg << PNIC_MII_REGSHIFT) | val);
3307
3308 for (i = 0; i < 1000; i++) {
3309 delay(10);
3310 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0)
3311 return;
3312 }
3313 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname);
3314 }
3315
3316 const bus_addr_t tlp_al981_phy_regmap[] = {
3317 CSR_ADM_BMCR,
3318 CSR_ADM_BMSR,
3319 CSR_ADM_PHYIDR1,
3320 CSR_ADM_PHYIDR2,
3321 CSR_ADM_ANAR,
3322 CSR_ADM_ANLPAR,
3323 CSR_ADM_ANER,
3324
3325 CSR_ADM_XMC,
3326 CSR_ADM_XCIIS,
3327 CSR_ADM_XIE,
3328 CSR_ADM_100CTR,
3329 };
3330 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) /
3331 sizeof(tlp_al981_phy_regmap[0]);
3332
3333 /*
3334 * tlp_al981_mii_readreg:
3335 *
3336 * Read a PHY register on the ADMtek AL981.
3337 */
3338 int
3339 tlp_al981_mii_readreg(self, phy, reg)
3340 struct device *self;
3341 int phy, reg;
3342 {
3343 struct tulip_softc *sc = (struct tulip_softc *)self;
3344
3345 /* AL981 only has an internal PHY. */
3346 if (phy != 0)
3347 return (0);
3348
3349 if (reg >= tlp_al981_phy_regmap_size)
3350 return (0);
3351
3352 return (bus_space_read_4(sc->sc_st, sc->sc_sh,
3353 tlp_al981_phy_regmap[reg]) & 0xffff);
3354 }
3355
3356 /*
3357 * tlp_al981_mii_writereg:
3358 *
3359 * Write a PHY register on the ADMtek AL981.
3360 */
3361 void
3362 tlp_al981_mii_writereg(self, phy, reg, val)
3363 struct device *self;
3364 int phy, reg, val;
3365 {
3366 struct tulip_softc *sc = (struct tulip_softc *)self;
3367
3368 /* AL981 only has an internal PHY. */
3369 if (phy != 0)
3370 return;
3371
3372 if (reg >= tlp_al981_phy_regmap_size)
3373 return;
3374
3375 bus_space_write_4(sc->sc_st, sc->sc_sh,
3376 tlp_al981_phy_regmap[reg], val);
3377 }
3378
3379 /*****************************************************************************
3380 * Chip-specific pre-init and reset functions.
3381 *****************************************************************************/
3382
3383 /*
3384 * tlp_2114x_preinit:
3385 *
3386 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
3387 */
3388 void
3389 tlp_2114x_preinit(sc)
3390 struct tulip_softc *sc;
3391 {
3392 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3393 struct tulip_21x4x_media *tm = ife->ifm_aux;
3394
3395 /*
3396 * Whether or not we're in MII or SIA/SYM mode, the media info
3397 * contains the appropriate OPMODE bits.
3398 *
3399 * Note that if we have no media info, we are are doing
3400 * non-MII `auto'.
3401 *
3402 * Also, we always set the Must-Be-One bit.
3403 */
3404 if (tm == NULL) {
3405 #ifdef DIAGNOSTIC
3406 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
3407 panic("tlp_2114x_preinit: not IFM_AUTO");
3408 if (sc->sc_nway_active == NULL)
3409 panic("tlp_2114x_preinit: nway_active NULL");
3410 #endif
3411 tm = sc->sc_nway_active->ifm_aux;
3412 }
3413 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode;
3414
3415 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3416 }
3417
3418 /*
3419 * tlp_2114x_mii_preinit:
3420 *
3421 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
3422 * This version is used by boards which only have MII and don't have
3423 * an ISV SROM.
3424 */
3425 void
3426 tlp_2114x_mii_preinit(sc)
3427 struct tulip_softc *sc;
3428 {
3429
3430 /*
3431 * Always set the Must-Be-One bit, and Port Select (to select MII).
3432 * We'll never be called during a media change.
3433 */
3434 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS;
3435 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3436 }
3437
3438 /*
3439 * tlp_pnic_preinit:
3440 *
3441 * Pre-init function for the Lite-On 82c168 and 82c169.
3442 */
3443 void
3444 tlp_pnic_preinit(sc)
3445 struct tulip_softc *sc;
3446 {
3447
3448 if (sc->sc_flags & TULIPF_HAS_MII) {
3449 /*
3450 * MII case: just set the port-select bit; we will never
3451 * be called during a media change.
3452 */
3453 sc->sc_opmode |= OPMODE_PS;
3454 } else {
3455 /*
3456 * ENDEC/PCS/Nway mode; enable the Tx backoff counter.
3457 */
3458 sc->sc_opmode |= OPMODE_PNIC_TBEN;
3459 }
3460 }
3461
3462 /*
3463 * tlp_dm9102_preinit:
3464 *
3465 * Pre-init function for the Davicom DM9102.
3466 */
3467 void
3468 tlp_dm9102_preinit(sc)
3469 struct tulip_softc *sc;
3470 {
3471
3472 switch (sc->sc_chip) {
3473 case TULIP_CHIP_DM9102:
3474 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD|OPMODE_PS;
3475 break;
3476
3477 case TULIP_CHIP_DM9102A:
3478 /*
3479 * XXX Figure out how to actually deal with the HomePNA
3480 * XXX portion of the DM9102A.
3481 */
3482 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD;
3483 break;
3484
3485 default:
3486 /* Nothing. */
3487 break;
3488 }
3489
3490 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
3491 }
3492
3493 /*
3494 * tlp_21140_reset:
3495 *
3496 * Issue a reset sequence on the 21140 via the GPIO facility.
3497 */
3498 void
3499 tlp_21140_reset(sc)
3500 struct tulip_softc *sc;
3501 {
3502 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3503 struct tulip_21x4x_media *tm = ife->ifm_aux;
3504 int i;
3505
3506 /* First, set the direction on the GPIO pins. */
3507 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
3508
3509 /* Now, issue the reset sequence. */
3510 for (i = 0; i < tm->tm_reset_length; i++) {
3511 delay(10);
3512 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]);
3513 }
3514
3515 /* Now, issue the selection sequence. */
3516 for (i = 0; i < tm->tm_gp_length; i++) {
3517 delay(10);
3518 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]);
3519 }
3520
3521 /* If there were no sequences, just lower the pins. */
3522 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0)
3523 TULIP_WRITE(sc, CSR_GPP, 0);
3524 }
3525
3526 /*
3527 * tlp_21142_reset:
3528 *
3529 * Issue a reset sequence on the 21142 via the GPIO facility.
3530 */
3531 void
3532 tlp_21142_reset(sc)
3533 struct tulip_softc *sc;
3534 {
3535 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
3536 struct tulip_21x4x_media *tm = ife->ifm_aux;
3537 const u_int8_t *ncp;
3538 int i;
3539
3540 ncp = &sc->sc_srom[tm->tm_reset_offset];
3541 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) {
3542 delay(10);
3543 TULIP_WRITE(sc, CSR_SIAGEN,
3544 TULIP_ROM_GETW(ncp, 0) << 16);
3545 }
3546
3547 ncp = &sc->sc_srom[tm->tm_gp_offset];
3548 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) {
3549 delay(10);
3550 TULIP_WRITE(sc, CSR_SIAGEN,
3551 TULIP_ROM_GETW(ncp, 0) << 16);
3552 }
3553
3554 /* If there were no sequences, just lower the pins. */
3555 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
3556 delay(10);
3557 TULIP_WRITE(sc, CSR_SIAGEN, 0);
3558 }
3559 }
3560
3561 /*
3562 * tlp_pmac_reset:
3563 *
3564 * Reset routine for Macronix chips.
3565 */
3566 void
3567 tlp_pmac_reset(sc)
3568 struct tulip_softc *sc;
3569 {
3570
3571 switch (sc->sc_chip) {
3572 case TULIP_CHIP_82C115:
3573 case TULIP_CHIP_MX98715:
3574 case TULIP_CHIP_MX98715A:
3575 case TULIP_CHIP_MX98725:
3576 /*
3577 * Set the LED operating mode. This information is located
3578 * in the EEPROM at byte offset 0x77, per the MX98715A and
3579 * MX98725 application notes.
3580 */
3581 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24);
3582 break;
3583 case TULIP_CHIP_MX98715AEC_X:
3584 /*
3585 * Set the LED operating mode. This information is located
3586 * in the EEPROM at byte offset 0x76, per the MX98715AEC
3587 * application note.
3588 */
3589 TULIP_WRITE(sc, CSR_MIIROM, ((0xf & sc->sc_srom[0x76]) << 28)
3590 | ((0xf0 & sc->sc_srom[0x76]) << 20));
3591 break;
3592
3593 default:
3594 /* Nothing. */
3595 break;
3596 }
3597 }
3598
3599 /*
3600 * tlp_dm9102_reset:
3601 *
3602 * Reset routine for the Davicom DM9102.
3603 */
3604 void
3605 tlp_dm9102_reset(sc)
3606 struct tulip_softc *sc;
3607 {
3608
3609 TULIP_WRITE(sc, CSR_DM_PHYSTAT, DM_PHYSTAT_GEPC|DM_PHYSTAT_GPED);
3610 delay(100);
3611 TULIP_WRITE(sc, CSR_DM_PHYSTAT, 0);
3612 }
3613
3614 /*****************************************************************************
3615 * Chip/board-specific media switches. The ones here are ones that
3616 * are potentially common to multiple front-ends.
3617 *****************************************************************************/
3618
3619 /*
3620 * This table is a common place for all sorts of media information,
3621 * keyed off of the SROM media code for that media.
3622 *
3623 * Note that we explicitly configure the 21142/21143 to always advertise
3624 * NWay capabilities when using the UTP port.
3625 * XXX Actually, we don't yet.
3626 */
3627 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = {
3628 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0,
3629 "10baseT",
3630 0,
3631 { SIACONN_21040_10BASET,
3632 SIATXRX_21040_10BASET,
3633 SIAGEN_21040_10BASET },
3634
3635 { SIACONN_21041_10BASET,
3636 SIATXRX_21041_10BASET,
3637 SIAGEN_21041_10BASET },
3638
3639 { SIACONN_21142_10BASET,
3640 SIATXRX_21142_10BASET,
3641 SIAGEN_21142_10BASET } },
3642
3643 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0,
3644 "10base2",
3645 0,
3646 { 0,
3647 0,
3648 0 },
3649
3650 { SIACONN_21041_BNC,
3651 SIATXRX_21041_BNC,
3652 SIAGEN_21041_BNC },
3653
3654 { SIACONN_21142_BNC,
3655 SIATXRX_21142_BNC,
3656 SIAGEN_21142_BNC } },
3657
3658 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0,
3659 "10base5",
3660 0,
3661 { SIACONN_21040_AUI,
3662 SIATXRX_21040_AUI,
3663 SIAGEN_21040_AUI },
3664
3665 { SIACONN_21041_AUI,
3666 SIATXRX_21041_AUI,
3667 SIAGEN_21041_AUI },
3668
3669 { SIACONN_21142_AUI,
3670 SIATXRX_21142_AUI,
3671 SIAGEN_21142_AUI } },
3672
3673 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0,
3674 "100baseTX",
3675 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD,
3676 { 0,
3677 0,
3678 0 },
3679
3680 { 0,
3681 0,
3682 0 },
3683
3684 { 0,
3685 0,
3686 SIAGEN_ABM } },
3687
3688 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX,
3689 "10baseT-FDX",
3690 OPMODE_FD|OPMODE_HBD,
3691 { SIACONN_21040_10BASET_FDX,
3692 SIATXRX_21040_10BASET_FDX,
3693 SIAGEN_21040_10BASET_FDX },
3694
3695 { SIACONN_21041_10BASET_FDX,
3696 SIATXRX_21041_10BASET_FDX,
3697 SIAGEN_21041_10BASET_FDX },
3698
3699 { SIACONN_21142_10BASET_FDX,
3700 SIATXRX_21142_10BASET_FDX,
3701 SIAGEN_21142_10BASET_FDX } },
3702
3703 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX,
3704 "100baseTX-FDX",
3705 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD,
3706 { 0,
3707 0,
3708 0 },
3709
3710 { 0,
3711 0,
3712 0 },
3713
3714 { 0,
3715 0,
3716 SIAGEN_ABM } },
3717
3718 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0,
3719 "100baseT4",
3720 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD,
3721 { 0,
3722 0,
3723 0 },
3724
3725 { 0,
3726 0,
3727 0 },
3728
3729 { 0,
3730 0,
3731 SIAGEN_ABM } },
3732
3733 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0,
3734 "100baseFX",
3735 OPMODE_PS|OPMODE_PCS|OPMODE_HBD,
3736 { 0,
3737 0,
3738 0 },
3739
3740 { 0,
3741 0,
3742 0 },
3743
3744 { 0,
3745 0,
3746 SIAGEN_ABM } },
3747
3748 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX,
3749 "100baseFX-FDX",
3750 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD,
3751 { 0,
3752 0,
3753 0 },
3754
3755 { 0,
3756 0,
3757 0 },
3758
3759 { 0,
3760 0,
3761 SIAGEN_ABM } },
3762
3763 { 0, 0, 0,
3764 NULL,
3765 0,
3766 { 0,
3767 0,
3768 0 },
3769
3770 { 0,
3771 0,
3772 0 },
3773
3774 { 0,
3775 0,
3776 0 } },
3777 };
3778
3779 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t));
3780 void tlp_srom_media_info __P((struct tulip_softc *,
3781 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *));
3782 void tlp_add_srom_media __P((struct tulip_softc *, int,
3783 void (*)(struct tulip_softc *, struct ifmediareq *),
3784 int (*)(struct tulip_softc *), const u_int8_t *, int));
3785 void tlp_print_media __P((struct tulip_softc *));
3786 void tlp_nway_activate __P((struct tulip_softc *, int));
3787 void tlp_get_minst __P((struct tulip_softc *));
3788
3789 const struct tulip_srom_to_ifmedia *
3790 tlp_srom_to_ifmedia(sm)
3791 u_int8_t sm;
3792 {
3793 const struct tulip_srom_to_ifmedia *tsti;
3794
3795 for (tsti = tulip_srom_to_ifmedia_table;
3796 tsti->tsti_name != NULL; tsti++) {
3797 if (tsti->tsti_srom == sm)
3798 return (tsti);
3799 }
3800
3801 return (NULL);
3802 }
3803
3804 void
3805 tlp_srom_media_info(sc, tsti, tm)
3806 struct tulip_softc *sc;
3807 const struct tulip_srom_to_ifmedia *tsti;
3808 struct tulip_21x4x_media *tm;
3809 {
3810
3811 tm->tm_name = tsti->tsti_name;
3812 tm->tm_opmode = tsti->tsti_opmode;
3813
3814 switch (sc->sc_chip) {
3815 case TULIP_CHIP_DE425:
3816 case TULIP_CHIP_21040:
3817 tm->tm_sia = tsti->tsti_21040; /* struct assignment */
3818 break;
3819
3820 case TULIP_CHIP_21041:
3821 tm->tm_sia = tsti->tsti_21041; /* struct assignment */
3822 break;
3823
3824 case TULIP_CHIP_21142:
3825 case TULIP_CHIP_21143:
3826 case TULIP_CHIP_82C115:
3827 case TULIP_CHIP_MX98715:
3828 case TULIP_CHIP_MX98715A:
3829 case TULIP_CHIP_MX98715AEC_X:
3830 case TULIP_CHIP_MX98725:
3831 tm->tm_sia = tsti->tsti_21142; /* struct assignment */
3832 break;
3833
3834 default:
3835 /* Nothing. */
3836 break;
3837 }
3838 }
3839
3840 void
3841 tlp_add_srom_media(sc, type, get, set, list, cnt)
3842 struct tulip_softc *sc;
3843 int type;
3844 void (*get) __P((struct tulip_softc *, struct ifmediareq *));
3845 int (*set) __P((struct tulip_softc *));
3846 const u_int8_t *list;
3847 int cnt;
3848 {
3849 struct tulip_21x4x_media *tm;
3850 const struct tulip_srom_to_ifmedia *tsti;
3851 int i;
3852
3853 for (i = 0; i < cnt; i++) {
3854 tsti = tlp_srom_to_ifmedia(list[i]);
3855 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
3856 memset(tm, 0, sizeof(*tm));
3857 tlp_srom_media_info(sc, tsti, tm);
3858 tm->tm_type = type;
3859 tm->tm_get = get;
3860 tm->tm_set = set;
3861
3862 ifmedia_add(&sc->sc_mii.mii_media,
3863 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
3864 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
3865 }
3866 }
3867
3868 void
3869 tlp_print_media(sc)
3870 struct tulip_softc *sc;
3871 {
3872 struct ifmedia_entry *ife;
3873 struct tulip_21x4x_media *tm;
3874 const char *sep = "";
3875
3876 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
3877
3878 printf("%s: ", sc->sc_dev.dv_xname);
3879 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
3880 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) {
3881 tm = ife->ifm_aux;
3882 if (tm == NULL) {
3883 #ifdef DIAGNOSTIC
3884 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
3885 panic("tlp_print_media");
3886 #endif
3887 PRINT("auto");
3888 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII &&
3889 tm->tm_type != TULIP_ROM_MB_21142_MII) {
3890 PRINT(tm->tm_name);
3891 }
3892 }
3893 printf("\n");
3894
3895 #undef PRINT
3896 }
3897
3898 void
3899 tlp_nway_activate(sc, media)
3900 struct tulip_softc *sc;
3901 int media;
3902 {
3903 struct ifmedia_entry *ife;
3904
3905 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0);
3906 #ifdef DIAGNOSTIC
3907 if (ife == NULL)
3908 panic("tlp_nway_activate");
3909 #endif
3910 sc->sc_nway_active = ife;
3911 }
3912
3913 void
3914 tlp_get_minst(sc)
3915 struct tulip_softc *sc;
3916 {
3917
3918 if ((sc->sc_media_seen &
3919 ~((1 << TULIP_ROM_MB_21140_MII) |
3920 (1 << TULIP_ROM_MB_21142_MII))) == 0) {
3921 /*
3922 * We have not yet seen any SIA/SYM media (but are
3923 * about to; that's why we're called!), so assign
3924 * the current media instance to be the `internal media'
3925 * instance, and advance it so any MII media gets a
3926 * fresh one (used to selecting/isolating a PHY).
3927 */
3928 sc->sc_tlp_minst = sc->sc_mii.mii_instance++;
3929 }
3930 }
3931
3932 /*
3933 * SIA Utility functions.
3934 */
3935 void tlp_sia_update_link __P((struct tulip_softc *));
3936 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *));
3937 int tlp_sia_set __P((struct tulip_softc *));
3938 void tlp_sia_fixup __P((struct tulip_softc *));
3939
3940 void
3941 tlp_sia_update_link(sc)
3942 struct tulip_softc *sc;
3943 {
3944 struct ifmedia_entry *ife;
3945 struct tulip_21x4x_media *tm;
3946 u_int32_t siastat;
3947
3948 ife = TULIP_CURRENT_MEDIA(sc);
3949 tm = ife->ifm_aux;
3950
3951 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID);
3952
3953 siastat = TULIP_READ(sc, CSR_SIASTAT);
3954
3955 /*
3956 * Note that when we do SIA link tests, we are assuming that
3957 * the chip is really in the mode that the current media setting
3958 * reflects. If we're not, then the link tests will not be
3959 * accurate!
3960 */
3961 switch (IFM_SUBTYPE(ife->ifm_media)) {
3962 case IFM_10_T:
3963 sc->sc_flags |= TULIPF_LINK_VALID;
3964 if ((siastat & SIASTAT_LS10) == 0)
3965 sc->sc_flags |= TULIPF_LINK_UP;
3966 break;
3967
3968 case IFM_100_TX:
3969 case IFM_100_T4:
3970 sc->sc_flags |= TULIPF_LINK_VALID;
3971 if ((siastat & SIASTAT_LS100) == 0)
3972 sc->sc_flags |= TULIPF_LINK_UP;
3973 break;
3974 }
3975
3976 switch (sc->sc_chip) {
3977 case TULIP_CHIP_21142:
3978 case TULIP_CHIP_21143:
3979 /*
3980 * On these chips, we can tell more information about
3981 * AUI/BNC. Note that the AUI/BNC selection is made
3982 * in a different register; for our purpose, it's all
3983 * AUI.
3984 */
3985 switch (IFM_SUBTYPE(ife->ifm_media)) {
3986 case IFM_10_2:
3987 case IFM_10_5:
3988 sc->sc_flags |= TULIPF_LINK_VALID;
3989 if (siastat & SIASTAT_ARA) {
3990 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA);
3991 sc->sc_flags |= TULIPF_LINK_UP;
3992 }
3993 break;
3994
3995 default:
3996 /*
3997 * If we're SYM media and can detect the link
3998 * via the GPIO facility, prefer that status
3999 * over LS100.
4000 */
4001 if (tm->tm_type == TULIP_ROM_MB_21143_SYM &&
4002 tm->tm_actmask != 0) {
4003 sc->sc_flags = (sc->sc_flags &
4004 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID;
4005 if (TULIP_ISSET(sc, CSR_SIAGEN,
4006 tm->tm_actmask) == tm->tm_actdata)
4007 sc->sc_flags |= TULIPF_LINK_UP;
4008 }
4009 }
4010 break;
4011
4012 default:
4013 /* Nothing. */
4014 break;
4015 }
4016 }
4017
4018 void
4019 tlp_sia_get(sc, ifmr)
4020 struct tulip_softc *sc;
4021 struct ifmediareq *ifmr;
4022 {
4023 struct ifmedia_entry *ife;
4024
4025 ifmr->ifm_status = 0;
4026
4027 tlp_sia_update_link(sc);
4028
4029 ife = TULIP_CURRENT_MEDIA(sc);
4030
4031 if (sc->sc_flags & TULIPF_LINK_VALID)
4032 ifmr->ifm_status |= IFM_AVALID;
4033 if (sc->sc_flags & TULIPF_LINK_UP)
4034 ifmr->ifm_status |= IFM_ACTIVE;
4035 ifmr->ifm_active = ife->ifm_media;
4036 }
4037
4038 void
4039 tlp_sia_fixup(sc)
4040 struct tulip_softc *sc;
4041 {
4042 struct ifmedia_entry *ife;
4043 struct tulip_21x4x_media *tm;
4044 u_int32_t siaconn, siatxrx, siagen;
4045
4046 switch (sc->sc_chip) {
4047 case TULIP_CHIP_82C115:
4048 case TULIP_CHIP_MX98713A:
4049 case TULIP_CHIP_MX98715:
4050 case TULIP_CHIP_MX98715A:
4051 case TULIP_CHIP_MX98715AEC_X:
4052 case TULIP_CHIP_MX98725:
4053 siaconn = PMAC_SIACONN_MASK;
4054 siatxrx = PMAC_SIATXRX_MASK;
4055 siagen = PMAC_SIAGEN_MASK;
4056 break;
4057
4058 default:
4059 /* No fixups required on any other chips. */
4060 return;
4061 }
4062
4063 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4064 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) {
4065 tm = ife->ifm_aux;
4066 if (tm == NULL)
4067 continue;
4068
4069 tm->tm_siaconn &= siaconn;
4070 tm->tm_siatxrx &= siatxrx;
4071 tm->tm_siagen &= siagen;
4072 }
4073 }
4074
4075 int
4076 tlp_sia_set(sc)
4077 struct tulip_softc *sc;
4078 {
4079 struct ifmedia_entry *ife;
4080 struct tulip_21x4x_media *tm;
4081
4082 ife = TULIP_CURRENT_MEDIA(sc);
4083 tm = ife->ifm_aux;
4084
4085 /*
4086 * XXX This appears to be necessary on a bunch of the clone chips.
4087 */
4088 delay(20000);
4089
4090 /*
4091 * Idle the chip.
4092 */
4093 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
4094
4095 /*
4096 * Program the SIA. It's important to write in this order,
4097 * resetting the SIA first.
4098 */
4099 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */
4100 delay(1000);
4101
4102 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx);
4103
4104 switch (sc->sc_chip) {
4105 case TULIP_CHIP_21142:
4106 case TULIP_CHIP_21143:
4107 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl);
4108 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata);
4109 break;
4110 default:
4111 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen);
4112 }
4113
4114 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn);
4115
4116 /*
4117 * Set the OPMODE bits for this media and write OPMODE.
4118 * This will resume the transmit and receive processes.
4119 */
4120 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
4121 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
4122
4123 return (0);
4124 }
4125
4126 /*
4127 * 21140 GPIO utility functions.
4128 */
4129 void tlp_21140_gpio_update_link __P((struct tulip_softc *));
4130 void tlp_21140_gpio_get __P((struct tulip_softc *sc,
4131 struct ifmediareq *ifmr));
4132 int tlp_21140_gpio_set __P((struct tulip_softc *sc));
4133
4134 void
4135 tlp_21140_gpio_update_link(sc)
4136 struct tulip_softc *sc;
4137 {
4138 struct ifmedia_entry *ife;
4139 struct tulip_21x4x_media *tm;
4140
4141 ife = TULIP_CURRENT_MEDIA(sc);
4142 tm = ife->ifm_aux;
4143
4144 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID);
4145
4146 if (tm->tm_actmask != 0) {
4147 sc->sc_flags |= TULIPF_LINK_VALID;
4148 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) ==
4149 tm->tm_actdata)
4150 sc->sc_flags |= TULIPF_LINK_UP;
4151 }
4152 }
4153
4154 void
4155 tlp_21140_gpio_get(sc, ifmr)
4156 struct tulip_softc *sc;
4157 struct ifmediareq *ifmr;
4158 {
4159 struct ifmedia_entry *ife;
4160
4161 ifmr->ifm_status = 0;
4162
4163 tlp_21140_gpio_update_link(sc);
4164
4165 ife = TULIP_CURRENT_MEDIA(sc);
4166
4167 if (sc->sc_flags & TULIPF_LINK_VALID)
4168 ifmr->ifm_status |= IFM_AVALID;
4169 if (sc->sc_flags & TULIPF_LINK_UP)
4170 ifmr->ifm_status |= IFM_ACTIVE;
4171 ifmr->ifm_active = ife->ifm_media;
4172 }
4173
4174 int
4175 tlp_21140_gpio_set(sc)
4176 struct tulip_softc *sc;
4177 {
4178 struct ifmedia_entry *ife;
4179 struct tulip_21x4x_media *tm;
4180
4181 ife = TULIP_CURRENT_MEDIA(sc);
4182 tm = ife->ifm_aux;
4183
4184 /*
4185 * Idle the chip.
4186 */
4187 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
4188
4189 /*
4190 * Set the GPIO pins for this media, to flip any
4191 * relays, etc.
4192 */
4193 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
4194 delay(10);
4195 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata);
4196
4197 /*
4198 * Set the OPMODE bits for this media and write OPMODE.
4199 * This will resume the transmit and receive processes.
4200 */
4201 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
4202 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
4203
4204 return (0);
4205 }
4206
4207 /*
4208 * 21040 and 21041 media switches.
4209 */
4210 void tlp_21040_tmsw_init __P((struct tulip_softc *));
4211 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *));
4212 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *));
4213 void tlp_21041_tmsw_init __P((struct tulip_softc *));
4214
4215 const struct tulip_mediasw tlp_21040_mediasw = {
4216 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set
4217 };
4218
4219 const struct tulip_mediasw tlp_21040_tp_mediasw = {
4220 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set
4221 };
4222
4223 const struct tulip_mediasw tlp_21040_auibnc_mediasw = {
4224 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set
4225 };
4226
4227 const struct tulip_mediasw tlp_21041_mediasw = {
4228 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set
4229 };
4230
4231
4232 void
4233 tlp_21040_tmsw_init(sc)
4234 struct tulip_softc *sc;
4235 {
4236 static const u_int8_t media[] = {
4237 TULIP_ROM_MB_MEDIA_TP,
4238 TULIP_ROM_MB_MEDIA_TP_FDX,
4239 TULIP_ROM_MB_MEDIA_AUI,
4240 };
4241 struct tulip_21x4x_media *tm;
4242
4243 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4244 tlp_mediastatus);
4245
4246 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3);
4247
4248 /*
4249 * No SROM type for External SIA.
4250 */
4251 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4252 memset(tm, 0, sizeof(*tm));
4253 tm->tm_name = "manual";
4254 tm->tm_opmode = 0;
4255 tm->tm_siaconn = SIACONN_21040_EXTSIA;
4256 tm->tm_siatxrx = SIATXRX_21040_EXTSIA;
4257 tm->tm_siagen = SIAGEN_21040_EXTSIA;
4258 ifmedia_add(&sc->sc_mii.mii_media,
4259 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm);
4260
4261 /*
4262 * XXX Autosense not yet supported.
4263 */
4264
4265 /* XXX This should be auto-sense. */
4266 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4267
4268 tlp_print_media(sc);
4269 }
4270
4271 void
4272 tlp_21040_tp_tmsw_init(sc)
4273 struct tulip_softc *sc;
4274 {
4275 static const u_int8_t media[] = {
4276 TULIP_ROM_MB_MEDIA_TP,
4277 TULIP_ROM_MB_MEDIA_TP_FDX,
4278 };
4279
4280 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4281 tlp_mediastatus);
4282
4283 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2);
4284
4285 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4286
4287 tlp_print_media(sc);
4288 }
4289
4290 void
4291 tlp_21040_auibnc_tmsw_init(sc)
4292 struct tulip_softc *sc;
4293 {
4294 static const u_int8_t media[] = {
4295 TULIP_ROM_MB_MEDIA_AUI,
4296 };
4297
4298 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4299 tlp_mediastatus);
4300
4301 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1);
4302
4303 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5);
4304
4305 tlp_print_media(sc);
4306 }
4307
4308 void
4309 tlp_21041_tmsw_init(sc)
4310 struct tulip_softc *sc;
4311 {
4312 static const u_int8_t media[] = {
4313 TULIP_ROM_MB_MEDIA_TP,
4314 TULIP_ROM_MB_MEDIA_TP_FDX,
4315 TULIP_ROM_MB_MEDIA_BNC,
4316 TULIP_ROM_MB_MEDIA_AUI,
4317 };
4318 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt;
4319 const struct tulip_srom_to_ifmedia *tsti;
4320 struct tulip_21x4x_media *tm;
4321 u_int16_t romdef;
4322 u_int8_t mb;
4323
4324 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
4325 tlp_mediastatus);
4326
4327 if (tlp_isv_srom(sc->sc_srom) == 0) {
4328 not_isv_srom:
4329 /*
4330 * If we have a board without the standard 21041 SROM format,
4331 * we just assume all media are present and try and pick a
4332 * reasonable default.
4333 */
4334 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4);
4335
4336 /*
4337 * XXX Autosense not yet supported.
4338 */
4339
4340 /* XXX This should be auto-sense. */
4341 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
4342
4343 tlp_print_media(sc);
4344 return;
4345 }
4346
4347 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
4348 for (i = 0; i < devcnt; i++) {
4349 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
4350 break;
4351 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
4352 sc->sc_devno)
4353 break;
4354 }
4355
4356 if (i == devcnt)
4357 goto not_isv_srom;
4358
4359 leaf_offset = TULIP_ROM_GETW(sc->sc_srom,
4360 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i));
4361 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE;
4362 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT];
4363
4364 for (; m_cnt != 0;
4365 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) {
4366 mb = sc->sc_srom[mb_offset];
4367 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4368 memset(tm, 0, sizeof(*tm));
4369 switch (mb & TULIP_ROM_MB_MEDIA_CODE) {
4370 case TULIP_ROM_MB_MEDIA_TP_FDX:
4371 case TULIP_ROM_MB_MEDIA_TP:
4372 case TULIP_ROM_MB_MEDIA_BNC:
4373 case TULIP_ROM_MB_MEDIA_AUI:
4374 tsti = tlp_srom_to_ifmedia(mb &
4375 TULIP_ROM_MB_MEDIA_CODE);
4376
4377 tlp_srom_media_info(sc, tsti, tm);
4378
4379 /*
4380 * Override our default SIA settings if the
4381 * SROM contains its own.
4382 */
4383 if (mb & TULIP_ROM_MB_EXT) {
4384 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom,
4385 mb_offset + TULIP_ROM_MB_CSR13);
4386 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom,
4387 mb_offset + TULIP_ROM_MB_CSR14);
4388 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom,
4389 mb_offset + TULIP_ROM_MB_CSR15);
4390 }
4391
4392 ifmedia_add(&sc->sc_mii.mii_media,
4393 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4394 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4395 break;
4396
4397 default:
4398 printf("%s: unknown media code 0x%02x\n",
4399 sc->sc_dev.dv_xname,
4400 mb & TULIP_ROM_MB_MEDIA_CODE);
4401 free(tm, M_DEVBUF);
4402 }
4403 }
4404
4405 /*
4406 * XXX Autosense not yet supported.
4407 */
4408
4409 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset +
4410 TULIP_ROM_IL_SELECT_CONN_TYPE);
4411 switch (romdef) {
4412 case SELECT_CONN_TYPE_TP:
4413 case SELECT_CONN_TYPE_TP_AUTONEG:
4414 case SELECT_CONN_TYPE_TP_NOLINKPASS:
4415 defmedia = IFM_ETHER|IFM_10_T;
4416 break;
4417
4418 case SELECT_CONN_TYPE_TP_FDX:
4419 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX;
4420 break;
4421
4422 case SELECT_CONN_TYPE_BNC:
4423 defmedia = IFM_ETHER|IFM_10_2;
4424 break;
4425
4426 case SELECT_CONN_TYPE_AUI:
4427 defmedia = IFM_ETHER|IFM_10_5;
4428 break;
4429 #if 0 /* XXX */
4430 case SELECT_CONN_TYPE_ASENSE:
4431 case SELECT_CONN_TYPE_ASENSE_AUTONEG:
4432 defmedia = IFM_ETHER|IFM_AUTO;
4433 break;
4434 #endif
4435 default:
4436 defmedia = 0;
4437 }
4438
4439 if (defmedia == 0) {
4440 /*
4441 * XXX We should default to auto-sense.
4442 */
4443 defmedia = IFM_ETHER|IFM_10_T;
4444 }
4445
4446 ifmedia_set(&sc->sc_mii.mii_media, defmedia);
4447
4448 tlp_print_media(sc);
4449 }
4450
4451 /*
4452 * DECchip 2114x ISV media switch.
4453 */
4454 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *));
4455 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
4456 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *));
4457
4458 const struct tulip_mediasw tlp_2114x_isv_mediasw = {
4459 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set
4460 };
4461
4462 void
4463 tlp_2114x_isv_tmsw_init(sc)
4464 struct tulip_softc *sc;
4465 {
4466 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
4467 struct ifmedia_entry *ife;
4468 struct mii_softc *phy;
4469 struct tulip_21x4x_media *tm;
4470 const struct tulip_srom_to_ifmedia *tsti;
4471 int i, devcnt, leaf_offset, m_cnt, type, length;
4472 int defmedia, miidef;
4473 u_int16_t word;
4474 u_int8_t *cp, *ncp;
4475
4476 defmedia = miidef = 0;
4477
4478 sc->sc_mii.mii_ifp = ifp;
4479 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
4480 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
4481 sc->sc_mii.mii_statchg = sc->sc_statchg;
4482
4483 /*
4484 * Ignore `instance'; we may get a mixture of SIA and MII
4485 * media, and `instance' is used to isolate or select the
4486 * PHY on the MII as appropriate. Note that duplicate media
4487 * are disallowed, so ignoring `instance' is safe.
4488 */
4489 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange,
4490 tlp_mediastatus);
4491
4492 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
4493 for (i = 0; i < devcnt; i++) {
4494 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
4495 break;
4496 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
4497 sc->sc_devno)
4498 break;
4499 }
4500
4501 if (i == devcnt) {
4502 printf("%s: unable to locate info leaf in SROM\n",
4503 sc->sc_dev.dv_xname);
4504 return;
4505 }
4506
4507 leaf_offset = TULIP_ROM_GETW(sc->sc_srom,
4508 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i));
4509
4510 /* XXX SELECT CONN TYPE */
4511
4512 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT];
4513
4514 /*
4515 * On some chips, the first thing in the Info Leaf is the
4516 * GPIO pin direction data.
4517 */
4518 switch (sc->sc_chip) {
4519 case TULIP_CHIP_21140:
4520 case TULIP_CHIP_21140A:
4521 case TULIP_CHIP_MX98713:
4522 case TULIP_CHIP_AX88140:
4523 case TULIP_CHIP_AX88141:
4524 sc->sc_gp_dir = *cp++;
4525 break;
4526
4527 default:
4528 /* Nothing. */
4529 break;
4530 }
4531
4532 /* Get the media count. */
4533 m_cnt = *cp++;
4534
4535 for (; m_cnt != 0; cp = ncp, m_cnt--) {
4536 /*
4537 * Determine the type and length of this media block.
4538 */
4539 if ((*cp & 0x80) == 0) {
4540 length = 4;
4541 type = TULIP_ROM_MB_21140_GPR;
4542 } else {
4543 length = (*cp++ & 0x7f) - 1;
4544 type = *cp++ & 0x3f;
4545 }
4546
4547 /* Compute the start of the next block. */
4548 ncp = cp + length;
4549
4550 /* Now, parse the block. */
4551 switch (type) {
4552 case TULIP_ROM_MB_21140_GPR:
4553 tlp_get_minst(sc);
4554 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR;
4555
4556 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4557 memset(tm, 0, sizeof(*tm));
4558
4559 tm->tm_type = TULIP_ROM_MB_21140_GPR;
4560 tm->tm_get = tlp_21140_gpio_get;
4561 tm->tm_set = tlp_21140_gpio_set;
4562
4563 /* First is the media type code. */
4564 tsti = tlp_srom_to_ifmedia(cp[0] &
4565 TULIP_ROM_MB_MEDIA_CODE);
4566 if (tsti == NULL) {
4567 /* Invalid media code. */
4568 free(tm, M_DEVBUF);
4569 break;
4570 }
4571
4572 /* Get defaults. */
4573 tlp_srom_media_info(sc, tsti, tm);
4574
4575 /* Next is any GPIO info for this media. */
4576 tm->tm_gpdata = cp[1];
4577
4578 /*
4579 * Next is a word containing OPMODE information
4580 * and info on how to detect if this media is
4581 * active.
4582 */
4583 word = TULIP_ROM_GETW(cp, 2);
4584 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word);
4585 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
4586 tm->tm_actmask =
4587 TULIP_ROM_MB_BITPOS(word);
4588 tm->tm_actdata =
4589 (word & TULIP_ROM_MB_POLARITY) ?
4590 0 : tm->tm_actmask;
4591 }
4592
4593 ifmedia_add(&sc->sc_mii.mii_media,
4594 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4595 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4596 break;
4597
4598 case TULIP_ROM_MB_21140_MII:
4599 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII;
4600
4601 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4602 memset(tm, 0, sizeof(*tm));
4603
4604 tm->tm_type = TULIP_ROM_MB_21140_MII;
4605 tm->tm_get = tlp_mii_getmedia;
4606 tm->tm_set = tlp_mii_setmedia;
4607 tm->tm_opmode = OPMODE_PS;
4608
4609 if (sc->sc_reset == NULL)
4610 sc->sc_reset = tlp_21140_reset;
4611
4612 /* First is the PHY number. */
4613 tm->tm_phyno = *cp++;
4614
4615 /* Next is the MII select sequence length and offset. */
4616 tm->tm_gp_length = *cp++;
4617 tm->tm_gp_offset = cp - &sc->sc_srom[0];
4618 cp += tm->tm_gp_length;
4619
4620 /* Next is the MII reset sequence length and offset. */
4621 tm->tm_reset_length = *cp++;
4622 tm->tm_reset_offset = cp - &sc->sc_srom[0];
4623 cp += tm->tm_reset_length;
4624
4625 /*
4626 * The following items are left in the media block
4627 * that we don't particularly care about:
4628 *
4629 * capabilities W
4630 * advertisement W
4631 * full duplex W
4632 * tx threshold W
4633 *
4634 * These appear to be bits in the PHY registers,
4635 * which our MII code handles on its own.
4636 */
4637
4638 /*
4639 * Before we probe the MII bus, we need to reset
4640 * it and issue the selection sequence.
4641 */
4642
4643 /* Set the direction of the pins... */
4644 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir);
4645
4646 for (i = 0; i < tm->tm_reset_length; i++) {
4647 delay(10);
4648 TULIP_WRITE(sc, CSR_GPP,
4649 sc->sc_srom[tm->tm_reset_offset + i]);
4650 }
4651
4652 for (i = 0; i < tm->tm_gp_length; i++) {
4653 delay(10);
4654 TULIP_WRITE(sc, CSR_GPP,
4655 sc->sc_srom[tm->tm_gp_offset + i]);
4656 }
4657
4658 /* If there were no sequences, just lower the pins. */
4659 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
4660 delay(10);
4661 TULIP_WRITE(sc, CSR_GPP, 0);
4662 }
4663
4664 /*
4665 * Now, probe the MII for the PHY. Note, we know
4666 * the location of the PHY on the bus, but we don't
4667 * particularly care; the MII code just likes to
4668 * search the whole thing anyhow.
4669 */
4670 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4671 MII_PHY_ANY, tm->tm_phyno, 0);
4672
4673 /*
4674 * Now, search for the PHY we hopefully just
4675 * configured. If it's not configured into the
4676 * kernel, we lose. The PHY's default media always
4677 * takes priority.
4678 */
4679 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys);
4680 phy != NULL;
4681 phy = LIST_NEXT(phy, mii_list))
4682 if (phy->mii_offset == tm->tm_phyno)
4683 break;
4684 if (phy == NULL) {
4685 printf("%s: unable to configure MII\n",
4686 sc->sc_dev.dv_xname);
4687 break;
4688 }
4689
4690 sc->sc_flags |= TULIPF_HAS_MII;
4691 sc->sc_tick = tlp_mii_tick;
4692 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0,
4693 phy->mii_inst);
4694
4695 /*
4696 * Okay, now that we've found the PHY and the MII
4697 * layer has added all of the media associated
4698 * with that PHY, we need to traverse the media
4699 * list, and add our `tm' to each entry's `aux'
4700 * pointer.
4701 *
4702 * We do this by looking for media with our
4703 * PHY's `instance'.
4704 */
4705 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4706 ife != NULL;
4707 ife = TAILQ_NEXT(ife, ifm_list)) {
4708 if (IFM_INST(ife->ifm_media) != phy->mii_inst)
4709 continue;
4710 ife->ifm_aux = tm;
4711 }
4712 break;
4713
4714 case TULIP_ROM_MB_21142_SIA:
4715 tlp_get_minst(sc);
4716 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA;
4717
4718 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4719 memset(tm, 0, sizeof(*tm));
4720
4721 tm->tm_type = TULIP_ROM_MB_21142_SIA;
4722 tm->tm_get = tlp_sia_get;
4723 tm->tm_set = tlp_sia_set;
4724
4725 /* First is the media type code. */
4726 tsti = tlp_srom_to_ifmedia(cp[0] &
4727 TULIP_ROM_MB_MEDIA_CODE);
4728 if (tsti == NULL) {
4729 /* Invalid media code. */
4730 free(tm, M_DEVBUF);
4731 break;
4732 }
4733
4734 /* Get defaults. */
4735 tlp_srom_media_info(sc, tsti, tm);
4736
4737 /*
4738 * Override our default SIA settings if the
4739 * SROM contains its own.
4740 */
4741 if (cp[0] & 0x40) {
4742 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1);
4743 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3);
4744 tm->tm_siagen = TULIP_ROM_GETW(cp, 5);
4745 cp += 7;
4746 } else
4747 cp++;
4748
4749 /* Next is GPIO control/data. */
4750 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0);
4751 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2);
4752
4753 ifmedia_add(&sc->sc_mii.mii_media,
4754 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4755 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4756 break;
4757
4758 case TULIP_ROM_MB_21142_MII:
4759 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII;
4760
4761 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4762 memset(tm, 0, sizeof(*tm));
4763
4764 tm->tm_type = TULIP_ROM_MB_21142_MII;
4765 tm->tm_get = tlp_mii_getmedia;
4766 tm->tm_set = tlp_mii_setmedia;
4767 tm->tm_opmode = OPMODE_PS;
4768
4769 if (sc->sc_reset == NULL)
4770 sc->sc_reset = tlp_21142_reset;
4771
4772 /* First is the PHY number. */
4773 tm->tm_phyno = *cp++;
4774
4775 /* Next is the MII select sequence length and offset. */
4776 tm->tm_gp_length = *cp++;
4777 tm->tm_gp_offset = cp - &sc->sc_srom[0];
4778 cp += tm->tm_gp_length * 2;
4779
4780 /* Next is the MII reset sequence length and offset. */
4781 tm->tm_reset_length = *cp++;
4782 tm->tm_reset_offset = cp - &sc->sc_srom[0];
4783 cp += tm->tm_reset_length * 2;
4784
4785 /*
4786 * The following items are left in the media block
4787 * that we don't particularly care about:
4788 *
4789 * capabilities W
4790 * advertisement W
4791 * full duplex W
4792 * tx threshold W
4793 * MII interrupt W
4794 *
4795 * These appear to be bits in the PHY registers,
4796 * which our MII code handles on its own.
4797 */
4798
4799 /*
4800 * Before we probe the MII bus, we need to reset
4801 * it and issue the selection sequence.
4802 */
4803
4804 ncp = &sc->sc_srom[tm->tm_reset_offset];
4805 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) {
4806 delay(10);
4807 TULIP_WRITE(sc, CSR_SIAGEN,
4808 TULIP_ROM_GETW(ncp, 0) << 16);
4809 }
4810
4811 ncp = &sc->sc_srom[tm->tm_gp_offset];
4812 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) {
4813 delay(10);
4814 TULIP_WRITE(sc, CSR_SIAGEN,
4815 TULIP_ROM_GETW(ncp, 0) << 16);
4816 }
4817
4818 /* If there were no sequences, just lower the pins. */
4819 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
4820 delay(10);
4821 TULIP_WRITE(sc, CSR_SIAGEN, 0);
4822 }
4823
4824 /*
4825 * Now, probe the MII for the PHY. Note, we know
4826 * the location of the PHY on the bus, but we don't
4827 * particularly care; the MII code just likes to
4828 * search the whole thing anyhow.
4829 */
4830 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
4831 MII_PHY_ANY, tm->tm_phyno, 0);
4832
4833 /*
4834 * Now, search for the PHY we hopefully just
4835 * configured. If it's not configured into the
4836 * kernel, we lose. The PHY's default media always
4837 * takes priority.
4838 */
4839 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys);
4840 phy != NULL;
4841 phy = LIST_NEXT(phy, mii_list))
4842 if (phy->mii_offset == tm->tm_phyno)
4843 break;
4844 if (phy == NULL) {
4845 printf("%s: unable to configure MII\n",
4846 sc->sc_dev.dv_xname);
4847 break;
4848 }
4849
4850 sc->sc_flags |= TULIPF_HAS_MII;
4851 sc->sc_tick = tlp_mii_tick;
4852 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0,
4853 phy->mii_inst);
4854
4855 /*
4856 * Okay, now that we've found the PHY and the MII
4857 * layer has added all of the media associated
4858 * with that PHY, we need to traverse the media
4859 * list, and add our `tm' to each entry's `aux'
4860 * pointer.
4861 *
4862 * We do this by looking for media with our
4863 * PHY's `instance'.
4864 */
4865 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list);
4866 ife != NULL;
4867 ife = TAILQ_NEXT(ife, ifm_list)) {
4868 if (IFM_INST(ife->ifm_media) != phy->mii_inst)
4869 continue;
4870 ife->ifm_aux = tm;
4871 }
4872 break;
4873
4874 case TULIP_ROM_MB_21143_SYM:
4875 tlp_get_minst(sc);
4876 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM;
4877
4878 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK);
4879 memset(tm, 0, sizeof(*tm));
4880
4881 tm->tm_type = TULIP_ROM_MB_21143_SYM;
4882 tm->tm_get = tlp_sia_get;
4883 tm->tm_set = tlp_sia_set;
4884
4885 /* First is the media type code. */
4886 tsti = tlp_srom_to_ifmedia(cp[0] &
4887 TULIP_ROM_MB_MEDIA_CODE);
4888 if (tsti == NULL) {
4889 /* Invalid media code. */
4890 free(tm, M_DEVBUF);
4891 break;
4892 }
4893
4894 /* Get defaults. */
4895 tlp_srom_media_info(sc, tsti, tm);
4896
4897 /* Next is GPIO control/data. */
4898 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1);
4899 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3);
4900
4901 /*
4902 * Next is a word containing OPMODE information
4903 * and info on how to detect if this media is
4904 * active.
4905 */
4906 word = TULIP_ROM_GETW(cp, 5);
4907 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word);
4908 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
4909 tm->tm_actmask =
4910 TULIP_ROM_MB_BITPOS(word);
4911 tm->tm_actdata =
4912 (word & TULIP_ROM_MB_POLARITY) ?
4913 0 : tm->tm_actmask;
4914 }
4915
4916 ifmedia_add(&sc->sc_mii.mii_media,
4917 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype,
4918 tsti->tsti_options, sc->sc_tlp_minst), 0, tm);
4919 break;
4920
4921 case TULIP_ROM_MB_21143_RESET:
4922 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname);
4923 break;
4924
4925 default:
4926 printf("%s: unknown ISV media block type 0x%02x\n",
4927 sc->sc_dev.dv_xname, type);
4928 }
4929 }
4930
4931 /*
4932 * Deal with the case where no media is configured.
4933 */
4934 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) {
4935 printf("%s: no media found!\n", sc->sc_dev.dv_xname);
4936 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
4937 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
4938 return;
4939 }
4940
4941 /*
4942 * Pick the default media.
4943 */
4944 if (miidef != 0)
4945 defmedia = miidef;
4946 else {
4947 /*
4948 * XXX Pick a better default. Should come from SROM
4949 * XXX on 21140[A], and should be "auto" on 21142,
4950 * XXX 21143, and Macronix chips.
4951 */
4952 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0);
4953 }
4954
4955 ifmedia_set(&sc->sc_mii.mii_media, defmedia);
4956
4957 /*
4958 * Display any non-MII media we've located.
4959 */
4960 if (sc->sc_media_seen &
4961 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII)))
4962 tlp_print_media(sc);
4963
4964 tlp_sia_fixup(sc);
4965 }
4966
4967 void
4968 tlp_2114x_isv_tmsw_get(sc, ifmr)
4969 struct tulip_softc *sc;
4970 struct ifmediareq *ifmr;
4971 {
4972 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
4973 struct tulip_21x4x_media *tm = ife->ifm_aux;
4974
4975 /*
4976 * We might be polling a non-MII autosense; check for that.
4977 */
4978 if (tm == NULL) {
4979 #ifdef DIAGNOSTIC
4980 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
4981 panic("tlp_2114x_isv_tmsw_get");
4982 #endif
4983 tm = sc->sc_nway_active->ifm_aux;
4984 }
4985
4986 (*tm->tm_get)(sc, ifmr);
4987 }
4988
4989 int
4990 tlp_2114x_isv_tmsw_set(sc)
4991 struct tulip_softc *sc;
4992 {
4993 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
4994 struct tulip_21x4x_media *tm = ife->ifm_aux;
4995
4996 /*
4997 * We might be setting a non-MII autosense; check for that.
4998 */
4999 if (tm == NULL) {
5000 #ifdef DIAGNOSTIC
5001 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
5002 panic("tlp_2114x_isv_tmsw_set");
5003 #endif
5004 /* XXX XXX XXX */
5005 }
5006
5007 /*
5008 * Check to see if we need to reset the chip, and do it. The
5009 * reset path will get the OPMODE register right the next
5010 * time through.
5011 */
5012 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode))
5013 return (tlp_init(&sc->sc_ethercom.ec_if));
5014
5015 return ((*tm->tm_set)(sc));
5016 }
5017
5018 /*
5019 * MII-on-SIO media switch. Handles only MII attached to the SIO.
5020 */
5021 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *));
5022
5023 const struct tulip_mediasw tlp_sio_mii_mediasw = {
5024 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5025 };
5026
5027 void
5028 tlp_sio_mii_tmsw_init(sc)
5029 struct tulip_softc *sc;
5030 {
5031 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5032
5033 /*
5034 * We don't attach any media info structures to the ifmedia
5035 * entries, so if we're using a pre-init function that needs
5036 * that info, override it to one that doesn't.
5037 */
5038 if (sc->sc_preinit == tlp_2114x_preinit)
5039 sc->sc_preinit = tlp_2114x_mii_preinit;
5040
5041 sc->sc_mii.mii_ifp = ifp;
5042 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5043 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5044 sc->sc_mii.mii_statchg = sc->sc_statchg;
5045 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5046 tlp_mediastatus);
5047 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5048 MII_OFFSET_ANY, 0);
5049 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5050 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5051 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5052 } else {
5053 sc->sc_flags |= TULIPF_HAS_MII;
5054 sc->sc_tick = tlp_mii_tick;
5055 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5056 }
5057 }
5058
5059 /*
5060 * Lite-On PNIC media switch. Must handle MII or internal NWAY.
5061 */
5062 void tlp_pnic_tmsw_init __P((struct tulip_softc *));
5063 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *));
5064 int tlp_pnic_tmsw_set __P((struct tulip_softc *));
5065
5066 const struct tulip_mediasw tlp_pnic_mediasw = {
5067 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set
5068 };
5069
5070 void tlp_pnic_nway_statchg __P((struct device *));
5071 void tlp_pnic_nway_tick __P((void *));
5072 int tlp_pnic_nway_service __P((struct tulip_softc *, int));
5073 void tlp_pnic_nway_reset __P((struct tulip_softc *));
5074 int tlp_pnic_nway_auto __P((struct tulip_softc *, int));
5075 void tlp_pnic_nway_auto_timeout __P((void *));
5076 void tlp_pnic_nway_status __P((struct tulip_softc *));
5077 void tlp_pnic_nway_acomp __P((struct tulip_softc *));
5078
5079 void
5080 tlp_pnic_tmsw_init(sc)
5081 struct tulip_softc *sc;
5082 {
5083 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5084 const char *sep = "";
5085
5086 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL)
5087 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
5088
5089 sc->sc_mii.mii_ifp = ifp;
5090 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg;
5091 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg;
5092 sc->sc_mii.mii_statchg = sc->sc_statchg;
5093 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5094 tlp_mediastatus);
5095 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5096 MII_OFFSET_ANY, 0);
5097 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5098 /* XXX What about AUI/BNC support? */
5099 printf("%s: ", sc->sc_dev.dv_xname);
5100
5101 tlp_pnic_nway_reset(sc);
5102
5103 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0),
5104 PNIC_NWAY_TW|PNIC_NWAY_CAP10T);
5105 PRINT("10baseT");
5106
5107 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0),
5108 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX);
5109 PRINT("10baseT-FDX");
5110
5111 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
5112 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX);
5113 PRINT("100baseTX");
5114
5115 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0),
5116 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD|
5117 PNIC_NWAY_CAP100TXFDX);
5118 PRINT("100baseTX-FDX");
5119
5120 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0),
5121 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW|
5122 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX|
5123 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX);
5124 PRINT("auto");
5125
5126 printf("\n");
5127
5128 sc->sc_statchg = tlp_pnic_nway_statchg;
5129 sc->sc_tick = tlp_pnic_nway_tick;
5130 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5131 } else {
5132 sc->sc_flags |= TULIPF_HAS_MII;
5133 sc->sc_tick = tlp_mii_tick;
5134 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5135 }
5136
5137 #undef ADD
5138 #undef PRINT
5139 }
5140
5141 void
5142 tlp_pnic_tmsw_get(sc, ifmr)
5143 struct tulip_softc *sc;
5144 struct ifmediareq *ifmr;
5145 {
5146 struct mii_data *mii = &sc->sc_mii;
5147
5148 if (sc->sc_flags & TULIPF_HAS_MII)
5149 tlp_mii_getmedia(sc, ifmr);
5150 else {
5151 mii->mii_media_status = 0;
5152 mii->mii_media_active = IFM_NONE;
5153 tlp_pnic_nway_service(sc, MII_POLLSTAT);
5154 ifmr->ifm_status = sc->sc_mii.mii_media_status;
5155 ifmr->ifm_active = sc->sc_mii.mii_media_active;
5156 }
5157 }
5158
5159 int
5160 tlp_pnic_tmsw_set(sc)
5161 struct tulip_softc *sc;
5162 {
5163 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5164 struct mii_data *mii = &sc->sc_mii;
5165
5166 if (sc->sc_flags & TULIPF_HAS_MII) {
5167 /*
5168 * Make sure the built-in Tx jabber timer is disabled.
5169 */
5170 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS);
5171
5172 return (tlp_mii_setmedia(sc));
5173 }
5174
5175 if (ifp->if_flags & IFF_UP) {
5176 mii->mii_media_status = 0;
5177 mii->mii_media_active = IFM_NONE;
5178 return (tlp_pnic_nway_service(sc, MII_MEDIACHG));
5179 }
5180
5181 return (0);
5182 }
5183
5184 void
5185 tlp_pnic_nway_statchg(self)
5186 struct device *self;
5187 {
5188 struct tulip_softc *sc = (struct tulip_softc *)self;
5189
5190 /* Idle the transmit and receive processes. */
5191 tlp_idle(sc, OPMODE_ST|OPMODE_SR);
5192
5193 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS|
5194 OPMODE_SCR|OPMODE_HBD);
5195
5196 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) {
5197 sc->sc_opmode |= OPMODE_TTM;
5198 TULIP_WRITE(sc, CSR_GPP,
5199 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) |
5200 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1));
5201 } else {
5202 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD;
5203 TULIP_WRITE(sc, CSR_GPP,
5204 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) |
5205 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1));
5206 }
5207
5208 if (sc->sc_mii.mii_media_active & IFM_FDX)
5209 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD;
5210
5211 /*
5212 * Write new OPMODE bits. This also restarts the transmit
5213 * and receive processes.
5214 */
5215 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
5216 }
5217
5218 void
5219 tlp_pnic_nway_tick(arg)
5220 void *arg;
5221 {
5222 struct tulip_softc *sc = arg;
5223 int s;
5224
5225 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
5226 return;
5227
5228 s = splnet();
5229 tlp_pnic_nway_service(sc, MII_TICK);
5230 splx(s);
5231
5232 callout_reset(&sc->sc_tick_callout, hz, tlp_pnic_nway_tick, sc);
5233 }
5234
5235 /*
5236 * Support for the Lite-On PNIC internal NWay block. This is constructed
5237 * somewhat like a PHY driver for simplicity.
5238 */
5239
5240 int
5241 tlp_pnic_nway_service(sc, cmd)
5242 struct tulip_softc *sc;
5243 int cmd;
5244 {
5245 struct mii_data *mii = &sc->sc_mii;
5246 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
5247
5248 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
5249 return (0);
5250
5251 switch (cmd) {
5252 case MII_POLLSTAT:
5253 /* Nothing special to do here. */
5254 break;
5255
5256 case MII_MEDIACHG:
5257 switch (IFM_SUBTYPE(ife->ifm_media)) {
5258 case IFM_AUTO:
5259 (void) tlp_pnic_nway_auto(sc, 1);
5260 break;
5261 case IFM_100_T4:
5262 /*
5263 * XXX Not supported as a manual setting right now.
5264 */
5265 return (EINVAL);
5266 default:
5267 /*
5268 * NWAY register data is stored in the ifmedia entry.
5269 */
5270 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
5271 }
5272 break;
5273
5274 case MII_TICK:
5275 /*
5276 * Only used for autonegotiation.
5277 */
5278 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
5279 return (0);
5280
5281 /*
5282 * Check to see if we have link. If we do, we don't
5283 * need to restart the autonegotiation process.
5284 */
5285 if (sc->sc_flags & TULIPF_LINK_UP)
5286 return (0);
5287
5288 /*
5289 * Only retry autonegotiation every 5 seconds.
5290 */
5291 if (++sc->sc_nway_ticks != 5)
5292 return (0);
5293
5294 sc->sc_nway_ticks = 0;
5295 tlp_pnic_nway_reset(sc);
5296 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN)
5297 return (0);
5298 break;
5299 }
5300
5301 /* Update the media status. */
5302 tlp_pnic_nway_status(sc);
5303
5304 /* Callback if something changed. */
5305 if ((sc->sc_nway_active == NULL ||
5306 sc->sc_nway_active->ifm_media != mii->mii_media_active) ||
5307 cmd == MII_MEDIACHG) {
5308 (*sc->sc_statchg)(&sc->sc_dev);
5309 tlp_nway_activate(sc, mii->mii_media_active);
5310 }
5311 return (0);
5312 }
5313
5314 void
5315 tlp_pnic_nway_reset(sc)
5316 struct tulip_softc *sc;
5317 {
5318
5319 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS);
5320 delay(100);
5321 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0);
5322 }
5323
5324 int
5325 tlp_pnic_nway_auto(sc, waitfor)
5326 struct tulip_softc *sc;
5327 int waitfor;
5328 {
5329 struct mii_data *mii = &sc->sc_mii;
5330 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
5331 u_int32_t reg;
5332 int i;
5333
5334 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0)
5335 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
5336
5337 if (waitfor) {
5338 /* Wait 500ms for it to complete. */
5339 for (i = 0; i < 500; i++) {
5340 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5341 if (reg & PNIC_NWAY_LPAR_MASK) {
5342 tlp_pnic_nway_acomp(sc);
5343 return (0);
5344 }
5345 delay(1000);
5346 }
5347 #if 0
5348 if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
5349 printf("%s: autonegotiation failed to complete\n",
5350 sc->sc_dev.dv_xname);
5351 #endif
5352
5353 /*
5354 * Don't need to worry about clearing DOINGAUTO.
5355 * If that's set, a timeout is pending, and it will
5356 * clear the flag.
5357 */
5358 return (EIO);
5359 }
5360
5361 /*
5362 * Just let it finish asynchronously. This is for the benefit of
5363 * the tick handler driving autonegotiation. Don't want 500ms
5364 * delays all the time while the system is running!
5365 */
5366 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) {
5367 sc->sc_flags |= TULIPF_DOINGAUTO;
5368 callout_reset(&sc->sc_nway_callout, hz >> 1,
5369 tlp_pnic_nway_auto_timeout, sc);
5370 }
5371 return (EJUSTRETURN);
5372 }
5373
5374 void
5375 tlp_pnic_nway_auto_timeout(arg)
5376 void *arg;
5377 {
5378 struct tulip_softc *sc = arg;
5379 u_int32_t reg;
5380 int s;
5381
5382 s = splnet();
5383 sc->sc_flags &= ~TULIPF_DOINGAUTO;
5384 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5385 #if 0
5386 if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
5387 printf("%s: autonegotiation failed to complete\n",
5388 sc->sc_dev.dv_xname);
5389 #endif
5390
5391 tlp_pnic_nway_acomp(sc);
5392
5393 /* Update the media status. */
5394 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT);
5395 splx(s);
5396 }
5397
5398 void
5399 tlp_pnic_nway_status(sc)
5400 struct tulip_softc *sc;
5401 {
5402 struct mii_data *mii = &sc->sc_mii;
5403 u_int32_t reg;
5404
5405 mii->mii_media_status = IFM_AVALID;
5406 mii->mii_media_active = IFM_ETHER;
5407
5408 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5409
5410 if (sc->sc_flags & TULIPF_LINK_UP)
5411 mii->mii_media_status |= IFM_ACTIVE;
5412
5413 if (reg & PNIC_NWAY_NW) {
5414 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) {
5415 /* Erg, still trying, I guess... */
5416 mii->mii_media_active |= IFM_NONE;
5417 return;
5418 }
5419
5420 #if 0
5421 if (reg & PNIC_NWAY_LPAR100T4)
5422 mii->mii_media_active |= IFM_100_T4;
5423 else
5424 #endif
5425 if (reg & PNIC_NWAY_LPAR100TXFDX)
5426 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
5427 else if (reg & PNIC_NWAY_LPAR100TX)
5428 mii->mii_media_active |= IFM_100_TX;
5429 else if (reg & PNIC_NWAY_LPAR10TFDX)
5430 mii->mii_media_active |= IFM_10_T|IFM_FDX;
5431 else if (reg & PNIC_NWAY_LPAR10T)
5432 mii->mii_media_active |= IFM_10_T;
5433 else
5434 mii->mii_media_active |= IFM_NONE;
5435 } else {
5436 if (reg & PNIC_NWAY_100)
5437 mii->mii_media_active |= IFM_100_TX;
5438 else
5439 mii->mii_media_active |= IFM_10_T;
5440 if (reg & PNIC_NWAY_FD)
5441 mii->mii_media_active |= IFM_FDX;
5442 }
5443 }
5444
5445 void
5446 tlp_pnic_nway_acomp(sc)
5447 struct tulip_softc *sc;
5448 {
5449 u_int32_t reg;
5450
5451 reg = TULIP_READ(sc, CSR_PNIC_NWAY);
5452 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN);
5453
5454 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX))
5455 reg |= PNIC_NWAY_100;
5456 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX))
5457 reg |= PNIC_NWAY_FD;
5458
5459 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg);
5460 }
5461
5462 /*
5463 * Macronix PMAC and Lite-On PNIC-II media switch:
5464 *
5465 * MX98713 and MX98713A 21140-like MII or GPIO media.
5466 *
5467 * MX98713A 21143-like MII or SIA/SYM media.
5468 *
5469 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media.
5470 * 82C115, MX98715AEC-C, -E
5471 *
5472 * So, what we do here is fake MII-on-SIO or ISV media info, and
5473 * use the ISV media switch get/set functions to handle the rest.
5474 */
5475
5476 void tlp_pmac_tmsw_init __P((struct tulip_softc *));
5477
5478 const struct tulip_mediasw tlp_pmac_mediasw = {
5479 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set
5480 };
5481
5482 const struct tulip_mediasw tlp_pmac_mii_mediasw = {
5483 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5484 };
5485
5486 void
5487 tlp_pmac_tmsw_init(sc)
5488 struct tulip_softc *sc;
5489 {
5490 static const u_int8_t media[] = {
5491 TULIP_ROM_MB_MEDIA_TP,
5492 TULIP_ROM_MB_MEDIA_TP_FDX,
5493 TULIP_ROM_MB_MEDIA_100TX,
5494 TULIP_ROM_MB_MEDIA_100TX_FDX,
5495 };
5496 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5497
5498 sc->sc_mii.mii_ifp = ifp;
5499 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5500 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5501 sc->sc_mii.mii_statchg = sc->sc_statchg;
5502 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5503 tlp_mediastatus);
5504 if (sc->sc_chip == TULIP_CHIP_MX98713 ||
5505 sc->sc_chip == TULIP_CHIP_MX98713A) {
5506 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
5507 MII_PHY_ANY, MII_OFFSET_ANY, 0);
5508 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) {
5509 sc->sc_flags |= TULIPF_HAS_MII;
5510 sc->sc_tick = tlp_mii_tick;
5511 sc->sc_preinit = tlp_2114x_mii_preinit;
5512 sc->sc_mediasw = &tlp_pmac_mii_mediasw;
5513 ifmedia_set(&sc->sc_mii.mii_media,
5514 IFM_ETHER|IFM_AUTO);
5515 return;
5516 }
5517 }
5518
5519 switch (sc->sc_chip) {
5520 case TULIP_CHIP_MX98713:
5521 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR,
5522 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4);
5523
5524 /*
5525 * XXX Should implement auto-sense for this someday,
5526 * XXX when we do the same for the 21140.
5527 */
5528 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
5529 break;
5530
5531 default:
5532 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA,
5533 tlp_sia_get, tlp_sia_set, media, 2);
5534 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM,
5535 tlp_sia_get, tlp_sia_set, media + 2, 2);
5536
5537 /*
5538 * XXX Autonegotiation not yet supported.
5539 */
5540 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
5541 break;
5542 }
5543
5544 tlp_print_media(sc);
5545 tlp_sia_fixup(sc);
5546
5547 /* Set the LED modes. */
5548 tlp_pmac_reset(sc);
5549
5550 sc->sc_reset = tlp_pmac_reset;
5551 }
5552
5553 /*
5554 * ADMtek AL981 media switch. Only has internal PHY.
5555 */
5556 void tlp_al981_tmsw_init __P((struct tulip_softc *));
5557
5558 const struct tulip_mediasw tlp_al981_mediasw = {
5559 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5560 };
5561
5562 void
5563 tlp_al981_tmsw_init(sc)
5564 struct tulip_softc *sc;
5565 {
5566 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5567
5568 sc->sc_mii.mii_ifp = ifp;
5569 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg;
5570 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg;
5571 sc->sc_mii.mii_statchg = sc->sc_statchg;
5572 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5573 tlp_mediastatus);
5574 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5575 MII_OFFSET_ANY, 0);
5576 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5577 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5578 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5579 } else {
5580 sc->sc_flags |= TULIPF_HAS_MII;
5581 sc->sc_tick = tlp_mii_tick;
5582 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5583 }
5584 }
5585
5586 /*
5587 * ADMtek AN983/985 media switch. Only has internal PHY, but
5588 * on an SIO-like interface. Unfortunately, we can't use the
5589 * standard SIO media switch, because the AN985 "ghosts" the
5590 * singly PHY at every address.
5591 */
5592 void tlp_an985_tmsw_init __P((struct tulip_softc *));
5593
5594 const struct tulip_mediasw tlp_an985_mediasw = {
5595 tlp_an985_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia
5596 };
5597
5598 void
5599 tlp_an985_tmsw_init(sc)
5600 struct tulip_softc *sc;
5601 {
5602 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5603
5604 sc->sc_mii.mii_ifp = ifp;
5605 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5606 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5607 sc->sc_mii.mii_statchg = sc->sc_statchg;
5608 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5609 tlp_mediastatus);
5610 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 1,
5611 MII_OFFSET_ANY, 0);
5612 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5613 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5614 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5615 } else {
5616 sc->sc_flags |= TULIPF_HAS_MII;
5617 sc->sc_tick = tlp_mii_tick;
5618 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5619 }
5620 }
5621
5622 /*
5623 * Davicom DM9102 media switch. Internal PHY and possibly HomePNA.
5624 */
5625 void tlp_dm9102_tmsw_init __P((struct tulip_softc *));
5626 void tlp_dm9102_tmsw_getmedia __P((struct tulip_softc *,
5627 struct ifmediareq *));
5628 int tlp_dm9102_tmsw_setmedia __P((struct tulip_softc *));
5629
5630 const struct tulip_mediasw tlp_dm9102_mediasw = {
5631 tlp_dm9102_tmsw_init, tlp_dm9102_tmsw_getmedia,
5632 tlp_dm9102_tmsw_setmedia
5633 };
5634
5635 void
5636 tlp_dm9102_tmsw_init(sc)
5637 struct tulip_softc *sc;
5638 {
5639 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
5640 u_int32_t opmode;
5641
5642 sc->sc_mii.mii_ifp = ifp;
5643 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg;
5644 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg;
5645 sc->sc_mii.mii_statchg = sc->sc_statchg;
5646 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
5647 tlp_mediastatus);
5648
5649 /* PHY block already reset via tlp_reset(). */
5650
5651 /*
5652 * Configure OPMODE properly for the internal MII interface.
5653 */
5654 switch (sc->sc_chip) {
5655 case TULIP_CHIP_DM9102:
5656 opmode = OPMODE_MBO|OPMODE_HBD|OPMODE_PS;
5657 break;
5658
5659 case TULIP_CHIP_DM9102A:
5660 opmode = OPMODE_MBO|OPMODE_HBD;
5661 break;
5662
5663 default:
5664 /* Nothing. */
5665 break;
5666 }
5667
5668 TULIP_WRITE(sc, CSR_OPMODE, opmode);
5669
5670 /* Now, probe the internal MII for the internal PHY. */
5671 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
5672 MII_OFFSET_ANY, 0);
5673
5674 /*
5675 * XXX Figure out what to do about the HomePNA portion
5676 * XXX of the DM9102A.
5677 */
5678
5679 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
5680 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
5681 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
5682 } else {
5683 sc->sc_flags |= TULIPF_HAS_MII;
5684 sc->sc_tick = tlp_mii_tick;
5685 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
5686 }
5687 }
5688
5689 void
5690 tlp_dm9102_tmsw_getmedia(sc, ifmr)
5691 struct tulip_softc *sc;
5692 struct ifmediareq *ifmr;
5693 {
5694
5695 /* XXX HomePNA on DM9102A. */
5696 tlp_mii_getmedia(sc, ifmr);
5697 }
5698
5699 int
5700 tlp_dm9102_tmsw_setmedia(sc)
5701 struct tulip_softc *sc;
5702 {
5703
5704 /* XXX HomePNA on DM9102A. */
5705 return (tlp_mii_setmedia(sc));
5706 }
5707