uhareg.h revision 1.3
1 /* $NetBSD: uhareg.h,v 1.3 1997/06/06 23:31:06 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by Charles M. Hannum. 54 * 4. The name of the author may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 60 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 61 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 62 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 66 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69 /* 70 * Ported for use with the UltraStor 14f by Gary Close (gclose (at) wvnvms.wvnet.edu) 71 * Slight fixes to timeouts to run with the 34F 72 * Thanks to Julian Elischer for advice and help with this port. 73 * 74 * Originally written by Julian Elischer (julian (at) tfs.com) 75 * for TRW Financial Systems for use under the MACH(2.5) operating system. 76 * 77 * TRW Financial Systems, in accordance with their agreement with Carnegie 78 * Mellon University, makes this software available to CMU to distribute 79 * or use in any manner that they see fit as long as this message is kept with 80 * the software. For this reason TFS also grants any other persons or 81 * organisations permission to use or modify this software. 82 * 83 * TFS supplies this software to be publicly redistributed 84 * on the understanding that TFS is not responsible for the correct 85 * functioning of this software in any circumstances. 86 * 87 * commenced: Sun Sep 27 18:14:01 PDT 1992 88 * slight mod to make work with 34F as well: Wed Jun 2 18:05:48 WST 1993 89 */ 90 91 typedef u_long physaddr; 92 typedef u_long physlen; 93 94 /************************** board definitions *******************************/ 95 /* 96 * I/O Port Interface 97 */ 98 #define U14_LMASK 0x0000 /* local doorbell mask reg */ 99 #define U14_LINT 0x0001 /* local doorbell int/stat reg */ 100 #define U14_SMASK 0x0002 /* system doorbell mask reg */ 101 #define U14_SINT 0x0003 /* system doorbell int/stat reg */ 102 #define U14_ID 0x0004 /* product id reg (2 ports) */ 103 #define U14_CONFIG 0x0006 /* config reg (2 ports) */ 104 #define U14_OGMPTR 0x0008 /* outgoing mail ptr (4 ports) */ 105 #define U14_ICMPTR 0x000c /* incoming mail ptr (4 ports) */ 106 107 #define U24_CONFIG 0x0005 /* config reg (3 ports) */ 108 #define U24_LMASK 0x000c /* local doorbell mask reg */ 109 #define U24_LINT 0x000d /* local doorbell int/stat reg */ 110 #define U24_SMASK 0x000e /* system doorbell mask reg */ 111 #define U24_SINT 0x000f /* system doorbell int/stat reg */ 112 #define U24_OGMCMD 0x0016 /* outgoing commands */ 113 #define U24_OGMPTR 0x0017 /* outgoing mail ptr (4 ports) */ 114 #define U24_ICMCMD 0x001b /* incoming commands */ 115 #define U24_ICMPTR 0x001c /* incoming mail ptr (4 ports) */ 116 117 /* 118 * UHA_LMASK bits (read only) 119 */ 120 #define UHA_LDIE 0x80 /* local doorbell int enabled */ 121 #define UHA_SRSTE 0x40 /* soft reset enabled */ 122 #define UHA_ABORTEN 0x10 /* abort MSCP enabled */ 123 #define UHA_OGMINTEN 0x01 /* outgoing mail interrupt enabled */ 124 125 /* 126 * UHA_LINT bits (read only) 127 */ 128 #define U14_LDIP 0x80 /* local doorbell int pending */ 129 #define U24_LDIP 0x02 /* local doorbell int pending */ 130 131 /* 132 * UHA_LINT bits (write only) 133 */ 134 #define U14_OGMFULL 0x01 /* outgoing mailbox is full */ 135 #define U14_ABORT 0x10 /* abort MSCP */ 136 137 #define U24_OGMFULL 0x02 /* outgoing mailbox is full */ 138 139 #define UHA_SBRST 0x40 /* scsi bus reset */ 140 #define UHA_ADRST 0x80 /* adapter soft reset */ 141 #define UHA_ASRST 0xc0 /* adapter and scsi reset */ 142 143 /* 144 * UHA_SMASK bits (read/write) 145 */ 146 #define UHA_ENSINT 0x80 /* enable system doorbell interrupt */ 147 #define UHA_EN_ABORT_COMPLETE 0x10 /* enable abort MSCP complete int */ 148 #define UHA_ENICM 0x01 /* enable ICM interrupt */ 149 150 /* 151 * UHA_SINT bits (read) 152 */ 153 #define U14_SDIP 0x80 /* system doorbell int pending */ 154 #define U24_SDIP 0x02 /* system doorbell int pending */ 155 156 #define UHA_ABORT_SUCC 0x10 /* abort MSCP successful */ 157 #define UHA_ABORT_FAIL 0x18 /* abort MSCP failed */ 158 159 /* 160 * UHA_SINT bits (write) 161 */ 162 #define U14_ICM_ACK 0x01 /* acknowledge ICM and clear */ 163 #define U24_ICM_ACK 0x02 /* acknowledge ICM and clear */ 164 165 #define UHA_ABORT_ACK 0x18 /* acknowledge status and clear */ 166 167 /* 168 * U14_CONFIG bits (read only) 169 */ 170 #define U14_DMA_CH5 0x0000 /* DMA channel 5 */ 171 #define U14_DMA_CH6 0x4000 /* 6 */ 172 #define U14_DMA_CH7 0x8000 /* 7 */ 173 #define U14_DMA_MASK 0xc000 174 #define U14_IRQ15 0x0000 /* IRQ 15 */ 175 #define U14_IRQ14 0x1000 /* 14 */ 176 #define U14_IRQ11 0x2000 /* 11 */ 177 #define U14_IRQ10 0x3000 /* 10 */ 178 #define U14_IRQ_MASK 0x3000 179 #define U14_HOSTID_MASK 0x0007 180 181 /* 182 * U24_CONFIG bits (read only) 183 */ 184 #define U24_MAGIC1 0x08 185 #define U24_IRQ15 0x10 186 #define U24_IRQ14 0x20 187 #define U24_IRQ11 0x40 188 #define U24_IRQ10 0x80 189 #define U24_IRQ_MASK 0xf0 190 191 #define U24_MAGIC2 0x04 192 193 #define U24_HOSTID_MASK 0x07 194 195 /* 196 * EISA registers (offset from slot base) 197 */ 198 #define EISA_VENDOR 0x0c80 /* vendor ID (2 ports) */ 199 #define EISA_MODEL 0x0c82 /* model number (2 ports) */ 200 #define EISA_CONTROL 0x0c84 201 #define EISA_RESET 0x04 202 #define EISA_ERROR 0x02 203 #define EISA_ENABLE 0x01 204 205 /* 206 * host_stat error codes 207 */ 208 #define UHA_NO_ERR 0x00 /* No error supposedly */ 209 #define UHA_SBUS_ABORT_ERR 0x84 /* scsi bus abort error */ 210 #define UHA_SBUS_TIMEOUT 0x91 /* scsi bus selection timeout */ 211 #define UHA_SBUS_OVER_UNDER 0x92 /* scsi bus over/underrun */ 212 #define UHA_BAD_SCSI_CMD 0x96 /* illegal scsi command */ 213 #define UHA_AUTO_SENSE_ERR 0x9b /* auto request sense err */ 214 #define UHA_SBUS_RES_ERR 0xa3 /* scsi bus reset error */ 215 #define UHA_BAD_SG_LIST 0xff /* invalid scatter gath list */ 216 217 #define UHA_NSEG 33 /* number of dma segments supported */ 218 219 struct uha_dma_seg { 220 physaddr seg_addr; 221 physlen seg_len; 222 }; 223 224 #pragma pack(1) 225 struct uha_mscp { 226 u_char opcode:3; 227 #define UHA_HAC 0x01 /* host adapter command */ 228 #define UHA_TSP 0x02 /* target scsi pass through command */ 229 #define UHA_SDR 0x04 /* scsi device reset */ 230 u_char xdir:2; /* xfer direction */ 231 #define UHA_SDET 0x00 /* determined by scsi command */ 232 #define UHA_SDIN 0x01 /* scsi data in */ 233 #define UHA_SDOUT 0x02 /* scsi data out */ 234 #define UHA_NODATA 0x03 /* no data xfer */ 235 u_char dcn:1; /* disable disconnect for this command */ 236 u_char ca:1; /* cache control */ 237 u_char sgth:1; /* scatter gather flag */ 238 u_char target:3; 239 u_char chan:2; /* scsi channel (always 0 for 14f) */ 240 u_char lun:3; 241 physaddr data_addr; 242 physlen data_length; 243 physaddr link_addr; 244 u_char link_id; 245 u_char sg_num; /* number of scat gath segs */ 246 /*in s-g list if sg flag is */ 247 /*set. starts at 1, 8bytes per */ 248 u_char req_sense_length; 249 u_char scsi_cmd_length; 250 struct scsi_generic scsi_cmd; 251 u_char host_stat; 252 u_char target_stat; 253 physaddr sense_ptr; /* if 0 no auto sense */ 254 255 struct uha_dma_seg uha_dma[UHA_NSEG]; 256 struct scsi_sense_data mscp_sense; 257 /*-----------------end of hardware supported fields----------------*/ 258 TAILQ_ENTRY(uha_mscp) chain; 259 struct uha_mscp *nexthash; 260 long hashkey; 261 struct scsi_xfer *xs; /* the scsi_xfer for this cmd */ 262 int flags; 263 #define MSCP_ALLOC 0x01 264 #define MSCP_ABORT 0x02 265 int timeout; 266 267 /* 268 * DMA maps used by the MSCP. These maps are created 269 * in uha_init_mscp(). 270 */ 271 272 /* 273 * This DMA map maps an individual MSCP. This map is 274 * permanently loaded in uha_init_mscp(). 275 */ 276 bus_dmamap_t dmamap_self; 277 278 /* 279 * This DMA map maps the buffer involved in the transfer. 280 * It's contents are loaded into "uha_dma" above. 281 */ 282 bus_dmamap_t dmamap_xfer; 283 284 }; 285 #pragma pack(4) 286 287
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