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wdc.c revision 1.43
      1  1.43      kenh /*	$NetBSD: wdc.c,v 1.43 1998/11/19 22:50:21 kenh Exp $ */
      2  1.31    bouyer 
      3  1.31    bouyer 
      4  1.31    bouyer /*
      5  1.31    bouyer  * Copyright (c) 1998 Manuel Bouyer.  All rights reserved.
      6  1.31    bouyer  *
      7  1.31    bouyer  * Redistribution and use in source and binary forms, with or without
      8  1.31    bouyer  * modification, are permitted provided that the following conditions
      9  1.31    bouyer  * are met:
     10  1.31    bouyer  * 1. Redistributions of source code must retain the above copyright
     11  1.31    bouyer  *    notice, this list of conditions and the following disclaimer.
     12  1.31    bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.31    bouyer  *    notice, this list of conditions and the following disclaimer in the
     14  1.31    bouyer  *    documentation and/or other materials provided with the distribution.
     15  1.31    bouyer  * 3. All advertising materials mentioning features or use of this software
     16  1.31    bouyer  *    must display the following acknowledgement:
     17  1.31    bouyer  *  This product includes software developed by Manuel Bouyer.
     18  1.31    bouyer  * 4. The name of the author may not be used to endorse or promote products
     19  1.31    bouyer  *    derived from this software without specific prior written permission.
     20  1.31    bouyer  *
     21  1.31    bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  1.31    bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  1.31    bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  1.31    bouyer  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  1.31    bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  1.31    bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  1.31    bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  1.31    bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  1.31    bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  1.31    bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  1.31    bouyer  */
     32   1.2    bouyer 
     33  1.27   mycroft /*-
     34  1.27   mycroft  * Copyright (c) 1998 The NetBSD Foundation, Inc.
     35  1.27   mycroft  * All rights reserved.
     36   1.2    bouyer  *
     37  1.27   mycroft  * This code is derived from software contributed to The NetBSD Foundation
     38  1.27   mycroft  * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
     39  1.12       cgd  *
     40   1.2    bouyer  * Redistribution and use in source and binary forms, with or without
     41   1.2    bouyer  * modification, are permitted provided that the following conditions
     42   1.2    bouyer  * are met:
     43   1.2    bouyer  * 1. Redistributions of source code must retain the above copyright
     44   1.2    bouyer  *    notice, this list of conditions and the following disclaimer.
     45   1.2    bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     46   1.2    bouyer  *    notice, this list of conditions and the following disclaimer in the
     47   1.2    bouyer  *    documentation and/or other materials provided with the distribution.
     48   1.2    bouyer  * 3. All advertising materials mentioning features or use of this software
     49   1.2    bouyer  *    must display the following acknowledgement:
     50  1.27   mycroft  *        This product includes software developed by the NetBSD
     51  1.27   mycroft  *        Foundation, Inc. and its contributors.
     52  1.27   mycroft  * 4. Neither the name of The NetBSD Foundation nor the names of its
     53  1.27   mycroft  *    contributors may be used to endorse or promote products derived
     54  1.27   mycroft  *    from this software without specific prior written permission.
     55   1.2    bouyer  *
     56  1.27   mycroft  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     57  1.27   mycroft  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     58  1.27   mycroft  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     59  1.27   mycroft  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     60  1.27   mycroft  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     61  1.27   mycroft  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     62  1.27   mycroft  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     63  1.27   mycroft  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     64  1.27   mycroft  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     65  1.27   mycroft  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     66  1.27   mycroft  * POSSIBILITY OF SUCH DAMAGE.
     67   1.2    bouyer  */
     68   1.2    bouyer 
     69  1.12       cgd /*
     70  1.12       cgd  * CODE UNTESTED IN THE CURRENT REVISION:
     71  1.31    bouyer  *
     72  1.12       cgd  */
     73  1.12       cgd 
     74  1.31    bouyer #define WDCDEBUG
     75  1.31    bouyer 
     76   1.2    bouyer #include <sys/param.h>
     77   1.2    bouyer #include <sys/systm.h>
     78   1.2    bouyer #include <sys/kernel.h>
     79   1.2    bouyer #include <sys/conf.h>
     80   1.2    bouyer #include <sys/buf.h>
     81  1.31    bouyer #include <sys/device.h>
     82   1.2    bouyer #include <sys/malloc.h>
     83   1.2    bouyer #include <sys/syslog.h>
     84   1.2    bouyer #include <sys/proc.h>
     85   1.2    bouyer 
     86   1.2    bouyer #include <vm/vm.h>
     87   1.2    bouyer 
     88   1.2    bouyer #include <machine/intr.h>
     89   1.2    bouyer #include <machine/bus.h>
     90   1.2    bouyer 
     91  1.17  sakamoto #ifndef __BUS_SPACE_HAS_STREAM_METHODS
     92  1.31    bouyer #define bus_space_write_multi_stream_2	bus_space_write_multi_2
     93  1.31    bouyer #define bus_space_write_multi_stream_4	bus_space_write_multi_4
     94  1.31    bouyer #define bus_space_read_multi_stream_2	bus_space_read_multi_2
     95  1.31    bouyer #define bus_space_read_multi_stream_4	bus_space_read_multi_4
     96  1.17  sakamoto #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
     97  1.16  sakamoto 
     98  1.31    bouyer #include <dev/ata/atavar.h>
     99  1.31    bouyer #include <dev/ata/atareg.h>
    100  1.12       cgd #include <dev/ic/wdcreg.h>
    101  1.12       cgd #include <dev/ic/wdcvar.h>
    102  1.31    bouyer 
    103   1.2    bouyer #include "atapibus.h"
    104   1.2    bouyer 
    105  1.31    bouyer #define WDCDELAY  100 /* 100 microseconds */
    106  1.31    bouyer #define WDCNDELAY_RST (WDC_RESET_WAIT * 1000 / WDCDELAY)
    107   1.2    bouyer #if 0
    108  1.31    bouyer /* If you enable this, it will report any delays more than WDCDELAY * N long. */
    109   1.2    bouyer #define WDCNDELAY_DEBUG	50
    110   1.2    bouyer #endif
    111   1.2    bouyer 
    112   1.2    bouyer LIST_HEAD(xfer_free_list, wdc_xfer) xfer_free_list;
    113   1.2    bouyer 
    114  1.31    bouyer static void  __wdcerror	  __P((struct channel_softc*, char *));
    115  1.31    bouyer static int   __wdcwait_reset  __P((struct channel_softc *, int));
    116  1.31    bouyer void  __wdccommand_done __P((struct channel_softc *, struct wdc_xfer *));
    117  1.31    bouyer void  __wdccommand_start __P((struct channel_softc *, struct wdc_xfer *));
    118  1.31    bouyer int   __wdccommand_intr __P((struct channel_softc *, struct wdc_xfer *));
    119  1.31    bouyer int   wdprint __P((void *, const char *));
    120  1.31    bouyer 
    121  1.31    bouyer 
    122  1.31    bouyer #define DEBUG_INTR   0x01
    123  1.31    bouyer #define DEBUG_XFERS  0x02
    124  1.31    bouyer #define DEBUG_STATUS 0x04
    125  1.31    bouyer #define DEBUG_FUNCS  0x08
    126  1.31    bouyer #define DEBUG_PROBE  0x10
    127  1.31    bouyer #ifdef WDCDEBUG
    128  1.32    bouyer int wdcdebug_mask = 0;
    129  1.31    bouyer int wdc_nxfer = 0;
    130  1.31    bouyer #define WDCDEBUG_PRINT(args, level)  if (wdcdebug_mask & (level)) printf args
    131   1.2    bouyer #else
    132  1.31    bouyer #define WDCDEBUG_PRINT(args, level)
    133   1.2    bouyer #endif
    134   1.2    bouyer 
    135  1.31    bouyer int
    136  1.31    bouyer wdprint(aux, pnp)
    137  1.31    bouyer 	void *aux;
    138  1.31    bouyer 	const char *pnp;
    139  1.31    bouyer {
    140  1.31    bouyer 	struct ata_atapi_attach *aa_link = aux;
    141  1.31    bouyer 	if (pnp)
    142  1.31    bouyer 		printf("drive at %s", pnp);
    143  1.31    bouyer 	printf(" channel %d drive %d", aa_link->aa_channel,
    144  1.31    bouyer 	    aa_link->aa_drv_data->drive);
    145  1.31    bouyer 	return (UNCONF);
    146  1.31    bouyer }
    147   1.2    bouyer 
    148  1.31    bouyer int
    149  1.31    bouyer atapi_print(aux, pnp)
    150  1.31    bouyer 	void *aux;
    151  1.31    bouyer 	const char *pnp;
    152  1.31    bouyer {
    153  1.31    bouyer 	struct ata_atapi_attach *aa_link = aux;
    154  1.31    bouyer 	if (pnp)
    155  1.31    bouyer 		printf("atapibus at %s", pnp);
    156  1.31    bouyer 	printf(" channel %d", aa_link->aa_channel);
    157  1.31    bouyer 	return (UNCONF);
    158  1.31    bouyer }
    159  1.31    bouyer 
    160  1.31    bouyer /* Test to see controller with at last one attached drive is there.
    161  1.31    bouyer  * Returns a bit for each possible drive found (0x01 for drive 0,
    162  1.31    bouyer  * 0x02 for drive 1).
    163  1.31    bouyer  * Logic:
    164  1.31    bouyer  * - If a status register is at 0xff, assume there is no drive here
    165  1.31    bouyer  *   (ISA has pull-up resistors). If no drive at all -> return.
    166  1.31    bouyer  * - reset the controller, wait for it to complete (may take up to 31s !).
    167  1.31    bouyer  *   If timeout -> return.
    168  1.31    bouyer  * - test ATA/ATAPI signatures. If at last one drive found -> return.
    169  1.31    bouyer  * - try an ATA command on the master.
    170  1.12       cgd  */
    171  1.31    bouyer 
    172   1.2    bouyer int
    173  1.31    bouyer wdcprobe(chp)
    174  1.31    bouyer 	struct channel_softc *chp;
    175  1.12       cgd {
    176  1.31    bouyer 	u_int8_t st0, st1, sc, sn, cl, ch;
    177  1.31    bouyer 	u_int8_t ret_value = 0x03;
    178  1.31    bouyer 	u_int8_t drive;
    179  1.31    bouyer 
    180  1.31    bouyer 	/*
    181  1.31    bouyer 	 * Sanity check to see if the wdc channel responds at all.
    182  1.31    bouyer 	 */
    183  1.31    bouyer 
    184  1.43      kenh 	if (chp->wdc == NULL ||
    185  1.43      kenh 	    (chp->wdc->cap & WDC_CAPABILITY_NO_EXTRA_RESETS) == 0) {
    186  1.43      kenh 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    187  1.43      kenh 		    WDSD_IBM);
    188  1.43      kenh 		delay(1);
    189  1.43      kenh 		st0 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
    190  1.43      kenh 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    191  1.43      kenh 		    WDSD_IBM | 0x10);
    192  1.43      kenh 		delay(1);
    193  1.43      kenh 		st1 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
    194  1.43      kenh 
    195  1.43      kenh 		WDCDEBUG_PRINT(("%s:%d: before reset, st0=0x%x, st1=0x%x\n",
    196  1.43      kenh 		    chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
    197  1.43      kenh 		    chp->channel, st0, st1), DEBUG_PROBE);
    198  1.43      kenh 
    199  1.43      kenh 		if (st0 == 0xff)
    200  1.43      kenh 			ret_value &= ~0x01;
    201  1.43      kenh 		if (st1 == 0xff)
    202  1.43      kenh 			ret_value &= ~0x02;
    203  1.43      kenh 		if (ret_value == 0)
    204  1.43      kenh 			return 0;
    205  1.43      kenh 	}
    206  1.42   thorpej 
    207  1.31    bouyer 	/* assert SRST, wait for reset to complete */
    208  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    209  1.31    bouyer 	    WDSD_IBM);
    210  1.31    bouyer 	delay(1);
    211  1.31    bouyer 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
    212  1.31    bouyer 	    WDCTL_RST | WDCTL_IDS);
    213  1.31    bouyer 	DELAY(1000);
    214  1.31    bouyer 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
    215  1.31    bouyer 	    WDCTL_IDS);
    216  1.31    bouyer 	delay(1000);
    217  1.31    bouyer 	(void) bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_error);
    218  1.31    bouyer 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
    219  1.31    bouyer 	delay(1);
    220  1.31    bouyer 
    221  1.31    bouyer 	ret_value = __wdcwait_reset(chp, ret_value);
    222  1.31    bouyer 	WDCDEBUG_PRINT(("%s:%d: after reset, ret_value=0x%d\n",
    223  1.31    bouyer 	    chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe", chp->channel,
    224  1.31    bouyer 	    ret_value), DEBUG_PROBE);
    225  1.26  drochner 
    226  1.31    bouyer 	/* if reset failed, there's nothing here */
    227  1.31    bouyer 	if (ret_value == 0)
    228  1.31    bouyer 		return 0;
    229   1.2    bouyer 
    230  1.31    bouyer 	/*
    231  1.31    bouyer 	 * Test presence of drives. First test register signatures looking for
    232  1.31    bouyer 	 * ATAPI devices , then rescan and try an ATA command, in case it's an
    233  1.31    bouyer 	 * old drive.
    234  1.31    bouyer 	 * Fill in drive_flags accordingly
    235  1.31    bouyer 	 */
    236  1.31    bouyer 	for (drive = 0; drive < 2; drive++) {
    237  1.31    bouyer 		if ((ret_value & (0x01 << drive)) == 0)
    238  1.31    bouyer 			continue;
    239  1.31    bouyer 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    240  1.31    bouyer 		    WDSD_IBM | (drive << 4));
    241  1.31    bouyer 		delay(1);
    242  1.31    bouyer 		/* Save registers contents */
    243  1.31    bouyer 		sc = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_seccnt);
    244  1.31    bouyer 		sn = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_sector);
    245  1.31    bouyer 		cl = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo);
    246  1.31    bouyer 		ch = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi);
    247  1.31    bouyer 
    248  1.31    bouyer 		WDCDEBUG_PRINT(("%s:%d:%d: after reset, sc=0x%x sn=0x%x "
    249  1.31    bouyer 		    "cl=0x%x ch=0x%x\n",
    250  1.31    bouyer 		    chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
    251  1.31    bouyer 	    	    chp->channel, drive, sc, sn, cl, ch), DEBUG_PROBE);
    252  1.31    bouyer 		if (sc == 0x01 && sn == 0x01 && cl == 0x14 && ch == 0xeb) {
    253  1.31    bouyer 			chp->ch_drive[drive].drive_flags |= DRIVE_ATAPI;
    254  1.31    bouyer 		}
    255  1.31    bouyer 	}
    256  1.31    bouyer 	for (drive = 0; drive < 2; drive++) {
    257  1.31    bouyer 		if ((ret_value & (0x01 << drive)) == 0 ||
    258  1.31    bouyer 		    (chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) != 0)
    259  1.31    bouyer 			continue;
    260  1.31    bouyer 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    261  1.31    bouyer 		    WDSD_IBM | (drive << 4));
    262  1.31    bouyer 		delay(1);
    263   1.2    bouyer 		/*
    264  1.31    bouyer 		 * Maybe it's an old device, so don't rely on ATA sig.
    265  1.31    bouyer 		 * Test registers writability (Error register not writable,
    266  1.31    bouyer 		 * but cyllo is), then try an ATA command.
    267   1.2    bouyer 		 */
    268  1.31    bouyer 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_error, 0x58);
    269  1.31    bouyer 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo, 0xa5);
    270  1.31    bouyer 		if (bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_error) ==
    271  1.31    bouyer 		    0x58 ||
    272  1.31    bouyer 		    bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo) !=
    273  1.31    bouyer 		    0xa5) {
    274  1.31    bouyer 			WDCDEBUG_PRINT(("%s:%d:%d: register writability "
    275  1.31    bouyer 			    "failed\n",
    276  1.31    bouyer 			    chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
    277  1.31    bouyer 			    chp->channel, drive), DEBUG_PROBE);
    278  1.31    bouyer 			ret_value &= ~(0x01 << drive);
    279  1.31    bouyer 			continue;
    280  1.31    bouyer 		}
    281  1.31    bouyer 		if (wait_for_ready(chp, 10000) != 0) {
    282  1.31    bouyer 			WDCDEBUG_PRINT(("%s:%d:%d: not ready\n",
    283  1.31    bouyer 			    chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
    284  1.31    bouyer 			    chp->channel, drive), DEBUG_PROBE);
    285  1.31    bouyer 			ret_value &= ~(0x01 << drive);
    286  1.31    bouyer 			continue;
    287  1.31    bouyer 		}
    288  1.31    bouyer 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_command,
    289  1.31    bouyer 		    WDCC_DIAGNOSE);
    290  1.31    bouyer 		if (wait_for_ready(chp, 10000) == 0) {
    291  1.31    bouyer 			chp->ch_drive[drive].drive_flags |=
    292  1.31    bouyer 			    DRIVE_ATA;
    293   1.7    bouyer 		} else {
    294  1.31    bouyer 			WDCDEBUG_PRINT(("%s:%d:%d: WDCC_DIAGNOSE failed\n",
    295  1.31    bouyer 			    chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
    296  1.31    bouyer 			    chp->channel, drive), DEBUG_PROBE);
    297  1.31    bouyer 			ret_value &= ~(0x01 << drive);
    298   1.2    bouyer 		}
    299   1.7    bouyer 	}
    300  1.31    bouyer 	return (ret_value);
    301  1.31    bouyer }
    302  1.31    bouyer 
    303  1.31    bouyer void
    304  1.31    bouyer wdcattach(chp)
    305  1.31    bouyer 	struct channel_softc *chp;
    306  1.31    bouyer {
    307  1.31    bouyer 	int channel_flags, ctrl_flags, i;
    308  1.31    bouyer 	struct ata_atapi_attach aa_link;
    309  1.31    bouyer 
    310  1.31    bouyer 	LIST_INIT(&xfer_free_list);
    311  1.31    bouyer 	for (i = 0; i < 2; i++) {
    312  1.31    bouyer 		chp->ch_drive[i].chnl_softc = chp;
    313  1.31    bouyer 		chp->ch_drive[i].drive = i;
    314  1.31    bouyer 		/* If controller can't do 16bit flag the drives as 32bit */
    315  1.31    bouyer 		if ((chp->wdc->cap &
    316  1.31    bouyer 		    (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) ==
    317  1.31    bouyer 		    WDC_CAPABILITY_DATA32)
    318  1.31    bouyer 			chp->ch_drive[i].drive_flags |= DRIVE_CAP32;
    319  1.31    bouyer 	}
    320  1.31    bouyer 
    321  1.31    bouyer 	if (wdcprobe(chp) == 0)
    322  1.31    bouyer 		return; /* If no drives, abort attach here */
    323  1.31    bouyer 
    324  1.31    bouyer 	TAILQ_INIT(&chp->ch_queue->sc_xfer);
    325  1.31    bouyer 	ctrl_flags = chp->wdc->sc_dev.dv_cfdata->cf_flags;
    326  1.31    bouyer 	channel_flags = (ctrl_flags >> (NBBY * chp->channel)) & 0xff;
    327  1.31    bouyer 
    328  1.31    bouyer 	WDCDEBUG_PRINT(("wdcattach: ch_drive_flags 0x%x 0x%x\n",
    329  1.31    bouyer 	    chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags),
    330  1.31    bouyer 	    DEBUG_PROBE);
    331  1.12       cgd 
    332  1.12       cgd 	/*
    333  1.31    bouyer 	 * Attach an ATAPI bus, if needed.
    334  1.12       cgd 	 */
    335  1.31    bouyer 	if ((chp->ch_drive[0].drive_flags & DRIVE_ATAPI) ||
    336  1.31    bouyer 	    (chp->ch_drive[1].drive_flags & DRIVE_ATAPI)) {
    337  1.31    bouyer #if NATAPIBUS > 0
    338  1.31    bouyer 		wdc_atapibus_attach(chp);
    339  1.31    bouyer #else
    340  1.31    bouyer 		/*
    341  1.31    bouyer 		 * Fills in a fake aa_link and call config_found, so that
    342  1.31    bouyer 		 * the config machinery will print
    343  1.31    bouyer 		 * "atapibus at xxx not configured"
    344  1.31    bouyer 		 */
    345  1.31    bouyer 		memset(&aa_link, 0, sizeof(struct ata_atapi_attach));
    346  1.31    bouyer 		aa_link.aa_type = T_ATAPI;
    347  1.31    bouyer 		aa_link.aa_channel = chp->channel;
    348  1.31    bouyer 		aa_link.aa_openings = 1;
    349  1.31    bouyer 		aa_link.aa_drv_data = 0;
    350  1.31    bouyer 		aa_link.aa_bus_private = NULL;
    351  1.31    bouyer 		(void)config_found(&chp->wdc->sc_dev, (void *)&aa_link,
    352  1.31    bouyer 		    atapi_print);
    353  1.31    bouyer #endif
    354  1.31    bouyer 	}
    355  1.31    bouyer 
    356  1.31    bouyer 	for (i = 0; i < 2; i++) {
    357  1.31    bouyer 		if ((chp->ch_drive[i].drive_flags & DRIVE_ATA) == 0) {
    358  1.31    bouyer 			continue;
    359  1.31    bouyer 		}
    360  1.31    bouyer 		memset(&aa_link, 0, sizeof(struct ata_atapi_attach));
    361  1.31    bouyer 		aa_link.aa_type = T_ATA;
    362  1.31    bouyer 		aa_link.aa_channel = chp->channel;
    363  1.31    bouyer 		aa_link.aa_openings = 1;
    364  1.31    bouyer 		aa_link.aa_drv_data = &chp->ch_drive[i];
    365  1.31    bouyer 		if (config_found(&chp->wdc->sc_dev, (void *)&aa_link, wdprint))
    366  1.31    bouyer 			wdc_probe_caps(&chp->ch_drive[i]);
    367  1.32    bouyer 	}
    368  1.32    bouyer 
    369  1.32    bouyer 	/*
    370  1.32    bouyer 	 * reset drive_flags for unnatached devices, reset state for attached
    371  1.32    bouyer 	 *  ones
    372  1.32    bouyer 	 */
    373  1.32    bouyer 	for (i = 0; i < 2; i++) {
    374  1.32    bouyer 		if (chp->ch_drive[i].drv_softc == NULL)
    375  1.32    bouyer 			chp->ch_drive[i].drive_flags = 0;
    376  1.32    bouyer 		else
    377  1.32    bouyer 			chp->ch_drive[i].state = 0;
    378   1.2    bouyer 	}
    379  1.12       cgd 
    380  1.12       cgd 	/*
    381  1.31    bouyer 	 * Reset channel. The probe, with some combinations of ATA/ATAPI
    382  1.31    bouyer 	 * devices keep it in a mostly working, but strange state (with busy
    383  1.31    bouyer 	 * led on)
    384  1.12       cgd 	 */
    385  1.31    bouyer 	if ((chp->wdc->cap & WDC_CAPABILITY_NO_EXTRA_RESETS) == 0) {
    386  1.31    bouyer 		wdcreset(chp, VERBOSE);
    387  1.31    bouyer 		/*
    388  1.31    bouyer 		 * Read status registers to avoid spurious interrupts.
    389  1.31    bouyer 		 */
    390  1.31    bouyer 		for (i = 1; i >= 0; i--) {
    391  1.31    bouyer 			if (chp->ch_drive[i].drive_flags & DRIVE) {
    392  1.31    bouyer 				bus_space_write_1(chp->cmd_iot, chp->cmd_ioh,
    393  1.31    bouyer 				    wd_sdh, WDSD_IBM | (i << 4));
    394  1.31    bouyer 				if (wait_for_unbusy(chp, 10000) < 0)
    395  1.31    bouyer 					printf("%s:%d:%d: device busy\n",
    396  1.31    bouyer 					    chp->wdc->sc_dev.dv_xname,
    397  1.31    bouyer 					    chp->channel, i);
    398  1.31    bouyer 			}
    399  1.31    bouyer 		}
    400  1.31    bouyer 	}
    401  1.31    bouyer }
    402  1.31    bouyer 
    403  1.31    bouyer /*
    404  1.31    bouyer  * Start I/O on a controller, for the given channel.
    405  1.31    bouyer  * The first xfer may be not for our channel if the channel queues
    406  1.31    bouyer  * are shared.
    407  1.31    bouyer  */
    408  1.31    bouyer void
    409  1.31    bouyer wdcstart(wdc, channel)
    410  1.31    bouyer 	struct wdc_softc *wdc;
    411  1.31    bouyer 	int channel;
    412  1.31    bouyer {
    413  1.31    bouyer 	struct wdc_xfer *xfer;
    414  1.31    bouyer 	struct channel_softc *chp;
    415  1.38    bouyer 
    416  1.38    bouyer #ifdef WDC_DIAGNOSTIC
    417  1.38    bouyer 	int spl1, spl2;
    418  1.38    bouyer 
    419  1.38    bouyer 	spl1 = splbio();
    420  1.38    bouyer 	spl2 = splbio();
    421  1.38    bouyer 	if (spl2 != spl1) {
    422  1.38    bouyer 		printf("wdcstart: not at splbio()\n");
    423  1.38    bouyer 		panic("wdcstart");
    424  1.38    bouyer 	}
    425  1.38    bouyer 	splx(spl2);
    426  1.38    bouyer 	splx(spl1);
    427  1.38    bouyer #endif /* WDC_DIAGNOSTIC */
    428  1.12       cgd 
    429  1.31    bouyer 	/* is there a xfer ? */
    430  1.31    bouyer 	if ((xfer = wdc->channels[channel].ch_queue->sc_xfer.tqh_first) == NULL)
    431  1.31    bouyer 		return;
    432  1.31    bouyer 	chp = &wdc->channels[xfer->channel];
    433  1.31    bouyer 	if ((chp->ch_flags & WDCF_ACTIVE) != 0 ) {
    434  1.31    bouyer 		return; /* channel aleady active */
    435  1.31    bouyer 	}
    436  1.31    bouyer #ifdef DIAGNOSTIC
    437  1.31    bouyer 	if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0)
    438  1.31    bouyer 		panic("wdcstart: channel waiting for irq\n");
    439  1.31    bouyer #endif
    440  1.31    bouyer 	if (wdc->cap & WDC_CAPABILITY_HWLOCK)
    441  1.31    bouyer 		if (!(*wdc->claim_hw)(chp, 0))
    442  1.31    bouyer 			return;
    443  1.12       cgd 
    444  1.31    bouyer 	WDCDEBUG_PRINT(("wdcstart: xfer %p channel %d drive %d\n", xfer,
    445  1.31    bouyer 	    xfer->channel, xfer->drive), DEBUG_XFERS);
    446  1.31    bouyer 	chp->ch_flags |= WDCF_ACTIVE;
    447  1.37    bouyer 	if (chp->ch_drive[xfer->drive].drive_flags & DRIVE_RESET) {
    448  1.37    bouyer 		chp->ch_drive[xfer->drive].drive_flags &= ~DRIVE_RESET;
    449  1.37    bouyer 		chp->ch_drive[xfer->drive].state = 0;
    450  1.37    bouyer 	}
    451  1.31    bouyer 	xfer->c_start(chp, xfer);
    452  1.31    bouyer }
    453   1.2    bouyer 
    454  1.31    bouyer /* restart an interrupted I/O */
    455  1.31    bouyer void
    456  1.31    bouyer wdcrestart(v)
    457  1.31    bouyer 	void *v;
    458  1.31    bouyer {
    459  1.31    bouyer 	struct channel_softc *chp = v;
    460  1.31    bouyer 	int s;
    461   1.2    bouyer 
    462  1.31    bouyer 	s = splbio();
    463  1.31    bouyer 	wdcstart(chp->wdc, chp->channel);
    464  1.31    bouyer 	splx(s);
    465   1.2    bouyer }
    466  1.31    bouyer 
    467   1.2    bouyer 
    468  1.31    bouyer /*
    469  1.31    bouyer  * Interrupt routine for the controller.  Acknowledge the interrupt, check for
    470  1.31    bouyer  * errors on the current operation, mark it done if necessary, and start the
    471  1.31    bouyer  * next request.  Also check for a partially done transfer, and continue with
    472  1.31    bouyer  * the next chunk if so.
    473  1.31    bouyer  */
    474  1.12       cgd int
    475  1.31    bouyer wdcintr(arg)
    476  1.31    bouyer 	void *arg;
    477  1.12       cgd {
    478  1.31    bouyer 	struct channel_softc *chp = arg;
    479  1.31    bouyer 	struct wdc_xfer *xfer;
    480  1.12       cgd 
    481  1.31    bouyer 	if ((chp->ch_flags & WDCF_IRQ_WAIT) == 0) {
    482  1.31    bouyer #if 0
    483  1.31    bouyer 		/* Clear the pending interrupt and abort. */
    484  1.31    bouyer 		u_int8_t s =
    485  1.31    bouyer 		    bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
    486  1.31    bouyer #ifdef WDCDEBUG
    487  1.31    bouyer 		u_int8_t e =
    488  1.31    bouyer 		    bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_error);
    489  1.31    bouyer 		u_int8_t i =
    490  1.31    bouyer 		    bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_seccnt);
    491  1.31    bouyer #else
    492  1.31    bouyer 		bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_error);
    493  1.31    bouyer 		bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_seccnt);
    494  1.31    bouyer #endif
    495  1.12       cgd 
    496  1.31    bouyer 		WDCDEBUG_PRINT(("wdcintr: inactive controller, "
    497  1.31    bouyer 		    "punting st=%02x er=%02x irr=%02x\n", s, e, i), DEBUG_INTR);
    498  1.31    bouyer 
    499  1.31    bouyer 		if (s & WDCS_DRQ) {
    500  1.31    bouyer 			int len;
    501  1.31    bouyer 			len = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
    502  1.31    bouyer 			    wd_cyl_lo) + 256 * bus_space_read_1(chp->cmd_iot,
    503  1.31    bouyer 			    chp->cmd_ioh, wd_cyl_hi);
    504  1.31    bouyer 			WDCDEBUG_PRINT(("wdcintr: clearing up %d bytes\n",
    505  1.31    bouyer 			    len), DEBUG_INTR);
    506  1.31    bouyer 			wdcbit_bucket (chp, len);
    507  1.31    bouyer 		}
    508  1.31    bouyer #else
    509  1.31    bouyer 		WDCDEBUG_PRINT(("wdcintr: inactive controller\n"), DEBUG_INTR);
    510  1.31    bouyer #endif
    511  1.31    bouyer 		return 0;
    512  1.31    bouyer 	}
    513  1.12       cgd 
    514  1.31    bouyer 	WDCDEBUG_PRINT(("wdcintr\n"), DEBUG_INTR);
    515  1.31    bouyer 	untimeout(wdctimeout, chp);
    516  1.31    bouyer 	chp->ch_flags &= ~WDCF_IRQ_WAIT;
    517  1.31    bouyer 	xfer = chp->ch_queue->sc_xfer.tqh_first;
    518  1.31    bouyer 	return xfer->c_intr(chp, xfer);
    519  1.12       cgd }
    520  1.12       cgd 
    521  1.31    bouyer /* Put all disk in RESET state */
    522  1.31    bouyer void wdc_reset_channel(drvp)
    523  1.31    bouyer 	struct ata_drive_datas *drvp;
    524   1.2    bouyer {
    525  1.31    bouyer 	struct channel_softc *chp = drvp->chnl_softc;
    526   1.2    bouyer 	int drive;
    527  1.34    bouyer 	WDCDEBUG_PRINT(("ata_reset_channel %s:%d for drive %d\n",
    528  1.34    bouyer 	    chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive),
    529  1.34    bouyer 	    DEBUG_FUNCS);
    530  1.31    bouyer 	(void) wdcreset(chp, VERBOSE);
    531  1.31    bouyer 	for (drive = 0; drive < 2; drive++) {
    532  1.31    bouyer 		chp->ch_drive[drive].state = 0;
    533  1.12       cgd 	}
    534  1.31    bouyer }
    535  1.12       cgd 
    536  1.31    bouyer int
    537  1.31    bouyer wdcreset(chp, verb)
    538  1.31    bouyer 	struct channel_softc *chp;
    539  1.31    bouyer 	int verb;
    540  1.31    bouyer {
    541  1.31    bouyer 	int drv_mask1, drv_mask2;
    542   1.2    bouyer 
    543  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    544  1.31    bouyer 	    WDSD_IBM); /* master */
    545  1.31    bouyer 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
    546  1.31    bouyer 	    WDCTL_RST | WDCTL_IDS);
    547  1.31    bouyer 	delay(1000);
    548  1.31    bouyer 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
    549  1.31    bouyer 	    WDCTL_IDS);
    550  1.31    bouyer 	delay(1000);
    551  1.31    bouyer 	(void) bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_error);
    552  1.31    bouyer 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
    553  1.31    bouyer 	    WDCTL_4BIT);
    554   1.2    bouyer 
    555  1.31    bouyer 	drv_mask1 = (chp->ch_drive[0].drive_flags & DRIVE) ? 0x01:0x00;
    556  1.31    bouyer 	drv_mask1 |= (chp->ch_drive[1].drive_flags & DRIVE) ? 0x02:0x00;
    557  1.31    bouyer 	drv_mask2 = __wdcwait_reset(chp, drv_mask1);
    558  1.31    bouyer 	if (verb && drv_mask2 != drv_mask1) {
    559  1.31    bouyer 		printf("%s channel %d: reset failed for",
    560  1.31    bouyer 		    chp->wdc->sc_dev.dv_xname, chp->channel);
    561  1.31    bouyer 		if ((drv_mask1 & 0x01) != 0 && (drv_mask2 & 0x01) == 0)
    562  1.31    bouyer 			printf(" drive 0");
    563  1.31    bouyer 		if ((drv_mask1 & 0x02) != 0 && (drv_mask2 & 0x02) == 0)
    564  1.31    bouyer 			printf(" drive 1");
    565  1.31    bouyer 		printf("\n");
    566  1.31    bouyer 	}
    567  1.31    bouyer 	return  (drv_mask1 != drv_mask2) ? 1 : 0;
    568  1.31    bouyer }
    569  1.31    bouyer 
    570  1.31    bouyer static int
    571  1.31    bouyer __wdcwait_reset(chp, drv_mask)
    572  1.31    bouyer 	struct channel_softc *chp;
    573  1.31    bouyer 	int drv_mask;
    574  1.31    bouyer {
    575  1.31    bouyer 	int timeout;
    576  1.31    bouyer 	u_int8_t st0, st1;
    577  1.31    bouyer 	/* wait for BSY to deassert */
    578  1.31    bouyer 	for (timeout = 0; timeout < WDCNDELAY_RST;timeout++) {
    579  1.31    bouyer 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    580  1.31    bouyer 		    WDSD_IBM); /* master */
    581  1.31    bouyer 		delay(1);
    582  1.31    bouyer 		st0 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
    583  1.31    bouyer 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    584  1.31    bouyer 		    WDSD_IBM | 0x10); /* slave */
    585  1.31    bouyer 		delay(1);
    586  1.31    bouyer 		st1 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
    587  1.31    bouyer 
    588  1.31    bouyer 		if ((drv_mask & 0x01) == 0) {
    589  1.31    bouyer 			/* no master */
    590  1.31    bouyer 			if ((drv_mask & 0x02) != 0 && (st1 & WDCS_BSY) == 0) {
    591  1.31    bouyer 				/* No master, slave is ready, it's done */
    592  1.31    bouyer 				return drv_mask;
    593  1.31    bouyer 			}
    594  1.31    bouyer 		} else if ((drv_mask & 0x02) == 0) {
    595  1.31    bouyer 			/* no slave */
    596  1.31    bouyer 			if ((drv_mask & 0x01) != 0 && (st0 & WDCS_BSY) == 0) {
    597  1.31    bouyer 				/* No slave, master is ready, it's done */
    598  1.31    bouyer 				return drv_mask;
    599  1.31    bouyer 			}
    600   1.2    bouyer 		} else {
    601  1.31    bouyer 			/* Wait for both master and slave to be ready */
    602  1.31    bouyer 			if ((st0 & WDCS_BSY) == 0 && (st1 & WDCS_BSY) == 0) {
    603  1.31    bouyer 				return drv_mask;
    604   1.2    bouyer 			}
    605   1.2    bouyer 		}
    606  1.31    bouyer 		delay(WDCDELAY);
    607   1.2    bouyer 	}
    608  1.31    bouyer 	/* Reset timed out. Maybe it's because drv_mask was not rigth */
    609  1.31    bouyer 	if (st0 & WDCS_BSY)
    610  1.31    bouyer 		drv_mask &= ~0x01;
    611  1.31    bouyer 	if (st1 & WDCS_BSY)
    612  1.31    bouyer 		drv_mask &= ~0x02;
    613  1.31    bouyer 	return drv_mask;
    614   1.2    bouyer }
    615   1.2    bouyer 
    616   1.2    bouyer /*
    617  1.31    bouyer  * Wait for a drive to be !BSY, and have mask in its status register.
    618  1.31    bouyer  * return -1 for a timeout after "timeout" ms.
    619   1.2    bouyer  */
    620  1.31    bouyer int
    621  1.31    bouyer wdcwait(chp, mask, bits, timeout)
    622  1.31    bouyer 	struct channel_softc *chp;
    623  1.31    bouyer 	int mask, bits, timeout;
    624   1.2    bouyer {
    625  1.31    bouyer 	u_char status;
    626  1.31    bouyer 	int time = 0;
    627  1.31    bouyer #ifdef WDCNDELAY_DEBUG
    628  1.31    bouyer 	extern int cold;
    629  1.31    bouyer #endif
    630  1.34    bouyer 	WDCDEBUG_PRINT(("wdcwait %s:%d\n", chp->wdc->sc_dev.dv_xname,
    631  1.34    bouyer 	    chp->channel), DEBUG_STATUS);
    632  1.31    bouyer 	chp->ch_error = 0;
    633  1.31    bouyer 
    634  1.31    bouyer 	timeout = timeout * 1000 / WDCDELAY; /* delay uses microseconds */
    635   1.2    bouyer 
    636  1.31    bouyer 	for (;;) {
    637  1.31    bouyer 		chp->ch_status = status =
    638  1.31    bouyer 		    bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
    639  1.31    bouyer 		if ((status & WDCS_BSY) == 0 && (status & mask) == bits)
    640  1.31    bouyer 			break;
    641  1.31    bouyer 		if (++time > timeout) {
    642  1.31    bouyer 			WDCDEBUG_PRINT(("wdcwait: timeout, status %x "
    643  1.31    bouyer 			    "error %x\n", status,
    644  1.31    bouyer 			    bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
    645  1.31    bouyer 				wd_error)),
    646  1.31    bouyer 			    DEBUG_STATUS);
    647  1.31    bouyer 			return -1;
    648  1.31    bouyer 		}
    649  1.31    bouyer 		delay(WDCDELAY);
    650   1.2    bouyer 	}
    651  1.31    bouyer 	if (status & WDCS_ERR)
    652  1.31    bouyer 		chp->ch_error = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
    653  1.31    bouyer 		    wd_error);
    654  1.31    bouyer #ifdef WDCNDELAY_DEBUG
    655  1.31    bouyer 	/* After autoconfig, there should be no long delays. */
    656  1.31    bouyer 	if (!cold && time > WDCNDELAY_DEBUG) {
    657  1.31    bouyer 		struct wdc_xfer *xfer = chp->ch_queue->sc_xfer.tqh_first;
    658  1.31    bouyer 		if (xfer == NULL)
    659  1.31    bouyer 			printf("%s channel %d: warning: busy-wait took %dus\n",
    660  1.31    bouyer 			    chp->wdc->sc_dev.dv_xname, chp->channel,
    661  1.31    bouyer 			    WDCDELAY * time);
    662  1.31    bouyer 		else
    663  1.31    bouyer 			printf("%s:%d:%d: warning: busy-wait took %dus\n",
    664  1.31    bouyer 			    chp->wdc->sc_dev.dv_xname, xfer->channel,
    665  1.31    bouyer 			    xfer->drive,
    666  1.31    bouyer 			    WDCDELAY * time);
    667   1.2    bouyer 	}
    668   1.2    bouyer #endif
    669  1.31    bouyer 	return 0;
    670   1.2    bouyer }
    671   1.2    bouyer 
    672  1.31    bouyer void
    673  1.31    bouyer wdctimeout(arg)
    674  1.31    bouyer 	void *arg;
    675   1.2    bouyer {
    676  1.31    bouyer 	struct channel_softc *chp = (struct channel_softc *)arg;
    677  1.31    bouyer 	struct wdc_xfer *xfer = chp->ch_queue->sc_xfer.tqh_first;
    678  1.31    bouyer 	int s;
    679   1.2    bouyer 
    680  1.31    bouyer 	WDCDEBUG_PRINT(("wdctimeout\n"), DEBUG_FUNCS);
    681  1.31    bouyer 
    682  1.31    bouyer 	s = splbio();
    683  1.31    bouyer 	if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0) {
    684  1.31    bouyer 		__wdcerror(chp, "lost interrupt");
    685  1.31    bouyer 		printf("\ttype: %s\n", (xfer->c_flags & C_ATAPI) ?
    686  1.31    bouyer 		    "atapi":"ata");
    687  1.31    bouyer 		printf("\tc_bcount: %d\n", xfer->c_bcount);
    688  1.31    bouyer 		printf("\tc_skip: %d\n", xfer->c_skip);
    689  1.31    bouyer 		/*
    690  1.31    bouyer 		 * Call the interrupt routine. If we just missed and interrupt,
    691  1.31    bouyer 		 * it will do what's needed. Else, it will take the needed
    692  1.31    bouyer 		 * action (reset the device).
    693  1.31    bouyer 		 */
    694  1.31    bouyer 		xfer->c_flags |= C_TIMEOU;
    695  1.31    bouyer 		chp->ch_flags &= ~WDCF_IRQ_WAIT;
    696  1.31    bouyer 		xfer->c_intr(chp, xfer);
    697  1.31    bouyer 	} else
    698  1.31    bouyer 		__wdcerror(chp, "missing untimeout");
    699  1.31    bouyer 	splx(s);
    700   1.2    bouyer }
    701   1.2    bouyer 
    702  1.31    bouyer /*
    703  1.31    bouyer  * Probe drive's capabilites, for use by the controller later
    704  1.31    bouyer  * Assumes drvp points to an existing drive.
    705  1.31    bouyer  * XXX this should be a controller-indep function
    706  1.31    bouyer  */
    707   1.2    bouyer void
    708  1.31    bouyer wdc_probe_caps(drvp)
    709  1.31    bouyer 	struct ata_drive_datas *drvp;
    710   1.2    bouyer {
    711  1.31    bouyer 	struct ataparams params, params2;
    712  1.31    bouyer 	struct channel_softc *chp = drvp->chnl_softc;
    713  1.31    bouyer 	struct device *drv_dev = drvp->drv_softc;
    714  1.31    bouyer 	struct wdc_softc *wdc = chp->wdc;
    715  1.31    bouyer 	int i, printed;
    716  1.31    bouyer 	char *sep = "";
    717  1.31    bouyer 
    718  1.31    bouyer 	if (ata_get_params(drvp, AT_POLL, &params) != CMD_OK) {
    719  1.31    bouyer 		/* IDENTIFY failed. Can't tell more about the device */
    720   1.2    bouyer 		return;
    721   1.2    bouyer 	}
    722  1.31    bouyer 	if ((wdc->cap & (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) ==
    723  1.31    bouyer 	    (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) {
    724   1.2    bouyer 		/*
    725  1.39    bouyer 		 * Controller claims 16 and 32 bit transfers.
    726  1.39    bouyer 		 * Re-do an IDENTIFY with 32-bit transfers,
    727  1.31    bouyer 		 * and compare results.
    728   1.2    bouyer 		 */
    729  1.31    bouyer 		drvp->drive_flags |= DRIVE_CAP32;
    730  1.31    bouyer 		ata_get_params(drvp, AT_POLL, &params2);
    731  1.31    bouyer 		if (memcmp(&params, &params2, sizeof(struct ataparams)) != 0) {
    732  1.31    bouyer 			/* Not good. fall back to 16bits */
    733  1.31    bouyer 			drvp->drive_flags &= ~DRIVE_CAP32;
    734  1.31    bouyer 		} else {
    735  1.39    bouyer 			printf("%s: 32-bits data port\n", drv_dev->dv_xname);
    736   1.2    bouyer 		}
    737   1.2    bouyer 	}
    738   1.2    bouyer 
    739  1.31    bouyer 	/* An ATAPI device is at last PIO mode 3 */
    740  1.31    bouyer 	if (drvp->drive_flags & DRIVE_ATAPI)
    741  1.31    bouyer 		drvp->PIO_mode = 3;
    742   1.2    bouyer 
    743   1.2    bouyer 	/*
    744  1.31    bouyer 	 * It's not in the specs, but it seems that some drive
    745  1.31    bouyer 	 * returns 0xffff in atap_extensions when this field is invalid
    746   1.2    bouyer 	 */
    747  1.31    bouyer 	if (params.atap_extensions != 0xffff &&
    748  1.31    bouyer 	    (params.atap_extensions & WDC_EXT_MODES)) {
    749  1.31    bouyer 		printed = 0;
    750  1.31    bouyer 		/*
    751  1.31    bouyer 		 * XXX some drives report something wrong here (they claim to
    752  1.31    bouyer 		 * support PIO mode 8 !). As mode is coded on 3 bits in
    753  1.31    bouyer 		 * SET FEATURE, limit it to 7 (so limit i to 4).
    754  1.39    bouyer 		 * If higther mode than 7 is found, abort.
    755  1.31    bouyer 		 */
    756  1.39    bouyer 		for (i = 7; i >= 0; i--) {
    757  1.31    bouyer 			if ((params.atap_piomode_supp & (1 << i)) == 0)
    758  1.31    bouyer 				continue;
    759  1.39    bouyer 			if (i > 4)
    760  1.39    bouyer 				return;
    761  1.31    bouyer 			/*
    762  1.31    bouyer 			 * See if mode is accepted.
    763  1.31    bouyer 			 * If the controller can't set its PIO mode,
    764  1.31    bouyer 			 * assume the defaults are good, so don't try
    765  1.31    bouyer 			 * to set it
    766  1.31    bouyer 			 */
    767  1.31    bouyer 			if ((wdc->cap & WDC_CAPABILITY_MODE) != 0)
    768  1.31    bouyer 				if (ata_set_mode(drvp, 0x08 | (i + 3),
    769  1.31    bouyer 				   AT_POLL) != CMD_OK)
    770   1.2    bouyer 					continue;
    771  1.31    bouyer 			if (!printed) {
    772  1.39    bouyer 				printf("%s: drive supports PIO mode %d",
    773  1.39    bouyer 				    drv_dev->dv_xname, i + 3);
    774  1.31    bouyer 				sep = ",";
    775  1.31    bouyer 				printed = 1;
    776  1.31    bouyer 			}
    777  1.31    bouyer 			/*
    778  1.31    bouyer 			 * If controller's driver can't set its PIO mode,
    779  1.31    bouyer 			 * get the highter one for the drive.
    780  1.31    bouyer 			 */
    781  1.31    bouyer 			if ((wdc->cap & WDC_CAPABILITY_MODE) == 0 ||
    782  1.31    bouyer 			    wdc->pio_mode >= i + 3) {
    783  1.31    bouyer 				drvp->PIO_mode = i + 3;
    784   1.2    bouyer 				break;
    785   1.2    bouyer 			}
    786   1.2    bouyer 		}
    787  1.31    bouyer 		if (!printed) {
    788  1.31    bouyer 			/*
    789  1.31    bouyer 			 * We didn't find a valid PIO mode.
    790  1.31    bouyer 			 * Assume the values returned for DMA are buggy too
    791  1.31    bouyer 			 */
    792  1.31    bouyer 			return;
    793   1.2    bouyer 		}
    794  1.35    bouyer 		drvp->drive_flags |= DRIVE_MODE;
    795  1.31    bouyer 		printed = 0;
    796  1.31    bouyer 		for (i = 7; i >= 0; i--) {
    797  1.31    bouyer 			if ((params.atap_dmamode_supp & (1 << i)) == 0)
    798  1.31    bouyer 				continue;
    799  1.31    bouyer 			if ((wdc->cap & WDC_CAPABILITY_DMA) &&
    800  1.31    bouyer 			    (wdc->cap & WDC_CAPABILITY_MODE))
    801  1.31    bouyer 				if (ata_set_mode(drvp, 0x20 | i, AT_POLL)
    802  1.31    bouyer 				    != CMD_OK)
    803  1.31    bouyer 					continue;
    804  1.31    bouyer 			if (!printed) {
    805  1.31    bouyer 				printf("%s DMA mode %d", sep, i);
    806  1.31    bouyer 				sep = ",";
    807  1.31    bouyer 				printed = 1;
    808  1.31    bouyer 			}
    809  1.31    bouyer 			if (wdc->cap & WDC_CAPABILITY_DMA) {
    810  1.31    bouyer 				if ((wdc->cap & WDC_CAPABILITY_MODE) &&
    811  1.31    bouyer 				    wdc->dma_mode < i)
    812  1.31    bouyer 					continue;
    813  1.31    bouyer 				drvp->DMA_mode = i;
    814  1.31    bouyer 				drvp->drive_flags |= DRIVE_DMA;
    815  1.31    bouyer 			}
    816   1.2    bouyer 			break;
    817   1.2    bouyer 		}
    818  1.31    bouyer 		if (params.atap_extensions & WDC_EXT_UDMA_MODES) {
    819  1.31    bouyer 			for (i = 7; i >= 0; i--) {
    820  1.31    bouyer 				if ((params.atap_udmamode_supp & (1 << i))
    821  1.31    bouyer 				    == 0)
    822  1.31    bouyer 					continue;
    823  1.31    bouyer 				if ((wdc->cap & WDC_CAPABILITY_MODE) &&
    824  1.31    bouyer 				    (wdc->cap & WDC_CAPABILITY_UDMA))
    825  1.31    bouyer 					if (ata_set_mode(drvp, 0x40 | i,
    826  1.31    bouyer 					    AT_POLL) != CMD_OK)
    827  1.31    bouyer 						continue;
    828  1.31    bouyer 				printf("%s UDMA mode %d", sep, i);
    829  1.31    bouyer 				sep = ",";
    830  1.31    bouyer 				/*
    831  1.31    bouyer 				 * ATA-4 specs says if a mode is supported,
    832  1.31    bouyer 				 * all lower modes shall be supported.
    833  1.31    bouyer 				 * No need to look further.
    834  1.31    bouyer 				 */
    835  1.31    bouyer 				if (wdc->cap & WDC_CAPABILITY_UDMA) {
    836  1.31    bouyer 					drvp->UDMA_mode = i;
    837  1.31    bouyer 					drvp->drive_flags |= DRIVE_UDMA;
    838  1.31    bouyer 				}
    839  1.31    bouyer 				break;
    840  1.31    bouyer 			}
    841  1.31    bouyer 		}
    842  1.31    bouyer 		printf("\n");
    843   1.2    bouyer 	}
    844   1.2    bouyer }
    845   1.2    bouyer 
    846   1.2    bouyer int
    847  1.31    bouyer wdc_exec_command(drvp, wdc_c)
    848  1.31    bouyer 	struct ata_drive_datas *drvp;
    849  1.31    bouyer 	struct wdc_command *wdc_c;
    850  1.31    bouyer {
    851  1.31    bouyer 	struct channel_softc *chp = drvp->chnl_softc;
    852   1.2    bouyer 	struct wdc_xfer *xfer;
    853  1.31    bouyer 	int s, ret;
    854   1.2    bouyer 
    855  1.34    bouyer 	WDCDEBUG_PRINT(("wdc_exec_command %s:%d:%d\n",
    856  1.34    bouyer 	    chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive),
    857  1.34    bouyer 	    DEBUG_FUNCS);
    858   1.2    bouyer 
    859  1.31    bouyer 	/* set up an xfer and queue. Wait for completion */
    860  1.31    bouyer 	xfer = wdc_get_xfer(wdc_c->flags & AT_WAIT ? WDC_CANSLEEP :
    861  1.31    bouyer 	    WDC_NOSLEEP);
    862  1.31    bouyer 	if (xfer == NULL) {
    863  1.31    bouyer 		return WDC_TRY_AGAIN;
    864  1.31    bouyer 	 }
    865   1.2    bouyer 
    866  1.31    bouyer 	if (wdc_c->flags & AT_POLL)
    867  1.31    bouyer 		xfer->c_flags |= C_POLL;
    868  1.31    bouyer 	xfer->drive = drvp->drive;
    869  1.31    bouyer 	xfer->databuf = wdc_c->data;
    870  1.31    bouyer 	xfer->c_bcount = wdc_c->bcount;
    871  1.31    bouyer 	xfer->cmd = wdc_c;
    872  1.31    bouyer 	xfer->c_start = __wdccommand_start;
    873  1.31    bouyer 	xfer->c_intr = __wdccommand_intr;
    874   1.2    bouyer 
    875  1.31    bouyer 	s = splbio();
    876  1.31    bouyer 	wdc_exec_xfer(chp, xfer);
    877  1.31    bouyer #ifdef DIAGNOSTIC
    878  1.31    bouyer 	if ((wdc_c->flags & AT_POLL) != 0 &&
    879  1.31    bouyer 	    (wdc_c->flags & AT_DONE) == 0)
    880  1.31    bouyer 		panic("wdc_exec_command: polled command not done\n");
    881   1.2    bouyer #endif
    882  1.31    bouyer 	if (wdc_c->flags & AT_DONE) {
    883  1.31    bouyer 		ret = WDC_COMPLETE;
    884  1.31    bouyer 	} else {
    885  1.31    bouyer 		if (wdc_c->flags & AT_WAIT) {
    886  1.31    bouyer 			tsleep(wdc_c, PRIBIO, "wdccmd", 0);
    887  1.31    bouyer 			ret = WDC_COMPLETE;
    888  1.31    bouyer 		} else {
    889  1.31    bouyer 			ret = WDC_QUEUED;
    890   1.2    bouyer 		}
    891   1.2    bouyer 	}
    892  1.31    bouyer 	splx(s);
    893  1.31    bouyer 	return ret;
    894   1.2    bouyer }
    895   1.2    bouyer 
    896   1.2    bouyer void
    897  1.31    bouyer __wdccommand_start(chp, xfer)
    898  1.31    bouyer 	struct channel_softc *chp;
    899   1.2    bouyer 	struct wdc_xfer *xfer;
    900  1.31    bouyer {
    901  1.31    bouyer 	int drive = xfer->drive;
    902  1.31    bouyer 	struct wdc_command *wdc_c = xfer->cmd;
    903  1.31    bouyer 
    904  1.34    bouyer 	WDCDEBUG_PRINT(("__wdccommand_start %s:%d:%d\n",
    905  1.34    bouyer 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
    906  1.34    bouyer 	    DEBUG_FUNCS);
    907  1.31    bouyer 
    908  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    909  1.31    bouyer 	    WDSD_IBM | (drive << 4));
    910  1.31    bouyer 	if (wdcwait(chp, wdc_c->r_st_bmask, wdc_c->r_st_bmask,
    911  1.31    bouyer 	    wdc_c->timeout) != 0) {
    912  1.31    bouyer 		wdc_c->flags |= AT_TIMEOU;
    913  1.31    bouyer 		__wdccommand_done(chp, xfer);
    914  1.31    bouyer 	}
    915  1.31    bouyer 	wdccommand(chp, drive, wdc_c->r_command, wdc_c->r_cyl, wdc_c->r_head,
    916  1.31    bouyer 	    wdc_c->r_sector, wdc_c->r_count, wdc_c->r_precomp);
    917  1.31    bouyer 	if ((wdc_c->flags & AT_POLL) == 0) {
    918  1.31    bouyer 		chp->ch_flags |= WDCF_IRQ_WAIT; /* wait for interrupt */
    919  1.31    bouyer 		timeout(wdctimeout, chp, wdc_c->timeout / 1000 * hz);
    920  1.31    bouyer 		return;
    921   1.2    bouyer 	}
    922   1.2    bouyer 	/*
    923  1.31    bouyer 	 * Polled command. Wait for drive ready or drq. Done in intr().
    924  1.31    bouyer 	 * Wait for at last 400ns for status bit to be valid.
    925   1.2    bouyer 	 */
    926  1.31    bouyer 	delay(10);
    927  1.31    bouyer 	if (__wdccommand_intr(chp, xfer) == 0) {
    928  1.31    bouyer 		wdc_c->flags |= AT_TIMEOU;
    929  1.31    bouyer 		__wdccommand_done(chp, xfer);
    930   1.2    bouyer 	}
    931   1.2    bouyer }
    932   1.2    bouyer 
    933   1.2    bouyer int
    934  1.31    bouyer __wdccommand_intr(chp, xfer)
    935  1.31    bouyer 	struct channel_softc *chp;
    936  1.31    bouyer 	struct wdc_xfer *xfer;
    937   1.2    bouyer {
    938  1.31    bouyer 	struct wdc_command *wdc_c = xfer->cmd;
    939  1.31    bouyer 	int bcount = wdc_c->bcount;
    940  1.31    bouyer 	char *data = wdc_c->data;
    941  1.31    bouyer 
    942  1.34    bouyer 	WDCDEBUG_PRINT(("__wdccommand_intr %s:%d:%d\n",
    943  1.34    bouyer 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), DEBUG_INTR);
    944  1.31    bouyer 	if (wdcwait(chp, wdc_c->r_st_pmask, wdc_c->r_st_pmask,
    945  1.31    bouyer 	    wdc_c->timeout)) {
    946  1.31    bouyer 		wdc_c->flags |= AT_ERROR;
    947  1.31    bouyer 		__wdccommand_done(chp, xfer);
    948   1.2    bouyer 		return 1;
    949   1.2    bouyer 	}
    950  1.31    bouyer 	if (wdc_c->flags & AT_READ) {
    951  1.31    bouyer 		if (chp->ch_drive[xfer->drive].drive_flags & DRIVE_CAP32) {
    952  1.31    bouyer 			bus_space_read_multi_4(chp->data32iot, chp->data32ioh,
    953  1.31    bouyer 			    0, (u_int32_t*)data, bcount >> 2);
    954  1.31    bouyer 			data += bcount & 0xfffffffc;
    955  1.31    bouyer 			bcount = bcount & 0x03;
    956  1.31    bouyer 		}
    957  1.31    bouyer 		if (bcount > 0)
    958  1.31    bouyer 			bus_space_read_multi_2(chp->cmd_iot, chp->cmd_ioh,
    959  1.31    bouyer 			    wd_data, (u_int16_t *)data, bcount >> 1);
    960  1.31    bouyer 	} else if (wdc_c->flags & AT_WRITE) {
    961  1.31    bouyer 		if (chp->ch_drive[xfer->drive].drive_flags & DRIVE_CAP32) {
    962  1.31    bouyer 			bus_space_write_multi_4(chp->data32iot, chp->data32ioh,
    963  1.31    bouyer 			    0, (u_int32_t*)data, bcount >> 2);
    964  1.31    bouyer 			data += bcount & 0xfffffffc;
    965  1.31    bouyer 			bcount = bcount & 0x03;
    966  1.31    bouyer 		}
    967  1.31    bouyer 		if (bcount > 0)
    968  1.31    bouyer 			bus_space_write_multi_2(chp->cmd_iot, chp->cmd_ioh,
    969  1.31    bouyer 			    wd_data, (u_int16_t *)data, bcount >> 1);
    970   1.2    bouyer 	}
    971  1.31    bouyer 	__wdccommand_done(chp, xfer);
    972  1.31    bouyer 	return 1;
    973   1.2    bouyer }
    974   1.2    bouyer 
    975   1.2    bouyer void
    976  1.31    bouyer __wdccommand_done(chp, xfer)
    977  1.31    bouyer 	struct channel_softc *chp;
    978  1.31    bouyer 	struct wdc_xfer *xfer;
    979   1.2    bouyer {
    980  1.31    bouyer 	int needdone = xfer->c_flags & C_NEEDDONE;
    981  1.31    bouyer 	struct wdc_command *wdc_c = xfer->cmd;
    982   1.2    bouyer 
    983  1.34    bouyer 	WDCDEBUG_PRINT(("__wdccommand_done %s:%d:%d\n",
    984  1.34    bouyer 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), DEBUG_FUNCS);
    985  1.31    bouyer 	if (chp->ch_status & WDCS_DWF)
    986  1.31    bouyer 		wdc_c->flags |= AT_DF;
    987  1.31    bouyer 	if (chp->ch_status & WDCS_ERR) {
    988  1.31    bouyer 		wdc_c->flags |= AT_ERROR;
    989  1.31    bouyer 		wdc_c->r_error = chp->ch_error;
    990  1.31    bouyer 	}
    991  1.31    bouyer 	wdc_c->flags |= AT_DONE;
    992  1.31    bouyer 	wdc_free_xfer(chp, xfer);
    993  1.31    bouyer 	if (needdone) {
    994  1.31    bouyer 		if (wdc_c->flags & AT_WAIT)
    995  1.31    bouyer 			wakeup(wdc_c);
    996  1.31    bouyer 		else
    997  1.31    bouyer 			wdc_c->callback(wdc_c->callback_arg);
    998   1.2    bouyer 	}
    999  1.41      kenh 	wdcstart(chp->wdc, chp->channel);
   1000  1.31    bouyer 	return;
   1001   1.2    bouyer }
   1002   1.2    bouyer 
   1003   1.2    bouyer /*
   1004  1.31    bouyer  * Send a command. The drive should be ready.
   1005   1.2    bouyer  * Assumes interrupts are blocked.
   1006   1.2    bouyer  */
   1007  1.31    bouyer void
   1008  1.31    bouyer wdccommand(chp, drive, command, cylin, head, sector, count, precomp)
   1009  1.31    bouyer 	struct channel_softc *chp;
   1010  1.31    bouyer 	u_int8_t drive;
   1011  1.31    bouyer 	u_int8_t command;
   1012  1.31    bouyer 	u_int16_t cylin;
   1013  1.31    bouyer 	u_int8_t head, sector, count, precomp;
   1014  1.31    bouyer {
   1015  1.31    bouyer 	WDCDEBUG_PRINT(("wdccommand %s:%d:%d: command=0x%x cylin=%d head=%d "
   1016  1.31    bouyer 	    "sector=%d count=%d precomp=%d\n", chp->wdc->sc_dev.dv_xname,
   1017  1.31    bouyer 	    chp->channel, drive, command, cylin, head, sector, count, precomp),
   1018  1.31    bouyer 	    DEBUG_FUNCS);
   1019  1.31    bouyer 
   1020  1.31    bouyer 	/* Select drive, head, and addressing mode. */
   1021  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
   1022  1.31    bouyer 	    WDSD_IBM | (drive << 4) | head);
   1023  1.31    bouyer 	/* Load parameters. wd_features(ATA/ATAPI) = wd_precomp(ST506) */
   1024  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_precomp,
   1025  1.31    bouyer 	    precomp);
   1026  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo, cylin);
   1027  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi, cylin >> 8);
   1028  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sector, sector);
   1029  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_seccnt, count);
   1030   1.2    bouyer 
   1031  1.31    bouyer 	/* Send command. */
   1032  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_command, command);
   1033  1.31    bouyer 	return;
   1034   1.2    bouyer }
   1035   1.2    bouyer 
   1036   1.2    bouyer /*
   1037  1.31    bouyer  * Simplified version of wdccommand().  Unbusy/ready/drq must be
   1038  1.31    bouyer  * tested by the caller.
   1039   1.2    bouyer  */
   1040  1.31    bouyer void
   1041  1.31    bouyer wdccommandshort(chp, drive, command)
   1042  1.31    bouyer 	struct channel_softc *chp;
   1043  1.31    bouyer 	int drive;
   1044  1.31    bouyer 	int command;
   1045   1.2    bouyer {
   1046   1.2    bouyer 
   1047  1.31    bouyer 	WDCDEBUG_PRINT(("wdccommandshort %s:%d:%d command 0x%x\n",
   1048  1.31    bouyer 	    chp->wdc->sc_dev.dv_xname, chp->channel, drive, command),
   1049  1.31    bouyer 	    DEBUG_FUNCS);
   1050   1.2    bouyer 
   1051  1.31    bouyer 	/* Select drive. */
   1052  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
   1053  1.31    bouyer 	    WDSD_IBM | (drive << 4));
   1054   1.2    bouyer 
   1055  1.31    bouyer 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_command, command);
   1056  1.31    bouyer }
   1057   1.2    bouyer 
   1058  1.31    bouyer /* Add a command to the queue and start controller. Must be called at splbio */
   1059   1.2    bouyer 
   1060   1.2    bouyer void
   1061  1.31    bouyer wdc_exec_xfer(chp, xfer)
   1062  1.31    bouyer 	struct channel_softc *chp;
   1063   1.2    bouyer 	struct wdc_xfer *xfer;
   1064   1.2    bouyer {
   1065  1.33    bouyer 	WDCDEBUG_PRINT(("wdc_exec_xfer %p channel %d drive %d\n", xfer,
   1066  1.33    bouyer 	    chp->channel, xfer->drive), DEBUG_XFERS);
   1067   1.2    bouyer 
   1068  1.31    bouyer 	/* complete xfer setup */
   1069  1.31    bouyer 	xfer->channel = chp->channel;
   1070   1.2    bouyer 
   1071  1.31    bouyer 	/*
   1072  1.31    bouyer 	 * If we are a polled command, and the list is not empty,
   1073  1.31    bouyer 	 * we are doing a dump. Drop the list to allow the polled command
   1074  1.31    bouyer 	 * to complete, we're going to reboot soon anyway.
   1075  1.31    bouyer 	 */
   1076  1.31    bouyer 	if ((xfer->c_flags & C_POLL) != 0 &&
   1077  1.31    bouyer 	    chp->ch_queue->sc_xfer.tqh_first != NULL) {
   1078  1.31    bouyer 		TAILQ_INIT(&chp->ch_queue->sc_xfer);
   1079  1.31    bouyer 	}
   1080   1.2    bouyer 	/* insert at the end of command list */
   1081  1.31    bouyer 	TAILQ_INSERT_TAIL(&chp->ch_queue->sc_xfer,xfer , c_xferchain);
   1082  1.31    bouyer 	WDCDEBUG_PRINT(("wdcstart from wdc_exec_xfer, flags 0x%x\n",
   1083  1.33    bouyer 	    chp->ch_flags), DEBUG_XFERS);
   1084  1.31    bouyer 	wdcstart(chp->wdc, chp->channel);
   1085   1.2    bouyer 	xfer->c_flags |= C_NEEDDONE; /* we can now call upper level done() */
   1086  1.31    bouyer }
   1087   1.2    bouyer 
   1088   1.2    bouyer struct wdc_xfer *
   1089   1.2    bouyer wdc_get_xfer(flags)
   1090   1.2    bouyer 	int flags;
   1091   1.2    bouyer {
   1092   1.2    bouyer 	struct wdc_xfer *xfer;
   1093   1.2    bouyer 	int s;
   1094   1.2    bouyer 
   1095   1.2    bouyer 	s = splbio();
   1096   1.2    bouyer 	if ((xfer = xfer_free_list.lh_first) != NULL) {
   1097   1.2    bouyer 		LIST_REMOVE(xfer, free_list);
   1098   1.2    bouyer 		splx(s);
   1099   1.2    bouyer #ifdef DIAGNOSTIC
   1100   1.2    bouyer 		if ((xfer->c_flags & C_INUSE) != 0)
   1101   1.2    bouyer 			panic("wdc_get_xfer: xfer already in use\n");
   1102   1.2    bouyer #endif
   1103   1.2    bouyer 	} else {
   1104   1.2    bouyer 		splx(s);
   1105  1.31    bouyer 		WDCDEBUG_PRINT(("wdc:making xfer %d\n",wdc_nxfer), DEBUG_XFERS);
   1106   1.2    bouyer 		xfer = malloc(sizeof(*xfer), M_DEVBUF,
   1107  1.31    bouyer 		    ((flags & WDC_NOSLEEP) != 0 ? M_NOWAIT : M_WAITOK));
   1108   1.2    bouyer 		if (xfer == NULL)
   1109   1.2    bouyer 			return 0;
   1110   1.2    bouyer #ifdef DIAGNOSTIC
   1111   1.2    bouyer 		xfer->c_flags &= ~C_INUSE;
   1112   1.2    bouyer #endif
   1113  1.31    bouyer #ifdef WDCDEBUG
   1114   1.2    bouyer 		wdc_nxfer++;
   1115   1.2    bouyer #endif
   1116   1.2    bouyer 	}
   1117   1.2    bouyer #ifdef DIAGNOSTIC
   1118   1.2    bouyer 	if ((xfer->c_flags & C_INUSE) != 0)
   1119   1.2    bouyer 		panic("wdc_get_xfer: xfer already in use\n");
   1120   1.2    bouyer #endif
   1121  1.31    bouyer 	memset(xfer, 0, sizeof(struct wdc_xfer));
   1122   1.2    bouyer 	xfer->c_flags = C_INUSE;
   1123   1.2    bouyer 	return xfer;
   1124   1.2    bouyer }
   1125   1.2    bouyer 
   1126   1.2    bouyer void
   1127  1.31    bouyer wdc_free_xfer(chp, xfer)
   1128  1.31    bouyer 	struct channel_softc *chp;
   1129   1.2    bouyer 	struct wdc_xfer *xfer;
   1130   1.2    bouyer {
   1131  1.31    bouyer 	struct wdc_softc *wdc = chp->wdc;
   1132   1.2    bouyer 	int s;
   1133   1.2    bouyer 
   1134  1.31    bouyer 	if (wdc->cap & WDC_CAPABILITY_HWLOCK)
   1135  1.31    bouyer 		(*wdc->free_hw)(chp);
   1136   1.2    bouyer 	s = splbio();
   1137  1.31    bouyer 	chp->ch_flags &= ~WDCF_ACTIVE;
   1138  1.31    bouyer 	TAILQ_REMOVE(&chp->ch_queue->sc_xfer, xfer, c_xferchain);
   1139   1.2    bouyer 	xfer->c_flags &= ~C_INUSE;
   1140   1.2    bouyer 	LIST_INSERT_HEAD(&xfer_free_list, xfer, free_list);
   1141   1.2    bouyer 	splx(s);
   1142   1.2    bouyer }
   1143   1.2    bouyer 
   1144  1.31    bouyer static void
   1145  1.31    bouyer __wdcerror(chp, msg)
   1146  1.31    bouyer 	struct channel_softc *chp;
   1147   1.2    bouyer 	char *msg;
   1148   1.2    bouyer {
   1149  1.31    bouyer 	struct wdc_xfer *xfer = chp->ch_queue->sc_xfer.tqh_first;
   1150   1.2    bouyer 	if (xfer == NULL)
   1151  1.31    bouyer 		printf("%s:%d: %s\n", chp->wdc->sc_dev.dv_xname, chp->channel,
   1152  1.31    bouyer 		    msg);
   1153   1.2    bouyer 	else
   1154  1.31    bouyer 		printf("%s:%d:%d: %s\n", chp->wdc->sc_dev.dv_xname,
   1155  1.31    bouyer 		    xfer->channel, xfer->drive, msg);
   1156   1.2    bouyer }
   1157   1.2    bouyer 
   1158   1.2    bouyer /*
   1159   1.2    bouyer  * the bit bucket
   1160   1.2    bouyer  */
   1161   1.2    bouyer void
   1162  1.31    bouyer wdcbit_bucket(chp, size)
   1163  1.31    bouyer 	struct channel_softc *chp;
   1164   1.2    bouyer 	int size;
   1165   1.2    bouyer {
   1166   1.2    bouyer 
   1167  1.12       cgd 	for (; size >= 2; size -= 2)
   1168  1.31    bouyer 		(void)bus_space_read_2(chp->cmd_iot, chp->cmd_ioh, wd_data);
   1169  1.12       cgd 	if (size)
   1170  1.31    bouyer 		(void)bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_data);
   1171   1.2    bouyer }
   1172