wdcvar.h revision 1.2.2.2
1 1.2.2.2 bouyer /* $NetBSD: wdcvar.h,v 1.2.2.2 1998/06/05 08:38:57 bouyer Exp $ */ 2 1.1 cgd 3 1.1 cgd /* 4 1.1 cgd * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 5 1.1 cgd * 6 1.1 cgd * DMA and multi-sector PIO handling are derived from code contributed by 7 1.1 cgd * Onno van der Linden. 8 1.1 cgd * 9 1.1 cgd * Atapi support added by Manuel Bouyer. 10 1.1 cgd * 11 1.1 cgd * bus_space-ified by Christopher G. Demetriou. 12 1.1 cgd * 13 1.1 cgd * Redistribution and use in source and binary forms, with or without 14 1.1 cgd * modification, are permitted provided that the following conditions 15 1.1 cgd * are met: 16 1.1 cgd * 1. Redistributions of source code must retain the above copyright 17 1.2.2.1 bouyer * notice, this list of conditions and the following disclaimer. 18 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright 19 1.2.2.1 bouyer * notice, this list of conditions and the following disclaimer in the 20 1.2.2.1 bouyer * documentation and/or other materials provided with the distribution. 21 1.1 cgd * 3. All advertising materials mentioning features or use of this software 22 1.2.2.1 bouyer * must display the following acknowledgement: 23 1.1 cgd * This product includes software developed by Charles M. Hannum. 24 1.1 cgd * 4. The name of the author may not be used to endorse or promote products 25 1.2.2.1 bouyer * derived from this software without specific prior written permission. 26 1.1 cgd * 27 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 28 1.1 cgd * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 29 1.1 cgd * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 1.1 cgd * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 31 1.1 cgd * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 32 1.1 cgd * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33 1.1 cgd * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 34 1.1 cgd * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35 1.1 cgd * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 36 1.1 cgd * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37 1.1 cgd */ 38 1.1 cgd 39 1.2.2.1 bouyer #define WAITTIME (10 * hz) /* time to wait for a completion */ 40 1.2.2.1 bouyer /* this is a lot for hard drives, but not for cdroms */ 41 1.2.2.1 bouyer 42 1.2.2.1 bouyer struct channel_queue { /* per channel queue (may be shared) */ 43 1.2.2.1 bouyer TAILQ_HEAD(xferhead, wdc_xfer) sc_xfer; 44 1.2.2.1 bouyer }; 45 1.2.2.1 bouyer 46 1.2.2.1 bouyer struct channel_softc { /* Per channel data */ 47 1.2.2.1 bouyer /* Our location */ 48 1.2.2.1 bouyer int channel; 49 1.2.2.1 bouyer /* Our controller's softc */ 50 1.2.2.1 bouyer struct wdc_softc *wdc; 51 1.2.2.1 bouyer /* Our registers */ 52 1.2.2.1 bouyer bus_space_tag_t cmd_iot; 53 1.2.2.1 bouyer bus_space_handle_t cmd_ioh; 54 1.2.2.1 bouyer bus_space_tag_t ctl_iot; 55 1.2.2.1 bouyer bus_space_handle_t ctl_ioh; 56 1.1 cgd /* 57 1.1 cgd * XXX data access (normal and 32-bit) may need to be 58 1.1 cgd * done via a separate iot/ioh on some systems. Let's 59 1.1 cgd * wait and see if that's the case before implementing 60 1.1 cgd * it. 61 1.1 cgd */ 62 1.2.2.1 bouyer /* Our state */ 63 1.2.2.1 bouyer int ch_flags; 64 1.2.2.1 bouyer #define WDCF_ACTIVE 0x01 /* channel is active */ 65 1.2.2.1 bouyer #define WDCF_IRQ_WAIT 0x10 /* controller is waiting for irq */ 66 1.2.2.1 bouyer u_int8_t ch_status; /* copy of status register */ 67 1.2.2.1 bouyer u_int8_t ch_error; /* copy of error register */ 68 1.2.2.1 bouyer /* per-drive infos */ 69 1.2.2.1 bouyer struct ata_drive_datas ch_drive[2]; 70 1.1 cgd 71 1.2.2.1 bouyer /* 72 1.2.2.1 bouyer * channel queues. May be the same for all channels, if hw channels 73 1.2.2.1 bouyer * are not independants 74 1.2.2.1 bouyer */ 75 1.2.2.1 bouyer struct channel_queue *ch_queue; 76 1.1 cgd }; 77 1.1 cgd 78 1.2.2.1 bouyer struct wdc_softc { /* Per controller state */ 79 1.2.2.1 bouyer struct device sc_dev; 80 1.2.2.1 bouyer /* manadatory fields */ 81 1.2.2.1 bouyer int cap; 82 1.1 cgd /* Capabilities supported by the controller */ 83 1.2.2.1 bouyer #define WDC_CAPABILITY_DATA32 0x01 /* 32-bit data access */ 84 1.2.2.1 bouyer #define WDC_CAPABILITY_DMA 0x02 /* DMA */ 85 1.2.2.1 bouyer #define WDC_CAPABILITY_UDMA 0x04 /* Ultra-DMA/33 */ 86 1.2.2.1 bouyer #define WDC_CAPABILITY_HWLOCK 0x08 /* Needs to lock HW */ 87 1.2.2.1 bouyer u_int8_t pio_mode; /* hightest PIO mode supported */ 88 1.2.2.1 bouyer u_int8_t dma_mode; /* hightest DMA mode supported */ 89 1.2.2.1 bouyer int nchannels; /* Number of channels on this controller */ 90 1.2.2.1 bouyer struct channel_softc *channels; /* channels-specific datas (array) */ 91 1.1 cgd 92 1.2.2.1 bouyer /* if WDC_CAPABILITY_DMA set in 'cap' */ 93 1.2.2.1 bouyer void *dma_arg; 94 1.2.2.1 bouyer int (*dma_init) __P((void *, int, int, void *, size_t, 95 1.2.2.1 bouyer int)); 96 1.2.2.1 bouyer void (*dma_start) __P((void *, int, int, int)); 97 1.2.2.1 bouyer int (*dma_finish) __P((void *, int, int, int)); 98 1.1 cgd 99 1.2.2.1 bouyer /* if WDC_CAPABILITY_HWLOCK set in 'cap' */ 100 1.2.2.1 bouyer int (*claim_hw) __P((void *, int)); 101 1.2.2.1 bouyer void (*free_hw) __P((void *)); 102 1.1 cgd 103 1.1 cgd }; 104 1.1 cgd 105 1.2.2.1 bouyer /* 106 1.2.2.1 bouyer * Description of a command to be handled by a controller. 107 1.2.2.1 bouyer * These commands are queued in a list. 108 1.2.2.1 bouyer */ 109 1.2.2.1 bouyer struct wdc_xfer { 110 1.2.2.1 bouyer volatile u_int c_flags; 111 1.2.2.1 bouyer #define C_INUSE 0x0001 /* xfer struct is in use */ 112 1.2.2.1 bouyer #define C_ATAPI 0x0002 /* xfer is ATAPI request */ 113 1.2.2.1 bouyer #define C_TIMEOU 0x0004 /* xfer processing timed out */ 114 1.2.2.1 bouyer #define C_NEEDDONE 0x0010 /* need to call upper-level done */ 115 1.2.2.1 bouyer 116 1.2.2.1 bouyer /* Information about our location */ 117 1.2.2.1 bouyer u_int8_t drive; 118 1.2.2.1 bouyer u_int8_t channel; 119 1.2.2.1 bouyer 120 1.2.2.1 bouyer /* Information about the current transfer */ 121 1.2.2.1 bouyer void *cmd; /* wdc, ata or scsipi command structure */ 122 1.2.2.1 bouyer void *databuf; 123 1.2.2.1 bouyer int c_bcount; /* byte count left */ 124 1.2.2.1 bouyer int c_skip; /* bytes already transferred */ 125 1.2.2.1 bouyer TAILQ_ENTRY(wdc_xfer) c_xferchain; 126 1.2.2.1 bouyer LIST_ENTRY(wdc_xfer) free_list; 127 1.2.2.1 bouyer void (*c_start) __P((struct channel_softc *, struct wdc_xfer *)); 128 1.2.2.1 bouyer int (*c_intr) __P((struct channel_softc *, struct wdc_xfer *)); 129 1.2.2.1 bouyer }; 130 1.2.2.1 bouyer 131 1.2.2.1 bouyer /* 132 1.2.2.1 bouyer * Public functions which can be called by ATA or ATAPI specific parts, 133 1.2.2.1 bouyer * or bus-specific backends. 134 1.2.2.1 bouyer */ 135 1.2.2.1 bouyer 136 1.2.2.1 bouyer int wdcprobe __P((const struct channel_softc *)); 137 1.2.2.1 bouyer void wdcattach __P((struct channel_softc *)); 138 1.2.2.1 bouyer int wdcintr __P((void *)); 139 1.2.2.1 bouyer void wdc_exec_xfer __P((struct channel_softc *, struct wdc_xfer *)); 140 1.2.2.1 bouyer struct wdc_xfer *wdc_get_xfer __P((int)); /* int = WDC_NOSLEEP/CANSLEEP */ 141 1.2.2.1 bouyer #define WDC_CANSLEEP 0x00 142 1.2.2.1 bouyer #define WDC_NOSLEEP 0x01 143 1.2.2.1 bouyer void wdc_free_xfer __P((struct channel_softc *, struct wdc_xfer *)); 144 1.2.2.1 bouyer void wdcstart __P((struct wdc_softc *, int)); 145 1.2.2.2 bouyer void wdcrestart __P((void*)); 146 1.2.2.1 bouyer int wdcreset __P((struct channel_softc *, int)); 147 1.2.2.1 bouyer #define VERBOSE 1 148 1.2.2.1 bouyer #define SILENT 0 /* wdcreset will not print errors */ 149 1.2.2.1 bouyer int wdcwait __P((struct channel_softc *, int)); 150 1.2.2.1 bouyer void wdcbit_bucket __P(( struct channel_softc *, int)); 151 1.2.2.1 bouyer void wdccommand __P((struct channel_softc *, u_int8_t, u_int8_t, u_int16_t, 152 1.2.2.1 bouyer u_int8_t, u_int8_t, u_int8_t, u_int8_t)); 153 1.2.2.1 bouyer void wdccommandshort __P((struct channel_softc *, int, int)); 154 1.2.2.1 bouyer void wdctimeout __P((void *arg)); 155 1.2.2.1 bouyer 156 1.2.2.1 bouyer /* 157 1.2.2.1 bouyer * ST506 spec says that if READY or SEEKCMPLT go off, then the read or write 158 1.2.2.1 bouyer * command is aborted. 159 1.2.2.1 bouyer */ 160 1.2.2.1 bouyer #define wait_for_drq(chp) wdcwait(chp, WDCS_DRDY | WDCS_DSC | WDCS_DRQ) 161 1.2.2.1 bouyer #define wait_for_unbusy(chp) wdcwait(chp, 0) 162 1.2.2.1 bouyer #define wait_for_ready(chp) wdcwait(chp, WDCS_DRDY | WDCS_DSC) 163 1.2.2.1 bouyer 164 1.2.2.1 bouyer void wdc_atapibus_attach __P((struct channel_softc *)); 165 1.2.2.1 bouyer void wdc_ata_attach __P((struct channel_softc *)); 166
Indexes created Sun Oct 19 02:09:48 GMT 2025