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wdcvar.h revision 1.2.2.9
      1  1.2.2.9  bouyer /*	$NetBSD: wdcvar.h,v 1.2.2.9 1998/09/20 13:16:17 bouyer Exp $	*/
      2      1.1     cgd 
      3  1.2.2.7  bouyer /*-
      4  1.2.2.7  bouyer  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  1.2.2.7  bouyer  * All rights reserved.
      6      1.1     cgd  *
      7  1.2.2.7  bouyer  * This code is derived from software contributed to The NetBSD Foundation
      8  1.2.2.7  bouyer  * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
      9      1.1     cgd  *
     10      1.1     cgd  * Redistribution and use in source and binary forms, with or without
     11      1.1     cgd  * modification, are permitted provided that the following conditions
     12      1.1     cgd  * are met:
     13      1.1     cgd  * 1. Redistributions of source code must retain the above copyright
     14  1.2.2.1  bouyer  *	notice, this list of conditions and the following disclaimer.
     15      1.1     cgd  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.2.2.1  bouyer  *	notice, this list of conditions and the following disclaimer in the
     17  1.2.2.1  bouyer  *	documentation and/or other materials provided with the distribution.
     18      1.1     cgd  * 3. All advertising materials mentioning features or use of this software
     19  1.2.2.7  bouyer  *    must display the following acknowledgement:
     20  1.2.2.7  bouyer  *        This product includes software developed by the NetBSD
     21  1.2.2.7  bouyer  *        Foundation, Inc. and its contributors.
     22  1.2.2.7  bouyer  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.2.2.7  bouyer  *    contributors may be used to endorse or promote products derived
     24  1.2.2.7  bouyer  *    from this software without specific prior written permission.
     25      1.1     cgd  *
     26  1.2.2.7  bouyer  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.2.2.7  bouyer  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.2.2.7  bouyer  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.2.2.7  bouyer  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.2.2.7  bouyer  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.2.2.7  bouyer  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.2.2.7  bouyer  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.2.2.7  bouyer  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.2.2.7  bouyer  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.2.2.7  bouyer  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.2.2.7  bouyer  * POSSIBILITY OF SUCH DAMAGE.
     37      1.1     cgd  */
     38      1.1     cgd 
     39  1.2.2.1  bouyer #define	WAITTIME    (10 * hz)    /* time to wait for a completion */
     40  1.2.2.1  bouyer 	/* this is a lot for hard drives, but not for cdroms */
     41  1.2.2.1  bouyer 
     42  1.2.2.1  bouyer struct channel_queue {  /* per channel queue (may be shared) */
     43  1.2.2.1  bouyer 	TAILQ_HEAD(xferhead, wdc_xfer) sc_xfer;
     44  1.2.2.1  bouyer };
     45  1.2.2.1  bouyer 
     46  1.2.2.1  bouyer struct channel_softc { /* Per channel data */
     47  1.2.2.1  bouyer 	/* Our location */
     48  1.2.2.1  bouyer 	int channel;
     49  1.2.2.1  bouyer 	/* Our controller's softc */
     50  1.2.2.1  bouyer 	struct wdc_softc *wdc;
     51  1.2.2.1  bouyer 	/* Our registers */
     52  1.2.2.1  bouyer 	bus_space_tag_t       cmd_iot;
     53  1.2.2.1  bouyer 	bus_space_handle_t    cmd_ioh;
     54  1.2.2.1  bouyer 	bus_space_tag_t       ctl_iot;
     55  1.2.2.1  bouyer 	bus_space_handle_t    ctl_ioh;
     56      1.1     cgd 	/*
     57      1.1     cgd 	 * XXX data access (normal and 32-bit) may need to be
     58      1.1     cgd 	 * done via a separate iot/ioh on some systems.  Let's
     59      1.1     cgd 	 * wait and see if that's the case before implementing
     60      1.1     cgd 	 * it.
     61      1.1     cgd 	 */
     62  1.2.2.1  bouyer 	/* Our state */
     63  1.2.2.1  bouyer 	int ch_flags;
     64  1.2.2.1  bouyer #define WDCF_ACTIVE   0x01	/* channel is active */
     65  1.2.2.1  bouyer #define WDCF_IRQ_WAIT 0x10	/* controller is waiting for irq */
     66  1.2.2.1  bouyer 	u_int8_t ch_status;         /* copy of status register */
     67  1.2.2.1  bouyer 	u_int8_t ch_error;          /* copy of error register */
     68  1.2.2.1  bouyer 	/* per-drive infos */
     69  1.2.2.1  bouyer 	struct ata_drive_datas ch_drive[2];
     70      1.1     cgd 
     71  1.2.2.1  bouyer 	/*
     72  1.2.2.1  bouyer 	 * channel queues. May be the same for all channels, if hw channels
     73  1.2.2.1  bouyer 	 * are not independants
     74  1.2.2.1  bouyer 	 */
     75  1.2.2.1  bouyer 	struct channel_queue *ch_queue;
     76      1.1     cgd };
     77      1.1     cgd 
     78  1.2.2.1  bouyer struct wdc_softc { /* Per controller state */
     79  1.2.2.1  bouyer 	struct device sc_dev;
     80  1.2.2.4     leo 	/* mandatory fields */
     81  1.2.2.1  bouyer 	int           cap;
     82      1.1     cgd /* Capabilities supported by the controller */
     83  1.2.2.1  bouyer #define	WDC_CAPABILITY_DATA32 0x01     /* 32-bit data access */
     84  1.2.2.3  bouyer #define WDC_CAPABILITY_PIO    0x02	/* controller knows its PIO modes */
     85  1.2.2.3  bouyer #define	WDC_CAPABILITY_DMA    0x04	/* DMA */
     86  1.2.2.3  bouyer #define	WDC_CAPABILITY_UDMA   0x08	/* Ultra-DMA/33 */
     87  1.2.2.3  bouyer #define	WDC_CAPABILITY_HWLOCK 0x10	/* Needs to lock HW */
     88  1.2.2.5     leo #define	WDC_CAPABILITY_ATA_NOSTREAM 0x20 /* Don't use stream funcs on ATA */
     89  1.2.2.5     leo #define	WDC_CAPABILITY_ATAPI_NOSTREAM 0x40 /* Don't use stream funcs on ATAPI */
     90  1.2.2.8  bouyer #define WDC_CAPABILITY_NO_EXTRA_RESETS 0x80 /* only reset once */
     91  1.2.2.4     leo 	u_int8_t      pio_mode; /* highest PIO mode supported */
     92  1.2.2.4     leo 	u_int8_t      dma_mode; /* highest DMA mode supported */
     93  1.2.2.1  bouyer 	int nchannels;	/* Number of channels on this controller */
     94  1.2.2.1  bouyer 	struct channel_softc *channels;  /* channels-specific datas (array) */
     95      1.1     cgd 
     96  1.2.2.1  bouyer 	/* if WDC_CAPABILITY_DMA set in 'cap' */
     97  1.2.2.1  bouyer 	void            *dma_arg;
     98  1.2.2.1  bouyer 	int            (*dma_init) __P((void *, int, int, void *, size_t,
     99  1.2.2.1  bouyer 	                int));
    100  1.2.2.1  bouyer 	void           (*dma_start) __P((void *, int, int, int));
    101  1.2.2.1  bouyer 	int            (*dma_finish) __P((void *, int, int, int));
    102  1.2.2.9  bouyer /* flags passed to DMA functions */
    103  1.2.2.9  bouyer #define WDC_DMA_READ 0x01
    104  1.2.2.9  bouyer #define WDC_DMA_POLL 0x02
    105      1.1     cgd 
    106  1.2.2.1  bouyer 	/* if WDC_CAPABILITY_HWLOCK set in 'cap' */
    107  1.2.2.1  bouyer 	int            (*claim_hw) __P((void *, int));
    108  1.2.2.1  bouyer 	void            (*free_hw) __P((void *));
    109      1.1     cgd };
    110      1.1     cgd 
    111  1.2.2.1  bouyer  /*
    112  1.2.2.1  bouyer   * Description of a command to be handled by a controller.
    113  1.2.2.1  bouyer   * These commands are queued in a list.
    114  1.2.2.1  bouyer   */
    115  1.2.2.1  bouyer struct wdc_xfer {
    116  1.2.2.1  bouyer 	volatile u_int c_flags;
    117  1.2.2.1  bouyer #define C_INUSE  	0x0001 /* xfer struct is in use */
    118  1.2.2.1  bouyer #define C_ATAPI  	0x0002 /* xfer is ATAPI request */
    119  1.2.2.1  bouyer #define C_TIMEOU  	0x0004 /* xfer processing timed out */
    120  1.2.2.1  bouyer #define C_NEEDDONE  	0x0010 /* need to call upper-level done */
    121  1.2.2.6  bouyer #define C_POLL		0x0020 /* cmd is polled */
    122  1.2.2.1  bouyer 
    123  1.2.2.1  bouyer 	/* Information about our location */
    124  1.2.2.1  bouyer 	u_int8_t drive;
    125  1.2.2.1  bouyer 	u_int8_t channel;
    126  1.2.2.1  bouyer 
    127  1.2.2.1  bouyer 	/* Information about the current transfer  */
    128  1.2.2.1  bouyer 	void *cmd; /* wdc, ata or scsipi command structure */
    129  1.2.2.1  bouyer 	void *databuf;
    130  1.2.2.1  bouyer 	int c_bcount;      /* byte count left */
    131  1.2.2.1  bouyer 	int c_skip;        /* bytes already transferred */
    132  1.2.2.1  bouyer 	TAILQ_ENTRY(wdc_xfer) c_xferchain;
    133  1.2.2.1  bouyer 	LIST_ENTRY(wdc_xfer) free_list;
    134  1.2.2.1  bouyer 	void (*c_start) __P((struct channel_softc *, struct wdc_xfer *));
    135  1.2.2.1  bouyer 	int  (*c_intr)  __P((struct channel_softc *, struct wdc_xfer *));
    136  1.2.2.1  bouyer };
    137  1.2.2.1  bouyer 
    138  1.2.2.1  bouyer /*
    139  1.2.2.1  bouyer  * Public functions which can be called by ATA or ATAPI specific parts,
    140  1.2.2.1  bouyer  * or bus-specific backends.
    141  1.2.2.1  bouyer  */
    142  1.2.2.1  bouyer 
    143  1.2.2.9  bouyer int   wdcprobe __P((struct channel_softc *));
    144  1.2.2.1  bouyer void  wdcattach __P((struct channel_softc *));
    145  1.2.2.1  bouyer int   wdcintr __P((void *));
    146  1.2.2.1  bouyer void  wdc_exec_xfer __P((struct channel_softc *, struct wdc_xfer *));
    147  1.2.2.1  bouyer struct wdc_xfer *wdc_get_xfer __P((int)); /* int = WDC_NOSLEEP/CANSLEEP */
    148  1.2.2.1  bouyer #define WDC_CANSLEEP 0x00
    149  1.2.2.1  bouyer #define WDC_NOSLEEP 0x01
    150  1.2.2.1  bouyer void   wdc_free_xfer  __P((struct channel_softc *, struct wdc_xfer *));
    151  1.2.2.1  bouyer void  wdcstart __P((struct wdc_softc *, int));
    152  1.2.2.2  bouyer void  wdcrestart __P((void*));
    153  1.2.2.1  bouyer int   wdcreset	__P((struct channel_softc *, int));
    154  1.2.2.1  bouyer #define VERBOSE 1
    155  1.2.2.1  bouyer #define SILENT 0 /* wdcreset will not print errors */
    156  1.2.2.6  bouyer int   wdcwait __P((struct channel_softc *, int, int, int));
    157  1.2.2.1  bouyer void  wdcbit_bucket __P(( struct channel_softc *, int));
    158  1.2.2.1  bouyer void  wdccommand __P((struct channel_softc *, u_int8_t, u_int8_t, u_int16_t,
    159  1.2.2.1  bouyer 	                  u_int8_t, u_int8_t, u_int8_t, u_int8_t));
    160  1.2.2.1  bouyer void   wdccommandshort __P((struct channel_softc *, int, int));
    161  1.2.2.1  bouyer void  wdctimeout	__P((void *arg));
    162  1.2.2.1  bouyer 
    163  1.2.2.1  bouyer /*
    164  1.2.2.1  bouyer  * ST506 spec says that if READY or SEEKCMPLT go off, then the read or write
    165  1.2.2.1  bouyer  * command is aborted.
    166  1.2.2.1  bouyer  */
    167  1.2.2.6  bouyer #define wait_for_drq(chp, timeout) wdcwait((chp), \
    168  1.2.2.6  bouyer 	WDCS_DRDY | WDCS_DSC | WDCS_DRQ, \
    169  1.2.2.6  bouyer 	WDCS_DRDY | WDCS_DSC | WDCS_DRQ, (timeout))
    170  1.2.2.6  bouyer #define wait_for_unbusy(chp, timeout)	wdcwait((chp), 0, 0, (timeout))
    171  1.2.2.6  bouyer #define wait_for_ready(chp, timeout) wdcwait((chp), WDCS_DRDY | WDCS_DSC, \
    172  1.2.2.6  bouyer 	WDCS_DRDY | WDCS_DSC, (timeout))
    173  1.2.2.6  bouyer /* ATA/ATAPI specs says a device can take 31s to reset */
    174  1.2.2.6  bouyer #define WDC_RESET_WAIT 31000
    175  1.2.2.1  bouyer 
    176  1.2.2.1  bouyer void wdc_atapibus_attach __P((struct channel_softc *));
    177  1.2.2.9  bouyer int   atapi_print       __P((void *, const char *));
    178