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wdcvar.h revision 1.82.2.1
      1  1.82.2.1      tron /*	$NetBSD: wdcvar.h,v 1.82.2.1 2005/08/18 20:02:40 tron Exp $	*/
      2       1.1       cgd 
      3       1.3   mycroft /*-
      4      1.82   mycroft  * Copyright (c) 1998, 2003, 2004 The NetBSD Foundation, Inc.
      5       1.3   mycroft  * All rights reserved.
      6       1.1       cgd  *
      7       1.3   mycroft  * This code is derived from software contributed to The NetBSD Foundation
      8       1.3   mycroft  * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
      9       1.1       cgd  *
     10       1.1       cgd  * Redistribution and use in source and binary forms, with or without
     11       1.1       cgd  * modification, are permitted provided that the following conditions
     12       1.1       cgd  * are met:
     13       1.1       cgd  * 1. Redistributions of source code must retain the above copyright
     14       1.6    bouyer  *	notice, this list of conditions and the following disclaimer.
     15       1.1       cgd  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.6    bouyer  *	notice, this list of conditions and the following disclaimer in the
     17       1.6    bouyer  *	documentation and/or other materials provided with the distribution.
     18       1.1       cgd  * 3. All advertising materials mentioning features or use of this software
     19       1.1       cgd  *    must display the following acknowledgement:
     20       1.3   mycroft  *        This product includes software developed by the NetBSD
     21       1.3   mycroft  *        Foundation, Inc. and its contributors.
     22       1.3   mycroft  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.3   mycroft  *    contributors may be used to endorse or promote products derived
     24       1.3   mycroft  *    from this software without specific prior written permission.
     25       1.1       cgd  *
     26       1.3   mycroft  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.3   mycroft  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.3   mycroft  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.3   mycroft  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.3   mycroft  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.3   mycroft  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.3   mycroft  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.3   mycroft  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.3   mycroft  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.3   mycroft  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.3   mycroft  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1       cgd  */
     38       1.1       cgd 
     39      1.50   thorpej #ifndef _DEV_IC_WDCVAR_H_
     40      1.50   thorpej #define	_DEV_IC_WDCVAR_H_
     41      1.50   thorpej 
     42      1.57   thorpej #include <sys/callout.h>
     43      1.57   thorpej 
     44      1.57   thorpej #include <dev/ic/wdcreg.h>
     45      1.22   thorpej 
     46       1.6    bouyer #define	WAITTIME    (10 * hz)    /* time to wait for a completion */
     47       1.6    bouyer 	/* this is a lot for hard drives, but not for cdroms */
     48       1.5      mark 
     49      1.45    bouyer #define WDC_NREG	8 /* number of command registers */
     50      1.57   thorpej #define	WDC_NSHADOWREG	2 /* number of command "shadow" registers */
     51       1.6    bouyer 
     52      1.75   thorpej struct wdc_regs {
     53       1.6    bouyer 	/* Our registers */
     54       1.6    bouyer 	bus_space_tag_t       cmd_iot;
     55      1.44      fvdl 	bus_space_handle_t    cmd_baseioh;
     56      1.57   thorpej 	bus_space_handle_t    cmd_iohs[WDC_NREG+WDC_NSHADOWREG];
     57       1.6    bouyer 	bus_space_tag_t       ctl_iot;
     58       1.6    bouyer 	bus_space_handle_t    ctl_ioh;
     59      1.75   thorpej 
     60      1.75   thorpej 	/* data32{iot,ioh} are only used for 32-bit data xfers */
     61      1.63   mycroft 	bus_space_tag_t       data32iot;
     62      1.63   mycroft 	bus_space_handle_t    data32ioh;
     63      1.41    bouyer };
     64      1.41    bouyer 
     65      1.53   thorpej /*
     66      1.53   thorpej  * Per-controller data
     67      1.53   thorpej  */
     68      1.53   thorpej struct wdc_softc {
     69      1.77   thorpej 	struct atac_softc sc_atac;	/* generic ATA controller info */
     70      1.53   thorpej 
     71      1.75   thorpej 	struct wdc_regs *regs;		/* register array (per-channel) */
     72      1.75   thorpej 
     73      1.53   thorpej 	int           cap;		/* controller capabilities */
     74       1.6    bouyer #define WDC_CAPABILITY_NO_EXTRA_RESETS 0x0100 /* only reset once */
     75      1.63   mycroft #define WDC_CAPABILITY_PREATA	0x0200	/* ctrl can be a pre-ata one */
     76      1.80  rearnsha #define WDC_CAPABILITY_WIDEREGS 0x0400  /* Ctrl has wide (16bit) registers  */
     77      1.48   thorpej 
     78       1.1       cgd 	/* if WDC_CAPABILITY_DMA set in 'cap' */
     79       1.6    bouyer 	void            *dma_arg;
     80      1.50   thorpej 	int            (*dma_init)(void *, int, int, void *, size_t, int);
     81      1.50   thorpej 	void           (*dma_start)(void *, int, int);
     82      1.50   thorpej 	int            (*dma_finish)(void *, int, int, int);
     83      1.24    bouyer /* flags passed to dma_init */
     84      1.36  nakayama #define WDC_DMA_READ	0x01
     85      1.36  nakayama #define WDC_DMA_IRQW	0x02
     86      1.36  nakayama #define WDC_DMA_LBA48	0x04
     87      1.50   thorpej 
     88      1.60    bouyer /* values passed to dma_finish */
     89      1.60    bouyer #define WDC_DMAEND_END	0	/* check for proper end of a DMA xfer */
     90      1.60    bouyer #define WDC_DMAEND_ABRT 1	/* abort a DMA xfer, verbose */
     91      1.60    bouyer #define WDC_DMAEND_ABRT_QUIET 2	/* abort a DMA xfer, quiet */
     92      1.60    bouyer 
     93      1.24    bouyer 	int		dma_status; /* status returned from dma_finish() */
     94      1.24    bouyer #define WDC_DMAST_NOIRQ	0x01	/* missing IRQ */
     95      1.24    bouyer #define WDC_DMAST_ERR	0x02	/* DMA error */
     96      1.24    bouyer #define WDC_DMAST_UNDER	0x04	/* DMA underrun */
     97       1.2       leo 
     98      1.74   thorpej 	/* Optional callback to select drive. */
     99      1.75   thorpej 	void		(*select)(struct ata_channel *,int);
    100      1.25    bouyer 
    101      1.74   thorpej 	/* Optional callback to ack IRQ. */
    102      1.75   thorpej 	void		(*irqack)(struct ata_channel *);
    103      1.64   mycroft 
    104  1.82.2.1      tron 	/* Optional callback to perform a bus reset */
    105  1.82.2.1      tron 	void		(*reset)(struct ata_channel *, int);
    106  1.82.2.1      tron 
    107      1.64   mycroft 	/* overridden if the backend has a different data transfer method */
    108      1.75   thorpej 	void	(*datain_pio)(struct ata_channel *, int, void *, size_t);
    109      1.75   thorpej 	void	(*dataout_pio)(struct ata_channel *, int, void *, size_t);
    110       1.1       cgd };
    111       1.1       cgd 
    112      1.76   thorpej /* Given an ata_channel, get the wdc_softc. */
    113      1.77   thorpej #define	CHAN_TO_WDC(chp)	((struct wdc_softc *)(chp)->ch_atac)
    114      1.76   thorpej 
    115      1.76   thorpej /* Given an ata_channel, get the wdc_regs. */
    116      1.76   thorpej #define	CHAN_TO_WDC_REGS(chp)	(&CHAN_TO_WDC(chp)->regs[(chp)->ch_channel])
    117      1.76   thorpej 
    118       1.6    bouyer /*
    119       1.6    bouyer  * Public functions which can be called by ATA or ATAPI specific parts,
    120       1.6    bouyer  * or bus-specific backends.
    121       1.6    bouyer  */
    122       1.1       cgd 
    123      1.75   thorpej void	wdc_allocate_regs(struct wdc_softc *);
    124      1.75   thorpej void	wdc_init_shadow_regs(struct ata_channel *);
    125      1.57   thorpej 
    126      1.75   thorpej int	wdcprobe(struct ata_channel *);
    127      1.75   thorpej void	wdcattach(struct ata_channel *);
    128      1.50   thorpej int	wdcdetach(struct device *, int);
    129      1.50   thorpej int	wdcactivate(struct device *, enum devact);
    130      1.50   thorpej int	wdcintr(void *);
    131      1.50   thorpej 
    132      1.50   thorpej void	wdcrestart(void*);
    133      1.50   thorpej 
    134      1.75   thorpej int	wdcwait(struct ata_channel *, int, int, int, int);
    135      1.41    bouyer #define WDCWAIT_OK	0  /* we have what we asked */
    136      1.41    bouyer #define WDCWAIT_TOUT	-1 /* timed out */
    137      1.41    bouyer #define WDCWAIT_THR	1  /* return, the kernel thread has been awakened */
    138      1.50   thorpej 
    139      1.75   thorpej void	wdcbit_bucket(struct ata_channel *, int);
    140      1.63   mycroft 
    141      1.75   thorpej int	wdc_dmawait(struct ata_channel *, struct ata_xfer *, int);
    142      1.75   thorpej void	wdccommand(struct ata_channel *, u_int8_t, u_int8_t, u_int16_t,
    143      1.50   thorpej 		   u_int8_t, u_int8_t, u_int8_t, u_int8_t);
    144      1.75   thorpej void	wdccommandext(struct ata_channel *, u_int8_t, u_int8_t, u_int64_t,
    145      1.50   thorpej 		      u_int16_t);
    146      1.75   thorpej void	wdccommandshort(struct ata_channel *, int, int);
    147      1.50   thorpej void	wdctimeout(void *arg);
    148      1.58    bouyer void	wdc_reset_drive(struct ata_drive_datas *, int);
    149      1.75   thorpej void	wdc_reset_channel(struct ata_channel *, int);
    150  1.82.2.1      tron void	wdc_do_reset(struct ata_channel *, int);
    151      1.50   thorpej 
    152      1.65   thorpej int	wdc_exec_command(struct ata_drive_datas *, struct ata_command*);
    153       1.9   thorpej 
    154      1.81     perry /*
    155       1.6    bouyer  * ST506 spec says that if READY or SEEKCMPLT go off, then the read or write
    156       1.6    bouyer  * command is aborted.
    157      1.81     perry  */
    158      1.51   thorpej #define wdc_wait_for_drq(chp, timeout, flags) \
    159      1.41    bouyer 		wdcwait((chp), WDCS_DRQ, WDCS_DRQ, (timeout), (flags))
    160      1.51   thorpej #define wdc_wait_for_unbusy(chp, timeout, flags) \
    161      1.41    bouyer 		wdcwait((chp), 0, 0, (timeout), (flags))
    162      1.51   thorpej #define wdc_wait_for_ready(chp, timeout, flags) \
    163      1.41    bouyer 		wdcwait((chp), WDCS_DRDY, WDCS_DRDY, (timeout), (flags))
    164      1.50   thorpej 
    165       1.6    bouyer /* ATA/ATAPI specs says a device can take 31s to reset */
    166       1.6    bouyer #define WDC_RESET_WAIT 31000
    167       1.1       cgd 
    168      1.50   thorpej void	wdc_atapibus_attach(struct atabus_softc *);
    169      1.47   thorpej 
    170      1.50   thorpej #endif /* _DEV_IC_WDCVAR_H_ */
    171