wdcvar.h revision 1.19.2.2
1 /* $NetBSD: wdcvar.h,v 1.19.2.2 1999/10/20 22:33:28 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * XXX For scsipi_adapter and scsipi_channel. 41 */ 42 #include <dev/scsipi/scsipi_all.h> 43 #include <dev/scsipi/scsipiconf.h> 44 45 #define WAITTIME (10 * hz) /* time to wait for a completion */ 46 /* this is a lot for hard drives, but not for cdroms */ 47 48 struct channel_queue { /* per channel queue (may be shared) */ 49 TAILQ_HEAD(xferhead, wdc_xfer) sc_xfer; 50 }; 51 52 struct channel_softc { /* Per channel data */ 53 /* Our location */ 54 int channel; 55 /* Our controller's softc */ 56 struct wdc_softc *wdc; 57 /* Our registers */ 58 bus_space_tag_t cmd_iot; 59 bus_space_handle_t cmd_ioh; 60 bus_space_tag_t ctl_iot; 61 bus_space_handle_t ctl_ioh; 62 /* data32{iot,ioh} are only used for 32 bit xfers */ 63 bus_space_tag_t data32iot; 64 bus_space_handle_t data32ioh; 65 /* Our state */ 66 int ch_flags; 67 #define WDCF_ACTIVE 0x01 /* channel is active */ 68 #define WDCF_IRQ_WAIT 0x10 /* controller is waiting for irq */ 69 u_int8_t ch_status; /* copy of status register */ 70 u_int8_t ch_error; /* copy of error register */ 71 /* per-drive infos */ 72 struct ata_drive_datas ch_drive[2]; 73 74 struct device *atapibus; 75 struct scsipi_channel ch_atapi_channel; 76 77 /* 78 * channel queues. May be the same for all channels, if hw channels 79 * are not independants 80 */ 81 struct channel_queue *ch_queue; 82 }; 83 84 struct wdc_softc { /* Per controller state */ 85 struct device sc_dev; 86 /* mandatory fields */ 87 int cap; 88 /* Capabilities supported by the controller */ 89 #define WDC_CAPABILITY_DATA16 0x0001 /* can do 16-bit data access */ 90 #define WDC_CAPABILITY_DATA32 0x0002 /* can do 32-bit data access */ 91 #define WDC_CAPABILITY_MODE 0x0004 /* controller knows its PIO/DMA modes */ 92 #define WDC_CAPABILITY_DMA 0x0008 /* DMA */ 93 #define WDC_CAPABILITY_UDMA 0x0010 /* Ultra-DMA/33 */ 94 #define WDC_CAPABILITY_HWLOCK 0x0020 /* Needs to lock HW */ 95 #define WDC_CAPABILITY_ATA_NOSTREAM 0x0040 /* Don't use stream funcs on ATA */ 96 #define WDC_CAPABILITY_ATAPI_NOSTREAM 0x0080 /* Don't use stream f on ATAPI */ 97 #define WDC_CAPABILITY_NO_EXTRA_RESETS 0x0100 /* only reset once */ 98 #define WDC_CAPABILITY_PREATA 0x0200 /* ctrl can be a pre-ata one */ 99 u_int8_t PIO_cap; /* highest PIO mode supported */ 100 u_int8_t DMA_cap; /* highest DMA mode supported */ 101 u_int8_t UDMA_cap; /* highest UDMA mode supported */ 102 int nchannels; /* Number of channels on this controller */ 103 struct channel_softc **channels; /* channels-specific datas (array) */ 104 105 /* 106 * The reference count here is used for both IDE and ATAPI devices. 107 */ 108 struct scsipi_adapter sc_atapi_adapter; 109 int sc_dying; 110 111 /* if WDC_CAPABILITY_DMA set in 'cap' */ 112 void *dma_arg; 113 int (*dma_init) __P((void *, int, int, void *, size_t, 114 int)); 115 void (*dma_start) __P((void *, int, int, int)); 116 int (*dma_finish) __P((void *, int, int, int)); 117 /* flags passed to DMA functions */ 118 #define WDC_DMA_READ 0x01 119 #define WDC_DMA_POLL 0x02 120 121 /* if WDC_CAPABILITY_HWLOCK set in 'cap' */ 122 int (*claim_hw) __P((void *, int)); 123 void (*free_hw) __P((void *)); 124 125 /* if WDC_CAPABILITY_MODE set in 'cap' */ 126 void (*set_modes) __P((struct channel_softc *)); 127 }; 128 129 /* 130 * Description of a command to be handled by a controller. 131 * These commands are queued in a list. 132 */ 133 struct wdc_xfer { 134 volatile u_int c_flags; 135 #define C_ATAPI 0x0001 /* xfer is ATAPI request */ 136 #define C_TIMEOU 0x0002 /* xfer processing timed out */ 137 #define C_POLL 0x0004 /* cmd is polled */ 138 #define C_DMA 0x0008 /* cmd uses DMA */ 139 #define C_SENSE 0x0010 /* cmd is a internal command */ 140 141 /* Informations about our location */ 142 struct channel_softc *chp; 143 u_int8_t drive; 144 145 /* Information about the current transfer */ 146 void *cmd; /* wdc, ata or scsipi command structure */ 147 void *databuf; 148 int c_bcount; /* byte count left */ 149 int c_skip; /* bytes already transferred */ 150 TAILQ_ENTRY(wdc_xfer) c_xferchain; 151 void (*c_start) __P((struct channel_softc *, struct wdc_xfer *)); 152 int (*c_intr) __P((struct channel_softc *, struct wdc_xfer *, int)); 153 void (*c_kill_xfer) __P((struct channel_softc *, struct wdc_xfer *)); 154 }; 155 156 /* 157 * Public functions which can be called by ATA or ATAPI specific parts, 158 * or bus-specific backends. 159 */ 160 161 int wdcprobe __P((struct channel_softc *)); 162 void wdcattach __P((struct channel_softc *)); 163 int wdcdetach __P((struct device *, int)); 164 int wdcactivate __P((struct device *, enum devact)); 165 int wdcintr __P((void *)); 166 void wdc_exec_xfer __P((struct channel_softc *, struct wdc_xfer *)); 167 struct wdc_xfer *wdc_get_xfer __P((int)); /* int = WDC_NOSLEEP/CANSLEEP */ 168 #define WDC_CANSLEEP 0x00 169 #define WDC_NOSLEEP 0x01 170 void wdc_free_xfer __P((struct channel_softc *, struct wdc_xfer *)); 171 void wdcstart __P((struct channel_softc *)); 172 void wdcrestart __P((void*)); 173 int wdcreset __P((struct channel_softc *, int)); 174 #define VERBOSE 1 175 #define SILENT 0 /* wdcreset will not print errors */ 176 int wdcwait __P((struct channel_softc *, int, int, int)); 177 void wdcbit_bucket __P(( struct channel_softc *, int)); 178 void wdccommand __P((struct channel_softc *, u_int8_t, u_int8_t, u_int16_t, 179 u_int8_t, u_int8_t, u_int8_t, u_int8_t)); 180 void wdccommandshort __P((struct channel_softc *, int, int)); 181 void wdctimeout __P((void *arg)); 182 183 int wdc_addref __P((struct channel_softc *)); 184 void wdc_delref __P((struct channel_softc *)); 185 void wdc_kill_pending __P((struct channel_softc *)); 186 187 /* 188 * ST506 spec says that if READY or SEEKCMPLT go off, then the read or write 189 * command is aborted. 190 */ 191 #define wait_for_drq(chp, timeout) wdcwait((chp), WDCS_DRQ, WDCS_DRQ, (timeout)) 192 #define wait_for_unbusy(chp, timeout) wdcwait((chp), 0, 0, (timeout)) 193 #define wait_for_ready(chp, timeout) wdcwait((chp), WDCS_DRDY, \ 194 WDCS_DRDY, (timeout)) 195 /* ATA/ATAPI specs says a device can take 31s to reset */ 196 #define WDC_RESET_WAIT 31000 197 198 void wdc_atapibus_attach __P((struct channel_softc *)); 199 int atapi_print __P((void *, const char *)); 200
Indexes created Sun Oct 19 02:09:48 GMT 2025