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wdcvar.h revision 1.2 
      1 /*	$NetBSD: wdcvar.h,v 1.2 1998/04/07 19:51:58 leo Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1994, 1995 Charles M. Hannum.  All rights reserved.
      5  *
      6  * DMA and multi-sector PIO handling are derived from code contributed by
      7  * Onno van der Linden.
      8  *
      9  * Atapi support added by Manuel Bouyer.
     10  *
     11  * bus_space-ified by Christopher G. Demetriou.
     12  *
     13  * Redistribution and use in source and binary forms, with or without
     14  * modification, are permitted provided that the following conditions
     15  * are met:
     16  * 1. Redistributions of source code must retain the above copyright
     17  *    notice, this list of conditions and the following disclaimer.
     18  * 2. Redistributions in binary form must reproduce the above copyright
     19  *    notice, this list of conditions and the following disclaimer in the
     20  *    documentation and/or other materials provided with the distribution.
     21  * 3. All advertising materials mentioning features or use of this software
     22  *    must display the following acknowledgement:
     23  *  This product includes software developed by Charles M. Hannum.
     24  * 4. The name of the author may not be used to endorse or promote products
     25  *    derived from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     28  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     29  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     30  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     31  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     32  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     33  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     34  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     35  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     36  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 struct wdc_attachment_data {
     40 	/* manadatory fields */
     41 	int			cap;
     42 	bus_space_tag_t		iot;
     43 	bus_space_handle_t	ioh;
     44 	bus_space_tag_t		auxiot;
     45 	bus_space_handle_t	auxioh;
     46 	/*
     47 	 * XXX data access (normal and 32-bit) may need to be
     48 	 * done via a separate iot/ioh on some systems.  Let's
     49 	 * wait and see if that's the case before implementing
     50 	 * it.
     51 	 */
     52 
     53 	/* if WDC_CAPABILITY_DMA set in 'cap' */
     54 	void			*dma_arg;
     55 	void			(*dma_setup) __P((void *));
     56 	void			(*dma_start) __P((void *, void *, size_t,
     57 				    int));
     58 	void			(*dma_finish) __P((void *));
     59 
     60 	/* if WDC_CAPABILITY_HWLOCK set in 'cap' */
     61 	int			(*claim_hw) __P((void *, int));
     62 	void			(*free_hw) __P((void *));
     63 };
     64 
     65 /* Capabilities supported by the controller */
     66 #define	WDC_CAPABILITY_DATA32	0x01		/* 32-bit data access */
     67 #define	WDC_CAPABILITY_DMA	0x02		/* DMA */
     68 #define	WDC_CAPABILITY_HWLOCK	0x04		/* Needs to lock HW */
     69 
     70 struct wdc_softc {
     71 	struct device sc_dev;
     72 	const struct wdc_attachment_data *sc_adp;
     73 
     74 	struct wd_link *d_link[2];
     75 	struct scsipi_link *ab_link;
     76 
     77 	TAILQ_HEAD(xferhead, wdc_xfer) sc_xfer;
     78 	int sc_flags;
     79 #define	WDCF_ACTIVE		0x01	/* controller is active */
     80 #define	WDCF_SINGLE		0x02	/* sector at a time mode */
     81 #define	WDCF_ERROR		0x04	/* processing a disk error */
     82 #define	WDCF_WANTED		0x08	/* XXX locking for wd_get_parms() */
     83 #define	WDCF_IRQ_WAIT		0x10	/* controller is waiting for irq */
     84 #define	WDCF_ONESLAVE		0x20	/* ctrl. has one ATAPI slave attached */
     85 	int sc_errors;			/* errors during current transfer */
     86 	u_char sc_status;		/* copy of status register */
     87 	u_char sc_error;		/* copy of error register */
     88 	u_char sc_drives_mask;	/* bitmask for drives present/absent */
     89 };
     90 
     91 #define	sc_cap		sc_adp->cap
     92 #define	sc_iot		sc_adp->iot
     93 #define	sc_ioh		sc_adp->ioh
     94 #define	sc_auxiot	sc_adp->auxiot
     95 #define	sc_auxioh	sc_adp->auxioh
     96 #define	sc_dma_arg	sc_adp->dma_arg
     97 #define	sc_dma_setup	sc_adp->dma_setup
     98 #define	sc_dma_start	sc_adp->dma_start
     99 #define	sc_dma_finish	sc_adp->dma_finish
    100 #define	sc_claim_hw	sc_adp->claim_hw
    101 #define	sc_free_hw	sc_adp->free_hw
    102 
    103 void	wdcattach(struct wdc_softc *, const struct wdc_attachment_data *);
    104 int	wdcintr(void *);
    105 int	wdcprobe(const struct wdc_attachment_data *);
    106