wdcvar.h revision 1.76
1 /* $NetBSD: wdcvar.h,v 1.76 2004/08/19 23:25:35 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _DEV_IC_WDCVAR_H_ 40 #define _DEV_IC_WDCVAR_H_ 41 42 #include <sys/callout.h> 43 44 #include <dev/ic/wdcreg.h> 45 46 #define WAITTIME (10 * hz) /* time to wait for a completion */ 47 /* this is a lot for hard drives, but not for cdroms */ 48 49 #define WDC_NREG 8 /* number of command registers */ 50 #define WDC_NSHADOWREG 2 /* number of command "shadow" registers */ 51 52 struct wdc_regs { 53 /* Our registers */ 54 bus_space_tag_t cmd_iot; 55 bus_space_handle_t cmd_baseioh; 56 bus_space_handle_t cmd_iohs[WDC_NREG+WDC_NSHADOWREG]; 57 bus_space_tag_t ctl_iot; 58 bus_space_handle_t ctl_ioh; 59 60 /* data32{iot,ioh} are only used for 32-bit data xfers */ 61 bus_space_tag_t data32iot; 62 bus_space_handle_t data32ioh; 63 }; 64 65 /* 66 * Per-controller data 67 */ 68 struct wdc_softc { 69 struct device sc_dev; /* generic device info */ 70 71 struct wdc_regs *regs; /* register array (per-channel) */ 72 73 int cap; /* controller capabilities */ 74 #define WDC_CAPABILITY_DATA16 0x0001 /* can do 16-bit data access */ 75 #define WDC_CAPABILITY_DATA32 0x0002 /* can do 32-bit data access */ 76 #define WDC_CAPABILITY_DMA 0x0008 /* DMA */ 77 #define WDC_CAPABILITY_UDMA 0x0010 /* Ultra-DMA/33 */ 78 #define WDC_CAPABILITY_ATA_NOSTREAM 0x0040 /* Don't use stream funcs on ATA */ 79 #define WDC_CAPABILITY_ATAPI_NOSTREAM 0x0080 /* Don't use stream f on ATAPI */ 80 #define WDC_CAPABILITY_NO_EXTRA_RESETS 0x0100 /* only reset once */ 81 #define WDC_CAPABILITY_PREATA 0x0200 /* ctrl can be a pre-ata one */ 82 #define WDC_CAPABILITY_NOIRQ 0x1000 /* Controller never interrupts */ 83 #define WDC_CAPABILITY_RAID 0x4000 /* Controller "supports" RAID */ 84 u_int8_t PIO_cap; /* highest PIO mode supported */ 85 u_int8_t DMA_cap; /* highest DMA mode supported */ 86 u_int8_t UDMA_cap; /* highest UDMA mode supported */ 87 int nchannels; /* # channels on this controller */ 88 struct ata_channel **channels; /* channel-specific data (array) */ 89 90 /* 91 * The reference count here is used for both IDE and ATAPI devices. 92 */ 93 struct atapi_adapter sc_atapi_adapter; 94 95 /* Function used to probe for drives. */ 96 void (*drv_probe)(struct ata_channel *); 97 98 /* if WDC_CAPABILITY_DMA set in 'cap' */ 99 void *dma_arg; 100 int (*dma_init)(void *, int, int, void *, size_t, int); 101 void (*dma_start)(void *, int, int); 102 int (*dma_finish)(void *, int, int, int); 103 /* flags passed to dma_init */ 104 #define WDC_DMA_READ 0x01 105 #define WDC_DMA_IRQW 0x02 106 #define WDC_DMA_LBA48 0x04 107 108 /* values passed to dma_finish */ 109 #define WDC_DMAEND_END 0 /* check for proper end of a DMA xfer */ 110 #define WDC_DMAEND_ABRT 1 /* abort a DMA xfer, verbose */ 111 #define WDC_DMAEND_ABRT_QUIET 2 /* abort a DMA xfer, quiet */ 112 113 int dma_status; /* status returned from dma_finish() */ 114 #define WDC_DMAST_NOIRQ 0x01 /* missing IRQ */ 115 #define WDC_DMAST_ERR 0x02 /* DMA error */ 116 #define WDC_DMAST_UNDER 0x04 /* DMA underrun */ 117 118 /* Optional callbacks to lock/unlock hardware. */ 119 int (*claim_hw)(void *, int); 120 void (*free_hw)(void *); 121 122 /* 123 * Optional callback to set drive mode. Required for anything 124 * but basic PIO operation. 125 */ 126 void (*set_modes)(struct ata_channel *); 127 128 /* Optional callback to select drive. */ 129 void (*select)(struct ata_channel *,int); 130 131 /* Optional callback to ack IRQ. */ 132 void (*irqack)(struct ata_channel *); 133 134 /* overridden if the backend has a different data transfer method */ 135 void (*datain_pio)(struct ata_channel *, int, void *, size_t); 136 void (*dataout_pio)(struct ata_channel *, int, void *, size_t); 137 }; 138 139 /* Given an ata_channel, get the wdc_softc. */ 140 #define CHAN_TO_WDC(chp) ((chp)->ch_wdc) 141 142 /* Given an ata_channel, get the wdc_regs. */ 143 #define CHAN_TO_WDC_REGS(chp) (&CHAN_TO_WDC(chp)->regs[(chp)->ch_channel]) 144 145 /* 146 * Public functions which can be called by ATA or ATAPI specific parts, 147 * or bus-specific backends. 148 */ 149 150 void wdc_allocate_regs(struct wdc_softc *); 151 void wdc_init_shadow_regs(struct ata_channel *); 152 153 int wdcprobe(struct ata_channel *); 154 void wdcattach(struct ata_channel *); 155 int wdcdetach(struct device *, int); 156 int wdcactivate(struct device *, enum devact); 157 int wdcintr(void *); 158 159 void wdcrestart(void*); 160 161 int wdcreset(struct ata_channel *, int); 162 #define RESET_POLL 1 163 #define RESET_SLEEP 0 /* wdcreset will use tsleep() */ 164 165 int wdcwait(struct ata_channel *, int, int, int, int); 166 #define WDCWAIT_OK 0 /* we have what we asked */ 167 #define WDCWAIT_TOUT -1 /* timed out */ 168 #define WDCWAIT_THR 1 /* return, the kernel thread has been awakened */ 169 170 void wdc_datain_pio(struct ata_channel *, int, void *, size_t); 171 void wdc_dataout_pio(struct ata_channel *, int, void *, size_t); 172 void wdcbit_bucket(struct ata_channel *, int); 173 174 int wdc_dmawait(struct ata_channel *, struct ata_xfer *, int); 175 void wdccommand(struct ata_channel *, u_int8_t, u_int8_t, u_int16_t, 176 u_int8_t, u_int8_t, u_int8_t, u_int8_t); 177 void wdccommandext(struct ata_channel *, u_int8_t, u_int8_t, u_int64_t, 178 u_int16_t); 179 void wdccommandshort(struct ata_channel *, int, int); 180 void wdctimeout(void *arg); 181 void wdc_reset_drive(struct ata_drive_datas *, int); 182 void wdc_reset_channel(struct ata_channel *, int); 183 184 int wdc_exec_command(struct ata_drive_datas *, struct ata_command*); 185 186 /* 187 * ST506 spec says that if READY or SEEKCMPLT go off, then the read or write 188 * command is aborted. 189 */ 190 #define wdc_wait_for_drq(chp, timeout, flags) \ 191 wdcwait((chp), WDCS_DRQ, WDCS_DRQ, (timeout), (flags)) 192 #define wdc_wait_for_unbusy(chp, timeout, flags) \ 193 wdcwait((chp), 0, 0, (timeout), (flags)) 194 #define wdc_wait_for_ready(chp, timeout, flags) \ 195 wdcwait((chp), WDCS_DRDY, WDCS_DRDY, (timeout), (flags)) 196 197 /* ATA/ATAPI specs says a device can take 31s to reset */ 198 #define WDC_RESET_WAIT 31000 199 200 void wdc_atapibus_attach(struct atabus_softc *); 201 202 /* XXX */ 203 struct atabus_softc; 204 void atabusconfig(struct atabus_softc *); 205 206 #endif /* _DEV_IC_WDCVAR_H_ */ 207
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