wireg.h revision 1.39
1 /* $NetBSD: wireg.h,v 1.39 2002/09/23 14:31:28 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul (at) ctr.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * FreeBSD driver ported to NetBSD by Bill Sommerfeld in the back of the 37 * Oslo IETF plenary meeting. 38 */ 39 40 #define WI_TIMEOUT 65536 41 42 #define WI_PORT0 0 43 #define WI_PORT1 1 44 #define WI_PORT2 2 45 #define WI_PORT3 3 46 #define WI_PORT4 4 47 #define WI_PORT5 5 48 49 /* Default port: 0 (only 0 exists on stations) */ 50 #define WI_DEFAULT_PORT (WI_PORT0 << 8) 51 52 /* Default TX rate: 2Mbps, auto fallback */ 53 #define WI_DEFAULT_TX_RATE 3 54 55 /* Default network name: ANY */ 56 /* 57 * [sommerfeld 1999/07/15] Changed from "ANY" to ""; according to Bill Fenner, 58 * ANY is used in MS driver user interfaces, while "" is used over the 59 * wire.. 60 */ 61 #define WI_DEFAULT_NETNAME "" 62 63 #define WI_DEFAULT_AP_DENSITY 1 64 65 #define WI_DEFAULT_RTS_THRESH 2347 66 67 #define WI_DEFAULT_DATALEN 2304 68 69 #define WI_DEFAULT_CREATE_IBSS 0 70 71 #define WI_DEFAULT_PM_ENABLED 0 72 73 #define WI_DEFAULT_MAX_SLEEP 100 74 75 #define WI_DEFAULT_ROAMING 1 76 77 #define WI_DEFAULT_AUTHTYPE 1 78 79 #ifdef __NetBSD__ 80 #define OS_STRING_NAME "NetBSD" 81 #endif 82 #ifdef __FreeBSD__ 83 #define OS_STRING_NAME "FreeBSD" 84 #endif 85 #ifdef __OpenBSD__ 86 #define OS_STRING_NAME "OpenBSD" 87 #endif 88 89 #define WI_DEFAULT_NODENAME OS_STRING_NAME " WaveLAN/IEEE node" 90 91 #define WI_DEFAULT_IBSS OS_STRING_NAME " IBSS" 92 93 #define WI_DEFAULT_CHAN 3 94 95 /* 96 * register space access macros 97 */ 98 #ifdef WI_AT_BIGENDIAN_BUS_HACK 99 /* 100 * XXX - ugly hack for sparc bus_space_* macro deficiencies: 101 * assume the bus we are accessing is big endian. 102 */ 103 104 #define CSR_WRITE_4(sc, reg, val) \ 105 bus_space_write_4(sc->sc_iot, sc->sc_ioh, \ 106 (sc->sc_pci? reg * 2: reg) , htole32(val)) 107 #define CSR_WRITE_2(sc, reg, val) \ 108 bus_space_write_2(sc->sc_iot, sc->sc_ioh, \ 109 (sc->sc_pci? reg * 2: reg), htole16(val)) 110 #define CSR_WRITE_1(sc, reg, val) \ 111 bus_space_write_1(sc->sc_iot, sc->sc_ioh, \ 112 (sc->sc_pci? reg * 2: reg), val) 113 114 #define CSR_READ_4(sc, reg) \ 115 le32toh(bus_space_read_4(sc->sc_iot, sc->sc_ioh, \ 116 (sc->sc_pci? reg * 2: reg))) 117 #define CSR_READ_2(sc, reg) \ 118 le16toh(bus_space_read_2(sc->sc_iot, sc->sc_ioh, \ 119 (sc->sc_pci? reg * 2: reg))) 120 #define CSR_READ_1(sc, reg) \ 121 bus_space_read_1(sc->sc_iot, sc->sc_ioh, \ 122 (sc->sc_pci? reg * 2: reg)) 123 124 #else 125 126 #define CSR_WRITE_4(sc, reg, val) \ 127 bus_space_write_4(sc->sc_iot, sc->sc_ioh, \ 128 (sc->sc_pci? reg * 2: reg) , val) 129 #define CSR_WRITE_2(sc, reg, val) \ 130 bus_space_write_2(sc->sc_iot, sc->sc_ioh, \ 131 (sc->sc_pci? reg * 2: reg), val) 132 #define CSR_WRITE_1(sc, reg, val) \ 133 bus_space_write_1(sc->sc_iot, sc->sc_ioh, \ 134 (sc->sc_pci? reg * 2: reg), val) 135 136 #define CSR_READ_4(sc, reg) \ 137 bus_space_read_4(sc->sc_iot, sc->sc_ioh, \ 138 (sc->sc_pci? reg * 2: reg)) 139 #define CSR_READ_2(sc, reg) \ 140 bus_space_read_2(sc->sc_iot, sc->sc_ioh, \ 141 (sc->sc_pci? reg * 2: reg)) 142 #define CSR_READ_1(sc, reg) \ 143 bus_space_read_1(sc->sc_iot, sc->sc_ioh, \ 144 (sc->sc_pci? reg * 2: reg)) 145 #endif 146 147 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 148 #define bus_space_write_stream_2 bus_space_write_2 149 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 150 #define bus_space_read_stream_2 bus_space_read_2 151 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 152 #endif 153 154 #define CSR_WRITE_STREAM_2(sc, reg, val) \ 155 bus_space_write_stream_2(sc->sc_iot, sc->sc_ioh, \ 156 (sc->sc_pci? reg * 2: reg), val) 157 #define CSR_WRITE_MULTI_STREAM_2(sc, reg, val, count) \ 158 bus_space_write_multi_stream_2(sc->sc_iot, sc->sc_ioh, \ 159 (sc->sc_pci? reg * 2: reg), val, count) 160 #define CSR_READ_STREAM_2(sc, reg) \ 161 bus_space_read_stream_2(sc->sc_iot, sc->sc_ioh, \ 162 (sc->sc_pci? reg * 2: reg)) 163 #define CSR_READ_MULTI_STREAM_2(sc, reg, buf, count) \ 164 bus_space_read_multi_stream_2(sc->sc_iot, sc->sc_ioh, \ 165 (sc->sc_pci? reg * 2: reg), buf, count) 166 167 /* 168 * The WaveLAN/IEEE cards contain an 802.11 MAC controller which Lucent 169 * calls 'Hermes.' In typical fashion, getting documentation about this 170 * controller is about as easy as squeezing blood from a stone. Here 171 * is more or less what I know: 172 * 173 * - The Hermes controller is firmware driven, and the host interacts 174 * with the Hermes via a firmware interface, which can change. 175 * 176 * - The Hermes is described in a document called: "Hermes Firmware 177 * WaveLAN/IEEE Station Functions," document #010245, which of course 178 * Lucent will not release without an NDA. 179 * 180 * - Lucent has created a library called HCF (Hardware Control Functions) 181 * though which it wants developers to interact with the card. The HCF 182 * is needlessly complex, ill conceived and badly documented. Actually, 183 * the comments in the HCP code itself aren't bad, but the publically 184 * available manual that comes with it is awful, probably due largely to 185 * the fact that it has been emasculated in order to hide information 186 * that Lucent wants to keep proprietary. The purpose of the HCF seems 187 * to be to insulate the driver programmer from the Hermes itself so that 188 * Lucent has an excuse not to release programming in for it. 189 * 190 * - Lucent only makes available documentation and code for 'HCF Light' 191 * which is a stripped down version of HCF with certain features not 192 * implemented, most notably support for 802.11 frames. 193 * 194 * - The HCF code which I have seen blows goats. Whoever decided to 195 * use a 132 column format should be shot. 196 * 197 * Rather than actually use the Lucent HCF library, I have stripped all 198 * the useful information from it and used it to create a driver in the 199 * usual BSD form. Note: I don't want to hear anybody whining about the 200 * fact that the Lucent code is GPLed and mine isn't. I did not actually 201 * put any of Lucent's code in this driver: I only used it as a reference 202 * to obtain information about the underlying hardware. The Hermes 203 * programming interface is not GPLed, so bite me. 204 */ 205 206 /* 207 * Size of Hermes & Prism2 I/O space. 208 */ 209 #define WI_IOSIZE 0x40 210 #define WI_PCI_CBMA 0x10 /* Configuration Base Memory Address */ 211 212 #define WI_PCI_COR_OFFSET 0x4C 213 214 /* 215 * Hermes & Prism2 register definitions 216 */ 217 218 /* Hermes command/status registers. */ 219 #define WI_COMMAND 0x00 220 #define WI_PARAM0 0x02 221 #define WI_PARAM1 0x04 222 #define WI_PARAM2 0x06 223 #define WI_STATUS 0x08 224 #define WI_RESP0 0x0A 225 #define WI_RESP1 0x0C 226 #define WI_RESP2 0x0E 227 228 /* Command register values. */ 229 #define WI_CMD_BUSY 0x8000 /* busy bit */ 230 #define WI_CMD_INI 0x0000 /* initialize */ 231 #define WI_CMD_ENABLE 0x0001 /* enable */ 232 #define WI_CMD_DISABLE 0x0002 /* disable */ 233 #define WI_CMD_DIAG 0x0003 234 #define WI_CMD_ALLOC_MEM 0x000A /* allocate NIC memory */ 235 #define WI_CMD_TX 0x000B /* transmit */ 236 #define WI_CMD_NOTIFY 0x0010 237 #define WI_CMD_INQUIRE 0x0011 238 #define WI_CMD_ACCESS 0x0021 239 #define WI_CMD_PROGRAM 0x0022 240 #define WI_CMD_READEE 0x0030 241 242 #define WI_CMD_CODE_MASK 0x003F 243 244 /* 245 * Reclaim qualifier bit, applicable to the 246 * TX and INQUIRE commands. 247 */ 248 #define WI_RECLAIM 0x0100 /* reclaim NIC memory */ 249 250 /* 251 * ACCESS command qualifier bits. 252 */ 253 #define WI_ACCESS_READ 0x0000 254 #define WI_ACCESS_WRITE 0x0100 255 256 /* 257 * PROGRAM command qualifier bits. 258 */ 259 #define WI_PROGRAM_DISABLE 0x0000 260 #define WI_PROGRAM_ENABLE_RAM 0x0100 261 #define WI_PROGRAM_ENABLE_NVRAM 0x0200 262 #define WI_PROGRAM_NVRAM 0x0300 263 264 /* Status register values */ 265 #define WI_STAT_CMD_CODE 0x003F 266 #define WI_STAT_DIAG_ERR 0x0100 267 #define WI_STAT_INQ_ERR 0x0500 268 #define WI_STAT_CMD_RESULT 0x7F00 269 270 /* memory handle management registers */ 271 #define WI_INFO_FID 0x10 272 #define WI_RX_FID 0x20 273 #define WI_ALLOC_FID 0x22 274 #define WI_TX_CMP_FID 0x24 275 276 /* 277 * Buffer Access Path (BAP) registers. 278 * These are I/O channels. I believe you can use each one for 279 * any desired purpose independently of the other. In general 280 * though, we use BAP1 for reading and writing LTV records and 281 * reading received data frames, and BAP0 for writing transmit 282 * frames. This is a convention though, not a rule. 283 */ 284 #define WI_SEL0 0x18 285 #define WI_SEL1 0x1A 286 #define WI_OFF0 0x1C 287 #define WI_OFF1 0x1E 288 #define WI_DATA0 0x36 289 #define WI_DATA1 0x38 290 #define WI_BAP0 WI_DATA0 291 #define WI_BAP1 WI_DATA1 292 293 #define WI_OFF_BUSY 0x8000 294 #define WI_OFF_ERR 0x4000 295 #define WI_OFF_DATAOFF 0x0FFF 296 297 /* Event registers */ 298 #define WI_EVENT_STAT 0x30 /* Event status */ 299 #define WI_INT_EN 0x32 /* Interrupt enable/disable */ 300 #define WI_EVENT_ACK 0x34 /* Ack event */ 301 302 /* Events */ 303 #define WI_EV_TICK 0x8000 /* aux timer tick */ 304 #define WI_EV_RES 0x4000 /* controller h/w error (time out) */ 305 #define WI_EV_INFO_DROP 0x2000 /* no RAM to build unsolicited frame */ 306 #define WI_EV_NO_CARD 0x0800 /* card removed (hunh?) */ 307 #define WI_EV_DUIF_RX 0x0400 /* wavelan management packet received */ 308 #define WI_EV_INFO 0x0080 /* async info frame */ 309 #define WI_EV_CMD 0x0010 /* command completed */ 310 #define WI_EV_ALLOC 0x0008 /* async alloc/reclaim completed */ 311 #define WI_EV_TX_EXC 0x0004 /* async xmit completed with failure */ 312 #define WI_EV_TX 0x0002 /* async xmit completed succesfully */ 313 #define WI_EV_RX 0x0001 /* async rx completed */ 314 315 #define WI_INTRS \ 316 (WI_EV_RX|WI_EV_TX|WI_EV_TX_EXC|WI_EV_ALLOC|WI_EV_INFO|WI_EV_INFO_DROP) 317 318 /* Host software registers */ 319 #define WI_SW0 0x28 320 #define WI_SW1 0x2A 321 #define WI_SW2 0x2C 322 #define WI_SW3 0x2E /* does not appear in Prism2 */ 323 324 #define WI_CNTL 0x14 325 326 #define WI_CNTL_AUX_ENA 0xC000 327 #define WI_CNTL_AUX_ENA_STAT 0xC000 328 #define WI_CNTL_AUX_DIS_STAT 0x0000 329 #define WI_CNTL_AUX_ENA_CNTL 0x8000 330 #define WI_CNTL_AUX_DIS_CNTL 0x4000 331 332 #define WI_AUX_PAGE 0x3A 333 #define WI_AUX_OFFSET 0x3C 334 #define WI_AUX_DATA 0x3E 335 336 #define WI_AUX_PGSZ 128 337 #define WI_AUX_KEY0 0xfe01 338 #define WI_AUX_KEY1 0xdc23 339 #define WI_AUX_KEY2 0xba45 340 341 #define WI_COR 0x40 /* only for Symbol */ 342 #define WI_COR_RESET 0x0080 343 #define WI_COR_IOMODE 0x0041 344 345 #define WI_HCR 0x42 /* only for Symbol */ 346 #define WI_HCR_4WIRE 0x0010 347 #define WI_HCR_RUN 0x0007 348 #define WI_HCR_HOLD 0x000f 349 #define WI_HCR_EEHOLD 0x00ce 350 351 /* 352 * PCI Host Interface Registers (HFA3842 Specific) 353 * The value of all Register's Offset, such as WI_INFO_FID and WI_PARAM0, 354 * has doubled. 355 * About WI_PCI_COR: In this Register, only soft-reset bit implement; Bit(7). 356 */ 357 #define WI_PCI_COR 0x4C 358 #define WI_PCI_HCR 0x5C 359 #define WI_PCI_MASTER0_ADDRH 0x80 360 #define WI_PCI_MASTER0_ADDRL 0x84 361 #define WI_PCI_MASTER0_LEN 0x88 362 #define WI_PCI_MASTER0_CON 0x8C 363 364 #define WI_COR_SOFT_RESET (1 << 7) 365 #define WI_COR_CLEAR 0x00 366 367 #define WI_PCI_STATUS 0x98 368 369 #define WI_PCI_MASTER1_ADDRH 0xA0 370 #define WI_PCI_MASTER1_ADDRL 0xA4 371 #define WI_PCI_MASTER1_LEN 0xA8 372 #define WI_PCI_MASTER1_CON 0xAC 373 374 #define WI_PCI_SOFT_RESET (1 << 7) 375 376 /* 377 * One form of communication with the Hermes is with what Lucent calls 378 * LTV records, where LTV stands for Length, Type and Value. The length 379 * and type are 16 bits and are in native byte order. The value is in 380 * multiples of 16 bits and is in little endian byte order. 381 */ 382 struct wi_ltv_gen { 383 u_int16_t wi_len; 384 u_int16_t wi_type; 385 u_int16_t wi_val; 386 }; 387 388 struct wi_ltv_str { 389 u_int16_t wi_len; 390 u_int16_t wi_type; 391 u_int16_t wi_str[17]; 392 }; 393 394 #define WI_SETVAL(recno, val) \ 395 do { \ 396 struct wi_ltv_gen g; \ 397 \ 398 g.wi_len = 2; \ 399 g.wi_type = recno; \ 400 g.wi_val = htole16(val); \ 401 wi_write_record(sc, &g); \ 402 } while (0) 403 404 #define WI_SETSTR(recno, str) \ 405 do { \ 406 struct wi_ltv_str s; \ 407 int l; \ 408 \ 409 l = (strlen(str) + 1) & ~0x1; \ 410 memset((char *)&s, 0, sizeof(s)); \ 411 s.wi_len = (l / 2) + 2; \ 412 s.wi_type = recno; \ 413 s.wi_str[0] = htole16(strlen(str)); \ 414 memcpy((char *)&s.wi_str[1], str, strlen(str)); \ 415 wi_write_record(sc, (struct wi_ltv_gen *)&s); \ 416 } while (0) 417 418 /* 419 * Download buffer location and length (0xFD01). 420 */ 421 struct wi_ltv_dnld_buf { 422 u_int16_t wi_len; 423 u_int16_t wi_type; 424 u_int16_t wi_buf_pg; /* page addr of intermediate dl buf*/ 425 u_int16_t wi_buf_off; /* offset of idb */ 426 u_int16_t wi_buf_len; /* len of idb */ 427 }; 428 429 /* 430 * Mem sizes (0xFD02). 431 */ 432 struct wi_ltv_memsz { 433 u_int16_t wi_len; 434 u_int16_t wi_type; 435 u_int16_t wi_mem_ram; 436 u_int16_t wi_mem_nvram; 437 }; 438 439 /* 440 * NIC Identification (0xFD0B, 0xFD20) 441 */ 442 struct wi_ltv_ver { 443 u_int16_t wi_len; 444 u_int16_t wi_type; 445 u_int16_t wi_ver[4]; 446 }; 447 448 /* define card ident */ 449 /* Lucent */ 450 #define WI_NIC_LUCENT_ID 0x0001 451 #define WI_NIC_LUCENT_STR "Lucent Technologies, WaveLAN/IEEE" 452 453 #define WI_NIC_SONY_ID 0x0002 454 #define WI_NIC_SONY_STR "Sony WaveLAN/IEEE" 455 456 #define WI_NIC_LUCENT_EMB_ID 0x0005 457 #define WI_NIC_LUCENT_EMB_STR "Lucent Embedded WaveLAN/IEEE" 458 459 /* Intersil */ 460 #define WI_NIC_EVB2_ID 0x8000 461 #define WI_NIC_EVB2_STR "RF:PRISM2 MAC:HFA3841" 462 463 #define WI_NIC_HWB3763_ID 0x8001 464 #define WI_NIC_HWB3763_STR "RF:PRISM2 MAC:HFA3841 CARD:HWB3763 rev.B" 465 466 #define WI_NIC_HWB3163_ID 0x8002 467 #define WI_NIC_HWB3163_STR "RF:PRISM2 MAC:HFA3841 CARD:HWB3163 rev.A" 468 469 #define WI_NIC_HWB3163B_ID 0x8003 470 #define WI_NIC_HWB3163B_STR "RF:PRISM2 MAC:HFA3841 CARD:HWB3163 rev.B" 471 472 #define WI_NIC_EVB3_ID 0x8004 473 #define WI_NIC_EVB3_STR "RF:PRISM2 MAC:HFA3842 CARD:HFA3842 EVAL" 474 475 #define WI_NIC_HWB1153_ID 0x8007 476 #define WI_NIC_HWB1153_STR "RF:PRISM1 MAC:HFA3841 CARD:HWB1153" 477 478 #define WI_NIC_P2_SST_ID 0x8008 /* Prism2 with SST flush */ 479 #define WI_NIC_P2_SST_STR "RF:PRISM2 MAC:HFA3841 CARD:HWB3163-SST-flash" 480 481 #define WI_NIC_EVB2_SST_ID 0x8009 482 #define WI_NIC_EVB2_SST_STR "RF:PRISM2 MAC:HFA3841 CARD:HWB3163-SST-flash" 483 484 #define WI_NIC_3842_EVA_ID 0x800A /* Prism2 3842 Evaluation Board */ 485 #define WI_NIC_3842_EVA_STR "RF:PRISM2 MAC:HFA3842 CARD:HFA3842 EVAL" 486 487 #define WI_NIC_3842_PCMCIA_AMD_ID 0x800B /* Prism2.5 PCMCIA */ 488 #define WI_NIC_3842_PCMCIA_SST_ID 0x800C 489 #define WI_NIC_3842_PCMCIA_ATM_ID 0x800D 490 #define WI_NIC_3842_PCMCIA_STR "RF:PRISM2.5 MAC:ISL3873B(PCMCIA)" 491 492 #define WI_NIC_3842_MINI_AMD_ID 0x8012 /* Prism2.5 Mini-PCI */ 493 #define WI_NIC_3842_MINI_SST_ID 0x8013 494 #define WI_NIC_3842_MINI_ATM_ID 0x8014 495 #define WI_NIC_3842_MINI_STR "RF:PRISM2.5 MAC:ISL3874A(Mini-PCI)" 496 497 #define WI_NIC_3842_PCI_AMD_ID 0x8016 /* Prism2.5 PCI-bridge */ 498 #define WI_NIC_3842_PCI_SST_ID 0x8017 499 #define WI_NIC_3842_PCI_ATM_ID 0x8018 500 #define WI_NIC_3842_PCI_STR "RF:PRISM2.5 MAC:ISL3874A(PCI-bridge)" 501 502 #define WI_NIC_P3_PCMCIA_AMD_ID 0x801A /* Prism3 PCMCIA */ 503 #define WI_NIC_P3_PCMCIA_SST_ID 0x801B 504 #define WI_NIC_P3_PCMCIA_STR "RF:PRISM3 MAC:ISL3871(PCMCIA)" 505 506 #define WI_NIC_P3_MINI_AMD_ID 0x8021 /* Prism3 Mini-PCI */ 507 #define WI_NIC_P3_MINI_SST_ID 0x8022 508 #define WI_NIC_P3_MINI_STR "RF:PRISM3 MAC:ISL3871(Mini-PCI)" 509 510 /* 511 * List of intended regulatory domains (0xFD11). 512 */ 513 struct wi_ltv_domains { 514 u_int16_t wi_len; 515 u_int16_t wi_type; 516 u_int16_t wi_domains[6]; 517 }; 518 519 /* 520 * CIS struct (0xFD13). 521 */ 522 struct wi_ltv_cis { 523 u_int16_t wi_len; 524 u_int16_t wi_type; 525 u_int16_t wi_cis[240]; 526 }; 527 528 /* 529 * Communications quality (0xFD43). 530 */ 531 struct wi_ltv_commqual { 532 u_int16_t wi_len; 533 u_int16_t wi_type; 534 u_int16_t wi_coms_qual; 535 u_int16_t wi_sig_lvl; 536 u_int16_t wi_noise_lvl; 537 }; 538 539 /* 540 * Actual system scale thresholds (0xFC06, 0xFD46). 541 */ 542 struct wi_ltv_scalethresh { 543 u_int16_t wi_len; 544 u_int16_t wi_type; 545 u_int16_t wi_energy_detect; 546 u_int16_t wi_carrier_detect; 547 u_int16_t wi_defer; 548 u_int16_t wi_cell_search; 549 u_int16_t wi_out_of_range; 550 u_int16_t wi_delta_snr; 551 }; 552 553 /* 554 * PCF info struct (0xFD87). 555 */ 556 struct wi_ltv_pcf { 557 u_int16_t wi_len; 558 u_int16_t wi_type; 559 u_int16_t wi_medium_occupancy_limit; 560 u_int16_t wi_cfp_period; 561 u_int16_t wi_cfp_max_duration; 562 }; 563 564 /* 565 * Connection control characteristics. (0xFC00) 566 * 0 == IBSS (802.11 compliant mode) (Only PRISM2) 567 * 1 == Basic Service Set (BSS) 568 * 2 == Wireless Distribudion System (WDS) 569 * 3 == Pseudo IBSS 570 * (Only PRISM2; not 802.11 compliant mode, testing use only) 571 * 6 == HOST AP (Only PRISM2) 572 */ 573 #define WI_PORTTYPE_IBSS 0x0 574 #define WI_PORTTYPE_BSS 0x1 575 #define WI_PORTTYPE_WDS 0x2 576 #define WI_PORTTYPE_ADHOC 0x3 577 #define WI_PORTTYPE_HOSTAP 0x6 578 579 /* 580 * Mac addresses. (0xFC01, 0xFC08) 581 */ 582 struct wi_ltv_macaddr { 583 u_int16_t wi_len; 584 u_int16_t wi_type; 585 u_int8_t wi_mac_addr[6]; 586 }; 587 588 /* 589 * Station set identification (SSID). (0xFC02, 0xFC04) 590 */ 591 struct wi_ltv_ssid { 592 u_int16_t wi_len; 593 u_int16_t wi_type; 594 u_int16_t wi_id[17]; 595 }; 596 597 /* 598 * Set our station name. (0xFC0E) 599 */ 600 struct wi_ltv_nodename { 601 u_int16_t wi_len; 602 u_int16_t wi_type; 603 u_int16_t wi_nodename[17]; 604 }; 605 606 /* 607 * Multicast addresses to be put in filter. We're 608 * allowed up to 16 addresses in the filter. (0xFC80) 609 */ 610 struct wi_ltv_mcast { 611 u_int16_t wi_len; 612 u_int16_t wi_type; 613 struct ether_addr wi_mcast[16]; 614 }; 615 616 /* 617 * Supported rates. 618 */ 619 #define WI_SUPPRATES_1M 0x0001 620 #define WI_SUPPRATES_2M 0x0002 621 #define WI_SUPPRATES_5M 0x0004 622 #define WI_SUPPRATES_11M 0x0008 623 624 /* 625 * Information frame types. 626 */ 627 #define WI_INFO_NOTIFY 0xF000 /* Handover address */ 628 #define WI_INFO_COUNTERS 0xF100 /* Statistics counters */ 629 #define WI_INFO_SCAN_RESULTS 0xF101 /* Scan results */ 630 #define WI_INFO_HOST_SCAN_RESULTS 0xF104 /* Scan results */ 631 #define WI_INFO_LINK_STAT 0xF200 /* Link status */ 632 #define WI_INFO_ASSOC_STAT 0xF201 /* Association status */ 633 struct wi_assoc { 634 u_int16_t wi_assoc_stat; /* Association Status */ 635 #define ASSOC 1 636 #define REASSOC 2 637 #define DISASSOC 3 638 #define ASSOCFAIL 4 639 #define AUTHFAIL 5 640 u_int8_t wi_assoc_sta[6]; /* Station Address */ 641 u_int8_t wi_assoc_osta[6]; /* OLD Station Address */ 642 u_int16_t wi_assoc_reason; /* Reason */ 643 u_int16_t wi_assoc_reserve; /* Reserved */ 644 }; 645 646 #define WI_INFO_AUTH_REQUEST 0xF202 /* Authentication Request (AP) */ 647 #define WI_INFO_POWERSAVE_COUNT 0xF203 /* PowerSave User Count (AP) */ 648 649 /* 650 * Scan Results of Prism2 chip 651 */ 652 653 #define MAXAPINFO 30 654 struct wi_scan_header { 655 u_int16_t wi_reserve; /* future use */ 656 u_int16_t wi_reason; /* The reason this scan was initiated 657 1: Host initiated 658 2: Firmware initiated 659 3: Inquiry request from host */ 660 }; 661 662 struct wi_scan_data_p2 { 663 u_int16_t wi_chid; /* BSS Channel ID from Probe Res.(PR)*/ 664 u_int16_t wi_noise; /* Average Noise Level of the PR */ 665 u_int16_t wi_signal; /* Signal Level on the PR */ 666 u_int8_t wi_bssid[6]; /* MACaddress of BSS responder from PR */ 667 u_int16_t wi_interval; /* BSS beacon interval */ 668 u_int16_t wi_capinfo; /* BSS Capability Information 669 IEEE Std 802.11(1997) ,see 7.3.1.4 */ 670 u_int16_t wi_namelen; /* Length of SSID strings */ 671 u_int8_t wi_name[32]; /* SSID strings */ 672 u_int16_t wi_suprate[5]; /* Supported Rates element from the PR 673 IEEE Std 802.11(1997) ,see 7.3.2.2 */ 674 u_int16_t wi_rate; /* Data rate of the PR */ 675 #define WI_APRATE_1 0x0A /* 1 Mbps */ 676 #define WI_APRATE_2 0x14 /* 2 Mbps */ 677 #define WI_APRATE_5 0x37 /* 5.5 Mbps */ 678 #define WI_APRATE_11 0x6E /* 11 Mbps */ 679 }; 680 681 /* 682 * Scan Results of Lucent chip 683 */ 684 struct wi_scan_data { 685 u_int16_t wi_chid; /* BSS Channel ID from PR */ 686 u_int16_t wi_noise; /* Average Noise Level of the PR */ 687 u_int16_t wi_signal; /* Signal Level on the PR */ 688 u_int8_t wi_bssid[6]; /* MACaddress of BSS responder from PR */ 689 u_int16_t wi_interval; /* BSS beacon interval */ 690 u_int16_t wi_capinfo; /* BSS Capability Information 691 IEEE Std 802.11(1997) ,see 7.3.1.4 */ 692 u_int16_t wi_namelen; /* Length of SSID strings */ 693 u_int8_t wi_name[32]; /* SSID strings */ 694 }; 695 696 /* 697 * transmit/receive frame structure 698 */ 699 struct wi_frame { 700 u_int16_t wi_status; /* 0x00 */ 701 u_int16_t wi_rsvd0; /* 0x02 */ /* 0 */ 702 u_int16_t wi_rsvd1; /* 0x04 */ /* 0 */ 703 u_int16_t wi_q_info; /* 0x06 */ 704 u_int16_t wi_rsvd2; /* 0x08 */ 705 u_int8_t wi_tx_rtry; /* 0x0A */ /* (Prism2 Only) */ 706 u_int8_t wi_tx_rate; /* 0x0B */ /* (Prism2 Only) */ 707 u_int16_t wi_tx_ctl; /* 0x0C */ 708 u_int16_t wi_frame_ctl; /* 0x0E */ 709 u_int16_t wi_id; /* 0x10 */ 710 u_int8_t wi_addr1[6]; /* 0x12 */ 711 u_int8_t wi_addr2[6]; /* 0x18 */ 712 u_int8_t wi_addr3[6]; /* 0x1E */ 713 u_int16_t wi_seq_ctl; /* 0x24 */ 714 u_int8_t wi_addr4[6]; /* 0x26 */ 715 u_int16_t wi_dat_len; /* 0x2C */ 716 u_int8_t wi_dst_addr[6]; /* 0x2E */ 717 u_int8_t wi_src_addr[6]; /* 0x34 */ 718 u_int16_t wi_len; /* 0x3A */ 719 #if 0 720 struct llc wi_llc; /* 0x3C */ /* SNAP header */ 721 #endif 722 }; 723 724 #define WI_TX_BUFSIZE (ETHER_MAX_LEN + sizeof(struct wi_frame) + 8) 725 726 #define WI_802_3_OFFSET 0x2E 727 #define WI_802_11_OFFSET 0x44 728 #define WI_802_11_OFFSET_RAW 0x3C 729 #define WI_802_11_OFFSET_HDR 0x0E 730 731 #define WI_HWSPEC_END 0x0E 732 #define WI_802_11_BEGIN 0x0E 733 #define WI_SHORT_802_11_END 0x26 734 #define WI_LONG_802_11_END 0x2C 735 #define WI_802_3_BEGIN 0x2E 736 #define WI_802_3_END 0x3C 737 #define WI_DATA_BEGIN 0x3C 738 #define WI_LLC_BEGIN 0x3C 739 #define WI_LLC_END 0x44 740 741 /* Tx Status Field */ 742 #define WI_TXSTAT_RET_ERR 0x0001 743 #define WI_TXSTAT_AGED_ERR 0x0002 744 #define WI_TXSTAT_DISCONNECT 0x0004 745 #define WI_TXSTAT_FORM_ERR 0x0008 746 747 /* Rx Status Field */ 748 #define WI_STAT_BADCRC 0x0001 749 #define WI_STAT_UNDECRYPTABLE 0x0002 750 #define WI_STAT_ERRSTAT 0x0003 751 #define WI_STAT_MAC_PORT 0x0700 752 #define WI_STAT_PCF 0x1000 753 #define WI_RXSTAT_MSG_TYPE 0xE000 754 #define WI_STAT_NORMAL 0x0000 755 #define WI_STAT_1042 0x2000 /* RFC1042 encoded */ 756 #define WI_STAT_TUNNEL 0x4000 /* Bridge-tunnel encoded */ 757 #define WI_STAT_WMP_MSG 0x6000 /* WaveLAN-II management protocol */ 758 #define WI_STAT_MGMT 0x8000 /* 802.11b management frames */ 759 760 /* TxControl Field (enhanced) */ 761 #define WI_TXCNTL_TX_OK 0x0002 762 #define WI_TXCNTL_TX_EX 0x0004 763 #define WI_TXCNTL_STRUCT_TYPE 0x0018 764 #define WI_ENC_TX_802_3 0x00 765 #define WI_ENC_TX_802_11 0x08 766 #define WI_TXCNTL_ALTRTRY 0x0020 767 #define WI_TXCNTL_NOCRYPT 0x0080 768 769 /* 770 * SNAP (sub-network access protocol) constants for transmission 771 * of IP datagrams over IEEE 802 networks, taken from RFC1042. 772 * We need these for the LLC/SNAP header fields in the TX/RX frame 773 * structure. 774 */ 775 #define WI_SNAP_LEN 8 776
Indexes created Mon Sep 29 03:10:08 GMT 2025