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wivar.h revision 1.23
      1  1.23     onoe /*	$NetBSD: wivar.h,v 1.23 2002/10/04 04:23:23 onoe Exp $	*/
      2   1.1   ichiro 
      3   1.1   ichiro /*
      4   1.1   ichiro  * Copyright (c) 1997, 1998, 1999
      5   1.1   ichiro  *	Bill Paul <wpaul (at) ctr.columbia.edu>.  All rights reserved.
      6   1.1   ichiro  *
      7   1.1   ichiro  * Redistribution and use in source and binary forms, with or without
      8   1.1   ichiro  * modification, are permitted provided that the following conditions
      9   1.1   ichiro  * are met:
     10   1.1   ichiro  * 1. Redistributions of source code must retain the above copyright
     11   1.1   ichiro  *    notice, this list of conditions and the following disclaimer.
     12   1.1   ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1   ichiro  *    notice, this list of conditions and the following disclaimer in the
     14   1.1   ichiro  *    documentation and/or other materials provided with the distribution.
     15   1.1   ichiro  * 3. All advertising materials mentioning features or use of this software
     16   1.1   ichiro  *    must display the following acknowledgement:
     17   1.1   ichiro  *	This product includes software developed by Bill Paul.
     18   1.1   ichiro  * 4. Neither the name of the author nor the names of any co-contributors
     19   1.1   ichiro  *    may be used to endorse or promote products derived from this software
     20   1.1   ichiro  *    without specific prior written permission.
     21   1.1   ichiro  *
     22   1.1   ichiro  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
     23   1.1   ichiro  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24   1.1   ichiro  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25   1.1   ichiro  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
     26   1.1   ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     27   1.1   ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     28   1.1   ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     29   1.1   ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     30   1.1   ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     31   1.1   ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     32   1.1   ichiro  * THE POSSIBILITY OF SUCH DAMAGE.
     33   1.1   ichiro  */
     34   1.1   ichiro 
     35   1.1   ichiro /*
     36   1.1   ichiro  * FreeBSD driver ported to NetBSD by Bill Sommerfeld in the back of the
     37   1.1   ichiro  * Oslo IETF plenary meeting.
     38   1.1   ichiro  */
     39   1.1   ichiro struct wi_softc	{
     40   1.1   ichiro 	struct device		sc_dev;
     41  1.21     onoe 	struct ieee80211com	sc_ic;
     42  1.21     onoe 	void			*sc_ih;		/* interrupt handler */
     43  1.21     onoe 	int			(*sc_enable)(struct wi_softc *);
     44  1.21     onoe 	void			(*sc_disable)(struct wi_softc *);
     45  1.21     onoe 
     46  1.21     onoe 	int			sc_attached;
     47  1.21     onoe 	int			sc_enabled;
     48  1.21     onoe 	int			sc_firmware_type;
     49  1.14   ichiro #define	WI_NOTYPE	0
     50  1.14   ichiro #define	WI_LUCENT	1
     51  1.14   ichiro #define	WI_INTERSIL	2
     52  1.14   ichiro #define	WI_SYMBOL	3
     53  1.21     onoe 	int			sc_pri_firmware_ver;	/* Primary firm vers */
     54  1.21     onoe 	int			sc_sta_firmware_ver;	/* Station firm vers */
     55  1.21     onoe 	int			sc_pci;			/* attach to PCI-Bus */
     56  1.21     onoe 
     57  1.21     onoe 	bus_space_tag_t		sc_iot;			/* bus cookie */
     58  1.21     onoe 	bus_space_handle_t	sc_ioh;			/* bus i/o handle */
     59  1.19  thorpej 
     60   1.1   ichiro 	struct ifmedia		sc_media;
     61  1.21     onoe 	caddr_t			sc_drvbpf;
     62  1.21     onoe 	int			sc_flags;
     63  1.21     onoe 	int			sc_bap_id;
     64  1.21     onoe 	int			sc_bap_off;
     65  1.21     onoe 
     66  1.21     onoe 	u_int16_t		sc_max_datalen;
     67  1.21     onoe 	u_int16_t		sc_rts_thresh;
     68  1.21     onoe 	u_int16_t		sc_system_scale;
     69  1.21     onoe 	u_int16_t		sc_tx_rate;
     70  1.21     onoe 	u_int16_t		sc_cnfauthmode;
     71  1.21     onoe 	u_int16_t		sc_roaming_mode;
     72  1.21     onoe 	u_int16_t		sc_microwave_oven;
     73  1.21     onoe 
     74  1.21     onoe 	int			sc_nodelen;
     75  1.21     onoe 	char			sc_nodename[IEEE80211_NWID_LEN];
     76  1.21     onoe 
     77  1.21     onoe 	int			sc_buflen;
     78  1.21     onoe #define	WI_NTXBUF	3
     79  1.21     onoe 	struct sc_txdesc {
     80  1.21     onoe 		int		d_fid;
     81  1.21     onoe 		int		d_len;
     82  1.21     onoe 	}			sc_txd[WI_NTXBUF];
     83  1.21     onoe 	int			sc_txnext;
     84  1.21     onoe 	int			sc_txcur;
     85  1.21     onoe 	int			sc_tx_timer;
     86  1.21     onoe 	int			sc_scan_timer;
     87  1.21     onoe 
     88  1.21     onoe 	struct wi_counters	sc_stats;
     89  1.21     onoe 	u_int16_t		sc_ibss_port;
     90  1.19  thorpej 
     91  1.21     onoe 	struct wi_apinfo	sc_aps[MAXAPINFO];
     92  1.21     onoe 	int 			sc_naps;
     93  1.12   ichiro };
     94  1.20     onoe 
     95  1.21     onoe #define	sc_if			sc_ic.ic_if
     96  1.21     onoe 
     97  1.21     onoe #define	WI_SCAN_INQWAIT			3	/* wait sec before inquire */
     98  1.21     onoe #define	WI_SCAN_WAIT			5	/* maximum scan wait */
     99  1.16  thorpej 
    100  1.16  thorpej /* Values for wi_flags. */
    101  1.16  thorpej #define	WI_FLAGS_ATTACHED		0x0001
    102  1.16  thorpej #define	WI_FLAGS_INITIALIZED		0x0002
    103  1.23     onoe #define	WI_FLAGS_OUTRANGE		0x0004
    104  1.21     onoe #define	WI_FLAGS_HAS_MOR		0x0010
    105  1.21     onoe #define	WI_FLAGS_HAS_ROAMING		0x0020
    106  1.21     onoe #define	WI_FLAGS_HAS_DIVERSITY		0x0040
    107  1.21     onoe #define	WI_FLAGS_HAS_SYSSCALE		0x0080
    108  1.21     onoe #define	WI_FLAGS_BUG_AUTOINC		0x0100
    109  1.12   ichiro 
    110  1.12   ichiro struct wi_card_ident {
    111  1.12   ichiro 	u_int16_t	card_id;
    112  1.12   ichiro 	char		*card_name;
    113  1.12   ichiro 	u_int8_t	firm_type;
    114   1.1   ichiro };
    115   1.1   ichiro 
    116  1.21     onoe /*
    117  1.21     onoe  * register space access macros
    118  1.21     onoe  */
    119  1.21     onoe #ifdef WI_AT_BIGENDIAN_BUS_HACK
    120  1.21     onoe 	/*
    121  1.21     onoe 	 * XXX - ugly hack for sparc bus_space_* macro deficiencies:
    122  1.21     onoe 	 *       assume the bus we are accessing is big endian.
    123  1.21     onoe 	 */
    124  1.21     onoe 
    125  1.21     onoe #define CSR_WRITE_4(sc, reg, val)	\
    126  1.21     onoe 	bus_space_write_4(sc->sc_iot, sc->sc_ioh,	\
    127  1.21     onoe 			(sc->sc_pci? reg * 2: reg) , htole32(val))
    128  1.21     onoe #define CSR_WRITE_2(sc, reg, val)	\
    129  1.21     onoe 	bus_space_write_2(sc->sc_iot, sc->sc_ioh,	\
    130  1.21     onoe 			(sc->sc_pci? reg * 2: reg), htole16(val))
    131  1.21     onoe #define CSR_WRITE_1(sc, reg, val)	\
    132  1.21     onoe 	bus_space_write_1(sc->sc_iot, sc->sc_ioh,	\
    133  1.21     onoe 			(sc->sc_pci? reg * 2: reg), val)
    134  1.21     onoe 
    135  1.21     onoe #define CSR_READ_4(sc, reg)		\
    136  1.21     onoe 	le32toh(bus_space_read_4(sc->sc_iot, sc->sc_ioh,	\
    137  1.21     onoe 			(sc->sc_pci? reg * 2: reg)))
    138  1.21     onoe #define CSR_READ_2(sc, reg)		\
    139  1.21     onoe 	le16toh(bus_space_read_2(sc->sc_iot, sc->sc_ioh,	\
    140  1.21     onoe 			(sc->sc_pci? reg * 2: reg)))
    141  1.21     onoe #define CSR_READ_1(sc, reg)		\
    142  1.21     onoe 	bus_space_read_1(sc->sc_iot, sc->sc_ioh,	\
    143  1.21     onoe 			(sc->sc_pci? reg * 2: reg))
    144  1.21     onoe 
    145  1.21     onoe #else
    146  1.21     onoe 
    147  1.21     onoe #define CSR_WRITE_4(sc, reg, val)	\
    148  1.21     onoe 	bus_space_write_4(sc->sc_iot, sc->sc_ioh,	\
    149  1.21     onoe 			(sc->sc_pci? reg * 2: reg) , val)
    150  1.21     onoe #define CSR_WRITE_2(sc, reg, val)	\
    151  1.21     onoe 	bus_space_write_2(sc->sc_iot, sc->sc_ioh,	\
    152  1.21     onoe 			(sc->sc_pci? reg * 2: reg), val)
    153  1.21     onoe #define CSR_WRITE_1(sc, reg, val)	\
    154  1.21     onoe 	bus_space_write_1(sc->sc_iot, sc->sc_ioh,	\
    155  1.21     onoe 			(sc->sc_pci? reg * 2: reg), val)
    156  1.21     onoe 
    157  1.21     onoe #define CSR_READ_4(sc, reg)		\
    158  1.21     onoe 	bus_space_read_4(sc->sc_iot, sc->sc_ioh,	\
    159  1.21     onoe 			(sc->sc_pci? reg * 2: reg))
    160  1.21     onoe #define CSR_READ_2(sc, reg)		\
    161  1.21     onoe 	bus_space_read_2(sc->sc_iot, sc->sc_ioh,	\
    162  1.21     onoe 			(sc->sc_pci? reg * 2: reg))
    163  1.21     onoe #define CSR_READ_1(sc, reg)		\
    164  1.21     onoe 	bus_space_read_1(sc->sc_iot, sc->sc_ioh,	\
    165  1.21     onoe 			(sc->sc_pci? reg * 2: reg))
    166  1.21     onoe #endif
    167  1.21     onoe 
    168  1.21     onoe #ifndef __BUS_SPACE_HAS_STREAM_METHODS
    169  1.21     onoe #define bus_space_write_stream_2	bus_space_write_2
    170  1.21     onoe #define bus_space_write_multi_stream_2	bus_space_write_multi_2
    171  1.21     onoe #define bus_space_read_stream_2		bus_space_read_2
    172  1.21     onoe #define bus_space_read_multi_stream_2		bus_space_read_multi_2
    173  1.21     onoe #endif
    174  1.21     onoe 
    175  1.21     onoe #define CSR_WRITE_STREAM_2(sc, reg, val)	\
    176  1.21     onoe 	bus_space_write_stream_2(sc->sc_iot, sc->sc_ioh,	\
    177  1.21     onoe 			(sc->sc_pci? reg * 2: reg), val)
    178  1.21     onoe #define CSR_WRITE_MULTI_STREAM_2(sc, reg, val, count)	\
    179  1.21     onoe 	bus_space_write_multi_stream_2(sc->sc_iot, sc->sc_ioh,	\
    180  1.21     onoe 			(sc->sc_pci? reg * 2: reg), val, count)
    181  1.21     onoe #define CSR_READ_STREAM_2(sc, reg)		\
    182  1.21     onoe 	bus_space_read_stream_2(sc->sc_iot, sc->sc_ioh,	\
    183  1.21     onoe 			(sc->sc_pci? reg * 2: reg))
    184  1.21     onoe #define CSR_READ_MULTI_STREAM_2(sc, reg, buf, count)		\
    185  1.21     onoe 	bus_space_read_multi_stream_2(sc->sc_iot, sc->sc_ioh,	\
    186  1.21     onoe 			(sc->sc_pci? reg * 2: reg), buf, count)
    187  1.21     onoe 
    188  1.21     onoe 
    189  1.21     onoe int	wi_attach(struct wi_softc *);
    190  1.21     onoe int	wi_detach(struct wi_softc *);
    191  1.21     onoe int	wi_activate(struct device *, enum devact);
    192  1.21     onoe int	wi_intr(void *arg);
    193  1.21     onoe void	wi_power(struct wi_softc *, int);
    194  1.21     onoe void	wi_shutdown(struct wi_softc *);
    195