wivar.h revision 1.34
1 /* $NetBSD: wivar.h,v 1.34 2003/05/20 01:29:35 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul (at) ctr.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * FreeBSD driver ported to NetBSD by Bill Sommerfeld in the back of the 37 * Oslo IETF plenary meeting. 38 */ 39 struct wi_softc { 40 struct device sc_dev; 41 struct ieee80211com sc_ic; 42 void *sc_ih; /* interrupt handler */ 43 int (*sc_enable)(struct wi_softc *); 44 void (*sc_disable)(struct wi_softc *); 45 void (*sc_reset)(struct wi_softc *); 46 47 int sc_attached; 48 int sc_enabled; 49 int sc_invalid; 50 int sc_firmware_type; 51 #define WI_NOTYPE 0 52 #define WI_LUCENT 1 53 #define WI_INTERSIL 2 54 #define WI_SYMBOL 3 55 int sc_pri_firmware_ver; /* Primary firm vers */ 56 int sc_sta_firmware_ver; /* Station firm vers */ 57 int sc_pci; /* attach to PCI-Bus */ 58 59 bus_space_tag_t sc_iot; /* bus cookie */ 60 bus_space_handle_t sc_ioh; /* bus i/o handle */ 61 62 struct ifmedia sc_media; 63 caddr_t sc_drvbpf; 64 int sc_flags; 65 int sc_bap_id; 66 int sc_bap_off; 67 68 u_int16_t sc_portnum; 69 70 u_int16_t sc_dbm_adjust; 71 u_int16_t sc_max_datalen; 72 u_int16_t sc_frag_thresh; 73 u_int16_t sc_rts_thresh; 74 u_int16_t sc_system_scale; 75 u_int16_t sc_tx_rate; 76 u_int16_t sc_cnfauthmode; 77 u_int16_t sc_roaming_mode; 78 u_int16_t sc_microwave_oven; 79 80 int sc_nodelen; 81 char sc_nodename[IEEE80211_NWID_LEN]; 82 83 int sc_buflen; 84 #define WI_NTXBUF 3 85 struct sc_txdesc { 86 int d_fid; 87 int d_len; 88 } sc_txd[WI_NTXBUF]; 89 int sc_txnext; 90 int sc_txcur; 91 int sc_tx_timer; 92 int sc_scan_timer; 93 int sc_syn_timer; 94 95 struct wi_counters sc_stats; 96 u_int16_t sc_ibss_port; 97 98 struct wi_apinfo sc_aps[MAXAPINFO]; 99 int sc_naps; 100 101 int sc_false_syns; 102 103 u_int16_t sc_txbuf[IEEE80211_MAX_LEN/2]; 104 }; 105 106 #define sc_if sc_ic.ic_if 107 108 /* maximum consecutive false change-of-BSSID indications */ 109 #define WI_MAX_FALSE_SYNS 10 110 111 #define WI_SCAN_INQWAIT 3 /* wait sec before inquire */ 112 #define WI_SCAN_WAIT 5 /* maximum scan wait */ 113 114 /* Values for wi_flags. */ 115 #define WI_FLAGS_ATTACHED 0x0001 116 #define WI_FLAGS_INITIALIZED 0x0002 117 #define WI_FLAGS_OUTRANGE 0x0004 118 #define WI_FLAGS_HAS_MOR 0x0010 119 #define WI_FLAGS_HAS_ROAMING 0x0020 120 #define WI_FLAGS_HAS_DIVERSITY 0x0040 121 #define WI_FLAGS_HAS_SYSSCALE 0x0080 122 #define WI_FLAGS_BUG_AUTOINC 0x0100 123 #define WI_FLAGS_HAS_FRAGTHR 0x0200 124 #define WI_FLAGS_HAS_DBMADJUST 0x0400 125 126 struct wi_card_ident { 127 u_int16_t card_id; 128 char *card_name; 129 u_int8_t firm_type; 130 }; 131 132 /* 133 * register space access macros 134 */ 135 #ifdef WI_AT_BIGENDIAN_BUS_HACK 136 /* 137 * XXX - ugly hack for sparc bus_space_* macro deficiencies: 138 * assume the bus we are accessing is big endian. 139 */ 140 141 #define CSR_WRITE_4(sc, reg, val) \ 142 bus_space_write_4(sc->sc_iot, sc->sc_ioh, \ 143 (sc->sc_pci? reg * 2: reg) , htole32(val)) 144 #define CSR_WRITE_2(sc, reg, val) \ 145 bus_space_write_2(sc->sc_iot, sc->sc_ioh, \ 146 (sc->sc_pci? reg * 2: reg), htole16(val)) 147 #define CSR_WRITE_1(sc, reg, val) \ 148 bus_space_write_1(sc->sc_iot, sc->sc_ioh, \ 149 (sc->sc_pci? reg * 2: reg), val) 150 151 #define CSR_READ_4(sc, reg) \ 152 le32toh(bus_space_read_4(sc->sc_iot, sc->sc_ioh, \ 153 (sc->sc_pci? reg * 2: reg))) 154 #define CSR_READ_2(sc, reg) \ 155 le16toh(bus_space_read_2(sc->sc_iot, sc->sc_ioh, \ 156 (sc->sc_pci? reg * 2: reg))) 157 #define CSR_READ_1(sc, reg) \ 158 bus_space_read_1(sc->sc_iot, sc->sc_ioh, \ 159 (sc->sc_pci? reg * 2: reg)) 160 161 #else 162 163 #define CSR_WRITE_4(sc, reg, val) \ 164 bus_space_write_4(sc->sc_iot, sc->sc_ioh, \ 165 (sc->sc_pci? reg * 2: reg) , val) 166 #define CSR_WRITE_2(sc, reg, val) \ 167 bus_space_write_2(sc->sc_iot, sc->sc_ioh, \ 168 (sc->sc_pci? reg * 2: reg), val) 169 #define CSR_WRITE_1(sc, reg, val) \ 170 bus_space_write_1(sc->sc_iot, sc->sc_ioh, \ 171 (sc->sc_pci? reg * 2: reg), val) 172 173 #define CSR_READ_4(sc, reg) \ 174 bus_space_read_4(sc->sc_iot, sc->sc_ioh, \ 175 (sc->sc_pci? reg * 2: reg)) 176 #define CSR_READ_2(sc, reg) \ 177 bus_space_read_2(sc->sc_iot, sc->sc_ioh, \ 178 (sc->sc_pci? reg * 2: reg)) 179 #define CSR_READ_1(sc, reg) \ 180 bus_space_read_1(sc->sc_iot, sc->sc_ioh, \ 181 (sc->sc_pci? reg * 2: reg)) 182 #endif 183 184 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 185 #define bus_space_write_stream_2 bus_space_write_2 186 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 187 #define bus_space_read_stream_2 bus_space_read_2 188 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 189 #endif 190 191 #define CSR_WRITE_STREAM_2(sc, reg, val) \ 192 bus_space_write_stream_2(sc->sc_iot, sc->sc_ioh, \ 193 (sc->sc_pci? reg * 2: reg), val) 194 #define CSR_WRITE_MULTI_STREAM_2(sc, reg, val, count) \ 195 bus_space_write_multi_stream_2(sc->sc_iot, sc->sc_ioh, \ 196 (sc->sc_pci? reg * 2: reg), val, count) 197 #define CSR_READ_STREAM_2(sc, reg) \ 198 bus_space_read_stream_2(sc->sc_iot, sc->sc_ioh, \ 199 (sc->sc_pci? reg * 2: reg)) 200 #define CSR_READ_MULTI_STREAM_2(sc, reg, buf, count) \ 201 bus_space_read_multi_stream_2(sc->sc_iot, sc->sc_ioh, \ 202 (sc->sc_pci? reg * 2: reg), buf, count) 203 204 205 int wi_attach(struct wi_softc *); 206 int wi_detach(struct wi_softc *); 207 int wi_activate(struct device *, enum devact); 208 int wi_intr(void *arg); 209 void wi_power(struct wi_softc *, int); 210 void wi_shutdown(struct wi_softc *); 211
Indexes created Tue Sep 30 20:09:53 GMT 2025