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z8530sc.h revision 1.6
      1  1.6  gwr /*	$NetBSD: z8530sc.h,v 1.6 1997/02/24 16:01:39 gwr Exp $	*/
      2  1.1  gwr 
      3  1.1  gwr /*
      4  1.1  gwr  * Copyright (c) 1994 Gordon W. Ross
      5  1.1  gwr  * Copyright (c) 1992, 1993
      6  1.1  gwr  *	The Regents of the University of California.  All rights reserved.
      7  1.1  gwr  *
      8  1.1  gwr  * This software was developed by the Computer Systems Engineering group
      9  1.1  gwr  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
     10  1.1  gwr  * contributed to Berkeley.
     11  1.1  gwr  *
     12  1.1  gwr  * All advertising materials mentioning features or use of this software
     13  1.1  gwr  * must display the following acknowledgement:
     14  1.1  gwr  *	This product includes software developed by the University of
     15  1.1  gwr  *	California, Lawrence Berkeley Laboratory.
     16  1.1  gwr  *
     17  1.1  gwr  * Redistribution and use in source and binary forms, with or without
     18  1.1  gwr  * modification, are permitted provided that the following conditions
     19  1.1  gwr  * are met:
     20  1.1  gwr  * 1. Redistributions of source code must retain the above copyright
     21  1.1  gwr  *    notice, this list of conditions and the following disclaimer.
     22  1.1  gwr  * 2. Redistributions in binary form must reproduce the above copyright
     23  1.1  gwr  *    notice, this list of conditions and the following disclaimer in the
     24  1.1  gwr  *    documentation and/or other materials provided with the distribution.
     25  1.1  gwr  * 3. All advertising materials mentioning features or use of this software
     26  1.1  gwr  *    must display the following acknowledgement:
     27  1.1  gwr  *	This product includes software developed by the University of
     28  1.1  gwr  *	California, Berkeley and its contributors.
     29  1.1  gwr  * 4. Neither the name of the University nor the names of its contributors
     30  1.1  gwr  *    may be used to endorse or promote products derived from this software
     31  1.1  gwr  *    without specific prior written permission.
     32  1.1  gwr  *
     33  1.1  gwr  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     34  1.1  gwr  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     35  1.1  gwr  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     36  1.1  gwr  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     37  1.1  gwr  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     38  1.1  gwr  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     39  1.1  gwr  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     40  1.1  gwr  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     41  1.1  gwr  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     42  1.1  gwr  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     43  1.1  gwr  * SUCH DAMAGE.
     44  1.1  gwr  *
     45  1.1  gwr  *	@(#)zsvar.h	8.1 (Berkeley) 6/11/93
     46  1.1  gwr  */
     47  1.1  gwr 
     48  1.1  gwr 
     49  1.1  gwr /*
     50  1.1  gwr  * Function vector - per channel
     51  1.1  gwr  */
     52  1.5  gwr struct zs_chanstate;
     53  1.5  gwr typedef void	(*zsop_t) __P((struct zs_chanstate *));
     54  1.1  gwr struct zsops {
     55  1.5  gwr 	zsop_t	zsop_rxint; 	/* receive char available */
     56  1.5  gwr 	zsop_t	zsop_stint; 	/* external/status */
     57  1.5  gwr 	zsop_t	zsop_txint; 	/* xmit buffer empty */
     58  1.5  gwr 	zsop_t	zsop_softint;	/* process software interrupt */
     59  1.1  gwr };
     60  1.1  gwr 
     61  1.1  gwr extern struct zsops zsops_null;
     62  1.1  gwr 
     63  1.1  gwr 
     64  1.1  gwr /*
     65  1.1  gwr  * Software state, per zs channel.
     66  1.1  gwr  */
     67  1.1  gwr struct zs_chanstate {
     68  1.1  gwr 
     69  1.1  gwr 	/* Pointers to the device registers. */
     70  1.1  gwr 	volatile u_char	*cs_reg_csr; 	/* ctrl, status, and reg. number. */
     71  1.1  gwr 	volatile u_char	*cs_reg_data;	/* data or numbered register */
     72  1.1  gwr 
     73  1.1  gwr 	int	cs_channel;		/* sub-unit number */
     74  1.3  gwr 	void   *cs_private;		/* sub-driver data pointer */
     75  1.1  gwr 	struct zsops *cs_ops;
     76  1.1  gwr 
     77  1.3  gwr 	int	cs_brg_clk;		/* BAUD Rate Generator clock
     78  1.3  gwr 					 * (usually PCLK / 16) */
     79  1.5  gwr 	int	cs_defspeed;		/* default baud rate */
     80  1.5  gwr 	int	cs_defcflag;		/* default cflag */
     81  1.1  gwr 
     82  1.1  gwr 	/*
     83  1.1  gwr 	 * We must keep a copy of the write registers as they are
     84  1.1  gwr 	 * mostly write-only and we sometimes need to set and clear
     85  1.1  gwr 	 * individual bits (e.g., in WR3).  Not all of these are
     86  1.1  gwr 	 * needed but 16 bytes is cheap and this makes the addressing
     87  1.1  gwr 	 * simpler.  Unfortunately, we can only write to some registers
     88  1.1  gwr 	 * when the chip is not actually transmitting, so whenever
     89  1.1  gwr 	 * we are expecting a `transmit done' interrupt the preg array
     90  1.1  gwr 	 * is allowed to `get ahead' of the current values.  In a
     91  1.1  gwr 	 * few places we must change the current value of a register,
     92  1.1  gwr 	 * rather than (or in addition to) the pending value; for these
     93  1.1  gwr 	 * cs_creg[] contains the current value.
     94  1.1  gwr 	 */
     95  1.1  gwr 	u_char	cs_creg[16];		/* current values */
     96  1.1  gwr 	u_char	cs_preg[16];		/* pending values */
     97  1.5  gwr 	int 	cs_heldchange;		/* change pending (creg != preg) */
     98  1.1  gwr 
     99  1.1  gwr 	u_char	cs_rr0;			/* last rr0 processed */
    100  1.4  gwr 	u_char	cs_rr0_delta;		/* rr0 changes at status intr. */
    101  1.5  gwr 	u_char	cs_rr0_dcd;		/* which bit to read as DCD */
    102  1.5  gwr 	u_char	cs_rr0_cts;		/* which bit to read as CTS */
    103  1.5  gwr 	/* the above is set only while CRTSCTS is enabled. */
    104  1.5  gwr 
    105  1.5  gwr 	u_char	cs_wr5_dtr;		/* which bit to write as DTR */
    106  1.5  gwr 	u_char	cs_wr5_rts;		/* which bit to write as RTS */
    107  1.5  gwr 	/* the above is set only while CRTSCTS is enabled. */
    108  1.1  gwr 
    109  1.1  gwr 	char	cs_softreq;		/* need soft interrupt call */
    110  1.5  gwr 	char	cs_pad[1];
    111  1.5  gwr 	/* MD code might define a larger variant of this. */
    112  1.1  gwr };
    113  1.1  gwr 
    114  1.1  gwr struct zsc_attach_args {
    115  1.1  gwr 	int channel;	/* two serial channels per zsc */
    116  1.1  gwr 	int hwflags;
    117  1.1  gwr };
    118  1.5  gwr #define ZS_HWFLAG_CONSOLE	1
    119  1.5  gwr #define ZS_HWFLAG_NO_DCD	2	/* Ignore the DCD bit */
    120  1.5  gwr #define ZS_HWFLAG_NO_CTS	4	/* Ignore the CTS bit */
    121  1.5  gwr #define ZS_HWFLAG_RAW   	8	/* advise raw mode */
    122  1.5  gwr 
    123  1.5  gwr int 	zsc_intr_soft __P((void *));
    124  1.5  gwr int 	zsc_intr_hard __P((void *));
    125  1.5  gwr 
    126  1.5  gwr void	zs_abort __P((struct zs_chanstate *));
    127  1.5  gwr void	zs_break __P((struct zs_chanstate *, int));
    128  1.5  gwr void	zs_iflush __P((struct zs_chanstate *));
    129  1.5  gwr void	zs_loadchannelregs __P((struct zs_chanstate *));
    130  1.5  gwr int 	zs_set_speed __P((struct zs_chanstate *, int));
    131  1.5  gwr int 	zs_set_modes __P((struct zs_chanstate *, int));
    132  1.5  gwr 
    133  1.5  gwr extern int zs_major;
    134  1.6  gwr 
    135  1.6  gwr int zs_check_kgdb __P((struct zs_chanstate *, int));
    136  1.1  gwr 
    137