z8530tty.c revision 1.13 1 1.13 gwr /* $NetBSD: z8530tty.c,v 1.13 1996/10/16 20:42:14 gwr Exp $ */
2 1.1 gwr
3 1.1 gwr /*
4 1.1 gwr * Copyright (c) 1994 Gordon W. Ross
5 1.1 gwr * Copyright (c) 1992, 1993
6 1.1 gwr * The Regents of the University of California. All rights reserved.
7 1.1 gwr *
8 1.1 gwr * This software was developed by the Computer Systems Engineering group
9 1.1 gwr * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10 1.1 gwr * contributed to Berkeley.
11 1.1 gwr *
12 1.1 gwr * All advertising materials mentioning features or use of this software
13 1.1 gwr * must display the following acknowledgement:
14 1.1 gwr * This product includes software developed by the University of
15 1.1 gwr * California, Lawrence Berkeley Laboratory.
16 1.1 gwr *
17 1.1 gwr * Redistribution and use in source and binary forms, with or without
18 1.1 gwr * modification, are permitted provided that the following conditions
19 1.1 gwr * are met:
20 1.1 gwr * 1. Redistributions of source code must retain the above copyright
21 1.1 gwr * notice, this list of conditions and the following disclaimer.
22 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright
23 1.1 gwr * notice, this list of conditions and the following disclaimer in the
24 1.1 gwr * documentation and/or other materials provided with the distribution.
25 1.1 gwr * 3. All advertising materials mentioning features or use of this software
26 1.1 gwr * must display the following acknowledgement:
27 1.1 gwr * This product includes software developed by the University of
28 1.1 gwr * California, Berkeley and its contributors.
29 1.1 gwr * 4. Neither the name of the University nor the names of its contributors
30 1.1 gwr * may be used to endorse or promote products derived from this software
31 1.1 gwr * without specific prior written permission.
32 1.1 gwr *
33 1.1 gwr * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
34 1.1 gwr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35 1.1 gwr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36 1.1 gwr * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
37 1.1 gwr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 1.1 gwr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39 1.1 gwr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 1.1 gwr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
41 1.1 gwr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42 1.1 gwr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 1.1 gwr * SUCH DAMAGE.
44 1.1 gwr *
45 1.1 gwr * @(#)zs.c 8.1 (Berkeley) 7/19/93
46 1.1 gwr */
47 1.1 gwr
48 1.1 gwr /*
49 1.1 gwr * Zilog Z8530 Dual UART driver (tty interface)
50 1.1 gwr *
51 1.1 gwr * This is the "slave" driver that will be attached to
52 1.1 gwr * the "zsc" driver for plain "tty" async. serial lines.
53 1.8 gwr *
54 1.8 gwr * Credits, history:
55 1.8 gwr *
56 1.8 gwr * The original version of this code was the sparc/dev/zs.c driver
57 1.8 gwr * as distributed with the Berkeley 4.4 Lite release. Since then,
58 1.8 gwr * Gordon Ross reorganized the code into the current parent/child
59 1.8 gwr * driver scheme, separating the Sun keyboard and mouse support
60 1.8 gwr * into independent child drivers.
61 1.8 gwr *
62 1.8 gwr * RTS/CTS flow-control support was a collaboration of:
63 1.8 gwr * Gordon Ross <gwr (at) netbsd.org>,
64 1.8 gwr * Bill Studenmund <wrstuden (at) loki.stanford.edu>
65 1.8 gwr * Ian Dall <Ian.Dall (at) dsto.defence.gov.au>
66 1.1 gwr */
67 1.1 gwr
68 1.1 gwr #include <sys/param.h>
69 1.1 gwr #include <sys/systm.h>
70 1.1 gwr #include <sys/proc.h>
71 1.1 gwr #include <sys/device.h>
72 1.1 gwr #include <sys/conf.h>
73 1.1 gwr #include <sys/file.h>
74 1.1 gwr #include <sys/ioctl.h>
75 1.6 gwr #include <sys/malloc.h>
76 1.1 gwr #include <sys/tty.h>
77 1.1 gwr #include <sys/time.h>
78 1.1 gwr #include <sys/kernel.h>
79 1.1 gwr #include <sys/syslog.h>
80 1.1 gwr
81 1.1 gwr #include <dev/ic/z8530reg.h>
82 1.1 gwr #include <machine/z8530var.h>
83 1.1 gwr
84 1.1 gwr #ifdef KGDB
85 1.1 gwr extern int zs_check_kgdb();
86 1.1 gwr #endif
87 1.1 gwr
88 1.1 gwr /*
89 1.1 gwr * Allow the MD var.h to override the default CFLAG so that
90 1.1 gwr * console messages during boot come out with correct parity.
91 1.1 gwr */
92 1.1 gwr #ifndef ZSTTY_DEF_CFLAG
93 1.1 gwr #define ZSTTY_DEF_CFLAG TTYDEF_CFLAG
94 1.1 gwr #endif
95 1.1 gwr
96 1.1 gwr /*
97 1.1 gwr * How many input characters we can buffer.
98 1.1 gwr * The port-specific var.h may override this.
99 1.1 gwr * Note: must be a power of two!
100 1.1 gwr */
101 1.1 gwr #ifndef ZSTTY_RING_SIZE
102 1.6 gwr #define ZSTTY_RING_SIZE 2048
103 1.1 gwr #endif
104 1.6 gwr
105 1.6 gwr /*
106 1.6 gwr * Make this an option variable one can patch.
107 1.6 gwr * But be warned: this must be a power of 2!
108 1.6 gwr */
109 1.6 gwr int zstty_rbuf_size = ZSTTY_RING_SIZE;
110 1.1 gwr
111 1.8 gwr /* This should usually be 3/4 of ZSTTY_RING_SIZE */
112 1.8 gwr int zstty_rbuf_hiwat = (ZSTTY_RING_SIZE - (ZSTTY_RING_SIZE >> 2));
113 1.8 gwr
114 1.1 gwr struct zstty_softc {
115 1.1 gwr struct device zst_dev; /* required first: base device */
116 1.1 gwr struct tty *zst_tty;
117 1.1 gwr struct zs_chanstate *zst_cs;
118 1.1 gwr
119 1.1 gwr int zst_hwflags; /* see z8530var.h */
120 1.1 gwr int zst_swflags; /* TIOCFLAG_SOFTCAR, ... <ttycom.h> */
121 1.1 gwr
122 1.8 gwr /*
123 1.8 gwr * Printing an overrun error message often takes long enough to
124 1.8 gwr * cause another overrun, so we only print one per second.
125 1.8 gwr */
126 1.8 gwr long zst_rotime; /* time of last ring overrun */
127 1.8 gwr long zst_fotime; /* time of last fifo overrun */
128 1.8 gwr
129 1.8 gwr /*
130 1.8 gwr * The receive ring buffer.
131 1.8 gwr */
132 1.8 gwr int zst_rbget; /* ring buffer `get' index */
133 1.8 gwr volatile int zst_rbput; /* ring buffer `put' index */
134 1.8 gwr int zst_ringmask;
135 1.8 gwr int zst_rbhiwat;
136 1.8 gwr
137 1.8 gwr u_short *zst_rbuf; /* rr1, data pairs */
138 1.1 gwr
139 1.1 gwr /*
140 1.1 gwr * The transmit byte count and address are used for pseudo-DMA
141 1.1 gwr * output in the hardware interrupt code. PDMA can be suspended
142 1.1 gwr * to get pending changes done; heldtbc is used for this. It can
143 1.1 gwr * also be stopped for ^S; this sets TS_TTSTOP in tp->t_state.
144 1.1 gwr */
145 1.1 gwr int zst_tbc; /* transmit byte count */
146 1.1 gwr caddr_t zst_tba; /* transmit buffer address */
147 1.1 gwr int zst_heldtbc; /* held tbc while xmission stopped */
148 1.1 gwr
149 1.8 gwr /* Flags to communicate with zstty_softint() */
150 1.8 gwr volatile char zst_rx_blocked; /* input block at ring */
151 1.8 gwr volatile char zst_rx_overrun; /* ring overrun */
152 1.8 gwr volatile char zst_tx_busy; /* working on an output chunk */
153 1.8 gwr volatile char zst_tx_done; /* done with one output chunk */
154 1.8 gwr volatile char zst_tx_stopped; /* H/W level stop (lost CTS) */
155 1.8 gwr volatile char zst_st_check; /* got a status interrupt */
156 1.8 gwr char pad[2];
157 1.1 gwr };
158 1.1 gwr
159 1.1 gwr
160 1.1 gwr /* Definition of the driver for autoconfig. */
161 1.1 gwr static int zstty_match(struct device *, void *, void *);
162 1.1 gwr static void zstty_attach(struct device *, struct device *, void *);
163 1.1 gwr
164 1.4 thorpej struct cfattach zstty_ca = {
165 1.4 thorpej sizeof(struct zstty_softc), zstty_match, zstty_attach
166 1.4 thorpej };
167 1.4 thorpej
168 1.4 thorpej struct cfdriver zstty_cd = {
169 1.4 thorpej NULL, "zstty", DV_TTY
170 1.1 gwr };
171 1.1 gwr
172 1.1 gwr struct zsops zsops_tty;
173 1.1 gwr
174 1.1 gwr /* Routines called from other code. */
175 1.1 gwr cdev_decl(zs); /* open, close, read, write, ioctl, stop, ... */
176 1.1 gwr
177 1.1 gwr static void zsstart(struct tty *);
178 1.1 gwr static int zsparam(struct tty *, struct termios *);
179 1.1 gwr static void zs_modem(struct zstty_softc *zst, int onoff);
180 1.8 gwr static int zshwiflow(struct tty *, int);
181 1.8 gwr static void zs_hwiflow(struct zstty_softc *, int);
182 1.1 gwr
183 1.1 gwr /*
184 1.1 gwr * zstty_match: how is this zs channel configured?
185 1.1 gwr */
186 1.1 gwr int
187 1.1 gwr zstty_match(parent, match, aux)
188 1.1 gwr struct device *parent;
189 1.1 gwr void *match, *aux;
190 1.1 gwr {
191 1.1 gwr struct cfdata *cf = match;
192 1.1 gwr struct zsc_attach_args *args = aux;
193 1.1 gwr
194 1.1 gwr /* Exact match is better than wildcard. */
195 1.1 gwr if (cf->cf_loc[0] == args->channel)
196 1.1 gwr return 2;
197 1.1 gwr
198 1.1 gwr /* This driver accepts wildcard. */
199 1.1 gwr if (cf->cf_loc[0] == -1)
200 1.1 gwr return 1;
201 1.1 gwr
202 1.1 gwr return 0;
203 1.1 gwr }
204 1.1 gwr
205 1.1 gwr void
206 1.1 gwr zstty_attach(parent, self, aux)
207 1.1 gwr struct device *parent, *self;
208 1.1 gwr void *aux;
209 1.1 gwr
210 1.1 gwr {
211 1.1 gwr struct zsc_softc *zsc = (void *) parent;
212 1.1 gwr struct zstty_softc *zst = (void *) self;
213 1.1 gwr struct zsc_attach_args *args = aux;
214 1.1 gwr struct zs_chanstate *cs;
215 1.1 gwr struct cfdata *cf;
216 1.1 gwr struct tty *tp;
217 1.1 gwr int channel, tty_unit;
218 1.1 gwr dev_t dev;
219 1.1 gwr
220 1.1 gwr cf = zst->zst_dev.dv_cfdata;
221 1.3 gwr tty_unit = zst->zst_dev.dv_unit;
222 1.1 gwr channel = args->channel;
223 1.1 gwr cs = &zsc->zsc_cs[channel];
224 1.1 gwr cs->cs_private = zst;
225 1.1 gwr cs->cs_ops = &zsops_tty;
226 1.1 gwr
227 1.1 gwr zst->zst_cs = cs;
228 1.1 gwr zst->zst_swflags = cf->cf_flags; /* softcar, etc. */
229 1.1 gwr zst->zst_hwflags = args->hwflags;
230 1.1 gwr dev = makedev(ZSTTY_MAJOR, tty_unit);
231 1.1 gwr
232 1.1 gwr if (zst->zst_swflags)
233 1.12 christos printf(" flags 0x%x", zst->zst_swflags);
234 1.1 gwr
235 1.1 gwr if (zst->zst_hwflags & ZS_HWFLAG_CONSOLE)
236 1.12 christos printf(" (console)");
237 1.1 gwr else {
238 1.1 gwr #ifdef KGDB
239 1.1 gwr /*
240 1.1 gwr * Allow kgdb to "take over" this port. If this port is
241 1.1 gwr * NOT the kgdb port, zs_check_kgdb() will return zero.
242 1.1 gwr * If it IS the kgdb port, it will print "kgdb,...\n"
243 1.1 gwr * and then return non-zero.
244 1.1 gwr */
245 1.1 gwr if (zs_check_kgdb(cs, dev)) {
246 1.1 gwr /*
247 1.1 gwr * This is the kgdb port (exclusive use)
248 1.1 gwr * so skip the normal attach code.
249 1.1 gwr */
250 1.1 gwr return;
251 1.1 gwr }
252 1.1 gwr #endif
253 1.1 gwr }
254 1.12 christos printf("\n");
255 1.1 gwr
256 1.6 gwr tp = ttymalloc();
257 1.1 gwr tp->t_dev = dev;
258 1.1 gwr tp->t_oproc = zsstart;
259 1.1 gwr tp->t_param = zsparam;
260 1.8 gwr tp->t_hwiflow = zshwiflow;
261 1.9 gwr tty_attach(tp);
262 1.1 gwr
263 1.6 gwr zst->zst_tty = tp;
264 1.8 gwr zst->zst_rbhiwat = zstty_rbuf_size; /* impossible value */
265 1.6 gwr zst->zst_ringmask = zstty_rbuf_size - 1;
266 1.6 gwr zst->zst_rbuf = malloc(zstty_rbuf_size * sizeof(zst->zst_rbuf[0]),
267 1.6 gwr M_DEVBUF, M_WAITOK);
268 1.6 gwr
269 1.1 gwr /*
270 1.1 gwr * Hardware init
271 1.1 gwr */
272 1.1 gwr if (zst->zst_hwflags & ZS_HWFLAG_CONSOLE) {
273 1.1 gwr /* This unit is the console. */
274 1.1 gwr zst->zst_swflags |= TIOCFLAG_SOFTCAR;
275 1.1 gwr /* Call _param so interrupts get enabled. */
276 1.1 gwr cs->cs_defspeed = zs_getspeed(cs);
277 1.1 gwr tp->t_ispeed = cs->cs_defspeed;
278 1.1 gwr tp->t_ospeed = cs->cs_defspeed;
279 1.1 gwr tp->t_cflag = ZSTTY_DEF_CFLAG;
280 1.1 gwr (void) zsparam(tp, &tp->t_termios);
281 1.1 gwr } else {
282 1.1 gwr /* Not the console; may need reset. */
283 1.1 gwr int reset, s;
284 1.1 gwr reset = (channel == 0) ?
285 1.1 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
286 1.1 gwr s = splzs();
287 1.2 gwr zs_write_reg(cs, 9, reset);
288 1.1 gwr splx(s);
289 1.1 gwr }
290 1.1 gwr
291 1.1 gwr /*
292 1.1 gwr * Initialize state of modem control lines (DTR).
293 1.1 gwr * If softcar is set, turn on DTR now and leave it.
294 1.1 gwr * otherwise, turn off DTR now, and raise in open.
295 1.1 gwr * (Keeps modem from answering too early.)
296 1.1 gwr */
297 1.1 gwr zs_modem(zst, (zst->zst_swflags & TIOCFLAG_SOFTCAR) ? 1 : 0);
298 1.1 gwr }
299 1.1 gwr
300 1.1 gwr
301 1.1 gwr /*
302 1.1 gwr * Return pointer to our tty.
303 1.1 gwr */
304 1.1 gwr struct tty *
305 1.1 gwr zstty(dev)
306 1.1 gwr dev_t dev;
307 1.1 gwr {
308 1.1 gwr struct zstty_softc *zst;
309 1.1 gwr int unit = minor(dev);
310 1.1 gwr
311 1.1 gwr #ifdef DIAGNOSTIC
312 1.4 thorpej if (unit >= zstty_cd.cd_ndevs)
313 1.1 gwr panic("zstty");
314 1.1 gwr #endif
315 1.4 thorpej zst = zstty_cd.cd_devs[unit];
316 1.1 gwr return (zst->zst_tty);
317 1.1 gwr }
318 1.1 gwr
319 1.1 gwr
320 1.1 gwr /*
321 1.1 gwr * Open a zs serial (tty) port.
322 1.1 gwr */
323 1.1 gwr int
324 1.1 gwr zsopen(dev, flags, mode, p)
325 1.1 gwr dev_t dev;
326 1.1 gwr int flags;
327 1.1 gwr int mode;
328 1.1 gwr struct proc *p;
329 1.1 gwr {
330 1.1 gwr register struct tty *tp;
331 1.1 gwr register struct zs_chanstate *cs;
332 1.1 gwr struct zstty_softc *zst;
333 1.1 gwr int error, s, unit;
334 1.1 gwr
335 1.1 gwr unit = minor(dev);
336 1.4 thorpej if (unit >= zstty_cd.cd_ndevs)
337 1.1 gwr return (ENXIO);
338 1.4 thorpej zst = zstty_cd.cd_devs[unit];
339 1.1 gwr if (zst == NULL)
340 1.1 gwr return (ENXIO);
341 1.1 gwr tp = zst->zst_tty;
342 1.1 gwr cs = zst->zst_cs;
343 1.1 gwr
344 1.1 gwr /* If KGDB took the line, then tp==NULL */
345 1.1 gwr if (tp == NULL)
346 1.1 gwr return (EBUSY);
347 1.1 gwr
348 1.1 gwr /* It's simpler to do this up here. */
349 1.1 gwr if (((tp->t_state & (TS_ISOPEN | TS_XCLUDE))
350 1.1 gwr == (TS_ISOPEN | TS_XCLUDE))
351 1.1 gwr && (p->p_ucred->cr_uid != 0) )
352 1.1 gwr {
353 1.1 gwr return (EBUSY);
354 1.1 gwr }
355 1.1 gwr
356 1.1 gwr s = spltty();
357 1.1 gwr
358 1.1 gwr if ((tp->t_state & TS_ISOPEN) == 0) {
359 1.1 gwr /* First open. */
360 1.1 gwr ttychars(tp);
361 1.1 gwr tp->t_iflag = TTYDEF_IFLAG;
362 1.1 gwr tp->t_oflag = TTYDEF_OFLAG;
363 1.1 gwr tp->t_cflag = ZSTTY_DEF_CFLAG;
364 1.1 gwr if (zst->zst_swflags & TIOCFLAG_CLOCAL)
365 1.1 gwr tp->t_cflag |= CLOCAL;
366 1.1 gwr if (zst->zst_swflags & TIOCFLAG_CRTSCTS)
367 1.1 gwr tp->t_cflag |= CRTSCTS;
368 1.1 gwr if (zst->zst_swflags & TIOCFLAG_MDMBUF)
369 1.1 gwr tp->t_cflag |= MDMBUF;
370 1.1 gwr tp->t_lflag = TTYDEF_LFLAG;
371 1.1 gwr tp->t_ispeed = tp->t_ospeed = cs->cs_defspeed;
372 1.1 gwr (void) zsparam(tp, &tp->t_termios);
373 1.1 gwr ttsetwater(tp);
374 1.1 gwr /* Flush any pending input. */
375 1.1 gwr zst->zst_rbget = zst->zst_rbput;
376 1.1 gwr zs_iflush(cs); /* XXX */
377 1.1 gwr /* Turn on DTR */
378 1.1 gwr zs_modem(zst, 1);
379 1.1 gwr if (zst->zst_swflags & TIOCFLAG_SOFTCAR) {
380 1.1 gwr tp->t_state |= TS_CARR_ON;
381 1.1 gwr }
382 1.1 gwr }
383 1.1 gwr error = 0;
384 1.1 gwr
385 1.1 gwr /* Wait for carrier. */
386 1.1 gwr for (;;) {
387 1.1 gwr
388 1.1 gwr /* Might never get status intr if carrier already on. */
389 1.5 gwr cs->cs_rr0 = zs_read_csr(cs);
390 1.5 gwr if (cs->cs_rr0 & ZSRR0_DCD) {
391 1.1 gwr tp->t_state |= TS_CARR_ON;
392 1.1 gwr break;
393 1.1 gwr }
394 1.1 gwr
395 1.1 gwr if ((tp->t_state & TS_CARR_ON) ||
396 1.1 gwr (tp->t_cflag & CLOCAL) ||
397 1.1 gwr (flags & O_NONBLOCK) )
398 1.1 gwr {
399 1.1 gwr break;
400 1.1 gwr }
401 1.1 gwr
402 1.1 gwr tp->t_state |= TS_WOPEN;
403 1.1 gwr error = ttysleep(tp, (caddr_t)&tp->t_rawq,
404 1.1 gwr TTIPRI | PCATCH, ttopen, 0);
405 1.1 gwr if (error) {
406 1.1 gwr if ((tp->t_state & TS_ISOPEN) == 0) {
407 1.1 gwr /* Never get here with softcar */
408 1.1 gwr zs_modem(zst, 0);
409 1.1 gwr tp->t_state &= ~TS_WOPEN;
410 1.1 gwr ttwakeup(tp);
411 1.1 gwr }
412 1.1 gwr break;
413 1.1 gwr }
414 1.1 gwr }
415 1.1 gwr
416 1.1 gwr splx(s);
417 1.1 gwr
418 1.1 gwr if (error == 0)
419 1.1 gwr error = linesw[tp->t_line].l_open(dev, tp);
420 1.1 gwr
421 1.1 gwr return (error);
422 1.1 gwr }
423 1.1 gwr
424 1.1 gwr /*
425 1.1 gwr * Close a zs serial port.
426 1.1 gwr */
427 1.1 gwr int
428 1.1 gwr zsclose(dev, flags, mode, p)
429 1.1 gwr dev_t dev;
430 1.1 gwr int flags;
431 1.1 gwr int mode;
432 1.1 gwr struct proc *p;
433 1.1 gwr {
434 1.1 gwr struct zstty_softc *zst;
435 1.1 gwr register struct zs_chanstate *cs;
436 1.1 gwr register struct tty *tp;
437 1.1 gwr struct zsinfo *zi;
438 1.1 gwr int hup, s;
439 1.1 gwr
440 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
441 1.1 gwr cs = zst->zst_cs;
442 1.1 gwr tp = zst->zst_tty;
443 1.1 gwr
444 1.1 gwr /* XXX This is for cons.c. */
445 1.1 gwr if ((tp->t_state & TS_ISOPEN) == 0)
446 1.1 gwr return 0;
447 1.1 gwr
448 1.1 gwr (*linesw[tp->t_line].l_close)(tp, flags);
449 1.1 gwr hup = tp->t_cflag & HUPCL;
450 1.1 gwr if (zst->zst_swflags & TIOCFLAG_SOFTCAR)
451 1.1 gwr hup = 0;
452 1.1 gwr if (hup) {
453 1.1 gwr zs_modem(zst, 0);
454 1.1 gwr /* hold low for 1 second */
455 1.1 gwr (void) tsleep((caddr_t)cs, TTIPRI, ttclos, hz);
456 1.1 gwr }
457 1.1 gwr if (cs->cs_creg[5] & ZSWR5_BREAK) {
458 1.1 gwr zs_break(cs, 0);
459 1.1 gwr }
460 1.1 gwr /* XXX - turn off interrupts? */
461 1.1 gwr
462 1.1 gwr ttyclose(tp);
463 1.1 gwr return (0);
464 1.1 gwr }
465 1.1 gwr
466 1.1 gwr /*
467 1.1 gwr * Read/write zs serial port.
468 1.1 gwr */
469 1.1 gwr int
470 1.1 gwr zsread(dev, uio, flags)
471 1.1 gwr dev_t dev;
472 1.1 gwr struct uio *uio;
473 1.1 gwr int flags;
474 1.1 gwr {
475 1.1 gwr register struct zstty_softc *zst;
476 1.1 gwr register struct tty *tp;
477 1.1 gwr
478 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
479 1.1 gwr tp = zst->zst_tty;
480 1.1 gwr return (linesw[tp->t_line].l_read(tp, uio, flags));
481 1.1 gwr }
482 1.1 gwr
483 1.1 gwr int
484 1.1 gwr zswrite(dev, uio, flags)
485 1.1 gwr dev_t dev;
486 1.1 gwr struct uio *uio;
487 1.1 gwr int flags;
488 1.1 gwr {
489 1.1 gwr register struct zstty_softc *zst;
490 1.1 gwr register struct tty *tp;
491 1.1 gwr
492 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
493 1.1 gwr tp = zst->zst_tty;
494 1.1 gwr return (linesw[tp->t_line].l_write(tp, uio, flags));
495 1.1 gwr }
496 1.1 gwr
497 1.1 gwr #define TIOCFLAG_ALL (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | \
498 1.1 gwr TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF )
499 1.1 gwr
500 1.1 gwr int
501 1.1 gwr zsioctl(dev, cmd, data, flag, p)
502 1.1 gwr dev_t dev;
503 1.1 gwr u_long cmd;
504 1.1 gwr caddr_t data;
505 1.1 gwr int flag;
506 1.1 gwr struct proc *p;
507 1.1 gwr {
508 1.1 gwr register struct zstty_softc *zst;
509 1.1 gwr register struct zs_chanstate *cs;
510 1.1 gwr register struct tty *tp;
511 1.1 gwr register int error, tmp;
512 1.1 gwr
513 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
514 1.1 gwr cs = zst->zst_cs;
515 1.1 gwr tp = zst->zst_tty;
516 1.1 gwr
517 1.1 gwr error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
518 1.1 gwr if (error >= 0)
519 1.1 gwr return (error);
520 1.1 gwr error = ttioctl(tp, cmd, data, flag, p);
521 1.1 gwr if (error >= 0)
522 1.1 gwr return (error);
523 1.1 gwr
524 1.1 gwr switch (cmd) {
525 1.1 gwr
526 1.1 gwr case TIOCSBRK:
527 1.1 gwr zs_break(cs, 1);
528 1.1 gwr break;
529 1.1 gwr
530 1.1 gwr case TIOCCBRK:
531 1.1 gwr zs_break(cs, 0);
532 1.1 gwr break;
533 1.1 gwr
534 1.1 gwr case TIOCGFLAGS:
535 1.1 gwr *(int *)data = zst->zst_swflags;
536 1.1 gwr break;
537 1.1 gwr
538 1.1 gwr case TIOCSFLAGS:
539 1.1 gwr error = suser(p->p_ucred, &p->p_acflag);
540 1.1 gwr if (error != 0)
541 1.1 gwr return (EPERM);
542 1.1 gwr tmp = *(int *)data;
543 1.1 gwr /* Check for random bits... */
544 1.1 gwr if (tmp & ~TIOCFLAG_ALL)
545 1.1 gwr return(EINVAL);
546 1.1 gwr /* Silently enforce softcar on the console. */
547 1.1 gwr if (zst->zst_hwflags & ZS_HWFLAG_CONSOLE)
548 1.1 gwr tmp |= TIOCFLAG_SOFTCAR;
549 1.1 gwr /* These flags take effect during open. */
550 1.1 gwr zst->zst_swflags = tmp;
551 1.1 gwr break;
552 1.1 gwr
553 1.1 gwr case TIOCSDTR:
554 1.1 gwr zs_modem(zst, 1);
555 1.1 gwr break;
556 1.1 gwr
557 1.1 gwr case TIOCCDTR:
558 1.1 gwr zs_modem(zst, 0);
559 1.1 gwr break;
560 1.1 gwr
561 1.1 gwr case TIOCMSET:
562 1.1 gwr case TIOCMBIS:
563 1.1 gwr case TIOCMBIC:
564 1.1 gwr case TIOCMGET:
565 1.1 gwr default:
566 1.1 gwr return (ENOTTY);
567 1.1 gwr }
568 1.1 gwr return (0);
569 1.1 gwr }
570 1.1 gwr
571 1.1 gwr /*
572 1.1 gwr * Start or restart transmission.
573 1.1 gwr */
574 1.1 gwr static void
575 1.1 gwr zsstart(tp)
576 1.1 gwr register struct tty *tp;
577 1.1 gwr {
578 1.1 gwr register struct zstty_softc *zst;
579 1.1 gwr register struct zs_chanstate *cs;
580 1.1 gwr register int s, nch;
581 1.1 gwr
582 1.4 thorpej zst = zstty_cd.cd_devs[minor(tp->t_dev)];
583 1.1 gwr cs = zst->zst_cs;
584 1.1 gwr
585 1.1 gwr s = spltty();
586 1.1 gwr
587 1.1 gwr /*
588 1.1 gwr * If currently active or delaying, no need to do anything.
589 1.1 gwr */
590 1.1 gwr if (tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP))
591 1.1 gwr goto out;
592 1.1 gwr
593 1.1 gwr /*
594 1.8 gwr * If under CRTSCTS hfc and halted, do nothing
595 1.8 gwr */
596 1.8 gwr if (tp->t_cflag & CRTSCTS)
597 1.8 gwr if (zst->zst_tx_stopped)
598 1.8 gwr goto out;
599 1.8 gwr
600 1.8 gwr /*
601 1.1 gwr * If there are sleepers, and output has drained below low
602 1.1 gwr * water mark, awaken.
603 1.1 gwr */
604 1.1 gwr if (tp->t_outq.c_cc <= tp->t_lowat) {
605 1.1 gwr if (tp->t_state & TS_ASLEEP) {
606 1.1 gwr tp->t_state &= ~TS_ASLEEP;
607 1.1 gwr wakeup((caddr_t)&tp->t_outq);
608 1.1 gwr }
609 1.1 gwr selwakeup(&tp->t_wsel);
610 1.1 gwr }
611 1.1 gwr
612 1.1 gwr nch = ndqb(&tp->t_outq, 0); /* XXX */
613 1.8 gwr (void) splzs();
614 1.8 gwr
615 1.1 gwr if (nch) {
616 1.1 gwr register char *p = tp->t_outq.c_cf;
617 1.1 gwr
618 1.1 gwr /* mark busy, enable tx done interrupts, & send first byte */
619 1.1 gwr tp->t_state |= TS_BUSY;
620 1.8 gwr zst->zst_tx_busy = 1;
621 1.1 gwr cs->cs_preg[1] |= ZSWR1_TIE;
622 1.8 gwr cs->cs_creg[1] = cs->cs_preg[1];
623 1.2 gwr zs_write_reg(cs, 1, cs->cs_creg[1]);
624 1.2 gwr zs_write_data(cs, *p);
625 1.1 gwr zst->zst_tba = p + 1;
626 1.1 gwr zst->zst_tbc = nch - 1;
627 1.1 gwr } else {
628 1.1 gwr /*
629 1.1 gwr * Nothing to send, turn off transmit done interrupts.
630 1.1 gwr * This is useful if something is doing polled output.
631 1.1 gwr */
632 1.1 gwr cs->cs_preg[1] &= ~ZSWR1_TIE;
633 1.8 gwr cs->cs_creg[1] = cs->cs_preg[1];
634 1.2 gwr zs_write_reg(cs, 1, cs->cs_creg[1]);
635 1.1 gwr }
636 1.1 gwr out:
637 1.1 gwr splx(s);
638 1.1 gwr }
639 1.1 gwr
640 1.1 gwr /*
641 1.1 gwr * Stop output, e.g., for ^S or output flush.
642 1.1 gwr */
643 1.10 mycroft void
644 1.1 gwr zsstop(tp, flag)
645 1.1 gwr struct tty *tp;
646 1.1 gwr int flag;
647 1.1 gwr {
648 1.1 gwr register struct zstty_softc *zst;
649 1.1 gwr register struct zs_chanstate *cs;
650 1.1 gwr register int s;
651 1.1 gwr
652 1.4 thorpej zst = zstty_cd.cd_devs[minor(tp->t_dev)];
653 1.1 gwr cs = zst->zst_cs;
654 1.1 gwr
655 1.1 gwr s = splzs();
656 1.1 gwr if (tp->t_state & TS_BUSY) {
657 1.1 gwr /*
658 1.1 gwr * Device is transmitting; must stop it.
659 1.8 gwr * Also clear _heldtbc to prevent any
660 1.8 gwr * flow-control event from resuming.
661 1.1 gwr */
662 1.1 gwr zst->zst_tbc = 0;
663 1.8 gwr zst->zst_heldtbc = 0;
664 1.1 gwr if ((tp->t_state & TS_TTSTOP) == 0)
665 1.1 gwr tp->t_state |= TS_FLUSH;
666 1.1 gwr }
667 1.1 gwr splx(s);
668 1.1 gwr }
669 1.1 gwr
670 1.1 gwr /*
671 1.1 gwr * Set ZS tty parameters from termios.
672 1.1 gwr * XXX - Should just copy the whole termios after
673 1.1 gwr * making sure all the changes could be done.
674 1.1 gwr * XXX - Only whack the UART when params change...
675 1.1 gwr */
676 1.1 gwr static int
677 1.1 gwr zsparam(tp, t)
678 1.1 gwr register struct tty *tp;
679 1.1 gwr register struct termios *t;
680 1.1 gwr {
681 1.1 gwr register struct zstty_softc *zst;
682 1.1 gwr register struct zs_chanstate *cs;
683 1.1 gwr register int s, bps, cflag, tconst;
684 1.1 gwr u_char tmp3, tmp4, tmp5, reset;
685 1.1 gwr
686 1.4 thorpej zst = zstty_cd.cd_devs[minor(tp->t_dev)];
687 1.1 gwr cs = zst->zst_cs;
688 1.1 gwr
689 1.8 gwr /* XXX: Need to use an MD function for this. */
690 1.1 gwr bps = t->c_ospeed;
691 1.1 gwr if (bps < 0 || (t->c_ispeed && t->c_ispeed != bps))
692 1.1 gwr return (EINVAL);
693 1.1 gwr if (bps == 0) {
694 1.1 gwr /* stty 0 => drop DTR and RTS */
695 1.1 gwr zs_modem(zst, 0);
696 1.1 gwr return (0);
697 1.1 gwr }
698 1.7 gwr tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
699 1.1 gwr if (tconst < 0)
700 1.1 gwr return (EINVAL);
701 1.1 gwr
702 1.1 gwr /* Convert back to make sure we can do it. */
703 1.7 gwr bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
704 1.1 gwr if (bps != t->c_ospeed)
705 1.1 gwr return (EINVAL);
706 1.1 gwr tp->t_ispeed = tp->t_ospeed = bps;
707 1.1 gwr
708 1.1 gwr cflag = t->c_cflag;
709 1.1 gwr tp->t_cflag = cflag;
710 1.1 gwr
711 1.1 gwr /*
712 1.1 gwr * Block interrupts so that state will not
713 1.1 gwr * be altered until we are done setting it up.
714 1.1 gwr */
715 1.1 gwr s = splzs();
716 1.1 gwr
717 1.1 gwr /*
718 1.1 gwr * Initial values in cs_preg are set before
719 1.1 gwr * our attach routine is called. The master
720 1.1 gwr * interrupt enable is handled by zsc.c
721 1.1 gwr */
722 1.1 gwr
723 1.1 gwr cs->cs_preg[12] = tconst;
724 1.1 gwr cs->cs_preg[13] = tconst >> 8;
725 1.1 gwr
726 1.1 gwr switch (cflag & CSIZE) {
727 1.1 gwr case CS5:
728 1.1 gwr tmp3 = ZSWR3_RX_5;
729 1.1 gwr tmp5 = ZSWR5_TX_5;
730 1.1 gwr break;
731 1.1 gwr case CS6:
732 1.1 gwr tmp3 = ZSWR3_RX_6;
733 1.1 gwr tmp5 = ZSWR5_TX_6;
734 1.1 gwr break;
735 1.1 gwr case CS7:
736 1.1 gwr tmp3 = ZSWR3_RX_7;
737 1.1 gwr tmp5 = ZSWR5_TX_7;
738 1.1 gwr break;
739 1.1 gwr case CS8:
740 1.1 gwr default:
741 1.1 gwr tmp3 = ZSWR3_RX_8;
742 1.1 gwr tmp5 = ZSWR5_TX_8;
743 1.1 gwr break;
744 1.1 gwr }
745 1.1 gwr
746 1.8 gwr cs->cs_preg[3] = tmp3 | ZSWR3_RX_ENABLE;
747 1.1 gwr cs->cs_preg[5] = tmp5 | ZSWR5_TX_ENABLE | ZSWR5_DTR | ZSWR5_RTS;
748 1.1 gwr
749 1.1 gwr tmp4 = ZSWR4_CLK_X16 | (cflag & CSTOPB ? ZSWR4_TWOSB : ZSWR4_ONESB);
750 1.1 gwr if ((cflag & PARODD) == 0)
751 1.1 gwr tmp4 |= ZSWR4_EVENP;
752 1.1 gwr if (cflag & PARENB)
753 1.1 gwr tmp4 |= ZSWR4_PARENB;
754 1.1 gwr cs->cs_preg[4] = tmp4;
755 1.1 gwr
756 1.1 gwr /*
757 1.8 gwr * Output hardware flow control on the chip is horrendous:
758 1.8 gwr * if carrier detect drops, the receiver is disabled.
759 1.8 gwr * Therefore, NEVER set the HFC bit, and instead use
760 1.8 gwr * the status interrupts to detect CTS changes.
761 1.8 gwr */
762 1.8 gwr if (cflag & CRTSCTS) {
763 1.8 gwr zst->zst_rbhiwat = zstty_rbuf_hiwat;
764 1.8 gwr cs->cs_preg[15] |= ZSWR15_CTS_IE;
765 1.8 gwr } else {
766 1.8 gwr zst->zst_rbhiwat = zstty_rbuf_size; /* impossible value */
767 1.8 gwr cs->cs_preg[15] &= ~ZSWR15_CTS_IE;
768 1.8 gwr }
769 1.8 gwr
770 1.8 gwr /*
771 1.1 gwr * If nothing is being transmitted, set up new current values,
772 1.1 gwr * else mark them as pending.
773 1.1 gwr */
774 1.1 gwr if (cs->cs_heldchange == 0) {
775 1.8 gwr if (zst->zst_tx_busy) {
776 1.1 gwr zst->zst_heldtbc = zst->zst_tbc;
777 1.1 gwr zst->zst_tbc = 0;
778 1.9 gwr cs->cs_heldchange = 0xFF; /* XXX */
779 1.1 gwr } else {
780 1.1 gwr zs_loadchannelregs(cs);
781 1.1 gwr }
782 1.1 gwr }
783 1.1 gwr splx(s);
784 1.1 gwr return (0);
785 1.1 gwr }
786 1.1 gwr
787 1.1 gwr /*
788 1.1 gwr * Raise or lower modem control (DTR/RTS) signals. If a character is
789 1.1 gwr * in transmission, the change is deferred.
790 1.1 gwr */
791 1.1 gwr static void
792 1.1 gwr zs_modem(zst, onoff)
793 1.1 gwr struct zstty_softc *zst;
794 1.1 gwr int onoff;
795 1.1 gwr {
796 1.1 gwr struct zs_chanstate *cs;
797 1.1 gwr struct tty *tp;
798 1.1 gwr int s, bis, and;
799 1.1 gwr
800 1.1 gwr cs = zst->zst_cs;
801 1.1 gwr tp = zst->zst_tty;
802 1.1 gwr
803 1.1 gwr if (onoff) {
804 1.1 gwr bis = ZSWR5_DTR | ZSWR5_RTS;
805 1.1 gwr and = ~0;
806 1.1 gwr } else {
807 1.1 gwr bis = 0;
808 1.1 gwr and = ~(ZSWR5_DTR | ZSWR5_RTS);
809 1.1 gwr }
810 1.1 gwr s = splzs();
811 1.1 gwr cs->cs_preg[5] = (cs->cs_preg[5] | bis) & and;
812 1.1 gwr if (cs->cs_heldchange == 0) {
813 1.8 gwr if (zst->zst_tx_busy) {
814 1.1 gwr zst->zst_heldtbc = zst->zst_tbc;
815 1.1 gwr zst->zst_tbc = 0;
816 1.8 gwr cs->cs_heldchange = (1<<5);
817 1.1 gwr } else {
818 1.8 gwr cs->cs_creg[5] = cs->cs_preg[5];
819 1.2 gwr zs_write_reg(cs, 5, cs->cs_creg[5]);
820 1.1 gwr }
821 1.1 gwr }
822 1.1 gwr splx(s);
823 1.1 gwr }
824 1.1 gwr
825 1.8 gwr /*
826 1.8 gwr * Try to block or unblock input using hardware flow-control.
827 1.8 gwr * This is called by kern/tty.c if MDMBUF|CRTSCTS is set, and
828 1.8 gwr * if this function returns non-zero, the TS_TBLOCK flag will
829 1.8 gwr * be set or cleared according to the "stop" arg passed.
830 1.8 gwr */
831 1.8 gwr int
832 1.8 gwr zshwiflow(tp, stop)
833 1.8 gwr struct tty *tp;
834 1.8 gwr int stop;
835 1.8 gwr {
836 1.8 gwr register struct zstty_softc *zst;
837 1.8 gwr int s;
838 1.8 gwr
839 1.8 gwr zst = zstty_cd.cd_devs[minor(tp->t_dev)];
840 1.8 gwr
841 1.8 gwr s = splzs();
842 1.8 gwr if (stop) {
843 1.8 gwr /*
844 1.8 gwr * The tty layer is asking us to block input.
845 1.8 gwr * If we already did it, just return TRUE.
846 1.8 gwr */
847 1.8 gwr if (zst->zst_rx_blocked)
848 1.8 gwr goto out;
849 1.8 gwr zst->zst_rx_blocked = 1;
850 1.8 gwr } else {
851 1.8 gwr /*
852 1.8 gwr * The tty layer is asking us to resume input.
853 1.8 gwr * The input ring is always empty by now.
854 1.8 gwr */
855 1.8 gwr zst->zst_rx_blocked = 0;
856 1.8 gwr }
857 1.8 gwr zs_hwiflow(zst, stop);
858 1.8 gwr out:
859 1.8 gwr splx(s);
860 1.8 gwr return 1;
861 1.8 gwr }
862 1.8 gwr
863 1.8 gwr /*
864 1.8 gwr * Internal version of zshwiflow
865 1.8 gwr * called at splzs
866 1.8 gwr */
867 1.8 gwr static void
868 1.8 gwr zs_hwiflow(zst, stop)
869 1.8 gwr register struct zstty_softc *zst;
870 1.8 gwr int stop;
871 1.8 gwr {
872 1.8 gwr register struct zs_chanstate *cs;
873 1.8 gwr register struct tty *tp;
874 1.8 gwr register int bis, and;
875 1.8 gwr
876 1.8 gwr cs = zst->zst_cs;
877 1.8 gwr tp = zst->zst_tty;
878 1.8 gwr
879 1.8 gwr if (stop) {
880 1.8 gwr /* Block input (Lower RTS) */
881 1.8 gwr bis = 0;
882 1.8 gwr and = ~ZSWR5_RTS;
883 1.8 gwr } else {
884 1.8 gwr /* Unblock input (Raise RTS) */
885 1.8 gwr bis = ZSWR5_RTS;
886 1.8 gwr and = ~0;
887 1.8 gwr }
888 1.8 gwr
889 1.8 gwr cs->cs_preg[5] = (cs->cs_preg[5] | bis) & and;
890 1.8 gwr if (cs->cs_heldchange == 0) {
891 1.8 gwr if (zst->zst_tx_busy) {
892 1.8 gwr zst->zst_heldtbc = zst->zst_tbc;
893 1.8 gwr zst->zst_tbc = 0;
894 1.8 gwr cs->cs_heldchange = (1<<5);
895 1.8 gwr } else {
896 1.8 gwr cs->cs_creg[5] = cs->cs_preg[5];
897 1.8 gwr zs_write_reg(cs, 5, cs->cs_creg[5]);
898 1.8 gwr }
899 1.8 gwr }
900 1.8 gwr }
901 1.8 gwr
902 1.1 gwr
903 1.1 gwr /****************************************************************
904 1.1 gwr * Interface to the lower layer (zscc)
905 1.1 gwr ****************************************************************/
906 1.3 gwr
907 1.1 gwr
908 1.6 gwr /*
909 1.8 gwr * receiver ready interrupt.
910 1.8 gwr * called at splzs
911 1.6 gwr */
912 1.6 gwr static void
913 1.1 gwr zstty_rxint(cs)
914 1.1 gwr register struct zs_chanstate *cs;
915 1.1 gwr {
916 1.1 gwr register struct zstty_softc *zst;
917 1.8 gwr register int cc, put, put_next, ringmask;
918 1.1 gwr register u_char c, rr0, rr1;
919 1.8 gwr register u_short ch_rr1;
920 1.1 gwr
921 1.1 gwr zst = cs->cs_private;
922 1.1 gwr put = zst->zst_rbput;
923 1.6 gwr ringmask = zst->zst_ringmask;
924 1.1 gwr
925 1.1 gwr nextchar:
926 1.1 gwr
927 1.5 gwr /*
928 1.5 gwr * First read the status, because reading the received char
929 1.5 gwr * destroys the status of this char.
930 1.5 gwr */
931 1.2 gwr rr1 = zs_read_reg(cs, 1);
932 1.5 gwr c = zs_read_data(cs);
933 1.8 gwr ch_rr1 = (c << 8) | rr1;
934 1.1 gwr
935 1.8 gwr if (ch_rr1 & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE)) {
936 1.1 gwr /* Clear the receive error. */
937 1.2 gwr zs_write_csr(cs, ZSWR0_RESET_ERRORS);
938 1.1 gwr }
939 1.1 gwr
940 1.8 gwr /* XXX: Check for the stop character? */
941 1.8 gwr
942 1.8 gwr zst->zst_rbuf[put] = ch_rr1;
943 1.6 gwr put_next = (put + 1) & ringmask;
944 1.1 gwr
945 1.1 gwr /* Would overrun if increment makes (put==get). */
946 1.1 gwr if (put_next == zst->zst_rbget) {
947 1.8 gwr zst->zst_rx_overrun = 1;
948 1.1 gwr } else {
949 1.1 gwr /* OK, really increment. */
950 1.1 gwr put = put_next;
951 1.1 gwr }
952 1.1 gwr
953 1.1 gwr /* Keep reading until the FIFO is empty. */
954 1.2 gwr rr0 = zs_read_csr(cs);
955 1.1 gwr if (rr0 & ZSRR0_RX_READY)
956 1.1 gwr goto nextchar;
957 1.1 gwr
958 1.1 gwr /* Done reading. */
959 1.1 gwr zst->zst_rbput = put;
960 1.1 gwr
961 1.8 gwr /*
962 1.8 gwr * If ring is getting too full, try to block input.
963 1.8 gwr */
964 1.8 gwr cc = put - zst->zst_rbget;
965 1.8 gwr if (cc < 0)
966 1.8 gwr cc += zstty_rbuf_size;
967 1.8 gwr if ((cc > zst->zst_rbhiwat) && (zst->zst_rx_blocked == 0)) {
968 1.8 gwr zst->zst_rx_blocked = 1;
969 1.8 gwr zs_hwiflow(zst, 1);
970 1.8 gwr }
971 1.8 gwr
972 1.1 gwr /* Ask for softint() call. */
973 1.1 gwr cs->cs_softreq = 1;
974 1.1 gwr }
975 1.1 gwr
976 1.6 gwr /*
977 1.6 gwr * transmitter ready interrupt. (splzs)
978 1.6 gwr */
979 1.6 gwr static void
980 1.1 gwr zstty_txint(cs)
981 1.1 gwr register struct zs_chanstate *cs;
982 1.1 gwr {
983 1.1 gwr register struct zstty_softc *zst;
984 1.6 gwr register int count;
985 1.1 gwr
986 1.1 gwr zst = cs->cs_private;
987 1.8 gwr
988 1.8 gwr /*
989 1.8 gwr * If we suspended output for a "held" change,
990 1.8 gwr * then handle that now and resume.
991 1.8 gwr * Do flow-control changes ASAP.
992 1.8 gwr * When the only change is for flow control,
993 1.8 gwr * avoid hitting other registers, because that
994 1.8 gwr * often makes the stupid zs drop input...
995 1.8 gwr */
996 1.8 gwr if (cs->cs_heldchange) {
997 1.8 gwr if (cs->cs_heldchange == (1<<5)) {
998 1.8 gwr /* Avoid whacking the chip... */
999 1.8 gwr cs->cs_creg[5] = cs->cs_preg[5];
1000 1.8 gwr zs_write_reg(cs, 5, cs->cs_creg[5]);
1001 1.8 gwr } else
1002 1.8 gwr zs_loadchannelregs(cs);
1003 1.8 gwr cs->cs_heldchange = 0;
1004 1.8 gwr count = zst->zst_heldtbc;
1005 1.8 gwr } else
1006 1.8 gwr count = zst->zst_tbc;
1007 1.1 gwr
1008 1.6 gwr /*
1009 1.6 gwr * If our transmit buffer still has data,
1010 1.6 gwr * just send the next character.
1011 1.6 gwr */
1012 1.1 gwr if (count > 0) {
1013 1.1 gwr /* Send the next char. */
1014 1.6 gwr zst->zst_tbc = --count;
1015 1.2 gwr zs_write_data(cs, *zst->zst_tba);
1016 1.2 gwr zst->zst_tba++;
1017 1.6 gwr return;
1018 1.1 gwr }
1019 1.1 gwr
1020 1.6 gwr zs_write_csr(cs, ZSWR0_RESET_TXINT);
1021 1.6 gwr
1022 1.6 gwr /* Ask the softint routine for more output. */
1023 1.8 gwr zst->zst_tx_busy = 0;
1024 1.8 gwr zst->zst_tx_done = 1;
1025 1.6 gwr cs->cs_softreq = 1;
1026 1.1 gwr }
1027 1.1 gwr
1028 1.6 gwr /*
1029 1.6 gwr * status change interrupt. (splzs)
1030 1.6 gwr */
1031 1.6 gwr static void
1032 1.1 gwr zstty_stint(cs)
1033 1.1 gwr register struct zs_chanstate *cs;
1034 1.1 gwr {
1035 1.1 gwr register struct zstty_softc *zst;
1036 1.6 gwr register struct tty *tp;
1037 1.6 gwr register u_char rr0;
1038 1.1 gwr
1039 1.1 gwr zst = cs->cs_private;
1040 1.6 gwr tp = zst->zst_tty;
1041 1.1 gwr
1042 1.2 gwr rr0 = zs_read_csr(cs);
1043 1.2 gwr zs_write_csr(cs, ZSWR0_RESET_STATUS);
1044 1.1 gwr
1045 1.6 gwr /*
1046 1.6 gwr * Check here for console break, so that we can abort
1047 1.6 gwr * even when interrupts are locking up the machine.
1048 1.6 gwr */
1049 1.6 gwr if ((rr0 & ZSRR0_BREAK) &&
1050 1.1 gwr (zst->zst_hwflags & ZS_HWFLAG_CONSOLE))
1051 1.1 gwr {
1052 1.1 gwr zs_abort();
1053 1.6 gwr return;
1054 1.1 gwr }
1055 1.1 gwr
1056 1.8 gwr /*
1057 1.8 gwr * Need to handle CTS output flow control here.
1058 1.8 gwr * Output remains stopped as long as either the
1059 1.8 gwr * zst_tx_stopped or TS_TTSTOP flag is set.
1060 1.8 gwr * Never restart here; the softint routine will
1061 1.8 gwr * do that after things are ready to move.
1062 1.8 gwr */
1063 1.8 gwr if (((rr0 & ZSRR0_CTS) == 0) && (tp->t_cflag & CRTSCTS)) {
1064 1.8 gwr zst->zst_tbc = 0;
1065 1.8 gwr zst->zst_heldtbc = 0;
1066 1.8 gwr zst->zst_tx_stopped = 1;
1067 1.8 gwr }
1068 1.8 gwr
1069 1.13 gwr /*
1070 1.13 gwr * We have to accumulate status line changes here.
1071 1.13 gwr * Otherwise, if we get multiple status interrupts
1072 1.13 gwr * before the softint runs, we could fail to notice
1073 1.13 gwr * some status line changes in the softint routine.
1074 1.13 gwr * Fix from Bill Studenmund, October 1996.
1075 1.13 gwr */
1076 1.13 gwr cs->cs_rr0_delta |= (cs->cs_rr0 ^ rr0);
1077 1.13 gwr cs->cs_rr0 = rr0;
1078 1.8 gwr zst->zst_st_check = 1;
1079 1.6 gwr
1080 1.1 gwr /* Ask for softint() call. */
1081 1.1 gwr cs->cs_softreq = 1;
1082 1.1 gwr }
1083 1.1 gwr
1084 1.1 gwr /*
1085 1.1 gwr * Print out a ring or fifo overrun error message.
1086 1.1 gwr */
1087 1.1 gwr static void
1088 1.1 gwr zsoverrun(zst, ptime, what)
1089 1.1 gwr struct zstty_softc *zst;
1090 1.1 gwr long *ptime;
1091 1.1 gwr char *what;
1092 1.1 gwr {
1093 1.1 gwr
1094 1.1 gwr if (*ptime != time.tv_sec) {
1095 1.1 gwr *ptime = time.tv_sec;
1096 1.1 gwr log(LOG_WARNING, "%s: %s overrun\n",
1097 1.1 gwr zst->zst_dev.dv_xname, what);
1098 1.1 gwr }
1099 1.1 gwr }
1100 1.1 gwr
1101 1.6 gwr /*
1102 1.6 gwr * Software interrupt. Called at zssoft
1103 1.8 gwr *
1104 1.8 gwr * The main job to be done here is to empty the input ring
1105 1.8 gwr * by passing its contents up to the tty layer. The ring is
1106 1.8 gwr * always emptied during this operation, therefore the ring
1107 1.8 gwr * must not be larger than the space after "high water" in
1108 1.8 gwr * the tty layer, or the tty layer might drop our input.
1109 1.8 gwr *
1110 1.8 gwr * Note: an "input blockage" condition is assumed to exist if
1111 1.8 gwr * EITHER the TS_TBLOCK flag or zst_rx_blocked flag is set.
1112 1.6 gwr */
1113 1.6 gwr static void
1114 1.1 gwr zstty_softint(cs)
1115 1.1 gwr struct zs_chanstate *cs;
1116 1.1 gwr {
1117 1.1 gwr register struct zstty_softc *zst;
1118 1.1 gwr register struct linesw *line;
1119 1.1 gwr register struct tty *tp;
1120 1.1 gwr register int get, c, s;
1121 1.8 gwr int ringmask, overrun;
1122 1.1 gwr register u_short ring_data;
1123 1.8 gwr register u_char rr0, rr1, delta;
1124 1.1 gwr
1125 1.1 gwr zst = cs->cs_private;
1126 1.1 gwr tp = zst->zst_tty;
1127 1.1 gwr line = &linesw[tp->t_line];
1128 1.6 gwr ringmask = zst->zst_ringmask;
1129 1.8 gwr overrun = 0;
1130 1.6 gwr
1131 1.6 gwr /*
1132 1.8 gwr * Raise to tty priority while servicing the ring.
1133 1.6 gwr */
1134 1.8 gwr s = spltty();
1135 1.1 gwr
1136 1.8 gwr if (zst->zst_rx_overrun) {
1137 1.8 gwr zst->zst_rx_overrun = 0;
1138 1.6 gwr zsoverrun(zst, &zst->zst_rotime, "ring");
1139 1.1 gwr }
1140 1.1 gwr
1141 1.1 gwr /*
1142 1.1 gwr * Copy data from the receive ring into the tty layer.
1143 1.1 gwr */
1144 1.1 gwr get = zst->zst_rbget;
1145 1.1 gwr while (get != zst->zst_rbput) {
1146 1.1 gwr ring_data = zst->zst_rbuf[get];
1147 1.6 gwr get = (get + 1) & ringmask;
1148 1.1 gwr
1149 1.1 gwr if (ring_data & ZSRR1_DO)
1150 1.8 gwr overrun++;
1151 1.1 gwr /* low byte of ring_data is rr1 */
1152 1.1 gwr c = (ring_data >> 8) & 0xff;
1153 1.1 gwr if (ring_data & ZSRR1_FE)
1154 1.1 gwr c |= TTY_FE;
1155 1.1 gwr if (ring_data & ZSRR1_PE)
1156 1.1 gwr c |= TTY_PE;
1157 1.1 gwr
1158 1.1 gwr line->l_rint(c, tp);
1159 1.1 gwr }
1160 1.1 gwr zst->zst_rbget = get;
1161 1.1 gwr
1162 1.6 gwr /*
1163 1.6 gwr * If the overrun flag is set now, it was set while
1164 1.6 gwr * copying char/status pairs from the ring, which
1165 1.6 gwr * means this was a hardware (fifo) overrun.
1166 1.6 gwr */
1167 1.8 gwr if (overrun) {
1168 1.6 gwr zsoverrun(zst, &zst->zst_fotime, "fifo");
1169 1.1 gwr }
1170 1.1 gwr
1171 1.8 gwr /*
1172 1.8 gwr * We have emptied the input ring. Maybe unblock input.
1173 1.8 gwr * Note: an "input blockage" condition is assumed to exist
1174 1.8 gwr * when EITHER zst_rx_blocked or the TS_TBLOCK flag is set,
1175 1.8 gwr * so unblock here ONLY if TS_TBLOCK has not been set.
1176 1.8 gwr */
1177 1.8 gwr if (zst->zst_rx_blocked && ((tp->t_state & TS_TBLOCK) == 0)) {
1178 1.8 gwr (void) splzs();
1179 1.8 gwr zst->zst_rx_blocked = 0;
1180 1.8 gwr zs_hwiflow(zst, 0); /* unblock input */
1181 1.8 gwr (void) spltty();
1182 1.8 gwr }
1183 1.8 gwr
1184 1.8 gwr /*
1185 1.8 gwr * Do any deferred work for status interrupts.
1186 1.8 gwr * The rr0 was saved in the h/w interrupt to
1187 1.8 gwr * avoid another splzs in here.
1188 1.8 gwr */
1189 1.8 gwr if (zst->zst_st_check) {
1190 1.8 gwr zst->zst_st_check = 0;
1191 1.8 gwr
1192 1.13 gwr rr0 = cs->cs_rr0;
1193 1.13 gwr delta = cs->cs_rr0_delta;
1194 1.13 gwr cs->cs_rr0_delta = 0;
1195 1.8 gwr if (delta & ZSRR0_DCD) {
1196 1.8 gwr c = ((rr0 & ZSRR0_DCD) != 0);
1197 1.8 gwr if (line->l_modem(tp, c) == 0)
1198 1.8 gwr zs_modem(zst, c);
1199 1.8 gwr }
1200 1.8 gwr if ((delta & ZSRR0_CTS) && (tp->t_cflag & CRTSCTS)) {
1201 1.8 gwr /*
1202 1.8 gwr * Only do restart here. Stop is handled
1203 1.8 gwr * at the h/w interrupt level.
1204 1.8 gwr */
1205 1.8 gwr if (rr0 & ZSRR0_CTS) {
1206 1.8 gwr zst->zst_tx_stopped = 0;
1207 1.8 gwr tp->t_state &= ~TS_TTSTOP;
1208 1.8 gwr (*line->l_start)(tp);
1209 1.1 gwr }
1210 1.1 gwr }
1211 1.8 gwr }
1212 1.8 gwr
1213 1.8 gwr if (zst->zst_tx_done) {
1214 1.8 gwr zst->zst_tx_done = 0;
1215 1.1 gwr tp->t_state &= ~TS_BUSY;
1216 1.1 gwr if (tp->t_state & TS_FLUSH)
1217 1.1 gwr tp->t_state &= ~TS_FLUSH;
1218 1.1 gwr else
1219 1.1 gwr ndflush(&tp->t_outq, zst->zst_tba -
1220 1.8 gwr (caddr_t) tp->t_outq.c_cf);
1221 1.1 gwr line->l_start(tp);
1222 1.1 gwr }
1223 1.1 gwr
1224 1.6 gwr splx(s);
1225 1.1 gwr }
1226 1.1 gwr
1227 1.1 gwr struct zsops zsops_tty = {
1228 1.1 gwr zstty_rxint, /* receive char available */
1229 1.1 gwr zstty_stint, /* external/status */
1230 1.1 gwr zstty_txint, /* xmit buffer empty */
1231 1.1 gwr zstty_softint, /* process software interrupt */
1232 1.1 gwr };
1233 1.1 gwr
1234