z8530tty.c revision 1.15 1 1.15 gwr /* $NetBSD: z8530tty.c,v 1.15 1997/02/24 16:03:05 gwr Exp $ */
2 1.1 gwr
3 1.1 gwr /*
4 1.1 gwr * Copyright (c) 1994 Gordon W. Ross
5 1.1 gwr * Copyright (c) 1992, 1993
6 1.1 gwr * The Regents of the University of California. All rights reserved.
7 1.1 gwr *
8 1.1 gwr * This software was developed by the Computer Systems Engineering group
9 1.1 gwr * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10 1.1 gwr * contributed to Berkeley.
11 1.1 gwr *
12 1.1 gwr * All advertising materials mentioning features or use of this software
13 1.1 gwr * must display the following acknowledgement:
14 1.1 gwr * This product includes software developed by the University of
15 1.1 gwr * California, Lawrence Berkeley Laboratory.
16 1.1 gwr *
17 1.1 gwr * Redistribution and use in source and binary forms, with or without
18 1.1 gwr * modification, are permitted provided that the following conditions
19 1.1 gwr * are met:
20 1.1 gwr * 1. Redistributions of source code must retain the above copyright
21 1.1 gwr * notice, this list of conditions and the following disclaimer.
22 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright
23 1.1 gwr * notice, this list of conditions and the following disclaimer in the
24 1.1 gwr * documentation and/or other materials provided with the distribution.
25 1.1 gwr * 3. All advertising materials mentioning features or use of this software
26 1.1 gwr * must display the following acknowledgement:
27 1.1 gwr * This product includes software developed by the University of
28 1.1 gwr * California, Berkeley and its contributors.
29 1.1 gwr * 4. Neither the name of the University nor the names of its contributors
30 1.1 gwr * may be used to endorse or promote products derived from this software
31 1.1 gwr * without specific prior written permission.
32 1.1 gwr *
33 1.1 gwr * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
34 1.1 gwr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35 1.1 gwr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36 1.1 gwr * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
37 1.1 gwr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 1.1 gwr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39 1.1 gwr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 1.1 gwr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
41 1.1 gwr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42 1.1 gwr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 1.1 gwr * SUCH DAMAGE.
44 1.1 gwr *
45 1.1 gwr * @(#)zs.c 8.1 (Berkeley) 7/19/93
46 1.1 gwr */
47 1.1 gwr
48 1.1 gwr /*
49 1.1 gwr * Zilog Z8530 Dual UART driver (tty interface)
50 1.1 gwr *
51 1.1 gwr * This is the "slave" driver that will be attached to
52 1.1 gwr * the "zsc" driver for plain "tty" async. serial lines.
53 1.8 gwr *
54 1.8 gwr * Credits, history:
55 1.8 gwr *
56 1.8 gwr * The original version of this code was the sparc/dev/zs.c driver
57 1.8 gwr * as distributed with the Berkeley 4.4 Lite release. Since then,
58 1.8 gwr * Gordon Ross reorganized the code into the current parent/child
59 1.8 gwr * driver scheme, separating the Sun keyboard and mouse support
60 1.8 gwr * into independent child drivers.
61 1.8 gwr *
62 1.8 gwr * RTS/CTS flow-control support was a collaboration of:
63 1.8 gwr * Gordon Ross <gwr (at) netbsd.org>,
64 1.8 gwr * Bill Studenmund <wrstuden (at) loki.stanford.edu>
65 1.8 gwr * Ian Dall <Ian.Dall (at) dsto.defence.gov.au>
66 1.1 gwr */
67 1.1 gwr
68 1.1 gwr #include <sys/param.h>
69 1.1 gwr #include <sys/systm.h>
70 1.1 gwr #include <sys/proc.h>
71 1.1 gwr #include <sys/device.h>
72 1.1 gwr #include <sys/conf.h>
73 1.1 gwr #include <sys/file.h>
74 1.1 gwr #include <sys/ioctl.h>
75 1.6 gwr #include <sys/malloc.h>
76 1.1 gwr #include <sys/tty.h>
77 1.1 gwr #include <sys/time.h>
78 1.1 gwr #include <sys/kernel.h>
79 1.1 gwr #include <sys/syslog.h>
80 1.1 gwr
81 1.1 gwr #include <dev/ic/z8530reg.h>
82 1.1 gwr #include <machine/z8530var.h>
83 1.1 gwr
84 1.1 gwr /*
85 1.1 gwr * How many input characters we can buffer.
86 1.1 gwr * The port-specific var.h may override this.
87 1.1 gwr * Note: must be a power of two!
88 1.1 gwr */
89 1.1 gwr #ifndef ZSTTY_RING_SIZE
90 1.6 gwr #define ZSTTY_RING_SIZE 2048
91 1.1 gwr #endif
92 1.6 gwr
93 1.6 gwr /*
94 1.6 gwr * Make this an option variable one can patch.
95 1.6 gwr * But be warned: this must be a power of 2!
96 1.6 gwr */
97 1.6 gwr int zstty_rbuf_size = ZSTTY_RING_SIZE;
98 1.1 gwr
99 1.8 gwr /* This should usually be 3/4 of ZSTTY_RING_SIZE */
100 1.8 gwr int zstty_rbuf_hiwat = (ZSTTY_RING_SIZE - (ZSTTY_RING_SIZE >> 2));
101 1.8 gwr
102 1.1 gwr struct zstty_softc {
103 1.1 gwr struct device zst_dev; /* required first: base device */
104 1.1 gwr struct tty *zst_tty;
105 1.1 gwr struct zs_chanstate *zst_cs;
106 1.1 gwr
107 1.1 gwr int zst_hwflags; /* see z8530var.h */
108 1.1 gwr int zst_swflags; /* TIOCFLAG_SOFTCAR, ... <ttycom.h> */
109 1.1 gwr
110 1.8 gwr /*
111 1.8 gwr * Printing an overrun error message often takes long enough to
112 1.8 gwr * cause another overrun, so we only print one per second.
113 1.8 gwr */
114 1.8 gwr long zst_rotime; /* time of last ring overrun */
115 1.8 gwr long zst_fotime; /* time of last fifo overrun */
116 1.8 gwr
117 1.8 gwr /*
118 1.8 gwr * The receive ring buffer.
119 1.8 gwr */
120 1.8 gwr int zst_rbget; /* ring buffer `get' index */
121 1.8 gwr volatile int zst_rbput; /* ring buffer `put' index */
122 1.8 gwr int zst_ringmask;
123 1.8 gwr int zst_rbhiwat;
124 1.8 gwr
125 1.8 gwr u_short *zst_rbuf; /* rr1, data pairs */
126 1.1 gwr
127 1.1 gwr /*
128 1.1 gwr * The transmit byte count and address are used for pseudo-DMA
129 1.1 gwr * output in the hardware interrupt code. PDMA can be suspended
130 1.1 gwr * to get pending changes done; heldtbc is used for this. It can
131 1.1 gwr * also be stopped for ^S; this sets TS_TTSTOP in tp->t_state.
132 1.1 gwr */
133 1.1 gwr int zst_tbc; /* transmit byte count */
134 1.1 gwr caddr_t zst_tba; /* transmit buffer address */
135 1.1 gwr int zst_heldtbc; /* held tbc while xmission stopped */
136 1.1 gwr
137 1.8 gwr /* Flags to communicate with zstty_softint() */
138 1.8 gwr volatile char zst_rx_blocked; /* input block at ring */
139 1.8 gwr volatile char zst_rx_overrun; /* ring overrun */
140 1.8 gwr volatile char zst_tx_busy; /* working on an output chunk */
141 1.8 gwr volatile char zst_tx_done; /* done with one output chunk */
142 1.8 gwr volatile char zst_tx_stopped; /* H/W level stop (lost CTS) */
143 1.8 gwr volatile char zst_st_check; /* got a status interrupt */
144 1.8 gwr char pad[2];
145 1.1 gwr };
146 1.1 gwr
147 1.1 gwr
148 1.1 gwr /* Definition of the driver for autoconfig. */
149 1.14 gwr #ifdef __BROKEN_INDIRECT_CONFIG
150 1.1 gwr static int zstty_match(struct device *, void *, void *);
151 1.14 gwr #else
152 1.14 gwr static int zstty_match(struct device *, struct cfdata *, void *);
153 1.14 gwr #endif
154 1.1 gwr static void zstty_attach(struct device *, struct device *, void *);
155 1.1 gwr
156 1.4 thorpej struct cfattach zstty_ca = {
157 1.4 thorpej sizeof(struct zstty_softc), zstty_match, zstty_attach
158 1.4 thorpej };
159 1.4 thorpej
160 1.4 thorpej struct cfdriver zstty_cd = {
161 1.4 thorpej NULL, "zstty", DV_TTY
162 1.1 gwr };
163 1.1 gwr
164 1.1 gwr struct zsops zsops_tty;
165 1.1 gwr
166 1.1 gwr /* Routines called from other code. */
167 1.1 gwr cdev_decl(zs); /* open, close, read, write, ioctl, stop, ... */
168 1.1 gwr
169 1.14 gwr static void zsstart __P((struct tty *));
170 1.14 gwr static int zsparam __P((struct tty *, struct termios *));
171 1.14 gwr static void zs_modem __P((struct zstty_softc *zst, int onoff));
172 1.14 gwr static int zshwiflow __P((struct tty *, int));
173 1.14 gwr static void zs_hwiflow __P((struct zstty_softc *, int));
174 1.1 gwr
175 1.1 gwr /*
176 1.1 gwr * zstty_match: how is this zs channel configured?
177 1.1 gwr */
178 1.14 gwr #ifdef __BROKEN_INDIRECT_CONFIG
179 1.14 gwr int
180 1.14 gwr zstty_match(parent, vcf, aux)
181 1.14 gwr struct device *parent;
182 1.14 gwr void *vcf, *aux;
183 1.14 gwr {
184 1.14 gwr struct cfdata *cf = vcf;
185 1.14 gwr struct zsc_attach_args *args = aux;
186 1.14 gwr
187 1.14 gwr /* Exact match is better than wildcard. */
188 1.14 gwr if (cf->cf_loc[0] == args->channel)
189 1.14 gwr return 2;
190 1.14 gwr
191 1.14 gwr /* This driver accepts wildcard. */
192 1.14 gwr if (cf->cf_loc[0] == -1)
193 1.14 gwr return 1;
194 1.14 gwr
195 1.14 gwr return 0;
196 1.14 gwr }
197 1.14 gwr #else /* __BROKEN_INDIRECT_CONFIG */
198 1.1 gwr int
199 1.14 gwr zstty_match(parent, cf, aux)
200 1.1 gwr struct device *parent;
201 1.14 gwr struct cfdata *cf;
202 1.14 gwr void *aux;
203 1.1 gwr {
204 1.1 gwr struct zsc_attach_args *args = aux;
205 1.1 gwr
206 1.1 gwr /* Exact match is better than wildcard. */
207 1.1 gwr if (cf->cf_loc[0] == args->channel)
208 1.1 gwr return 2;
209 1.1 gwr
210 1.1 gwr /* This driver accepts wildcard. */
211 1.1 gwr if (cf->cf_loc[0] == -1)
212 1.1 gwr return 1;
213 1.1 gwr
214 1.1 gwr return 0;
215 1.1 gwr }
216 1.14 gwr #endif /* __BROKEN_INDIRECT_CONFIG */
217 1.1 gwr
218 1.1 gwr void
219 1.1 gwr zstty_attach(parent, self, aux)
220 1.1 gwr struct device *parent, *self;
221 1.1 gwr void *aux;
222 1.1 gwr
223 1.1 gwr {
224 1.1 gwr struct zsc_softc *zsc = (void *) parent;
225 1.1 gwr struct zstty_softc *zst = (void *) self;
226 1.14 gwr struct cfdata *cf = self->dv_cfdata;
227 1.1 gwr struct zsc_attach_args *args = aux;
228 1.1 gwr struct zs_chanstate *cs;
229 1.1 gwr struct tty *tp;
230 1.1 gwr int channel, tty_unit;
231 1.1 gwr dev_t dev;
232 1.1 gwr
233 1.3 gwr tty_unit = zst->zst_dev.dv_unit;
234 1.1 gwr channel = args->channel;
235 1.14 gwr cs = zsc->zsc_cs[channel];
236 1.1 gwr cs->cs_private = zst;
237 1.1 gwr cs->cs_ops = &zsops_tty;
238 1.1 gwr
239 1.1 gwr zst->zst_cs = cs;
240 1.1 gwr zst->zst_swflags = cf->cf_flags; /* softcar, etc. */
241 1.1 gwr zst->zst_hwflags = args->hwflags;
242 1.14 gwr dev = makedev(zs_major, tty_unit);
243 1.1 gwr
244 1.1 gwr if (zst->zst_swflags)
245 1.12 christos printf(" flags 0x%x", zst->zst_swflags);
246 1.1 gwr
247 1.1 gwr if (zst->zst_hwflags & ZS_HWFLAG_CONSOLE)
248 1.12 christos printf(" (console)");
249 1.1 gwr else {
250 1.1 gwr #ifdef KGDB
251 1.1 gwr /*
252 1.15 gwr * Allow kgdb to "take over" this port. Returns true
253 1.15 gwr * if this serial port is in-use by kgdb.
254 1.1 gwr */
255 1.1 gwr if (zs_check_kgdb(cs, dev)) {
256 1.15 gwr printf(" (kgdb)\n");
257 1.1 gwr /*
258 1.1 gwr * This is the kgdb port (exclusive use)
259 1.1 gwr * so skip the normal attach code.
260 1.1 gwr */
261 1.1 gwr return;
262 1.1 gwr }
263 1.1 gwr #endif
264 1.1 gwr }
265 1.12 christos printf("\n");
266 1.1 gwr
267 1.6 gwr tp = ttymalloc();
268 1.1 gwr tp->t_dev = dev;
269 1.1 gwr tp->t_oproc = zsstart;
270 1.1 gwr tp->t_param = zsparam;
271 1.8 gwr tp->t_hwiflow = zshwiflow;
272 1.9 gwr tty_attach(tp);
273 1.1 gwr
274 1.6 gwr zst->zst_tty = tp;
275 1.8 gwr zst->zst_rbhiwat = zstty_rbuf_size; /* impossible value */
276 1.6 gwr zst->zst_ringmask = zstty_rbuf_size - 1;
277 1.6 gwr zst->zst_rbuf = malloc(zstty_rbuf_size * sizeof(zst->zst_rbuf[0]),
278 1.6 gwr M_DEVBUF, M_WAITOK);
279 1.6 gwr
280 1.14 gwr /* XXX - Do we need an MD hook here? */
281 1.14 gwr
282 1.1 gwr /*
283 1.1 gwr * Hardware init
284 1.1 gwr */
285 1.1 gwr if (zst->zst_hwflags & ZS_HWFLAG_CONSOLE) {
286 1.14 gwr /* Call zsparam similar to open. */
287 1.14 gwr struct termios t;
288 1.14 gwr
289 1.14 gwr /* Make console output work while closed. */
290 1.1 gwr zst->zst_swflags |= TIOCFLAG_SOFTCAR;
291 1.14 gwr /* Setup the "new" parameters in t. */
292 1.14 gwr bzero((void*)&t, sizeof(t));
293 1.14 gwr t.c_cflag = cs->cs_defcflag;
294 1.14 gwr t.c_ospeed = cs->cs_defspeed;
295 1.14 gwr /* Enable interrupts. */
296 1.14 gwr cs->cs_preg[1] = ZSWR1_RIE | ZSWR1_SIE;
297 1.14 gwr /* Make sure zsparam will see changes. */
298 1.14 gwr tp->t_ospeed = 0;
299 1.14 gwr (void) zsparam(tp, &t);
300 1.1 gwr } else {
301 1.1 gwr /* Not the console; may need reset. */
302 1.1 gwr int reset, s;
303 1.1 gwr reset = (channel == 0) ?
304 1.1 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
305 1.1 gwr s = splzs();
306 1.2 gwr zs_write_reg(cs, 9, reset);
307 1.1 gwr splx(s);
308 1.1 gwr }
309 1.1 gwr
310 1.1 gwr /*
311 1.1 gwr * Initialize state of modem control lines (DTR).
312 1.1 gwr * If softcar is set, turn on DTR now and leave it.
313 1.1 gwr * otherwise, turn off DTR now, and raise in open.
314 1.1 gwr * (Keeps modem from answering too early.)
315 1.1 gwr */
316 1.1 gwr zs_modem(zst, (zst->zst_swflags & TIOCFLAG_SOFTCAR) ? 1 : 0);
317 1.1 gwr }
318 1.1 gwr
319 1.1 gwr
320 1.1 gwr /*
321 1.1 gwr * Return pointer to our tty.
322 1.1 gwr */
323 1.1 gwr struct tty *
324 1.1 gwr zstty(dev)
325 1.1 gwr dev_t dev;
326 1.1 gwr {
327 1.1 gwr struct zstty_softc *zst;
328 1.1 gwr int unit = minor(dev);
329 1.1 gwr
330 1.1 gwr #ifdef DIAGNOSTIC
331 1.4 thorpej if (unit >= zstty_cd.cd_ndevs)
332 1.1 gwr panic("zstty");
333 1.1 gwr #endif
334 1.4 thorpej zst = zstty_cd.cd_devs[unit];
335 1.1 gwr return (zst->zst_tty);
336 1.1 gwr }
337 1.1 gwr
338 1.1 gwr
339 1.1 gwr /*
340 1.1 gwr * Open a zs serial (tty) port.
341 1.1 gwr */
342 1.1 gwr int
343 1.1 gwr zsopen(dev, flags, mode, p)
344 1.1 gwr dev_t dev;
345 1.1 gwr int flags;
346 1.1 gwr int mode;
347 1.1 gwr struct proc *p;
348 1.1 gwr {
349 1.1 gwr register struct tty *tp;
350 1.1 gwr register struct zs_chanstate *cs;
351 1.1 gwr struct zstty_softc *zst;
352 1.1 gwr int error, s, unit;
353 1.1 gwr
354 1.1 gwr unit = minor(dev);
355 1.4 thorpej if (unit >= zstty_cd.cd_ndevs)
356 1.1 gwr return (ENXIO);
357 1.4 thorpej zst = zstty_cd.cd_devs[unit];
358 1.1 gwr if (zst == NULL)
359 1.1 gwr return (ENXIO);
360 1.1 gwr tp = zst->zst_tty;
361 1.1 gwr cs = zst->zst_cs;
362 1.1 gwr
363 1.1 gwr /* If KGDB took the line, then tp==NULL */
364 1.1 gwr if (tp == NULL)
365 1.1 gwr return (EBUSY);
366 1.1 gwr
367 1.1 gwr /* It's simpler to do this up here. */
368 1.1 gwr if (((tp->t_state & (TS_ISOPEN | TS_XCLUDE))
369 1.1 gwr == (TS_ISOPEN | TS_XCLUDE))
370 1.1 gwr && (p->p_ucred->cr_uid != 0) )
371 1.1 gwr {
372 1.1 gwr return (EBUSY);
373 1.1 gwr }
374 1.1 gwr
375 1.1 gwr s = spltty();
376 1.1 gwr
377 1.1 gwr if ((tp->t_state & TS_ISOPEN) == 0) {
378 1.1 gwr /* First open. */
379 1.14 gwr struct termios t;
380 1.14 gwr
381 1.14 gwr /*
382 1.14 gwr * Setup the "new" parameters in t.
383 1.14 gwr * Can not use tp->t because zsparam
384 1.14 gwr * deals only with what has changed.
385 1.14 gwr */
386 1.14 gwr bzero((void*)&t, sizeof(t));
387 1.14 gwr t.c_cflag = cs->cs_defcflag;
388 1.1 gwr if (zst->zst_swflags & TIOCFLAG_CLOCAL)
389 1.14 gwr t.c_cflag |= CLOCAL;
390 1.1 gwr if (zst->zst_swflags & TIOCFLAG_CRTSCTS)
391 1.14 gwr t.c_cflag |= CRTSCTS;
392 1.1 gwr if (zst->zst_swflags & TIOCFLAG_MDMBUF)
393 1.14 gwr t.c_cflag |= MDMBUF;
394 1.14 gwr t.c_ospeed = cs->cs_defspeed;
395 1.14 gwr /* Enable interrupts. */
396 1.14 gwr cs->cs_preg[1] = ZSWR1_RIE | ZSWR1_SIE;
397 1.14 gwr /* Make sure zsparam will see changes. */
398 1.14 gwr tp->t_ospeed = 0;
399 1.14 gwr (void) zsparam(tp, &t);
400 1.14 gwr /*
401 1.14 gwr * Note: zsparam has done: cflag, ispeed, ospeed
402 1.14 gwr * so we just need to do: iflag, oflag, lflag, cc
403 1.14 gwr * For "raw" mode, just leave all zeros.
404 1.14 gwr */
405 1.14 gwr if ((zst->zst_hwflags & ZS_HWFLAG_RAW) == 0) {
406 1.14 gwr tp->t_iflag = TTYDEF_IFLAG;
407 1.14 gwr tp->t_oflag = TTYDEF_OFLAG;
408 1.14 gwr tp->t_lflag = TTYDEF_LFLAG;
409 1.14 gwr ttychars(tp);
410 1.14 gwr }
411 1.1 gwr ttsetwater(tp);
412 1.1 gwr /* Flush any pending input. */
413 1.1 gwr zst->zst_rbget = zst->zst_rbput;
414 1.1 gwr zs_iflush(cs); /* XXX */
415 1.14 gwr /* DTR was turned on by zsparam. */
416 1.1 gwr if (zst->zst_swflags & TIOCFLAG_SOFTCAR) {
417 1.1 gwr tp->t_state |= TS_CARR_ON;
418 1.1 gwr }
419 1.14 gwr /* XXX - The MD code could just force CLOCAL instead. */
420 1.14 gwr if (zst->zst_hwflags & ZS_HWFLAG_NO_DCD) {
421 1.14 gwr tp->t_state |= TS_CARR_ON;
422 1.14 gwr }
423 1.1 gwr }
424 1.1 gwr error = 0;
425 1.1 gwr
426 1.14 gwr /* In this section, we may touch the chip. */
427 1.14 gwr (void)splzs();
428 1.14 gwr
429 1.14 gwr /*
430 1.14 gwr * Get initial value of RR0. This is done after we
431 1.14 gwr * raise DTR in case the cable loops DTR back to CTS.
432 1.14 gwr */
433 1.14 gwr cs->cs_rr0 = zs_read_csr(cs);
434 1.14 gwr
435 1.14 gwr /*
436 1.14 gwr * Wait for DCD (if necessary). Note that we might
437 1.14 gwr * never get status interrupt if DCD is already on.
438 1.14 gwr */
439 1.1 gwr for (;;) {
440 1.14 gwr /* Check the DCD bit (if we have one). */
441 1.14 gwr if (cs->cs_rr0 & cs->cs_rr0_dcd)
442 1.1 gwr tp->t_state |= TS_CARR_ON;
443 1.1 gwr
444 1.1 gwr if ((tp->t_state & TS_CARR_ON) ||
445 1.1 gwr (tp->t_cflag & CLOCAL) ||
446 1.1 gwr (flags & O_NONBLOCK) )
447 1.1 gwr break;
448 1.1 gwr
449 1.14 gwr /* Sleep waiting for a status interrupt. */
450 1.1 gwr tp->t_state |= TS_WOPEN;
451 1.1 gwr error = ttysleep(tp, (caddr_t)&tp->t_rawq,
452 1.1 gwr TTIPRI | PCATCH, ttopen, 0);
453 1.1 gwr if (error) {
454 1.1 gwr if ((tp->t_state & TS_ISOPEN) == 0) {
455 1.1 gwr /* Never get here with softcar */
456 1.1 gwr zs_modem(zst, 0);
457 1.1 gwr tp->t_state &= ~TS_WOPEN;
458 1.1 gwr ttwakeup(tp);
459 1.1 gwr }
460 1.1 gwr break;
461 1.1 gwr }
462 1.14 gwr /* The status interrupt changed cs->cs_rr0 */
463 1.1 gwr }
464 1.1 gwr
465 1.1 gwr splx(s);
466 1.1 gwr if (error == 0)
467 1.1 gwr error = linesw[tp->t_line].l_open(dev, tp);
468 1.1 gwr return (error);
469 1.1 gwr }
470 1.1 gwr
471 1.1 gwr /*
472 1.1 gwr * Close a zs serial port.
473 1.1 gwr */
474 1.1 gwr int
475 1.1 gwr zsclose(dev, flags, mode, p)
476 1.1 gwr dev_t dev;
477 1.1 gwr int flags;
478 1.1 gwr int mode;
479 1.1 gwr struct proc *p;
480 1.1 gwr {
481 1.1 gwr struct zstty_softc *zst;
482 1.1 gwr register struct zs_chanstate *cs;
483 1.1 gwr register struct tty *tp;
484 1.1 gwr int hup, s;
485 1.1 gwr
486 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
487 1.1 gwr cs = zst->zst_cs;
488 1.1 gwr tp = zst->zst_tty;
489 1.1 gwr
490 1.1 gwr /* XXX This is for cons.c. */
491 1.1 gwr if ((tp->t_state & TS_ISOPEN) == 0)
492 1.1 gwr return 0;
493 1.1 gwr
494 1.1 gwr (*linesw[tp->t_line].l_close)(tp, flags);
495 1.14 gwr
496 1.14 gwr /* Disable interrupts. */
497 1.14 gwr s = splzs();
498 1.14 gwr cs->cs_creg[1] = cs->cs_preg[1] = 0;
499 1.14 gwr zs_write_reg(cs, 1, cs->cs_creg[1]);
500 1.14 gwr splx(s);
501 1.14 gwr
502 1.14 gwr /* Maybe do "hangup" (drop DTR). */
503 1.1 gwr hup = tp->t_cflag & HUPCL;
504 1.1 gwr if (zst->zst_swflags & TIOCFLAG_SOFTCAR)
505 1.1 gwr hup = 0;
506 1.1 gwr if (hup) {
507 1.1 gwr zs_modem(zst, 0);
508 1.1 gwr /* hold low for 1 second */
509 1.1 gwr (void) tsleep((caddr_t)cs, TTIPRI, ttclos, hz);
510 1.1 gwr }
511 1.1 gwr if (cs->cs_creg[5] & ZSWR5_BREAK) {
512 1.1 gwr zs_break(cs, 0);
513 1.1 gwr }
514 1.1 gwr
515 1.1 gwr ttyclose(tp);
516 1.1 gwr return (0);
517 1.1 gwr }
518 1.1 gwr
519 1.1 gwr /*
520 1.1 gwr * Read/write zs serial port.
521 1.1 gwr */
522 1.1 gwr int
523 1.1 gwr zsread(dev, uio, flags)
524 1.1 gwr dev_t dev;
525 1.1 gwr struct uio *uio;
526 1.1 gwr int flags;
527 1.1 gwr {
528 1.1 gwr register struct zstty_softc *zst;
529 1.1 gwr register struct tty *tp;
530 1.1 gwr
531 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
532 1.1 gwr tp = zst->zst_tty;
533 1.1 gwr return (linesw[tp->t_line].l_read(tp, uio, flags));
534 1.1 gwr }
535 1.1 gwr
536 1.1 gwr int
537 1.1 gwr zswrite(dev, uio, flags)
538 1.1 gwr dev_t dev;
539 1.1 gwr struct uio *uio;
540 1.1 gwr int flags;
541 1.1 gwr {
542 1.1 gwr register struct zstty_softc *zst;
543 1.1 gwr register struct tty *tp;
544 1.1 gwr
545 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
546 1.1 gwr tp = zst->zst_tty;
547 1.1 gwr return (linesw[tp->t_line].l_write(tp, uio, flags));
548 1.1 gwr }
549 1.1 gwr
550 1.1 gwr #define TIOCFLAG_ALL (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | \
551 1.1 gwr TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF )
552 1.1 gwr
553 1.1 gwr int
554 1.1 gwr zsioctl(dev, cmd, data, flag, p)
555 1.1 gwr dev_t dev;
556 1.1 gwr u_long cmd;
557 1.1 gwr caddr_t data;
558 1.1 gwr int flag;
559 1.1 gwr struct proc *p;
560 1.1 gwr {
561 1.1 gwr register struct zstty_softc *zst;
562 1.1 gwr register struct zs_chanstate *cs;
563 1.1 gwr register struct tty *tp;
564 1.1 gwr register int error, tmp;
565 1.1 gwr
566 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
567 1.1 gwr cs = zst->zst_cs;
568 1.1 gwr tp = zst->zst_tty;
569 1.1 gwr
570 1.1 gwr error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
571 1.1 gwr if (error >= 0)
572 1.1 gwr return (error);
573 1.14 gwr
574 1.1 gwr error = ttioctl(tp, cmd, data, flag, p);
575 1.1 gwr if (error >= 0)
576 1.1 gwr return (error);
577 1.1 gwr
578 1.14 gwr #ifdef ZS_MD_IOCTL
579 1.14 gwr error = ZS_MD_IOCTL;
580 1.14 gwr if (error >= 0)
581 1.14 gwr return (error);
582 1.14 gwr #endif /* ZS_MD_IOCTL */
583 1.14 gwr
584 1.1 gwr switch (cmd) {
585 1.1 gwr
586 1.1 gwr case TIOCSBRK:
587 1.1 gwr zs_break(cs, 1);
588 1.1 gwr break;
589 1.1 gwr
590 1.1 gwr case TIOCCBRK:
591 1.1 gwr zs_break(cs, 0);
592 1.1 gwr break;
593 1.1 gwr
594 1.1 gwr case TIOCGFLAGS:
595 1.1 gwr *(int *)data = zst->zst_swflags;
596 1.1 gwr break;
597 1.1 gwr
598 1.1 gwr case TIOCSFLAGS:
599 1.1 gwr error = suser(p->p_ucred, &p->p_acflag);
600 1.1 gwr if (error != 0)
601 1.1 gwr return (EPERM);
602 1.1 gwr tmp = *(int *)data;
603 1.1 gwr /* Check for random bits... */
604 1.1 gwr if (tmp & ~TIOCFLAG_ALL)
605 1.1 gwr return(EINVAL);
606 1.1 gwr /* Silently enforce softcar on the console. */
607 1.1 gwr if (zst->zst_hwflags & ZS_HWFLAG_CONSOLE)
608 1.1 gwr tmp |= TIOCFLAG_SOFTCAR;
609 1.1 gwr /* These flags take effect during open. */
610 1.1 gwr zst->zst_swflags = tmp;
611 1.1 gwr break;
612 1.1 gwr
613 1.1 gwr case TIOCSDTR:
614 1.1 gwr zs_modem(zst, 1);
615 1.1 gwr break;
616 1.1 gwr
617 1.1 gwr case TIOCCDTR:
618 1.1 gwr zs_modem(zst, 0);
619 1.1 gwr break;
620 1.1 gwr
621 1.1 gwr case TIOCMSET:
622 1.1 gwr case TIOCMBIS:
623 1.1 gwr case TIOCMBIC:
624 1.1 gwr case TIOCMGET:
625 1.1 gwr default:
626 1.1 gwr return (ENOTTY);
627 1.1 gwr }
628 1.1 gwr return (0);
629 1.1 gwr }
630 1.1 gwr
631 1.1 gwr /*
632 1.1 gwr * Start or restart transmission.
633 1.1 gwr */
634 1.1 gwr static void
635 1.1 gwr zsstart(tp)
636 1.1 gwr register struct tty *tp;
637 1.1 gwr {
638 1.1 gwr register struct zstty_softc *zst;
639 1.1 gwr register struct zs_chanstate *cs;
640 1.1 gwr register int s, nch;
641 1.1 gwr
642 1.4 thorpej zst = zstty_cd.cd_devs[minor(tp->t_dev)];
643 1.1 gwr cs = zst->zst_cs;
644 1.1 gwr
645 1.1 gwr s = spltty();
646 1.1 gwr
647 1.1 gwr /*
648 1.1 gwr * If currently active or delaying, no need to do anything.
649 1.1 gwr */
650 1.1 gwr if (tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP))
651 1.1 gwr goto out;
652 1.1 gwr
653 1.1 gwr /*
654 1.8 gwr * If under CRTSCTS hfc and halted, do nothing
655 1.14 gwr * This flag can only be set with CRTSCTS.
656 1.8 gwr */
657 1.14 gwr if (zst->zst_tx_stopped)
658 1.14 gwr goto out;
659 1.8 gwr
660 1.8 gwr /*
661 1.1 gwr * If there are sleepers, and output has drained below low
662 1.1 gwr * water mark, awaken.
663 1.1 gwr */
664 1.1 gwr if (tp->t_outq.c_cc <= tp->t_lowat) {
665 1.1 gwr if (tp->t_state & TS_ASLEEP) {
666 1.1 gwr tp->t_state &= ~TS_ASLEEP;
667 1.1 gwr wakeup((caddr_t)&tp->t_outq);
668 1.1 gwr }
669 1.1 gwr selwakeup(&tp->t_wsel);
670 1.1 gwr }
671 1.1 gwr
672 1.1 gwr nch = ndqb(&tp->t_outq, 0); /* XXX */
673 1.8 gwr (void) splzs();
674 1.8 gwr
675 1.1 gwr if (nch) {
676 1.1 gwr register char *p = tp->t_outq.c_cf;
677 1.1 gwr
678 1.1 gwr /* mark busy, enable tx done interrupts, & send first byte */
679 1.1 gwr tp->t_state |= TS_BUSY;
680 1.8 gwr zst->zst_tx_busy = 1;
681 1.1 gwr cs->cs_preg[1] |= ZSWR1_TIE;
682 1.8 gwr cs->cs_creg[1] = cs->cs_preg[1];
683 1.2 gwr zs_write_reg(cs, 1, cs->cs_creg[1]);
684 1.2 gwr zs_write_data(cs, *p);
685 1.1 gwr zst->zst_tba = p + 1;
686 1.1 gwr zst->zst_tbc = nch - 1;
687 1.1 gwr } else {
688 1.1 gwr /*
689 1.1 gwr * Nothing to send, turn off transmit done interrupts.
690 1.1 gwr * This is useful if something is doing polled output.
691 1.1 gwr */
692 1.1 gwr cs->cs_preg[1] &= ~ZSWR1_TIE;
693 1.8 gwr cs->cs_creg[1] = cs->cs_preg[1];
694 1.2 gwr zs_write_reg(cs, 1, cs->cs_creg[1]);
695 1.1 gwr }
696 1.1 gwr out:
697 1.1 gwr splx(s);
698 1.1 gwr }
699 1.1 gwr
700 1.1 gwr /*
701 1.1 gwr * Stop output, e.g., for ^S or output flush.
702 1.1 gwr */
703 1.10 mycroft void
704 1.1 gwr zsstop(tp, flag)
705 1.1 gwr struct tty *tp;
706 1.1 gwr int flag;
707 1.1 gwr {
708 1.1 gwr register struct zstty_softc *zst;
709 1.1 gwr register struct zs_chanstate *cs;
710 1.1 gwr register int s;
711 1.1 gwr
712 1.4 thorpej zst = zstty_cd.cd_devs[minor(tp->t_dev)];
713 1.1 gwr cs = zst->zst_cs;
714 1.1 gwr
715 1.1 gwr s = splzs();
716 1.1 gwr if (tp->t_state & TS_BUSY) {
717 1.1 gwr /*
718 1.1 gwr * Device is transmitting; must stop it.
719 1.8 gwr * Also clear _heldtbc to prevent any
720 1.8 gwr * flow-control event from resuming.
721 1.1 gwr */
722 1.1 gwr zst->zst_tbc = 0;
723 1.8 gwr zst->zst_heldtbc = 0;
724 1.1 gwr if ((tp->t_state & TS_TTSTOP) == 0)
725 1.1 gwr tp->t_state |= TS_FLUSH;
726 1.1 gwr }
727 1.1 gwr splx(s);
728 1.1 gwr }
729 1.1 gwr
730 1.1 gwr /*
731 1.1 gwr * Set ZS tty parameters from termios.
732 1.1 gwr * XXX - Should just copy the whole termios after
733 1.1 gwr * making sure all the changes could be done.
734 1.1 gwr */
735 1.1 gwr static int
736 1.1 gwr zsparam(tp, t)
737 1.1 gwr register struct tty *tp;
738 1.1 gwr register struct termios *t;
739 1.1 gwr {
740 1.14 gwr struct zstty_softc *zst;
741 1.14 gwr struct zs_chanstate *cs;
742 1.14 gwr int s, bps, cflag, error;
743 1.14 gwr u_char tmp3, tmp4, tmp5;
744 1.1 gwr
745 1.4 thorpej zst = zstty_cd.cd_devs[minor(tp->t_dev)];
746 1.1 gwr cs = zst->zst_cs;
747 1.14 gwr bps = t->c_ospeed;
748 1.14 gwr cflag = t->c_cflag;
749 1.1 gwr
750 1.1 gwr if (bps < 0 || (t->c_ispeed && t->c_ispeed != bps))
751 1.1 gwr return (EINVAL);
752 1.14 gwr
753 1.14 gwr /*
754 1.14 gwr * Only whack the UART when params change.
755 1.14 gwr * Some callers need to clear tp->t_ospeed
756 1.14 gwr * to make sure initialization gets done.
757 1.14 gwr */
758 1.14 gwr if ((tp->t_ospeed == bps) &&
759 1.14 gwr (tp->t_cflag == cflag) )
760 1.1 gwr return (0);
761 1.1 gwr
762 1.14 gwr /*
763 1.14 gwr * Call MD functions to deal with changed
764 1.14 gwr * clock modes or H/W flow control modes.
765 1.14 gwr * The BRG divisor is set now. (reg 12,13)
766 1.14 gwr */
767 1.14 gwr error = zs_set_speed(cs, bps);
768 1.14 gwr if (error)
769 1.14 gwr return (error);
770 1.14 gwr error = zs_set_modes(cs, cflag);
771 1.14 gwr if (error)
772 1.14 gwr return (error);
773 1.1 gwr
774 1.14 gwr /* OK, we are now committed to do it. */
775 1.1 gwr tp->t_cflag = cflag;
776 1.14 gwr tp->t_ospeed = bps;
777 1.14 gwr tp->t_ispeed = bps;
778 1.1 gwr
779 1.1 gwr /*
780 1.1 gwr * Block interrupts so that state will not
781 1.1 gwr * be altered until we are done setting it up.
782 1.14 gwr *
783 1.1 gwr * Initial values in cs_preg are set before
784 1.1 gwr * our attach routine is called. The master
785 1.1 gwr * interrupt enable is handled by zsc.c
786 1.14 gwr *
787 1.1 gwr */
788 1.14 gwr s = splzs();
789 1.1 gwr
790 1.14 gwr /* Recompute character size bits. */
791 1.14 gwr tmp3 = cs->cs_preg[3] & ~ZSWR3_RXSIZE;
792 1.14 gwr tmp5 = cs->cs_preg[5] & ~ZSWR5_TXSIZE;
793 1.1 gwr switch (cflag & CSIZE) {
794 1.1 gwr case CS5:
795 1.14 gwr /* These are |= 0 but let the optimizer deal with it. */
796 1.14 gwr tmp3 |= ZSWR3_RX_5;
797 1.14 gwr tmp5 |= ZSWR5_TX_5;
798 1.1 gwr break;
799 1.1 gwr case CS6:
800 1.14 gwr tmp3 |= ZSWR3_RX_6;
801 1.14 gwr tmp5 |= ZSWR5_TX_6;
802 1.1 gwr break;
803 1.1 gwr case CS7:
804 1.14 gwr tmp3 |= ZSWR3_RX_7;
805 1.14 gwr tmp5 |= ZSWR5_TX_7;
806 1.1 gwr break;
807 1.1 gwr case CS8:
808 1.1 gwr default:
809 1.14 gwr tmp3 |= ZSWR3_RX_8;
810 1.14 gwr tmp5 |= ZSWR5_TX_8;
811 1.1 gwr break;
812 1.1 gwr }
813 1.14 gwr /* Raise or lower DTR and RTS as appropriate. */
814 1.14 gwr if (bps) {
815 1.14 gwr /* Raise DTR and RTS */
816 1.14 gwr tmp5 |= cs->cs_wr5_dtr;
817 1.14 gwr } else {
818 1.14 gwr /* Drop DTR and RTS */
819 1.14 gwr /* XXX: Should SOFTCAR prevent this? */
820 1.14 gwr tmp5 &= ~(cs->cs_wr5_dtr);
821 1.14 gwr }
822 1.14 gwr cs->cs_preg[3] = tmp3;
823 1.14 gwr cs->cs_preg[5] = tmp5;
824 1.14 gwr
825 1.14 gwr /*
826 1.14 gwr * Recompute the stop bits and parity bits. Note that
827 1.14 gwr * zs_set_speed() may have set clock selection bits etc.
828 1.14 gwr * in wr4, so those must preserved.
829 1.14 gwr */
830 1.14 gwr tmp4 = cs->cs_preg[4];
831 1.14 gwr /* Recompute stop bits. */
832 1.14 gwr tmp4 &= ~ZSWR4_SBMASK;
833 1.14 gwr tmp4 |= (cflag & CSTOPB) ?
834 1.14 gwr ZSWR4_TWOSB : ZSWR4_ONESB;
835 1.14 gwr /* Recompute parity bits. */
836 1.14 gwr tmp4 &= ~ZSWR4_PARMASK;
837 1.1 gwr if ((cflag & PARODD) == 0)
838 1.1 gwr tmp4 |= ZSWR4_EVENP;
839 1.1 gwr if (cflag & PARENB)
840 1.1 gwr tmp4 |= ZSWR4_PARENB;
841 1.1 gwr cs->cs_preg[4] = tmp4;
842 1.1 gwr
843 1.14 gwr /* The MD function zs_set_modes handled CRTSCTS, etc. */
844 1.8 gwr
845 1.8 gwr /*
846 1.1 gwr * If nothing is being transmitted, set up new current values,
847 1.1 gwr * else mark them as pending.
848 1.1 gwr */
849 1.1 gwr if (cs->cs_heldchange == 0) {
850 1.8 gwr if (zst->zst_tx_busy) {
851 1.1 gwr zst->zst_heldtbc = zst->zst_tbc;
852 1.1 gwr zst->zst_tbc = 0;
853 1.14 gwr cs->cs_heldchange = 0xFFFF;
854 1.1 gwr } else {
855 1.1 gwr zs_loadchannelregs(cs);
856 1.1 gwr }
857 1.1 gwr }
858 1.1 gwr splx(s);
859 1.15 gwr
860 1.15 gwr /* XXX - Check for DCD in case ZSWR15_DCD_IE was just set? */
861 1.14 gwr
862 1.14 gwr /* If we can throttle input, enable "high water" detection. */
863 1.14 gwr if (cflag & CHWFLOW) {
864 1.14 gwr zst->zst_rbhiwat = zstty_rbuf_hiwat;
865 1.14 gwr } else {
866 1.14 gwr /* This impossible value prevents a "high water" trigger. */
867 1.14 gwr zst->zst_rbhiwat = zstty_rbuf_size;
868 1.14 gwr /* XXX: Lost hwi ability, so unblock and restart. */
869 1.14 gwr zst->zst_rx_blocked = 0;
870 1.14 gwr if (zst->zst_tx_stopped) {
871 1.14 gwr zst->zst_tx_stopped = 0;
872 1.14 gwr zsstart(tp);
873 1.14 gwr }
874 1.14 gwr }
875 1.14 gwr
876 1.1 gwr return (0);
877 1.1 gwr }
878 1.1 gwr
879 1.1 gwr /*
880 1.1 gwr * Raise or lower modem control (DTR/RTS) signals. If a character is
881 1.1 gwr * in transmission, the change is deferred.
882 1.1 gwr */
883 1.1 gwr static void
884 1.1 gwr zs_modem(zst, onoff)
885 1.1 gwr struct zstty_softc *zst;
886 1.1 gwr int onoff;
887 1.1 gwr {
888 1.1 gwr struct zs_chanstate *cs;
889 1.14 gwr int s, clr, set;
890 1.1 gwr
891 1.1 gwr cs = zst->zst_cs;
892 1.14 gwr if (cs->cs_wr5_dtr == 0)
893 1.14 gwr return;
894 1.1 gwr
895 1.1 gwr if (onoff) {
896 1.14 gwr clr = 0;
897 1.14 gwr set = cs->cs_wr5_dtr;
898 1.1 gwr } else {
899 1.14 gwr clr = cs->cs_wr5_dtr;
900 1.14 gwr set = 0;
901 1.1 gwr }
902 1.14 gwr
903 1.1 gwr s = splzs();
904 1.14 gwr cs->cs_preg[5] &= ~clr;
905 1.14 gwr cs->cs_preg[5] |= set;
906 1.1 gwr if (cs->cs_heldchange == 0) {
907 1.8 gwr if (zst->zst_tx_busy) {
908 1.1 gwr zst->zst_heldtbc = zst->zst_tbc;
909 1.1 gwr zst->zst_tbc = 0;
910 1.8 gwr cs->cs_heldchange = (1<<5);
911 1.1 gwr } else {
912 1.8 gwr cs->cs_creg[5] = cs->cs_preg[5];
913 1.2 gwr zs_write_reg(cs, 5, cs->cs_creg[5]);
914 1.1 gwr }
915 1.1 gwr }
916 1.1 gwr splx(s);
917 1.1 gwr }
918 1.1 gwr
919 1.8 gwr /*
920 1.8 gwr * Try to block or unblock input using hardware flow-control.
921 1.8 gwr * This is called by kern/tty.c if MDMBUF|CRTSCTS is set, and
922 1.8 gwr * if this function returns non-zero, the TS_TBLOCK flag will
923 1.8 gwr * be set or cleared according to the "stop" arg passed.
924 1.8 gwr */
925 1.8 gwr int
926 1.8 gwr zshwiflow(tp, stop)
927 1.8 gwr struct tty *tp;
928 1.8 gwr int stop;
929 1.8 gwr {
930 1.8 gwr register struct zstty_softc *zst;
931 1.14 gwr register struct zs_chanstate *cs;
932 1.8 gwr int s;
933 1.8 gwr
934 1.8 gwr zst = zstty_cd.cd_devs[minor(tp->t_dev)];
935 1.14 gwr cs = zst->zst_cs;
936 1.14 gwr
937 1.14 gwr /* Can not do this without some bit assigned as RTS. */
938 1.14 gwr if (cs->cs_wr5_rts == 0)
939 1.14 gwr return (0);
940 1.8 gwr
941 1.8 gwr s = splzs();
942 1.8 gwr if (stop) {
943 1.8 gwr /*
944 1.8 gwr * The tty layer is asking us to block input.
945 1.8 gwr * If we already did it, just return TRUE.
946 1.8 gwr */
947 1.8 gwr if (zst->zst_rx_blocked)
948 1.8 gwr goto out;
949 1.8 gwr zst->zst_rx_blocked = 1;
950 1.8 gwr } else {
951 1.8 gwr /*
952 1.8 gwr * The tty layer is asking us to resume input.
953 1.8 gwr * The input ring is always empty by now.
954 1.8 gwr */
955 1.8 gwr zst->zst_rx_blocked = 0;
956 1.8 gwr }
957 1.8 gwr zs_hwiflow(zst, stop);
958 1.8 gwr out:
959 1.8 gwr splx(s);
960 1.8 gwr return 1;
961 1.8 gwr }
962 1.8 gwr
963 1.8 gwr /*
964 1.8 gwr * Internal version of zshwiflow
965 1.8 gwr * called at splzs
966 1.8 gwr */
967 1.8 gwr static void
968 1.8 gwr zs_hwiflow(zst, stop)
969 1.8 gwr register struct zstty_softc *zst;
970 1.8 gwr int stop;
971 1.8 gwr {
972 1.8 gwr register struct zs_chanstate *cs;
973 1.14 gwr register int clr, set;
974 1.8 gwr
975 1.8 gwr cs = zst->zst_cs;
976 1.14 gwr
977 1.14 gwr if (cs->cs_wr5_rts == 0)
978 1.14 gwr return;
979 1.8 gwr
980 1.8 gwr if (stop) {
981 1.8 gwr /* Block input (Lower RTS) */
982 1.14 gwr clr = cs->cs_wr5_rts;
983 1.14 gwr set = 0;
984 1.8 gwr } else {
985 1.8 gwr /* Unblock input (Raise RTS) */
986 1.14 gwr clr = 0;
987 1.14 gwr set = cs->cs_wr5_rts;
988 1.8 gwr }
989 1.8 gwr
990 1.14 gwr cs->cs_preg[5] &= ~clr;
991 1.14 gwr cs->cs_preg[5] |= set;
992 1.8 gwr if (cs->cs_heldchange == 0) {
993 1.8 gwr if (zst->zst_tx_busy) {
994 1.8 gwr zst->zst_heldtbc = zst->zst_tbc;
995 1.8 gwr zst->zst_tbc = 0;
996 1.8 gwr cs->cs_heldchange = (1<<5);
997 1.8 gwr } else {
998 1.8 gwr cs->cs_creg[5] = cs->cs_preg[5];
999 1.8 gwr zs_write_reg(cs, 5, cs->cs_creg[5]);
1000 1.8 gwr }
1001 1.8 gwr }
1002 1.8 gwr }
1003 1.8 gwr
1004 1.1 gwr
1005 1.1 gwr /****************************************************************
1006 1.1 gwr * Interface to the lower layer (zscc)
1007 1.1 gwr ****************************************************************/
1008 1.3 gwr
1009 1.14 gwr static void zstty_rxint __P((struct zs_chanstate *));
1010 1.14 gwr static void zstty_txint __P((struct zs_chanstate *));
1011 1.14 gwr static void zstty_stint __P((struct zs_chanstate *));
1012 1.14 gwr static void zstty_softint __P((struct zs_chanstate *));
1013 1.14 gwr
1014 1.14 gwr static void zsoverrun __P((struct zstty_softc *, long *, char *));
1015 1.1 gwr
1016 1.6 gwr /*
1017 1.8 gwr * receiver ready interrupt.
1018 1.8 gwr * called at splzs
1019 1.6 gwr */
1020 1.6 gwr static void
1021 1.1 gwr zstty_rxint(cs)
1022 1.1 gwr register struct zs_chanstate *cs;
1023 1.1 gwr {
1024 1.1 gwr register struct zstty_softc *zst;
1025 1.8 gwr register int cc, put, put_next, ringmask;
1026 1.1 gwr register u_char c, rr0, rr1;
1027 1.8 gwr register u_short ch_rr1;
1028 1.1 gwr
1029 1.1 gwr zst = cs->cs_private;
1030 1.1 gwr put = zst->zst_rbput;
1031 1.6 gwr ringmask = zst->zst_ringmask;
1032 1.1 gwr
1033 1.1 gwr nextchar:
1034 1.1 gwr
1035 1.5 gwr /*
1036 1.5 gwr * First read the status, because reading the received char
1037 1.5 gwr * destroys the status of this char.
1038 1.5 gwr */
1039 1.2 gwr rr1 = zs_read_reg(cs, 1);
1040 1.5 gwr c = zs_read_data(cs);
1041 1.8 gwr ch_rr1 = (c << 8) | rr1;
1042 1.1 gwr
1043 1.8 gwr if (ch_rr1 & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE)) {
1044 1.1 gwr /* Clear the receive error. */
1045 1.2 gwr zs_write_csr(cs, ZSWR0_RESET_ERRORS);
1046 1.1 gwr }
1047 1.1 gwr
1048 1.8 gwr /* XXX: Check for the stop character? */
1049 1.8 gwr
1050 1.8 gwr zst->zst_rbuf[put] = ch_rr1;
1051 1.6 gwr put_next = (put + 1) & ringmask;
1052 1.1 gwr
1053 1.1 gwr /* Would overrun if increment makes (put==get). */
1054 1.1 gwr if (put_next == zst->zst_rbget) {
1055 1.8 gwr zst->zst_rx_overrun = 1;
1056 1.1 gwr } else {
1057 1.1 gwr /* OK, really increment. */
1058 1.1 gwr put = put_next;
1059 1.1 gwr }
1060 1.1 gwr
1061 1.1 gwr /* Keep reading until the FIFO is empty. */
1062 1.2 gwr rr0 = zs_read_csr(cs);
1063 1.1 gwr if (rr0 & ZSRR0_RX_READY)
1064 1.1 gwr goto nextchar;
1065 1.1 gwr
1066 1.1 gwr /* Done reading. */
1067 1.1 gwr zst->zst_rbput = put;
1068 1.1 gwr
1069 1.8 gwr /*
1070 1.8 gwr * If ring is getting too full, try to block input.
1071 1.8 gwr */
1072 1.8 gwr cc = put - zst->zst_rbget;
1073 1.8 gwr if (cc < 0)
1074 1.8 gwr cc += zstty_rbuf_size;
1075 1.8 gwr if ((cc > zst->zst_rbhiwat) && (zst->zst_rx_blocked == 0)) {
1076 1.8 gwr zst->zst_rx_blocked = 1;
1077 1.8 gwr zs_hwiflow(zst, 1);
1078 1.8 gwr }
1079 1.8 gwr
1080 1.1 gwr /* Ask for softint() call. */
1081 1.1 gwr cs->cs_softreq = 1;
1082 1.1 gwr }
1083 1.1 gwr
1084 1.6 gwr /*
1085 1.6 gwr * transmitter ready interrupt. (splzs)
1086 1.6 gwr */
1087 1.6 gwr static void
1088 1.1 gwr zstty_txint(cs)
1089 1.1 gwr register struct zs_chanstate *cs;
1090 1.1 gwr {
1091 1.1 gwr register struct zstty_softc *zst;
1092 1.6 gwr register int count;
1093 1.1 gwr
1094 1.1 gwr zst = cs->cs_private;
1095 1.8 gwr
1096 1.8 gwr /*
1097 1.8 gwr * If we suspended output for a "held" change,
1098 1.8 gwr * then handle that now and resume.
1099 1.8 gwr * Do flow-control changes ASAP.
1100 1.8 gwr * When the only change is for flow control,
1101 1.8 gwr * avoid hitting other registers, because that
1102 1.8 gwr * often makes the stupid zs drop input...
1103 1.8 gwr */
1104 1.8 gwr if (cs->cs_heldchange) {
1105 1.8 gwr if (cs->cs_heldchange == (1<<5)) {
1106 1.8 gwr /* Avoid whacking the chip... */
1107 1.8 gwr cs->cs_creg[5] = cs->cs_preg[5];
1108 1.8 gwr zs_write_reg(cs, 5, cs->cs_creg[5]);
1109 1.8 gwr } else
1110 1.8 gwr zs_loadchannelregs(cs);
1111 1.8 gwr cs->cs_heldchange = 0;
1112 1.8 gwr count = zst->zst_heldtbc;
1113 1.8 gwr } else
1114 1.8 gwr count = zst->zst_tbc;
1115 1.1 gwr
1116 1.6 gwr /*
1117 1.6 gwr * If our transmit buffer still has data,
1118 1.6 gwr * just send the next character.
1119 1.6 gwr */
1120 1.1 gwr if (count > 0) {
1121 1.1 gwr /* Send the next char. */
1122 1.6 gwr zst->zst_tbc = --count;
1123 1.2 gwr zs_write_data(cs, *zst->zst_tba);
1124 1.2 gwr zst->zst_tba++;
1125 1.6 gwr return;
1126 1.1 gwr }
1127 1.1 gwr
1128 1.6 gwr zs_write_csr(cs, ZSWR0_RESET_TXINT);
1129 1.6 gwr
1130 1.6 gwr /* Ask the softint routine for more output. */
1131 1.8 gwr zst->zst_tx_busy = 0;
1132 1.8 gwr zst->zst_tx_done = 1;
1133 1.6 gwr cs->cs_softreq = 1;
1134 1.1 gwr }
1135 1.1 gwr
1136 1.6 gwr /*
1137 1.6 gwr * status change interrupt. (splzs)
1138 1.6 gwr */
1139 1.6 gwr static void
1140 1.1 gwr zstty_stint(cs)
1141 1.1 gwr register struct zs_chanstate *cs;
1142 1.1 gwr {
1143 1.1 gwr register struct zstty_softc *zst;
1144 1.14 gwr register u_char rr0, delta;
1145 1.1 gwr
1146 1.1 gwr zst = cs->cs_private;
1147 1.1 gwr
1148 1.2 gwr rr0 = zs_read_csr(cs);
1149 1.2 gwr zs_write_csr(cs, ZSWR0_RESET_STATUS);
1150 1.1 gwr
1151 1.6 gwr /*
1152 1.6 gwr * Check here for console break, so that we can abort
1153 1.6 gwr * even when interrupts are locking up the machine.
1154 1.6 gwr */
1155 1.6 gwr if ((rr0 & ZSRR0_BREAK) &&
1156 1.1 gwr (zst->zst_hwflags & ZS_HWFLAG_CONSOLE))
1157 1.1 gwr {
1158 1.14 gwr zs_abort(cs);
1159 1.6 gwr return;
1160 1.1 gwr }
1161 1.1 gwr
1162 1.8 gwr /*
1163 1.14 gwr * We have to accumulate status line changes here.
1164 1.14 gwr * Otherwise, if we get multiple status interrupts
1165 1.14 gwr * before the softint runs, we could fail to notice
1166 1.14 gwr * some status line changes in the softint routine.
1167 1.14 gwr * Fix from Bill Studenmund, October 1996.
1168 1.14 gwr */
1169 1.14 gwr delta = (cs->cs_rr0 ^ rr0);
1170 1.14 gwr cs->cs_rr0_delta |= delta;
1171 1.14 gwr cs->cs_rr0 = rr0;
1172 1.14 gwr
1173 1.14 gwr /*
1174 1.8 gwr * Need to handle CTS output flow control here.
1175 1.8 gwr * Output remains stopped as long as either the
1176 1.8 gwr * zst_tx_stopped or TS_TTSTOP flag is set.
1177 1.8 gwr * Never restart here; the softint routine will
1178 1.8 gwr * do that after things are ready to move.
1179 1.8 gwr */
1180 1.14 gwr if ((delta & cs->cs_rr0_cts) &&
1181 1.14 gwr ((rr0 & cs->cs_rr0_cts) == 0))
1182 1.14 gwr {
1183 1.8 gwr zst->zst_tbc = 0;
1184 1.8 gwr zst->zst_heldtbc = 0;
1185 1.8 gwr zst->zst_tx_stopped = 1;
1186 1.8 gwr }
1187 1.8 gwr zst->zst_st_check = 1;
1188 1.6 gwr
1189 1.1 gwr /* Ask for softint() call. */
1190 1.1 gwr cs->cs_softreq = 1;
1191 1.1 gwr }
1192 1.1 gwr
1193 1.1 gwr /*
1194 1.1 gwr * Print out a ring or fifo overrun error message.
1195 1.1 gwr */
1196 1.1 gwr static void
1197 1.1 gwr zsoverrun(zst, ptime, what)
1198 1.1 gwr struct zstty_softc *zst;
1199 1.1 gwr long *ptime;
1200 1.1 gwr char *what;
1201 1.1 gwr {
1202 1.1 gwr
1203 1.1 gwr if (*ptime != time.tv_sec) {
1204 1.1 gwr *ptime = time.tv_sec;
1205 1.1 gwr log(LOG_WARNING, "%s: %s overrun\n",
1206 1.1 gwr zst->zst_dev.dv_xname, what);
1207 1.1 gwr }
1208 1.1 gwr }
1209 1.1 gwr
1210 1.6 gwr /*
1211 1.6 gwr * Software interrupt. Called at zssoft
1212 1.8 gwr *
1213 1.8 gwr * The main job to be done here is to empty the input ring
1214 1.8 gwr * by passing its contents up to the tty layer. The ring is
1215 1.8 gwr * always emptied during this operation, therefore the ring
1216 1.8 gwr * must not be larger than the space after "high water" in
1217 1.8 gwr * the tty layer, or the tty layer might drop our input.
1218 1.8 gwr *
1219 1.8 gwr * Note: an "input blockage" condition is assumed to exist if
1220 1.8 gwr * EITHER the TS_TBLOCK flag or zst_rx_blocked flag is set.
1221 1.6 gwr */
1222 1.6 gwr static void
1223 1.1 gwr zstty_softint(cs)
1224 1.1 gwr struct zs_chanstate *cs;
1225 1.1 gwr {
1226 1.1 gwr register struct zstty_softc *zst;
1227 1.1 gwr register struct linesw *line;
1228 1.1 gwr register struct tty *tp;
1229 1.1 gwr register int get, c, s;
1230 1.8 gwr int ringmask, overrun;
1231 1.1 gwr register u_short ring_data;
1232 1.14 gwr register u_char rr0, delta;
1233 1.1 gwr
1234 1.1 gwr zst = cs->cs_private;
1235 1.1 gwr tp = zst->zst_tty;
1236 1.1 gwr line = &linesw[tp->t_line];
1237 1.6 gwr ringmask = zst->zst_ringmask;
1238 1.8 gwr overrun = 0;
1239 1.6 gwr
1240 1.6 gwr /*
1241 1.8 gwr * Raise to tty priority while servicing the ring.
1242 1.6 gwr */
1243 1.8 gwr s = spltty();
1244 1.1 gwr
1245 1.8 gwr if (zst->zst_rx_overrun) {
1246 1.8 gwr zst->zst_rx_overrun = 0;
1247 1.6 gwr zsoverrun(zst, &zst->zst_rotime, "ring");
1248 1.1 gwr }
1249 1.1 gwr
1250 1.1 gwr /*
1251 1.1 gwr * Copy data from the receive ring into the tty layer.
1252 1.1 gwr */
1253 1.1 gwr get = zst->zst_rbget;
1254 1.1 gwr while (get != zst->zst_rbput) {
1255 1.1 gwr ring_data = zst->zst_rbuf[get];
1256 1.6 gwr get = (get + 1) & ringmask;
1257 1.1 gwr
1258 1.1 gwr if (ring_data & ZSRR1_DO)
1259 1.8 gwr overrun++;
1260 1.1 gwr /* low byte of ring_data is rr1 */
1261 1.1 gwr c = (ring_data >> 8) & 0xff;
1262 1.1 gwr if (ring_data & ZSRR1_FE)
1263 1.1 gwr c |= TTY_FE;
1264 1.1 gwr if (ring_data & ZSRR1_PE)
1265 1.1 gwr c |= TTY_PE;
1266 1.1 gwr
1267 1.1 gwr line->l_rint(c, tp);
1268 1.1 gwr }
1269 1.1 gwr zst->zst_rbget = get;
1270 1.1 gwr
1271 1.6 gwr /*
1272 1.6 gwr * If the overrun flag is set now, it was set while
1273 1.6 gwr * copying char/status pairs from the ring, which
1274 1.6 gwr * means this was a hardware (fifo) overrun.
1275 1.6 gwr */
1276 1.8 gwr if (overrun) {
1277 1.6 gwr zsoverrun(zst, &zst->zst_fotime, "fifo");
1278 1.1 gwr }
1279 1.1 gwr
1280 1.8 gwr /*
1281 1.8 gwr * We have emptied the input ring. Maybe unblock input.
1282 1.8 gwr * Note: an "input blockage" condition is assumed to exist
1283 1.8 gwr * when EITHER zst_rx_blocked or the TS_TBLOCK flag is set,
1284 1.8 gwr * so unblock here ONLY if TS_TBLOCK has not been set.
1285 1.8 gwr */
1286 1.8 gwr if (zst->zst_rx_blocked && ((tp->t_state & TS_TBLOCK) == 0)) {
1287 1.8 gwr (void) splzs();
1288 1.8 gwr zst->zst_rx_blocked = 0;
1289 1.8 gwr zs_hwiflow(zst, 0); /* unblock input */
1290 1.8 gwr (void) spltty();
1291 1.8 gwr }
1292 1.8 gwr
1293 1.8 gwr /*
1294 1.8 gwr * Do any deferred work for status interrupts.
1295 1.8 gwr * The rr0 was saved in the h/w interrupt to
1296 1.8 gwr * avoid another splzs in here.
1297 1.8 gwr */
1298 1.8 gwr if (zst->zst_st_check) {
1299 1.8 gwr zst->zst_st_check = 0;
1300 1.8 gwr
1301 1.14 gwr (void) splzs();
1302 1.13 gwr rr0 = cs->cs_rr0;
1303 1.13 gwr delta = cs->cs_rr0_delta;
1304 1.13 gwr cs->cs_rr0_delta = 0;
1305 1.14 gwr (void) spltty();
1306 1.14 gwr
1307 1.14 gwr /* Note, the MD code may use DCD for something else. */
1308 1.14 gwr if (delta & cs->cs_rr0_dcd) {
1309 1.14 gwr c = ((rr0 & cs->cs_rr0_dcd) != 0);
1310 1.8 gwr if (line->l_modem(tp, c) == 0)
1311 1.8 gwr zs_modem(zst, c);
1312 1.8 gwr }
1313 1.14 gwr
1314 1.14 gwr /* Note, cs_rr0_cts is set only with H/W flow control. */
1315 1.14 gwr if (delta & cs->cs_rr0_cts) {
1316 1.8 gwr /*
1317 1.8 gwr * Only do restart here. Stop is handled
1318 1.8 gwr * at the h/w interrupt level.
1319 1.8 gwr */
1320 1.14 gwr if (rr0 & cs->cs_rr0_cts) {
1321 1.8 gwr zst->zst_tx_stopped = 0;
1322 1.14 gwr /* tp->t_state &= ~TS_TTSTOP; */
1323 1.8 gwr (*line->l_start)(tp);
1324 1.1 gwr }
1325 1.1 gwr }
1326 1.8 gwr }
1327 1.8 gwr
1328 1.8 gwr if (zst->zst_tx_done) {
1329 1.8 gwr zst->zst_tx_done = 0;
1330 1.1 gwr tp->t_state &= ~TS_BUSY;
1331 1.1 gwr if (tp->t_state & TS_FLUSH)
1332 1.1 gwr tp->t_state &= ~TS_FLUSH;
1333 1.1 gwr else
1334 1.1 gwr ndflush(&tp->t_outq, zst->zst_tba -
1335 1.8 gwr (caddr_t) tp->t_outq.c_cf);
1336 1.1 gwr line->l_start(tp);
1337 1.1 gwr }
1338 1.1 gwr
1339 1.6 gwr splx(s);
1340 1.1 gwr }
1341 1.1 gwr
1342 1.1 gwr struct zsops zsops_tty = {
1343 1.1 gwr zstty_rxint, /* receive char available */
1344 1.1 gwr zstty_stint, /* external/status */
1345 1.1 gwr zstty_txint, /* xmit buffer empty */
1346 1.1 gwr zstty_softint, /* process software interrupt */
1347 1.1 gwr };
1348 1.1 gwr
1349