z8530tty.c revision 1.19 1 1.19 gwr /* $NetBSD: z8530tty.c,v 1.19 1997/10/17 22:55:09 gwr Exp $ */
2 1.1 gwr
3 1.1 gwr /*
4 1.1 gwr * Copyright (c) 1994 Gordon W. Ross
5 1.1 gwr * Copyright (c) 1992, 1993
6 1.1 gwr * The Regents of the University of California. All rights reserved.
7 1.1 gwr *
8 1.1 gwr * This software was developed by the Computer Systems Engineering group
9 1.1 gwr * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10 1.1 gwr * contributed to Berkeley.
11 1.1 gwr *
12 1.1 gwr * All advertising materials mentioning features or use of this software
13 1.1 gwr * must display the following acknowledgement:
14 1.1 gwr * This product includes software developed by the University of
15 1.1 gwr * California, Lawrence Berkeley Laboratory.
16 1.1 gwr *
17 1.1 gwr * Redistribution and use in source and binary forms, with or without
18 1.1 gwr * modification, are permitted provided that the following conditions
19 1.1 gwr * are met:
20 1.1 gwr * 1. Redistributions of source code must retain the above copyright
21 1.1 gwr * notice, this list of conditions and the following disclaimer.
22 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright
23 1.1 gwr * notice, this list of conditions and the following disclaimer in the
24 1.1 gwr * documentation and/or other materials provided with the distribution.
25 1.1 gwr * 3. All advertising materials mentioning features or use of this software
26 1.1 gwr * must display the following acknowledgement:
27 1.1 gwr * This product includes software developed by the University of
28 1.1 gwr * California, Berkeley and its contributors.
29 1.1 gwr * 4. Neither the name of the University nor the names of its contributors
30 1.1 gwr * may be used to endorse or promote products derived from this software
31 1.1 gwr * without specific prior written permission.
32 1.1 gwr *
33 1.1 gwr * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
34 1.1 gwr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35 1.1 gwr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36 1.1 gwr * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
37 1.1 gwr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 1.1 gwr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39 1.1 gwr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 1.1 gwr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
41 1.1 gwr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42 1.1 gwr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 1.1 gwr * SUCH DAMAGE.
44 1.1 gwr *
45 1.1 gwr * @(#)zs.c 8.1 (Berkeley) 7/19/93
46 1.1 gwr */
47 1.1 gwr
48 1.1 gwr /*
49 1.1 gwr * Zilog Z8530 Dual UART driver (tty interface)
50 1.1 gwr *
51 1.1 gwr * This is the "slave" driver that will be attached to
52 1.1 gwr * the "zsc" driver for plain "tty" async. serial lines.
53 1.8 gwr *
54 1.8 gwr * Credits, history:
55 1.8 gwr *
56 1.8 gwr * The original version of this code was the sparc/dev/zs.c driver
57 1.8 gwr * as distributed with the Berkeley 4.4 Lite release. Since then,
58 1.8 gwr * Gordon Ross reorganized the code into the current parent/child
59 1.8 gwr * driver scheme, separating the Sun keyboard and mouse support
60 1.8 gwr * into independent child drivers.
61 1.8 gwr *
62 1.8 gwr * RTS/CTS flow-control support was a collaboration of:
63 1.8 gwr * Gordon Ross <gwr (at) netbsd.org>,
64 1.8 gwr * Bill Studenmund <wrstuden (at) loki.stanford.edu>
65 1.8 gwr * Ian Dall <Ian.Dall (at) dsto.defence.gov.au>
66 1.1 gwr */
67 1.1 gwr
68 1.1 gwr #include <sys/param.h>
69 1.1 gwr #include <sys/systm.h>
70 1.1 gwr #include <sys/proc.h>
71 1.1 gwr #include <sys/device.h>
72 1.1 gwr #include <sys/conf.h>
73 1.1 gwr #include <sys/file.h>
74 1.1 gwr #include <sys/ioctl.h>
75 1.6 gwr #include <sys/malloc.h>
76 1.1 gwr #include <sys/tty.h>
77 1.1 gwr #include <sys/time.h>
78 1.1 gwr #include <sys/kernel.h>
79 1.1 gwr #include <sys/syslog.h>
80 1.1 gwr
81 1.1 gwr #include <dev/ic/z8530reg.h>
82 1.1 gwr #include <machine/z8530var.h>
83 1.1 gwr
84 1.17 jtk #include "locators.h"
85 1.17 jtk
86 1.1 gwr /*
87 1.1 gwr * How many input characters we can buffer.
88 1.1 gwr * The port-specific var.h may override this.
89 1.1 gwr * Note: must be a power of two!
90 1.1 gwr */
91 1.1 gwr #ifndef ZSTTY_RING_SIZE
92 1.6 gwr #define ZSTTY_RING_SIZE 2048
93 1.1 gwr #endif
94 1.6 gwr
95 1.6 gwr /*
96 1.6 gwr * Make this an option variable one can patch.
97 1.6 gwr * But be warned: this must be a power of 2!
98 1.6 gwr */
99 1.6 gwr int zstty_rbuf_size = ZSTTY_RING_SIZE;
100 1.1 gwr
101 1.8 gwr /* This should usually be 3/4 of ZSTTY_RING_SIZE */
102 1.8 gwr int zstty_rbuf_hiwat = (ZSTTY_RING_SIZE - (ZSTTY_RING_SIZE >> 2));
103 1.8 gwr
104 1.1 gwr struct zstty_softc {
105 1.1 gwr struct device zst_dev; /* required first: base device */
106 1.1 gwr struct tty *zst_tty;
107 1.1 gwr struct zs_chanstate *zst_cs;
108 1.1 gwr
109 1.1 gwr int zst_hwflags; /* see z8530var.h */
110 1.1 gwr int zst_swflags; /* TIOCFLAG_SOFTCAR, ... <ttycom.h> */
111 1.1 gwr
112 1.8 gwr /*
113 1.8 gwr * Printing an overrun error message often takes long enough to
114 1.8 gwr * cause another overrun, so we only print one per second.
115 1.8 gwr */
116 1.8 gwr long zst_rotime; /* time of last ring overrun */
117 1.8 gwr long zst_fotime; /* time of last fifo overrun */
118 1.8 gwr
119 1.8 gwr /*
120 1.8 gwr * The receive ring buffer.
121 1.8 gwr */
122 1.8 gwr int zst_rbget; /* ring buffer `get' index */
123 1.8 gwr volatile int zst_rbput; /* ring buffer `put' index */
124 1.8 gwr int zst_ringmask;
125 1.8 gwr int zst_rbhiwat;
126 1.8 gwr
127 1.8 gwr u_short *zst_rbuf; /* rr1, data pairs */
128 1.1 gwr
129 1.1 gwr /*
130 1.1 gwr * The transmit byte count and address are used for pseudo-DMA
131 1.1 gwr * output in the hardware interrupt code. PDMA can be suspended
132 1.1 gwr * to get pending changes done; heldtbc is used for this. It can
133 1.1 gwr * also be stopped for ^S; this sets TS_TTSTOP in tp->t_state.
134 1.1 gwr */
135 1.1 gwr int zst_tbc; /* transmit byte count */
136 1.1 gwr caddr_t zst_tba; /* transmit buffer address */
137 1.1 gwr int zst_heldtbc; /* held tbc while xmission stopped */
138 1.1 gwr
139 1.8 gwr /* Flags to communicate with zstty_softint() */
140 1.8 gwr volatile char zst_rx_blocked; /* input block at ring */
141 1.8 gwr volatile char zst_rx_overrun; /* ring overrun */
142 1.8 gwr volatile char zst_tx_busy; /* working on an output chunk */
143 1.8 gwr volatile char zst_tx_done; /* done with one output chunk */
144 1.8 gwr volatile char zst_tx_stopped; /* H/W level stop (lost CTS) */
145 1.8 gwr volatile char zst_st_check; /* got a status interrupt */
146 1.8 gwr char pad[2];
147 1.1 gwr };
148 1.1 gwr
149 1.1 gwr
150 1.1 gwr /* Definition of the driver for autoconfig. */
151 1.14 gwr #ifdef __BROKEN_INDIRECT_CONFIG
152 1.1 gwr static int zstty_match(struct device *, void *, void *);
153 1.14 gwr #else
154 1.14 gwr static int zstty_match(struct device *, struct cfdata *, void *);
155 1.14 gwr #endif
156 1.1 gwr static void zstty_attach(struct device *, struct device *, void *);
157 1.1 gwr
158 1.4 thorpej struct cfattach zstty_ca = {
159 1.4 thorpej sizeof(struct zstty_softc), zstty_match, zstty_attach
160 1.4 thorpej };
161 1.4 thorpej
162 1.4 thorpej struct cfdriver zstty_cd = {
163 1.4 thorpej NULL, "zstty", DV_TTY
164 1.1 gwr };
165 1.1 gwr
166 1.1 gwr struct zsops zsops_tty;
167 1.1 gwr
168 1.1 gwr /* Routines called from other code. */
169 1.1 gwr cdev_decl(zs); /* open, close, read, write, ioctl, stop, ... */
170 1.1 gwr
171 1.14 gwr static void zsstart __P((struct tty *));
172 1.14 gwr static int zsparam __P((struct tty *, struct termios *));
173 1.14 gwr static void zs_modem __P((struct zstty_softc *zst, int onoff));
174 1.14 gwr static int zshwiflow __P((struct tty *, int));
175 1.14 gwr static void zs_hwiflow __P((struct zstty_softc *, int));
176 1.1 gwr
177 1.1 gwr /*
178 1.1 gwr * zstty_match: how is this zs channel configured?
179 1.1 gwr */
180 1.14 gwr #ifdef __BROKEN_INDIRECT_CONFIG
181 1.14 gwr int
182 1.14 gwr zstty_match(parent, vcf, aux)
183 1.14 gwr struct device *parent;
184 1.14 gwr void *vcf, *aux;
185 1.14 gwr {
186 1.14 gwr struct cfdata *cf = vcf;
187 1.14 gwr struct zsc_attach_args *args = aux;
188 1.14 gwr
189 1.14 gwr /* Exact match is better than wildcard. */
190 1.17 jtk if (cf->cf_loc[ZSCCF_CHANNEL] == args->channel)
191 1.14 gwr return 2;
192 1.14 gwr
193 1.14 gwr /* This driver accepts wildcard. */
194 1.17 jtk if (cf->cf_loc[ZSCCF_CHANNEL] == ZSCCF_CHANNEL_DEFAULT)
195 1.14 gwr return 1;
196 1.14 gwr
197 1.14 gwr return 0;
198 1.14 gwr }
199 1.14 gwr #else /* __BROKEN_INDIRECT_CONFIG */
200 1.1 gwr int
201 1.14 gwr zstty_match(parent, cf, aux)
202 1.1 gwr struct device *parent;
203 1.14 gwr struct cfdata *cf;
204 1.14 gwr void *aux;
205 1.1 gwr {
206 1.1 gwr struct zsc_attach_args *args = aux;
207 1.1 gwr
208 1.1 gwr /* Exact match is better than wildcard. */
209 1.17 jtk if (cf->cf_loc[ZSCCF_CHANNEL] == args->channel)
210 1.1 gwr return 2;
211 1.1 gwr
212 1.1 gwr /* This driver accepts wildcard. */
213 1.17 jtk if (cf->cf_loc[ZSCCF_CHANNEL] == ZSCCF_CHANNEL_DEFAULT)
214 1.1 gwr return 1;
215 1.1 gwr
216 1.1 gwr return 0;
217 1.1 gwr }
218 1.14 gwr #endif /* __BROKEN_INDIRECT_CONFIG */
219 1.1 gwr
220 1.1 gwr void
221 1.1 gwr zstty_attach(parent, self, aux)
222 1.1 gwr struct device *parent, *self;
223 1.1 gwr void *aux;
224 1.1 gwr
225 1.1 gwr {
226 1.1 gwr struct zsc_softc *zsc = (void *) parent;
227 1.1 gwr struct zstty_softc *zst = (void *) self;
228 1.14 gwr struct cfdata *cf = self->dv_cfdata;
229 1.1 gwr struct zsc_attach_args *args = aux;
230 1.1 gwr struct zs_chanstate *cs;
231 1.1 gwr struct tty *tp;
232 1.1 gwr int channel, tty_unit;
233 1.1 gwr dev_t dev;
234 1.1 gwr
235 1.3 gwr tty_unit = zst->zst_dev.dv_unit;
236 1.1 gwr channel = args->channel;
237 1.14 gwr cs = zsc->zsc_cs[channel];
238 1.1 gwr cs->cs_private = zst;
239 1.1 gwr cs->cs_ops = &zsops_tty;
240 1.1 gwr
241 1.1 gwr zst->zst_cs = cs;
242 1.1 gwr zst->zst_swflags = cf->cf_flags; /* softcar, etc. */
243 1.1 gwr zst->zst_hwflags = args->hwflags;
244 1.14 gwr dev = makedev(zs_major, tty_unit);
245 1.1 gwr
246 1.1 gwr if (zst->zst_swflags)
247 1.12 christos printf(" flags 0x%x", zst->zst_swflags);
248 1.1 gwr
249 1.1 gwr if (zst->zst_hwflags & ZS_HWFLAG_CONSOLE)
250 1.12 christos printf(" (console)");
251 1.1 gwr else {
252 1.1 gwr #ifdef KGDB
253 1.1 gwr /*
254 1.15 gwr * Allow kgdb to "take over" this port. Returns true
255 1.15 gwr * if this serial port is in-use by kgdb.
256 1.1 gwr */
257 1.1 gwr if (zs_check_kgdb(cs, dev)) {
258 1.15 gwr printf(" (kgdb)\n");
259 1.1 gwr /*
260 1.1 gwr * This is the kgdb port (exclusive use)
261 1.1 gwr * so skip the normal attach code.
262 1.1 gwr */
263 1.1 gwr return;
264 1.1 gwr }
265 1.1 gwr #endif
266 1.1 gwr }
267 1.12 christos printf("\n");
268 1.1 gwr
269 1.6 gwr tp = ttymalloc();
270 1.1 gwr tp->t_dev = dev;
271 1.1 gwr tp->t_oproc = zsstart;
272 1.1 gwr tp->t_param = zsparam;
273 1.8 gwr tp->t_hwiflow = zshwiflow;
274 1.9 gwr tty_attach(tp);
275 1.1 gwr
276 1.6 gwr zst->zst_tty = tp;
277 1.8 gwr zst->zst_rbhiwat = zstty_rbuf_size; /* impossible value */
278 1.6 gwr zst->zst_ringmask = zstty_rbuf_size - 1;
279 1.6 gwr zst->zst_rbuf = malloc(zstty_rbuf_size * sizeof(zst->zst_rbuf[0]),
280 1.6 gwr M_DEVBUF, M_WAITOK);
281 1.6 gwr
282 1.14 gwr /* XXX - Do we need an MD hook here? */
283 1.14 gwr
284 1.1 gwr /*
285 1.1 gwr * Hardware init
286 1.1 gwr */
287 1.1 gwr if (zst->zst_hwflags & ZS_HWFLAG_CONSOLE) {
288 1.14 gwr /* Call zsparam similar to open. */
289 1.14 gwr struct termios t;
290 1.14 gwr
291 1.14 gwr /* Make console output work while closed. */
292 1.1 gwr zst->zst_swflags |= TIOCFLAG_SOFTCAR;
293 1.14 gwr /* Setup the "new" parameters in t. */
294 1.14 gwr bzero((void*)&t, sizeof(t));
295 1.14 gwr t.c_cflag = cs->cs_defcflag;
296 1.14 gwr t.c_ospeed = cs->cs_defspeed;
297 1.14 gwr /* Enable interrupts. */
298 1.14 gwr cs->cs_preg[1] = ZSWR1_RIE | ZSWR1_SIE;
299 1.14 gwr /* Make sure zsparam will see changes. */
300 1.14 gwr tp->t_ospeed = 0;
301 1.16 mrg (void)zsparam(tp, &t);
302 1.1 gwr } else {
303 1.1 gwr /* Not the console; may need reset. */
304 1.1 gwr int reset, s;
305 1.1 gwr reset = (channel == 0) ?
306 1.1 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
307 1.1 gwr s = splzs();
308 1.2 gwr zs_write_reg(cs, 9, reset);
309 1.1 gwr splx(s);
310 1.1 gwr }
311 1.1 gwr
312 1.1 gwr /*
313 1.1 gwr * Initialize state of modem control lines (DTR).
314 1.1 gwr * If softcar is set, turn on DTR now and leave it.
315 1.1 gwr * otherwise, turn off DTR now, and raise in open.
316 1.1 gwr * (Keeps modem from answering too early.)
317 1.1 gwr */
318 1.1 gwr zs_modem(zst, (zst->zst_swflags & TIOCFLAG_SOFTCAR) ? 1 : 0);
319 1.1 gwr }
320 1.1 gwr
321 1.1 gwr
322 1.1 gwr /*
323 1.1 gwr * Return pointer to our tty.
324 1.1 gwr */
325 1.1 gwr struct tty *
326 1.1 gwr zstty(dev)
327 1.1 gwr dev_t dev;
328 1.1 gwr {
329 1.1 gwr struct zstty_softc *zst;
330 1.1 gwr int unit = minor(dev);
331 1.1 gwr
332 1.1 gwr #ifdef DIAGNOSTIC
333 1.4 thorpej if (unit >= zstty_cd.cd_ndevs)
334 1.1 gwr panic("zstty");
335 1.1 gwr #endif
336 1.4 thorpej zst = zstty_cd.cd_devs[unit];
337 1.1 gwr return (zst->zst_tty);
338 1.1 gwr }
339 1.1 gwr
340 1.1 gwr
341 1.1 gwr /*
342 1.1 gwr * Open a zs serial (tty) port.
343 1.1 gwr */
344 1.1 gwr int
345 1.1 gwr zsopen(dev, flags, mode, p)
346 1.1 gwr dev_t dev;
347 1.1 gwr int flags;
348 1.1 gwr int mode;
349 1.1 gwr struct proc *p;
350 1.1 gwr {
351 1.1 gwr register struct tty *tp;
352 1.1 gwr register struct zs_chanstate *cs;
353 1.1 gwr struct zstty_softc *zst;
354 1.1 gwr int error, s, unit;
355 1.1 gwr
356 1.1 gwr unit = minor(dev);
357 1.4 thorpej if (unit >= zstty_cd.cd_ndevs)
358 1.1 gwr return (ENXIO);
359 1.4 thorpej zst = zstty_cd.cd_devs[unit];
360 1.1 gwr if (zst == NULL)
361 1.1 gwr return (ENXIO);
362 1.1 gwr tp = zst->zst_tty;
363 1.1 gwr cs = zst->zst_cs;
364 1.1 gwr
365 1.1 gwr /* If KGDB took the line, then tp==NULL */
366 1.1 gwr if (tp == NULL)
367 1.1 gwr return (EBUSY);
368 1.1 gwr
369 1.1 gwr /* It's simpler to do this up here. */
370 1.1 gwr if (((tp->t_state & (TS_ISOPEN | TS_XCLUDE))
371 1.1 gwr == (TS_ISOPEN | TS_XCLUDE))
372 1.1 gwr && (p->p_ucred->cr_uid != 0) )
373 1.1 gwr {
374 1.1 gwr return (EBUSY);
375 1.1 gwr }
376 1.1 gwr
377 1.1 gwr s = spltty();
378 1.1 gwr
379 1.1 gwr if ((tp->t_state & TS_ISOPEN) == 0) {
380 1.1 gwr /* First open. */
381 1.14 gwr struct termios t;
382 1.14 gwr
383 1.14 gwr /*
384 1.14 gwr * Setup the "new" parameters in t.
385 1.14 gwr * Can not use tp->t because zsparam
386 1.14 gwr * deals only with what has changed.
387 1.14 gwr */
388 1.14 gwr bzero((void*)&t, sizeof(t));
389 1.14 gwr t.c_cflag = cs->cs_defcflag;
390 1.1 gwr if (zst->zst_swflags & TIOCFLAG_CLOCAL)
391 1.14 gwr t.c_cflag |= CLOCAL;
392 1.1 gwr if (zst->zst_swflags & TIOCFLAG_CRTSCTS)
393 1.14 gwr t.c_cflag |= CRTSCTS;
394 1.1 gwr if (zst->zst_swflags & TIOCFLAG_MDMBUF)
395 1.14 gwr t.c_cflag |= MDMBUF;
396 1.14 gwr t.c_ospeed = cs->cs_defspeed;
397 1.14 gwr /* Enable interrupts. */
398 1.14 gwr cs->cs_preg[1] = ZSWR1_RIE | ZSWR1_SIE;
399 1.14 gwr /* Make sure zsparam will see changes. */
400 1.14 gwr tp->t_ospeed = 0;
401 1.14 gwr (void) zsparam(tp, &t);
402 1.14 gwr /*
403 1.14 gwr * Note: zsparam has done: cflag, ispeed, ospeed
404 1.14 gwr * so we just need to do: iflag, oflag, lflag, cc
405 1.14 gwr * For "raw" mode, just leave all zeros.
406 1.14 gwr */
407 1.14 gwr if ((zst->zst_hwflags & ZS_HWFLAG_RAW) == 0) {
408 1.14 gwr tp->t_iflag = TTYDEF_IFLAG;
409 1.14 gwr tp->t_oflag = TTYDEF_OFLAG;
410 1.14 gwr tp->t_lflag = TTYDEF_LFLAG;
411 1.14 gwr }
412 1.19 gwr ttychars(tp);
413 1.1 gwr ttsetwater(tp);
414 1.1 gwr /* Flush any pending input. */
415 1.1 gwr zst->zst_rbget = zst->zst_rbput;
416 1.1 gwr zs_iflush(cs); /* XXX */
417 1.14 gwr /* DTR was turned on by zsparam. */
418 1.1 gwr if (zst->zst_swflags & TIOCFLAG_SOFTCAR) {
419 1.1 gwr tp->t_state |= TS_CARR_ON;
420 1.1 gwr }
421 1.14 gwr /* XXX - The MD code could just force CLOCAL instead. */
422 1.14 gwr if (zst->zst_hwflags & ZS_HWFLAG_NO_DCD) {
423 1.14 gwr tp->t_state |= TS_CARR_ON;
424 1.14 gwr }
425 1.1 gwr }
426 1.1 gwr error = 0;
427 1.1 gwr
428 1.14 gwr /* In this section, we may touch the chip. */
429 1.14 gwr (void)splzs();
430 1.14 gwr
431 1.14 gwr /*
432 1.14 gwr * Get initial value of RR0. This is done after we
433 1.14 gwr * raise DTR in case the cable loops DTR back to CTS.
434 1.14 gwr */
435 1.14 gwr cs->cs_rr0 = zs_read_csr(cs);
436 1.14 gwr
437 1.14 gwr /*
438 1.14 gwr * Wait for DCD (if necessary). Note that we might
439 1.14 gwr * never get status interrupt if DCD is already on.
440 1.14 gwr */
441 1.1 gwr for (;;) {
442 1.14 gwr /* Check the DCD bit (if we have one). */
443 1.14 gwr if (cs->cs_rr0 & cs->cs_rr0_dcd)
444 1.1 gwr tp->t_state |= TS_CARR_ON;
445 1.1 gwr
446 1.1 gwr if ((tp->t_state & TS_CARR_ON) ||
447 1.1 gwr (tp->t_cflag & CLOCAL) ||
448 1.1 gwr (flags & O_NONBLOCK) )
449 1.1 gwr break;
450 1.1 gwr
451 1.14 gwr /* Sleep waiting for a status interrupt. */
452 1.1 gwr tp->t_state |= TS_WOPEN;
453 1.1 gwr error = ttysleep(tp, (caddr_t)&tp->t_rawq,
454 1.1 gwr TTIPRI | PCATCH, ttopen, 0);
455 1.1 gwr if (error) {
456 1.1 gwr if ((tp->t_state & TS_ISOPEN) == 0) {
457 1.1 gwr /* Never get here with softcar */
458 1.1 gwr zs_modem(zst, 0);
459 1.1 gwr tp->t_state &= ~TS_WOPEN;
460 1.1 gwr ttwakeup(tp);
461 1.1 gwr }
462 1.1 gwr break;
463 1.1 gwr }
464 1.14 gwr /* The status interrupt changed cs->cs_rr0 */
465 1.1 gwr }
466 1.1 gwr
467 1.1 gwr splx(s);
468 1.1 gwr if (error == 0)
469 1.1 gwr error = linesw[tp->t_line].l_open(dev, tp);
470 1.1 gwr return (error);
471 1.1 gwr }
472 1.1 gwr
473 1.1 gwr /*
474 1.1 gwr * Close a zs serial port.
475 1.1 gwr */
476 1.1 gwr int
477 1.1 gwr zsclose(dev, flags, mode, p)
478 1.1 gwr dev_t dev;
479 1.1 gwr int flags;
480 1.1 gwr int mode;
481 1.1 gwr struct proc *p;
482 1.1 gwr {
483 1.1 gwr struct zstty_softc *zst;
484 1.1 gwr register struct zs_chanstate *cs;
485 1.1 gwr register struct tty *tp;
486 1.1 gwr int hup, s;
487 1.1 gwr
488 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
489 1.1 gwr cs = zst->zst_cs;
490 1.1 gwr tp = zst->zst_tty;
491 1.1 gwr
492 1.1 gwr /* XXX This is for cons.c. */
493 1.1 gwr if ((tp->t_state & TS_ISOPEN) == 0)
494 1.1 gwr return 0;
495 1.1 gwr
496 1.1 gwr (*linesw[tp->t_line].l_close)(tp, flags);
497 1.14 gwr
498 1.14 gwr /* Disable interrupts. */
499 1.14 gwr s = splzs();
500 1.14 gwr cs->cs_creg[1] = cs->cs_preg[1] = 0;
501 1.14 gwr zs_write_reg(cs, 1, cs->cs_creg[1]);
502 1.14 gwr splx(s);
503 1.14 gwr
504 1.14 gwr /* Maybe do "hangup" (drop DTR). */
505 1.1 gwr hup = tp->t_cflag & HUPCL;
506 1.1 gwr if (zst->zst_swflags & TIOCFLAG_SOFTCAR)
507 1.1 gwr hup = 0;
508 1.1 gwr if (hup) {
509 1.1 gwr zs_modem(zst, 0);
510 1.1 gwr /* hold low for 1 second */
511 1.16 mrg (void)tsleep((caddr_t)cs, TTIPRI, ttclos, hz);
512 1.1 gwr }
513 1.1 gwr if (cs->cs_creg[5] & ZSWR5_BREAK) {
514 1.1 gwr zs_break(cs, 0);
515 1.1 gwr }
516 1.1 gwr
517 1.1 gwr ttyclose(tp);
518 1.1 gwr return (0);
519 1.1 gwr }
520 1.1 gwr
521 1.1 gwr /*
522 1.1 gwr * Read/write zs serial port.
523 1.1 gwr */
524 1.1 gwr int
525 1.1 gwr zsread(dev, uio, flags)
526 1.1 gwr dev_t dev;
527 1.1 gwr struct uio *uio;
528 1.1 gwr int flags;
529 1.1 gwr {
530 1.1 gwr register struct zstty_softc *zst;
531 1.1 gwr register struct tty *tp;
532 1.1 gwr
533 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
534 1.1 gwr tp = zst->zst_tty;
535 1.1 gwr return (linesw[tp->t_line].l_read(tp, uio, flags));
536 1.1 gwr }
537 1.1 gwr
538 1.1 gwr int
539 1.1 gwr zswrite(dev, uio, flags)
540 1.1 gwr dev_t dev;
541 1.1 gwr struct uio *uio;
542 1.1 gwr int flags;
543 1.1 gwr {
544 1.1 gwr register struct zstty_softc *zst;
545 1.1 gwr register struct tty *tp;
546 1.1 gwr
547 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
548 1.1 gwr tp = zst->zst_tty;
549 1.1 gwr return (linesw[tp->t_line].l_write(tp, uio, flags));
550 1.1 gwr }
551 1.1 gwr
552 1.1 gwr #define TIOCFLAG_ALL (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | \
553 1.1 gwr TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF )
554 1.1 gwr
555 1.1 gwr int
556 1.1 gwr zsioctl(dev, cmd, data, flag, p)
557 1.1 gwr dev_t dev;
558 1.1 gwr u_long cmd;
559 1.1 gwr caddr_t data;
560 1.1 gwr int flag;
561 1.1 gwr struct proc *p;
562 1.1 gwr {
563 1.1 gwr register struct zstty_softc *zst;
564 1.1 gwr register struct zs_chanstate *cs;
565 1.1 gwr register struct tty *tp;
566 1.1 gwr register int error, tmp;
567 1.1 gwr
568 1.4 thorpej zst = zstty_cd.cd_devs[minor(dev)];
569 1.1 gwr cs = zst->zst_cs;
570 1.1 gwr tp = zst->zst_tty;
571 1.1 gwr
572 1.1 gwr error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
573 1.1 gwr if (error >= 0)
574 1.1 gwr return (error);
575 1.14 gwr
576 1.1 gwr error = ttioctl(tp, cmd, data, flag, p);
577 1.1 gwr if (error >= 0)
578 1.1 gwr return (error);
579 1.1 gwr
580 1.14 gwr #ifdef ZS_MD_IOCTL
581 1.14 gwr error = ZS_MD_IOCTL;
582 1.14 gwr if (error >= 0)
583 1.14 gwr return (error);
584 1.14 gwr #endif /* ZS_MD_IOCTL */
585 1.14 gwr
586 1.1 gwr switch (cmd) {
587 1.1 gwr
588 1.1 gwr case TIOCSBRK:
589 1.1 gwr zs_break(cs, 1);
590 1.1 gwr break;
591 1.1 gwr
592 1.1 gwr case TIOCCBRK:
593 1.1 gwr zs_break(cs, 0);
594 1.1 gwr break;
595 1.1 gwr
596 1.1 gwr case TIOCGFLAGS:
597 1.1 gwr *(int *)data = zst->zst_swflags;
598 1.1 gwr break;
599 1.1 gwr
600 1.1 gwr case TIOCSFLAGS:
601 1.1 gwr error = suser(p->p_ucred, &p->p_acflag);
602 1.1 gwr if (error != 0)
603 1.1 gwr return (EPERM);
604 1.1 gwr tmp = *(int *)data;
605 1.1 gwr /* Check for random bits... */
606 1.1 gwr if (tmp & ~TIOCFLAG_ALL)
607 1.1 gwr return(EINVAL);
608 1.1 gwr /* Silently enforce softcar on the console. */
609 1.1 gwr if (zst->zst_hwflags & ZS_HWFLAG_CONSOLE)
610 1.1 gwr tmp |= TIOCFLAG_SOFTCAR;
611 1.1 gwr /* These flags take effect during open. */
612 1.1 gwr zst->zst_swflags = tmp;
613 1.1 gwr break;
614 1.1 gwr
615 1.1 gwr case TIOCSDTR:
616 1.1 gwr zs_modem(zst, 1);
617 1.1 gwr break;
618 1.1 gwr
619 1.1 gwr case TIOCCDTR:
620 1.1 gwr zs_modem(zst, 0);
621 1.1 gwr break;
622 1.1 gwr
623 1.1 gwr case TIOCMSET:
624 1.1 gwr case TIOCMBIS:
625 1.1 gwr case TIOCMBIC:
626 1.1 gwr case TIOCMGET:
627 1.1 gwr default:
628 1.1 gwr return (ENOTTY);
629 1.1 gwr }
630 1.1 gwr return (0);
631 1.1 gwr }
632 1.1 gwr
633 1.1 gwr /*
634 1.1 gwr * Start or restart transmission.
635 1.1 gwr */
636 1.1 gwr static void
637 1.1 gwr zsstart(tp)
638 1.1 gwr register struct tty *tp;
639 1.1 gwr {
640 1.1 gwr register struct zstty_softc *zst;
641 1.1 gwr register struct zs_chanstate *cs;
642 1.1 gwr register int s, nch;
643 1.1 gwr
644 1.4 thorpej zst = zstty_cd.cd_devs[minor(tp->t_dev)];
645 1.1 gwr cs = zst->zst_cs;
646 1.1 gwr
647 1.1 gwr s = spltty();
648 1.1 gwr
649 1.1 gwr /*
650 1.1 gwr * If currently active or delaying, no need to do anything.
651 1.1 gwr */
652 1.1 gwr if (tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP))
653 1.1 gwr goto out;
654 1.1 gwr
655 1.1 gwr /*
656 1.8 gwr * If under CRTSCTS hfc and halted, do nothing
657 1.14 gwr * This flag can only be set with CRTSCTS.
658 1.8 gwr */
659 1.14 gwr if (zst->zst_tx_stopped)
660 1.14 gwr goto out;
661 1.8 gwr
662 1.8 gwr /*
663 1.1 gwr * If there are sleepers, and output has drained below low
664 1.1 gwr * water mark, awaken.
665 1.1 gwr */
666 1.1 gwr if (tp->t_outq.c_cc <= tp->t_lowat) {
667 1.1 gwr if (tp->t_state & TS_ASLEEP) {
668 1.1 gwr tp->t_state &= ~TS_ASLEEP;
669 1.1 gwr wakeup((caddr_t)&tp->t_outq);
670 1.1 gwr }
671 1.1 gwr selwakeup(&tp->t_wsel);
672 1.1 gwr }
673 1.1 gwr
674 1.1 gwr nch = ndqb(&tp->t_outq, 0); /* XXX */
675 1.8 gwr (void) splzs();
676 1.8 gwr
677 1.1 gwr if (nch) {
678 1.1 gwr register char *p = tp->t_outq.c_cf;
679 1.1 gwr
680 1.1 gwr /* mark busy, enable tx done interrupts, & send first byte */
681 1.1 gwr tp->t_state |= TS_BUSY;
682 1.8 gwr zst->zst_tx_busy = 1;
683 1.1 gwr cs->cs_preg[1] |= ZSWR1_TIE;
684 1.8 gwr cs->cs_creg[1] = cs->cs_preg[1];
685 1.2 gwr zs_write_reg(cs, 1, cs->cs_creg[1]);
686 1.2 gwr zs_write_data(cs, *p);
687 1.1 gwr zst->zst_tba = p + 1;
688 1.1 gwr zst->zst_tbc = nch - 1;
689 1.1 gwr } else {
690 1.1 gwr /*
691 1.1 gwr * Nothing to send, turn off transmit done interrupts.
692 1.1 gwr * This is useful if something is doing polled output.
693 1.1 gwr */
694 1.1 gwr cs->cs_preg[1] &= ~ZSWR1_TIE;
695 1.8 gwr cs->cs_creg[1] = cs->cs_preg[1];
696 1.2 gwr zs_write_reg(cs, 1, cs->cs_creg[1]);
697 1.1 gwr }
698 1.1 gwr out:
699 1.1 gwr splx(s);
700 1.1 gwr }
701 1.1 gwr
702 1.1 gwr /*
703 1.1 gwr * Stop output, e.g., for ^S or output flush.
704 1.1 gwr */
705 1.10 mycroft void
706 1.1 gwr zsstop(tp, flag)
707 1.1 gwr struct tty *tp;
708 1.1 gwr int flag;
709 1.1 gwr {
710 1.1 gwr register struct zstty_softc *zst;
711 1.1 gwr register struct zs_chanstate *cs;
712 1.1 gwr register int s;
713 1.1 gwr
714 1.4 thorpej zst = zstty_cd.cd_devs[minor(tp->t_dev)];
715 1.1 gwr cs = zst->zst_cs;
716 1.1 gwr
717 1.1 gwr s = splzs();
718 1.1 gwr if (tp->t_state & TS_BUSY) {
719 1.1 gwr /*
720 1.1 gwr * Device is transmitting; must stop it.
721 1.8 gwr * Also clear _heldtbc to prevent any
722 1.8 gwr * flow-control event from resuming.
723 1.1 gwr */
724 1.1 gwr zst->zst_tbc = 0;
725 1.8 gwr zst->zst_heldtbc = 0;
726 1.1 gwr if ((tp->t_state & TS_TTSTOP) == 0)
727 1.1 gwr tp->t_state |= TS_FLUSH;
728 1.1 gwr }
729 1.1 gwr splx(s);
730 1.1 gwr }
731 1.1 gwr
732 1.1 gwr /*
733 1.1 gwr * Set ZS tty parameters from termios.
734 1.1 gwr * XXX - Should just copy the whole termios after
735 1.1 gwr * making sure all the changes could be done.
736 1.1 gwr */
737 1.1 gwr static int
738 1.1 gwr zsparam(tp, t)
739 1.1 gwr register struct tty *tp;
740 1.1 gwr register struct termios *t;
741 1.1 gwr {
742 1.14 gwr struct zstty_softc *zst;
743 1.14 gwr struct zs_chanstate *cs;
744 1.14 gwr int s, bps, cflag, error;
745 1.14 gwr u_char tmp3, tmp4, tmp5;
746 1.1 gwr
747 1.4 thorpej zst = zstty_cd.cd_devs[minor(tp->t_dev)];
748 1.1 gwr cs = zst->zst_cs;
749 1.14 gwr bps = t->c_ospeed;
750 1.14 gwr cflag = t->c_cflag;
751 1.1 gwr
752 1.1 gwr if (bps < 0 || (t->c_ispeed && t->c_ispeed != bps))
753 1.1 gwr return (EINVAL);
754 1.14 gwr
755 1.14 gwr /*
756 1.14 gwr * Only whack the UART when params change.
757 1.14 gwr * Some callers need to clear tp->t_ospeed
758 1.14 gwr * to make sure initialization gets done.
759 1.14 gwr */
760 1.14 gwr if ((tp->t_ospeed == bps) &&
761 1.14 gwr (tp->t_cflag == cflag) )
762 1.1 gwr return (0);
763 1.1 gwr
764 1.14 gwr /*
765 1.14 gwr * Call MD functions to deal with changed
766 1.14 gwr * clock modes or H/W flow control modes.
767 1.14 gwr * The BRG divisor is set now. (reg 12,13)
768 1.14 gwr */
769 1.14 gwr error = zs_set_speed(cs, bps);
770 1.14 gwr if (error)
771 1.14 gwr return (error);
772 1.14 gwr error = zs_set_modes(cs, cflag);
773 1.14 gwr if (error)
774 1.14 gwr return (error);
775 1.1 gwr
776 1.14 gwr /* OK, we are now committed to do it. */
777 1.1 gwr tp->t_cflag = cflag;
778 1.14 gwr tp->t_ospeed = bps;
779 1.14 gwr tp->t_ispeed = bps;
780 1.1 gwr
781 1.1 gwr /*
782 1.1 gwr * Block interrupts so that state will not
783 1.1 gwr * be altered until we are done setting it up.
784 1.14 gwr *
785 1.1 gwr * Initial values in cs_preg are set before
786 1.1 gwr * our attach routine is called. The master
787 1.1 gwr * interrupt enable is handled by zsc.c
788 1.14 gwr *
789 1.1 gwr */
790 1.14 gwr s = splzs();
791 1.1 gwr
792 1.14 gwr /* Recompute character size bits. */
793 1.14 gwr tmp3 = cs->cs_preg[3] & ~ZSWR3_RXSIZE;
794 1.14 gwr tmp5 = cs->cs_preg[5] & ~ZSWR5_TXSIZE;
795 1.1 gwr switch (cflag & CSIZE) {
796 1.1 gwr case CS5:
797 1.14 gwr /* These are |= 0 but let the optimizer deal with it. */
798 1.14 gwr tmp3 |= ZSWR3_RX_5;
799 1.14 gwr tmp5 |= ZSWR5_TX_5;
800 1.1 gwr break;
801 1.1 gwr case CS6:
802 1.14 gwr tmp3 |= ZSWR3_RX_6;
803 1.14 gwr tmp5 |= ZSWR5_TX_6;
804 1.1 gwr break;
805 1.1 gwr case CS7:
806 1.14 gwr tmp3 |= ZSWR3_RX_7;
807 1.14 gwr tmp5 |= ZSWR5_TX_7;
808 1.1 gwr break;
809 1.1 gwr case CS8:
810 1.1 gwr default:
811 1.14 gwr tmp3 |= ZSWR3_RX_8;
812 1.14 gwr tmp5 |= ZSWR5_TX_8;
813 1.1 gwr break;
814 1.1 gwr }
815 1.14 gwr /* Raise or lower DTR and RTS as appropriate. */
816 1.14 gwr if (bps) {
817 1.14 gwr /* Raise DTR and RTS */
818 1.14 gwr tmp5 |= cs->cs_wr5_dtr;
819 1.14 gwr } else {
820 1.14 gwr /* Drop DTR and RTS */
821 1.14 gwr /* XXX: Should SOFTCAR prevent this? */
822 1.14 gwr tmp5 &= ~(cs->cs_wr5_dtr);
823 1.14 gwr }
824 1.14 gwr cs->cs_preg[3] = tmp3;
825 1.14 gwr cs->cs_preg[5] = tmp5;
826 1.14 gwr
827 1.14 gwr /*
828 1.14 gwr * Recompute the stop bits and parity bits. Note that
829 1.14 gwr * zs_set_speed() may have set clock selection bits etc.
830 1.14 gwr * in wr4, so those must preserved.
831 1.14 gwr */
832 1.14 gwr tmp4 = cs->cs_preg[4];
833 1.14 gwr /* Recompute stop bits. */
834 1.14 gwr tmp4 &= ~ZSWR4_SBMASK;
835 1.14 gwr tmp4 |= (cflag & CSTOPB) ?
836 1.14 gwr ZSWR4_TWOSB : ZSWR4_ONESB;
837 1.14 gwr /* Recompute parity bits. */
838 1.14 gwr tmp4 &= ~ZSWR4_PARMASK;
839 1.1 gwr if ((cflag & PARODD) == 0)
840 1.1 gwr tmp4 |= ZSWR4_EVENP;
841 1.1 gwr if (cflag & PARENB)
842 1.1 gwr tmp4 |= ZSWR4_PARENB;
843 1.1 gwr cs->cs_preg[4] = tmp4;
844 1.1 gwr
845 1.14 gwr /* The MD function zs_set_modes handled CRTSCTS, etc. */
846 1.8 gwr
847 1.8 gwr /*
848 1.1 gwr * If nothing is being transmitted, set up new current values,
849 1.1 gwr * else mark them as pending.
850 1.1 gwr */
851 1.1 gwr if (cs->cs_heldchange == 0) {
852 1.8 gwr if (zst->zst_tx_busy) {
853 1.1 gwr zst->zst_heldtbc = zst->zst_tbc;
854 1.1 gwr zst->zst_tbc = 0;
855 1.14 gwr cs->cs_heldchange = 0xFFFF;
856 1.1 gwr } else {
857 1.1 gwr zs_loadchannelregs(cs);
858 1.1 gwr }
859 1.1 gwr }
860 1.1 gwr splx(s);
861 1.15 gwr
862 1.15 gwr /* XXX - Check for DCD in case ZSWR15_DCD_IE was just set? */
863 1.14 gwr
864 1.14 gwr /* If we can throttle input, enable "high water" detection. */
865 1.14 gwr if (cflag & CHWFLOW) {
866 1.14 gwr zst->zst_rbhiwat = zstty_rbuf_hiwat;
867 1.14 gwr } else {
868 1.14 gwr /* This impossible value prevents a "high water" trigger. */
869 1.14 gwr zst->zst_rbhiwat = zstty_rbuf_size;
870 1.14 gwr /* XXX: Lost hwi ability, so unblock and restart. */
871 1.14 gwr zst->zst_rx_blocked = 0;
872 1.14 gwr if (zst->zst_tx_stopped) {
873 1.14 gwr zst->zst_tx_stopped = 0;
874 1.14 gwr zsstart(tp);
875 1.14 gwr }
876 1.14 gwr }
877 1.14 gwr
878 1.1 gwr return (0);
879 1.1 gwr }
880 1.1 gwr
881 1.1 gwr /*
882 1.1 gwr * Raise or lower modem control (DTR/RTS) signals. If a character is
883 1.1 gwr * in transmission, the change is deferred.
884 1.1 gwr */
885 1.1 gwr static void
886 1.1 gwr zs_modem(zst, onoff)
887 1.1 gwr struct zstty_softc *zst;
888 1.1 gwr int onoff;
889 1.1 gwr {
890 1.1 gwr struct zs_chanstate *cs;
891 1.14 gwr int s, clr, set;
892 1.1 gwr
893 1.1 gwr cs = zst->zst_cs;
894 1.14 gwr if (cs->cs_wr5_dtr == 0)
895 1.14 gwr return;
896 1.1 gwr
897 1.1 gwr if (onoff) {
898 1.14 gwr clr = 0;
899 1.14 gwr set = cs->cs_wr5_dtr;
900 1.1 gwr } else {
901 1.14 gwr clr = cs->cs_wr5_dtr;
902 1.14 gwr set = 0;
903 1.1 gwr }
904 1.14 gwr
905 1.1 gwr s = splzs();
906 1.14 gwr cs->cs_preg[5] &= ~clr;
907 1.14 gwr cs->cs_preg[5] |= set;
908 1.1 gwr if (cs->cs_heldchange == 0) {
909 1.8 gwr if (zst->zst_tx_busy) {
910 1.1 gwr zst->zst_heldtbc = zst->zst_tbc;
911 1.1 gwr zst->zst_tbc = 0;
912 1.8 gwr cs->cs_heldchange = (1<<5);
913 1.1 gwr } else {
914 1.8 gwr cs->cs_creg[5] = cs->cs_preg[5];
915 1.2 gwr zs_write_reg(cs, 5, cs->cs_creg[5]);
916 1.1 gwr }
917 1.1 gwr }
918 1.1 gwr splx(s);
919 1.1 gwr }
920 1.1 gwr
921 1.8 gwr /*
922 1.8 gwr * Try to block or unblock input using hardware flow-control.
923 1.8 gwr * This is called by kern/tty.c if MDMBUF|CRTSCTS is set, and
924 1.8 gwr * if this function returns non-zero, the TS_TBLOCK flag will
925 1.8 gwr * be set or cleared according to the "stop" arg passed.
926 1.8 gwr */
927 1.8 gwr int
928 1.8 gwr zshwiflow(tp, stop)
929 1.8 gwr struct tty *tp;
930 1.8 gwr int stop;
931 1.8 gwr {
932 1.8 gwr register struct zstty_softc *zst;
933 1.14 gwr register struct zs_chanstate *cs;
934 1.8 gwr int s;
935 1.8 gwr
936 1.8 gwr zst = zstty_cd.cd_devs[minor(tp->t_dev)];
937 1.14 gwr cs = zst->zst_cs;
938 1.14 gwr
939 1.14 gwr /* Can not do this without some bit assigned as RTS. */
940 1.14 gwr if (cs->cs_wr5_rts == 0)
941 1.14 gwr return (0);
942 1.8 gwr
943 1.8 gwr s = splzs();
944 1.8 gwr if (stop) {
945 1.8 gwr /*
946 1.8 gwr * The tty layer is asking us to block input.
947 1.8 gwr * If we already did it, just return TRUE.
948 1.8 gwr */
949 1.8 gwr if (zst->zst_rx_blocked)
950 1.8 gwr goto out;
951 1.8 gwr zst->zst_rx_blocked = 1;
952 1.8 gwr } else {
953 1.8 gwr /*
954 1.8 gwr * The tty layer is asking us to resume input.
955 1.8 gwr * The input ring is always empty by now.
956 1.8 gwr */
957 1.8 gwr zst->zst_rx_blocked = 0;
958 1.8 gwr }
959 1.8 gwr zs_hwiflow(zst, stop);
960 1.8 gwr out:
961 1.8 gwr splx(s);
962 1.8 gwr return 1;
963 1.8 gwr }
964 1.8 gwr
965 1.8 gwr /*
966 1.8 gwr * Internal version of zshwiflow
967 1.8 gwr * called at splzs
968 1.8 gwr */
969 1.8 gwr static void
970 1.8 gwr zs_hwiflow(zst, stop)
971 1.8 gwr register struct zstty_softc *zst;
972 1.8 gwr int stop;
973 1.8 gwr {
974 1.8 gwr register struct zs_chanstate *cs;
975 1.14 gwr register int clr, set;
976 1.8 gwr
977 1.8 gwr cs = zst->zst_cs;
978 1.14 gwr
979 1.14 gwr if (cs->cs_wr5_rts == 0)
980 1.14 gwr return;
981 1.8 gwr
982 1.8 gwr if (stop) {
983 1.8 gwr /* Block input (Lower RTS) */
984 1.14 gwr clr = cs->cs_wr5_rts;
985 1.14 gwr set = 0;
986 1.8 gwr } else {
987 1.8 gwr /* Unblock input (Raise RTS) */
988 1.14 gwr clr = 0;
989 1.14 gwr set = cs->cs_wr5_rts;
990 1.8 gwr }
991 1.8 gwr
992 1.14 gwr cs->cs_preg[5] &= ~clr;
993 1.14 gwr cs->cs_preg[5] |= set;
994 1.8 gwr if (cs->cs_heldchange == 0) {
995 1.8 gwr if (zst->zst_tx_busy) {
996 1.8 gwr zst->zst_heldtbc = zst->zst_tbc;
997 1.8 gwr zst->zst_tbc = 0;
998 1.8 gwr cs->cs_heldchange = (1<<5);
999 1.8 gwr } else {
1000 1.8 gwr cs->cs_creg[5] = cs->cs_preg[5];
1001 1.8 gwr zs_write_reg(cs, 5, cs->cs_creg[5]);
1002 1.8 gwr }
1003 1.8 gwr }
1004 1.8 gwr }
1005 1.8 gwr
1006 1.1 gwr
1007 1.1 gwr /****************************************************************
1008 1.1 gwr * Interface to the lower layer (zscc)
1009 1.1 gwr ****************************************************************/
1010 1.3 gwr
1011 1.14 gwr static void zstty_rxint __P((struct zs_chanstate *));
1012 1.14 gwr static void zstty_txint __P((struct zs_chanstate *));
1013 1.14 gwr static void zstty_stint __P((struct zs_chanstate *));
1014 1.14 gwr static void zstty_softint __P((struct zs_chanstate *));
1015 1.14 gwr
1016 1.14 gwr static void zsoverrun __P((struct zstty_softc *, long *, char *));
1017 1.1 gwr
1018 1.6 gwr /*
1019 1.8 gwr * receiver ready interrupt.
1020 1.8 gwr * called at splzs
1021 1.6 gwr */
1022 1.6 gwr static void
1023 1.1 gwr zstty_rxint(cs)
1024 1.1 gwr register struct zs_chanstate *cs;
1025 1.1 gwr {
1026 1.1 gwr register struct zstty_softc *zst;
1027 1.8 gwr register int cc, put, put_next, ringmask;
1028 1.1 gwr register u_char c, rr0, rr1;
1029 1.8 gwr register u_short ch_rr1;
1030 1.1 gwr
1031 1.1 gwr zst = cs->cs_private;
1032 1.1 gwr put = zst->zst_rbput;
1033 1.6 gwr ringmask = zst->zst_ringmask;
1034 1.1 gwr
1035 1.1 gwr nextchar:
1036 1.1 gwr
1037 1.5 gwr /*
1038 1.5 gwr * First read the status, because reading the received char
1039 1.5 gwr * destroys the status of this char.
1040 1.5 gwr */
1041 1.2 gwr rr1 = zs_read_reg(cs, 1);
1042 1.5 gwr c = zs_read_data(cs);
1043 1.8 gwr ch_rr1 = (c << 8) | rr1;
1044 1.1 gwr
1045 1.8 gwr if (ch_rr1 & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE)) {
1046 1.1 gwr /* Clear the receive error. */
1047 1.2 gwr zs_write_csr(cs, ZSWR0_RESET_ERRORS);
1048 1.1 gwr }
1049 1.1 gwr
1050 1.8 gwr /* XXX: Check for the stop character? */
1051 1.8 gwr
1052 1.8 gwr zst->zst_rbuf[put] = ch_rr1;
1053 1.6 gwr put_next = (put + 1) & ringmask;
1054 1.1 gwr
1055 1.1 gwr /* Would overrun if increment makes (put==get). */
1056 1.1 gwr if (put_next == zst->zst_rbget) {
1057 1.8 gwr zst->zst_rx_overrun = 1;
1058 1.1 gwr } else {
1059 1.1 gwr /* OK, really increment. */
1060 1.1 gwr put = put_next;
1061 1.1 gwr }
1062 1.1 gwr
1063 1.1 gwr /* Keep reading until the FIFO is empty. */
1064 1.2 gwr rr0 = zs_read_csr(cs);
1065 1.1 gwr if (rr0 & ZSRR0_RX_READY)
1066 1.1 gwr goto nextchar;
1067 1.1 gwr
1068 1.1 gwr /* Done reading. */
1069 1.1 gwr zst->zst_rbput = put;
1070 1.1 gwr
1071 1.8 gwr /*
1072 1.8 gwr * If ring is getting too full, try to block input.
1073 1.8 gwr */
1074 1.8 gwr cc = put - zst->zst_rbget;
1075 1.8 gwr if (cc < 0)
1076 1.8 gwr cc += zstty_rbuf_size;
1077 1.8 gwr if ((cc > zst->zst_rbhiwat) && (zst->zst_rx_blocked == 0)) {
1078 1.8 gwr zst->zst_rx_blocked = 1;
1079 1.8 gwr zs_hwiflow(zst, 1);
1080 1.8 gwr }
1081 1.8 gwr
1082 1.1 gwr /* Ask for softint() call. */
1083 1.1 gwr cs->cs_softreq = 1;
1084 1.1 gwr }
1085 1.1 gwr
1086 1.6 gwr /*
1087 1.6 gwr * transmitter ready interrupt. (splzs)
1088 1.6 gwr */
1089 1.6 gwr static void
1090 1.1 gwr zstty_txint(cs)
1091 1.1 gwr register struct zs_chanstate *cs;
1092 1.1 gwr {
1093 1.1 gwr register struct zstty_softc *zst;
1094 1.6 gwr register int count;
1095 1.1 gwr
1096 1.1 gwr zst = cs->cs_private;
1097 1.8 gwr
1098 1.8 gwr /*
1099 1.8 gwr * If we suspended output for a "held" change,
1100 1.8 gwr * then handle that now and resume.
1101 1.8 gwr * Do flow-control changes ASAP.
1102 1.8 gwr * When the only change is for flow control,
1103 1.8 gwr * avoid hitting other registers, because that
1104 1.8 gwr * often makes the stupid zs drop input...
1105 1.8 gwr */
1106 1.8 gwr if (cs->cs_heldchange) {
1107 1.8 gwr if (cs->cs_heldchange == (1<<5)) {
1108 1.8 gwr /* Avoid whacking the chip... */
1109 1.8 gwr cs->cs_creg[5] = cs->cs_preg[5];
1110 1.8 gwr zs_write_reg(cs, 5, cs->cs_creg[5]);
1111 1.8 gwr } else
1112 1.8 gwr zs_loadchannelregs(cs);
1113 1.8 gwr cs->cs_heldchange = 0;
1114 1.8 gwr count = zst->zst_heldtbc;
1115 1.8 gwr } else
1116 1.8 gwr count = zst->zst_tbc;
1117 1.1 gwr
1118 1.6 gwr /*
1119 1.6 gwr * If our transmit buffer still has data,
1120 1.6 gwr * just send the next character.
1121 1.6 gwr */
1122 1.1 gwr if (count > 0) {
1123 1.1 gwr /* Send the next char. */
1124 1.6 gwr zst->zst_tbc = --count;
1125 1.2 gwr zs_write_data(cs, *zst->zst_tba);
1126 1.2 gwr zst->zst_tba++;
1127 1.6 gwr return;
1128 1.1 gwr }
1129 1.1 gwr
1130 1.6 gwr zs_write_csr(cs, ZSWR0_RESET_TXINT);
1131 1.6 gwr
1132 1.6 gwr /* Ask the softint routine for more output. */
1133 1.8 gwr zst->zst_tx_busy = 0;
1134 1.8 gwr zst->zst_tx_done = 1;
1135 1.6 gwr cs->cs_softreq = 1;
1136 1.1 gwr }
1137 1.1 gwr
1138 1.6 gwr /*
1139 1.6 gwr * status change interrupt. (splzs)
1140 1.6 gwr */
1141 1.6 gwr static void
1142 1.1 gwr zstty_stint(cs)
1143 1.1 gwr register struct zs_chanstate *cs;
1144 1.1 gwr {
1145 1.1 gwr register struct zstty_softc *zst;
1146 1.14 gwr register u_char rr0, delta;
1147 1.1 gwr
1148 1.1 gwr zst = cs->cs_private;
1149 1.1 gwr
1150 1.2 gwr rr0 = zs_read_csr(cs);
1151 1.2 gwr zs_write_csr(cs, ZSWR0_RESET_STATUS);
1152 1.1 gwr
1153 1.6 gwr /*
1154 1.6 gwr * Check here for console break, so that we can abort
1155 1.6 gwr * even when interrupts are locking up the machine.
1156 1.6 gwr */
1157 1.6 gwr if ((rr0 & ZSRR0_BREAK) &&
1158 1.1 gwr (zst->zst_hwflags & ZS_HWFLAG_CONSOLE))
1159 1.1 gwr {
1160 1.14 gwr zs_abort(cs);
1161 1.6 gwr return;
1162 1.1 gwr }
1163 1.1 gwr
1164 1.8 gwr /*
1165 1.14 gwr * We have to accumulate status line changes here.
1166 1.14 gwr * Otherwise, if we get multiple status interrupts
1167 1.14 gwr * before the softint runs, we could fail to notice
1168 1.14 gwr * some status line changes in the softint routine.
1169 1.14 gwr * Fix from Bill Studenmund, October 1996.
1170 1.14 gwr */
1171 1.14 gwr delta = (cs->cs_rr0 ^ rr0);
1172 1.14 gwr cs->cs_rr0_delta |= delta;
1173 1.14 gwr cs->cs_rr0 = rr0;
1174 1.14 gwr
1175 1.14 gwr /*
1176 1.8 gwr * Need to handle CTS output flow control here.
1177 1.8 gwr * Output remains stopped as long as either the
1178 1.8 gwr * zst_tx_stopped or TS_TTSTOP flag is set.
1179 1.8 gwr * Never restart here; the softint routine will
1180 1.8 gwr * do that after things are ready to move.
1181 1.8 gwr */
1182 1.14 gwr if ((delta & cs->cs_rr0_cts) &&
1183 1.14 gwr ((rr0 & cs->cs_rr0_cts) == 0))
1184 1.14 gwr {
1185 1.8 gwr zst->zst_tbc = 0;
1186 1.8 gwr zst->zst_heldtbc = 0;
1187 1.8 gwr zst->zst_tx_stopped = 1;
1188 1.8 gwr }
1189 1.8 gwr zst->zst_st_check = 1;
1190 1.6 gwr
1191 1.1 gwr /* Ask for softint() call. */
1192 1.1 gwr cs->cs_softreq = 1;
1193 1.1 gwr }
1194 1.1 gwr
1195 1.1 gwr /*
1196 1.1 gwr * Print out a ring or fifo overrun error message.
1197 1.1 gwr */
1198 1.1 gwr static void
1199 1.1 gwr zsoverrun(zst, ptime, what)
1200 1.1 gwr struct zstty_softc *zst;
1201 1.1 gwr long *ptime;
1202 1.1 gwr char *what;
1203 1.1 gwr {
1204 1.1 gwr
1205 1.1 gwr if (*ptime != time.tv_sec) {
1206 1.1 gwr *ptime = time.tv_sec;
1207 1.1 gwr log(LOG_WARNING, "%s: %s overrun\n",
1208 1.1 gwr zst->zst_dev.dv_xname, what);
1209 1.1 gwr }
1210 1.1 gwr }
1211 1.1 gwr
1212 1.6 gwr /*
1213 1.6 gwr * Software interrupt. Called at zssoft
1214 1.8 gwr *
1215 1.8 gwr * The main job to be done here is to empty the input ring
1216 1.8 gwr * by passing its contents up to the tty layer. The ring is
1217 1.8 gwr * always emptied during this operation, therefore the ring
1218 1.8 gwr * must not be larger than the space after "high water" in
1219 1.8 gwr * the tty layer, or the tty layer might drop our input.
1220 1.8 gwr *
1221 1.8 gwr * Note: an "input blockage" condition is assumed to exist if
1222 1.8 gwr * EITHER the TS_TBLOCK flag or zst_rx_blocked flag is set.
1223 1.6 gwr */
1224 1.6 gwr static void
1225 1.1 gwr zstty_softint(cs)
1226 1.1 gwr struct zs_chanstate *cs;
1227 1.1 gwr {
1228 1.1 gwr register struct zstty_softc *zst;
1229 1.1 gwr register struct linesw *line;
1230 1.1 gwr register struct tty *tp;
1231 1.18 scottr register int get, c, s, t;
1232 1.8 gwr int ringmask, overrun;
1233 1.1 gwr register u_short ring_data;
1234 1.14 gwr register u_char rr0, delta;
1235 1.1 gwr
1236 1.1 gwr zst = cs->cs_private;
1237 1.1 gwr tp = zst->zst_tty;
1238 1.1 gwr line = &linesw[tp->t_line];
1239 1.6 gwr ringmask = zst->zst_ringmask;
1240 1.8 gwr overrun = 0;
1241 1.6 gwr
1242 1.6 gwr /*
1243 1.8 gwr * Raise to tty priority while servicing the ring.
1244 1.6 gwr */
1245 1.8 gwr s = spltty();
1246 1.1 gwr
1247 1.8 gwr if (zst->zst_rx_overrun) {
1248 1.8 gwr zst->zst_rx_overrun = 0;
1249 1.6 gwr zsoverrun(zst, &zst->zst_rotime, "ring");
1250 1.1 gwr }
1251 1.1 gwr
1252 1.1 gwr /*
1253 1.1 gwr * Copy data from the receive ring into the tty layer.
1254 1.1 gwr */
1255 1.1 gwr get = zst->zst_rbget;
1256 1.1 gwr while (get != zst->zst_rbput) {
1257 1.1 gwr ring_data = zst->zst_rbuf[get];
1258 1.6 gwr get = (get + 1) & ringmask;
1259 1.1 gwr
1260 1.1 gwr if (ring_data & ZSRR1_DO)
1261 1.8 gwr overrun++;
1262 1.1 gwr /* low byte of ring_data is rr1 */
1263 1.1 gwr c = (ring_data >> 8) & 0xff;
1264 1.1 gwr if (ring_data & ZSRR1_FE)
1265 1.1 gwr c |= TTY_FE;
1266 1.1 gwr if (ring_data & ZSRR1_PE)
1267 1.1 gwr c |= TTY_PE;
1268 1.1 gwr
1269 1.1 gwr line->l_rint(c, tp);
1270 1.1 gwr }
1271 1.1 gwr zst->zst_rbget = get;
1272 1.1 gwr
1273 1.6 gwr /*
1274 1.6 gwr * If the overrun flag is set now, it was set while
1275 1.6 gwr * copying char/status pairs from the ring, which
1276 1.6 gwr * means this was a hardware (fifo) overrun.
1277 1.6 gwr */
1278 1.8 gwr if (overrun) {
1279 1.6 gwr zsoverrun(zst, &zst->zst_fotime, "fifo");
1280 1.1 gwr }
1281 1.1 gwr
1282 1.8 gwr /*
1283 1.8 gwr * We have emptied the input ring. Maybe unblock input.
1284 1.8 gwr * Note: an "input blockage" condition is assumed to exist
1285 1.8 gwr * when EITHER zst_rx_blocked or the TS_TBLOCK flag is set,
1286 1.8 gwr * so unblock here ONLY if TS_TBLOCK has not been set.
1287 1.8 gwr */
1288 1.8 gwr if (zst->zst_rx_blocked && ((tp->t_state & TS_TBLOCK) == 0)) {
1289 1.18 scottr t = splzs();
1290 1.8 gwr zst->zst_rx_blocked = 0;
1291 1.8 gwr zs_hwiflow(zst, 0); /* unblock input */
1292 1.18 scottr splx(t);
1293 1.8 gwr }
1294 1.8 gwr
1295 1.8 gwr /*
1296 1.8 gwr * Do any deferred work for status interrupts.
1297 1.8 gwr * The rr0 was saved in the h/w interrupt to
1298 1.8 gwr * avoid another splzs in here.
1299 1.8 gwr */
1300 1.8 gwr if (zst->zst_st_check) {
1301 1.8 gwr zst->zst_st_check = 0;
1302 1.8 gwr
1303 1.18 scottr t = splzs();
1304 1.13 gwr rr0 = cs->cs_rr0;
1305 1.13 gwr delta = cs->cs_rr0_delta;
1306 1.13 gwr cs->cs_rr0_delta = 0;
1307 1.18 scottr splx(t);
1308 1.14 gwr
1309 1.14 gwr /* Note, the MD code may use DCD for something else. */
1310 1.14 gwr if (delta & cs->cs_rr0_dcd) {
1311 1.14 gwr c = ((rr0 & cs->cs_rr0_dcd) != 0);
1312 1.8 gwr if (line->l_modem(tp, c) == 0)
1313 1.8 gwr zs_modem(zst, c);
1314 1.8 gwr }
1315 1.14 gwr
1316 1.14 gwr /* Note, cs_rr0_cts is set only with H/W flow control. */
1317 1.14 gwr if (delta & cs->cs_rr0_cts) {
1318 1.8 gwr /*
1319 1.8 gwr * Only do restart here. Stop is handled
1320 1.8 gwr * at the h/w interrupt level.
1321 1.8 gwr */
1322 1.14 gwr if (rr0 & cs->cs_rr0_cts) {
1323 1.8 gwr zst->zst_tx_stopped = 0;
1324 1.14 gwr /* tp->t_state &= ~TS_TTSTOP; */
1325 1.8 gwr (*line->l_start)(tp);
1326 1.1 gwr }
1327 1.1 gwr }
1328 1.8 gwr }
1329 1.8 gwr
1330 1.8 gwr if (zst->zst_tx_done) {
1331 1.8 gwr zst->zst_tx_done = 0;
1332 1.1 gwr tp->t_state &= ~TS_BUSY;
1333 1.1 gwr if (tp->t_state & TS_FLUSH)
1334 1.1 gwr tp->t_state &= ~TS_FLUSH;
1335 1.1 gwr else
1336 1.1 gwr ndflush(&tp->t_outq, zst->zst_tba -
1337 1.8 gwr (caddr_t) tp->t_outq.c_cf);
1338 1.1 gwr line->l_start(tp);
1339 1.1 gwr }
1340 1.1 gwr
1341 1.6 gwr splx(s);
1342 1.1 gwr }
1343 1.1 gwr
1344 1.1 gwr struct zsops zsops_tty = {
1345 1.1 gwr zstty_rxint, /* receive char available */
1346 1.1 gwr zstty_stint, /* external/status */
1347 1.1 gwr zstty_txint, /* xmit buffer empty */
1348 1.1 gwr zstty_softint, /* process software interrupt */
1349 1.1 gwr };
1350 1.1 gwr
1351