firewire.h revision 1.4.42.1
1 /* $NetBSD: firewire.h,v 1.4.42.1 2010/05/30 05:17:27 rmind Exp $ */ 2 /*- 3 * Copyright (c) 2003 Hidetoshi Shimokawa 4 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the acknowledgement as bellow: 17 * 18 * This product includes software developed by K. Kobayashi and H. Shimokawa 19 * 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 31 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 32 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 * $FreeBSD: src/sys/dev/firewire/firewire.h,v 1.25 2009/02/17 19:37:04 sbruno Exp $ 36 * 37 */ 38 39 #ifndef _FIREWIRE_H_ 40 #define _FIREWIRE_H_ 41 42 #define DEV_DEF 0 43 #define DEV_DV 2 44 45 struct fw_isochreq { 46 unsigned char ch:6, 47 tag:2; 48 }; 49 50 struct fw_isobufreq { 51 struct fw_bufspec { 52 unsigned int nchunk; 53 unsigned int npacket; 54 unsigned int psize; 55 } tx, rx; 56 }; 57 58 struct fw_addr { 59 uint32_t hi; 60 uint32_t lo; 61 }; 62 63 struct fw_asybindreq { 64 struct fw_addr start; 65 unsigned long len; 66 }; 67 68 struct fw_reg_req_t { 69 uint32_t addr; 70 uint32_t data; 71 }; 72 73 #define MAXREC(x) (2 << (x)) 74 #define FWPMAX_S400 (2048 + 20) /* MAXREC plus space for control data */ 75 #define FWMAXQUEUE 256 76 77 #define FWLOCALBUS 0xffc0 78 79 #define FWTCODE_WREQQ 0 80 #define FWTCODE_WREQB 1 81 #define FWTCODE_WRES 2 82 #define FWTCODE_RREQQ 4 83 #define FWTCODE_RREQB 5 84 #define FWTCODE_RRESQ 6 85 #define FWTCODE_RRESB 7 86 #define FWTCODE_CYCS 8 87 #define FWTCODE_LREQ 9 88 #define FWTCODE_STREAM 0xa 89 #define FWTCODE_LRES 0xb 90 #define FWTCODE_PHY 0xe 91 92 #define FWRETRY_1 0 93 #define FWRETRY_X 1 94 #define FWRETRY_A 2 95 #define FWRETRY_B 3 96 97 #define FWRCODE_COMPLETE 0 98 #define FWRCODE_ER_CONFL 4 99 #define FWRCODE_ER_DATA 5 100 #define FWRCODE_ER_TYPE 6 101 #define FWRCODE_ER_ADDR 7 102 103 /* 104 * Defined 1394a-2000 105 * Table 5B-1 106 */ 107 #define FWSPD_S100 0 108 #define FWSPD_S200 1 109 #define FWSPD_S400 2 110 #define FWSPD_S800 3 111 #define FWSPD_S1600 4 112 #define FWSPD_S3200 5 113 114 #define FWP_TL_VALID (1 << 7) 115 116 struct fw_isohdr { 117 uint32_t hdr[1]; 118 }; 119 120 struct fw_asyhdr { 121 uint32_t hdr[4]; 122 }; 123 124 #if BYTE_ORDER == BIG_ENDIAN 125 #define BIT4x2(x,y) uint8_t x:4, y:4 126 #define BIT16x2(x,y) uint32_t x:16, y:16 127 #else 128 #define BIT4x2(x,y) uint8_t y:4, x:4 129 #define BIT16x2(x,y) uint32_t y:16, x:16 130 #endif 131 132 133 #if BYTE_ORDER == BIG_ENDIAN 134 #define COMMON_HDR(a,b,c,d) uint32_t a:16,b:8,c:4,d:4 135 #define COMMON_RES(a,b,c,d) uint32_t a:16,b:4,c:4,d:8 136 #else 137 #define COMMON_HDR(a,b,c,d) uint32_t d:4,c:4,b:8,a:16 138 #define COMMON_RES(a,b,c,d) uint32_t d:8,c:4,b:4,a:16 139 #endif 140 141 struct fw_pkt { 142 union { 143 uint32_t ld[0]; 144 struct { 145 COMMON_HDR(, , tcode, ); 146 } common; 147 struct { 148 COMMON_HDR(len, chtag, tcode, sy); 149 uint32_t payload[0]; 150 } stream; 151 struct { 152 COMMON_HDR(dst, tlrt, tcode, pri); 153 BIT16x2(src, ); 154 } hdr; 155 struct { 156 COMMON_HDR(dst, tlrt, tcode, pri); 157 BIT16x2(src, dest_hi); 158 uint32_t dest_lo; 159 } rreqq; 160 struct { 161 COMMON_HDR(dst, tlrt, tcode, pri); 162 COMMON_RES(src, rtcode, , ); 163 uint32_t :32; 164 } wres; 165 struct { 166 COMMON_HDR(dst, tlrt, tcode, pri); 167 BIT16x2(src, dest_hi); 168 uint32_t dest_lo; 169 BIT16x2(len, extcode); 170 } rreqb; 171 struct { 172 COMMON_HDR(dst, tlrt, tcode, pri); 173 BIT16x2(src, dest_hi); 174 uint32_t dest_lo; 175 uint32_t data; 176 } wreqq; 177 struct { 178 COMMON_HDR(dst, tlrt, tcode, pri); 179 BIT16x2(src, dest_hi); 180 uint32_t dest_lo; 181 uint32_t data; 182 } cyc; 183 struct { 184 COMMON_HDR(dst, tlrt, tcode, pri); 185 COMMON_RES(src, rtcode, , ); 186 uint32_t :32; 187 uint32_t data; 188 } rresq; 189 struct { 190 COMMON_HDR(dst, tlrt, tcode, pri); 191 BIT16x2(src, dest_hi); 192 uint32_t dest_lo; 193 BIT16x2(len, extcode); 194 uint32_t payload[0]; 195 } wreqb; 196 struct { 197 COMMON_HDR(dst, tlrt, tcode, pri); 198 BIT16x2(src, dest_hi); 199 uint32_t dest_lo; 200 BIT16x2(len, extcode); 201 uint32_t payload[0]; 202 } lreq; 203 struct { 204 COMMON_HDR(dst, tlrt, tcode, pri); 205 COMMON_RES(src, rtcode, , ); 206 uint32_t :32; 207 BIT16x2(len, extcode); 208 uint32_t payload[0]; 209 } rresb; 210 struct { 211 COMMON_HDR(dst, tlrt, tcode, pri); 212 COMMON_RES(src, rtcode, , ); 213 uint32_t :32; 214 BIT16x2(len, extcode); 215 uint32_t payload[0]; 216 } lres; 217 } mode; 218 }; 219 220 /* 221 * Response code (rtcode) 222 */ 223 /* The node has successfully completed the command. */ 224 #define RESP_CMP 0 225 /* A resource conflict was detected. The request may be retried. */ 226 #define RESP_CONFLICT_ERROR 4 227 /* Hardware error, data is unavailable. */ 228 #define RESP_DATA_ERROR 5 229 /* A field in the request packet header was set to an unsupported or incorrect 230 * value, or an invalid transaction was attempted (e.g., a write to a read-only 231 * address). */ 232 #define RESP_TYPE_ERROR 6 233 /* The destination offset field in the request was set to an address not 234 * accessible in the destination node. */ 235 #define RESP_ADDRESS_ERROR 7 236 237 /* 238 * Extended transaction code (extcode) 239 */ 240 #define EXTCODE_MASK_SWAP 1 241 #define EXTCODE_CMP_SWAP 2 242 #define EXTCODE_FETCH_ADD 3 243 #define EXTCODE_LITTLE_ADD 4 244 #define EXTCODE_BOUNDED_ADD 5 245 #define EXTCODE_WRAP_ADD 6 246 247 struct fw_eui64 { 248 uint32_t hi, lo; 249 }; 250 #define FW_EUI64_BYTE(eui, x) \ 251 ((((x)<4)? \ 252 ((eui)->hi >> (8*(3-(x)))): \ 253 ((eui)->lo >> (8*(7-(x)))) \ 254 ) & 0xff) 255 #define FW_EUI64_EQUAL(x, y) \ 256 ((x).hi == (y).hi && (x).lo == (y).lo) 257 258 struct fw_asyreq { 259 struct fw_asyreq_t{ 260 unsigned char sped; 261 unsigned int type; 262 #define FWASREQNODE 0 263 #define FWASREQEUI 1 264 #define FWASRESTL 2 265 #define FWASREQSTREAM 3 266 unsigned short len; 267 union { 268 struct fw_eui64 eui; 269 }dst; 270 }req; 271 struct fw_pkt pkt; 272 uint32_t data[512]; 273 }; 274 275 struct fw_devinfo { 276 struct fw_eui64 eui; 277 uint16_t dst; 278 uint16_t status; 279 }; 280 281 #define FW_MAX_DEVLST 70 282 struct fw_devlstreq { 283 uint16_t n; 284 uint16_t info_len; 285 struct fw_devinfo dev[FW_MAX_DEVLST]; 286 }; 287 288 /* 289 * Defined in IEEE 1394a-2000 290 * 4.3.4.1 291 */ 292 #define FW_SELF_ID_PORT_CONNECTED_TO_CHILD 3 293 #define FW_SELF_ID_PORT_CONNECTED_TO_PARENT 2 294 #define FW_SELF_ID_PORT_NOT_CONNECTED 1 295 #define FW_SELF_ID_PORT_NOT_EXISTS 0 296 297 #define FW_SELF_ID_PAGE0 0 298 #define FW_SELF_ID_PAGE1 1 299 300 #if BYTE_ORDER == BIG_ENDIAN 301 union fw_self_id { 302 struct { 303 uint32_t id:2, 304 phy_id:6, 305 sequel:1, 306 link_active:1, 307 gap_count:6, 308 phy_speed:2, 309 reserved:2, 310 contender:1, 311 power_class:3, 312 port0:2, 313 port1:2, 314 port2:2, 315 initiated_reset:1, 316 more_packets:1; 317 } p0; 318 struct { 319 uint32_t 320 id:2, 321 phy_id:6, 322 sequel:1, 323 sequence_num:3, 324 reserved2:2, 325 port3:2, 326 port4:2, 327 port5:2, 328 port6:2, 329 port7:2, 330 port8:2, 331 port9:2, 332 port10:2, 333 reserved1:1, 334 more_packets:1; 335 } p1; 336 struct { 337 uint32_t 338 id:2, 339 phy_id:6, 340 sequel:1, 341 sequence_num:3, 342 :2, 343 port11:2, 344 port12:2, 345 port13:2, 346 port14:2, 347 port15:2, 348 :8; 349 } p2; 350 }; 351 #else 352 union fw_self_id { 353 struct { 354 uint32_t more_packets:1, 355 initiated_reset:1, 356 port2:2, 357 port1:2, 358 port0:2, 359 power_class:3, 360 contender:1, 361 reserved:2, 362 phy_speed:2, 363 gap_count:6, 364 link_active:1, 365 sequel:1, 366 phy_id:6, 367 id:2; 368 } p0; 369 struct { 370 uint32_t more_packets:1, 371 reserved1:1, 372 port10:2, 373 port9:2, 374 port8:2, 375 port7:2, 376 port6:2, 377 port5:2, 378 port4:2, 379 port3:2, 380 reserved2:2, 381 sequence_num:3, 382 sequel:1, 383 phy_id:6, 384 id:2; 385 } p1; 386 struct { 387 uint32_t 388 reserved3:8, 389 port15:2, 390 port14:2, 391 port13:2, 392 port12:2, 393 port11:2, 394 reserved4:2, 395 sequence_num:3, 396 sequel:1, 397 phy_id:6, 398 id:2; 399 } p2; 400 }; 401 #endif 402 403 404 struct fw_topology_map { 405 uint32_t crc:16, 406 crc_len:16; 407 uint32_t generation; 408 uint32_t self_id_count:16, 409 node_count:16; 410 union fw_self_id self_id[4*64]; 411 }; 412 413 struct fw_speed_map { 414 uint32_t crc:16, 415 crc_len:16; 416 uint32_t generation; 417 uint8_t speed[64][64]; 418 }; 419 420 struct fw_crom_buf { 421 struct fw_eui64 eui; 422 uint32_t len; 423 void *ptr; 424 }; 425 426 /* 427 * FireWire specific system requests. 428 */ 429 #define FW_SSTBUF _IOWR('S', 86, struct fw_isobufreq) 430 #define FW_GSTBUF _IOWR('S', 87, struct fw_isobufreq) 431 #define FW_SRSTREAM _IOWR('S', 88, struct fw_isochreq) 432 #define FW_GRSTREAM _IOWR('S', 89, struct fw_isochreq) 433 #define FW_STSTREAM _IOWR('S', 90, struct fw_isochreq) 434 #define FW_GTSTREAM _IOWR('S', 91, struct fw_isochreq) 435 436 #define FW_ASYREQ _IOWR('S', 92, struct fw_asyreq) 437 #define FW_IBUSRST _IOR('S', 1, unsigned int) 438 #define FW_GDEVLST _IOWR('S', 2, struct fw_devlstreq) 439 #define FW_SBINDADDR _IOWR('S', 3, struct fw_asybindreq) 440 #define FW_CBINDADDR _IOWR('S', 4, struct fw_asybindreq) 441 #define FW_GTPMAP _IOR('S', 5, struct fw_topology_map) 442 #define FW_GCROM _IOWR('S', 7, struct fw_crom_buf) 443 444 #define FW_SDEUI64 _IOW('S', 20, struct fw_eui64) 445 #define FW_GDEUI64 _IOR('S', 21, struct fw_eui64) 446 447 #define FWOHCI_RDREG _IOWR('S', 80, struct fw_reg_req_t) 448 #define FWOHCI_WRREG _IOWR('S', 81, struct fw_reg_req_t) 449 #define FWOHCI_RDPHYREG _IOWR('S', 82, struct fw_reg_req_t) 450 #define FWOHCI_WRPHYREG _IOWR('S', 83, struct fw_reg_req_t) 451 452 #define DUMPDMA _IOWR('S', 82, uint32_t) 453 454 #ifdef _KERNEL 455 456 #define FWMAXNDMA 0x100 /* 8 bits DMA channel id. in device No. */ 457 458 #define unit2minor(x) (((x) & 0xff) | (((x) << 12) & ~0xfffff)) 459 #define MAKEMINOR(f, u, s) ((f) | (((u) & 0xff) << 8) | ((s) & 0xff)) 460 #define DEV2UNIT(x) ((minor(x) & 0xff00) >> 8) 461 #define DEV2SUB(x) (minor(x) & 0xff) 462 #define FW_UNITMASK MAKEMINOR(0, -1, 0) 463 #define FW_UNIT(unit) MAKEMINOR(0, unit, 0) 464 465 #define FWMEM_FLAG 0x10000 466 #define DEV_FWMEM(x) (minor(x) & FWMEM_FLAG) 467 468 struct fw_attach_args { 469 const char *name; 470 struct firewire_comm *fc; 471 struct fw_device *fwdev; 472 }; 473 474 #endif 475 #endif /* _FIREWIRE_H_ */ 476
Indexes created Tue Oct 07 21:09:53 GMT 2025