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fwohcivar.h revision 1.4
      1  1.1  matt /*-
      2  1.1  matt  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      3  1.1  matt  * All rights reserved.
      4  1.1  matt  *
      5  1.1  matt  * This code is derived from software contributed to The NetBSD Foundation
      6  1.1  matt  * by Matt Thomas of the 3am Software Foundry.
      7  1.1  matt  *
      8  1.1  matt  * Redistribution and use in source and binary forms, with or without
      9  1.1  matt  * modification, are permitted provided that the following conditions
     10  1.1  matt  * are met:
     11  1.1  matt  * 1. Redistributions of source code must retain the above copyright
     12  1.1  matt  *    notice, this list of conditions and the following disclaimer.
     13  1.1  matt  * 2. Redistributions in binary form must reproduce the above copyright
     14  1.1  matt  *    notice, this list of conditions and the following disclaimer in the
     15  1.1  matt  *    documentation and/or other materials provided with the distribution.
     16  1.1  matt  * 3. All advertising materials mentioning features or use of this software
     17  1.1  matt  *    must display the following acknowledgement:
     18  1.1  matt  *        This product includes software developed by the NetBSD
     19  1.1  matt  *        Foundation, Inc. and its contributors.
     20  1.1  matt  * 4. Neither the name of The NetBSD Foundation nor the names of its
     21  1.1  matt  *    contributors may be used to endorse or promote products derived
     22  1.1  matt  *    from this software without specific prior written permission.
     23  1.1  matt  *
     24  1.1  matt  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     25  1.1  matt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     26  1.1  matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     27  1.1  matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     28  1.1  matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     29  1.1  matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     30  1.1  matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     31  1.1  matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     32  1.1  matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     33  1.1  matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     34  1.1  matt  * POSSIBILITY OF SUCH DAMAGE.
     35  1.1  matt  */
     36  1.1  matt 
     37  1.1  matt #ifndef _DEV_IEEE1394_FWOHCIVAR_H_
     38  1.1  matt #define	_DEV_IEEE1394_FWOHCIVAR_H_
     39  1.1  matt 
     40  1.4  onoe #include <sys/mbuf.h>
     41  1.4  onoe #include <sys/callout.h>
     42  1.4  onoe #include <sys/queue.h>
     43  1.4  onoe 
     44  1.4  onoe #include <machine/bus.h>
     45  1.2  onoe 
     46  1.2  onoe #define	OHCI_PAGE_SIZE		0x0800
     47  1.2  onoe #define	OHCI_BUF_ARRQ_CNT	16
     48  1.2  onoe #define	OHCI_BUF_ARRS_CNT	8
     49  1.2  onoe #define	OHCI_BUF_ATRQ_CNT	(8*8)
     50  1.2  onoe #define	OHCI_BUF_ATRS_CNT	(8*8)
     51  1.2  onoe #define	OHCI_BUF_IR_CNT		16
     52  1.2  onoe #define	OHCI_BUF_CNT		(OHCI_BUF_ARRQ_CNT + OHCI_BUF_ARRS_CNT + OHCI_BUF_ATRQ_CNT + OHCI_BUF_ATRS_CNT + OHCI_BUF_IR_CNT + 1 + 1)
     53  1.2  onoe 
     54  1.2  onoe #define	OHCI_LOOP		1000
     55  1.4  onoe #define	OHCI_SELFID_TIMEOUT	(hz * 3)
     56  1.2  onoe 
     57  1.2  onoe struct fwohci_softc;
     58  1.2  onoe 
     59  1.2  onoe struct fwohci_buf {
     60  1.2  onoe 	TAILQ_ENTRY(fwohci_buf) fb_list;
     61  1.2  onoe 	bus_dma_segment_t fb_seg;
     62  1.2  onoe 	int fb_nseg;
     63  1.2  onoe 	bus_dmamap_t fb_dmamap;
     64  1.2  onoe 	caddr_t fb_buf;
     65  1.2  onoe 	struct fwohci_desc *fb_desc;
     66  1.2  onoe 	bus_addr_t fb_daddr;
     67  1.2  onoe 	int fb_off;
     68  1.2  onoe 	struct mbuf *fb_m;
     69  1.2  onoe 	void (*fb_callback)(struct device *, struct mbuf *);
     70  1.2  onoe };
     71  1.2  onoe 
     72  1.2  onoe struct fwohci_pkt {
     73  1.2  onoe 	int	fp_tcode;
     74  1.2  onoe 	int	fp_hlen;
     75  1.2  onoe 	int	fp_dlen;
     76  1.2  onoe 	u_int32_t fp_hdr[4];
     77  1.2  onoe 	int	fp_iovcnt;
     78  1.2  onoe 	struct iovec fp_iov[8];
     79  1.2  onoe 	u_int32_t *fp_trail;
     80  1.2  onoe 	struct mbuf *fp_m;
     81  1.2  onoe 	void (*fp_callback)(struct device *, struct mbuf *);
     82  1.2  onoe };
     83  1.2  onoe 
     84  1.2  onoe struct fwohci_handler {
     85  1.2  onoe 	LIST_ENTRY(fwohci_handler) fh_list;
     86  1.2  onoe 	u_int32_t	fh_tcode;	/* ARRQ   / ARRS   / IR   */
     87  1.2  onoe 	u_int32_t	fh_key1;	/* addrhi / srcid  / chan */
     88  1.2  onoe 	u_int32_t	fh_key2;	/* addrlo / tlabel / tag  */
     89  1.2  onoe 	int		(*fh_handler)(struct fwohci_softc *, void *,
     90  1.2  onoe 			    struct fwohci_pkt *);
     91  1.2  onoe 	void		*fh_handarg;
     92  1.2  onoe };
     93  1.2  onoe 
     94  1.2  onoe struct fwohci_ctx {
     95  1.2  onoe 	int	fc_ctx;
     96  1.2  onoe 	int	fc_ppbmode;	/* packet per buffer */
     97  1.2  onoe 	int	fc_bufcnt;
     98  1.2  onoe 	u_int32_t	*fc_branch;
     99  1.2  onoe 	TAILQ_HEAD(fwohci_buf_s, fwohci_buf) fc_buf, fc_busy;
    100  1.2  onoe 	LIST_HEAD(, fwohci_handler) fc_handler;
    101  1.2  onoe };
    102  1.2  onoe 
    103  1.2  onoe struct fwohci_uidtbl {
    104  1.2  onoe 	struct fwohci_uident {
    105  1.2  onoe 		u_int8_t	fu_uid[4];
    106  1.2  onoe 		u_int8_t	fu_valid;
    107  1.2  onoe 	} fu_hi, fu_lo;
    108  1.2  onoe };
    109  1.2  onoe 
    110  1.1  matt struct fwohci_softc {
    111  1.1  matt 	struct ieee1394_softc sc_sc1394;
    112  1.3  matt 	struct evcnt sc_intrcnt;
    113  1.1  matt 
    114  1.1  matt 	bus_space_tag_t sc_memt;
    115  1.1  matt 	bus_space_handle_t sc_memh;
    116  1.1  matt 	bus_dma_tag_t sc_dmat;
    117  1.1  matt 	bus_size_t sc_memsize;
    118  1.3  matt #if 0
    119  1.3  matt 
    120  1.3  matt /* Mandatory structures to get the link enabled
    121  1.3  matt  */
    122  1.3  matt 	bus_dmamap_t sc_configrom_map;
    123  1.3  matt 	bus_dmamap_t sc_selfid_map;
    124  1.3  matt 	u_int32_t *sc_selfid_buf;
    125  1.3  matt 	u_int32_t *sc_configrom;
    126  1.3  matt #endif
    127  1.2  onoe 
    128  1.2  onoe 	bus_dma_segment_t sc_dseg;
    129  1.2  onoe 	int sc_dnseg;
    130  1.2  onoe 	bus_dmamap_t sc_ddmamap;
    131  1.4  onoe 	struct fwohci_desc *sc_desc;
    132  1.4  onoe 	struct fwohci_desc *sc_descfree;
    133  1.2  onoe 	int sc_descsize;
    134  1.4  onoe 	int sc_isoctx;
    135  1.2  onoe 
    136  1.4  onoe 	void *sc_shutdownhook;
    137  1.4  onoe 	void *sc_powerhook;
    138  1.4  onoe 	struct callout sc_selfid_callout;
    139  1.2  onoe 
    140  1.2  onoe 	struct fwohci_ctx *sc_ctx_arrq;
    141  1.2  onoe 	struct fwohci_ctx *sc_ctx_arrs;
    142  1.2  onoe 	struct fwohci_ctx *sc_ctx_atrq;
    143  1.2  onoe 	struct fwohci_ctx *sc_ctx_atrs;
    144  1.2  onoe 	struct fwohci_ctx **sc_ctx_ir;
    145  1.2  onoe 	struct fwohci_buf sc_buf_cnfrom;
    146  1.2  onoe 	struct fwohci_buf sc_buf_selfid;
    147  1.2  onoe 
    148  1.2  onoe 	u_int8_t sc_csr[CSR_SB_END];
    149  1.2  onoe 
    150  1.2  onoe 	struct fwohci_uidtbl *sc_uidtbl;
    151  1.4  onoe 	u_int16_t sc_nodeid;			/* Full Node ID of this node */
    152  1.4  onoe 	u_int8_t sc_rootid;			/* Phy ID of Root */
    153  1.4  onoe 	u_int8_t sc_irmid;			/* Phy ID of IRM */
    154  1.4  onoe 	u_int8_t sc_tlabel;			/* Transaction Label */
    155  1.1  matt };
    156  1.1  matt 
    157  1.3  matt int fwohci_init (struct fwohci_softc *, const struct evcnt *);
    158  1.3  matt int fwohci_intr (void *);
    159  1.3  matt int fwohci_print (void *, const char *);
    160  1.1  matt 
    161  1.1  matt /* Macros to read and write the OHCI registers
    162  1.1  matt  */
    163  1.1  matt #define	OHCI_CSR_WRITE(sc, reg, val)	bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, reg, val)
    164  1.1  matt #define	OHCI_CSR_READ(sc, reg)	bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, reg)
    165  1.1  matt 
    166  1.1  matt #endif	/* _DEV_IEEE1394_FWOHCIVAR_H_ */
    167