fwohcivar.h revision 1.5 1 /*-
2 * Copyright (c) 2000 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Matt Thomas of the 3am Software Foundry.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the NetBSD
19 * Foundation, Inc. and its contributors.
20 * 4. Neither the name of The NetBSD Foundation nor the names of its
21 * contributors may be used to endorse or promote products derived
22 * from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37 #ifndef _DEV_IEEE1394_FWOHCIVAR_H_
38 #define _DEV_IEEE1394_FWOHCIVAR_H_
39
40 #include <sys/mbuf.h>
41 #include <sys/callout.h>
42 #include <sys/queue.h>
43
44 #include <machine/bus.h>
45
46 #define OHCI_PAGE_SIZE 0x0800
47 #define OHCI_BUF_ARRQ_CNT 16
48 #define OHCI_BUF_ARRS_CNT 8
49 #define OHCI_BUF_ATRQ_CNT (8*8)
50 #define OHCI_BUF_ATRS_CNT (8*8)
51 #define OHCI_BUF_IR_CNT 16
52 #define OHCI_BUF_CNT (OHCI_BUF_ARRQ_CNT + OHCI_BUF_ARRS_CNT + OHCI_BUF_ATRQ_CNT + OHCI_BUF_ATRS_CNT + OHCI_BUF_IR_CNT + 1 + 1)
53
54 #define OHCI_LOOP 1000
55 #define OHCI_SELFID_TIMEOUT (hz * 3)
56
57 struct fwohci_softc;
58
59 struct fwohci_buf {
60 TAILQ_ENTRY(fwohci_buf) fb_list;
61 bus_dma_segment_t fb_seg;
62 int fb_nseg;
63 bus_dmamap_t fb_dmamap;
64 caddr_t fb_buf;
65 struct fwohci_desc *fb_desc;
66 bus_addr_t fb_daddr;
67 int fb_off;
68 struct mbuf *fb_m;
69 void (*fb_callback)(struct device *, struct mbuf *);
70 };
71
72 struct fwohci_pkt {
73 int fp_tcode;
74 int fp_hlen;
75 int fp_dlen;
76 u_int32_t fp_hdr[4];
77 int fp_iovcnt;
78 struct iovec fp_iov[8];
79 u_int32_t *fp_trail;
80 struct mbuf *fp_m;
81 void (*fp_callback)(struct device *, struct mbuf *);
82 };
83
84 struct fwohci_handler {
85 LIST_ENTRY(fwohci_handler) fh_list;
86 u_int32_t fh_tcode; /* ARRQ / ARRS / IR */
87 u_int32_t fh_key1; /* addrhi / srcid / chan */
88 u_int32_t fh_key2; /* addrlo / tlabel / tag */
89 int (*fh_handler)(struct fwohci_softc *, void *,
90 struct fwohci_pkt *);
91 void *fh_handarg;
92 };
93
94 struct fwohci_ctx {
95 int fc_ctx;
96 int fc_ppbmode; /* packet per buffer */
97 int fc_bufcnt;
98 u_int32_t *fc_branch;
99 TAILQ_HEAD(fwohci_buf_s, fwohci_buf) fc_buf, fc_busy;
100 LIST_HEAD(, fwohci_handler) fc_handler;
101 };
102
103 struct fwohci_uidtbl {
104 int fu_valid;
105 u_int8_t fu_uid[8];
106 };
107
108 struct fwohci_softc {
109 struct ieee1394_softc sc_sc1394;
110 struct evcnt sc_intrcnt;
111
112 bus_space_tag_t sc_memt;
113 bus_space_handle_t sc_memh;
114 bus_dma_tag_t sc_dmat;
115 bus_size_t sc_memsize;
116 #if 0
117
118 /* Mandatory structures to get the link enabled
119 */
120 bus_dmamap_t sc_configrom_map;
121 bus_dmamap_t sc_selfid_map;
122 u_int32_t *sc_selfid_buf;
123 u_int32_t *sc_configrom;
124 #endif
125
126 bus_dma_segment_t sc_dseg;
127 int sc_dnseg;
128 bus_dmamap_t sc_ddmamap;
129 struct fwohci_desc *sc_desc;
130 struct fwohci_desc *sc_descfree;
131 int sc_descsize;
132 int sc_isoctx;
133
134 void *sc_shutdownhook;
135 void *sc_powerhook;
136 struct callout sc_selfid_callout;
137
138 struct fwohci_ctx *sc_ctx_arrq;
139 struct fwohci_ctx *sc_ctx_arrs;
140 struct fwohci_ctx *sc_ctx_atrq;
141 struct fwohci_ctx *sc_ctx_atrs;
142 struct fwohci_ctx **sc_ctx_ir;
143 struct fwohci_buf sc_buf_cnfrom;
144 struct fwohci_buf sc_buf_selfid;
145
146 u_int8_t sc_csr[CSR_SB_END];
147
148 struct fwohci_uidtbl *sc_uidtbl;
149 u_int16_t sc_nodeid; /* Full Node ID of this node */
150 u_int8_t sc_rootid; /* Phy ID of Root */
151 u_int8_t sc_irmid; /* Phy ID of IRM */
152 u_int8_t sc_tlabel; /* Transaction Label */
153 };
154
155 int fwohci_init (struct fwohci_softc *, const struct evcnt *);
156 int fwohci_intr (void *);
157 int fwohci_print (void *, const char *);
158
159 /* Macros to read and write the OHCI registers
160 */
161 #define OHCI_CSR_WRITE(sc, reg, val) bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, reg, val)
162 #define OHCI_CSR_READ(sc, reg) bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, reg)
163
164 #endif /* _DEV_IEEE1394_FWOHCIVAR_H_ */
165