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ad1848_isa.c revision 1.19
      1  1.19    itohy /*	$NetBSD: ad1848_isa.c,v 1.19 2001/11/04 08:08:26 itohy Exp $	*/
      2   1.1       pk 
      3   1.7  mycroft /*-
      4   1.7  mycroft  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      5   1.7  mycroft  * All rights reserved.
      6   1.7  mycroft  *
      7   1.7  mycroft  * This code is derived from software contributed to The NetBSD Foundation
      8   1.7  mycroft  * by Ken Hornstein and John Kohl.
      9   1.7  mycroft  *
     10   1.7  mycroft  * Redistribution and use in source and binary forms, with or without
     11   1.7  mycroft  * modification, are permitted provided that the following conditions
     12   1.7  mycroft  * are met:
     13   1.7  mycroft  * 1. Redistributions of source code must retain the above copyright
     14   1.7  mycroft  *    notice, this list of conditions and the following disclaimer.
     15   1.7  mycroft  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.7  mycroft  *    notice, this list of conditions and the following disclaimer in the
     17   1.7  mycroft  *    documentation and/or other materials provided with the distribution.
     18   1.7  mycroft  * 3. All advertising materials mentioning features or use of this software
     19   1.7  mycroft  *    must display the following acknowledgement:
     20   1.7  mycroft  *        This product includes software developed by the NetBSD
     21   1.7  mycroft  *	  Foundation, Inc. and its contributors.
     22   1.7  mycroft  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23   1.7  mycroft  *    contributors may be used to endorse or promote products derived
     24   1.7  mycroft  *    from this software without specific prior written permission.
     25   1.7  mycroft  *
     26   1.7  mycroft  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27   1.7  mycroft  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28   1.7  mycroft  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29   1.7  mycroft  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30   1.7  mycroft  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31   1.7  mycroft  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32   1.7  mycroft  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33   1.7  mycroft  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34   1.7  mycroft  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35   1.7  mycroft  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36   1.7  mycroft  * POSSIBILITY OF SUCH DAMAGE.
     37   1.7  mycroft  */
     38   1.1       pk /*
     39   1.1       pk  * Copyright (c) 1994 John Brezak
     40   1.1       pk  * Copyright (c) 1991-1993 Regents of the University of California.
     41   1.1       pk  * All rights reserved.
     42   1.1       pk  *
     43   1.1       pk  * Redistribution and use in source and binary forms, with or without
     44   1.1       pk  * modification, are permitted provided that the following conditions
     45   1.1       pk  * are met:
     46   1.1       pk  * 1. Redistributions of source code must retain the above copyright
     47   1.1       pk  *    notice, this list of conditions and the following disclaimer.
     48   1.1       pk  * 2. Redistributions in binary form must reproduce the above copyright
     49   1.1       pk  *    notice, this list of conditions and the following disclaimer in the
     50   1.1       pk  *    documentation and/or other materials provided with the distribution.
     51   1.1       pk  * 3. All advertising materials mentioning features or use of this software
     52   1.1       pk  *    must display the following acknowledgement:
     53   1.1       pk  *	This product includes software developed by the Computer Systems
     54   1.1       pk  *	Engineering Group at Lawrence Berkeley Laboratory.
     55   1.1       pk  * 4. Neither the name of the University nor of the Laboratory may be used
     56   1.1       pk  *    to endorse or promote products derived from this software without
     57   1.1       pk  *    specific prior written permission.
     58   1.1       pk  *
     59   1.1       pk  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     60   1.1       pk  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     61   1.1       pk  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     62   1.1       pk  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     63   1.1       pk  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     64   1.1       pk  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     65   1.1       pk  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     66   1.1       pk  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     67   1.1       pk  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     68   1.1       pk  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     69   1.1       pk  * SUCH DAMAGE.
     70   1.1       pk  *
     71   1.1       pk  */
     72   1.1       pk 
     73   1.1       pk /*
     74   1.1       pk  * Copyright by Hannu Savolainen 1994
     75   1.1       pk  *
     76   1.1       pk  * Redistribution and use in source and binary forms, with or without
     77   1.1       pk  * modification, are permitted provided that the following conditions are
     78   1.1       pk  * met: 1. Redistributions of source code must retain the above copyright
     79   1.1       pk  * notice, this list of conditions and the following disclaimer. 2.
     80   1.1       pk  * Redistributions in binary form must reproduce the above copyright notice,
     81   1.1       pk  * this list of conditions and the following disclaimer in the documentation
     82   1.1       pk  * and/or other materials provided with the distribution.
     83   1.1       pk  *
     84   1.1       pk  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
     85   1.1       pk  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     86   1.1       pk  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     87   1.1       pk  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     88   1.1       pk  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     89   1.1       pk  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     90   1.1       pk  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
     91   1.1       pk  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     92   1.1       pk  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     93   1.1       pk  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     94   1.1       pk  * SUCH DAMAGE.
     95   1.1       pk  *
     96   1.1       pk  */
     97   1.1       pk /*
     98   1.1       pk  * Portions of this code are from the VOXware support for the ad1848
     99   1.1       pk  * by Hannu Savolainen <hannu (at) voxware.pp.fi>
    100   1.1       pk  *
    101   1.1       pk  * Portions also supplied from the SoundBlaster driver for NetBSD.
    102   1.1       pk  */
    103   1.1       pk 
    104   1.1       pk #include <sys/param.h>
    105   1.1       pk #include <sys/systm.h>
    106   1.1       pk #include <sys/errno.h>
    107   1.1       pk #include <sys/ioctl.h>
    108   1.1       pk #include <sys/syslog.h>
    109   1.1       pk #include <sys/device.h>
    110   1.1       pk #include <sys/proc.h>
    111   1.1       pk #include <sys/buf.h>
    112   1.1       pk 
    113   1.1       pk #include <machine/cpu.h>
    114   1.1       pk #include <machine/bus.h>
    115   1.1       pk 
    116   1.1       pk #include <sys/audioio.h>
    117   1.1       pk 
    118   1.1       pk #include <dev/audio_if.h>
    119   1.1       pk #include <dev/auconv.h>
    120   1.1       pk 
    121   1.1       pk #include <dev/isa/isavar.h>
    122   1.1       pk #include <dev/isa/isadmavar.h>
    123   1.1       pk 
    124   1.1       pk #include <dev/ic/ad1848reg.h>
    125   1.1       pk #include <dev/ic/cs4231reg.h>
    126  1.12       rh #include <dev/ic/cs4237reg.h>
    127   1.1       pk #include <dev/isa/ad1848var.h>
    128   1.1       pk #include <dev/isa/cs4231var.h>
    129   1.1       pk 
    130   1.1       pk #ifdef AUDIO_DEBUG
    131   1.1       pk #define DPRINTF(x)	if (ad1848debug) printf x
    132   1.1       pk extern int	ad1848debug;
    133   1.1       pk #else
    134   1.1       pk #define DPRINTF(x)
    135   1.1       pk #endif
    136   1.1       pk 
    137   1.1       pk static int ad1848_isa_read __P(( struct ad1848_softc *, int));
    138   1.1       pk static void ad1848_isa_write __P(( struct ad1848_softc *, int, int));
    139   1.1       pk 
    140   1.1       pk int
    141   1.1       pk ad1848_isa_read(sc, index)
    142   1.1       pk 	struct ad1848_softc *sc;
    143   1.1       pk 	int index;
    144   1.1       pk {
    145  1.11  mycroft 	return (bus_space_read_1(sc->sc_iot, sc->sc_ioh, index));
    146   1.1       pk }
    147   1.1       pk 
    148   1.1       pk void
    149   1.1       pk ad1848_isa_write(sc, index, value)
    150   1.1       pk 	struct ad1848_softc *sc;
    151   1.1       pk 	int index;
    152   1.1       pk 	int value;
    153   1.1       pk {
    154  1.11  mycroft 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, index, value);
    155   1.1       pk }
    156   1.1       pk 
    157   1.1       pk /*
    158   1.1       pk  * Map and probe for the ad1848 chip
    159   1.1       pk  */
    160   1.1       pk int
    161   1.1       pk ad1848_isa_mapprobe(isc, iobase)
    162   1.1       pk 	struct ad1848_isa_softc *isc;
    163   1.1       pk 	int iobase;
    164   1.1       pk {
    165  1.10  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    166   1.1       pk 
    167   1.1       pk 	if (!AD1848_BASE_VALID(iobase)) {
    168   1.1       pk #ifdef AUDIO_DEBUG
    169   1.1       pk 		printf("ad1848: configured iobase %04x invalid\n", iobase);
    170   1.1       pk #endif
    171   1.1       pk 		return 0;
    172   1.1       pk 	}
    173   1.1       pk 
    174   1.1       pk 	/* Map the AD1848 ports */
    175   1.1       pk 	if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh))
    176   1.1       pk 		return 0;
    177   1.1       pk 
    178   1.1       pk 	if (!ad1848_isa_probe(isc)) {
    179   1.1       pk 		bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
    180   1.1       pk 		return 0;
    181   1.1       pk 	} else
    182   1.1       pk 		return 1;
    183   1.1       pk }
    184   1.1       pk 
    185   1.1       pk /*
    186   1.1       pk  * Probe for the ad1848 chip
    187   1.1       pk  */
    188   1.1       pk int
    189   1.1       pk ad1848_isa_probe(isc)
    190   1.1       pk 	struct ad1848_isa_softc *isc;
    191   1.1       pk {
    192  1.10  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    193   1.1       pk 	u_char tmp, tmp1 = 0xff, tmp2 = 0xff;
    194  1.19    itohy 	int i, t;
    195   1.1       pk 
    196   1.1       pk 	sc->sc_readreg = ad1848_isa_read;
    197   1.1       pk 	sc->sc_writereg = ad1848_isa_write;
    198   1.1       pk 
    199   1.1       pk 	/* Is there an ad1848 chip ? */
    200   1.1       pk 	sc->MCE_bit = MODE_CHANGE_ENABLE;
    201   1.1       pk 	sc->mode = 1;	/* MODE 1 = original ad1848/ad1846/cs4248 */
    202   1.1       pk 
    203   1.1       pk 	/*
    204   1.1       pk 	 * Check that the I/O address is in use.
    205   1.1       pk 	 *
    206   1.1       pk 	 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the
    207   1.1       pk 	 * chip has performed its power-on initialization. Just assume
    208   1.1       pk 	 * this has happened before the OS is starting.
    209   1.1       pk 	 *
    210   1.1       pk 	 * If the I/O address is unused, inb() typically returns 0xff.
    211   1.1       pk 	 */
    212   1.1       pk 	tmp = ADREAD(sc, AD1848_IADDR);
    213   1.1       pk 	if (tmp & SP_IN_INIT) { /* Not a AD1848 */
    214   1.1       pk 		DPRINTF(("ad_detect_A %x\n", tmp));
    215   1.1       pk 		goto bad;
    216   1.1       pk 	}
    217   1.1       pk 
    218   1.1       pk 	/*
    219   1.1       pk 	 * Test if it's possible to change contents of the indirect registers.
    220   1.9  mycroft 	 * Registers 0 and 1 are ADC volume registers.  The bit 0x10 is read
    221   1.9  mycroft 	 * only so try to avoid using it.  The bit 0x20 is the mic preamp
    222   1.9  mycroft 	 * enable; on some chips it is always the same in both registers, so
    223   1.9  mycroft 	 * we avoid tests where they are different.
    224   1.1       pk 	 */
    225   1.9  mycroft 	ad_write(sc, 0, 0x8a);
    226   1.1       pk 	ad_write(sc, 1, 0x45);	/* 0x55 with bit 0x10 clear */
    227   1.9  mycroft 	tmp1 = ad_read(sc, 0);
    228   1.9  mycroft 	tmp2 = ad_read(sc, 1);
    229   1.1       pk 
    230   1.9  mycroft 	if (tmp1 != 0x8a || tmp2 != 0x45) {
    231   1.1       pk 		DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2));
    232   1.1       pk 		goto bad;
    233   1.1       pk 	}
    234   1.1       pk 
    235   1.9  mycroft 	ad_write(sc, 0, 0x65);
    236   1.1       pk 	ad_write(sc, 1, 0xaa);
    237   1.9  mycroft 	tmp1 = ad_read(sc, 0);
    238   1.9  mycroft 	tmp2 = ad_read(sc, 1);
    239   1.1       pk 
    240   1.9  mycroft 	if (tmp1 != 0x65 || tmp2 != 0xaa) {
    241   1.1       pk 		DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2));
    242   1.1       pk 		goto bad;
    243   1.1       pk 	}
    244   1.1       pk 
    245   1.1       pk 	/*
    246   1.1       pk 	 * The indirect register I12 has some read only bits. Lets
    247   1.1       pk 	 * try to change them.
    248   1.1       pk 	 */
    249   1.1       pk 	tmp = ad_read(sc, SP_MISC_INFO);
    250   1.1       pk 	ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f);
    251   1.1       pk 
    252  1.19    itohy 	/* Here, AD1845 may sometimes be busy.  Wait til it becomes ready. */
    253  1.19    itohy 	for (t = 0; t < 100000 && ADREAD(sc, AD1848_IADDR) & SP_IN_INIT; t++)
    254  1.19    itohy 		;
    255  1.19    itohy #ifdef AUDIO_DEBUG
    256  1.19    itohy 	if (t)
    257  1.19    itohy 		DPRINTF(("ad1848_isa_probe: t %d\n", t));
    258  1.19    itohy #endif
    259  1.19    itohy 
    260   1.1       pk 	if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) {
    261   1.1       pk 		DPRINTF(("ad_detect_D (%x)\n", tmp1));
    262   1.1       pk 		goto bad;
    263   1.1       pk 	}
    264   1.1       pk 
    265   1.1       pk 	/*
    266   1.1       pk 	 * MSB and 4 LSBs of the reg I12 tell the chip revision.
    267   1.1       pk 	 *
    268   1.1       pk 	 * A preliminary version of the AD1846 data sheet stated that it
    269   1.1       pk 	 * used an ID field of 0x0B.  The current version, however,
    270   1.1       pk 	 * states that the AD1846 uses ID 0x0A, just like the AD1848K.
    271   1.1       pk 	 *
    272   1.1       pk 	 * this switch statement will need updating as newer clones arrive....
    273   1.1       pk 	 */
    274   1.1       pk 	switch (tmp1 & 0x8f) {
    275   1.1       pk 	case 0x09:
    276   1.1       pk 		sc->chip_name = "AD1848J";
    277   1.1       pk 		break;
    278   1.1       pk 	case 0x0A:
    279   1.1       pk 		sc->chip_name = "AD1848K";
    280   1.1       pk 		break;
    281   1.1       pk #if 0	/* See above */
    282   1.1       pk 	case 0x0B:
    283   1.1       pk 		sc->chip_name = "AD1846";
    284   1.1       pk 		break;
    285   1.1       pk #endif
    286   1.1       pk 	case 0x81:
    287   1.1       pk 		sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */
    288   1.1       pk 		break;
    289   1.1       pk 	case 0x89:
    290   1.1       pk 		sc->chip_name = "CS4248";
    291   1.1       pk 		break;
    292   1.1       pk 	case 0x8A:
    293   1.1       pk 		sc->chip_name = "broken"; /* CS4231/AD1845; see below */
    294   1.1       pk 		break;
    295   1.1       pk 	default:
    296   1.1       pk 		sc->chip_name = "unknown";
    297   1.1       pk 		DPRINTF(("ad1848: unknown codec version 0x%02x\n",
    298   1.1       pk 			 tmp1 & 0x8f));
    299   1.1       pk 		break;
    300   1.1       pk 	}
    301   1.1       pk 
    302   1.1       pk 	/*
    303   1.1       pk 	 * The original AD1848/CS4248 has just 16 indirect registers. This
    304   1.1       pk 	 * means that I0 and I16 should return the same value (etc.).
    305   1.1       pk 	 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test
    306   1.1       pk 	 * fails with CS4231, AD1845, etc.
    307   1.1       pk 	 */
    308   1.1       pk 	ad_write(sc, SP_MISC_INFO, 0);	/* Mode2 = disabled */
    309   1.1       pk 
    310   1.1       pk 	for (i = 0; i < 16; i++)
    311   1.1       pk 		if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) {
    312   1.9  mycroft 			if (i != SP_TEST_AND_INIT) {
    313   1.9  mycroft 				DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2));
    314   1.9  mycroft 				goto bad;
    315   1.9  mycroft 			}
    316   1.1       pk 		}
    317   1.1       pk 
    318   1.1       pk 	/*
    319   1.1       pk 	 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit
    320   1.1       pk 	 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845.
    321   1.1       pk 	 */
    322   1.1       pk 	ad_write(sc, SP_MISC_INFO, MODE2);	/* Set mode2, clear 0x80 */
    323   1.1       pk 
    324   1.1       pk 	tmp1 = ad_read(sc, SP_MISC_INFO);
    325   1.1       pk 	if ((tmp1 & 0xc0) == (0x80 | MODE2)) {
    326   1.1       pk 		/*
    327   1.1       pk 		 *      CS4231 or AD1845 detected - is it?
    328   1.1       pk 		 *
    329   1.1       pk 		 *	Verify that setting I2 doesn't change I18.
    330   1.1       pk 		 */
    331   1.1       pk 		ad_write(sc, 18, 0x88); /* Set I18 to known value */
    332   1.1       pk 
    333   1.1       pk 		ad_write(sc, 2, 0x45);
    334   1.1       pk 		if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */
    335   1.1       pk 			ad_write(sc, 2, 0xaa);
    336   1.1       pk 			if ((tmp2 = ad_read(sc, 18)) == 0xaa) {     /* Rotten bits? */
    337   1.1       pk 				DPRINTF(("ad_detect_H(%x)\n", tmp2));
    338   1.1       pk 				goto bad;
    339   1.1       pk 			}
    340   1.1       pk 
    341  1.12       rh 			sc->mode = 2;
    342  1.12       rh 
    343   1.1       pk 			/*
    344   1.1       pk 			 *  It's a CS4231, or another clone with 32 registers.
    345   1.1       pk 			 *  Let's find out which by checking I25.
    346   1.1       pk 			 */
    347   1.1       pk 			if ((tmp1 & 0x8f) == 0x8a) {
    348   1.1       pk 				tmp1 = ad_read(sc, CS_VERSION_ID);
    349   1.1       pk 				switch (tmp1 & 0xe7) {
    350   1.1       pk 				case 0xA0:
    351   1.1       pk 					sc->chip_name = "CS4231A";
    352   1.1       pk 					break;
    353   1.1       pk 				case 0x80:
    354   1.1       pk 					/*  XXX I25 no good, AD1845 same as CS4231 */
    355  1.19    itohy 					/*
    356  1.19    itohy 					 * XXX
    357  1.19    itohy 					 * This test is correct only after reset
    358  1.19    itohy 					 */
    359  1.19    itohy 					if (ad_read(sc, 17) & 0xf0) {
    360  1.19    itohy 						sc->chip_name = "AD1845";
    361  1.19    itohy 						sc->is_ad1845 = 1;
    362  1.19    itohy 					} else
    363  1.19    itohy 						sc->chip_name = "CS4231";
    364   1.1       pk 					break;
    365   1.1       pk 				case 0x82:
    366   1.1       pk 					sc->chip_name = "CS4232";
    367   1.1       pk 					break;
    368   1.1       pk 				case 0x03:
    369   1.4  hannken 				case 0x83:
    370  1.12       rh 					sc->chip_name = "CS4236";
    371  1.12       rh 
    372  1.12       rh 					/*
    373  1.12       rh 					 * Try to switch to mode3 (CS4236B or
    374  1.12       rh 					 * CS4237B) by setting CMS to 3.  A
    375  1.12       rh 					 * plain CS4236 will not react to
    376  1.12       rh 					 * LLBM settings.
    377  1.12       rh 					 */
    378  1.12       rh 					ad_write(sc, SP_MISC_INFO, MODE3);
    379  1.12       rh 
    380  1.12       rh 					tmp1 = ad_read(sc, CS_LEFT_LINE_CONTROL);
    381  1.12       rh 					ad_write(sc, CS_LEFT_LINE_CONTROL, 0xe0);
    382  1.12       rh 					tmp2 = ad_read(sc, CS_LEFT_LINE_CONTROL);
    383  1.12       rh 					if (tmp2 == 0xe0) {
    384  1.12       rh 						/*
    385  1.12       rh 						 * it's a CS4237B or another
    386  1.12       rh 						 * clone supporting mode 3.
    387  1.12       rh 						 * Let's determine which by
    388  1.12       rh 						 * enabling extended registers
    389  1.12       rh 						 * and checking X25.
    390  1.12       rh 						 */
    391  1.12       rh 						tmp2 = ad_xread(sc, CS_X_CHIP_VERSION);
    392  1.12       rh 						switch (tmp2 & X_CHIP_VERSIONF_CID) {
    393  1.12       rh 						case X_CHIP_CID_CS4236BB:
    394  1.12       rh 							sc->chip_name = "CS4236BrevB";
    395  1.12       rh 							break;
    396  1.12       rh 						case X_CHIP_CID_CS4236B:
    397  1.12       rh 							sc->chip_name = "CS4236B";
    398  1.12       rh 							break;
    399  1.12       rh 						case X_CHIP_CID_CS4237B:
    400  1.12       rh 							sc->chip_name = "CS4237B";
    401  1.12       rh 							break;
    402  1.12       rh 						default:
    403  1.12       rh 							sc->chip_name = "CS4236B compatible";
    404  1.12       rh 							DPRINTF(("cs4236: unknown mode 3 compatible codec, version 0x%02x\n", tmp2));
    405  1.12       rh 							break;
    406  1.12       rh 						}
    407  1.12       rh 						sc->mode = 3;
    408  1.12       rh 					}
    409  1.12       rh 
    410  1.12       rh 					/* restore volume control information */
    411  1.12       rh 					ad_write(sc, CS_LEFT_LINE_CONTROL, tmp1);
    412   1.1       pk 					break;
    413   1.1       pk 				}
    414   1.1       pk 			}
    415   1.1       pk 		}
    416   1.1       pk 	}
    417   1.1       pk 
    418   1.1       pk 	/* Wait for 1848 to init */
    419   1.1       pk 	while(ADREAD(sc, AD1848_IADDR) & SP_IN_INIT)
    420   1.1       pk 		;
    421   1.1       pk 
    422   1.1       pk 	/* Wait for 1848 to autocal */
    423   1.1       pk 	ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);
    424   1.1       pk 	while(ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG)
    425   1.1       pk 		;
    426   1.1       pk 
    427   1.1       pk 	return 1;
    428   1.9  mycroft bad:
    429   1.1       pk 	return 0;
    430   1.1       pk }
    431   1.1       pk 
    432   1.1       pk /* Unmap the I/O ports */
    433   1.1       pk void
    434   1.1       pk ad1848_isa_unmap(isc)
    435   1.1       pk 	struct ad1848_isa_softc *isc;
    436   1.1       pk {
    437  1.10  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    438   1.1       pk 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
    439   1.1       pk }
    440   1.1       pk 
    441   1.1       pk /*
    442   1.1       pk  * Attach hardware to driver, attach hardware driver to audio
    443   1.1       pk  * pseudo-device driver .
    444   1.1       pk  */
    445   1.1       pk void
    446   1.1       pk ad1848_isa_attach(isc)
    447   1.1       pk 	struct ad1848_isa_softc *isc;
    448   1.1       pk {
    449  1.10  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    450   1.1       pk 
    451   1.1       pk 	sc->sc_readreg = ad1848_isa_read;
    452   1.1       pk 	sc->sc_writereg = ad1848_isa_write;
    453   1.1       pk 
    454  1.14  thorpej 	if (isc->sc_playdrq != -1)
    455  1.14  thorpej 		isc->sc_play_maxsize = isa_dmamaxsize(isc->sc_ic,
    456  1.14  thorpej 		    isc->sc_playdrq);
    457  1.14  thorpej 	if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq)
    458  1.14  thorpej 		isc->sc_rec_maxsize = isa_dmamaxsize(isc->sc_ic,
    459  1.14  thorpej 		    isc->sc_recdrq);
    460  1.14  thorpej 
    461  1.11  mycroft 	ad1848_attach(sc);
    462  1.11  mycroft }
    463  1.11  mycroft 
    464  1.11  mycroft int
    465  1.11  mycroft ad1848_isa_open(addr, flags)
    466  1.11  mycroft 	void *addr;
    467  1.11  mycroft 	int flags;
    468  1.11  mycroft {
    469  1.11  mycroft 	struct ad1848_isa_softc *isc = addr;
    470  1.11  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    471  1.11  mycroft 	int error, state;
    472  1.11  mycroft 
    473  1.11  mycroft 	DPRINTF(("ad1848_isa_open: sc=%p\n", isc));
    474  1.11  mycroft 	state = 0;
    475   1.1       pk 
    476   1.6  mycroft 	if (isc->sc_playdrq != -1) {
    477  1.11  mycroft 		error = isa_dmamap_create(isc->sc_ic, isc->sc_playdrq,
    478  1.14  thorpej 		    isc->sc_play_maxsize, BUS_DMA_NOWAIT);
    479  1.11  mycroft 		if (error) {
    480  1.11  mycroft 			printf("%s: can't create map for drq %d\n",
    481  1.11  mycroft 			    sc->sc_dev.dv_xname, isc->sc_playdrq);
    482  1.11  mycroft 			goto bad;
    483   1.1       pk 		}
    484  1.11  mycroft 		state |= 1;
    485   1.1       pk 	}
    486   1.6  mycroft 	if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) {
    487  1.11  mycroft 		error = isa_dmamap_create(isc->sc_ic, isc->sc_recdrq,
    488  1.14  thorpej 		    isc->sc_rec_maxsize, BUS_DMA_NOWAIT);
    489  1.11  mycroft 		if (error) {
    490  1.11  mycroft 			printf("%s: can't create map for drq %d\n",
    491  1.11  mycroft 			    sc->sc_dev.dv_xname, isc->sc_recdrq);
    492  1.11  mycroft 			goto bad;
    493   1.1       pk 		}
    494  1.11  mycroft 		state |= 2;
    495   1.1       pk 	}
    496   1.1       pk 
    497  1.13    itohy #ifndef AUDIO_NO_POWER_CTL
    498  1.13    itohy 	/* Power-up chip */
    499  1.13    itohy 	if (isc->powerctl)
    500  1.13    itohy 		isc->powerctl(isc->powerarg, flags);
    501  1.13    itohy #endif
    502  1.13    itohy 
    503  1.13    itohy 	/* Init and mute wave output */
    504  1.13    itohy 	ad1848_mute_wave_output(sc, WAVE_MUTE2_INIT, 1);
    505  1.13    itohy 
    506  1.11  mycroft 	error = ad1848_open(sc, flags);
    507  1.13    itohy 	if (error) {
    508  1.13    itohy #ifndef AUDIO_NO_POWER_CTL
    509  1.13    itohy 		if (isc->powerctl)
    510  1.13    itohy 			isc->powerctl(isc->powerarg, 0);
    511  1.13    itohy #endif
    512  1.11  mycroft 		goto bad;
    513  1.13    itohy 	}
    514   1.1       pk 
    515  1.11  mycroft 	DPRINTF(("ad1848_isa_open: opened\n"));
    516  1.11  mycroft 	return (0);
    517   1.1       pk 
    518  1.11  mycroft bad:
    519  1.11  mycroft 	if (state & 1)
    520  1.11  mycroft 		isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq);
    521  1.11  mycroft 	if (state & 2)
    522  1.11  mycroft 		isa_dmamap_destroy(isc->sc_ic, isc->sc_recdrq);
    523   1.1       pk 
    524  1.11  mycroft 	return (error);
    525   1.1       pk }
    526   1.1       pk 
    527   1.1       pk /*
    528   1.1       pk  * Close function is called at splaudio().
    529   1.1       pk  */
    530   1.1       pk void
    531   1.1       pk ad1848_isa_close(addr)
    532   1.1       pk 	void *addr;
    533   1.1       pk {
    534  1.11  mycroft 	struct ad1848_isa_softc *isc = addr;
    535  1.11  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    536  1.11  mycroft 
    537  1.11  mycroft 	ad1848_isa_halt_output(isc);
    538  1.11  mycroft 	ad1848_isa_halt_input(isc);
    539   1.1       pk 
    540  1.17  thorpej 	isc->sc_pintr = isc->sc_rintr = NULL;
    541   1.7  mycroft 
    542  1.11  mycroft 	if (isc->sc_playdrq != -1)
    543  1.11  mycroft 		isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq);
    544  1.11  mycroft 	if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq)
    545  1.11  mycroft 		isa_dmamap_destroy(isc->sc_ic, isc->sc_recdrq);
    546   1.1       pk 
    547   1.1       pk 	DPRINTF(("ad1848_isa_close: stop DMA\n"));
    548  1.11  mycroft 	ad1848_close(sc);
    549  1.13    itohy 
    550  1.13    itohy #ifndef AUDIO_NO_POWER_CTL
    551  1.13    itohy 	/* Power-down chip */
    552  1.13    itohy 	if (isc->powerctl)
    553  1.13    itohy 		isc->powerctl(isc->powerarg, 0);
    554  1.13    itohy #endif
    555   1.1       pk }
    556   1.1       pk 
    557   1.1       pk int
    558   1.6  mycroft ad1848_isa_trigger_input(addr, start, end, blksize, intr, arg, param)
    559   1.1       pk 	void *addr;
    560   1.6  mycroft 	void *start, *end;
    561   1.6  mycroft 	int blksize;
    562   1.1       pk 	void (*intr) __P((void *));
    563   1.1       pk 	void *arg;
    564   1.6  mycroft 	struct audio_params *param;
    565   1.1       pk {
    566   1.1       pk 	struct ad1848_isa_softc *isc = addr;
    567  1.10  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    568   1.6  mycroft 	u_int8_t reg;
    569   1.1       pk 
    570   1.6  mycroft 	isa_dmastart(isc->sc_ic, isc->sc_recdrq, start,
    571   1.8  mycroft 	    (char *)end - (char *)start, NULL,
    572   1.8  mycroft 	    DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
    573   1.1       pk 
    574   1.6  mycroft 	isc->sc_recrun = 1;
    575  1.17  thorpej 	if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) {
    576  1.17  thorpej 		isc->sc_rintr = intr;
    577  1.17  thorpej 		isc->sc_rarg = arg;
    578  1.17  thorpej 	} else {
    579  1.17  thorpej 		isc->sc_pintr = intr;
    580  1.17  thorpej 		isc->sc_parg = arg;
    581  1.17  thorpej 	}
    582   1.1       pk 
    583   1.6  mycroft 	blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1;
    584   1.1       pk 
    585  1.12       rh 	if (sc->mode >= 2) {
    586   1.6  mycroft 		ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff);
    587   1.6  mycroft 		ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8);
    588   1.6  mycroft 	} else {
    589   1.6  mycroft 		ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff);
    590   1.6  mycroft 		ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8);
    591   1.1       pk 	}
    592   1.1       pk 
    593   1.6  mycroft 	reg = ad_read(sc, SP_INTERFACE_CONFIG);
    594   1.6  mycroft 	ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg);
    595   1.1       pk 
    596   1.6  mycroft 	return (0);
    597   1.1       pk }
    598   1.1       pk 
    599   1.1       pk int
    600   1.6  mycroft ad1848_isa_trigger_output(addr, start, end, blksize, intr, arg, param)
    601   1.1       pk 	void *addr;
    602   1.6  mycroft 	void *start, *end;
    603   1.6  mycroft 	int blksize;
    604   1.1       pk 	void (*intr) __P((void *));
    605   1.1       pk 	void *arg;
    606   1.6  mycroft 	struct audio_params *param;
    607   1.1       pk {
    608   1.1       pk 	struct ad1848_isa_softc *isc = addr;
    609  1.10  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    610   1.6  mycroft 	u_int8_t reg;
    611   1.1       pk 
    612   1.6  mycroft 	isa_dmastart(isc->sc_ic, isc->sc_playdrq, start,
    613   1.8  mycroft 	    (char *)end - (char *)start, NULL,
    614   1.8  mycroft 	    DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
    615   1.1       pk 
    616   1.6  mycroft 	isc->sc_playrun = 1;
    617  1.17  thorpej 	isc->sc_pintr = intr;
    618  1.17  thorpej 	isc->sc_parg = arg;
    619   1.1       pk 
    620   1.6  mycroft 	blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1;
    621   1.1       pk 
    622   1.6  mycroft 	ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff);
    623   1.6  mycroft 	ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8);
    624   1.1       pk 
    625  1.13    itohy 	/* Unmute wave output */
    626  1.13    itohy 	ad1848_mute_wave_output(sc, WAVE_MUTE2, 0);
    627  1.13    itohy 
    628   1.6  mycroft 	reg = ad_read(sc, SP_INTERFACE_CONFIG);
    629   1.6  mycroft 	ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg);
    630   1.7  mycroft 
    631   1.7  mycroft 	return (0);
    632   1.7  mycroft }
    633   1.7  mycroft 
    634   1.7  mycroft int
    635   1.7  mycroft ad1848_isa_halt_input(addr)
    636   1.7  mycroft 	void *addr;
    637   1.7  mycroft {
    638   1.7  mycroft 	struct ad1848_isa_softc *isc = addr;
    639  1.10  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    640   1.7  mycroft 
    641   1.7  mycroft 	if (isc->sc_recrun) {
    642   1.7  mycroft 		ad1848_halt_input(sc);
    643   1.7  mycroft 		isa_dmaabort(isc->sc_ic, isc->sc_recdrq);
    644   1.7  mycroft 		isc->sc_recrun = 0;
    645   1.7  mycroft 	}
    646   1.7  mycroft 
    647   1.7  mycroft 	return (0);
    648   1.7  mycroft }
    649   1.7  mycroft 
    650   1.7  mycroft int
    651   1.7  mycroft ad1848_isa_halt_output(addr)
    652   1.7  mycroft 	void *addr;
    653   1.7  mycroft {
    654   1.7  mycroft 	struct ad1848_isa_softc *isc = addr;
    655  1.10  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    656   1.7  mycroft 
    657   1.7  mycroft 	if (isc->sc_playrun) {
    658  1.13    itohy 		/* Mute wave output */
    659  1.13    itohy 		ad1848_mute_wave_output(sc, WAVE_MUTE2, 1);
    660  1.13    itohy 
    661   1.7  mycroft 		ad1848_halt_output(sc);
    662   1.7  mycroft 		isa_dmaabort(isc->sc_ic, isc->sc_playdrq);
    663   1.7  mycroft 		isc->sc_playrun = 0;
    664   1.7  mycroft 	}
    665   1.1       pk 
    666   1.6  mycroft 	return (0);
    667   1.1       pk }
    668   1.1       pk 
    669   1.1       pk int
    670   1.1       pk ad1848_isa_intr(arg)
    671   1.1       pk 	void *arg;
    672   1.1       pk {
    673   1.1       pk 	struct ad1848_isa_softc *isc = arg;
    674  1.10  mycroft 	struct ad1848_softc *sc = &isc->sc_ad1848;
    675   1.1       pk 	int retval = 0;
    676   1.1       pk 	u_char status;
    677   1.1       pk 
    678   1.1       pk 	/* Get intr status */
    679   1.1       pk 	status = ADREAD(sc, AD1848_STATUS);
    680   1.1       pk 
    681   1.1       pk #ifdef AUDIO_DEBUG
    682   1.1       pk 	if (ad1848debug > 1)
    683  1.18  thorpej 		printf("ad1848_isa_intr: pintr=%p rintr=%p status=%x\n",
    684  1.18  thorpej 		    isc->sc_pintr, isc->sc_rintr, status);
    685   1.1       pk #endif
    686   1.1       pk 	isc->sc_interrupts++;
    687   1.1       pk 
    688   1.1       pk 	/* Handle interrupt */
    689  1.17  thorpej 	if ((status & INTERRUPT_STATUS) != 0) {
    690  1.17  thorpej 		if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) {
    691  1.17  thorpej 			status = ad_read(sc, CS_IRQ_STATUS);
    692  1.17  thorpej 			if ((status & CS_IRQ_PI) && isc->sc_pintr != NULL) {
    693  1.17  thorpej 				(*isc->sc_pintr)(isc->sc_parg);
    694  1.17  thorpej 				retval = 1;
    695  1.17  thorpej 			}
    696  1.17  thorpej 			if ((status & CS_IRQ_CI) && isc->sc_rintr != NULL) {
    697  1.17  thorpej 				(*isc->sc_rintr)(isc->sc_rarg);
    698  1.17  thorpej 				retval = 1;
    699  1.17  thorpej 			}
    700  1.17  thorpej 		} else {
    701  1.17  thorpej 			if (isc->sc_pintr != NULL) {
    702  1.17  thorpej 				(*isc->sc_pintr)(isc->sc_parg);
    703  1.17  thorpej 				retval = 1;
    704  1.17  thorpej 			}
    705  1.17  thorpej 		}
    706   1.1       pk 
    707  1.17  thorpej 		/* Clear interrupt */
    708   1.1       pk 		ADWRITE(sc, AD1848_STATUS, 0);
    709  1.17  thorpej 	}
    710   1.1       pk 	return(retval);
    711   1.1       pk }
    712   1.1       pk 
    713   1.1       pk void *
    714   1.5  mycroft ad1848_isa_malloc(addr, direction, size, pool, flags)
    715   1.1       pk 	void *addr;
    716   1.5  mycroft 	int direction;
    717   1.5  mycroft 	size_t size;
    718   1.5  mycroft 	int pool, flags;
    719   1.1       pk {
    720   1.1       pk 	struct ad1848_isa_softc *isc = addr;
    721   1.5  mycroft 	int drq;
    722   1.1       pk 
    723   1.5  mycroft 	if (direction == AUMODE_PLAY)
    724   1.6  mycroft 		drq = isc->sc_playdrq;
    725   1.5  mycroft 	else
    726   1.5  mycroft 		drq = isc->sc_recdrq;
    727   1.5  mycroft 	return (isa_malloc(isc->sc_ic, drq, size, pool, flags));
    728   1.1       pk }
    729   1.1       pk 
    730   1.1       pk void
    731   1.1       pk ad1848_isa_free(addr, ptr, pool)
    732   1.1       pk 	void *addr;
    733   1.1       pk 	void *ptr;
    734   1.1       pk 	int pool;
    735   1.1       pk {
    736   1.1       pk 	isa_free(ptr, pool);
    737   1.1       pk }
    738   1.1       pk 
    739   1.5  mycroft size_t
    740   1.5  mycroft ad1848_isa_round_buffersize(addr, direction, size)
    741   1.1       pk 	void *addr;
    742   1.5  mycroft 	int direction;
    743   1.5  mycroft 	size_t size;
    744   1.1       pk {
    745  1.14  thorpej 	struct ad1848_isa_softc *isc = addr;
    746  1.14  thorpej 	bus_size_t maxsize;
    747  1.14  thorpej 
    748  1.14  thorpej 	if (direction == AUMODE_PLAY)
    749  1.14  thorpej 		maxsize = isc->sc_play_maxsize;
    750  1.14  thorpej 	else if (isc->sc_recdrq == isc->sc_playdrq)
    751  1.14  thorpej 		maxsize = isc->sc_play_maxsize;
    752  1.14  thorpej 	else
    753  1.14  thorpej 		maxsize = isc->sc_rec_maxsize;
    754  1.14  thorpej 
    755  1.14  thorpej 	if (size > maxsize)
    756  1.14  thorpej 		size = maxsize;
    757   1.5  mycroft 	return (size);
    758   1.1       pk }
    759   1.1       pk 
    760  1.15   simonb paddr_t
    761   1.1       pk ad1848_isa_mappage(addr, mem, off, prot)
    762   1.1       pk 	void *addr;
    763   1.1       pk         void *mem;
    764  1.15   simonb         off_t off;
    765   1.1       pk 	int prot;
    766   1.1       pk {
    767   1.1       pk 	return isa_mappage(mem, off, prot);
    768   1.1       pk }
    769   1.1       pk 
    770   1.1       pk int
    771   1.1       pk ad1848_isa_get_props(addr)
    772   1.1       pk 	void *addr;
    773   1.1       pk {
    774   1.1       pk 	struct ad1848_isa_softc *isc = addr;
    775   1.1       pk 
    776   1.1       pk 	return (AUDIO_PROP_MMAP |
    777   1.6  mycroft 		(isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0));
    778   1.1       pk }
    779