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ad1848_isa.c revision 1.29.4.1
      1  1.29.4.1     yamt /*	$NetBSD: ad1848_isa.c,v 1.29.4.1 2007/10/27 11:31:20 yamt Exp $	*/
      2       1.1       pk 
      3       1.7  mycroft /*-
      4       1.7  mycroft  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      5       1.7  mycroft  * All rights reserved.
      6       1.7  mycroft  *
      7       1.7  mycroft  * This code is derived from software contributed to The NetBSD Foundation
      8       1.7  mycroft  * by Ken Hornstein and John Kohl.
      9       1.7  mycroft  *
     10       1.7  mycroft  * Redistribution and use in source and binary forms, with or without
     11       1.7  mycroft  * modification, are permitted provided that the following conditions
     12       1.7  mycroft  * are met:
     13       1.7  mycroft  * 1. Redistributions of source code must retain the above copyright
     14       1.7  mycroft  *    notice, this list of conditions and the following disclaimer.
     15       1.7  mycroft  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.7  mycroft  *    notice, this list of conditions and the following disclaimer in the
     17       1.7  mycroft  *    documentation and/or other materials provided with the distribution.
     18       1.7  mycroft  * 3. All advertising materials mentioning features or use of this software
     19       1.7  mycroft  *    must display the following acknowledgement:
     20      1.29    perry  *        This product includes software developed by the NetBSD
     21       1.7  mycroft  *	  Foundation, Inc. and its contributors.
     22      1.29    perry  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23      1.29    perry  *    contributors may be used to endorse or promote products derived
     24       1.7  mycroft  *    from this software without specific prior written permission.
     25       1.7  mycroft  *
     26       1.7  mycroft  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.7  mycroft  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.7  mycroft  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.7  mycroft  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.7  mycroft  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.7  mycroft  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.7  mycroft  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.7  mycroft  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.7  mycroft  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.7  mycroft  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.7  mycroft  * POSSIBILITY OF SUCH DAMAGE.
     37       1.7  mycroft  */
     38       1.1       pk /*
     39       1.1       pk  * Copyright (c) 1994 John Brezak
     40       1.1       pk  * Copyright (c) 1991-1993 Regents of the University of California.
     41       1.1       pk  * All rights reserved.
     42       1.1       pk  *
     43       1.1       pk  * Redistribution and use in source and binary forms, with or without
     44       1.1       pk  * modification, are permitted provided that the following conditions
     45       1.1       pk  * are met:
     46       1.1       pk  * 1. Redistributions of source code must retain the above copyright
     47       1.1       pk  *    notice, this list of conditions and the following disclaimer.
     48       1.1       pk  * 2. Redistributions in binary form must reproduce the above copyright
     49       1.1       pk  *    notice, this list of conditions and the following disclaimer in the
     50       1.1       pk  *    documentation and/or other materials provided with the distribution.
     51       1.1       pk  * 3. All advertising materials mentioning features or use of this software
     52       1.1       pk  *    must display the following acknowledgement:
     53       1.1       pk  *	This product includes software developed by the Computer Systems
     54       1.1       pk  *	Engineering Group at Lawrence Berkeley Laboratory.
     55       1.1       pk  * 4. Neither the name of the University nor of the Laboratory may be used
     56       1.1       pk  *    to endorse or promote products derived from this software without
     57       1.1       pk  *    specific prior written permission.
     58       1.1       pk  *
     59       1.1       pk  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     60       1.1       pk  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     61       1.1       pk  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     62       1.1       pk  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     63       1.1       pk  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     64       1.1       pk  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     65       1.1       pk  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     66       1.1       pk  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     67       1.1       pk  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     68       1.1       pk  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     69       1.1       pk  * SUCH DAMAGE.
     70       1.1       pk  *
     71       1.1       pk  */
     72       1.1       pk 
     73       1.1       pk /*
     74       1.1       pk  * Copyright by Hannu Savolainen 1994
     75       1.1       pk  *
     76       1.1       pk  * Redistribution and use in source and binary forms, with or without
     77       1.1       pk  * modification, are permitted provided that the following conditions are
     78       1.1       pk  * met: 1. Redistributions of source code must retain the above copyright
     79       1.1       pk  * notice, this list of conditions and the following disclaimer. 2.
     80       1.1       pk  * Redistributions in binary form must reproduce the above copyright notice,
     81       1.1       pk  * this list of conditions and the following disclaimer in the documentation
     82       1.1       pk  * and/or other materials provided with the distribution.
     83       1.1       pk  *
     84       1.1       pk  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
     85       1.1       pk  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     86       1.1       pk  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     87       1.1       pk  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     88       1.1       pk  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     89       1.1       pk  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     90       1.1       pk  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
     91       1.1       pk  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     92       1.1       pk  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     93       1.1       pk  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     94       1.1       pk  * SUCH DAMAGE.
     95       1.1       pk  *
     96       1.1       pk  */
     97       1.1       pk /*
     98       1.1       pk  * Portions of this code are from the VOXware support for the ad1848
     99       1.1       pk  * by Hannu Savolainen <hannu (at) voxware.pp.fi>
    100       1.1       pk  *
    101       1.1       pk  * Portions also supplied from the SoundBlaster driver for NetBSD.
    102       1.1       pk  */
    103      1.20    lukem 
    104      1.20    lukem #include <sys/cdefs.h>
    105  1.29.4.1     yamt __KERNEL_RCSID(0, "$NetBSD: ad1848_isa.c,v 1.29.4.1 2007/10/27 11:31:20 yamt Exp $");
    106       1.1       pk 
    107       1.1       pk #include <sys/param.h>
    108       1.1       pk #include <sys/systm.h>
    109       1.1       pk #include <sys/errno.h>
    110       1.1       pk #include <sys/ioctl.h>
    111       1.1       pk #include <sys/syslog.h>
    112       1.1       pk #include <sys/device.h>
    113       1.1       pk #include <sys/proc.h>
    114       1.1       pk #include <sys/buf.h>
    115       1.1       pk 
    116  1.29.4.1     yamt #include <sys/cpu.h>
    117  1.29.4.1     yamt #include <sys/bus.h>
    118       1.1       pk 
    119       1.1       pk #include <sys/audioio.h>
    120       1.1       pk 
    121       1.1       pk #include <dev/audio_if.h>
    122       1.1       pk #include <dev/auconv.h>
    123       1.1       pk 
    124       1.1       pk #include <dev/isa/isavar.h>
    125       1.1       pk #include <dev/isa/isadmavar.h>
    126       1.1       pk 
    127       1.1       pk #include <dev/ic/ad1848reg.h>
    128       1.1       pk #include <dev/ic/cs4231reg.h>
    129      1.12       rh #include <dev/ic/cs4237reg.h>
    130       1.1       pk #include <dev/isa/ad1848var.h>
    131       1.1       pk #include <dev/isa/cs4231var.h>
    132       1.1       pk 
    133       1.1       pk #ifdef AUDIO_DEBUG
    134       1.1       pk #define DPRINTF(x)	if (ad1848debug) printf x
    135       1.1       pk extern int	ad1848debug;
    136       1.1       pk #else
    137       1.1       pk #define DPRINTF(x)
    138       1.1       pk #endif
    139       1.1       pk 
    140      1.28     kent static int ad1848_isa_read( struct ad1848_softc *, int);
    141      1.28     kent static void ad1848_isa_write( struct ad1848_softc *, int, int);
    142       1.1       pk 
    143       1.1       pk int
    144      1.28     kent ad1848_isa_read(struct ad1848_softc *sc, int index)
    145       1.1       pk {
    146      1.28     kent 
    147      1.28     kent 	return bus_space_read_1(sc->sc_iot, sc->sc_ioh, index);
    148       1.1       pk }
    149       1.1       pk 
    150       1.1       pk void
    151      1.28     kent ad1848_isa_write(struct ad1848_softc *sc, int index, int value)
    152       1.1       pk {
    153      1.28     kent 
    154      1.11  mycroft 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, index, value);
    155       1.1       pk }
    156       1.1       pk 
    157       1.1       pk /*
    158       1.1       pk  * Map and probe for the ad1848 chip
    159       1.1       pk  */
    160       1.1       pk int
    161      1.28     kent ad1848_isa_mapprobe(struct ad1848_isa_softc *isc, int iobase)
    162       1.1       pk {
    163      1.28     kent 	struct ad1848_softc *sc;
    164       1.1       pk 
    165      1.28     kent 	sc = &isc->sc_ad1848;
    166       1.1       pk 	if (!AD1848_BASE_VALID(iobase)) {
    167       1.1       pk #ifdef AUDIO_DEBUG
    168       1.1       pk 		printf("ad1848: configured iobase %04x invalid\n", iobase);
    169       1.1       pk #endif
    170       1.1       pk 		return 0;
    171       1.1       pk 	}
    172       1.1       pk 
    173       1.1       pk 	/* Map the AD1848 ports */
    174       1.1       pk 	if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh))
    175       1.1       pk 		return 0;
    176       1.1       pk 
    177       1.1       pk 	if (!ad1848_isa_probe(isc)) {
    178       1.1       pk 		bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
    179       1.1       pk 		return 0;
    180       1.1       pk 	} else
    181       1.1       pk 		return 1;
    182       1.1       pk }
    183       1.1       pk 
    184       1.1       pk /*
    185       1.1       pk  * Probe for the ad1848 chip
    186       1.1       pk  */
    187       1.1       pk int
    188      1.28     kent ad1848_isa_probe(struct ad1848_isa_softc *isc)
    189       1.1       pk {
    190      1.28     kent 	struct ad1848_softc *sc;
    191       1.1       pk 	u_char tmp, tmp1 = 0xff, tmp2 = 0xff;
    192      1.19    itohy 	int i, t;
    193       1.1       pk 
    194      1.28     kent 	sc = &isc->sc_ad1848;
    195       1.1       pk 	sc->sc_readreg = ad1848_isa_read;
    196       1.1       pk 	sc->sc_writereg = ad1848_isa_write;
    197       1.1       pk 
    198       1.1       pk 	/* Is there an ad1848 chip ? */
    199       1.1       pk 	sc->MCE_bit = MODE_CHANGE_ENABLE;
    200       1.1       pk 	sc->mode = 1;	/* MODE 1 = original ad1848/ad1846/cs4248 */
    201       1.1       pk 
    202       1.1       pk 	/*
    203       1.1       pk 	 * Check that the I/O address is in use.
    204       1.1       pk 	 *
    205       1.1       pk 	 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the
    206       1.1       pk 	 * chip has performed its power-on initialization. Just assume
    207       1.1       pk 	 * this has happened before the OS is starting.
    208       1.1       pk 	 *
    209       1.1       pk 	 * If the I/O address is unused, inb() typically returns 0xff.
    210       1.1       pk 	 */
    211       1.1       pk 	tmp = ADREAD(sc, AD1848_IADDR);
    212       1.1       pk 	if (tmp & SP_IN_INIT) { /* Not a AD1848 */
    213       1.1       pk 		DPRINTF(("ad_detect_A %x\n", tmp));
    214       1.1       pk 		goto bad;
    215       1.1       pk 	}
    216       1.1       pk 
    217       1.1       pk 	/*
    218       1.1       pk 	 * Test if it's possible to change contents of the indirect registers.
    219       1.9  mycroft 	 * Registers 0 and 1 are ADC volume registers.  The bit 0x10 is read
    220       1.9  mycroft 	 * only so try to avoid using it.  The bit 0x20 is the mic preamp
    221       1.9  mycroft 	 * enable; on some chips it is always the same in both registers, so
    222       1.9  mycroft 	 * we avoid tests where they are different.
    223       1.1       pk 	 */
    224       1.9  mycroft 	ad_write(sc, 0, 0x8a);
    225       1.1       pk 	ad_write(sc, 1, 0x45);	/* 0x55 with bit 0x10 clear */
    226       1.9  mycroft 	tmp1 = ad_read(sc, 0);
    227       1.9  mycroft 	tmp2 = ad_read(sc, 1);
    228       1.1       pk 
    229       1.9  mycroft 	if (tmp1 != 0x8a || tmp2 != 0x45) {
    230       1.1       pk 		DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2));
    231       1.1       pk 		goto bad;
    232       1.1       pk 	}
    233       1.1       pk 
    234       1.9  mycroft 	ad_write(sc, 0, 0x65);
    235       1.1       pk 	ad_write(sc, 1, 0xaa);
    236       1.9  mycroft 	tmp1 = ad_read(sc, 0);
    237       1.9  mycroft 	tmp2 = ad_read(sc, 1);
    238       1.1       pk 
    239       1.9  mycroft 	if (tmp1 != 0x65 || tmp2 != 0xaa) {
    240       1.1       pk 		DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2));
    241       1.1       pk 		goto bad;
    242       1.1       pk 	}
    243       1.1       pk 
    244       1.1       pk 	/*
    245       1.1       pk 	 * The indirect register I12 has some read only bits. Lets
    246       1.1       pk 	 * try to change them.
    247       1.1       pk 	 */
    248       1.1       pk 	tmp = ad_read(sc, SP_MISC_INFO);
    249       1.1       pk 	ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f);
    250       1.1       pk 
    251      1.19    itohy 	/* Here, AD1845 may sometimes be busy.  Wait til it becomes ready. */
    252      1.19    itohy 	for (t = 0; t < 100000 && ADREAD(sc, AD1848_IADDR) & SP_IN_INIT; t++)
    253      1.19    itohy 		;
    254      1.19    itohy #ifdef AUDIO_DEBUG
    255      1.19    itohy 	if (t)
    256      1.19    itohy 		DPRINTF(("ad1848_isa_probe: t %d\n", t));
    257      1.19    itohy #endif
    258      1.19    itohy 
    259       1.1       pk 	if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) {
    260       1.1       pk 		DPRINTF(("ad_detect_D (%x)\n", tmp1));
    261       1.1       pk 		goto bad;
    262       1.1       pk 	}
    263       1.1       pk 
    264       1.1       pk 	/*
    265       1.1       pk 	 * MSB and 4 LSBs of the reg I12 tell the chip revision.
    266       1.1       pk 	 *
    267       1.1       pk 	 * A preliminary version of the AD1846 data sheet stated that it
    268       1.1       pk 	 * used an ID field of 0x0B.  The current version, however,
    269       1.1       pk 	 * states that the AD1846 uses ID 0x0A, just like the AD1848K.
    270       1.1       pk 	 *
    271       1.1       pk 	 * this switch statement will need updating as newer clones arrive....
    272       1.1       pk 	 */
    273       1.1       pk 	switch (tmp1 & 0x8f) {
    274       1.1       pk 	case 0x09:
    275       1.1       pk 		sc->chip_name = "AD1848J";
    276       1.1       pk 		break;
    277       1.1       pk 	case 0x0A:
    278       1.1       pk 		sc->chip_name = "AD1848K";
    279       1.1       pk 		break;
    280       1.1       pk #if 0	/* See above */
    281       1.1       pk 	case 0x0B:
    282       1.1       pk 		sc->chip_name = "AD1846";
    283       1.1       pk 		break;
    284       1.1       pk #endif
    285       1.1       pk 	case 0x81:
    286       1.1       pk 		sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */
    287       1.1       pk 		break;
    288       1.1       pk 	case 0x89:
    289       1.1       pk 		sc->chip_name = "CS4248";
    290       1.1       pk 		break;
    291       1.1       pk 	case 0x8A:
    292       1.1       pk 		sc->chip_name = "broken"; /* CS4231/AD1845; see below */
    293       1.1       pk 		break;
    294       1.1       pk 	default:
    295       1.1       pk 		sc->chip_name = "unknown";
    296       1.1       pk 		DPRINTF(("ad1848: unknown codec version 0x%02x\n",
    297       1.1       pk 			 tmp1 & 0x8f));
    298       1.1       pk 		break;
    299       1.1       pk 	}
    300       1.1       pk 
    301       1.1       pk 	/*
    302       1.1       pk 	 * The original AD1848/CS4248 has just 16 indirect registers. This
    303       1.1       pk 	 * means that I0 and I16 should return the same value (etc.).
    304       1.1       pk 	 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test
    305       1.1       pk 	 * fails with CS4231, AD1845, etc.
    306       1.1       pk 	 */
    307       1.1       pk 	ad_write(sc, SP_MISC_INFO, 0);	/* Mode2 = disabled */
    308       1.1       pk 
    309       1.1       pk 	for (i = 0; i < 16; i++)
    310       1.1       pk 		if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) {
    311       1.9  mycroft 			if (i != SP_TEST_AND_INIT) {
    312       1.9  mycroft 				DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2));
    313       1.9  mycroft 				goto bad;
    314       1.9  mycroft 			}
    315       1.1       pk 		}
    316       1.1       pk 
    317       1.1       pk 	/*
    318       1.1       pk 	 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit
    319       1.1       pk 	 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845.
    320       1.1       pk 	 */
    321       1.1       pk 	ad_write(sc, SP_MISC_INFO, MODE2);	/* Set mode2, clear 0x80 */
    322       1.1       pk 
    323       1.1       pk 	tmp1 = ad_read(sc, SP_MISC_INFO);
    324       1.1       pk 	if ((tmp1 & 0xc0) == (0x80 | MODE2)) {
    325       1.1       pk 		/*
    326       1.1       pk 		 *      CS4231 or AD1845 detected - is it?
    327       1.1       pk 		 *
    328       1.1       pk 		 *	Verify that setting I2 doesn't change I18.
    329       1.1       pk 		 */
    330       1.1       pk 		ad_write(sc, 18, 0x88); /* Set I18 to known value */
    331       1.1       pk 
    332       1.1       pk 		ad_write(sc, 2, 0x45);
    333       1.1       pk 		if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */
    334       1.1       pk 			ad_write(sc, 2, 0xaa);
    335       1.1       pk 			if ((tmp2 = ad_read(sc, 18)) == 0xaa) {     /* Rotten bits? */
    336       1.1       pk 				DPRINTF(("ad_detect_H(%x)\n", tmp2));
    337       1.1       pk 				goto bad;
    338       1.1       pk 			}
    339       1.1       pk 
    340      1.12       rh 			sc->mode = 2;
    341      1.12       rh 
    342       1.1       pk 			/*
    343       1.1       pk 			 *  It's a CS4231, or another clone with 32 registers.
    344       1.1       pk 			 *  Let's find out which by checking I25.
    345       1.1       pk 			 */
    346       1.1       pk 			if ((tmp1 & 0x8f) == 0x8a) {
    347       1.1       pk 				tmp1 = ad_read(sc, CS_VERSION_ID);
    348       1.1       pk 				switch (tmp1 & 0xe7) {
    349       1.1       pk 				case 0xA0:
    350       1.1       pk 					sc->chip_name = "CS4231A";
    351       1.1       pk 					break;
    352       1.1       pk 				case 0x80:
    353       1.1       pk 					/*  XXX I25 no good, AD1845 same as CS4231 */
    354      1.19    itohy 					/*
    355      1.19    itohy 					 * XXX
    356      1.19    itohy 					 * This test is correct only after reset
    357      1.19    itohy 					 */
    358      1.19    itohy 					if (ad_read(sc, 17) & 0xf0) {
    359      1.19    itohy 						sc->chip_name = "AD1845";
    360      1.19    itohy 						sc->is_ad1845 = 1;
    361      1.19    itohy 					} else
    362      1.19    itohy 						sc->chip_name = "CS4231";
    363       1.1       pk 					break;
    364       1.1       pk 				case 0x82:
    365       1.1       pk 					sc->chip_name = "CS4232";
    366       1.1       pk 					break;
    367       1.1       pk 				case 0x03:
    368       1.4  hannken 				case 0x83:
    369      1.12       rh 					sc->chip_name = "CS4236";
    370      1.12       rh 
    371      1.12       rh 					/*
    372      1.12       rh 					 * Try to switch to mode3 (CS4236B or
    373      1.12       rh 					 * CS4237B) by setting CMS to 3.  A
    374      1.12       rh 					 * plain CS4236 will not react to
    375      1.12       rh 					 * LLBM settings.
    376      1.12       rh 					 */
    377      1.12       rh 					ad_write(sc, SP_MISC_INFO, MODE3);
    378      1.12       rh 
    379      1.12       rh 					tmp1 = ad_read(sc, CS_LEFT_LINE_CONTROL);
    380      1.12       rh 					ad_write(sc, CS_LEFT_LINE_CONTROL, 0xe0);
    381      1.12       rh 					tmp2 = ad_read(sc, CS_LEFT_LINE_CONTROL);
    382      1.12       rh 					if (tmp2 == 0xe0) {
    383      1.12       rh 						/*
    384      1.12       rh 						 * it's a CS4237B or another
    385      1.12       rh 						 * clone supporting mode 3.
    386      1.12       rh 						 * Let's determine which by
    387      1.12       rh 						 * enabling extended registers
    388      1.12       rh 						 * and checking X25.
    389      1.12       rh 						 */
    390      1.12       rh 						tmp2 = ad_xread(sc, CS_X_CHIP_VERSION);
    391      1.12       rh 						switch (tmp2 & X_CHIP_VERSIONF_CID) {
    392      1.12       rh 						case X_CHIP_CID_CS4236BB:
    393      1.12       rh 							sc->chip_name = "CS4236BrevB";
    394      1.12       rh 							break;
    395      1.12       rh 						case X_CHIP_CID_CS4236B:
    396      1.12       rh 							sc->chip_name = "CS4236B";
    397      1.12       rh 							break;
    398      1.12       rh 						case X_CHIP_CID_CS4237B:
    399      1.12       rh 							sc->chip_name = "CS4237B";
    400      1.12       rh 							break;
    401      1.12       rh 						default:
    402      1.12       rh 							sc->chip_name = "CS4236B compatible";
    403      1.12       rh 							DPRINTF(("cs4236: unknown mode 3 compatible codec, version 0x%02x\n", tmp2));
    404      1.12       rh 							break;
    405      1.12       rh 						}
    406      1.12       rh 						sc->mode = 3;
    407      1.12       rh 					}
    408      1.12       rh 
    409      1.12       rh 					/* restore volume control information */
    410      1.12       rh 					ad_write(sc, CS_LEFT_LINE_CONTROL, tmp1);
    411       1.1       pk 					break;
    412       1.1       pk 				}
    413       1.1       pk 			}
    414       1.1       pk 		}
    415       1.1       pk 	}
    416       1.1       pk 
    417       1.1       pk 	/* Wait for 1848 to init */
    418      1.28     kent 	while (ADREAD(sc, AD1848_IADDR) & SP_IN_INIT)
    419       1.1       pk 		;
    420       1.1       pk 
    421       1.1       pk 	/* Wait for 1848 to autocal */
    422       1.1       pk 	ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);
    423      1.28     kent 	while (ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG)
    424       1.1       pk 		;
    425       1.1       pk 
    426       1.1       pk 	return 1;
    427       1.9  mycroft bad:
    428       1.1       pk 	return 0;
    429       1.1       pk }
    430       1.1       pk 
    431       1.1       pk /* Unmap the I/O ports */
    432       1.1       pk void
    433      1.28     kent ad1848_isa_unmap(struct ad1848_isa_softc *isc)
    434       1.1       pk {
    435      1.28     kent 	struct ad1848_softc *sc;
    436      1.28     kent 
    437      1.28     kent 	sc = &isc->sc_ad1848;
    438       1.1       pk 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
    439       1.1       pk }
    440       1.1       pk 
    441       1.1       pk /*
    442       1.1       pk  * Attach hardware to driver, attach hardware driver to audio
    443       1.1       pk  * pseudo-device driver .
    444       1.1       pk  */
    445       1.1       pk void
    446      1.28     kent ad1848_isa_attach(struct ad1848_isa_softc *isc)
    447       1.1       pk {
    448      1.28     kent 	struct ad1848_softc *sc;
    449      1.23     fvdl 	int error;
    450       1.1       pk 
    451      1.28     kent 	sc = &isc->sc_ad1848;
    452       1.1       pk 	sc->sc_readreg = ad1848_isa_read;
    453       1.1       pk 	sc->sc_writereg = ad1848_isa_write;
    454       1.1       pk 
    455      1.23     fvdl 	if (isc->sc_playdrq != -1) {
    456      1.14  thorpej 		isc->sc_play_maxsize = isa_dmamaxsize(isc->sc_ic,
    457      1.14  thorpej 		    isc->sc_playdrq);
    458      1.23     fvdl 		error = isa_dmamap_create(isc->sc_ic, isc->sc_playdrq,
    459      1.23     fvdl 		    isc->sc_play_maxsize, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW);
    460      1.23     fvdl 		if (error) {
    461      1.23     fvdl 			printf("%s: can't create map for drq %d\n",
    462      1.23     fvdl 			    sc->sc_dev.dv_xname, isc->sc_playdrq);
    463      1.23     fvdl 			return;
    464      1.23     fvdl 		}
    465      1.23     fvdl 	}
    466      1.23     fvdl 	if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) {
    467      1.14  thorpej 		isc->sc_rec_maxsize = isa_dmamaxsize(isc->sc_ic,
    468      1.14  thorpej 		    isc->sc_recdrq);
    469      1.23     fvdl 		error = isa_dmamap_create(isc->sc_ic, isc->sc_recdrq,
    470      1.23     fvdl 		    isc->sc_rec_maxsize, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW);
    471      1.23     fvdl 		if (error) {
    472      1.23     fvdl 			printf("%s: can't create map for drq %d\n",
    473      1.23     fvdl 			    sc->sc_dev.dv_xname, isc->sc_recdrq);
    474      1.23     fvdl 			isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq);
    475      1.23     fvdl 			return;
    476      1.23     fvdl 		}
    477      1.23     fvdl 	}
    478      1.14  thorpej 
    479      1.11  mycroft 	ad1848_attach(sc);
    480      1.11  mycroft }
    481      1.11  mycroft 
    482      1.11  mycroft int
    483      1.28     kent ad1848_isa_open(void *addr, int flags)
    484      1.11  mycroft {
    485      1.28     kent 	struct ad1848_isa_softc *isc;
    486      1.28     kent 	struct ad1848_softc *sc;
    487      1.11  mycroft 	int error, state;
    488      1.11  mycroft 
    489      1.28     kent 	isc = addr;
    490      1.28     kent 	sc = &isc->sc_ad1848;
    491      1.11  mycroft 	DPRINTF(("ad1848_isa_open: sc=%p\n", isc));
    492      1.11  mycroft 	state = 0;
    493       1.1       pk 
    494       1.6  mycroft 	if (isc->sc_playdrq != -1) {
    495      1.23     fvdl 		error = isa_drq_alloc(isc->sc_ic, isc->sc_playdrq);
    496      1.23     fvdl 		if (error != 0)
    497      1.23     fvdl 			return EBUSY;
    498      1.11  mycroft 		state |= 1;
    499       1.1       pk 	}
    500       1.6  mycroft 	if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) {
    501      1.23     fvdl 		error = isa_drq_alloc(isc->sc_ic, isc->sc_recdrq);
    502      1.23     fvdl 		if (error != 0)
    503      1.11  mycroft 			goto bad;
    504      1.11  mycroft 		state |= 2;
    505       1.1       pk 	}
    506       1.1       pk 
    507      1.13    itohy #ifndef AUDIO_NO_POWER_CTL
    508      1.13    itohy 	/* Power-up chip */
    509      1.13    itohy 	if (isc->powerctl)
    510      1.13    itohy 		isc->powerctl(isc->powerarg, flags);
    511      1.13    itohy #endif
    512      1.13    itohy 
    513      1.13    itohy 	/* Init and mute wave output */
    514      1.13    itohy 	ad1848_mute_wave_output(sc, WAVE_MUTE2_INIT, 1);
    515      1.13    itohy 
    516      1.11  mycroft 	error = ad1848_open(sc, flags);
    517      1.13    itohy 	if (error) {
    518      1.13    itohy #ifndef AUDIO_NO_POWER_CTL
    519      1.13    itohy 		if (isc->powerctl)
    520      1.13    itohy 			isc->powerctl(isc->powerarg, 0);
    521      1.13    itohy #endif
    522      1.11  mycroft 		goto bad;
    523      1.13    itohy 	}
    524       1.1       pk 
    525      1.11  mycroft 	DPRINTF(("ad1848_isa_open: opened\n"));
    526      1.28     kent 	return 0;
    527       1.1       pk 
    528      1.11  mycroft bad:
    529      1.11  mycroft 	if (state & 1)
    530      1.23     fvdl 		isa_drq_free(isc->sc_ic, isc->sc_playdrq);
    531      1.11  mycroft 	if (state & 2)
    532      1.23     fvdl 		isa_drq_free(isc->sc_ic, isc->sc_recdrq);
    533       1.1       pk 
    534      1.28     kent 	return error;
    535       1.1       pk }
    536       1.1       pk 
    537       1.1       pk /*
    538       1.1       pk  * Close function is called at splaudio().
    539       1.1       pk  */
    540       1.1       pk void
    541      1.28     kent ad1848_isa_close(void *addr)
    542       1.1       pk {
    543      1.28     kent 	struct ad1848_isa_softc *isc;
    544      1.28     kent 	struct ad1848_softc *sc;
    545      1.11  mycroft 
    546       1.1       pk 	DPRINTF(("ad1848_isa_close: stop DMA\n"));
    547      1.28     kent 	isc = addr;
    548      1.28     kent 	sc = &isc->sc_ad1848;
    549      1.11  mycroft 	ad1848_close(sc);
    550      1.13    itohy 
    551      1.13    itohy #ifndef AUDIO_NO_POWER_CTL
    552      1.13    itohy 	/* Power-down chip */
    553      1.13    itohy 	if (isc->powerctl)
    554      1.13    itohy 		isc->powerctl(isc->powerarg, 0);
    555      1.13    itohy #endif
    556      1.26  mycroft 
    557      1.26  mycroft 	if (isc->sc_playdrq != -1)
    558      1.26  mycroft 		isa_drq_free(isc->sc_ic, isc->sc_playdrq);
    559      1.26  mycroft 	if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq)
    560      1.26  mycroft 		isa_drq_free(isc->sc_ic, isc->sc_recdrq);
    561       1.1       pk }
    562       1.1       pk 
    563       1.1       pk int
    564      1.28     kent ad1848_isa_trigger_input(
    565      1.28     kent 	void *addr,
    566      1.28     kent 	void *start, void *end,
    567      1.28     kent 	int blksize,
    568      1.28     kent 	void (*intr)(void *),
    569      1.28     kent 	void *arg,
    570      1.28     kent 	const audio_params_t *param)
    571      1.28     kent {
    572      1.28     kent 	struct ad1848_isa_softc *isc;
    573      1.28     kent 	struct ad1848_softc *sc;
    574      1.28     kent 	uint8_t reg;
    575       1.1       pk 
    576      1.28     kent 	isc = addr;
    577      1.28     kent 	sc = &isc->sc_ad1848;
    578       1.6  mycroft 	isa_dmastart(isc->sc_ic, isc->sc_recdrq, start,
    579       1.8  mycroft 	    (char *)end - (char *)start, NULL,
    580       1.8  mycroft 	    DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
    581       1.1       pk 
    582       1.6  mycroft 	isc->sc_recrun = 1;
    583      1.17  thorpej 	if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) {
    584      1.17  thorpej 		isc->sc_rintr = intr;
    585      1.17  thorpej 		isc->sc_rarg = arg;
    586      1.17  thorpej 	} else {
    587      1.17  thorpej 		isc->sc_pintr = intr;
    588      1.17  thorpej 		isc->sc_parg = arg;
    589      1.17  thorpej 	}
    590       1.1       pk 
    591      1.27     kent 	/*
    592      1.21    itohy 	 * Calculate number of transfers.
    593      1.21    itohy 	 * Note that ADPCM is always transferred 4 bytes at at a time.
    594      1.21    itohy 	 */
    595      1.21    itohy 	blksize = (param->encoding == AUDIO_ENCODING_ADPCM) ? blksize / 4 - 1 :
    596      1.27     kent 	    (blksize * 8) / (param->precision * param->channels) - 1;
    597       1.1       pk 
    598      1.12       rh 	if (sc->mode >= 2) {
    599       1.6  mycroft 		ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff);
    600       1.6  mycroft 		ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8);
    601       1.6  mycroft 	} else {
    602       1.6  mycroft 		ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff);
    603       1.6  mycroft 		ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8);
    604       1.1       pk 	}
    605       1.1       pk 
    606       1.6  mycroft 	reg = ad_read(sc, SP_INTERFACE_CONFIG);
    607       1.6  mycroft 	ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg);
    608       1.1       pk 
    609      1.28     kent 	return 0;
    610       1.1       pk }
    611       1.1       pk 
    612       1.1       pk int
    613      1.28     kent ad1848_isa_trigger_output(
    614      1.28     kent 	void *addr,
    615      1.28     kent 	void *start, void *end,
    616      1.28     kent 	int blksize,
    617      1.28     kent 	void (*intr)(void *),
    618      1.28     kent 	void *arg,
    619      1.28     kent 	const audio_params_t *param)
    620      1.28     kent {
    621      1.28     kent 	struct ad1848_isa_softc *isc;
    622      1.28     kent 	struct ad1848_softc *sc;
    623      1.28     kent 	uint8_t reg;
    624       1.1       pk 
    625      1.28     kent 	isc = addr;
    626      1.28     kent 	sc = &isc->sc_ad1848;
    627       1.6  mycroft 	isa_dmastart(isc->sc_ic, isc->sc_playdrq, start,
    628       1.8  mycroft 	    (char *)end - (char *)start, NULL,
    629       1.8  mycroft 	    DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
    630       1.1       pk 
    631       1.6  mycroft 	isc->sc_playrun = 1;
    632      1.17  thorpej 	isc->sc_pintr = intr;
    633      1.17  thorpej 	isc->sc_parg = arg;
    634       1.1       pk 
    635      1.27     kent 	/*
    636      1.21    itohy 	 * Calculate number of transfers.
    637      1.21    itohy 	 * Note that ADPCM is always transferred 4 bytes at at a time.
    638      1.21    itohy 	 */
    639      1.21    itohy 	blksize = (param->encoding == AUDIO_ENCODING_ADPCM) ? blksize / 4 - 1 :
    640      1.27     kent 	    (blksize * 8) / (param->precision * param->channels) - 1;
    641       1.1       pk 
    642       1.6  mycroft 	ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff);
    643       1.6  mycroft 	ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8);
    644       1.1       pk 
    645      1.13    itohy 	/* Unmute wave output */
    646      1.13    itohy 	ad1848_mute_wave_output(sc, WAVE_MUTE2, 0);
    647      1.13    itohy 
    648       1.6  mycroft 	reg = ad_read(sc, SP_INTERFACE_CONFIG);
    649       1.6  mycroft 	ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg);
    650       1.7  mycroft 
    651      1.28     kent 	return 0;
    652       1.7  mycroft }
    653       1.7  mycroft 
    654       1.7  mycroft int
    655      1.28     kent ad1848_isa_halt_input(void *addr)
    656       1.7  mycroft {
    657      1.28     kent 	struct ad1848_isa_softc *isc;
    658      1.28     kent 	struct ad1848_softc *sc;
    659       1.7  mycroft 
    660      1.28     kent 	isc = addr;
    661      1.28     kent 	sc = &isc->sc_ad1848;
    662       1.7  mycroft 	if (isc->sc_recrun) {
    663       1.7  mycroft 		ad1848_halt_input(sc);
    664       1.7  mycroft 		isa_dmaabort(isc->sc_ic, isc->sc_recdrq);
    665       1.7  mycroft 		isc->sc_recrun = 0;
    666       1.7  mycroft 	}
    667       1.7  mycroft 
    668      1.28     kent 	return 0;
    669       1.7  mycroft }
    670       1.7  mycroft 
    671       1.7  mycroft int
    672      1.28     kent ad1848_isa_halt_output(void *addr)
    673       1.7  mycroft {
    674      1.28     kent 	struct ad1848_isa_softc *isc;
    675      1.28     kent 	struct ad1848_softc *sc;
    676       1.7  mycroft 
    677      1.28     kent 	isc = addr;
    678      1.28     kent 	sc = &isc->sc_ad1848;
    679       1.7  mycroft 	if (isc->sc_playrun) {
    680      1.13    itohy 		/* Mute wave output */
    681      1.13    itohy 		ad1848_mute_wave_output(sc, WAVE_MUTE2, 1);
    682      1.13    itohy 
    683       1.7  mycroft 		ad1848_halt_output(sc);
    684       1.7  mycroft 		isa_dmaabort(isc->sc_ic, isc->sc_playdrq);
    685       1.7  mycroft 		isc->sc_playrun = 0;
    686       1.7  mycroft 	}
    687       1.1       pk 
    688      1.28     kent 	return 0;
    689       1.1       pk }
    690       1.1       pk 
    691       1.1       pk int
    692      1.28     kent ad1848_isa_intr(void *arg)
    693       1.1       pk {
    694      1.28     kent 	struct ad1848_isa_softc *isc;
    695      1.28     kent 	struct ad1848_softc *sc;
    696      1.28     kent 	int retval;
    697       1.1       pk 	u_char status;
    698       1.1       pk 
    699      1.28     kent 	isc = arg;
    700      1.28     kent 	sc = &isc->sc_ad1848;
    701      1.28     kent 	retval = 0;
    702       1.1       pk 	/* Get intr status */
    703       1.1       pk 	status = ADREAD(sc, AD1848_STATUS);
    704       1.1       pk 
    705       1.1       pk #ifdef AUDIO_DEBUG
    706       1.1       pk 	if (ad1848debug > 1)
    707      1.18  thorpej 		printf("ad1848_isa_intr: pintr=%p rintr=%p status=%x\n",
    708      1.18  thorpej 		    isc->sc_pintr, isc->sc_rintr, status);
    709       1.1       pk #endif
    710       1.1       pk 	isc->sc_interrupts++;
    711       1.1       pk 
    712       1.1       pk 	/* Handle interrupt */
    713      1.17  thorpej 	if ((status & INTERRUPT_STATUS) != 0) {
    714      1.17  thorpej 		if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) {
    715      1.17  thorpej 			status = ad_read(sc, CS_IRQ_STATUS);
    716      1.25  mycroft 			if ((status & CS_IRQ_PI) && isc->sc_playrun) {
    717      1.17  thorpej 				(*isc->sc_pintr)(isc->sc_parg);
    718      1.17  thorpej 				retval = 1;
    719      1.17  thorpej 			}
    720      1.25  mycroft 			if ((status & CS_IRQ_CI) && isc->sc_recrun) {
    721      1.17  thorpej 				(*isc->sc_rintr)(isc->sc_rarg);
    722      1.17  thorpej 				retval = 1;
    723      1.17  thorpej 			}
    724      1.17  thorpej 		} else {
    725      1.25  mycroft 			if (isc->sc_playrun) {
    726      1.17  thorpej 				(*isc->sc_pintr)(isc->sc_parg);
    727      1.17  thorpej 				retval = 1;
    728      1.17  thorpej 			}
    729      1.17  thorpej 		}
    730       1.1       pk 
    731      1.17  thorpej 		/* Clear interrupt */
    732       1.1       pk 		ADWRITE(sc, AD1848_STATUS, 0);
    733      1.17  thorpej 	}
    734      1.28     kent 	return retval;
    735       1.1       pk }
    736       1.1       pk 
    737       1.1       pk void *
    738      1.28     kent ad1848_isa_malloc(
    739      1.28     kent 	void *addr,
    740      1.28     kent 	int direction,
    741      1.28     kent 	size_t size,
    742      1.28     kent 	struct malloc_type *pool,
    743      1.28     kent 	int flags)
    744       1.1       pk {
    745      1.28     kent 	struct ad1848_isa_softc *isc;
    746       1.5  mycroft 	int drq;
    747       1.1       pk 
    748      1.28     kent 	isc = addr;
    749       1.5  mycroft 	if (direction == AUMODE_PLAY)
    750       1.6  mycroft 		drq = isc->sc_playdrq;
    751       1.5  mycroft 	else
    752       1.5  mycroft 		drq = isc->sc_recdrq;
    753      1.28     kent 	return isa_malloc(isc->sc_ic, drq, size, pool, flags);
    754       1.1       pk }
    755       1.1       pk 
    756       1.1       pk void
    757      1.28     kent ad1848_isa_free(void *addr, void *ptr, struct malloc_type *pool)
    758       1.1       pk {
    759      1.28     kent 
    760       1.1       pk 	isa_free(ptr, pool);
    761       1.1       pk }
    762       1.1       pk 
    763       1.5  mycroft size_t
    764      1.28     kent ad1848_isa_round_buffersize(void *addr, int direction, size_t size)
    765       1.1       pk {
    766      1.28     kent 	struct ad1848_isa_softc *isc;
    767      1.14  thorpej 	bus_size_t maxsize;
    768      1.14  thorpej 
    769      1.28     kent 	isc = addr;
    770      1.14  thorpej 	if (direction == AUMODE_PLAY)
    771      1.14  thorpej 		maxsize = isc->sc_play_maxsize;
    772      1.14  thorpej 	else if (isc->sc_recdrq == isc->sc_playdrq)
    773      1.14  thorpej 		maxsize = isc->sc_play_maxsize;
    774      1.14  thorpej 	else
    775      1.14  thorpej 		maxsize = isc->sc_rec_maxsize;
    776      1.14  thorpej 
    777      1.14  thorpej 	if (size > maxsize)
    778      1.14  thorpej 		size = maxsize;
    779      1.28     kent 	return size;
    780       1.1       pk }
    781       1.1       pk 
    782      1.15   simonb paddr_t
    783      1.28     kent ad1848_isa_mappage(void *addr, void *mem, off_t off, int prot)
    784       1.1       pk {
    785       1.1       pk 	return isa_mappage(mem, off, prot);
    786       1.1       pk }
    787       1.1       pk 
    788       1.1       pk int
    789      1.28     kent ad1848_isa_get_props(void *addr)
    790       1.1       pk {
    791      1.28     kent 	struct ad1848_isa_softc *isc;
    792       1.1       pk 
    793      1.28     kent 	isc = addr;
    794      1.28     kent 	return AUDIO_PROP_MMAP |
    795      1.28     kent 		(isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0);
    796       1.1       pk }
    797