ad1848_isa.c revision 1.40 1 1.40 isaki /* $NetBSD: ad1848_isa.c,v 1.40 2019/06/08 08:02:38 isaki Exp $ */
2 1.1 pk
3 1.7 mycroft /*-
4 1.38 jmcneill * Copyright (c) 1999, 2008 The NetBSD Foundation, Inc.
5 1.7 mycroft * All rights reserved.
6 1.7 mycroft *
7 1.7 mycroft * This code is derived from software contributed to The NetBSD Foundation
8 1.7 mycroft * by Ken Hornstein and John Kohl.
9 1.7 mycroft *
10 1.7 mycroft * Redistribution and use in source and binary forms, with or without
11 1.7 mycroft * modification, are permitted provided that the following conditions
12 1.7 mycroft * are met:
13 1.7 mycroft * 1. Redistributions of source code must retain the above copyright
14 1.7 mycroft * notice, this list of conditions and the following disclaimer.
15 1.7 mycroft * 2. Redistributions in binary form must reproduce the above copyright
16 1.7 mycroft * notice, this list of conditions and the following disclaimer in the
17 1.7 mycroft * documentation and/or other materials provided with the distribution.
18 1.7 mycroft *
19 1.7 mycroft * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.7 mycroft * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.7 mycroft * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.7 mycroft * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.7 mycroft * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.7 mycroft * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.7 mycroft * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.7 mycroft * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.7 mycroft * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.7 mycroft * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.7 mycroft * POSSIBILITY OF SUCH DAMAGE.
30 1.7 mycroft */
31 1.1 pk /*
32 1.1 pk * Copyright (c) 1994 John Brezak
33 1.1 pk * Copyright (c) 1991-1993 Regents of the University of California.
34 1.1 pk * All rights reserved.
35 1.1 pk *
36 1.1 pk * Redistribution and use in source and binary forms, with or without
37 1.1 pk * modification, are permitted provided that the following conditions
38 1.1 pk * are met:
39 1.1 pk * 1. Redistributions of source code must retain the above copyright
40 1.1 pk * notice, this list of conditions and the following disclaimer.
41 1.1 pk * 2. Redistributions in binary form must reproduce the above copyright
42 1.1 pk * notice, this list of conditions and the following disclaimer in the
43 1.1 pk * documentation and/or other materials provided with the distribution.
44 1.1 pk * 3. All advertising materials mentioning features or use of this software
45 1.1 pk * must display the following acknowledgement:
46 1.1 pk * This product includes software developed by the Computer Systems
47 1.1 pk * Engineering Group at Lawrence Berkeley Laboratory.
48 1.1 pk * 4. Neither the name of the University nor of the Laboratory may be used
49 1.1 pk * to endorse or promote products derived from this software without
50 1.1 pk * specific prior written permission.
51 1.1 pk *
52 1.1 pk * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 1.1 pk * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 1.1 pk * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 1.1 pk * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 1.1 pk * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 1.1 pk * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 1.1 pk * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 1.1 pk * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 1.1 pk * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 1.1 pk * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62 1.1 pk * SUCH DAMAGE.
63 1.1 pk *
64 1.1 pk */
65 1.1 pk
66 1.1 pk /*
67 1.1 pk * Copyright by Hannu Savolainen 1994
68 1.1 pk *
69 1.1 pk * Redistribution and use in source and binary forms, with or without
70 1.1 pk * modification, are permitted provided that the following conditions are
71 1.1 pk * met: 1. Redistributions of source code must retain the above copyright
72 1.1 pk * notice, this list of conditions and the following disclaimer. 2.
73 1.1 pk * Redistributions in binary form must reproduce the above copyright notice,
74 1.1 pk * this list of conditions and the following disclaimer in the documentation
75 1.1 pk * and/or other materials provided with the distribution.
76 1.1 pk *
77 1.1 pk * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
78 1.1 pk * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
79 1.1 pk * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
80 1.1 pk * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
81 1.1 pk * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
82 1.1 pk * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
83 1.1 pk * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
84 1.1 pk * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
85 1.1 pk * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
86 1.1 pk * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
87 1.1 pk * SUCH DAMAGE.
88 1.1 pk *
89 1.1 pk */
90 1.1 pk /*
91 1.1 pk * Portions of this code are from the VOXware support for the ad1848
92 1.1 pk * by Hannu Savolainen <hannu (at) voxware.pp.fi>
93 1.1 pk *
94 1.1 pk * Portions also supplied from the SoundBlaster driver for NetBSD.
95 1.1 pk */
96 1.20 lukem
97 1.20 lukem #include <sys/cdefs.h>
98 1.40 isaki __KERNEL_RCSID(0, "$NetBSD: ad1848_isa.c,v 1.40 2019/06/08 08:02:38 isaki Exp $");
99 1.1 pk
100 1.1 pk #include <sys/param.h>
101 1.1 pk #include <sys/systm.h>
102 1.1 pk #include <sys/errno.h>
103 1.1 pk #include <sys/ioctl.h>
104 1.1 pk #include <sys/syslog.h>
105 1.1 pk #include <sys/device.h>
106 1.1 pk #include <sys/proc.h>
107 1.1 pk #include <sys/buf.h>
108 1.33 ad #include <sys/cpu.h>
109 1.33 ad #include <sys/bus.h>
110 1.1 pk #include <sys/audioio.h>
111 1.38 jmcneill #include <sys/malloc.h>
112 1.1 pk
113 1.39 isaki #include <dev/audio/audio_if.h>
114 1.1 pk
115 1.1 pk #include <dev/isa/isavar.h>
116 1.1 pk #include <dev/isa/isadmavar.h>
117 1.1 pk
118 1.1 pk #include <dev/ic/ad1848reg.h>
119 1.1 pk #include <dev/ic/cs4231reg.h>
120 1.12 rh #include <dev/ic/cs4237reg.h>
121 1.1 pk #include <dev/isa/ad1848var.h>
122 1.1 pk #include <dev/isa/cs4231var.h>
123 1.1 pk
124 1.1 pk #ifdef AUDIO_DEBUG
125 1.1 pk #define DPRINTF(x) if (ad1848debug) printf x
126 1.1 pk extern int ad1848debug;
127 1.1 pk #else
128 1.1 pk #define DPRINTF(x)
129 1.1 pk #endif
130 1.1 pk
131 1.28 kent static int ad1848_isa_read( struct ad1848_softc *, int);
132 1.28 kent static void ad1848_isa_write( struct ad1848_softc *, int, int);
133 1.1 pk
134 1.1 pk int
135 1.28 kent ad1848_isa_read(struct ad1848_softc *sc, int index)
136 1.1 pk {
137 1.28 kent
138 1.28 kent return bus_space_read_1(sc->sc_iot, sc->sc_ioh, index);
139 1.1 pk }
140 1.1 pk
141 1.1 pk void
142 1.28 kent ad1848_isa_write(struct ad1848_softc *sc, int index, int value)
143 1.1 pk {
144 1.28 kent
145 1.11 mycroft bus_space_write_1(sc->sc_iot, sc->sc_ioh, index, value);
146 1.1 pk }
147 1.1 pk
148 1.1 pk /*
149 1.1 pk * Map and probe for the ad1848 chip
150 1.1 pk */
151 1.1 pk int
152 1.28 kent ad1848_isa_mapprobe(struct ad1848_isa_softc *isc, int iobase)
153 1.1 pk {
154 1.28 kent struct ad1848_softc *sc;
155 1.1 pk
156 1.28 kent sc = &isc->sc_ad1848;
157 1.1 pk if (!AD1848_BASE_VALID(iobase)) {
158 1.1 pk #ifdef AUDIO_DEBUG
159 1.1 pk printf("ad1848: configured iobase %04x invalid\n", iobase);
160 1.1 pk #endif
161 1.1 pk return 0;
162 1.1 pk }
163 1.1 pk
164 1.1 pk /* Map the AD1848 ports */
165 1.1 pk if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh))
166 1.1 pk return 0;
167 1.1 pk
168 1.1 pk if (!ad1848_isa_probe(isc)) {
169 1.1 pk bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
170 1.1 pk return 0;
171 1.1 pk } else
172 1.1 pk return 1;
173 1.1 pk }
174 1.1 pk
175 1.1 pk /*
176 1.1 pk * Probe for the ad1848 chip
177 1.1 pk */
178 1.1 pk int
179 1.28 kent ad1848_isa_probe(struct ad1848_isa_softc *isc)
180 1.1 pk {
181 1.28 kent struct ad1848_softc *sc;
182 1.1 pk u_char tmp, tmp1 = 0xff, tmp2 = 0xff;
183 1.19 itohy int i, t;
184 1.1 pk
185 1.28 kent sc = &isc->sc_ad1848;
186 1.1 pk sc->sc_readreg = ad1848_isa_read;
187 1.1 pk sc->sc_writereg = ad1848_isa_write;
188 1.1 pk
189 1.1 pk /* Is there an ad1848 chip ? */
190 1.1 pk sc->MCE_bit = MODE_CHANGE_ENABLE;
191 1.1 pk sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */
192 1.1 pk
193 1.1 pk /*
194 1.1 pk * Check that the I/O address is in use.
195 1.1 pk *
196 1.1 pk * The SP_IN_INIT bit of the base I/O port is known to be 0 after the
197 1.1 pk * chip has performed its power-on initialization. Just assume
198 1.1 pk * this has happened before the OS is starting.
199 1.1 pk *
200 1.1 pk * If the I/O address is unused, inb() typically returns 0xff.
201 1.1 pk */
202 1.1 pk tmp = ADREAD(sc, AD1848_IADDR);
203 1.1 pk if (tmp & SP_IN_INIT) { /* Not a AD1848 */
204 1.1 pk DPRINTF(("ad_detect_A %x\n", tmp));
205 1.1 pk goto bad;
206 1.1 pk }
207 1.1 pk
208 1.1 pk /*
209 1.1 pk * Test if it's possible to change contents of the indirect registers.
210 1.9 mycroft * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read
211 1.9 mycroft * only so try to avoid using it. The bit 0x20 is the mic preamp
212 1.9 mycroft * enable; on some chips it is always the same in both registers, so
213 1.9 mycroft * we avoid tests where they are different.
214 1.1 pk */
215 1.9 mycroft ad_write(sc, 0, 0x8a);
216 1.1 pk ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */
217 1.9 mycroft tmp1 = ad_read(sc, 0);
218 1.9 mycroft tmp2 = ad_read(sc, 1);
219 1.1 pk
220 1.9 mycroft if (tmp1 != 0x8a || tmp2 != 0x45) {
221 1.1 pk DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2));
222 1.1 pk goto bad;
223 1.1 pk }
224 1.1 pk
225 1.9 mycroft ad_write(sc, 0, 0x65);
226 1.1 pk ad_write(sc, 1, 0xaa);
227 1.9 mycroft tmp1 = ad_read(sc, 0);
228 1.9 mycroft tmp2 = ad_read(sc, 1);
229 1.1 pk
230 1.9 mycroft if (tmp1 != 0x65 || tmp2 != 0xaa) {
231 1.1 pk DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2));
232 1.1 pk goto bad;
233 1.1 pk }
234 1.1 pk
235 1.1 pk /*
236 1.1 pk * The indirect register I12 has some read only bits. Lets
237 1.1 pk * try to change them.
238 1.1 pk */
239 1.1 pk tmp = ad_read(sc, SP_MISC_INFO);
240 1.1 pk ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f);
241 1.1 pk
242 1.19 itohy /* Here, AD1845 may sometimes be busy. Wait til it becomes ready. */
243 1.19 itohy for (t = 0; t < 100000 && ADREAD(sc, AD1848_IADDR) & SP_IN_INIT; t++)
244 1.19 itohy ;
245 1.19 itohy #ifdef AUDIO_DEBUG
246 1.19 itohy if (t)
247 1.19 itohy DPRINTF(("ad1848_isa_probe: t %d\n", t));
248 1.19 itohy #endif
249 1.19 itohy
250 1.1 pk if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) {
251 1.1 pk DPRINTF(("ad_detect_D (%x)\n", tmp1));
252 1.1 pk goto bad;
253 1.1 pk }
254 1.1 pk
255 1.1 pk /*
256 1.1 pk * MSB and 4 LSBs of the reg I12 tell the chip revision.
257 1.1 pk *
258 1.1 pk * A preliminary version of the AD1846 data sheet stated that it
259 1.1 pk * used an ID field of 0x0B. The current version, however,
260 1.1 pk * states that the AD1846 uses ID 0x0A, just like the AD1848K.
261 1.1 pk *
262 1.1 pk * this switch statement will need updating as newer clones arrive....
263 1.1 pk */
264 1.1 pk switch (tmp1 & 0x8f) {
265 1.1 pk case 0x09:
266 1.1 pk sc->chip_name = "AD1848J";
267 1.1 pk break;
268 1.1 pk case 0x0A:
269 1.1 pk sc->chip_name = "AD1848K";
270 1.1 pk break;
271 1.1 pk #if 0 /* See above */
272 1.1 pk case 0x0B:
273 1.1 pk sc->chip_name = "AD1846";
274 1.1 pk break;
275 1.1 pk #endif
276 1.1 pk case 0x81:
277 1.1 pk sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */
278 1.1 pk break;
279 1.1 pk case 0x89:
280 1.1 pk sc->chip_name = "CS4248";
281 1.1 pk break;
282 1.1 pk case 0x8A:
283 1.1 pk sc->chip_name = "broken"; /* CS4231/AD1845; see below */
284 1.1 pk break;
285 1.1 pk default:
286 1.1 pk sc->chip_name = "unknown";
287 1.1 pk DPRINTF(("ad1848: unknown codec version 0x%02x\n",
288 1.1 pk tmp1 & 0x8f));
289 1.1 pk break;
290 1.1 pk }
291 1.1 pk
292 1.1 pk /*
293 1.1 pk * The original AD1848/CS4248 has just 16 indirect registers. This
294 1.1 pk * means that I0 and I16 should return the same value (etc.).
295 1.1 pk * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test
296 1.1 pk * fails with CS4231, AD1845, etc.
297 1.1 pk */
298 1.1 pk ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */
299 1.1 pk
300 1.1 pk for (i = 0; i < 16; i++)
301 1.1 pk if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) {
302 1.9 mycroft if (i != SP_TEST_AND_INIT) {
303 1.9 mycroft DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2));
304 1.9 mycroft goto bad;
305 1.9 mycroft }
306 1.1 pk }
307 1.1 pk
308 1.1 pk /*
309 1.1 pk * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit
310 1.1 pk * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845.
311 1.1 pk */
312 1.1 pk ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */
313 1.1 pk
314 1.1 pk tmp1 = ad_read(sc, SP_MISC_INFO);
315 1.1 pk if ((tmp1 & 0xc0) == (0x80 | MODE2)) {
316 1.1 pk /*
317 1.1 pk * CS4231 or AD1845 detected - is it?
318 1.1 pk *
319 1.1 pk * Verify that setting I2 doesn't change I18.
320 1.1 pk */
321 1.1 pk ad_write(sc, 18, 0x88); /* Set I18 to known value */
322 1.1 pk
323 1.1 pk ad_write(sc, 2, 0x45);
324 1.1 pk if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */
325 1.1 pk ad_write(sc, 2, 0xaa);
326 1.1 pk if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */
327 1.1 pk DPRINTF(("ad_detect_H(%x)\n", tmp2));
328 1.1 pk goto bad;
329 1.1 pk }
330 1.1 pk
331 1.12 rh sc->mode = 2;
332 1.12 rh
333 1.1 pk /*
334 1.1 pk * It's a CS4231, or another clone with 32 registers.
335 1.1 pk * Let's find out which by checking I25.
336 1.1 pk */
337 1.1 pk if ((tmp1 & 0x8f) == 0x8a) {
338 1.1 pk tmp1 = ad_read(sc, CS_VERSION_ID);
339 1.1 pk switch (tmp1 & 0xe7) {
340 1.1 pk case 0xA0:
341 1.1 pk sc->chip_name = "CS4231A";
342 1.1 pk break;
343 1.1 pk case 0x80:
344 1.1 pk /* XXX I25 no good, AD1845 same as CS4231 */
345 1.19 itohy /*
346 1.19 itohy * XXX
347 1.19 itohy * This test is correct only after reset
348 1.19 itohy */
349 1.19 itohy if (ad_read(sc, 17) & 0xf0) {
350 1.19 itohy sc->chip_name = "AD1845";
351 1.19 itohy sc->is_ad1845 = 1;
352 1.19 itohy } else
353 1.19 itohy sc->chip_name = "CS4231";
354 1.1 pk break;
355 1.1 pk case 0x82:
356 1.1 pk sc->chip_name = "CS4232";
357 1.1 pk break;
358 1.35 garbled case 0xa2:
359 1.35 garbled sc->chip_name = "CS4232C";
360 1.35 garbled break;
361 1.1 pk case 0x03:
362 1.4 hannken case 0x83:
363 1.12 rh sc->chip_name = "CS4236";
364 1.12 rh
365 1.12 rh /*
366 1.12 rh * Try to switch to mode3 (CS4236B or
367 1.12 rh * CS4237B) by setting CMS to 3. A
368 1.12 rh * plain CS4236 will not react to
369 1.12 rh * LLBM settings.
370 1.12 rh */
371 1.12 rh ad_write(sc, SP_MISC_INFO, MODE3);
372 1.12 rh
373 1.12 rh tmp1 = ad_read(sc, CS_LEFT_LINE_CONTROL);
374 1.12 rh ad_write(sc, CS_LEFT_LINE_CONTROL, 0xe0);
375 1.12 rh tmp2 = ad_read(sc, CS_LEFT_LINE_CONTROL);
376 1.12 rh if (tmp2 == 0xe0) {
377 1.12 rh /*
378 1.12 rh * it's a CS4237B or another
379 1.12 rh * clone supporting mode 3.
380 1.12 rh * Let's determine which by
381 1.12 rh * enabling extended registers
382 1.12 rh * and checking X25.
383 1.12 rh */
384 1.12 rh tmp2 = ad_xread(sc, CS_X_CHIP_VERSION);
385 1.12 rh switch (tmp2 & X_CHIP_VERSIONF_CID) {
386 1.12 rh case X_CHIP_CID_CS4236BB:
387 1.12 rh sc->chip_name = "CS4236BrevB";
388 1.12 rh break;
389 1.12 rh case X_CHIP_CID_CS4236B:
390 1.12 rh sc->chip_name = "CS4236B";
391 1.12 rh break;
392 1.12 rh case X_CHIP_CID_CS4237B:
393 1.12 rh sc->chip_name = "CS4237B";
394 1.12 rh break;
395 1.12 rh default:
396 1.12 rh sc->chip_name = "CS4236B compatible";
397 1.12 rh DPRINTF(("cs4236: unknown mode 3 compatible codec, version 0x%02x\n", tmp2));
398 1.12 rh break;
399 1.12 rh }
400 1.12 rh sc->mode = 3;
401 1.12 rh }
402 1.12 rh
403 1.12 rh /* restore volume control information */
404 1.12 rh ad_write(sc, CS_LEFT_LINE_CONTROL, tmp1);
405 1.1 pk break;
406 1.1 pk }
407 1.1 pk }
408 1.1 pk }
409 1.1 pk }
410 1.1 pk
411 1.1 pk /* Wait for 1848 to init */
412 1.28 kent while (ADREAD(sc, AD1848_IADDR) & SP_IN_INIT)
413 1.1 pk ;
414 1.1 pk
415 1.1 pk /* Wait for 1848 to autocal */
416 1.1 pk ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);
417 1.28 kent while (ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG)
418 1.1 pk ;
419 1.1 pk
420 1.1 pk return 1;
421 1.9 mycroft bad:
422 1.1 pk return 0;
423 1.1 pk }
424 1.1 pk
425 1.1 pk /* Unmap the I/O ports */
426 1.1 pk void
427 1.28 kent ad1848_isa_unmap(struct ad1848_isa_softc *isc)
428 1.1 pk {
429 1.28 kent struct ad1848_softc *sc;
430 1.28 kent
431 1.28 kent sc = &isc->sc_ad1848;
432 1.1 pk bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
433 1.1 pk }
434 1.1 pk
435 1.1 pk /*
436 1.1 pk * Attach hardware to driver, attach hardware driver to audio
437 1.1 pk * pseudo-device driver .
438 1.1 pk */
439 1.1 pk void
440 1.28 kent ad1848_isa_attach(struct ad1848_isa_softc *isc)
441 1.1 pk {
442 1.28 kent struct ad1848_softc *sc;
443 1.23 fvdl int error;
444 1.1 pk
445 1.28 kent sc = &isc->sc_ad1848;
446 1.1 pk sc->sc_readreg = ad1848_isa_read;
447 1.1 pk sc->sc_writereg = ad1848_isa_write;
448 1.1 pk
449 1.23 fvdl if (isc->sc_playdrq != -1) {
450 1.14 thorpej isc->sc_play_maxsize = isa_dmamaxsize(isc->sc_ic,
451 1.14 thorpej isc->sc_playdrq);
452 1.23 fvdl error = isa_dmamap_create(isc->sc_ic, isc->sc_playdrq,
453 1.23 fvdl isc->sc_play_maxsize, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW);
454 1.23 fvdl if (error) {
455 1.37 nonaka aprint_error_dev(sc->sc_dev, "can't create map for drq %d\n",
456 1.34 cegger isc->sc_playdrq);
457 1.23 fvdl return;
458 1.23 fvdl }
459 1.23 fvdl }
460 1.23 fvdl if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) {
461 1.14 thorpej isc->sc_rec_maxsize = isa_dmamaxsize(isc->sc_ic,
462 1.14 thorpej isc->sc_recdrq);
463 1.23 fvdl error = isa_dmamap_create(isc->sc_ic, isc->sc_recdrq,
464 1.23 fvdl isc->sc_rec_maxsize, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW);
465 1.23 fvdl if (error) {
466 1.37 nonaka aprint_error_dev(sc->sc_dev, "can't create map for drq %d\n",
467 1.34 cegger isc->sc_recdrq);
468 1.23 fvdl isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq);
469 1.23 fvdl return;
470 1.23 fvdl }
471 1.23 fvdl }
472 1.14 thorpej
473 1.11 mycroft ad1848_attach(sc);
474 1.11 mycroft }
475 1.11 mycroft
476 1.11 mycroft int
477 1.28 kent ad1848_isa_open(void *addr, int flags)
478 1.11 mycroft {
479 1.28 kent struct ad1848_isa_softc *isc;
480 1.28 kent struct ad1848_softc *sc;
481 1.11 mycroft int error, state;
482 1.11 mycroft
483 1.28 kent isc = addr;
484 1.28 kent sc = &isc->sc_ad1848;
485 1.11 mycroft DPRINTF(("ad1848_isa_open: sc=%p\n", isc));
486 1.11 mycroft state = 0;
487 1.1 pk
488 1.6 mycroft if (isc->sc_playdrq != -1) {
489 1.23 fvdl error = isa_drq_alloc(isc->sc_ic, isc->sc_playdrq);
490 1.23 fvdl if (error != 0)
491 1.23 fvdl return EBUSY;
492 1.11 mycroft state |= 1;
493 1.1 pk }
494 1.6 mycroft if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) {
495 1.23 fvdl error = isa_drq_alloc(isc->sc_ic, isc->sc_recdrq);
496 1.23 fvdl if (error != 0)
497 1.11 mycroft goto bad;
498 1.11 mycroft state |= 2;
499 1.1 pk }
500 1.1 pk
501 1.13 itohy #ifndef AUDIO_NO_POWER_CTL
502 1.13 itohy /* Power-up chip */
503 1.38 jmcneill if (isc->powerctl) {
504 1.38 jmcneill KASSERT(mutex_owned(&sc->sc_intr_lock));
505 1.13 itohy isc->powerctl(isc->powerarg, flags);
506 1.38 jmcneill }
507 1.13 itohy #endif
508 1.13 itohy
509 1.13 itohy /* Init and mute wave output */
510 1.13 itohy ad1848_mute_wave_output(sc, WAVE_MUTE2_INIT, 1);
511 1.13 itohy
512 1.11 mycroft error = ad1848_open(sc, flags);
513 1.13 itohy if (error) {
514 1.13 itohy #ifndef AUDIO_NO_POWER_CTL
515 1.38 jmcneill if (isc->powerctl) {
516 1.38 jmcneill KASSERT(mutex_owned(&sc->sc_intr_lock));
517 1.13 itohy isc->powerctl(isc->powerarg, 0);
518 1.38 jmcneill }
519 1.13 itohy #endif
520 1.11 mycroft goto bad;
521 1.13 itohy }
522 1.1 pk
523 1.11 mycroft DPRINTF(("ad1848_isa_open: opened\n"));
524 1.28 kent return 0;
525 1.1 pk
526 1.11 mycroft bad:
527 1.11 mycroft if (state & 1)
528 1.23 fvdl isa_drq_free(isc->sc_ic, isc->sc_playdrq);
529 1.11 mycroft if (state & 2)
530 1.23 fvdl isa_drq_free(isc->sc_ic, isc->sc_recdrq);
531 1.1 pk
532 1.28 kent return error;
533 1.1 pk }
534 1.1 pk
535 1.1 pk void
536 1.28 kent ad1848_isa_close(void *addr)
537 1.1 pk {
538 1.28 kent struct ad1848_isa_softc *isc;
539 1.28 kent struct ad1848_softc *sc;
540 1.11 mycroft
541 1.1 pk DPRINTF(("ad1848_isa_close: stop DMA\n"));
542 1.28 kent isc = addr;
543 1.28 kent sc = &isc->sc_ad1848;
544 1.11 mycroft ad1848_close(sc);
545 1.13 itohy
546 1.13 itohy #ifndef AUDIO_NO_POWER_CTL
547 1.13 itohy /* Power-down chip */
548 1.38 jmcneill if (isc->powerctl) {
549 1.38 jmcneill KASSERT(mutex_owned(&sc->sc_intr_lock));
550 1.13 itohy isc->powerctl(isc->powerarg, 0);
551 1.38 jmcneill }
552 1.13 itohy #endif
553 1.26 mycroft
554 1.26 mycroft if (isc->sc_playdrq != -1)
555 1.26 mycroft isa_drq_free(isc->sc_ic, isc->sc_playdrq);
556 1.26 mycroft if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq)
557 1.26 mycroft isa_drq_free(isc->sc_ic, isc->sc_recdrq);
558 1.1 pk }
559 1.1 pk
560 1.1 pk int
561 1.28 kent ad1848_isa_trigger_input(
562 1.28 kent void *addr,
563 1.28 kent void *start, void *end,
564 1.28 kent int blksize,
565 1.28 kent void (*intr)(void *),
566 1.28 kent void *arg,
567 1.28 kent const audio_params_t *param)
568 1.28 kent {
569 1.28 kent struct ad1848_isa_softc *isc;
570 1.28 kent struct ad1848_softc *sc;
571 1.28 kent uint8_t reg;
572 1.1 pk
573 1.28 kent isc = addr;
574 1.28 kent sc = &isc->sc_ad1848;
575 1.6 mycroft isa_dmastart(isc->sc_ic, isc->sc_recdrq, start,
576 1.8 mycroft (char *)end - (char *)start, NULL,
577 1.8 mycroft DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
578 1.1 pk
579 1.6 mycroft isc->sc_recrun = 1;
580 1.17 thorpej if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) {
581 1.17 thorpej isc->sc_rintr = intr;
582 1.17 thorpej isc->sc_rarg = arg;
583 1.17 thorpej } else {
584 1.17 thorpej isc->sc_pintr = intr;
585 1.17 thorpej isc->sc_parg = arg;
586 1.17 thorpej }
587 1.1 pk
588 1.27 kent /*
589 1.21 itohy * Calculate number of transfers.
590 1.21 itohy * Note that ADPCM is always transferred 4 bytes at at a time.
591 1.21 itohy */
592 1.21 itohy blksize = (param->encoding == AUDIO_ENCODING_ADPCM) ? blksize / 4 - 1 :
593 1.27 kent (blksize * 8) / (param->precision * param->channels) - 1;
594 1.1 pk
595 1.12 rh if (sc->mode >= 2) {
596 1.6 mycroft ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff);
597 1.6 mycroft ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8);
598 1.6 mycroft } else {
599 1.6 mycroft ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff);
600 1.6 mycroft ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8);
601 1.1 pk }
602 1.1 pk
603 1.6 mycroft reg = ad_read(sc, SP_INTERFACE_CONFIG);
604 1.6 mycroft ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg);
605 1.1 pk
606 1.28 kent return 0;
607 1.1 pk }
608 1.1 pk
609 1.1 pk int
610 1.28 kent ad1848_isa_trigger_output(
611 1.28 kent void *addr,
612 1.28 kent void *start, void *end,
613 1.28 kent int blksize,
614 1.28 kent void (*intr)(void *),
615 1.28 kent void *arg,
616 1.28 kent const audio_params_t *param)
617 1.28 kent {
618 1.28 kent struct ad1848_isa_softc *isc;
619 1.28 kent struct ad1848_softc *sc;
620 1.28 kent uint8_t reg;
621 1.1 pk
622 1.28 kent isc = addr;
623 1.28 kent sc = &isc->sc_ad1848;
624 1.6 mycroft isa_dmastart(isc->sc_ic, isc->sc_playdrq, start,
625 1.8 mycroft (char *)end - (char *)start, NULL,
626 1.8 mycroft DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
627 1.1 pk
628 1.6 mycroft isc->sc_playrun = 1;
629 1.17 thorpej isc->sc_pintr = intr;
630 1.17 thorpej isc->sc_parg = arg;
631 1.1 pk
632 1.27 kent /*
633 1.21 itohy * Calculate number of transfers.
634 1.21 itohy * Note that ADPCM is always transferred 4 bytes at at a time.
635 1.21 itohy */
636 1.21 itohy blksize = (param->encoding == AUDIO_ENCODING_ADPCM) ? blksize / 4 - 1 :
637 1.27 kent (blksize * 8) / (param->precision * param->channels) - 1;
638 1.1 pk
639 1.6 mycroft ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff);
640 1.6 mycroft ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8);
641 1.1 pk
642 1.13 itohy /* Unmute wave output */
643 1.13 itohy ad1848_mute_wave_output(sc, WAVE_MUTE2, 0);
644 1.13 itohy
645 1.6 mycroft reg = ad_read(sc, SP_INTERFACE_CONFIG);
646 1.6 mycroft ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg);
647 1.7 mycroft
648 1.28 kent return 0;
649 1.7 mycroft }
650 1.7 mycroft
651 1.7 mycroft int
652 1.28 kent ad1848_isa_halt_input(void *addr)
653 1.7 mycroft {
654 1.28 kent struct ad1848_isa_softc *isc;
655 1.28 kent struct ad1848_softc *sc;
656 1.7 mycroft
657 1.28 kent isc = addr;
658 1.28 kent sc = &isc->sc_ad1848;
659 1.7 mycroft if (isc->sc_recrun) {
660 1.7 mycroft ad1848_halt_input(sc);
661 1.7 mycroft isa_dmaabort(isc->sc_ic, isc->sc_recdrq);
662 1.7 mycroft isc->sc_recrun = 0;
663 1.7 mycroft }
664 1.7 mycroft
665 1.28 kent return 0;
666 1.7 mycroft }
667 1.7 mycroft
668 1.7 mycroft int
669 1.28 kent ad1848_isa_halt_output(void *addr)
670 1.7 mycroft {
671 1.28 kent struct ad1848_isa_softc *isc;
672 1.28 kent struct ad1848_softc *sc;
673 1.7 mycroft
674 1.28 kent isc = addr;
675 1.28 kent sc = &isc->sc_ad1848;
676 1.7 mycroft if (isc->sc_playrun) {
677 1.13 itohy /* Mute wave output */
678 1.13 itohy ad1848_mute_wave_output(sc, WAVE_MUTE2, 1);
679 1.13 itohy
680 1.7 mycroft ad1848_halt_output(sc);
681 1.7 mycroft isa_dmaabort(isc->sc_ic, isc->sc_playdrq);
682 1.7 mycroft isc->sc_playrun = 0;
683 1.7 mycroft }
684 1.1 pk
685 1.28 kent return 0;
686 1.1 pk }
687 1.1 pk
688 1.1 pk int
689 1.28 kent ad1848_isa_intr(void *arg)
690 1.1 pk {
691 1.28 kent struct ad1848_isa_softc *isc;
692 1.28 kent struct ad1848_softc *sc;
693 1.28 kent int retval;
694 1.1 pk u_char status;
695 1.1 pk
696 1.28 kent isc = arg;
697 1.28 kent sc = &isc->sc_ad1848;
698 1.38 jmcneill
699 1.38 jmcneill KASSERT(mutex_owned(&sc->sc_intr_lock));
700 1.38 jmcneill
701 1.28 kent retval = 0;
702 1.1 pk /* Get intr status */
703 1.1 pk status = ADREAD(sc, AD1848_STATUS);
704 1.1 pk
705 1.1 pk #ifdef AUDIO_DEBUG
706 1.1 pk if (ad1848debug > 1)
707 1.18 thorpej printf("ad1848_isa_intr: pintr=%p rintr=%p status=%x\n",
708 1.18 thorpej isc->sc_pintr, isc->sc_rintr, status);
709 1.1 pk #endif
710 1.1 pk isc->sc_interrupts++;
711 1.1 pk
712 1.1 pk /* Handle interrupt */
713 1.17 thorpej if ((status & INTERRUPT_STATUS) != 0) {
714 1.17 thorpej if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) {
715 1.17 thorpej status = ad_read(sc, CS_IRQ_STATUS);
716 1.25 mycroft if ((status & CS_IRQ_PI) && isc->sc_playrun) {
717 1.17 thorpej (*isc->sc_pintr)(isc->sc_parg);
718 1.17 thorpej retval = 1;
719 1.17 thorpej }
720 1.25 mycroft if ((status & CS_IRQ_CI) && isc->sc_recrun) {
721 1.17 thorpej (*isc->sc_rintr)(isc->sc_rarg);
722 1.17 thorpej retval = 1;
723 1.17 thorpej }
724 1.17 thorpej } else {
725 1.25 mycroft if (isc->sc_playrun) {
726 1.17 thorpej (*isc->sc_pintr)(isc->sc_parg);
727 1.17 thorpej retval = 1;
728 1.17 thorpej }
729 1.17 thorpej }
730 1.1 pk
731 1.17 thorpej /* Clear interrupt */
732 1.1 pk ADWRITE(sc, AD1848_STATUS, 0);
733 1.17 thorpej }
734 1.28 kent return retval;
735 1.1 pk }
736 1.1 pk
737 1.1 pk void *
738 1.28 kent ad1848_isa_malloc(
739 1.28 kent void *addr,
740 1.28 kent int direction,
741 1.38 jmcneill size_t size)
742 1.1 pk {
743 1.28 kent struct ad1848_isa_softc *isc;
744 1.5 mycroft int drq;
745 1.1 pk
746 1.28 kent isc = addr;
747 1.5 mycroft if (direction == AUMODE_PLAY)
748 1.6 mycroft drq = isc->sc_playdrq;
749 1.5 mycroft else
750 1.5 mycroft drq = isc->sc_recdrq;
751 1.38 jmcneill return isa_malloc(isc->sc_ic, drq, size, M_DEVBUF, M_WAITOK);
752 1.1 pk }
753 1.1 pk
754 1.1 pk void
755 1.38 jmcneill ad1848_isa_free(void *addr, void *ptr, size_t size)
756 1.1 pk {
757 1.28 kent
758 1.38 jmcneill isa_free(ptr, M_DEVBUF);
759 1.1 pk }
760 1.1 pk
761 1.5 mycroft size_t
762 1.28 kent ad1848_isa_round_buffersize(void *addr, int direction, size_t size)
763 1.1 pk {
764 1.28 kent struct ad1848_isa_softc *isc;
765 1.14 thorpej bus_size_t maxsize;
766 1.14 thorpej
767 1.28 kent isc = addr;
768 1.14 thorpej if (direction == AUMODE_PLAY)
769 1.14 thorpej maxsize = isc->sc_play_maxsize;
770 1.14 thorpej else if (isc->sc_recdrq == isc->sc_playdrq)
771 1.14 thorpej maxsize = isc->sc_play_maxsize;
772 1.14 thorpej else
773 1.14 thorpej maxsize = isc->sc_rec_maxsize;
774 1.14 thorpej
775 1.14 thorpej if (size > maxsize)
776 1.14 thorpej size = maxsize;
777 1.28 kent return size;
778 1.1 pk }
779 1.1 pk
780 1.1 pk int
781 1.28 kent ad1848_isa_get_props(void *addr)
782 1.1 pk {
783 1.28 kent struct ad1848_isa_softc *isc;
784 1.1 pk
785 1.28 kent isc = addr;
786 1.40 isaki return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE |
787 1.28 kent (isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0);
788 1.1 pk }
789