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ad1848_isa.c revision 1.1
      1 /*	$NetBSD: ad1848_isa.c,v 1.1 1998/08/25 22:34:29 pk Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1994 John Brezak
      5  * Copyright (c) 1991-1993 Regents of the University of California.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by the Computer Systems
     19  *	Engineering Group at Lawrence Berkeley Laboratory.
     20  * 4. Neither the name of the University nor of the Laboratory may be used
     21  *    to endorse or promote products derived from this software without
     22  *    specific prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  * SUCH DAMAGE.
     35  *
     36  */
     37 
     38 /*
     39  * Copyright by Hannu Savolainen 1994
     40  *
     41  * Redistribution and use in source and binary forms, with or without
     42  * modification, are permitted provided that the following conditions are
     43  * met: 1. Redistributions of source code must retain the above copyright
     44  * notice, this list of conditions and the following disclaimer. 2.
     45  * Redistributions in binary form must reproduce the above copyright notice,
     46  * this list of conditions and the following disclaimer in the documentation
     47  * and/or other materials provided with the distribution.
     48  *
     49  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
     50  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     51  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     52  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     53  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     54  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     55  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
     56  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     57  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     58  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     59  * SUCH DAMAGE.
     60  *
     61  */
     62 /*
     63  * Portions of this code are from the VOXware support for the ad1848
     64  * by Hannu Savolainen <hannu (at) voxware.pp.fi>
     65  *
     66  * Portions also supplied from the SoundBlaster driver for NetBSD.
     67  */
     68 
     69 #include <sys/param.h>
     70 #include <sys/systm.h>
     71 #include <sys/errno.h>
     72 #include <sys/ioctl.h>
     73 #include <sys/syslog.h>
     74 #include <sys/device.h>
     75 #include <sys/proc.h>
     76 #include <sys/buf.h>
     77 
     78 #include <machine/cpu.h>
     79 #include <machine/bus.h>
     80 
     81 #include <sys/audioio.h>
     82 #include <vm/vm.h>
     83 
     84 #include <dev/audio_if.h>
     85 #include <dev/auconv.h>
     86 
     87 #include <dev/isa/isavar.h>
     88 #include <dev/isa/isadmavar.h>
     89 
     90 #include <dev/ic/ad1848reg.h>
     91 #include <dev/ic/cs4231reg.h>
     92 #include <dev/isa/ad1848var.h>
     93 #include <dev/isa/cs4231var.h>
     94 
     95 #ifdef AUDIO_DEBUG
     96 #define DPRINTF(x)	if (ad1848debug) printf x
     97 extern int	ad1848debug;
     98 #else
     99 #define DPRINTF(x)
    100 #endif
    101 
    102 static int ad1848_isa_read __P(( struct ad1848_softc *, int));
    103 static void ad1848_isa_write __P(( struct ad1848_softc *, int, int));
    104 
    105 int
    106 ad1848_isa_read(sc, index)
    107 	struct ad1848_softc *sc;
    108 	int index;
    109 {
    110 	struct ad1848_isa_softc *isc = (struct ad1848_isa_softc *)sc;
    111 	return (bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh,
    112 				 (isc)->sc_iooffs+(index)));
    113 }
    114 
    115 void
    116 ad1848_isa_write(sc, index, value)
    117 	struct ad1848_softc *sc;
    118 	int index;
    119 	int value;
    120 {
    121 	struct ad1848_isa_softc *isc = (struct ad1848_isa_softc *)sc;
    122 	bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh,
    123 			  (isc)->sc_iooffs+(index), value);
    124 }
    125 
    126 /*
    127  * Map and probe for the ad1848 chip
    128  */
    129 int
    130 ad1848_isa_mapprobe(isc, iobase)
    131 	struct ad1848_isa_softc *isc;
    132 	int iobase;
    133 {
    134 	struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848;
    135 
    136 	if (!AD1848_BASE_VALID(iobase)) {
    137 #ifdef AUDIO_DEBUG
    138 		printf("ad1848: configured iobase %04x invalid\n", iobase);
    139 #endif
    140 		return 0;
    141 	}
    142 
    143 	isc->sc_iooffs = 0;
    144 	/* Map the AD1848 ports */
    145 	if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh))
    146 		return 0;
    147 
    148 	if (!ad1848_isa_probe(isc)) {
    149 		bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
    150 		return 0;
    151 	} else
    152 		return 1;
    153 }
    154 
    155 /*
    156  * Probe for the ad1848 chip
    157  */
    158 int
    159 ad1848_isa_probe(isc)
    160 	struct ad1848_isa_softc *isc;
    161 {
    162 	struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848;
    163 	u_char tmp, tmp1 = 0xff, tmp2 = 0xff;
    164 	int i;
    165 
    166 	sc->sc_readreg = ad1848_isa_read;
    167 	sc->sc_writereg = ad1848_isa_write;
    168 
    169 	/* Is there an ad1848 chip ? */
    170 	sc->MCE_bit = MODE_CHANGE_ENABLE;
    171 	sc->mode = 1;	/* MODE 1 = original ad1848/ad1846/cs4248 */
    172 
    173 	/*
    174 	 * Check that the I/O address is in use.
    175 	 *
    176 	 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the
    177 	 * chip has performed its power-on initialization. Just assume
    178 	 * this has happened before the OS is starting.
    179 	 *
    180 	 * If the I/O address is unused, inb() typically returns 0xff.
    181 	 */
    182 	tmp = ADREAD(sc, AD1848_IADDR);
    183 	if (tmp & SP_IN_INIT) { /* Not a AD1848 */
    184 #if 0
    185 		DPRINTF(("ad_detect_A %x\n", tmp));
    186 #endif
    187 		goto bad;
    188 	}
    189 
    190 	/*
    191 	 * Test if it's possible to change contents of the indirect registers.
    192 	 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read
    193 	 * only so try to avoid using it.
    194 	 */
    195 	ad_write(sc, 0, 0xaa);
    196 	ad_write(sc, 1, 0x45);	/* 0x55 with bit 0x10 clear */
    197 
    198 	if ((tmp1 = ad_read(sc, 0)) != 0xaa ||
    199 	    (tmp2 = ad_read(sc, 1)) != 0x45) {
    200 		DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2));
    201 		goto bad;
    202 	}
    203 
    204 	ad_write(sc, 0, 0x45);
    205 	ad_write(sc, 1, 0xaa);
    206 
    207 	if ((tmp1 = ad_read(sc, 0)) != 0x45 ||
    208 	    (tmp2 = ad_read(sc, 1)) != 0xaa) {
    209 		DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2));
    210 		goto bad;
    211 	}
    212 
    213 	/*
    214 	 * The indirect register I12 has some read only bits. Lets
    215 	 * try to change them.
    216 	 */
    217 	tmp = ad_read(sc, SP_MISC_INFO);
    218 	ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f);
    219 
    220 	if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) {
    221 		DPRINTF(("ad_detect_D (%x)\n", tmp1));
    222 		goto bad;
    223 	}
    224 
    225 	/*
    226 	 * MSB and 4 LSBs of the reg I12 tell the chip revision.
    227 	 *
    228 	 * A preliminary version of the AD1846 data sheet stated that it
    229 	 * used an ID field of 0x0B.  The current version, however,
    230 	 * states that the AD1846 uses ID 0x0A, just like the AD1848K.
    231 	 *
    232 	 * this switch statement will need updating as newer clones arrive....
    233 	 */
    234 	switch (tmp1 & 0x8f) {
    235 	case 0x09:
    236 		sc->chip_name = "AD1848J";
    237 		break;
    238 	case 0x0A:
    239 		sc->chip_name = "AD1848K";
    240 		break;
    241 #if 0	/* See above */
    242 	case 0x0B:
    243 		sc->chip_name = "AD1846";
    244 		break;
    245 #endif
    246 	case 0x81:
    247 		sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */
    248 		break;
    249 	case 0x89:
    250 		sc->chip_name = "CS4248";
    251 		break;
    252 	case 0x8A:
    253 		sc->chip_name = "broken"; /* CS4231/AD1845; see below */
    254 		break;
    255 	default:
    256 		sc->chip_name = "unknown";
    257 		DPRINTF(("ad1848: unknown codec version 0x%02x\n",
    258 			 tmp1 & 0x8f));
    259 		break;
    260 	}
    261 
    262 	/*
    263 	 * The original AD1848/CS4248 has just 16 indirect registers. This
    264 	 * means that I0 and I16 should return the same value (etc.).
    265 	 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test
    266 	 * fails with CS4231, AD1845, etc.
    267 	 */
    268 	ad_write(sc, SP_MISC_INFO, 0);	/* Mode2 = disabled */
    269 
    270 	for (i = 0; i < 16; i++)
    271 		if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) {
    272 			DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2));
    273 			if (i != SP_TEST_AND_INIT) goto bad;
    274 		}
    275 
    276 	/*
    277 	 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit
    278 	 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845.
    279 	 */
    280 	ad_write(sc, SP_MISC_INFO, MODE2);	/* Set mode2, clear 0x80 */
    281 
    282 	tmp1 = ad_read(sc, SP_MISC_INFO);
    283 	if ((tmp1 & 0xc0) == (0x80 | MODE2)) {
    284 		/*
    285 		 *      CS4231 or AD1845 detected - is it?
    286 		 *
    287 		 *	Verify that setting I2 doesn't change I18.
    288 		 */
    289 		ad_write(sc, 18, 0x88); /* Set I18 to known value */
    290 
    291 		ad_write(sc, 2, 0x45);
    292 		if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */
    293 			ad_write(sc, 2, 0xaa);
    294 			if ((tmp2 = ad_read(sc, 18)) == 0xaa) {     /* Rotten bits? */
    295 				DPRINTF(("ad_detect_H(%x)\n", tmp2));
    296 				goto bad;
    297 			}
    298 
    299 			/*
    300 			 *  It's a CS4231, or another clone with 32 registers.
    301 			 *  Let's find out which by checking I25.
    302 			 */
    303 			if ((tmp1 & 0x8f) == 0x8a) {
    304 				tmp1 = ad_read(sc, CS_VERSION_ID);
    305 				switch (tmp1 & 0xe7) {
    306 				case 0xA0:
    307 					sc->chip_name = "CS4231A";
    308 					break;
    309 				case 0x80:
    310 					/*  XXX I25 no good, AD1845 same as CS4231 */
    311 					sc->chip_name = "CS4231 or AD1845";
    312 					break;
    313 				case 0x82:
    314 					sc->chip_name = "CS4232";
    315 					break;
    316 				case 0x03:
    317 					sc->chip_name = "CS4236/CS4236B";
    318 					break;
    319 				}
    320 			}
    321 			sc->mode = 2;
    322 		}
    323 	}
    324 
    325 	/* Wait for 1848 to init */
    326 	while(ADREAD(sc, AD1848_IADDR) & SP_IN_INIT)
    327 		;
    328 
    329 	/* Wait for 1848 to autocal */
    330 	ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);
    331 	while(ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG)
    332 		;
    333 
    334 	return 1;
    335  bad:
    336 	return 0;
    337 }
    338 
    339 /* Unmap the I/O ports */
    340 void
    341 ad1848_isa_unmap(isc)
    342 	struct ad1848_isa_softc *isc;
    343 {
    344 	struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848;
    345 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
    346 }
    347 
    348 /*
    349  * Attach hardware to driver, attach hardware driver to audio
    350  * pseudo-device driver .
    351  */
    352 void
    353 ad1848_isa_attach(isc)
    354 	struct ad1848_isa_softc *isc;
    355 {
    356 	struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848;
    357 
    358 	sc->sc_readreg = ad1848_isa_read;
    359 	sc->sc_writereg = ad1848_isa_write;
    360 
    361 	isc->sc_playrun = NOTRUNNING;
    362 	isc->sc_recrun = NOTRUNNING;
    363 
    364 	if (isc->sc_drq != -1) {
    365 		if (isa_dmamap_create(isc->sc_ic, isc->sc_drq, MAX_ISADMA,
    366 				      BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
    367 			printf("ad1848_attach: can't create map for drq %d\n",
    368 			       isc->sc_drq);
    369 			return;
    370 		}
    371 	}
    372 	if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_drq) {
    373 		if (isa_dmamap_create(isc->sc_ic, isc->sc_recdrq, MAX_ISADMA,
    374 				      BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
    375 			printf("ad1848_attach: can't create map for drq %d\n",
    376 			       isc->sc_recdrq);
    377 			return;
    378 		}
    379 	}
    380 
    381 	ad1848_attach(sc);
    382 }
    383 
    384 int
    385 ad1848_isa_round_blocksize(addr, blk)
    386 	void *addr;
    387 	int blk;
    388 {
    389 	struct ad1848_isa_softc *sc = addr;
    390 
    391 	sc->sc_lastcc = -1;
    392 
    393 	/* Round to a multiple of the biggest sample size. */
    394 	return (blk &= -4);
    395 }
    396 
    397 int
    398 ad1848_isa_open(addr, flags)
    399 	void *addr;
    400 	int flags;
    401 {
    402 	struct ad1848_isa_softc *sc = addr;
    403 
    404 	DPRINTF(("ad1848_open: sc=%p\n", sc));
    405 
    406 	sc->sc_lastcc = -1;
    407 	sc->sc_intr = 0;
    408 
    409 	return (ad1848_open(&sc->sc_ad1848, flags));
    410 }
    411 
    412 /*
    413  * Close function is called at splaudio().
    414  */
    415 void
    416 ad1848_isa_close(addr)
    417 	void *addr;
    418 {
    419 	struct ad1848_isa_softc *sc = addr;
    420 
    421 	sc->sc_intr = 0;
    422 
    423 	DPRINTF(("ad1848_isa_close: stop DMA\n"));
    424 	if (sc->sc_playrun != NOTRUNNING) {
    425 		isa_dmaabort(sc->sc_ic, sc->sc_drq);
    426 		sc->sc_playrun = NOTRUNNING;
    427 	}
    428 	if (sc->sc_recrun != NOTRUNNING) {
    429 		isa_dmaabort(sc->sc_ic, sc->sc_recdrq);
    430 		sc->sc_recrun = NOTRUNNING;
    431 	}
    432 	ad1848_close(&sc->sc_ad1848);
    433 }
    434 
    435 int
    436 ad1848_isa_dma_init_input(addr, buf, cc)
    437 	void *addr;
    438 	void *buf;
    439 	int cc;
    440 {
    441 	struct ad1848_isa_softc *isc = addr;
    442 
    443 	isc->sc_recrun = DMARUNNING;
    444 	isc->sc_dma_flags = DMAMODE_READ | DMAMODE_LOOP;
    445 	isc->sc_dma_bp = buf;
    446 	isc->sc_dma_cnt = cc;
    447 	isa_dmastart(isc->sc_ic, isc->sc_recdrq, buf, cc, NULL,
    448 		     isc->sc_dma_flags, BUS_DMA_NOWAIT);
    449 	DPRINTF(("ad1848_dma_init_input: %p %d\n", buf, cc));
    450 	return 0;
    451 }
    452 
    453 /*
    454  * DMA input/output are called at splaudio().
    455  */
    456 int
    457 ad1848_isa_dma_input(addr, p, cc, intr, arg)
    458 	void *addr;
    459 	void *p;
    460 	int cc;
    461 	void (*intr) __P((void *));
    462 	void *arg;
    463 {
    464 	struct ad1848_isa_softc *isc = addr;
    465 	struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848;
    466 	u_char reg;
    467 
    468 	if (sc->sc_locked) {
    469 		DPRINTF(("ad1848_dma_input: locked\n"));
    470 		return 0;
    471 	}
    472 
    473 #ifdef AUDIO_DEBUG
    474 	if (ad1848debug > 1)
    475 		printf("ad1848_dma_input: cc=%d %p (%p)\n", cc, intr, arg);
    476 #endif
    477 	sc->sc_locked = 1;
    478 	isc->sc_intr = intr;
    479 	isc->sc_arg = arg;
    480 
    481 	switch (isc->sc_recrun) {
    482 	case NOTRUNNING:
    483 		isc->sc_dma_flags = DMAMODE_READ;
    484 		isc->sc_dma_bp = p;
    485 		isc->sc_dma_cnt = cc;
    486 		isa_dmastart(isc->sc_ic, isc->sc_recdrq, p, cc, NULL,
    487 			     DMAMODE_READ, BUS_DMA_NOWAIT);
    488 		goto startpcm;
    489 	case DMARUNNING:
    490 		isc->sc_recrun = PCMRUNNING;
    491 	startpcm:
    492 		if (sc->precision == 16)
    493 			cc >>= 1;
    494 		if (sc->channels == 2)
    495 			cc >>= 1;
    496 		cc--;
    497 
    498 		if (isc->sc_lastcc != cc || sc->sc_mode != AUMODE_RECORD) {
    499 			ad_write(sc, SP_LOWER_BASE_COUNT, cc & 0xff);
    500 			ad_write(sc, SP_UPPER_BASE_COUNT, cc >> 8);
    501 
    502 			if (sc->mode == 2) {
    503 				ad_write(sc, CS_LOWER_REC_CNT, cc & 0xff);
    504 				ad_write(sc, CS_UPPER_REC_CNT, cc >> 8);
    505 			}
    506 
    507 			reg = ad_read(sc, SP_INTERFACE_CONFIG);
    508 			ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg);
    509 
    510 			isc->sc_lastcc = cc;
    511 			sc->sc_mode = AUMODE_RECORD;
    512 #ifdef AUDIO_DEBUG
    513 			if (ad1848debug > 1)
    514 				printf("ad1848_dma_input: started capture\n");
    515 #endif
    516 		}
    517 	case PCMRUNNING:
    518 		break;
    519 	}
    520 
    521 	return 0;
    522 }
    523 
    524 int
    525 ad1848_isa_dma_init_output(addr, buf, cc)
    526 	void *addr;
    527 	void *buf;
    528 	int cc;
    529 {
    530 	struct ad1848_isa_softc *isc = addr;
    531 
    532 	isc->sc_playrun = DMARUNNING;
    533 	isc->sc_dma_flags = DMAMODE_WRITE | DMAMODE_LOOP;
    534 	isc->sc_dma_bp = buf;
    535 	isc->sc_dma_cnt = cc;
    536 	isa_dmastart(isc->sc_ic, isc->sc_drq, buf, cc, NULL,
    537 		     isc->sc_dma_flags, BUS_DMA_NOWAIT);
    538 	DPRINTF(("ad1848_dma_init_output: %p %d\n", buf, cc));
    539 	return 0;
    540 }
    541 
    542 int
    543 ad1848_isa_dma_output(addr, p, cc, intr, arg)
    544 	void *addr;
    545 	void *p;
    546 	int cc;
    547 	void (*intr) __P((void *));
    548 	void *arg;
    549 {
    550 	struct ad1848_isa_softc *isc = addr;
    551 	struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848;
    552 	u_char reg;
    553 
    554 	if (sc->sc_locked) {
    555 		DPRINTF(("ad1848_dma_output: locked\n"));
    556 		return 0;
    557 	}
    558 
    559 #ifdef AUDIO_DEBUG
    560 	if (ad1848debug > 0)
    561 		printf("ad1848_dma_output: cc=%d at %p 0x%p (0x%p)\n",
    562 		       cc, p, intr, arg);
    563 #endif
    564 	sc->sc_locked = 1;
    565 	isc->sc_intr = intr;
    566 	isc->sc_arg = arg;
    567 
    568 	switch (isc->sc_playrun) {
    569 	case NOTRUNNING:
    570 		isc->sc_dma_flags = DMAMODE_WRITE;
    571 		isc->sc_dma_bp = p;
    572 		isc->sc_dma_cnt = cc;
    573 		isa_dmastart(isc->sc_ic, isc->sc_drq, p, cc, NULL,
    574 			     DMAMODE_WRITE, BUS_DMA_NOWAIT);
    575 		goto startpcm;
    576 	case DMARUNNING:
    577 		isc->sc_playrun = PCMRUNNING;
    578 	startpcm:
    579 		if (sc->precision == 16)
    580 			cc >>= 1;
    581 		if (sc->channels == 2)
    582 			cc >>= 1;
    583 		cc--;
    584 
    585 		if (isc->sc_lastcc != cc || sc->sc_mode != AUMODE_PLAY) {
    586 			ad_write(sc, SP_LOWER_BASE_COUNT, cc & 0xff);
    587 			ad_write(sc, SP_UPPER_BASE_COUNT, cc >> 8);
    588 
    589 			reg = ad_read(sc, SP_INTERFACE_CONFIG);
    590 			ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg);
    591 
    592 			isc->sc_lastcc = cc;
    593 			sc->sc_mode = AUMODE_PLAY;
    594 		}
    595 		break;
    596 	case PCMRUNNING:
    597 		break;
    598 	}
    599 
    600 	return 0;
    601 }
    602 
    603 int
    604 ad1848_isa_intr(arg)
    605 	void *arg;
    606 {
    607 	struct ad1848_isa_softc *isc = arg;
    608 	struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848;
    609 	int retval = 0;
    610 	u_char status;
    611 
    612 	/* Get intr status */
    613 	status = ADREAD(sc, AD1848_STATUS);
    614 
    615 #ifdef AUDIO_DEBUG
    616 	if (ad1848debug > 1)
    617 		printf("ad1848_intr: intr=%p status=%x\n", sc->sc_intr,status);
    618 #endif
    619 	sc->sc_locked = 0;
    620 	isc->sc_interrupts++;
    621 
    622 	/* Handle interrupt */
    623 	if (isc->sc_intr && (status & INTERRUPT_STATUS)) {
    624 		/* ACK DMA read because it may be in a bounce buffer */
    625 		/* XXX Do write to mask DMA ? */
    626 		if ((isc->sc_dma_flags & DMAMODE_READ) &&
    627 		    isc->sc_recrun == NOTRUNNING)
    628 			isa_dmadone(isc->sc_ic, isc->sc_recdrq);
    629 		(*isc->sc_intr)(isc->sc_arg);
    630 		retval = 1;
    631 	}
    632 
    633 	/* clear interrupt */
    634 	if (status & INTERRUPT_STATUS)
    635 		ADWRITE(sc, AD1848_STATUS, 0);
    636 
    637 	return(retval);
    638 }
    639 
    640 void *
    641 ad1848_isa_malloc(addr, size, pool, flags)
    642 	void *addr;
    643 	unsigned long size;
    644 	int pool;
    645 	int flags;
    646 {
    647 	struct ad1848_isa_softc *isc = addr;
    648 
    649 	return isa_malloc(isc->sc_ic, 4, size, pool, flags);
    650 }
    651 
    652 void
    653 ad1848_isa_free(addr, ptr, pool)
    654 	void *addr;
    655 	void *ptr;
    656 	int pool;
    657 {
    658 	isa_free(ptr, pool);
    659 }
    660 
    661 unsigned long
    662 ad1848_isa_round(addr, size)
    663 	void *addr;
    664 	unsigned long size;
    665 {
    666 	if (size > MAX_ISADMA)
    667 		size = MAX_ISADMA;
    668 	return size;
    669 }
    670 
    671 int
    672 ad1848_isa_mappage(addr, mem, off, prot)
    673 	void *addr;
    674         void *mem;
    675         int off;
    676 	int prot;
    677 {
    678 	return isa_mappage(mem, off, prot);
    679 }
    680 
    681 int
    682 ad1848_isa_get_props(addr)
    683 	void *addr;
    684 {
    685 	struct ad1848_isa_softc *isc = addr;
    686 
    687 	return (AUDIO_PROP_MMAP |
    688 		(isc->sc_drq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0));
    689 }
    690