ad1848_isa.c revision 1.10
1 /* $NetBSD: ad1848_isa.c,v 1.10 1999/03/22 14:29:14 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ken Hornstein and John Kohl. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 /* 39 * Copyright (c) 1994 John Brezak 40 * Copyright (c) 1991-1993 Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the Computer Systems 54 * Engineering Group at Lawrence Berkeley Laboratory. 55 * 4. Neither the name of the University nor of the Laboratory may be used 56 * to endorse or promote products derived from this software without 57 * specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 */ 72 73 /* 74 * Copyright by Hannu Savolainen 1994 75 * 76 * Redistribution and use in source and binary forms, with or without 77 * modification, are permitted provided that the following conditions are 78 * met: 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 2. 80 * Redistributions in binary form must reproduce the above copyright notice, 81 * this list of conditions and the following disclaimer in the documentation 82 * and/or other materials provided with the distribution. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 85 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 86 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 87 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 88 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 91 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 */ 97 /* 98 * Portions of this code are from the VOXware support for the ad1848 99 * by Hannu Savolainen <hannu (at) voxware.pp.fi> 100 * 101 * Portions also supplied from the SoundBlaster driver for NetBSD. 102 */ 103 104 #include <sys/param.h> 105 #include <sys/systm.h> 106 #include <sys/errno.h> 107 #include <sys/ioctl.h> 108 #include <sys/syslog.h> 109 #include <sys/device.h> 110 #include <sys/proc.h> 111 #include <sys/buf.h> 112 113 #include <machine/cpu.h> 114 #include <machine/bus.h> 115 116 #include <sys/audioio.h> 117 #include <vm/vm.h> 118 119 #include <dev/audio_if.h> 120 #include <dev/auconv.h> 121 122 #include <dev/isa/isavar.h> 123 #include <dev/isa/isadmavar.h> 124 125 #include <dev/ic/ad1848reg.h> 126 #include <dev/ic/cs4231reg.h> 127 #include <dev/isa/ad1848var.h> 128 #include <dev/isa/cs4231var.h> 129 130 #ifdef AUDIO_DEBUG 131 #define DPRINTF(x) if (ad1848debug) printf x 132 extern int ad1848debug; 133 #else 134 #define DPRINTF(x) 135 #endif 136 137 static int ad1848_isa_read __P(( struct ad1848_softc *, int)); 138 static void ad1848_isa_write __P(( struct ad1848_softc *, int, int)); 139 140 int 141 ad1848_isa_read(sc, index) 142 struct ad1848_softc *sc; 143 int index; 144 { 145 struct ad1848_isa_softc *isc = (struct ad1848_isa_softc *)sc; 146 return (bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (index))); 147 } 148 149 void 150 ad1848_isa_write(sc, index, value) 151 struct ad1848_softc *sc; 152 int index; 153 int value; 154 { 155 struct ad1848_isa_softc *isc = (struct ad1848_isa_softc *)sc; 156 bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (index), value); 157 } 158 159 /* 160 * Map and probe for the ad1848 chip 161 */ 162 int 163 ad1848_isa_mapprobe(isc, iobase) 164 struct ad1848_isa_softc *isc; 165 int iobase; 166 { 167 struct ad1848_softc *sc = &isc->sc_ad1848; 168 169 if (!AD1848_BASE_VALID(iobase)) { 170 #ifdef AUDIO_DEBUG 171 printf("ad1848: configured iobase %04x invalid\n", iobase); 172 #endif 173 return 0; 174 } 175 176 /* Map the AD1848 ports */ 177 if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh)) 178 return 0; 179 180 if (!ad1848_isa_probe(isc)) { 181 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 182 return 0; 183 } else 184 return 1; 185 } 186 187 /* 188 * Probe for the ad1848 chip 189 */ 190 int 191 ad1848_isa_probe(isc) 192 struct ad1848_isa_softc *isc; 193 { 194 struct ad1848_softc *sc = &isc->sc_ad1848; 195 u_char tmp, tmp1 = 0xff, tmp2 = 0xff; 196 int i; 197 198 sc->sc_readreg = ad1848_isa_read; 199 sc->sc_writereg = ad1848_isa_write; 200 201 /* Is there an ad1848 chip ? */ 202 sc->MCE_bit = MODE_CHANGE_ENABLE; 203 sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */ 204 205 /* 206 * Check that the I/O address is in use. 207 * 208 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the 209 * chip has performed its power-on initialization. Just assume 210 * this has happened before the OS is starting. 211 * 212 * If the I/O address is unused, inb() typically returns 0xff. 213 */ 214 tmp = ADREAD(sc, AD1848_IADDR); 215 if (tmp & SP_IN_INIT) { /* Not a AD1848 */ 216 DPRINTF(("ad_detect_A %x\n", tmp)); 217 goto bad; 218 } 219 220 /* 221 * Test if it's possible to change contents of the indirect registers. 222 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read 223 * only so try to avoid using it. The bit 0x20 is the mic preamp 224 * enable; on some chips it is always the same in both registers, so 225 * we avoid tests where they are different. 226 */ 227 ad_write(sc, 0, 0x8a); 228 ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */ 229 tmp1 = ad_read(sc, 0); 230 tmp2 = ad_read(sc, 1); 231 232 if (tmp1 != 0x8a || tmp2 != 0x45) { 233 DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2)); 234 goto bad; 235 } 236 237 ad_write(sc, 0, 0x65); 238 ad_write(sc, 1, 0xaa); 239 tmp1 = ad_read(sc, 0); 240 tmp2 = ad_read(sc, 1); 241 242 if (tmp1 != 0x65 || tmp2 != 0xaa) { 243 DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2)); 244 goto bad; 245 } 246 247 /* 248 * The indirect register I12 has some read only bits. Lets 249 * try to change them. 250 */ 251 tmp = ad_read(sc, SP_MISC_INFO); 252 ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f); 253 254 if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) { 255 DPRINTF(("ad_detect_D (%x)\n", tmp1)); 256 goto bad; 257 } 258 259 /* 260 * MSB and 4 LSBs of the reg I12 tell the chip revision. 261 * 262 * A preliminary version of the AD1846 data sheet stated that it 263 * used an ID field of 0x0B. The current version, however, 264 * states that the AD1846 uses ID 0x0A, just like the AD1848K. 265 * 266 * this switch statement will need updating as newer clones arrive.... 267 */ 268 switch (tmp1 & 0x8f) { 269 case 0x09: 270 sc->chip_name = "AD1848J"; 271 break; 272 case 0x0A: 273 sc->chip_name = "AD1848K"; 274 break; 275 #if 0 /* See above */ 276 case 0x0B: 277 sc->chip_name = "AD1846"; 278 break; 279 #endif 280 case 0x81: 281 sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */ 282 break; 283 case 0x89: 284 sc->chip_name = "CS4248"; 285 break; 286 case 0x8A: 287 sc->chip_name = "broken"; /* CS4231/AD1845; see below */ 288 break; 289 default: 290 sc->chip_name = "unknown"; 291 DPRINTF(("ad1848: unknown codec version 0x%02x\n", 292 tmp1 & 0x8f)); 293 break; 294 } 295 296 /* 297 * The original AD1848/CS4248 has just 16 indirect registers. This 298 * means that I0 and I16 should return the same value (etc.). 299 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test 300 * fails with CS4231, AD1845, etc. 301 */ 302 ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */ 303 304 for (i = 0; i < 16; i++) 305 if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) { 306 if (i != SP_TEST_AND_INIT) { 307 DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2)); 308 goto bad; 309 } 310 } 311 312 /* 313 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit 314 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845. 315 */ 316 ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */ 317 318 tmp1 = ad_read(sc, SP_MISC_INFO); 319 if ((tmp1 & 0xc0) == (0x80 | MODE2)) { 320 /* 321 * CS4231 or AD1845 detected - is it? 322 * 323 * Verify that setting I2 doesn't change I18. 324 */ 325 ad_write(sc, 18, 0x88); /* Set I18 to known value */ 326 327 ad_write(sc, 2, 0x45); 328 if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */ 329 ad_write(sc, 2, 0xaa); 330 if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */ 331 DPRINTF(("ad_detect_H(%x)\n", tmp2)); 332 goto bad; 333 } 334 335 /* 336 * It's a CS4231, or another clone with 32 registers. 337 * Let's find out which by checking I25. 338 */ 339 if ((tmp1 & 0x8f) == 0x8a) { 340 tmp1 = ad_read(sc, CS_VERSION_ID); 341 switch (tmp1 & 0xe7) { 342 case 0xA0: 343 sc->chip_name = "CS4231A"; 344 break; 345 case 0x80: 346 /* XXX I25 no good, AD1845 same as CS4231 */ 347 sc->chip_name = "CS4231 or AD1845"; 348 break; 349 case 0x82: 350 sc->chip_name = "CS4232"; 351 break; 352 case 0x03: 353 case 0x83: 354 sc->chip_name = "CS4236/CS4236B"; 355 break; 356 } 357 } 358 sc->mode = 2; 359 } 360 } 361 362 /* Wait for 1848 to init */ 363 while(ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 364 ; 365 366 /* Wait for 1848 to autocal */ 367 ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT); 368 while(ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG) 369 ; 370 371 return 1; 372 bad: 373 return 0; 374 } 375 376 /* Unmap the I/O ports */ 377 void 378 ad1848_isa_unmap(isc) 379 struct ad1848_isa_softc *isc; 380 { 381 struct ad1848_softc *sc = &isc->sc_ad1848; 382 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 383 } 384 385 /* 386 * Attach hardware to driver, attach hardware driver to audio 387 * pseudo-device driver . 388 */ 389 void 390 ad1848_isa_attach(isc) 391 struct ad1848_isa_softc *isc; 392 { 393 struct ad1848_softc *sc = &isc->sc_ad1848; 394 395 sc->sc_readreg = ad1848_isa_read; 396 sc->sc_writereg = ad1848_isa_write; 397 398 isc->sc_playrun = 0; 399 isc->sc_recrun = 0; 400 401 if (isc->sc_playdrq != -1) { 402 if (isa_dmamap_create(isc->sc_ic, isc->sc_playdrq, MAX_ISADMA, 403 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 404 printf("ad1848_attach: can't create map for drq %d\n", 405 isc->sc_playdrq); 406 return; 407 } 408 } 409 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) { 410 if (isa_dmamap_create(isc->sc_ic, isc->sc_recdrq, MAX_ISADMA, 411 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 412 printf("ad1848_attach: can't create map for drq %d\n", 413 isc->sc_recdrq); 414 return; 415 } 416 } 417 418 ad1848_attach(sc); 419 } 420 421 int 422 ad1848_isa_open(addr, flags) 423 void *addr; 424 int flags; 425 { 426 struct ad1848_isa_softc *sc = addr; 427 428 DPRINTF(("ad1848_isa_open: sc=%p\n", sc)); 429 430 return (ad1848_open(&sc->sc_ad1848, flags)); 431 } 432 433 /* 434 * Close function is called at splaudio(). 435 */ 436 void 437 ad1848_isa_close(addr) 438 void *addr; 439 { 440 struct ad1848_isa_softc *sc = addr; 441 442 ad1848_isa_halt_output(sc); 443 ad1848_isa_halt_input(sc); 444 445 sc->sc_intr = 0; 446 447 DPRINTF(("ad1848_isa_close: stop DMA\n")); 448 ad1848_close(&sc->sc_ad1848); 449 } 450 451 int 452 ad1848_isa_trigger_input(addr, start, end, blksize, intr, arg, param) 453 void *addr; 454 void *start, *end; 455 int blksize; 456 void (*intr) __P((void *)); 457 void *arg; 458 struct audio_params *param; 459 { 460 struct ad1848_isa_softc *isc = addr; 461 struct ad1848_softc *sc = &isc->sc_ad1848; 462 u_int8_t reg; 463 464 isa_dmastart(isc->sc_ic, isc->sc_recdrq, start, 465 (char *)end - (char *)start, NULL, 466 DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT); 467 468 isc->sc_recrun = 1; 469 isc->sc_intr = intr; 470 isc->sc_arg = arg; 471 472 blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1; 473 474 if (sc->mode == 2) { 475 ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff); 476 ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8); 477 } else { 478 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 479 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 480 } 481 482 reg = ad_read(sc, SP_INTERFACE_CONFIG); 483 ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg); 484 485 return (0); 486 } 487 488 int 489 ad1848_isa_trigger_output(addr, start, end, blksize, intr, arg, param) 490 void *addr; 491 void *start, *end; 492 int blksize; 493 void (*intr) __P((void *)); 494 void *arg; 495 struct audio_params *param; 496 { 497 struct ad1848_isa_softc *isc = addr; 498 struct ad1848_softc *sc = &isc->sc_ad1848; 499 u_int8_t reg; 500 501 isa_dmastart(isc->sc_ic, isc->sc_playdrq, start, 502 (char *)end - (char *)start, NULL, 503 DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT); 504 505 isc->sc_playrun = 1; 506 isc->sc_intr = intr; 507 isc->sc_arg = arg; 508 509 blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1; 510 511 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 512 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 513 514 reg = ad_read(sc, SP_INTERFACE_CONFIG); 515 ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg); 516 517 return (0); 518 } 519 520 int 521 ad1848_isa_halt_input(addr) 522 void *addr; 523 { 524 struct ad1848_isa_softc *isc = addr; 525 struct ad1848_softc *sc = &isc->sc_ad1848; 526 527 if (isc->sc_recrun) { 528 ad1848_halt_input(sc); 529 isa_dmaabort(isc->sc_ic, isc->sc_recdrq); 530 isc->sc_recrun = 0; 531 } 532 533 return (0); 534 } 535 536 int 537 ad1848_isa_halt_output(addr) 538 void *addr; 539 { 540 struct ad1848_isa_softc *isc = addr; 541 struct ad1848_softc *sc = &isc->sc_ad1848; 542 543 if (isc->sc_playrun) { 544 ad1848_halt_output(sc); 545 isa_dmaabort(isc->sc_ic, isc->sc_playdrq); 546 isc->sc_playrun = 0; 547 } 548 549 return (0); 550 } 551 552 int 553 ad1848_isa_intr(arg) 554 void *arg; 555 { 556 struct ad1848_isa_softc *isc = arg; 557 struct ad1848_softc *sc = &isc->sc_ad1848; 558 int retval = 0; 559 u_char status; 560 561 /* Get intr status */ 562 status = ADREAD(sc, AD1848_STATUS); 563 564 #ifdef AUDIO_DEBUG 565 if (ad1848debug > 1) 566 printf("ad1848_isa_intr: intr=%p status=%x\n", isc->sc_intr, status); 567 #endif 568 isc->sc_interrupts++; 569 570 /* Handle interrupt */ 571 if (isc->sc_intr && (status & INTERRUPT_STATUS)) { 572 (*isc->sc_intr)(isc->sc_arg); 573 retval = 1; 574 } 575 576 /* clear interrupt */ 577 if (status & INTERRUPT_STATUS) 578 ADWRITE(sc, AD1848_STATUS, 0); 579 580 return(retval); 581 } 582 583 void * 584 ad1848_isa_malloc(addr, direction, size, pool, flags) 585 void *addr; 586 int direction; 587 size_t size; 588 int pool, flags; 589 { 590 struct ad1848_isa_softc *isc = addr; 591 int drq; 592 593 if (direction == AUMODE_PLAY) 594 drq = isc->sc_playdrq; 595 else 596 drq = isc->sc_recdrq; 597 return (isa_malloc(isc->sc_ic, drq, size, pool, flags)); 598 } 599 600 void 601 ad1848_isa_free(addr, ptr, pool) 602 void *addr; 603 void *ptr; 604 int pool; 605 { 606 isa_free(ptr, pool); 607 } 608 609 size_t 610 ad1848_isa_round_buffersize(addr, direction, size) 611 void *addr; 612 int direction; 613 size_t size; 614 { 615 if (size > MAX_ISADMA) 616 size = MAX_ISADMA; 617 return (size); 618 } 619 620 int 621 ad1848_isa_mappage(addr, mem, off, prot) 622 void *addr; 623 void *mem; 624 int off; 625 int prot; 626 { 627 return isa_mappage(mem, off, prot); 628 } 629 630 int 631 ad1848_isa_get_props(addr) 632 void *addr; 633 { 634 struct ad1848_isa_softc *isc = addr; 635 636 return (AUDIO_PROP_MMAP | 637 (isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0)); 638 } 639
Indexes created Sun Sep 28 16:09:52 GMT 2025