ad1848_isa.c revision 1.11
1 /* $NetBSD: ad1848_isa.c,v 1.11 1999/03/22 14:54:01 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ken Hornstein and John Kohl. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 /* 39 * Copyright (c) 1994 John Brezak 40 * Copyright (c) 1991-1993 Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the Computer Systems 54 * Engineering Group at Lawrence Berkeley Laboratory. 55 * 4. Neither the name of the University nor of the Laboratory may be used 56 * to endorse or promote products derived from this software without 57 * specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 */ 72 73 /* 74 * Copyright by Hannu Savolainen 1994 75 * 76 * Redistribution and use in source and binary forms, with or without 77 * modification, are permitted provided that the following conditions are 78 * met: 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 2. 80 * Redistributions in binary form must reproduce the above copyright notice, 81 * this list of conditions and the following disclaimer in the documentation 82 * and/or other materials provided with the distribution. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 85 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 86 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 87 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 88 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 91 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 */ 97 /* 98 * Portions of this code are from the VOXware support for the ad1848 99 * by Hannu Savolainen <hannu (at) voxware.pp.fi> 100 * 101 * Portions also supplied from the SoundBlaster driver for NetBSD. 102 */ 103 104 #include <sys/param.h> 105 #include <sys/systm.h> 106 #include <sys/errno.h> 107 #include <sys/ioctl.h> 108 #include <sys/syslog.h> 109 #include <sys/device.h> 110 #include <sys/proc.h> 111 #include <sys/buf.h> 112 113 #include <machine/cpu.h> 114 #include <machine/bus.h> 115 116 #include <sys/audioio.h> 117 #include <vm/vm.h> 118 119 #include <dev/audio_if.h> 120 #include <dev/auconv.h> 121 122 #include <dev/isa/isavar.h> 123 #include <dev/isa/isadmavar.h> 124 125 #include <dev/ic/ad1848reg.h> 126 #include <dev/ic/cs4231reg.h> 127 #include <dev/isa/ad1848var.h> 128 #include <dev/isa/cs4231var.h> 129 130 #ifdef AUDIO_DEBUG 131 #define DPRINTF(x) if (ad1848debug) printf x 132 extern int ad1848debug; 133 #else 134 #define DPRINTF(x) 135 #endif 136 137 static int ad1848_isa_read __P(( struct ad1848_softc *, int)); 138 static void ad1848_isa_write __P(( struct ad1848_softc *, int, int)); 139 140 int 141 ad1848_isa_read(sc, index) 142 struct ad1848_softc *sc; 143 int index; 144 { 145 return (bus_space_read_1(sc->sc_iot, sc->sc_ioh, index)); 146 } 147 148 void 149 ad1848_isa_write(sc, index, value) 150 struct ad1848_softc *sc; 151 int index; 152 int value; 153 { 154 bus_space_write_1(sc->sc_iot, sc->sc_ioh, index, value); 155 } 156 157 /* 158 * Map and probe for the ad1848 chip 159 */ 160 int 161 ad1848_isa_mapprobe(isc, iobase) 162 struct ad1848_isa_softc *isc; 163 int iobase; 164 { 165 struct ad1848_softc *sc = &isc->sc_ad1848; 166 167 if (!AD1848_BASE_VALID(iobase)) { 168 #ifdef AUDIO_DEBUG 169 printf("ad1848: configured iobase %04x invalid\n", iobase); 170 #endif 171 return 0; 172 } 173 174 /* Map the AD1848 ports */ 175 if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh)) 176 return 0; 177 178 if (!ad1848_isa_probe(isc)) { 179 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 180 return 0; 181 } else 182 return 1; 183 } 184 185 /* 186 * Probe for the ad1848 chip 187 */ 188 int 189 ad1848_isa_probe(isc) 190 struct ad1848_isa_softc *isc; 191 { 192 struct ad1848_softc *sc = &isc->sc_ad1848; 193 u_char tmp, tmp1 = 0xff, tmp2 = 0xff; 194 int i; 195 196 sc->sc_readreg = ad1848_isa_read; 197 sc->sc_writereg = ad1848_isa_write; 198 199 /* Is there an ad1848 chip ? */ 200 sc->MCE_bit = MODE_CHANGE_ENABLE; 201 sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */ 202 203 /* 204 * Check that the I/O address is in use. 205 * 206 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the 207 * chip has performed its power-on initialization. Just assume 208 * this has happened before the OS is starting. 209 * 210 * If the I/O address is unused, inb() typically returns 0xff. 211 */ 212 tmp = ADREAD(sc, AD1848_IADDR); 213 if (tmp & SP_IN_INIT) { /* Not a AD1848 */ 214 DPRINTF(("ad_detect_A %x\n", tmp)); 215 goto bad; 216 } 217 218 /* 219 * Test if it's possible to change contents of the indirect registers. 220 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read 221 * only so try to avoid using it. The bit 0x20 is the mic preamp 222 * enable; on some chips it is always the same in both registers, so 223 * we avoid tests where they are different. 224 */ 225 ad_write(sc, 0, 0x8a); 226 ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */ 227 tmp1 = ad_read(sc, 0); 228 tmp2 = ad_read(sc, 1); 229 230 if (tmp1 != 0x8a || tmp2 != 0x45) { 231 DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2)); 232 goto bad; 233 } 234 235 ad_write(sc, 0, 0x65); 236 ad_write(sc, 1, 0xaa); 237 tmp1 = ad_read(sc, 0); 238 tmp2 = ad_read(sc, 1); 239 240 if (tmp1 != 0x65 || tmp2 != 0xaa) { 241 DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2)); 242 goto bad; 243 } 244 245 /* 246 * The indirect register I12 has some read only bits. Lets 247 * try to change them. 248 */ 249 tmp = ad_read(sc, SP_MISC_INFO); 250 ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f); 251 252 if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) { 253 DPRINTF(("ad_detect_D (%x)\n", tmp1)); 254 goto bad; 255 } 256 257 /* 258 * MSB and 4 LSBs of the reg I12 tell the chip revision. 259 * 260 * A preliminary version of the AD1846 data sheet stated that it 261 * used an ID field of 0x0B. The current version, however, 262 * states that the AD1846 uses ID 0x0A, just like the AD1848K. 263 * 264 * this switch statement will need updating as newer clones arrive.... 265 */ 266 switch (tmp1 & 0x8f) { 267 case 0x09: 268 sc->chip_name = "AD1848J"; 269 break; 270 case 0x0A: 271 sc->chip_name = "AD1848K"; 272 break; 273 #if 0 /* See above */ 274 case 0x0B: 275 sc->chip_name = "AD1846"; 276 break; 277 #endif 278 case 0x81: 279 sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */ 280 break; 281 case 0x89: 282 sc->chip_name = "CS4248"; 283 break; 284 case 0x8A: 285 sc->chip_name = "broken"; /* CS4231/AD1845; see below */ 286 break; 287 default: 288 sc->chip_name = "unknown"; 289 DPRINTF(("ad1848: unknown codec version 0x%02x\n", 290 tmp1 & 0x8f)); 291 break; 292 } 293 294 /* 295 * The original AD1848/CS4248 has just 16 indirect registers. This 296 * means that I0 and I16 should return the same value (etc.). 297 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test 298 * fails with CS4231, AD1845, etc. 299 */ 300 ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */ 301 302 for (i = 0; i < 16; i++) 303 if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) { 304 if (i != SP_TEST_AND_INIT) { 305 DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2)); 306 goto bad; 307 } 308 } 309 310 /* 311 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit 312 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845. 313 */ 314 ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */ 315 316 tmp1 = ad_read(sc, SP_MISC_INFO); 317 if ((tmp1 & 0xc0) == (0x80 | MODE2)) { 318 /* 319 * CS4231 or AD1845 detected - is it? 320 * 321 * Verify that setting I2 doesn't change I18. 322 */ 323 ad_write(sc, 18, 0x88); /* Set I18 to known value */ 324 325 ad_write(sc, 2, 0x45); 326 if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */ 327 ad_write(sc, 2, 0xaa); 328 if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */ 329 DPRINTF(("ad_detect_H(%x)\n", tmp2)); 330 goto bad; 331 } 332 333 /* 334 * It's a CS4231, or another clone with 32 registers. 335 * Let's find out which by checking I25. 336 */ 337 if ((tmp1 & 0x8f) == 0x8a) { 338 tmp1 = ad_read(sc, CS_VERSION_ID); 339 switch (tmp1 & 0xe7) { 340 case 0xA0: 341 sc->chip_name = "CS4231A"; 342 break; 343 case 0x80: 344 /* XXX I25 no good, AD1845 same as CS4231 */ 345 sc->chip_name = "CS4231 or AD1845"; 346 break; 347 case 0x82: 348 sc->chip_name = "CS4232"; 349 break; 350 case 0x03: 351 case 0x83: 352 sc->chip_name = "CS4236/CS4236B"; 353 break; 354 } 355 } 356 sc->mode = 2; 357 } 358 } 359 360 /* Wait for 1848 to init */ 361 while(ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 362 ; 363 364 /* Wait for 1848 to autocal */ 365 ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT); 366 while(ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG) 367 ; 368 369 return 1; 370 bad: 371 return 0; 372 } 373 374 /* Unmap the I/O ports */ 375 void 376 ad1848_isa_unmap(isc) 377 struct ad1848_isa_softc *isc; 378 { 379 struct ad1848_softc *sc = &isc->sc_ad1848; 380 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 381 } 382 383 /* 384 * Attach hardware to driver, attach hardware driver to audio 385 * pseudo-device driver . 386 */ 387 void 388 ad1848_isa_attach(isc) 389 struct ad1848_isa_softc *isc; 390 { 391 struct ad1848_softc *sc = &isc->sc_ad1848; 392 393 sc->sc_readreg = ad1848_isa_read; 394 sc->sc_writereg = ad1848_isa_write; 395 396 ad1848_attach(sc); 397 } 398 399 int 400 ad1848_isa_open(addr, flags) 401 void *addr; 402 int flags; 403 { 404 struct ad1848_isa_softc *isc = addr; 405 struct ad1848_softc *sc = &isc->sc_ad1848; 406 int error, state; 407 408 DPRINTF(("ad1848_isa_open: sc=%p\n", isc)); 409 state = 0; 410 411 if (isc->sc_playdrq != -1) { 412 error = isa_dmamap_create(isc->sc_ic, isc->sc_playdrq, 413 MAX_ISADMA, BUS_DMA_NOWAIT); 414 if (error) { 415 printf("%s: can't create map for drq %d\n", 416 sc->sc_dev.dv_xname, isc->sc_playdrq); 417 goto bad; 418 } 419 state |= 1; 420 } 421 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) { 422 error = isa_dmamap_create(isc->sc_ic, isc->sc_recdrq, 423 MAX_ISADMA, BUS_DMA_NOWAIT); 424 if (error) { 425 printf("%s: can't create map for drq %d\n", 426 sc->sc_dev.dv_xname, isc->sc_recdrq); 427 goto bad; 428 } 429 state |= 2; 430 } 431 432 error = ad1848_open(sc, flags); 433 if (error) 434 goto bad; 435 436 DPRINTF(("ad1848_isa_open: opened\n")); 437 return (0); 438 439 bad: 440 if (state & 1) 441 isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq); 442 if (state & 2) 443 isa_dmamap_destroy(isc->sc_ic, isc->sc_recdrq); 444 445 return (error); 446 } 447 448 /* 449 * Close function is called at splaudio(). 450 */ 451 void 452 ad1848_isa_close(addr) 453 void *addr; 454 { 455 struct ad1848_isa_softc *isc = addr; 456 struct ad1848_softc *sc = &isc->sc_ad1848; 457 458 ad1848_isa_halt_output(isc); 459 ad1848_isa_halt_input(isc); 460 461 isc->sc_intr = 0; 462 463 if (isc->sc_playdrq != -1) 464 isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq); 465 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) 466 isa_dmamap_destroy(isc->sc_ic, isc->sc_recdrq); 467 468 DPRINTF(("ad1848_isa_close: stop DMA\n")); 469 ad1848_close(sc); 470 } 471 472 int 473 ad1848_isa_trigger_input(addr, start, end, blksize, intr, arg, param) 474 void *addr; 475 void *start, *end; 476 int blksize; 477 void (*intr) __P((void *)); 478 void *arg; 479 struct audio_params *param; 480 { 481 struct ad1848_isa_softc *isc = addr; 482 struct ad1848_softc *sc = &isc->sc_ad1848; 483 u_int8_t reg; 484 485 isa_dmastart(isc->sc_ic, isc->sc_recdrq, start, 486 (char *)end - (char *)start, NULL, 487 DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT); 488 489 isc->sc_recrun = 1; 490 isc->sc_intr = intr; 491 isc->sc_arg = arg; 492 493 blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1; 494 495 if (sc->mode == 2) { 496 ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff); 497 ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8); 498 } else { 499 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 500 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 501 } 502 503 reg = ad_read(sc, SP_INTERFACE_CONFIG); 504 ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg); 505 506 return (0); 507 } 508 509 int 510 ad1848_isa_trigger_output(addr, start, end, blksize, intr, arg, param) 511 void *addr; 512 void *start, *end; 513 int blksize; 514 void (*intr) __P((void *)); 515 void *arg; 516 struct audio_params *param; 517 { 518 struct ad1848_isa_softc *isc = addr; 519 struct ad1848_softc *sc = &isc->sc_ad1848; 520 u_int8_t reg; 521 522 isa_dmastart(isc->sc_ic, isc->sc_playdrq, start, 523 (char *)end - (char *)start, NULL, 524 DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT); 525 526 isc->sc_playrun = 1; 527 isc->sc_intr = intr; 528 isc->sc_arg = arg; 529 530 blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1; 531 532 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 533 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 534 535 reg = ad_read(sc, SP_INTERFACE_CONFIG); 536 ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg); 537 538 return (0); 539 } 540 541 int 542 ad1848_isa_halt_input(addr) 543 void *addr; 544 { 545 struct ad1848_isa_softc *isc = addr; 546 struct ad1848_softc *sc = &isc->sc_ad1848; 547 548 if (isc->sc_recrun) { 549 ad1848_halt_input(sc); 550 isa_dmaabort(isc->sc_ic, isc->sc_recdrq); 551 isc->sc_recrun = 0; 552 } 553 554 return (0); 555 } 556 557 int 558 ad1848_isa_halt_output(addr) 559 void *addr; 560 { 561 struct ad1848_isa_softc *isc = addr; 562 struct ad1848_softc *sc = &isc->sc_ad1848; 563 564 if (isc->sc_playrun) { 565 ad1848_halt_output(sc); 566 isa_dmaabort(isc->sc_ic, isc->sc_playdrq); 567 isc->sc_playrun = 0; 568 } 569 570 return (0); 571 } 572 573 int 574 ad1848_isa_intr(arg) 575 void *arg; 576 { 577 struct ad1848_isa_softc *isc = arg; 578 struct ad1848_softc *sc = &isc->sc_ad1848; 579 int retval = 0; 580 u_char status; 581 582 /* Get intr status */ 583 status = ADREAD(sc, AD1848_STATUS); 584 585 #ifdef AUDIO_DEBUG 586 if (ad1848debug > 1) 587 printf("ad1848_isa_intr: intr=%p status=%x\n", isc->sc_intr, status); 588 #endif 589 isc->sc_interrupts++; 590 591 /* Handle interrupt */ 592 if (isc->sc_intr && (status & INTERRUPT_STATUS)) { 593 (*isc->sc_intr)(isc->sc_arg); 594 retval = 1; 595 } 596 597 /* clear interrupt */ 598 if (status & INTERRUPT_STATUS) 599 ADWRITE(sc, AD1848_STATUS, 0); 600 601 return(retval); 602 } 603 604 void * 605 ad1848_isa_malloc(addr, direction, size, pool, flags) 606 void *addr; 607 int direction; 608 size_t size; 609 int pool, flags; 610 { 611 struct ad1848_isa_softc *isc = addr; 612 int drq; 613 614 if (direction == AUMODE_PLAY) 615 drq = isc->sc_playdrq; 616 else 617 drq = isc->sc_recdrq; 618 return (isa_malloc(isc->sc_ic, drq, size, pool, flags)); 619 } 620 621 void 622 ad1848_isa_free(addr, ptr, pool) 623 void *addr; 624 void *ptr; 625 int pool; 626 { 627 isa_free(ptr, pool); 628 } 629 630 size_t 631 ad1848_isa_round_buffersize(addr, direction, size) 632 void *addr; 633 int direction; 634 size_t size; 635 { 636 if (size > MAX_ISADMA) 637 size = MAX_ISADMA; 638 return (size); 639 } 640 641 int 642 ad1848_isa_mappage(addr, mem, off, prot) 643 void *addr; 644 void *mem; 645 int off; 646 int prot; 647 { 648 return isa_mappage(mem, off, prot); 649 } 650 651 int 652 ad1848_isa_get_props(addr) 653 void *addr; 654 { 655 struct ad1848_isa_softc *isc = addr; 656 657 return (AUDIO_PROP_MMAP | 658 (isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0)); 659 } 660
Indexes created Sun Sep 28 16:09:52 GMT 2025