ad1848_isa.c revision 1.28
1 /* $NetBSD: ad1848_isa.c,v 1.28 2005/01/13 15:01:27 kent Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ken Hornstein and John Kohl. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 /* 39 * Copyright (c) 1994 John Brezak 40 * Copyright (c) 1991-1993 Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the Computer Systems 54 * Engineering Group at Lawrence Berkeley Laboratory. 55 * 4. Neither the name of the University nor of the Laboratory may be used 56 * to endorse or promote products derived from this software without 57 * specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 */ 72 73 /* 74 * Copyright by Hannu Savolainen 1994 75 * 76 * Redistribution and use in source and binary forms, with or without 77 * modification, are permitted provided that the following conditions are 78 * met: 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 2. 80 * Redistributions in binary form must reproduce the above copyright notice, 81 * this list of conditions and the following disclaimer in the documentation 82 * and/or other materials provided with the distribution. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 85 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 86 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 87 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 88 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 91 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 */ 97 /* 98 * Portions of this code are from the VOXware support for the ad1848 99 * by Hannu Savolainen <hannu (at) voxware.pp.fi> 100 * 101 * Portions also supplied from the SoundBlaster driver for NetBSD. 102 */ 103 104 #include <sys/cdefs.h> 105 __KERNEL_RCSID(0, "$NetBSD: ad1848_isa.c,v 1.28 2005/01/13 15:01:27 kent Exp $"); 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/errno.h> 110 #include <sys/ioctl.h> 111 #include <sys/syslog.h> 112 #include <sys/device.h> 113 #include <sys/proc.h> 114 #include <sys/buf.h> 115 116 #include <machine/cpu.h> 117 #include <machine/bus.h> 118 119 #include <sys/audioio.h> 120 121 #include <dev/audio_if.h> 122 #include <dev/auconv.h> 123 124 #include <dev/isa/isavar.h> 125 #include <dev/isa/isadmavar.h> 126 127 #include <dev/ic/ad1848reg.h> 128 #include <dev/ic/cs4231reg.h> 129 #include <dev/ic/cs4237reg.h> 130 #include <dev/isa/ad1848var.h> 131 #include <dev/isa/cs4231var.h> 132 133 #ifdef AUDIO_DEBUG 134 #define DPRINTF(x) if (ad1848debug) printf x 135 extern int ad1848debug; 136 #else 137 #define DPRINTF(x) 138 #endif 139 140 static int ad1848_isa_read( struct ad1848_softc *, int); 141 static void ad1848_isa_write( struct ad1848_softc *, int, int); 142 143 int 144 ad1848_isa_read(struct ad1848_softc *sc, int index) 145 { 146 147 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, index); 148 } 149 150 void 151 ad1848_isa_write(struct ad1848_softc *sc, int index, int value) 152 { 153 154 bus_space_write_1(sc->sc_iot, sc->sc_ioh, index, value); 155 } 156 157 /* 158 * Map and probe for the ad1848 chip 159 */ 160 int 161 ad1848_isa_mapprobe(struct ad1848_isa_softc *isc, int iobase) 162 { 163 struct ad1848_softc *sc; 164 165 sc = &isc->sc_ad1848; 166 if (!AD1848_BASE_VALID(iobase)) { 167 #ifdef AUDIO_DEBUG 168 printf("ad1848: configured iobase %04x invalid\n", iobase); 169 #endif 170 return 0; 171 } 172 173 /* Map the AD1848 ports */ 174 if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh)) 175 return 0; 176 177 if (!ad1848_isa_probe(isc)) { 178 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 179 return 0; 180 } else 181 return 1; 182 } 183 184 /* 185 * Probe for the ad1848 chip 186 */ 187 int 188 ad1848_isa_probe(struct ad1848_isa_softc *isc) 189 { 190 struct ad1848_softc *sc; 191 u_char tmp, tmp1 = 0xff, tmp2 = 0xff; 192 int i, t; 193 194 sc = &isc->sc_ad1848; 195 sc->sc_readreg = ad1848_isa_read; 196 sc->sc_writereg = ad1848_isa_write; 197 198 /* Is there an ad1848 chip ? */ 199 sc->MCE_bit = MODE_CHANGE_ENABLE; 200 sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */ 201 202 /* 203 * Check that the I/O address is in use. 204 * 205 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the 206 * chip has performed its power-on initialization. Just assume 207 * this has happened before the OS is starting. 208 * 209 * If the I/O address is unused, inb() typically returns 0xff. 210 */ 211 tmp = ADREAD(sc, AD1848_IADDR); 212 if (tmp & SP_IN_INIT) { /* Not a AD1848 */ 213 DPRINTF(("ad_detect_A %x\n", tmp)); 214 goto bad; 215 } 216 217 /* 218 * Test if it's possible to change contents of the indirect registers. 219 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read 220 * only so try to avoid using it. The bit 0x20 is the mic preamp 221 * enable; on some chips it is always the same in both registers, so 222 * we avoid tests where they are different. 223 */ 224 ad_write(sc, 0, 0x8a); 225 ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */ 226 tmp1 = ad_read(sc, 0); 227 tmp2 = ad_read(sc, 1); 228 229 if (tmp1 != 0x8a || tmp2 != 0x45) { 230 DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2)); 231 goto bad; 232 } 233 234 ad_write(sc, 0, 0x65); 235 ad_write(sc, 1, 0xaa); 236 tmp1 = ad_read(sc, 0); 237 tmp2 = ad_read(sc, 1); 238 239 if (tmp1 != 0x65 || tmp2 != 0xaa) { 240 DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2)); 241 goto bad; 242 } 243 244 /* 245 * The indirect register I12 has some read only bits. Lets 246 * try to change them. 247 */ 248 tmp = ad_read(sc, SP_MISC_INFO); 249 ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f); 250 251 /* Here, AD1845 may sometimes be busy. Wait til it becomes ready. */ 252 for (t = 0; t < 100000 && ADREAD(sc, AD1848_IADDR) & SP_IN_INIT; t++) 253 ; 254 #ifdef AUDIO_DEBUG 255 if (t) 256 DPRINTF(("ad1848_isa_probe: t %d\n", t)); 257 #endif 258 259 if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) { 260 DPRINTF(("ad_detect_D (%x)\n", tmp1)); 261 goto bad; 262 } 263 264 /* 265 * MSB and 4 LSBs of the reg I12 tell the chip revision. 266 * 267 * A preliminary version of the AD1846 data sheet stated that it 268 * used an ID field of 0x0B. The current version, however, 269 * states that the AD1846 uses ID 0x0A, just like the AD1848K. 270 * 271 * this switch statement will need updating as newer clones arrive.... 272 */ 273 switch (tmp1 & 0x8f) { 274 case 0x09: 275 sc->chip_name = "AD1848J"; 276 break; 277 case 0x0A: 278 sc->chip_name = "AD1848K"; 279 break; 280 #if 0 /* See above */ 281 case 0x0B: 282 sc->chip_name = "AD1846"; 283 break; 284 #endif 285 case 0x81: 286 sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */ 287 break; 288 case 0x89: 289 sc->chip_name = "CS4248"; 290 break; 291 case 0x8A: 292 sc->chip_name = "broken"; /* CS4231/AD1845; see below */ 293 break; 294 default: 295 sc->chip_name = "unknown"; 296 DPRINTF(("ad1848: unknown codec version 0x%02x\n", 297 tmp1 & 0x8f)); 298 break; 299 } 300 301 /* 302 * The original AD1848/CS4248 has just 16 indirect registers. This 303 * means that I0 and I16 should return the same value (etc.). 304 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test 305 * fails with CS4231, AD1845, etc. 306 */ 307 ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */ 308 309 for (i = 0; i < 16; i++) 310 if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) { 311 if (i != SP_TEST_AND_INIT) { 312 DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2)); 313 goto bad; 314 } 315 } 316 317 /* 318 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit 319 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845. 320 */ 321 ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */ 322 323 tmp1 = ad_read(sc, SP_MISC_INFO); 324 if ((tmp1 & 0xc0) == (0x80 | MODE2)) { 325 /* 326 * CS4231 or AD1845 detected - is it? 327 * 328 * Verify that setting I2 doesn't change I18. 329 */ 330 ad_write(sc, 18, 0x88); /* Set I18 to known value */ 331 332 ad_write(sc, 2, 0x45); 333 if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */ 334 ad_write(sc, 2, 0xaa); 335 if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */ 336 DPRINTF(("ad_detect_H(%x)\n", tmp2)); 337 goto bad; 338 } 339 340 sc->mode = 2; 341 342 /* 343 * It's a CS4231, or another clone with 32 registers. 344 * Let's find out which by checking I25. 345 */ 346 if ((tmp1 & 0x8f) == 0x8a) { 347 tmp1 = ad_read(sc, CS_VERSION_ID); 348 switch (tmp1 & 0xe7) { 349 case 0xA0: 350 sc->chip_name = "CS4231A"; 351 break; 352 case 0x80: 353 /* XXX I25 no good, AD1845 same as CS4231 */ 354 /* 355 * XXX 356 * This test is correct only after reset 357 */ 358 if (ad_read(sc, 17) & 0xf0) { 359 sc->chip_name = "AD1845"; 360 sc->is_ad1845 = 1; 361 } else 362 sc->chip_name = "CS4231"; 363 break; 364 case 0x82: 365 sc->chip_name = "CS4232"; 366 break; 367 case 0x03: 368 case 0x83: 369 sc->chip_name = "CS4236"; 370 371 /* 372 * Try to switch to mode3 (CS4236B or 373 * CS4237B) by setting CMS to 3. A 374 * plain CS4236 will not react to 375 * LLBM settings. 376 */ 377 ad_write(sc, SP_MISC_INFO, MODE3); 378 379 tmp1 = ad_read(sc, CS_LEFT_LINE_CONTROL); 380 ad_write(sc, CS_LEFT_LINE_CONTROL, 0xe0); 381 tmp2 = ad_read(sc, CS_LEFT_LINE_CONTROL); 382 if (tmp2 == 0xe0) { 383 /* 384 * it's a CS4237B or another 385 * clone supporting mode 3. 386 * Let's determine which by 387 * enabling extended registers 388 * and checking X25. 389 */ 390 tmp2 = ad_xread(sc, CS_X_CHIP_VERSION); 391 switch (tmp2 & X_CHIP_VERSIONF_CID) { 392 case X_CHIP_CID_CS4236BB: 393 sc->chip_name = "CS4236BrevB"; 394 break; 395 case X_CHIP_CID_CS4236B: 396 sc->chip_name = "CS4236B"; 397 break; 398 case X_CHIP_CID_CS4237B: 399 sc->chip_name = "CS4237B"; 400 break; 401 default: 402 sc->chip_name = "CS4236B compatible"; 403 DPRINTF(("cs4236: unknown mode 3 compatible codec, version 0x%02x\n", tmp2)); 404 break; 405 } 406 sc->mode = 3; 407 } 408 409 /* restore volume control information */ 410 ad_write(sc, CS_LEFT_LINE_CONTROL, tmp1); 411 break; 412 } 413 } 414 } 415 } 416 417 /* Wait for 1848 to init */ 418 while (ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 419 ; 420 421 /* Wait for 1848 to autocal */ 422 ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT); 423 while (ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG) 424 ; 425 426 return 1; 427 bad: 428 return 0; 429 } 430 431 /* Unmap the I/O ports */ 432 void 433 ad1848_isa_unmap(struct ad1848_isa_softc *isc) 434 { 435 struct ad1848_softc *sc; 436 437 sc = &isc->sc_ad1848; 438 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 439 } 440 441 /* 442 * Attach hardware to driver, attach hardware driver to audio 443 * pseudo-device driver . 444 */ 445 void 446 ad1848_isa_attach(struct ad1848_isa_softc *isc) 447 { 448 struct ad1848_softc *sc; 449 int error; 450 451 sc = &isc->sc_ad1848; 452 sc->sc_readreg = ad1848_isa_read; 453 sc->sc_writereg = ad1848_isa_write; 454 455 if (isc->sc_playdrq != -1) { 456 isc->sc_play_maxsize = isa_dmamaxsize(isc->sc_ic, 457 isc->sc_playdrq); 458 error = isa_dmamap_create(isc->sc_ic, isc->sc_playdrq, 459 isc->sc_play_maxsize, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW); 460 if (error) { 461 printf("%s: can't create map for drq %d\n", 462 sc->sc_dev.dv_xname, isc->sc_playdrq); 463 return; 464 } 465 } 466 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) { 467 isc->sc_rec_maxsize = isa_dmamaxsize(isc->sc_ic, 468 isc->sc_recdrq); 469 error = isa_dmamap_create(isc->sc_ic, isc->sc_recdrq, 470 isc->sc_rec_maxsize, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW); 471 if (error) { 472 printf("%s: can't create map for drq %d\n", 473 sc->sc_dev.dv_xname, isc->sc_recdrq); 474 isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq); 475 return; 476 } 477 } 478 479 ad1848_attach(sc); 480 } 481 482 int 483 ad1848_isa_open(void *addr, int flags) 484 { 485 struct ad1848_isa_softc *isc; 486 struct ad1848_softc *sc; 487 int error, state; 488 489 isc = addr; 490 sc = &isc->sc_ad1848; 491 DPRINTF(("ad1848_isa_open: sc=%p\n", isc)); 492 state = 0; 493 494 if (isc->sc_playdrq != -1) { 495 error = isa_drq_alloc(isc->sc_ic, isc->sc_playdrq); 496 if (error != 0) 497 return EBUSY; 498 state |= 1; 499 } 500 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) { 501 error = isa_drq_alloc(isc->sc_ic, isc->sc_recdrq); 502 if (error != 0) 503 goto bad; 504 state |= 2; 505 } 506 507 #ifndef AUDIO_NO_POWER_CTL 508 /* Power-up chip */ 509 if (isc->powerctl) 510 isc->powerctl(isc->powerarg, flags); 511 #endif 512 513 /* Init and mute wave output */ 514 ad1848_mute_wave_output(sc, WAVE_MUTE2_INIT, 1); 515 516 error = ad1848_open(sc, flags); 517 if (error) { 518 #ifndef AUDIO_NO_POWER_CTL 519 if (isc->powerctl) 520 isc->powerctl(isc->powerarg, 0); 521 #endif 522 goto bad; 523 } 524 525 DPRINTF(("ad1848_isa_open: opened\n")); 526 return 0; 527 528 bad: 529 if (state & 1) 530 isa_drq_free(isc->sc_ic, isc->sc_playdrq); 531 if (state & 2) 532 isa_drq_free(isc->sc_ic, isc->sc_recdrq); 533 534 return error; 535 } 536 537 /* 538 * Close function is called at splaudio(). 539 */ 540 void 541 ad1848_isa_close(void *addr) 542 { 543 struct ad1848_isa_softc *isc; 544 struct ad1848_softc *sc; 545 546 DPRINTF(("ad1848_isa_close: stop DMA\n")); 547 isc = addr; 548 sc = &isc->sc_ad1848; 549 ad1848_close(sc); 550 551 #ifndef AUDIO_NO_POWER_CTL 552 /* Power-down chip */ 553 if (isc->powerctl) 554 isc->powerctl(isc->powerarg, 0); 555 #endif 556 557 if (isc->sc_playdrq != -1) 558 isa_drq_free(isc->sc_ic, isc->sc_playdrq); 559 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) 560 isa_drq_free(isc->sc_ic, isc->sc_recdrq); 561 } 562 563 int 564 ad1848_isa_trigger_input( 565 void *addr, 566 void *start, void *end, 567 int blksize, 568 void (*intr)(void *), 569 void *arg, 570 const audio_params_t *param) 571 { 572 struct ad1848_isa_softc *isc; 573 struct ad1848_softc *sc; 574 uint8_t reg; 575 576 isc = addr; 577 sc = &isc->sc_ad1848; 578 isa_dmastart(isc->sc_ic, isc->sc_recdrq, start, 579 (char *)end - (char *)start, NULL, 580 DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT); 581 582 isc->sc_recrun = 1; 583 if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) { 584 isc->sc_rintr = intr; 585 isc->sc_rarg = arg; 586 } else { 587 isc->sc_pintr = intr; 588 isc->sc_parg = arg; 589 } 590 591 /* 592 * Calculate number of transfers. 593 * Note that ADPCM is always transferred 4 bytes at at a time. 594 */ 595 blksize = (param->encoding == AUDIO_ENCODING_ADPCM) ? blksize / 4 - 1 : 596 (blksize * 8) / (param->precision * param->channels) - 1; 597 598 if (sc->mode >= 2) { 599 ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff); 600 ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8); 601 } else { 602 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 603 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 604 } 605 606 reg = ad_read(sc, SP_INTERFACE_CONFIG); 607 ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg); 608 609 return 0; 610 } 611 612 int 613 ad1848_isa_trigger_output( 614 void *addr, 615 void *start, void *end, 616 int blksize, 617 void (*intr)(void *), 618 void *arg, 619 const audio_params_t *param) 620 { 621 struct ad1848_isa_softc *isc; 622 struct ad1848_softc *sc; 623 uint8_t reg; 624 625 isc = addr; 626 sc = &isc->sc_ad1848; 627 isa_dmastart(isc->sc_ic, isc->sc_playdrq, start, 628 (char *)end - (char *)start, NULL, 629 DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT); 630 631 isc->sc_playrun = 1; 632 isc->sc_pintr = intr; 633 isc->sc_parg = arg; 634 635 /* 636 * Calculate number of transfers. 637 * Note that ADPCM is always transferred 4 bytes at at a time. 638 */ 639 blksize = (param->encoding == AUDIO_ENCODING_ADPCM) ? blksize / 4 - 1 : 640 (blksize * 8) / (param->precision * param->channels) - 1; 641 642 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 643 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 644 645 /* Unmute wave output */ 646 ad1848_mute_wave_output(sc, WAVE_MUTE2, 0); 647 648 reg = ad_read(sc, SP_INTERFACE_CONFIG); 649 ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg); 650 651 return 0; 652 } 653 654 int 655 ad1848_isa_halt_input(void *addr) 656 { 657 struct ad1848_isa_softc *isc; 658 struct ad1848_softc *sc; 659 660 isc = addr; 661 sc = &isc->sc_ad1848; 662 if (isc->sc_recrun) { 663 ad1848_halt_input(sc); 664 isa_dmaabort(isc->sc_ic, isc->sc_recdrq); 665 isc->sc_recrun = 0; 666 } 667 668 return 0; 669 } 670 671 int 672 ad1848_isa_halt_output(void *addr) 673 { 674 struct ad1848_isa_softc *isc; 675 struct ad1848_softc *sc; 676 677 isc = addr; 678 sc = &isc->sc_ad1848; 679 if (isc->sc_playrun) { 680 /* Mute wave output */ 681 ad1848_mute_wave_output(sc, WAVE_MUTE2, 1); 682 683 ad1848_halt_output(sc); 684 isa_dmaabort(isc->sc_ic, isc->sc_playdrq); 685 isc->sc_playrun = 0; 686 } 687 688 return 0; 689 } 690 691 int 692 ad1848_isa_intr(void *arg) 693 { 694 struct ad1848_isa_softc *isc; 695 struct ad1848_softc *sc; 696 int retval; 697 u_char status; 698 699 isc = arg; 700 sc = &isc->sc_ad1848; 701 retval = 0; 702 /* Get intr status */ 703 status = ADREAD(sc, AD1848_STATUS); 704 705 #ifdef AUDIO_DEBUG 706 if (ad1848debug > 1) 707 printf("ad1848_isa_intr: pintr=%p rintr=%p status=%x\n", 708 isc->sc_pintr, isc->sc_rintr, status); 709 #endif 710 isc->sc_interrupts++; 711 712 /* Handle interrupt */ 713 if ((status & INTERRUPT_STATUS) != 0) { 714 if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) { 715 status = ad_read(sc, CS_IRQ_STATUS); 716 if ((status & CS_IRQ_PI) && isc->sc_playrun) { 717 (*isc->sc_pintr)(isc->sc_parg); 718 retval = 1; 719 } 720 if ((status & CS_IRQ_CI) && isc->sc_recrun) { 721 (*isc->sc_rintr)(isc->sc_rarg); 722 retval = 1; 723 } 724 } else { 725 if (isc->sc_playrun) { 726 (*isc->sc_pintr)(isc->sc_parg); 727 retval = 1; 728 } 729 } 730 731 /* Clear interrupt */ 732 ADWRITE(sc, AD1848_STATUS, 0); 733 } 734 return retval; 735 } 736 737 void * 738 ad1848_isa_malloc( 739 void *addr, 740 int direction, 741 size_t size, 742 struct malloc_type *pool, 743 int flags) 744 { 745 struct ad1848_isa_softc *isc; 746 int drq; 747 748 isc = addr; 749 if (direction == AUMODE_PLAY) 750 drq = isc->sc_playdrq; 751 else 752 drq = isc->sc_recdrq; 753 return isa_malloc(isc->sc_ic, drq, size, pool, flags); 754 } 755 756 void 757 ad1848_isa_free(void *addr, void *ptr, struct malloc_type *pool) 758 { 759 760 isa_free(ptr, pool); 761 } 762 763 size_t 764 ad1848_isa_round_buffersize(void *addr, int direction, size_t size) 765 { 766 struct ad1848_isa_softc *isc; 767 bus_size_t maxsize; 768 769 isc = addr; 770 if (direction == AUMODE_PLAY) 771 maxsize = isc->sc_play_maxsize; 772 else if (isc->sc_recdrq == isc->sc_playdrq) 773 maxsize = isc->sc_play_maxsize; 774 else 775 maxsize = isc->sc_rec_maxsize; 776 777 if (size > maxsize) 778 size = maxsize; 779 return size; 780 } 781 782 paddr_t 783 ad1848_isa_mappage(void *addr, void *mem, off_t off, int prot) 784 { 785 return isa_mappage(mem, off, prot); 786 } 787 788 int 789 ad1848_isa_get_props(void *addr) 790 { 791 struct ad1848_isa_softc *isc; 792 793 isc = addr; 794 return AUDIO_PROP_MMAP | 795 (isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0); 796 } 797
Indexes created Tue Sep 30 07:10:03 GMT 2025