ad1848_isa.c revision 1.37.4.1
1 /* $NetBSD: ad1848_isa.c,v 1.37.4.1 2011/11/19 21:49:37 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ken Hornstein and John Kohl. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /* 32 * Copyright (c) 1994 John Brezak 33 * Copyright (c) 1991-1993 Regents of the University of California. 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the Computer Systems 47 * Engineering Group at Lawrence Berkeley Laboratory. 48 * 4. Neither the name of the University nor of the Laboratory may be used 49 * to endorse or promote products derived from this software without 50 * specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 * 64 */ 65 66 /* 67 * Copyright by Hannu Savolainen 1994 68 * 69 * Redistribution and use in source and binary forms, with or without 70 * modification, are permitted provided that the following conditions are 71 * met: 1. Redistributions of source code must retain the above copyright 72 * notice, this list of conditions and the following disclaimer. 2. 73 * Redistributions in binary form must reproduce the above copyright notice, 74 * this list of conditions and the following disclaimer in the documentation 75 * and/or other materials provided with the distribution. 76 * 77 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 78 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 79 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 80 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 81 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 82 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 83 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 84 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 85 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 86 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 87 * SUCH DAMAGE. 88 * 89 */ 90 /* 91 * Portions of this code are from the VOXware support for the ad1848 92 * by Hannu Savolainen <hannu (at) voxware.pp.fi> 93 * 94 * Portions also supplied from the SoundBlaster driver for NetBSD. 95 */ 96 97 #include <sys/cdefs.h> 98 __KERNEL_RCSID(0, "$NetBSD: ad1848_isa.c,v 1.37.4.1 2011/11/19 21:49:37 jmcneill Exp $"); 99 100 #include <sys/param.h> 101 #include <sys/systm.h> 102 #include <sys/errno.h> 103 #include <sys/ioctl.h> 104 #include <sys/syslog.h> 105 #include <sys/device.h> 106 #include <sys/proc.h> 107 #include <sys/buf.h> 108 #include <sys/cpu.h> 109 #include <sys/bus.h> 110 #include <sys/audioio.h> 111 #include <sys/malloc.h> 112 113 #include <dev/audio_if.h> 114 #include <dev/auconv.h> 115 116 #include <dev/isa/isavar.h> 117 #include <dev/isa/isadmavar.h> 118 119 #include <dev/ic/ad1848reg.h> 120 #include <dev/ic/cs4231reg.h> 121 #include <dev/ic/cs4237reg.h> 122 #include <dev/isa/ad1848var.h> 123 #include <dev/isa/cs4231var.h> 124 125 #ifdef AUDIO_DEBUG 126 #define DPRINTF(x) if (ad1848debug) printf x 127 extern int ad1848debug; 128 #else 129 #define DPRINTF(x) 130 #endif 131 132 static int ad1848_isa_read( struct ad1848_softc *, int); 133 static void ad1848_isa_write( struct ad1848_softc *, int, int); 134 135 int 136 ad1848_isa_read(struct ad1848_softc *sc, int index) 137 { 138 139 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, index); 140 } 141 142 void 143 ad1848_isa_write(struct ad1848_softc *sc, int index, int value) 144 { 145 146 bus_space_write_1(sc->sc_iot, sc->sc_ioh, index, value); 147 } 148 149 /* 150 * Map and probe for the ad1848 chip 151 */ 152 int 153 ad1848_isa_mapprobe(struct ad1848_isa_softc *isc, int iobase) 154 { 155 struct ad1848_softc *sc; 156 157 sc = &isc->sc_ad1848; 158 if (!AD1848_BASE_VALID(iobase)) { 159 #ifdef AUDIO_DEBUG 160 printf("ad1848: configured iobase %04x invalid\n", iobase); 161 #endif 162 return 0; 163 } 164 165 /* Map the AD1848 ports */ 166 if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh)) 167 return 0; 168 169 if (!ad1848_isa_probe(isc)) { 170 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 171 return 0; 172 } else 173 return 1; 174 } 175 176 /* 177 * Probe for the ad1848 chip 178 */ 179 int 180 ad1848_isa_probe(struct ad1848_isa_softc *isc) 181 { 182 struct ad1848_softc *sc; 183 u_char tmp, tmp1 = 0xff, tmp2 = 0xff; 184 int i, t; 185 186 sc = &isc->sc_ad1848; 187 sc->sc_readreg = ad1848_isa_read; 188 sc->sc_writereg = ad1848_isa_write; 189 190 /* Is there an ad1848 chip ? */ 191 sc->MCE_bit = MODE_CHANGE_ENABLE; 192 sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */ 193 194 /* 195 * Check that the I/O address is in use. 196 * 197 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the 198 * chip has performed its power-on initialization. Just assume 199 * this has happened before the OS is starting. 200 * 201 * If the I/O address is unused, inb() typically returns 0xff. 202 */ 203 tmp = ADREAD(sc, AD1848_IADDR); 204 if (tmp & SP_IN_INIT) { /* Not a AD1848 */ 205 DPRINTF(("ad_detect_A %x\n", tmp)); 206 goto bad; 207 } 208 209 /* 210 * Test if it's possible to change contents of the indirect registers. 211 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read 212 * only so try to avoid using it. The bit 0x20 is the mic preamp 213 * enable; on some chips it is always the same in both registers, so 214 * we avoid tests where they are different. 215 */ 216 ad_write(sc, 0, 0x8a); 217 ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */ 218 tmp1 = ad_read(sc, 0); 219 tmp2 = ad_read(sc, 1); 220 221 if (tmp1 != 0x8a || tmp2 != 0x45) { 222 DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2)); 223 goto bad; 224 } 225 226 ad_write(sc, 0, 0x65); 227 ad_write(sc, 1, 0xaa); 228 tmp1 = ad_read(sc, 0); 229 tmp2 = ad_read(sc, 1); 230 231 if (tmp1 != 0x65 || tmp2 != 0xaa) { 232 DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2)); 233 goto bad; 234 } 235 236 /* 237 * The indirect register I12 has some read only bits. Lets 238 * try to change them. 239 */ 240 tmp = ad_read(sc, SP_MISC_INFO); 241 ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f); 242 243 /* Here, AD1845 may sometimes be busy. Wait til it becomes ready. */ 244 for (t = 0; t < 100000 && ADREAD(sc, AD1848_IADDR) & SP_IN_INIT; t++) 245 ; 246 #ifdef AUDIO_DEBUG 247 if (t) 248 DPRINTF(("ad1848_isa_probe: t %d\n", t)); 249 #endif 250 251 if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) { 252 DPRINTF(("ad_detect_D (%x)\n", tmp1)); 253 goto bad; 254 } 255 256 /* 257 * MSB and 4 LSBs of the reg I12 tell the chip revision. 258 * 259 * A preliminary version of the AD1846 data sheet stated that it 260 * used an ID field of 0x0B. The current version, however, 261 * states that the AD1846 uses ID 0x0A, just like the AD1848K. 262 * 263 * this switch statement will need updating as newer clones arrive.... 264 */ 265 switch (tmp1 & 0x8f) { 266 case 0x09: 267 sc->chip_name = "AD1848J"; 268 break; 269 case 0x0A: 270 sc->chip_name = "AD1848K"; 271 break; 272 #if 0 /* See above */ 273 case 0x0B: 274 sc->chip_name = "AD1846"; 275 break; 276 #endif 277 case 0x81: 278 sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */ 279 break; 280 case 0x89: 281 sc->chip_name = "CS4248"; 282 break; 283 case 0x8A: 284 sc->chip_name = "broken"; /* CS4231/AD1845; see below */ 285 break; 286 default: 287 sc->chip_name = "unknown"; 288 DPRINTF(("ad1848: unknown codec version 0x%02x\n", 289 tmp1 & 0x8f)); 290 break; 291 } 292 293 /* 294 * The original AD1848/CS4248 has just 16 indirect registers. This 295 * means that I0 and I16 should return the same value (etc.). 296 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test 297 * fails with CS4231, AD1845, etc. 298 */ 299 ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */ 300 301 for (i = 0; i < 16; i++) 302 if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) { 303 if (i != SP_TEST_AND_INIT) { 304 DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2)); 305 goto bad; 306 } 307 } 308 309 /* 310 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit 311 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845. 312 */ 313 ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */ 314 315 tmp1 = ad_read(sc, SP_MISC_INFO); 316 if ((tmp1 & 0xc0) == (0x80 | MODE2)) { 317 /* 318 * CS4231 or AD1845 detected - is it? 319 * 320 * Verify that setting I2 doesn't change I18. 321 */ 322 ad_write(sc, 18, 0x88); /* Set I18 to known value */ 323 324 ad_write(sc, 2, 0x45); 325 if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */ 326 ad_write(sc, 2, 0xaa); 327 if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */ 328 DPRINTF(("ad_detect_H(%x)\n", tmp2)); 329 goto bad; 330 } 331 332 sc->mode = 2; 333 334 /* 335 * It's a CS4231, or another clone with 32 registers. 336 * Let's find out which by checking I25. 337 */ 338 if ((tmp1 & 0x8f) == 0x8a) { 339 tmp1 = ad_read(sc, CS_VERSION_ID); 340 switch (tmp1 & 0xe7) { 341 case 0xA0: 342 sc->chip_name = "CS4231A"; 343 break; 344 case 0x80: 345 /* XXX I25 no good, AD1845 same as CS4231 */ 346 /* 347 * XXX 348 * This test is correct only after reset 349 */ 350 if (ad_read(sc, 17) & 0xf0) { 351 sc->chip_name = "AD1845"; 352 sc->is_ad1845 = 1; 353 } else 354 sc->chip_name = "CS4231"; 355 break; 356 case 0x82: 357 sc->chip_name = "CS4232"; 358 break; 359 case 0xa2: 360 sc->chip_name = "CS4232C"; 361 break; 362 case 0x03: 363 case 0x83: 364 sc->chip_name = "CS4236"; 365 366 /* 367 * Try to switch to mode3 (CS4236B or 368 * CS4237B) by setting CMS to 3. A 369 * plain CS4236 will not react to 370 * LLBM settings. 371 */ 372 ad_write(sc, SP_MISC_INFO, MODE3); 373 374 tmp1 = ad_read(sc, CS_LEFT_LINE_CONTROL); 375 ad_write(sc, CS_LEFT_LINE_CONTROL, 0xe0); 376 tmp2 = ad_read(sc, CS_LEFT_LINE_CONTROL); 377 if (tmp2 == 0xe0) { 378 /* 379 * it's a CS4237B or another 380 * clone supporting mode 3. 381 * Let's determine which by 382 * enabling extended registers 383 * and checking X25. 384 */ 385 tmp2 = ad_xread(sc, CS_X_CHIP_VERSION); 386 switch (tmp2 & X_CHIP_VERSIONF_CID) { 387 case X_CHIP_CID_CS4236BB: 388 sc->chip_name = "CS4236BrevB"; 389 break; 390 case X_CHIP_CID_CS4236B: 391 sc->chip_name = "CS4236B"; 392 break; 393 case X_CHIP_CID_CS4237B: 394 sc->chip_name = "CS4237B"; 395 break; 396 default: 397 sc->chip_name = "CS4236B compatible"; 398 DPRINTF(("cs4236: unknown mode 3 compatible codec, version 0x%02x\n", tmp2)); 399 break; 400 } 401 sc->mode = 3; 402 } 403 404 /* restore volume control information */ 405 ad_write(sc, CS_LEFT_LINE_CONTROL, tmp1); 406 break; 407 } 408 } 409 } 410 } 411 412 /* Wait for 1848 to init */ 413 while (ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 414 ; 415 416 /* Wait for 1848 to autocal */ 417 ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT); 418 while (ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG) 419 ; 420 421 return 1; 422 bad: 423 return 0; 424 } 425 426 /* Unmap the I/O ports */ 427 void 428 ad1848_isa_unmap(struct ad1848_isa_softc *isc) 429 { 430 struct ad1848_softc *sc; 431 432 sc = &isc->sc_ad1848; 433 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 434 } 435 436 /* 437 * Attach hardware to driver, attach hardware driver to audio 438 * pseudo-device driver . 439 */ 440 void 441 ad1848_isa_attach(struct ad1848_isa_softc *isc) 442 { 443 struct ad1848_softc *sc; 444 int error; 445 446 sc = &isc->sc_ad1848; 447 sc->sc_readreg = ad1848_isa_read; 448 sc->sc_writereg = ad1848_isa_write; 449 450 if (isc->sc_playdrq != -1) { 451 isc->sc_play_maxsize = isa_dmamaxsize(isc->sc_ic, 452 isc->sc_playdrq); 453 error = isa_dmamap_create(isc->sc_ic, isc->sc_playdrq, 454 isc->sc_play_maxsize, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW); 455 if (error) { 456 aprint_error_dev(sc->sc_dev, "can't create map for drq %d\n", 457 isc->sc_playdrq); 458 return; 459 } 460 } 461 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) { 462 isc->sc_rec_maxsize = isa_dmamaxsize(isc->sc_ic, 463 isc->sc_recdrq); 464 error = isa_dmamap_create(isc->sc_ic, isc->sc_recdrq, 465 isc->sc_rec_maxsize, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW); 466 if (error) { 467 aprint_error_dev(sc->sc_dev, "can't create map for drq %d\n", 468 isc->sc_recdrq); 469 isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq); 470 return; 471 } 472 } 473 474 ad1848_attach(sc); 475 } 476 477 int 478 ad1848_isa_open(void *addr, int flags) 479 { 480 struct ad1848_isa_softc *isc; 481 struct ad1848_softc *sc; 482 int error, state; 483 484 isc = addr; 485 sc = &isc->sc_ad1848; 486 DPRINTF(("ad1848_isa_open: sc=%p\n", isc)); 487 state = 0; 488 489 if (isc->sc_playdrq != -1) { 490 error = isa_drq_alloc(isc->sc_ic, isc->sc_playdrq); 491 if (error != 0) 492 return EBUSY; 493 state |= 1; 494 } 495 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) { 496 error = isa_drq_alloc(isc->sc_ic, isc->sc_recdrq); 497 if (error != 0) 498 goto bad; 499 state |= 2; 500 } 501 502 #ifndef AUDIO_NO_POWER_CTL 503 /* Power-up chip */ 504 if (isc->powerctl) { 505 mutex_spin_enter(&sc->sc_intr_lock); 506 isc->powerctl(isc->powerarg, flags); 507 mutex_spin_exit(&sc->sc_intr_lock); 508 } 509 #endif 510 511 /* Init and mute wave output */ 512 ad1848_mute_wave_output(sc, WAVE_MUTE2_INIT, 1); 513 514 error = ad1848_open(sc, flags); 515 if (error) { 516 #ifndef AUDIO_NO_POWER_CTL 517 if (isc->powerctl) { 518 mutex_spin_enter(&sc->sc_intr_lock); 519 isc->powerctl(isc->powerarg, 0); 520 mutex_spin_exit(&sc->sc_intr_lock); 521 } 522 #endif 523 goto bad; 524 } 525 526 DPRINTF(("ad1848_isa_open: opened\n")); 527 return 0; 528 529 bad: 530 if (state & 1) 531 isa_drq_free(isc->sc_ic, isc->sc_playdrq); 532 if (state & 2) 533 isa_drq_free(isc->sc_ic, isc->sc_recdrq); 534 535 return error; 536 } 537 538 void 539 ad1848_isa_close(void *addr) 540 { 541 struct ad1848_isa_softc *isc; 542 struct ad1848_softc *sc; 543 544 DPRINTF(("ad1848_isa_close: stop DMA\n")); 545 isc = addr; 546 sc = &isc->sc_ad1848; 547 ad1848_close(sc); 548 549 #ifndef AUDIO_NO_POWER_CTL 550 /* Power-down chip */ 551 if (isc->powerctl) { 552 mutex_spin_enter(&sc->sc_intr_lock); 553 isc->powerctl(isc->powerarg, 0); 554 mutex_spin_exit(&sc->sc_intr_lock); 555 } 556 #endif 557 558 if (isc->sc_playdrq != -1) 559 isa_drq_free(isc->sc_ic, isc->sc_playdrq); 560 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) 561 isa_drq_free(isc->sc_ic, isc->sc_recdrq); 562 } 563 564 int 565 ad1848_isa_trigger_input( 566 void *addr, 567 void *start, void *end, 568 int blksize, 569 void (*intr)(void *), 570 void *arg, 571 const audio_params_t *param) 572 { 573 struct ad1848_isa_softc *isc; 574 struct ad1848_softc *sc; 575 uint8_t reg; 576 577 isc = addr; 578 sc = &isc->sc_ad1848; 579 isa_dmastart(isc->sc_ic, isc->sc_recdrq, start, 580 (char *)end - (char *)start, NULL, 581 DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT); 582 583 isc->sc_recrun = 1; 584 if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) { 585 isc->sc_rintr = intr; 586 isc->sc_rarg = arg; 587 } else { 588 isc->sc_pintr = intr; 589 isc->sc_parg = arg; 590 } 591 592 /* 593 * Calculate number of transfers. 594 * Note that ADPCM is always transferred 4 bytes at at a time. 595 */ 596 blksize = (param->encoding == AUDIO_ENCODING_ADPCM) ? blksize / 4 - 1 : 597 (blksize * 8) / (param->precision * param->channels) - 1; 598 599 if (sc->mode >= 2) { 600 ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff); 601 ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8); 602 } else { 603 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 604 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 605 } 606 607 reg = ad_read(sc, SP_INTERFACE_CONFIG); 608 ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg); 609 610 return 0; 611 } 612 613 int 614 ad1848_isa_trigger_output( 615 void *addr, 616 void *start, void *end, 617 int blksize, 618 void (*intr)(void *), 619 void *arg, 620 const audio_params_t *param) 621 { 622 struct ad1848_isa_softc *isc; 623 struct ad1848_softc *sc; 624 uint8_t reg; 625 626 isc = addr; 627 sc = &isc->sc_ad1848; 628 isa_dmastart(isc->sc_ic, isc->sc_playdrq, start, 629 (char *)end - (char *)start, NULL, 630 DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT); 631 632 isc->sc_playrun = 1; 633 isc->sc_pintr = intr; 634 isc->sc_parg = arg; 635 636 /* 637 * Calculate number of transfers. 638 * Note that ADPCM is always transferred 4 bytes at at a time. 639 */ 640 blksize = (param->encoding == AUDIO_ENCODING_ADPCM) ? blksize / 4 - 1 : 641 (blksize * 8) / (param->precision * param->channels) - 1; 642 643 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 644 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 645 646 /* Unmute wave output */ 647 ad1848_mute_wave_output(sc, WAVE_MUTE2, 0); 648 649 reg = ad_read(sc, SP_INTERFACE_CONFIG); 650 ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg); 651 652 return 0; 653 } 654 655 int 656 ad1848_isa_halt_input(void *addr) 657 { 658 struct ad1848_isa_softc *isc; 659 struct ad1848_softc *sc; 660 661 isc = addr; 662 sc = &isc->sc_ad1848; 663 if (isc->sc_recrun) { 664 ad1848_halt_input(sc); 665 isa_dmaabort(isc->sc_ic, isc->sc_recdrq); 666 isc->sc_recrun = 0; 667 } 668 669 return 0; 670 } 671 672 int 673 ad1848_isa_halt_output(void *addr) 674 { 675 struct ad1848_isa_softc *isc; 676 struct ad1848_softc *sc; 677 678 isc = addr; 679 sc = &isc->sc_ad1848; 680 if (isc->sc_playrun) { 681 /* Mute wave output */ 682 ad1848_mute_wave_output(sc, WAVE_MUTE2, 1); 683 684 ad1848_halt_output(sc); 685 isa_dmaabort(isc->sc_ic, isc->sc_playdrq); 686 isc->sc_playrun = 0; 687 } 688 689 return 0; 690 } 691 692 int 693 ad1848_isa_intr(void *arg) 694 { 695 struct ad1848_isa_softc *isc; 696 struct ad1848_softc *sc; 697 int retval; 698 u_char status; 699 700 isc = arg; 701 sc = &isc->sc_ad1848; 702 703 KASSERT(mutex_owned(&sc->sc_intr_lock)); 704 705 retval = 0; 706 /* Get intr status */ 707 status = ADREAD(sc, AD1848_STATUS); 708 709 #ifdef AUDIO_DEBUG 710 if (ad1848debug > 1) 711 printf("ad1848_isa_intr: pintr=%p rintr=%p status=%x\n", 712 isc->sc_pintr, isc->sc_rintr, status); 713 #endif 714 isc->sc_interrupts++; 715 716 /* Handle interrupt */ 717 if ((status & INTERRUPT_STATUS) != 0) { 718 if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) { 719 status = ad_read(sc, CS_IRQ_STATUS); 720 if ((status & CS_IRQ_PI) && isc->sc_playrun) { 721 (*isc->sc_pintr)(isc->sc_parg); 722 retval = 1; 723 } 724 if ((status & CS_IRQ_CI) && isc->sc_recrun) { 725 (*isc->sc_rintr)(isc->sc_rarg); 726 retval = 1; 727 } 728 } else { 729 if (isc->sc_playrun) { 730 (*isc->sc_pintr)(isc->sc_parg); 731 retval = 1; 732 } 733 } 734 735 /* Clear interrupt */ 736 ADWRITE(sc, AD1848_STATUS, 0); 737 } 738 return retval; 739 } 740 741 void * 742 ad1848_isa_malloc( 743 void *addr, 744 int direction, 745 size_t size) 746 { 747 struct ad1848_isa_softc *isc; 748 int drq; 749 750 isc = addr; 751 if (direction == AUMODE_PLAY) 752 drq = isc->sc_playdrq; 753 else 754 drq = isc->sc_recdrq; 755 return isa_malloc(isc->sc_ic, drq, size, M_DEVBUF, M_WAITOK); 756 } 757 758 void 759 ad1848_isa_free(void *addr, void *ptr, size_t size) 760 { 761 762 isa_free(ptr, M_DEVBUF); 763 } 764 765 size_t 766 ad1848_isa_round_buffersize(void *addr, int direction, size_t size) 767 { 768 struct ad1848_isa_softc *isc; 769 bus_size_t maxsize; 770 771 isc = addr; 772 if (direction == AUMODE_PLAY) 773 maxsize = isc->sc_play_maxsize; 774 else if (isc->sc_recdrq == isc->sc_playdrq) 775 maxsize = isc->sc_play_maxsize; 776 else 777 maxsize = isc->sc_rec_maxsize; 778 779 if (size > maxsize) 780 size = maxsize; 781 return size; 782 } 783 784 paddr_t 785 ad1848_isa_mappage(void *addr, void *mem, off_t off, int prot) 786 { 787 return isa_mappage(mem, off, prot); 788 } 789 790 int 791 ad1848_isa_get_props(void *addr) 792 { 793 struct ad1848_isa_softc *isc; 794 795 isc = addr; 796 return AUDIO_PROP_MMAP | 797 (isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0); 798 } 799
Indexes created Wed Oct 22 13:09:56 GMT 2025